more libmednahawk cleanup

This commit is contained in:
zeromus 2012-11-05 01:15:49 +00:00
parent 354e12f290
commit b04fd0d422
102 changed files with 0 additions and 28057 deletions

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@ -312,8 +312,6 @@
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<ClCompile Include="src\hw_sound\sms_apu\Sms_Apu.cpp" />
<ClCompile Include="src\desa68\desa68.c" />
<ClCompile Include="netplay_stub.cpp" />
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@ -437,9 +435,6 @@
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@ -49,15 +49,6 @@
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@ -420,12 +411,6 @@
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@ -778,15 +763,6 @@
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@ -1,7 +0,0 @@
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@ -1,41 +0,0 @@
#include "../mednafen.h"
#if 0
MDFNGI EmulatedDEMO =
{
"demo",
"Mednafen Demo/Example Module",
KnownExtensions,
MODPRIO_INTERNAL_LOW,
NULL, // Debugger
&SNESInputInfo,
Load,
NULL,
NULL,
NULL,
CloseGame,
SetLayerEnableMask,
"Background\0Sprites\0",
NULL,
NULL,
NULL, //InstallReadPatch,
NULL, //RemoveReadPatches,
NULL, //MemRead,
false,
NULL, //StateAction,
Emulate,
SetInput,
SetSoundRate,
DoSimpleCommand,
SNESSettings,
0,
0,
FALSE, // Multires
320, // Nominal width
240, // Nominal height
512, // Framebuffer width
256, // Framebuffer height
};
#endif

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@ -1,14 +0,0 @@
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@ -1,676 +0,0 @@
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@ -1,394 +0,0 @@
// Gb_Snd_Emu 0.2.0. http://www.slack.net/~ant/
#include "Gb_Apu.h"
/* Copyright (C) 2003-2007 Shay Green. This module is free software; you
can redistribute it and/or modify it under the terms of the GNU Lesser
General Public License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version. This
module is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more
details. You should have received a copy of the GNU Lesser General Public
License along with this module; if not, write to the Free Software Foundation,
Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
#include "blargg_source.h"
unsigned const vol_reg = 0xFF24;
unsigned const stereo_reg = 0xFF25;
unsigned const status_reg = 0xFF26;
unsigned const wave_ram = 0xFF30;
int const power_mask = 0x80;
void Gb_Apu::treble_eq( blip_eq_t const& eq )
{
good_synth.treble_eq( eq );
med_synth .treble_eq( eq );
}
inline int Gb_Apu::calc_output( int osc ) const
{
int bits = regs [stereo_reg - start_addr] >> osc;
return (bits >> 3 & 2) | (bits & 1);
}
void Gb_Apu::set_output( Blip_Buffer* center, Blip_Buffer* left, Blip_Buffer* right, int osc )
{
// Must be silent (all NULL), mono (left and right NULL), or stereo (none NULL)
require( !center || (center && !left && !right) || (center && left && right) );
require( (unsigned) osc <= osc_count ); // fails if you pass invalid osc index
if ( !center || !left || !right )
{
left = center;
right = center;
}
int i = (unsigned) osc % osc_count;
do
{
Gb_Osc& o = *oscs [i];
o.outputs [1] = right;
o.outputs [2] = left;
o.outputs [3] = center;
o.output = o.outputs [calc_output( i )];
}
while ( ++i < osc );
}
void Gb_Apu::synth_volume( int iv )
{
double v = volume_ * 0.60 / osc_count / 15 /*steps*/ / 8 /*master vol range*/ * iv;
good_synth.volume( v );
med_synth .volume( v );
}
void Gb_Apu::apply_volume()
{
// TODO: Doesn't handle differing left and right volumes (panning).
// Not worth the complexity.
int data = regs [vol_reg - start_addr];
int left = data >> 4 & 7;
int right = data & 7;
//if ( data & 0x88 ) dprintf( "Vin: %02X\n", data & 0x88 );
//if ( left != right ) dprintf( "l: %d r: %d\n", left, right );
synth_volume( max( left, right ) + 1 );
}
void Gb_Apu::volume( double v )
{
if ( volume_ != v )
{
volume_ = v;
apply_volume();
}
}
void Gb_Apu::reset_regs()
{
for ( int i = 0; i < 0x20; i++ )
regs [i] = 0;
square1.reset();
square2.reset();
wave .reset();
noise .reset();
apply_volume();
}
void Gb_Apu::reset_lengths()
{
square1.length_ctr = 64;
square2.length_ctr = 64;
wave .length_ctr = 256;
noise .length_ctr = 64;
}
void Gb_Apu::reduce_clicks( bool reduce )
{
reduce_clicks_ = reduce;
// Click reduction makes DAC off generate same output as volume 0
int dac_off_amp = 0;
if ( reduce && wave.mode != mode_agb ) // AGB already eliminates clicks
dac_off_amp = -Gb_Osc::dac_bias;
for ( int i = 0; i < osc_count; i++ )
oscs [i]->dac_off_amp = dac_off_amp;
// AGB always eliminates clicks on wave channel using same method
if ( wave.mode == mode_agb )
wave.dac_off_amp = -Gb_Osc::dac_bias;
}
void Gb_Apu::reset( mode_t mode, bool agb_wave )
{
// Hardware mode
if ( agb_wave )
mode = mode_agb; // using AGB wave features implies AGB hardware
wave.agb_mask = agb_wave ? 0xFF : 0;
for ( int i = 0; i < osc_count; i++ )
oscs [i]->mode = mode;
reduce_clicks( reduce_clicks_ );
// Reset state
frame_time = 0;
last_time = 0;
frame_phase = 0;
reset_regs();
reset_lengths();
// Load initial wave RAM
static byte const initial_wave [2] [16] = {
{0x84,0x40,0x43,0xAA,0x2D,0x78,0x92,0x3C,0x60,0x59,0x59,0xB0,0x34,0xB8,0x2E,0xDA},
{0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF},
};
for ( int b = 2; --b >= 0; )
{
// Init both banks (does nothing if not in AGB mode)
// TODO: verify that this works
write_register( 0, 0xFF1A, b * 0x40 );
for ( unsigned i = 0; i < sizeof initial_wave [0]; i++ )
write_register( 0, i + wave_ram, initial_wave [(mode != mode_dmg)] [i] );
}
}
void Gb_Apu::set_tempo( double t )
{
frame_period = 4194304 / 512; // 512 Hz
if ( t != 1.0 )
frame_period = blip_time_t (frame_period / t);
}
Gb_Apu::Gb_Apu()
{
wave.wave_ram = &regs [wave_ram - start_addr];
oscs [0] = &square1;
oscs [1] = &square2;
oscs [2] = &wave;
oscs [3] = &noise;
for ( int i = osc_count; --i >= 0; )
{
Gb_Osc& o = *oscs [i];
o.regs = &regs [i * 5];
o.output = 0;
o.outputs [0] = 0;
o.outputs [1] = 0;
o.outputs [2] = 0;
o.outputs [3] = 0;
o.good_synth = &good_synth;
o.med_synth = &med_synth;
}
reduce_clicks_ = false;
set_tempo( 1.0 );
volume_ = 1.0;
reset();
}
void Gb_Apu::run_until_( blip_time_t end_time )
{
while ( true )
{
// run oscillators
blip_time_t time = end_time;
if ( time > frame_time )
time = frame_time;
square1.run( last_time, time );
square2.run( last_time, time );
wave .run( last_time, time );
noise .run( last_time, time );
last_time = time;
if ( time == end_time )
break;
// run frame sequencer
frame_time += frame_period * Gb_Osc::clk_mul;
switch ( frame_phase++ )
{
case 2:
case 6:
// 128 Hz
square1.clock_sweep();
case 0:
case 4:
// 256 Hz
square1.clock_length();
square2.clock_length();
wave .clock_length();
noise .clock_length();
break;
case 7:
// 64 Hz
frame_phase = 0;
square1.clock_envelope();
square2.clock_envelope();
noise .clock_envelope();
}
}
}
inline void Gb_Apu::run_until( blip_time_t time )
{
require( time >= last_time ); // end_time must not be before previous time
if ( time > last_time )
run_until_( time );
}
void Gb_Apu::end_frame( blip_time_t end_time )
{
if ( end_time > last_time )
run_until( end_time );
frame_time -= end_time;
assert( frame_time >= 0 );
last_time -= end_time;
assert( last_time >= 0 );
}
void Gb_Apu::silence_osc( Gb_Osc& o )
{
int delta = -o.last_amp;
if ( delta )
{
o.last_amp = 0;
if ( o.output )
{
o.output->set_modified();
med_synth.offset( last_time, delta, o.output );
}
}
}
void Gb_Apu::apply_stereo()
{
for ( int i = osc_count; --i >= 0; )
{
Gb_Osc& o = *oscs [i];
Blip_Buffer* out = o.outputs [calc_output( i )];
if ( o.output != out )
{
silence_osc( o );
o.output = out;
}
}
}
void Gb_Apu::write_register( blip_time_t time, unsigned addr, int data )
{
require( (unsigned) data < 0x100 );
int reg = addr - start_addr;
if ( (unsigned) reg >= register_count )
{
require( false );
return;
}
if ( addr < status_reg && !(regs [status_reg - start_addr] & power_mask) )
{
// Power is off
// length counters can only be written in DMG mode
if ( wave.mode != mode_dmg || (reg != 1 && reg != 5+1 && reg != 10+1 && reg != 15+1) )
return;
if ( reg < 10 )
data &= 0x3F; // clear square duty
}
run_until( time );
if ( addr >= wave_ram )
{
wave.write( addr, data );
}
else
{
int old_data = regs [reg];
regs [reg] = data;
if ( addr < vol_reg )
{
// Oscillator
write_osc( reg / 5, reg, old_data, data );
}
else if ( addr == vol_reg && data != old_data )
{
// Master volume
for ( int i = osc_count; --i >= 0; )
silence_osc( *oscs [i] );
apply_volume();
}
else if ( addr == stereo_reg )
{
// Stereo panning
apply_stereo();
}
else if ( addr == status_reg && (data ^ old_data) & power_mask )
{
// Power control
frame_phase = 0;
for ( int i = osc_count; --i >= 0; )
silence_osc( *oscs [i] );
reset_regs();
if ( wave.mode != mode_dmg )
reset_lengths();
regs [status_reg - start_addr] = data;
}
}
}
int Gb_Apu::read_register( blip_time_t time, unsigned addr )
{
run_until( time );
int reg = addr - start_addr;
if ( (unsigned) reg >= register_count )
{
require( false );
return 0;
}
if ( addr >= wave_ram )
return wave.read( addr );
// Value read back has some bits always set
static byte const masks [] = {
0x80,0x3F,0x00,0xFF,0xBF,
0xFF,0x3F,0x00,0xFF,0xBF,
0x7F,0xFF,0x9F,0xFF,0xBF,
0xFF,0xFF,0x00,0x00,0xBF,
0x00,0x00,0x70,
0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF
};
int mask = masks [reg];
if ( wave.agb_mask && (reg == 10 || reg == 12) )
mask = 0x1F; // extra implemented bits in wave regs on AGB
int data = regs [reg] | mask;
// Status register
if ( addr == status_reg )
{
data &= 0xF0;
data |= (int) square1.enabled << 0;
data |= (int) square2.enabled << 1;
data |= (int) wave .enabled << 2;
data |= (int) noise .enabled << 3;
}
return data;
}

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// Nintendo Game Boy sound hardware emulator with save state support
// Gb_Snd_Emu 0.2.0
#ifndef GB_APU_H
#define GB_APU_H
#include "Gb_Oscs.h"
struct gb_apu_state_t;
class Gb_Apu {
public:
// Basics
// Clock rate that sound hardware runs at.
enum { clock_rate = 4194304 * GB_APU_OVERCLOCK };
// Sets buffer(s) to generate sound into. If left and right are NULL, output is mono.
// If all are NULL, no output is generated but other emulation still runs.
// If chan is specified, only that channel's output is changed, otherwise all are.
enum { osc_count = 4 }; // 0: Square 1, 1: Square 2, 2: Wave, 3: Noise
void set_output( Blip_Buffer* center, Blip_Buffer* left = NULL, Blip_Buffer* right = NULL,
int chan = osc_count );
// Resets hardware to initial power on state BEFORE boot ROM runs. Mode selects
// sound hardware. Additional AGB wave features are enabled separately.
enum mode_t {
mode_dmg, // Game Boy monochrome
mode_cgb, // Game Boy Color
mode_agb // Game Boy Advance
};
void reset( mode_t mode = mode_cgb, bool agb_wave = false );
// Reads and writes must be within the start_addr to end_addr range, inclusive.
// Addresses outside this range are not mapped to the sound hardware.
enum { start_addr = 0xFF10 };
enum { end_addr = 0xFF3F };
enum { register_count = end_addr - start_addr + 1 };
// Times are specified as the number of clocks since the beginning of the
// current time frame.
// Emulates CPU write of data to addr at specified time.
void write_register( blip_time_t time, unsigned addr, int data );
// Emulates CPU read from addr at specified time.
int read_register( blip_time_t time, unsigned addr );
// Emulates sound hardware up to specified time, ends current time frame, then
// starts a new frame at time 0.
void end_frame( blip_time_t frame_length );
// Sound adjustments
// Sets overall volume, where 1.0 is normal.
void volume( double );
// If true, reduces clicking by disabling DAC biasing. Note that this reduces
// emulation accuracy, since the clicks are authentic.
void reduce_clicks( bool reduce = true );
// Sets treble equalization.
void treble_eq( blip_eq_t const& );
// Treble and bass values for various hardware.
enum {
speaker_treble = -47, // speaker on system
speaker_bass = 2000,
dmg_treble = 0, // headphones on each system
dmg_bass = 30,
cgb_treble = 0,
cgb_bass = 300, // CGB has much less bass
agb_treble = 0,
agb_bass = 30
};
// Sets frame sequencer rate, where 1.0 is normal. Meant for adjusting the
// tempo in a game music player.
void set_tempo( double );
// Save states
// Saves full emulation state to state_out. Data format is portable and
// includes some extra space to avoid expansion in case more state needs
// to be stored in the future.
void save_state( gb_apu_state_t* state_out );
// Loads state. You should call reset() BEFORE this.
blargg_err_t load_state( gb_apu_state_t const& in );
public:
Gb_Apu();
// Use set_output() in place of these
BLARGG_DEPRECATED void output ( Blip_Buffer* c ) { set_output( c, c, c ); }
BLARGG_DEPRECATED void output ( Blip_Buffer* c, Blip_Buffer* l, Blip_Buffer* r ) { set_output( c, l, r ); }
BLARGG_DEPRECATED void osc_output( int i, Blip_Buffer* c ) { set_output( c, c, c, i ); }
BLARGG_DEPRECATED void osc_output( int i, Blip_Buffer* c, Blip_Buffer* l, Blip_Buffer* r ) { set_output( c, l, r, i ); }
private:
// noncopyable
Gb_Apu( const Gb_Apu& );
Gb_Apu& operator = ( const Gb_Apu& );
Gb_Osc* oscs [osc_count];
blip_time_t last_time; // time sound emulator has been run to
blip_time_t frame_period; // clocks between each frame sequencer step
double volume_;
bool reduce_clicks_;
Gb_Sweep_Square square1;
Gb_Square square2;
Gb_Wave wave;
Gb_Noise noise;
blip_time_t frame_time; // time of next frame sequencer action
int frame_phase; // phase of next frame sequencer step
enum { regs_size = register_count + 0x10 };
BOOST::uint8_t regs [regs_size];// last values written to registers
// large objects after everything else
Gb_Osc::Good_Synth good_synth;
Gb_Osc::Med_Synth med_synth;
void reset_lengths();
void reset_regs();
int calc_output( int osc ) const;
void apply_stereo();
void apply_volume();
void synth_volume( int );
void run_until_( blip_time_t );
void run_until( blip_time_t );
void silence_osc( Gb_Osc& );
void write_osc( int index, int reg, int old_data, int data );
const char* save_load( gb_apu_state_t*, bool save );
void save_load2( gb_apu_state_t*, bool save );
friend class Gb_Apu_Tester;
};
// Format of save state. Should be stable across versions of the library,
// with earlier versions properly opening later save states. Includes some
// room for expansion so the state size shouldn't increase.
struct gb_apu_state_t
{
#if GB_APU_CUSTOM_STATE
// Values stored as plain int so your code can read/write them easily.
// Structure can NOT be written to disk, since format is not portable.
typedef int val_t;
#else
// Values written in portable little-endian format, allowing structure
// to be written directly to disk.
typedef unsigned char val_t [4];
#endif
enum { format0 = 0x50414247 };
val_t format; // format of all following data
val_t version; // later versions just add fields to end
unsigned char regs [0x40];
val_t frame_time;
val_t frame_phase;
val_t sweep_freq;
val_t sweep_delay;
val_t sweep_enabled;
val_t sweep_neg;
val_t noise_divider;
val_t wave_buf;
val_t delay [4];
val_t length_ctr [4];
val_t phase [4];
val_t enabled [4];
val_t env_delay [3];
val_t env_volume [3];
val_t env_enabled [3];
val_t unused [13]; // for future expansion
};
#endif

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// Gb_Snd_Emu 0.2.0. http://www.slack.net/~ant/
#include "Gb_Apu.h"
#include <string.h>
/* Copyright (C) 2007 Shay Green. This module is free software; you
can redistribute it and/or modify it under the terms of the GNU Lesser
General Public License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version. This
module is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more
details. You should have received a copy of the GNU Lesser General Public
License along with this module; if not, write to the Free Software Foundation,
Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
#include "blargg_source.h"
#if GB_APU_CUSTOM_STATE
#define REFLECT( x, y ) (save ? (io->y) = (x) : (x) = (io->y) )
#else
#define REFLECT( x, y ) (save ? set_val( io->y, x ) : (void) ((x) = get_val( io->y )))
static blargg_ulong get_val( byte const* p )
{
return p [3] * 0x1000000 + p [2] * 0x10000 + p [1] * 0x100 + p [0];
}
static void set_val( byte* p, blargg_ulong n )
{
p [0] = (byte) (n );
p [1] = (byte) (n >> 8);
p [2] = (byte) (n >> 16);
p [3] = (byte) (n >> 24);
}
#endif
inline const char* Gb_Apu::save_load( gb_apu_state_t* io, bool save )
{
#if !GB_APU_CUSTOM_STATE
assert( sizeof (gb_apu_state_t) == 256 );
#endif
int format = io->format0;
REFLECT( format, format );
if ( format != io->format0 )
return "Unsupported sound save state format";
int version = 0;
REFLECT( version, version );
// Registers and wave RAM
assert( regs_size == sizeof io->regs );
if ( save )
memcpy( io->regs, regs, sizeof io->regs );
else
memcpy( regs, io->regs, sizeof regs );
// Frame sequencer
REFLECT( frame_time, frame_time );
REFLECT( frame_phase, frame_phase );
REFLECT( square1.sweep_freq, sweep_freq );
REFLECT( square1.sweep_delay, sweep_delay );
REFLECT( square1.sweep_enabled, sweep_enabled );
REFLECT( square1.sweep_neg, sweep_neg );
REFLECT( noise.divider, noise_divider );
REFLECT( wave.sample_buf, wave_buf );
return 0;
}
// second function to avoid inline limits of some compilers
inline void Gb_Apu::save_load2( gb_apu_state_t* io, bool save )
{
for ( int i = osc_count; --i >= 0; )
{
Gb_Osc& osc = *oscs [i];
REFLECT( osc.delay, delay [i] );
REFLECT( osc.length_ctr, length_ctr [i] );
REFLECT( osc.phase, phase [i] );
REFLECT( osc.enabled, enabled [i] );
if ( i != 2 )
{
int j = min( i, 2 );
Gb_Env& env = STATIC_CAST(Gb_Env&,osc);
REFLECT( env.env_delay, env_delay [j] );
REFLECT( env.volume, env_volume [j] );
REFLECT( env.env_enabled, env_enabled [j] );
}
}
}
void Gb_Apu::save_state( gb_apu_state_t* out )
{
(void) save_load( out, true );
save_load2( out, true );
#if !GB_APU_CUSTOM_STATE
memset( out->unused, 0, sizeof out->unused );
#endif
}
blargg_err_t Gb_Apu::load_state( gb_apu_state_t const& in )
{
RETURN_ERR( save_load( CONST_CAST(gb_apu_state_t*,&in), false ) );
save_load2( CONST_CAST(gb_apu_state_t*,&in), false );
apply_stereo();
synth_volume( 0 ); // suppress output for the moment
run_until_( last_time ); // get last_amp updated
apply_volume(); // now use correct volume
return 0;
}

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// Gb_Snd_Emu 0.2.0. http://www.slack.net/~ant/
#include "Gb_Apu.h"
/* Copyright (C) 2003-2007 Shay Green. This module is free software; you
can redistribute it and/or modify it under the terms of the GNU Lesser
General Public License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version. This
module is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more
details. You should have received a copy of the GNU Lesser General Public
License along with this module; if not, write to the Free Software Foundation,
Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
#include "blargg_source.h"
bool const cgb_02 = false; // enables bug in early CGB units that causes problems in some games
bool const cgb_05 = false; // enables CGB-05 zombie behavior
int const trigger_mask = 0x80;
int const length_enabled = 0x40;
void Gb_Osc::reset()
{
output = 0;
last_amp = 0;
delay = 0;
phase = 0;
enabled = false;
}
inline void Gb_Osc::update_amp( blip_time_t time, int new_amp )
{
output->set_modified();
int delta = new_amp - last_amp;
if ( delta )
{
last_amp = new_amp;
med_synth->offset( time, delta, output );
}
}
// Units
void Gb_Osc::clock_length()
{
if ( (regs [4] & length_enabled) && length_ctr )
{
if ( --length_ctr <= 0 )
enabled = false;
}
}
inline int Gb_Env::reload_env_timer()
{
int raw = regs [2] & 7;
env_delay = (raw ? raw : 8);
return raw;
}
void Gb_Env::clock_envelope()
{
if ( env_enabled && --env_delay <= 0 && reload_env_timer() )
{
int v = volume + (regs [2] & 0x08 ? +1 : -1);
if ( 0 <= v && v <= 15 )
volume = v;
else
env_enabled = false;
}
}
inline void Gb_Sweep_Square::reload_sweep_timer()
{
sweep_delay = (regs [0] & period_mask) >> 4;
if ( !sweep_delay )
sweep_delay = 8;
}
void Gb_Sweep_Square::calc_sweep( bool update )
{
int const shift = regs [0] & shift_mask;
int const delta = sweep_freq >> shift;
sweep_neg = (regs [0] & 0x08) != 0;
int const freq = sweep_freq + (sweep_neg ? -delta : delta);
if ( freq > 0x7FF )
{
enabled = false;
}
else if ( shift && update )
{
sweep_freq = freq;
regs [3] = freq & 0xFF;
regs [4] = (regs [4] & ~0x07) | (freq >> 8 & 0x07);
}
}
void Gb_Sweep_Square::clock_sweep()
{
if ( --sweep_delay <= 0 )
{
reload_sweep_timer();
if ( sweep_enabled && (regs [0] & period_mask) )
{
calc_sweep( true );
calc_sweep( false );
}
}
}
int Gb_Wave::access( unsigned addr ) const
{
if ( enabled )
{
addr = phase & (bank_size - 1);
if ( mode == Gb_Apu::mode_dmg )
{
addr++;
if ( delay > clk_mul )
return -1; // can only access within narrow time window while playing
}
addr >>= 1;
}
return addr & 0x0F;
}
// write_register
int Gb_Osc::write_trig( int frame_phase, int max_len, int old_data )
{
int data = regs [4];
if ( (frame_phase & 1) && !(old_data & length_enabled) && length_ctr )
{
if ( (data & length_enabled) || cgb_02 )
length_ctr--;
}
if ( data & trigger_mask )
{
enabled = true;
if ( !length_ctr )
{
length_ctr = max_len;
if ( (frame_phase & 1) && (data & length_enabled) )
length_ctr--;
}
}
if ( !length_ctr )
enabled = false;
return data & trigger_mask;
}
inline void Gb_Env::zombie_volume( int old, int data )
{
int v = volume;
if ( mode == Gb_Apu::mode_agb || cgb_05 )
{
// CGB-05 behavior, very close to AGB behavior as well
if ( (old ^ data) & 8 )
{
if ( !(old & 8) )
{
v++;
if ( old & 7 )
v++;
}
v = 16 - v;
}
else if ( (old & 0x0F) == 8 )
{
v++;
}
}
else
{
// CGB-04&02 behavior, very close to MGB behavior as well
if ( !(old & 7) && env_enabled )
v++;
else if ( !(old & 8) )
v += 2;
if ( (old ^ data) & 8 )
v = 16 - v;
}
volume = v & 0x0F;
}
bool Gb_Env::write_register( int frame_phase, int reg, int old, int data )
{
int const max_len = 64;
switch ( reg )
{
case 1:
length_ctr = max_len - (data & (max_len - 1));
break;
case 2:
if ( !dac_enabled() )
enabled = false;
zombie_volume( old, data );
if ( (data & 7) && env_delay == 8 )
{
env_delay = 1;
clock_envelope(); // TODO: really happens at next length clock
}
break;
case 4:
if ( write_trig( frame_phase, max_len, old ) )
{
volume = regs [2] >> 4;
reload_env_timer();
env_enabled = true;
if ( frame_phase == 7 )
env_delay++;
if ( !dac_enabled() )
enabled = false;
return true;
}
}
return false;
}
bool Gb_Square::write_register( int frame_phase, int reg, int old_data, int data )
{
bool result = Gb_Env::write_register( frame_phase, reg, old_data, data );
if ( result )
delay = (delay & (4 * clk_mul - 1)) + period();
return result;
}
inline void Gb_Noise::write_register( int frame_phase, int reg, int old_data, int data )
{
if ( Gb_Env::write_register( frame_phase, reg, old_data, data ) )
{
phase = 0x7FFF;
delay += 8 * clk_mul;
}
}
inline void Gb_Sweep_Square::write_register( int frame_phase, int reg, int old_data, int data )
{
if ( reg == 0 && sweep_enabled && sweep_neg && !(data & 0x08) )
enabled = false; // sweep negate disabled after used
if ( Gb_Square::write_register( frame_phase, reg, old_data, data ) )
{
sweep_freq = frequency();
sweep_neg = false;
reload_sweep_timer();
sweep_enabled = (regs [0] & (period_mask | shift_mask)) != 0;
if ( regs [0] & shift_mask )
calc_sweep( false );
}
}
void Gb_Wave::corrupt_wave()
{
int pos = ((phase + 1) & (bank_size - 1)) >> 1;
if ( pos < 4 )
wave_ram [0] = wave_ram [pos];
else
for ( int i = 4; --i >= 0; )
wave_ram [i] = wave_ram [(pos & ~3) + i];
}
inline void Gb_Wave::write_register( int frame_phase, int reg, int old_data, int data )
{
int const max_len = 256;
switch ( reg )
{
case 0:
if ( !dac_enabled() )
enabled = false;
break;
case 1:
length_ctr = max_len - data;
break;
case 4:
bool was_enabled = enabled;
if ( write_trig( frame_phase, max_len, old_data ) )
{
if ( !dac_enabled() )
enabled = false;
else if ( mode == Gb_Apu::mode_dmg && was_enabled &&
(unsigned) (delay - 2 * clk_mul) < 2 * clk_mul )
corrupt_wave();
phase = 0;
delay = period() + 6 * clk_mul;
}
}
}
void Gb_Apu::write_osc( int index, int reg, int old_data, int data )
{
reg -= index * 5;
switch ( index )
{
case 0: square1.write_register( frame_phase, reg, old_data, data ); break;
case 1: square2.write_register( frame_phase, reg, old_data, data ); break;
case 2: wave .write_register( frame_phase, reg, old_data, data ); break;
case 3: noise .write_register( frame_phase, reg, old_data, data ); break;
}
}
// Synthesis
void Gb_Square::run( blip_time_t time, blip_time_t end_time )
{
// Calc duty and phase
static byte const duty_offsets [4] = { 1, 1, 3, 7 };
static byte const duties [4] = { 1, 2, 4, 6 };
int const duty_code = regs [1] >> 6;
int duty_offset = duty_offsets [duty_code];
int duty = duties [duty_code];
if ( mode == Gb_Apu::mode_agb )
{
// AGB uses inverted duty
duty_offset -= duty;
duty = 8 - duty;
}
int ph = (this->phase + duty_offset) & 7;
// Determine what will be generated
int vol = 0;
Blip_Buffer* const out = this->output;
if ( out )
{
int amp = dac_off_amp;
if ( dac_enabled() )
{
if ( enabled )
vol = this->volume;
amp = -dac_bias;
if ( mode == Gb_Apu::mode_agb )
amp = -(vol >> 1);
// Play inaudible frequencies as constant amplitude
if ( frequency() >= 0x7FA && delay < 32 * clk_mul )
{
amp += (vol * duty) >> 3;
vol = 0;
}
if ( ph < duty )
{
amp += vol;
vol = -vol;
}
}
update_amp( time, amp );
}
// Generate wave
time += delay;
if ( time < end_time )
{
int const per = this->period();
if ( !vol )
{
// Maintain phase when not playing
int count = (end_time - time + per - 1) / per;
ph += count; // will be masked below
time += (blip_time_t) count * per;
}
else
{
// Output amplitude transitions
int delta = vol;
do
{
ph = (ph + 1) & 7;
if ( ph == 0 || ph == duty )
{
good_synth->offset_inline( time, delta, out );
delta = -delta;
}
time += per;
}
while ( time < end_time );
if ( delta != vol )
last_amp -= delta;
}
this->phase = (ph - duty_offset) & 7;
}
delay = time - end_time;
}
// Quickly runs LFSR for a large number of clocks. For use when noise is generating
// no sound.
static unsigned run_lfsr( unsigned s, unsigned mask, int count )
{
bool const optimized = true; // set to false to use only unoptimized loop in middle
// optimization used in several places:
// ((s & (1 << b)) << n) ^ ((s & (1 << b)) << (n + 1)) = (s & (1 << b)) * (3 << n)
if ( mask == 0x4000 && optimized )
{
if ( count >= 32767 )
count %= 32767;
// Convert from Fibonacci to Galois configuration,
// shifted left 1 bit
s ^= (s & 1) * 0x8000;
// Each iteration is equivalent to clocking LFSR 255 times
while ( (count -= 255) > 0 )
s ^= ((s & 0xE) << 12) ^ ((s & 0xE) << 11) ^ (s >> 3);
count += 255;
// Each iteration is equivalent to clocking LFSR 15 times
// (interesting similarity to single clocking below)
while ( (count -= 15) > 0 )
s ^= ((s & 2) * (3 << 13)) ^ (s >> 1);
count += 15;
// Remaining singles
while ( --count >= 0 )
s = ((s & 2) * (3 << 13)) ^ (s >> 1);
// Convert back to Fibonacci configuration
s &= 0x7FFF;
}
else if ( count < 8 || !optimized )
{
// won't fully replace upper 8 bits, so have to do the unoptimized way
while ( --count >= 0 )
s = (s >> 1 | mask) ^ (mask & -((s - 1) & 2));
}
else
{
if ( count > 127 )
{
count %= 127;
if ( !count )
count = 127; // must run at least once
}
// Need to keep one extra bit of history
s = s << 1 & 0xFF;
// Convert from Fibonacci to Galois configuration,
// shifted left 2 bits
s ^= (s & 2) * 0x80;
// Each iteration is equivalent to clocking LFSR 7 times
// (interesting similarity to single clocking below)
while ( (count -= 7) > 0 )
s ^= ((s & 4) * (3 << 5)) ^ (s >> 1);
count += 7;
// Remaining singles
while ( --count >= 0 )
s = ((s & 4) * (3 << 5)) ^ (s >> 1);
// Convert back to Fibonacci configuration and
// repeat last 8 bits above significant 7
s = (s << 7 & 0x7F80) | (s >> 1 & 0x7F);
}
return s;
}
void Gb_Noise::run( blip_time_t time, blip_time_t end_time )
{
// Determine what will be generated
int vol = 0;
Blip_Buffer* const out = this->output;
if ( out )
{
int amp = dac_off_amp;
if ( dac_enabled() )
{
if ( enabled )
vol = this->volume;
amp = -dac_bias;
if ( mode == Gb_Apu::mode_agb )
amp = -(vol >> 1);
if ( !(phase & 1) )
{
amp += vol;
vol = -vol;
}
}
// AGB negates final output
if ( mode == Gb_Apu::mode_agb )
{
vol = -vol;
amp = -amp;
}
update_amp( time, amp );
}
// Run timer and calculate time of next LFSR clock
static byte const period1s [8] = { 1, 2, 4, 6, 8, 10, 12, 14 };
int const period1 = period1s [regs [3] & 7] * clk_mul;
{
int extra = (end_time - time) - delay;
int const per2 = this->period2();
time += delay + ((divider ^ (per2 >> 1)) & (per2 - 1)) * period1;
int count = (extra < 0 ? 0 : (extra + period1 - 1) / period1);
divider = (divider - count) & period2_mask;
delay = count * period1 - extra;
}
// Generate wave
if ( time < end_time )
{
unsigned const mask = this->lfsr_mask();
unsigned bits = this->phase;
int per = period2( period1 * 8 );
if ( period2_index() >= 0xE )
{
time = end_time;
}
else if ( !vol )
{
// Maintain phase when not playing
int count = (end_time - time + per - 1) / per;
time += (blip_time_t) count * per;
bits = run_lfsr( bits, ~mask, count );
}
else
{
// Output amplitude transitions
int delta = -vol;
do
{
unsigned changed = bits + 1;
bits = bits >> 1 & mask;
if ( changed & 2 )
{
bits |= ~mask;
delta = -delta;
med_synth->offset_inline( time, delta, out );
}
time += per;
}
while ( time < end_time );
if ( delta == vol )
last_amp += delta;
}
this->phase = bits;
}
}
void Gb_Wave::run( blip_time_t time, blip_time_t end_time )
{
// Calc volume
static byte const volumes [8] = { 0, 4, 2, 1, 3, 3, 3, 3 };
int const volume_shift = 2;
int const volume_idx = regs [2] >> 5 & (agb_mask | 3); // 2 bits on DMG/CGB, 3 on AGB
int const volume_mul = volumes [volume_idx];
// Determine what will be generated
int playing = false;
Blip_Buffer* const out = this->output;
if ( out )
{
int amp = dac_off_amp;
if ( dac_enabled() )
{
// Play inaudible frequencies as constant amplitude
amp = 8 << 4; // really depends on average of all samples in wave
// if delay is larger, constant amplitude won't start yet
if ( frequency() <= 0x7FB || delay > 15 * clk_mul )
{
if ( volume_mul )
playing = (int) enabled;
amp = (sample_buf << (phase << 2 & 4) & 0xF0) * playing;
}
amp = ((amp * volume_mul) >> (volume_shift + 4)) - dac_bias;
}
update_amp( time, amp );
}
// Generate wave
time += delay;
if ( time < end_time )
{
byte const* wave = this->wave_ram;
// wave size and bank
int const size20_mask = 0x20;
int const flags = regs [0] & agb_mask;
int const wave_mask = (flags & size20_mask) | 0x1F;
int swap_banks = 0;
if ( flags & bank40_mask )
{
swap_banks = flags & size20_mask;
wave += bank_size/2 - (swap_banks >> 1);
}
int ph = this->phase ^ swap_banks;
ph = (ph + 1) & wave_mask; // pre-advance
int const per = this->period();
if ( !playing )
{
// Maintain phase when not playing
int count = (end_time - time + per - 1) / per;
ph += count; // will be masked below
time += (blip_time_t) count * per;
}
else
{
// Output amplitude transitions
int lamp = this->last_amp + dac_bias;
do
{
// Extract nybble
int nybble = wave [ph >> 1] << (ph << 2 & 4) & 0xF0;
ph = (ph + 1) & wave_mask;
// Scale by volume
int amp = (nybble * volume_mul) >> (volume_shift + 4);
int delta = amp - lamp;
if ( delta )
{
lamp = amp;
med_synth->offset_inline( time, delta, out );
}
time += per;
}
while ( time < end_time );
this->last_amp = lamp - dac_bias;
}
ph = (ph - 1) & wave_mask; // undo pre-advance and mask position
// Keep track of last byte read
if ( enabled )
sample_buf = wave [ph >> 1];
this->phase = ph ^ swap_banks; // undo swapped banks
}
delay = time - end_time;
}

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// Private oscillators used by Gb_Apu
// Gb_Snd_Emu 0.2.0
#ifndef GB_OSCS_H
#define GB_OSCS_H
#include "blargg_common.h"
#include "Blip_Buffer.h"
#ifndef GB_APU_OVERCLOCK
#define GB_APU_OVERCLOCK 1
#endif
#if GB_APU_OVERCLOCK & (GB_APU_OVERCLOCK - 1)
#error "GB_APU_OVERCLOCK must be a power of 2"
#endif
class Gb_Osc {
protected:
// 11-bit frequency in NRx3 and NRx4
int frequency() const { return (regs [4] & 7) * 0x100 + regs [3]; }
void update_amp( blip_time_t, int new_amp );
int write_trig( int frame_phase, int max_len, int old_data );
public:
enum { clk_mul = GB_APU_OVERCLOCK };
enum { dac_bias = 7 };
Blip_Buffer* outputs [4];// NULL, right, left, center
Blip_Buffer* output; // where to output sound
BOOST::uint8_t* regs; // osc's 5 registers
int mode; // mode_dmg, mode_cgb, mode_agb
int dac_off_amp;// amplitude when DAC is off
int last_amp; // current amplitude in Blip_Buffer
typedef Blip_Synth<blip_good_quality,1> Good_Synth;
typedef Blip_Synth<blip_med_quality ,1> Med_Synth;
Good_Synth const* good_synth;
Med_Synth const* med_synth;
int delay; // clocks until frequency timer expires
int length_ctr; // length counter
unsigned phase; // waveform phase (or equivalent)
bool enabled; // internal enabled flag
void clock_length();
void reset();
};
class Gb_Env : public Gb_Osc {
public:
int env_delay;
int volume;
bool env_enabled;
void clock_envelope();
bool write_register( int frame_phase, int reg, int old_data, int data );
void reset()
{
env_delay = 0;
volume = 0;
Gb_Osc::reset();
}
protected:
// Non-zero if DAC is enabled
int dac_enabled() const { return regs [2] & 0xF8; }
private:
void zombie_volume( int old, int data );
int reload_env_timer();
};
class Gb_Square : public Gb_Env {
public:
bool write_register( int frame_phase, int reg, int old_data, int data );
void run( blip_time_t, blip_time_t );
void reset()
{
Gb_Env::reset();
delay = 0x40000000; // TODO: something less hacky (never clocked until first trigger)
}
private:
// Frequency timer period
int period() const { return (2048 - frequency()) * (4 * clk_mul); }
};
class Gb_Sweep_Square : public Gb_Square {
public:
int sweep_freq;
int sweep_delay;
bool sweep_enabled;
bool sweep_neg;
void clock_sweep();
void write_register( int frame_phase, int reg, int old_data, int data );
void reset()
{
sweep_freq = 0;
sweep_delay = 0;
sweep_enabled = false;
sweep_neg = false;
Gb_Square::reset();
}
private:
enum { period_mask = 0x70 };
enum { shift_mask = 0x07 };
void calc_sweep( bool update );
void reload_sweep_timer();
};
class Gb_Noise : public Gb_Env {
public:
int divider; // noise has more complex frequency divider setup
void run( blip_time_t, blip_time_t );
void write_register( int frame_phase, int reg, int old_data, int data );
void reset()
{
divider = 0;
Gb_Env::reset();
delay = 4 * clk_mul; // TODO: remove?
}
private:
enum { period2_mask = 0x1FFFF };
int period2_index() const { return regs [3] >> 4; }
int period2( int base = 8 ) const { return base << period2_index(); }
unsigned lfsr_mask() const { return (regs [3] & 0x08) ? ~0x4040 : ~0x4000; }
};
class Gb_Wave : public Gb_Osc {
public:
int sample_buf; // last wave RAM byte read (hardware has this as well)
void write_register( int frame_phase, int reg, int old_data, int data );
void run( blip_time_t, blip_time_t );
// Reads/writes wave RAM
int read( unsigned addr ) const;
void write( unsigned addr, int data );
void reset()
{
sample_buf = 0;
Gb_Osc::reset();
}
private:
enum { bank40_mask = 0x40 };
enum { bank_size = 32 };
int agb_mask; // 0xFF if AGB features enabled, 0 otherwise
BOOST::uint8_t* wave_ram; // 32 bytes (64 nybbles), stored in APU
friend class Gb_Apu;
// Frequency timer period
int period() const { return (2048 - frequency()) * (2 * clk_mul); }
// Non-zero if DAC is enabled
int dac_enabled() const { return regs [0] & 0x80; }
void corrupt_wave();
BOOST::uint8_t* wave_bank() const { return &wave_ram [(~regs [0] & bank40_mask) >> 2 & agb_mask]; }
// Wave index that would be accessed, or -1 if no access would occur
int access( unsigned addr ) const;
};
inline int Gb_Wave::read( unsigned addr ) const
{
int index = access( addr );
return (index < 0 ? 0xFF : wave_bank() [index]);
}
inline void Gb_Wave::write( unsigned addr, int data )
{
int index = access( addr );
if ( index >= 0 )
wave_bank() [index] = data;;
}
#endif

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@ -1,206 +0,0 @@
// Sets up common environment for Shay Green's libraries.
// To change configuration options, modify blargg_config.h, not this file.
// Gb_Snd_Emu 0.2.0
#ifndef BLARGG_COMMON_H
#define BLARGG_COMMON_H
#include <stddef.h>
#include <stdlib.h>
#include <assert.h>
#include <limits.h>
#undef BLARGG_COMMON_H
// allow blargg_config.h to #include blargg_common.h
#include "blargg_config.h"
#ifndef BLARGG_COMMON_H
#define BLARGG_COMMON_H
// BLARGG_RESTRICT: equivalent to restrict, where supported
#if __GNUC__ >= 3 || _MSC_VER >= 1100
#define BLARGG_RESTRICT __restrict
#else
#define BLARGG_RESTRICT
#endif
// STATIC_CAST(T,expr): Used in place of static_cast<T> (expr)
// CONST_CAST( T,expr): Used in place of const_cast<T> (expr)
#ifndef STATIC_CAST
#if __GNUC__ >= 4
#define STATIC_CAST(T,expr) static_cast<T> (expr)
#define CONST_CAST( T,expr) const_cast<T> (expr)
#else
#define STATIC_CAST(T,expr) ((T) (expr))
#define CONST_CAST( T,expr) ((T) (expr))
#endif
#endif
// blargg_err_t (0 on success, otherwise error string)
#ifndef blargg_err_t
typedef const char* blargg_err_t;
#endif
// blargg_vector - very lightweight vector of POD types (no constructor/destructor)
template<class T>
class blargg_vector {
T* begin_;
size_t size_;
public:
blargg_vector() : begin_( 0 ), size_( 0 ) { }
~blargg_vector() { free( begin_ ); }
size_t size() const { return size_; }
T* begin() const { return begin_; }
T* end() const { return begin_ + size_; }
blargg_err_t resize( size_t n )
{
// TODO: blargg_common.cpp to hold this as an outline function, ugh
void* p = realloc( begin_, n * sizeof (T) );
if ( p )
begin_ = (T*) p;
else if ( n > size_ ) // realloc failure only a problem if expanding
return "Out of memory";
size_ = n;
return 0;
}
void clear() { void* p = begin_; begin_ = 0; size_ = 0; free( p ); }
T& operator [] ( size_t n ) const
{
assert( n <= size_ ); // <= to allow past-the-end value
return begin_ [n];
}
};
#ifndef BLARGG_DISABLE_NOTHROW
// throw spec mandatory in ISO C++ if operator new can return NULL
#if __cplusplus >= 199711 || __GNUC__ >= 3
#define BLARGG_THROWS( spec ) throw spec
#else
#define BLARGG_THROWS( spec )
#endif
#define BLARGG_DISABLE_NOTHROW \
void* operator new ( size_t s ) BLARGG_THROWS(()) { return malloc( s ); }\
void operator delete ( void* p ) { free( p ); }
#define BLARGG_NEW new
#else
#include <new>
#define BLARGG_NEW new (std::nothrow)
#endif
// BLARGG_4CHAR('a','b','c','d') = 'abcd' (four character integer constant)
#define BLARGG_4CHAR( a, b, c, d ) \
((a&0xFF)*0x1000000 + (b&0xFF)*0x10000 + (c&0xFF)*0x100 + (d&0xFF))
// BOOST_STATIC_ASSERT( expr ): Generates compile error if expr is 0.
#ifndef BOOST_STATIC_ASSERT
#ifdef _MSC_VER
// MSVC6 (_MSC_VER < 1300) fails for use of __LINE__ when /Zl is specified
#define BOOST_STATIC_ASSERT( expr ) \
void blargg_failed_( int (*arg) [2 / (int) !!(expr) - 1] )
#else
// Some other compilers fail when declaring same function multiple times in class,
// so differentiate them by line
#define BOOST_STATIC_ASSERT( expr ) \
void blargg_failed_( int (*arg) [2 / !!(expr) - 1] [__LINE__] )
#endif
#endif
// BLARGG_COMPILER_HAS_BOOL: If 0, provides bool support for old compiler. If 1,
// compiler is assumed to support bool. If undefined, availability is determined.
#ifndef BLARGG_COMPILER_HAS_BOOL
#if defined (__MWERKS__)
#if !__option(bool)
#define BLARGG_COMPILER_HAS_BOOL 0
#endif
#elif defined (_MSC_VER)
#if _MSC_VER < 1100
#define BLARGG_COMPILER_HAS_BOOL 0
#endif
#elif defined (__GNUC__)
// supports bool
#elif __cplusplus < 199711
#define BLARGG_COMPILER_HAS_BOOL 0
#endif
#endif
#if defined (BLARGG_COMPILER_HAS_BOOL) && !BLARGG_COMPILER_HAS_BOOL
// If you get errors here, modify your blargg_config.h file
typedef int bool;
const bool true = 1;
const bool false = 0;
#endif
// blargg_long/blargg_ulong = at least 32 bits, int if it's big enough
#if INT_MAX < 0x7FFFFFFF || LONG_MAX == 0x7FFFFFFF
typedef long blargg_long;
#else
typedef int blargg_long;
#endif
#if UINT_MAX < 0xFFFFFFFF || ULONG_MAX == 0xFFFFFFFF
typedef unsigned long blargg_ulong;
#else
typedef unsigned blargg_ulong;
#endif
// BOOST::int8_t etc.
// HAVE_STDINT_H: If defined, use <stdint.h> for int8_t etc.
#if defined (HAVE_STDINT_H)
#include <stdint.h>
#define BOOST
// HAVE_INTTYPES_H: If defined, use <stdint.h> for int8_t etc.
#elif defined (HAVE_INTTYPES_H)
#include <inttypes.h>
#define BOOST
#else
struct BOOST
{
#if UCHAR_MAX == 0xFF && SCHAR_MAX == 0x7F
typedef signed char int8_t;
typedef unsigned char uint8_t;
#else
// No suitable 8-bit type available
typedef struct see_blargg_common_h int8_t;
typedef struct see_blargg_common_h uint8_t;
#endif
#if USHRT_MAX == 0xFFFF
typedef short int16_t;
typedef unsigned short uint16_t;
#else
// No suitable 16-bit type available
typedef struct see_blargg_common_h int16_t;
typedef struct see_blargg_common_h uint16_t;
#endif
#if ULONG_MAX == 0xFFFFFFFF
typedef long int32_t;
typedef unsigned long uint32_t;
#elif UINT_MAX == 0xFFFFFFFF
typedef int int32_t;
typedef unsigned int uint32_t;
#else
// No suitable 32-bit type available
typedef struct see_blargg_common_h int32_t;
typedef struct see_blargg_common_h uint32_t;
#endif
};
#endif
#if __GNUC__ >= 3
#define BLARGG_DEPRECATED __attribute__ ((deprecated))
#else
#define BLARGG_DEPRECATED
#endif
// Use in place of "= 0;" for a pure virtual, since these cause calls to std C++ lib.
// During development, BLARGG_PURE( x ) expands to = 0;
// virtual int func() BLARGG_PURE( { return 0; } )
#ifndef BLARGG_PURE
#define BLARGG_PURE( def ) def
#endif
#endif
#endif

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@ -1,31 +0,0 @@
// $package user configuration file. Don't replace when updating library.
#ifndef BLARGG_CONFIG_H
#define BLARGG_CONFIG_H
// Uncomment to have Gb_Apu run at 4x normal clock rate (16777216 Hz), useful in
// a Game Boy Advance emulator.
#define GB_APU_OVERCLOCK 4
// Uncomment to enable platform-specific (and possibly non-portable) optimizations.
//#define BLARGG_NONPORTABLE 1
// Uncomment if automatic byte-order determination doesn't work
//#define BLARGG_BIG_ENDIAN 1
// Uncomment to use zlib for transparent decompression of gzipped files
//#define HAVE_ZLIB_H
// Uncomment if you get errors in the bool section of blargg_common.h
//#define BLARGG_COMPILER_HAS_BOOL 1
// Uncomment to disable out-of-memory exceptions
//#include <memory>
//#define BLARGG_NEW new (std::nothrow)
// Use standard config.h if present
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#endif

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/* Included at the beginning of library source files, AFTER all other #include lines.
Sets up helpful macros and services used in my source code. Since this is only "active"
in my source code, I don't have to worry about polluting the global namespace with
unprefixed names. */
// Gb_Snd_Emu 0.2.0
#ifndef BLARGG_SOURCE_H
#define BLARGG_SOURCE_H
// The following four macros are for debugging only. Some or all might be defined
// to do nothing, depending on the circumstances. Described is what happens when
// a particular macro is defined to do something. When defined to do nothing, the
// macros do NOT evaluate their argument(s).
// If expr is false, prints file and line number, then aborts program. Meant for
// checking internal state and consistency. A failed assertion indicates a bug
// in MY code.
//
// void assert( bool expr );
#include <assert.h>
// If expr is false, prints file and line number, then aborts program. Meant for
// checking caller-supplied parameters and operations that are outside the control
// of the module. A failed requirement probably indicates a bug in YOUR code.
//
// void require( bool expr );
#undef require
#define require( expr ) assert( expr )
// Like printf() except output goes to debugging console/file.
//
// void dprintf( const char* format, ... );
static inline void blargg_dprintf_( const char*, ... ) { }
#undef dprintf
#define dprintf (1) ? (void) 0 : blargg_dprintf_
// If expr is false, prints file and line number to debug console/log, then
// continues execution normally. Meant for flagging potential problems or things
// that should be looked into, but that aren't serious problems.
//
// void check( bool expr );
#undef check
#define check( expr ) ((void) 0)
// If expr yields non-NULL error string, returns it from current function,
// otherwise continues normally.
#undef RETURN_ERR
#define RETURN_ERR( expr ) do { \
blargg_err_t blargg_return_err_ = (expr); \
if ( blargg_return_err_ ) return blargg_return_err_; \
} while ( 0 )
// If ptr is NULL, returns "Out of memory" error string, otherwise continues normally.
#undef CHECK_ALLOC
#define CHECK_ALLOC( ptr ) do { if ( (ptr) == 0 ) return "Out of memory"; } while ( 0 )
// The usual min/max functions for built-in types.
//
// template<typename T> T min( T x, T y ) { return x < y ? x : y; }
// template<typename T> T max( T x, T y ) { return x > y ? x : y; }
#define BLARGG_DEF_MIN_MAX( type ) \
static inline type blargg_min( type x, type y ) { if ( y < x ) x = y; return x; }\
static inline type blargg_max( type x, type y ) { if ( x < y ) x = y; return x; }
BLARGG_DEF_MIN_MAX( int )
BLARGG_DEF_MIN_MAX( unsigned )
BLARGG_DEF_MIN_MAX( long )
BLARGG_DEF_MIN_MAX( unsigned long )
BLARGG_DEF_MIN_MAX( float )
BLARGG_DEF_MIN_MAX( double )
#undef min
#define min blargg_min
#undef max
#define max blargg_max
// typedef unsigned char byte;
typedef unsigned char blargg_byte;
#undef byte
#define byte blargg_byte
// deprecated
#define BLARGG_CHECK_ALLOC CHECK_ALLOC
#define BLARGG_RETURN_ERR RETURN_ERR
// BLARGG_SOURCE_BEGIN: If defined, #included, allowing redefition of dprintf and check
#ifdef BLARGG_SOURCE_BEGIN
#include BLARGG_SOURCE_BEGIN
#endif
#endif

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/* Mednafen - Multi-system Emulator
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "mednafen/mednafen.h"
#include "pce_psg.h"
#include <math.h>
#include <string.h>
#include <trio/trio.h>
void PCE_PSG::SetVolume(double new_volume)
{
OutputVolume = new_volume;
Synth.volume(OutputVolume / 6);
}
// Note: Changing the 0x1F(not that there should be) would require changing the channel pseudo-off volume check logic later on.
static const int scale_tab[] =
{
0x00, 0x03, 0x05, 0x07, 0x09, 0x0B, 0x0D, 0x0F,
0x10, 0x13, 0x15, 0x17, 0x19, 0x1B, 0x1D, 0x1F
};
#define CLOCK_LFSR(lfsr) { unsigned int newbit = ((lfsr >> 0) ^ (lfsr >> 1) ^ (lfsr >> 11) ^ (lfsr >> 12) ^ (lfsr >> 17)) & 1; lfsr = (lfsr >> 1) | (newbit << 17); }
void PCE_PSG::UpdateOutput_Norm(const int32 timestamp, psg_channel *ch)
{
int32 samp[2];
int sv = ch->dda;
samp[0] = dbtable[ch->vl[0]][sv];
samp[1] = dbtable[ch->vl[1]][sv];
Synth.offset(timestamp, samp[0] - ch->blip_prev_samp[0], sbuf[0]);
Synth.offset(timestamp, samp[1] - ch->blip_prev_samp[1], sbuf[1]);
ch->blip_prev_samp[0] = samp[0];
ch->blip_prev_samp[1] = samp[1];
}
void PCE_PSG::UpdateOutput_Noise(const int32 timestamp, psg_channel *ch)
{
int32 samp[2];
int sv = ((ch->lfsr & 1) << 5) - (ch->lfsr & 1); //(ch->lfsr & 0x1) ? 0x1F : 0;
samp[0] = dbtable[ch->vl[0]][sv];
samp[1] = dbtable[ch->vl[1]][sv];
Synth.offset(timestamp, samp[0] - ch->blip_prev_samp[0], sbuf[0]);
Synth.offset(timestamp, samp[1] - ch->blip_prev_samp[1], sbuf[1]);
ch->blip_prev_samp[0] = samp[0];
ch->blip_prev_samp[1] = samp[1];
}
void PCE_PSG::UpdateOutput_Off(const int32 timestamp, psg_channel *ch)
{
int32 samp[2];
samp[0] = samp[1] = 0;
Synth.offset_inline(timestamp, samp[0] - ch->blip_prev_samp[0], sbuf[0]);
Synth.offset_inline(timestamp, samp[1] - ch->blip_prev_samp[1], sbuf[1]);
ch->blip_prev_samp[0] = samp[0];
ch->blip_prev_samp[1] = samp[1];
}
void PCE_PSG::UpdateOutput_Accum(const int32 timestamp, psg_channel *ch)
{
int32 samp[2];
samp[0] = ((int32)dbtable_volonly[ch->vl[0]] * ((int32)ch->samp_accum - 496)) >> (8 + 5);
samp[1] = ((int32)dbtable_volonly[ch->vl[1]] * ((int32)ch->samp_accum - 496)) >> (8 + 5);
Synth.offset_inline(timestamp, samp[0] - ch->blip_prev_samp[0], sbuf[0]);
Synth.offset_inline(timestamp, samp[1] - ch->blip_prev_samp[1], sbuf[1]);
ch->blip_prev_samp[0] = samp[0];
ch->blip_prev_samp[1] = samp[1];
}
// This function should always be called after RecalcFreqCache() (it's not called from RecalcFreqCache to avoid redundant code)
void PCE_PSG::RecalcUOFunc(int chnum)
{
psg_channel *ch = &channel[chnum];
//printf("UO Update: %d, %02x\n", chnum, ch->control);
if((revision != REVISION_HUC6280 && !(ch->control & 0xC0)) || (revision == REVISION_HUC6280 && !(ch->control & 0x80)))
ch->UpdateOutput = &PCE_PSG::UpdateOutput_Off;
else if(ch->noisectrl & ch->control & 0x80)
ch->UpdateOutput = &PCE_PSG::UpdateOutput_Noise;
// If the control for the channel is in waveform play mode, and the (real) playback frequency is too high, and the channel is either not the LFO modulator channel or
// if the LFO trigger bit(which halts the LFO modulator channel's waveform incrementing when set) is clear
else if((ch->control & 0xC0) == 0x80 && ch->freq_cache <= 0xA && (chnum != 1 || !(lfoctrl & 0x80)) )
ch->UpdateOutput = &PCE_PSG::UpdateOutput_Accum;
else
ch->UpdateOutput = &PCE_PSG::UpdateOutput_Norm;
}
void PCE_PSG::RecalcFreqCache(int chnum)
{
psg_channel *ch = &channel[chnum];
if(chnum == 0 && (lfoctrl & 0x03))
{
const uint32 shift = (((lfoctrl & 0x3) - 1) << 1);
uint8 la = channel[1].dda;
int32 tmp_freq = ((int32)ch->frequency + ((la - 0x10) << shift)) & 0xFFF;
ch->freq_cache = (tmp_freq ? tmp_freq : 4096) << 1;
}
else
{
ch->freq_cache = (ch->frequency ? ch->frequency : 4096) << 1;
if(chnum == 1 && (lfoctrl & 0x03))
ch->freq_cache *= lfofreq ? lfofreq : 256;
}
}
void PCE_PSG::RecalcNoiseFreqCache(int chnum)
{
psg_channel *ch = &channel[chnum];
int32 freq = 0x1F - (ch->noisectrl & 0x1F);
if(!freq)
freq = 0x20;
else
freq <<= 6;
freq <<= 1;
ch->noise_freq_cache = freq;
}
void PCE_PSG::PeekWave(const unsigned int ch, uint32 Address, uint32 Length, uint8 *Buffer)
{
assert(ch <= 5);
while(Length--)
{
Address &= 0x1F;
*Buffer = channel[ch].waveform[Address];
Address++;
Buffer++;
}
}
void PCE_PSG::PokeWave(const unsigned int ch, uint32 Address, uint32 Length, const uint8 *Buffer)
{
assert(ch <= 5);
while(Length--)
{
Address &= 0x1F;
channel[ch].samp_accum -= channel[ch].waveform[Address];
channel[ch].waveform[Address] = *Buffer & 0x1F;
channel[ch].samp_accum += channel[ch].waveform[Address];
Address++;
Buffer++;
}
}
uint32 PCE_PSG::GetRegister(const unsigned int id, char *special, const uint32 special_len)
{
uint32 value = 0xDEADBEEF;
const int ch = (id >> 8) & 0xF;
switch(id & 0xF0FF)
{
default: break;
case PSG_GSREG_SELECT:
value = select;
break;
case PSG_GSREG_GBALANCE:
value = globalbalance;
break;
case PSG_GSREG_LFOFREQ:
value = lfofreq;
break;
case PSG_GSREG_LFOCTRL:
value = lfoctrl;
break;
case PSG_GSREG_CH0_FREQ:
value = channel[ch].frequency;
break;
case PSG_GSREG_CH0_CTRL:
value = channel[ch].control;
break;
case PSG_GSREG_CH0_BALANCE:
value = channel[ch].balance;
break;
case PSG_GSREG_CH0_WINDEX:
value = channel[ch].waveform_index;
break;
case PSG_GSREG_CH0_SCACHE:
value = channel[ch].dda;
break;
case PSG_GSREG_CH0_NCTRL:
value = channel[ch].noisectrl;
break;
case PSG_GSREG_CH0_LFSR:
value = channel[ch].lfsr & 0x7FFF;
break;
}
return(value);
}
void PCE_PSG::SetRegister(const unsigned int id, const uint32 value)
{
const int ch = (id >> 8) & 0xF;
switch(id & 0xF0FF)
{
default: break;
case PSG_GSREG_SELECT:
select = value & 0x07;
break;
case PSG_GSREG_GBALANCE:
globalbalance = value & 0xFF;
break;
case PSG_GSREG_LFOFREQ:
lfofreq = value & 0xFF;
break;
case PSG_GSREG_LFOCTRL:
lfoctrl = value & 0x83;
RecalcFreqCache(0);
RecalcUOFunc(0);
RecalcFreqCache(1);
RecalcUOFunc(1);
break;
case PSG_GSREG_CH0_FREQ:
channel[ch].frequency = value & 0xFFF;
RecalcFreqCache(ch);
RecalcUOFunc(ch);
break;
case PSG_GSREG_CH0_CTRL:
channel[ch].control = value & 0xFF;
RecalcFreqCache(ch);
RecalcUOFunc(ch);
break;
case PSG_GSREG_CH0_BALANCE:
channel[ch].balance = value & 0xFF;
break;
case PSG_GSREG_CH0_WINDEX:
channel[ch].waveform_index = value & 0x1F;
break;
case PSG_GSREG_CH0_SCACHE:
channel[ch].dda = value & 0x1F;
break;
case PSG_GSREG_CH0_NCTRL:
channel[ch].noisectrl = value & 0xFF;
RecalcNoiseFreqCache(ch);
RecalcUOFunc(ch);
break;
case PSG_GSREG_CH0_LFSR:
channel[ch].lfsr = value & 0x7FFF;
break;
}
}
#if 0
void PSG_SetRegister(const unsigned int id, const uint32 value)
{
if(name == "Select")
PSG_Write(0x00, V);
else if(name == "GBalance")
PSG_Write(0x01, V);
else if(name == "LFOFreq")
{
PSG_Write(0x08, V);
}
else if(name == "LFOCtrl")
PSG_Write(0x09, V);
else if(!strncmp(name.c_str(), "CH", 2))
{
unsigned int psg_sel_save = select;
int ch = name[2] - '0';
char moomoo[64];
strncpy(moomoo, name.c_str() + 3, 63);
PSG_Write(0x00, ch);
if(!strcmp(moomoo, "Freq"))
{
PSG_Write(0x02, V);
PSG_Write(0x03, V >> 8);
}
else if(!strcmp(moomoo, "Ctrl"))
PSG_Write(0x04, V);
else if(!strcmp(moomoo, "Balance"))
PSG_Write(0x05, V);
else if(!strcmp(moomoo, "WIndex"))
psg.channel[ch].waveform_index = V & 0x1F;
else if(!strcmp(moomoo, "SCache"))
psg.channel[ch].dda = V & 0x1F;
else if(!strcmp(moomoo, "NCtrl") && ch < 4)
psg.channel[ch].noisectrl = V;
else if(!strcmp(moomoo, "LFSR") && ch < 4)
psg.channel[ch].lfsr = V & 0x3FFFF;
PSG_Write(0x00, psg_sel_save);
}
}
#endif
PCE_PSG::PCE_PSG(Blip_Buffer *bb_l, Blip_Buffer *bb_r, int want_revision)
{
revision = want_revision;
sbuf[0] = bb_l;
sbuf[1] = bb_r;
SoundEnabled = (sbuf[0] && sbuf[1]);
lastts = 0;
for(int ch = 0; ch < 6; ch++)
{
channel[ch].blip_prev_samp[0] = 0;
channel[ch].blip_prev_samp[1] = 0;
channel[ch].lastts = 0;
}
SetVolume(1.0);
for(int vl = 0; vl < 32; vl++)
{
double flub = 1;
if(vl)
flub /= pow(2, (double)1 / 4 * vl); // ~1.5dB reduction per increment of vl
if(vl == 0x1F)
flub = 0;
for(int samp = 0; samp < 32; samp++)
{
int eff_samp;
if(revision == REVISION_HUC6280)
eff_samp = samp * 2;
else
eff_samp = samp * 2 - 0x1F;
dbtable[vl][samp] = (int32)(flub * eff_samp * 128);
dbtable_volonly[vl] = (int32)(flub * 65536);
}
}
Power(0);
}
PCE_PSG::~PCE_PSG()
{
}
int32 PCE_PSG::GetVL(const int chnum, const int lr)
{
psg_channel *ch = &channel[chnum];
const int gbal = 0x1F - scale_tab[(globalbalance >> (lr ? 0 : 4)) & 0xF];
const int bal = 0x1F - scale_tab[(ch->balance >> (lr ? 0 : 4)) & 0xF];
const int al = 0x1F - (ch->control & 0x1F);
int vol_reduction;
vol_reduction = gbal + bal + al;
if(vol_reduction > 0x1F)
vol_reduction = 0x1F;
return(vol_reduction);
}
void PCE_PSG::Write(int32 timestamp, uint8 A, uint8 V)
{
A &= 0x0F;
if(A == 0x00)
{
select = (V & 0x07);
return;
}
Update(timestamp);
psg_channel *ch = &channel[select];
//if(A == 0x01 || select == 5)
// printf("Write Ch: %d %04x %02x, %d\n", select, A, V, timestamp);
switch(A)
{
default: break;
case 0x01: /* Global sound balance */
globalbalance = V;
if(REVISION_ENHANCED == revision)
{
for(int cht = 0; cht < 6; cht++)
for(int lr = 0; lr < 2; lr++)
channel[cht].vl[lr] = GetVL(cht, lr);
}
else
vol_pending = true;
break;
case 0x02: /* Channel frequency (LSB) */
if(select > 5) return; // no more than 6 channels, silly game.
ch->frequency = (ch->frequency & 0x0F00) | V;
RecalcFreqCache(select);
RecalcUOFunc(select);
break;
case 0x03: /* Channel frequency (MSB) */
if(select > 5) return; // no more than 6 channels, silly game.
ch->frequency = (ch->frequency & 0x00FF) | ((V & 0x0F) << 8);
RecalcFreqCache(select);
RecalcUOFunc(select);
break;
case 0x04: /* Channel enable, DDA, volume */
if(select > 5) return; // no more than 6 channels, silly game.
if((ch->control & 0x40) && !(V & 0x40))
{
ch->waveform_index = 0;
ch->dda = ch->waveform[ch->waveform_index];
ch->counter = ch->freq_cache;
}
if(!(ch->control & 0x80) && (V & 0x80))
{
if(!(V & 0x40))
{
ch->waveform_index = (ch->waveform_index + 1) & 0x1F;
ch->dda = ch->waveform[ch->waveform_index];
}
}
ch->control = V;
RecalcFreqCache(select);
RecalcUOFunc(select);
if(REVISION_ENHANCED == revision)
{
ch->vl[0] = GetVL(select, 0);
ch->vl[1] = GetVL(select, 1);
}
else
vol_pending = true;
break;
case 0x05: /* Channel balance */
if(select > 5) return; // no more than 6 channels, silly game.
ch->balance = V;
if(REVISION_ENHANCED == revision)
{
ch->vl[0] = GetVL(select, 0);
ch->vl[1] = GetVL(select, 1);
}
else
vol_pending = true;
break;
case 0x06: /* Channel waveform data */
if(select > 5) return; // no more than 6 channels, silly game.
V &= 0x1F;
if(!(ch->control & 0x40))
{
ch->samp_accum -= ch->waveform[ch->waveform_index];
ch->waveform[ch->waveform_index] = V;
ch->samp_accum += ch->waveform[ch->waveform_index];
}
if((ch->control & 0xC0) == 0x00)
ch->waveform_index = ((ch->waveform_index + 1) & 0x1F);
if(ch->control & 0x80)
{
// According to my tests(on SuperGrafx), writing to this channel
// will update the waveform value cache/latch regardless of DDA mode being enabled.
ch->dda = V;
if(REVISION_ENHANCED == revision)
{
if(&PCE_PSG::UpdateOutput_Norm == ch->UpdateOutput)
UpdateOutput_Norm(timestamp, ch);
}
}
break;
case 0x07: /* Noise enable and frequency */
if(select > 5) return; // no more than 6 channels, silly game.
if(select >= 4)
{
ch->noisectrl = V;
RecalcNoiseFreqCache(select);
RecalcUOFunc(select);
}
break;
case 0x08: /* LFO frequency */
lfofreq = V & 0xFF;
//printf("LFO Freq: %02x\n", V);
break;
case 0x09: /* LFO trigger and control */
//printf("LFO Ctrl: %02x\n", V);
if(V & 0x80)
{
channel[1].waveform_index = 0;
channel[1].dda = channel[1].waveform[channel[1].waveform_index];
channel[1].counter = channel[1].freq_cache;
}
lfoctrl = V;
RecalcFreqCache(0);
RecalcUOFunc(0);
RecalcFreqCache(1);
RecalcUOFunc(1);
break;
}
}
// Don't use INLINE, which has always_inline in it, due to gcc's inability to cope with the type of recursion
// used in this function.
inline void PCE_PSG::RunChannel(int chc, int32 timestamp, const bool LFO_On)
{
psg_channel *ch = &channel[chc];
int32 running_timestamp = ch->lastts;
int32 run_time = timestamp - ch->lastts;
ch->lastts = timestamp;
if(!run_time)
return;
//if(chc != 5)
// return;
if(REVISION_ENHANCED != revision)
(this->*ch->UpdateOutput)(running_timestamp, ch);
if(chc >= 4)
{
int32 freq = ch->noise_freq_cache;
ch->noisecount -= run_time;
if(&PCE_PSG::UpdateOutput_Noise == ch->UpdateOutput)
while(ch->noisecount <= 0)
{
CLOCK_LFSR(ch->lfsr);
UpdateOutput_Noise(timestamp + ch->noisecount, ch);
ch->noisecount += freq;
}
else
while(ch->noisecount <= 0)
{
CLOCK_LFSR(ch->lfsr);
ch->noisecount += freq;
}
}
// D7 of control is 0, don't clock the counter at all.
// D7 of lfocontrol is 1(and chc == 1), don't clock the counter at all(not sure about this)
// In DDA mode, don't clock the counter.
// (Noise being enabled isn't handled here since AFAIK it doesn't disable clocking of the waveform portion, its sound just overrides the sound from
// the waveform portion when the noise enable bit is set, which is handled in our RecalcUOFunc).
if(!(ch->control & 0x80) || (chc == 1 && (lfoctrl & 0x80)) || (ch->control & 0x40))
return;
ch->counter -= run_time;
if(!LFO_On && ch->freq_cache <= 0xA)
{
if(ch->counter <= 0)
{
const int32 inc_count = ((0 - ch->counter) / ch->freq_cache) + 1;
ch->counter += inc_count * ch->freq_cache;
ch->waveform_index = (ch->waveform_index + inc_count) & 0x1F;
ch->dda = ch->waveform[ch->waveform_index];
}
}
while(ch->counter <= 0)
{
ch->waveform_index = (ch->waveform_index + 1) & 0x1F;
ch->dda = ch->waveform[ch->waveform_index];
(this->*ch->UpdateOutput)(timestamp + ch->counter, ch);
if(LFO_On)
{
RunChannel(1, timestamp + ch->counter, false);
RecalcFreqCache(0);
RecalcUOFunc(0);
ch->counter += (ch->freq_cache <= 0xA) ? 0xA : ch->freq_cache; // Not particularly accurate, but faster.
}
else
ch->counter += ch->freq_cache;
}
}
void PCE_PSG::UpdateSubLFO(int32 timestamp)
{
for(int chc = 0; chc < 6; chc++)
RunChannel(chc, timestamp, chc == 0);
}
void PCE_PSG::UpdateSubNonLFO(int32 timestamp)
{
for(int chc = 0; chc < 6; chc++)
RunChannel(chc, timestamp, false);
}
//static int32 last_read;
//static int32 last_apply;
void PCE_PSG::Update(int32 timestamp)
{
int32 run_time = timestamp - lastts;
if(!SoundEnabled)
return;
if(REVISION_ENHANCED != revision)
{
if(vol_pending && !vol_update_counter && !vol_update_which)
{
vol_update_counter = 1;
vol_pending = false;
}
}
bool lfo_on = (bool)(lfoctrl & 0x03);
if(lfo_on)
{
if(!(channel[1].control & 0x80) || (lfoctrl & 0x80))
{
lfo_on = 0;
RecalcFreqCache(0);
RecalcUOFunc(0);
}
}
int32 clocks = run_time;
int32 running_timestamp = lastts;
while(clocks > 0)
{
int32 chunk_clocks = clocks;
if(REVISION_ENHANCED != revision)
{
if(vol_update_counter > 0 && chunk_clocks > vol_update_counter)
chunk_clocks = vol_update_counter;
}
running_timestamp += chunk_clocks;
clocks -= chunk_clocks;
if(lfo_on)
UpdateSubLFO(running_timestamp);
else
UpdateSubNonLFO(running_timestamp);
if(REVISION_ENHANCED != revision && vol_update_counter > 0)
{
vol_update_counter -= chunk_clocks;
if(!vol_update_counter)
{
const int phase = vol_update_which & 1;
const int lr = ((vol_update_which >> 1) & 1) ^ 1;
const int chnum = vol_update_which >> 2;
if(!phase)
{
//printf("Volume update(Read, %d since last): ch=%d, lr=%d, ts=%d\n", running_timestamp - last_read, chnum, lr, running_timestamp);
if(chnum < 6)
{
vol_update_vllatch = GetVL(chnum, lr);
}
//last_read = running_timestamp;
}
else
{
// printf("Volume update(Apply): ch=%d, lr=%d, ts=%d\n", chnum, lr, running_timestamp);
if(chnum < 6)
{
channel[chnum].vl[lr] = vol_update_vllatch;
}
//last_apply = running_timestamp;
}
vol_update_which = (vol_update_which + 1) & 0x1F;
if(vol_update_which)
vol_update_counter = phase ? 1 : 255;
else if(vol_pending)
{
vol_update_counter = phase ? 1 : 255;
vol_pending = false;
}
}
}
lastts = running_timestamp;
}
}
void PCE_PSG::EndFrame(int32 timestamp)
{
Update(timestamp);
lastts = 0;
for(int chc = 0; chc < 6; chc++)
channel[chc].lastts = 0;
}
void PCE_PSG::Power(const int32 timestamp)
{
// Not sure about power-on values, these are mostly just intuitive guesses(with some laziness thrown in).
if(timestamp != lastts)
Update(timestamp);
memset(&channel, 0, sizeof(channel));
select = 0;
globalbalance = 0;
lfofreq = 0;
lfoctrl = 0;
for(int ch = 0; ch < 6; ch++)
{
channel[ch].frequency = 0;
channel[ch].control = 0x00;
channel[ch].balance = 0;
memset(channel[ch].waveform, 0, 32);
channel[ch].samp_accum = 0;
channel[ch].waveform_index = 0;
channel[ch].dda = 0x00;
channel[ch].noisectrl = 0x00;
channel[ch].vl[0] = 0x1F;
channel[ch].vl[1] = 0x1F;
channel[ch].samp_accum = 0;
RecalcFreqCache(ch);
RecalcUOFunc(ch);
channel[ch].counter = channel[ch].freq_cache;
if(ch >= 4)
{
RecalcNoiseFreqCache(ch);
channel[ch].noisecount = 1;
channel[ch].lfsr = 1;
}
}
vol_pending = false;
vol_update_counter = 0;
vol_update_which = 0;
}
int PCE_PSG::StateAction(StateMem *sm, int load, int data_only)
{
int ret = 1;
for(int ch = 0; ch < 6; ch++)
{
char tmpstr[5] = "SCHx";
psg_channel *pt = &channel[ch];
SFORMAT CH_StateRegs[] =
{
SFVARN(pt->counter, "counter"),
SFVARN(pt->frequency, "frequency"),
SFVARN(pt->control, "control"),
SFVARN(pt->balance, "balance"),
SFARRAYN(pt->waveform, 32, "waveform"),
SFVARN(pt->waveform_index, "waveform_index"),
SFVARN(pt->dda, "dda"),
SFVARN(pt->noisectrl, "noisectrl"),
SFVARN(pt->noisecount, "noisecount"),
SFVARN(pt->lfsr, "lfsr"),
SFARRAY32N(pt->vl, 2, "vl"), // TODO
SFEND
};
tmpstr[3] = '0' + ch;
ret &= MDFNSS_StateAction(sm, load, data_only, CH_StateRegs, tmpstr);
}
SFORMAT PSG_StateRegs[] =
{
SFVAR(select),
SFVAR(globalbalance),
SFVAR(lfofreq),
SFVAR(lfoctrl),
SFVAR(vol_update_counter),
SFVAR(vol_update_which),
SFVAR(vol_pending),
SFEND
};
ret &= MDFNSS_StateAction(sm, load, data_only, PSG_StateRegs, "PSG");
if(load)
{
vol_update_which &= 0x1F;
if(!channel[4].lfsr)
channel[4].lfsr = 1;
if(!channel[5].lfsr)
channel[5].lfsr = 1;
for(int ch = 0; ch < 6; ch++)
{
channel[ch].samp_accum = 0;
for(int wi = 0; wi < 32; wi++)
{
channel[ch].waveform[wi] &= 0x1F;
channel[ch].samp_accum += channel[ch].waveform[wi];
}
for(int lr = 0; lr < 2; lr++)
channel[ch].vl[lr] &= 0x1F;
if(!channel[ch].noisecount && ch >= 4)
{
printf("ch=%d, noisecount == 0\n", ch);
channel[ch].noisecount = 1;
}
if(channel[ch].counter <= 0)
{
printf("ch=%d, counter <= 0\n", ch);
channel[ch].counter = 1;
}
if(ch >= 4)
RecalcNoiseFreqCache(ch);
RecalcFreqCache(ch);
RecalcUOFunc(ch);
}
}
return(ret);
}

View File

@ -1,180 +0,0 @@
#ifndef _PCE_PSG_H
#define _PCE_PSG_H
#include <blip/Blip_Buffer.h>
#include <blip/Stereo_Buffer.h>
class PCE_PSG;
struct psg_channel
{
int32 counter;
uint16 frequency; /* Channel frequency */
uint32 freq_cache;
uint8 control; /* Channel enable, DDA, volume */
uint8 balance; /* Channel balance */
uint8 waveform[32]; /* Waveform data */
uint8 waveform_index; /* Waveform data index */
uint8 dda;
uint8 noisectrl; /* Noise enable/ctrl (channels 4,5 only) */
uint32 noise_freq_cache; // Channel 4,5 only
int32 noisecount;
uint32 lfsr;
//int32 sample_cache[2];
int32 vl[2]; //vll, vlr;
int samp_accum; // The result of adding up all the samples in the waveform buffer(part of an optimization for high-frequency playback).
int32 blip_prev_samp[2];
int32 lastts;
void (PCE_PSG::*UpdateOutput)(const int32 timestamp, psg_channel *ch);
};
// Only CH4 and CH5 have NCTRL and LFSR, but it's here for the other channels for "consistency".
enum
{
PSG_GSREG_CH0_FREQ = 0x000,
// PSG_GSREG_CH0_COUNTER,
PSG_GSREG_CH0_CTRL,
PSG_GSREG_CH0_BALANCE,
PSG_GSREG_CH0_WINDEX,
PSG_GSREG_CH0_SCACHE,
PSG_GSREG_CH0_NCTRL,
PSG_GSREG_CH0_LFSR,
PSG_GSREG_CH1_FREQ = 0x100,
// PSG_GSREG_CH1_COUNTER,
PSG_GSREG_CH1_CTRL,
PSG_GSREG_CH1_BALANCE,
PSG_GSREG_CH1_WINDEX,
PSG_GSREG_CH1_SCACHE,
PSG_GSREG_CH1_NCTRL,
PSG_GSREG_CH1_LFSR,
PSG_GSREG_CH2_FREQ = 0x200,
// PSG_GSREG_CH2_COUNTER,
PSG_GSREG_CH2_CTRL,
PSG_GSREG_CH2_BALANCE,
PSG_GSREG_CH2_WINDEX,
PSG_GSREG_CH2_SCACHE,
PSG_GSREG_CH2_NCTRL,
PSG_GSREG_CH2_LFSR,
PSG_GSREG_CH3_FREQ = 0x300,
// PSG_GSREG_CH3_COUNTER,
PSG_GSREG_CH3_CTRL,
PSG_GSREG_CH3_BALANCE,
PSG_GSREG_CH3_WINDEX,
PSG_GSREG_CH3_SCACHE,
PSG_GSREG_CH3_NCTRL,
PSG_GSREG_CH3_LFSR,
PSG_GSREG_CH4_FREQ = 0x400,
// PSG_GSREG_CH4_COUNTER,
PSG_GSREG_CH4_CTRL,
PSG_GSREG_CH4_BALANCE,
PSG_GSREG_CH4_WINDEX,
PSG_GSREG_CH4_SCACHE,
PSG_GSREG_CH4_NCTRL,
PSG_GSREG_CH4_LFSR,
PSG_GSREG_CH5_FREQ = 0x500,
// PSG_GSREG_CH5_COUNTER,
PSG_GSREG_CH5_CTRL,
PSG_GSREG_CH5_BALANCE,
PSG_GSREG_CH5_WINDEX,
PSG_GSREG_CH5_SCACHE,
PSG_GSREG_CH5_NCTRL,
PSG_GSREG_CH5_LFSR,
PSG_GSREG_SELECT = 0x1000,
PSG_GSREG_GBALANCE,
PSG_GSREG_LFOFREQ,
PSG_GSREG_LFOCTRL,
_PSG_GSREG_COUNT
};
class PCE_PSG
{
public:
enum
{
REVISION_HUC6280 = 0,
REVISION_HUC6280A,
REVISION_ENHANCED,
_REVISION_COUNT
};
PCE_PSG(Blip_Buffer *bb_l, Blip_Buffer *bb_r, int want_revision);
~PCE_PSG();
int StateAction(StateMem *sm, int load, int data_only);
void Power(const int32 timestamp);
void Write(int32 timestamp, uint8 A, uint8 V);
void SetVolume(double new_volume);
void EndFrame(int32 timestamp);
// TODO: timestamp
uint32 GetRegister(const unsigned int id, char *special, const uint32 special_len);
void SetRegister(const unsigned int id, const uint32 value);
void PeekWave(const unsigned int ch, uint32 Address, uint32 Length, uint8 *Buffer);
void PokeWave(const unsigned int ch, uint32 Address, uint32 Length, const uint8 *Buffer);
private:
void Update(int32 timestamp);
void UpdateSubLFO(int32 timestamp);
void UpdateSubNonLFO(int32 timestamp);
void RecalcUOFunc(int chnum);
void UpdateOutput_Off(const int32 timestamp, psg_channel *ch);
void UpdateOutput_Accum(const int32 timestamp, psg_channel *ch);
void UpdateOutput_Norm(const int32 timestamp, psg_channel *ch);
void UpdateOutput_Noise(const int32 timestamp, psg_channel *ch);
// void UpdateOutput_Norm_IL(const int32 timestamp, psg_channel *ch);
// void UpdateOutput_Noise_IL(const int32 timestamp, psg_channel *ch);
int32 GetVL(const int chnum, const int lr);
void RecalcFreqCache(int chnum);
void RecalcNoiseFreqCache(int chnum);
void RunChannel(int chc, int32 timestamp, bool LFO_On);
double OutputVolume;
uint8 select; /* Selected channel (0-5) */
uint8 globalbalance; /* Global sound balance */
uint8 lfofreq; /* LFO frequency */
uint8 lfoctrl; /* LFO control */
int32 vol_update_counter;
int32 vol_update_which;
int32 vol_update_vllatch;
bool vol_pending;
psg_channel channel[6];
int32 lastts;
int revision;
bool SoundEnabled;
Blip_Buffer *sbuf[2];
Blip_Synth<blip_good_quality, 8192> Synth;
int32 dbtable_volonly[32];
int32 dbtable[32][32];
};
#endif

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@ -1,384 +0,0 @@
// Sms_Snd_Emu 0.1.4. http://www.slack.net/~ant/
#include "mednafen.h"
#include "Sms_Apu.h"
/* Copyright (C) 2003-2006 Shay Green. This module is free software; you
can redistribute it and/or modify it under the terms of the GNU Lesser
General Public License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version. This
module is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more
details. You should have received a copy of the GNU Lesser General Public
License along with this module; if not, write to the Free Software Foundation,
Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
// Sms_Osc
Sms_Osc::Sms_Osc()
{
output = 0;
outputs [0] = 0; // always stays NULL
outputs [1] = 0;
outputs [2] = 0;
outputs [3] = 0;
}
void Sms_Osc::reset()
{
delay = 0;
last_amp = 0;
volume = 0;
output_select = 3;
output = outputs [3];
}
// Sms_Square
blip_inline void Sms_Square::reset()
{
period = 0;
phase = 0;
Sms_Osc::reset();
}
void Sms_Square::run( blip_time_t time, blip_time_t end_time )
{
int amp = volume;
if ( period > 128 )
amp = amp << 1 & -phase;
{
int delta = amp - last_amp;
if ( delta )
{
last_amp = amp;
synth->offset( time, delta, output );
}
}
time += delay;
delay = 0;
if ( period )
{
if ( time < end_time )
{
if ( !volume || period <= 128 ) // ignore 16kHz and higher
{
// keep calculating phase
int count = (end_time - time + period - 1) / period;
phase = (phase + count) & 1;
time += count * period;
}
else
{
Blip_Buffer* const output = this->output;
int delta = amp * 2 - volume * 2;
do
{
delta = -delta;
synth->offset_inline( time, delta, output );
time += period;
}
while ( time < end_time );
last_amp = (delta >> 1) + volume;
phase = (delta >= 0);
}
}
delay = time - end_time;
}
}
// Sms_Noise
static int const noise_periods [3] = { 0x100, 0x200, 0x400 };
blip_inline void Sms_Noise::reset()
{
period = &noise_periods [0];
shifter = 0x8000;
feedback = 0x9000;
Sms_Osc::reset();
}
void Sms_Noise::run( blip_time_t time, blip_time_t end_time )
{
int amp = (shifter & 1) ? 0 : volume * 2;
{
int delta = amp - last_amp;
if ( delta )
{
last_amp = amp;
synth.offset( time, delta, output );
}
}
time += delay;
if ( !volume )
time = end_time;
if ( time < end_time )
{
Blip_Buffer* const output = this->output;
unsigned shifter = this->shifter;
int delta = (shifter & 1) ? (-volume * 2) : (volume * 2);
int period = *this->period * 2;
if ( !period )
period = 16;
do
{
int changed = shifter + 1;
shifter = (feedback & -(shifter & 1)) ^ (shifter >> 1);
if ( changed & 2 ) // true if bits 0 and 1 differ
{
amp = (shifter & 1) ? 0 : volume * 2;
delta = -delta;
synth.offset_inline( time, delta, output );
last_amp = amp;
}
time += period;
}
while ( time < end_time );
this->shifter = shifter;
this->last_amp = (shifter & 1) ? 0 : volume * 2; //delta >> 1;
}
delay = time - end_time;
}
// Sms_Apu
Sms_Apu::Sms_Apu()
{
for ( int i = 0; i < 3; i++ )
{
squares [i].synth = &square_synth;
oscs [i] = &squares [i];
}
oscs [3] = &noise;
volume( 1.0 );
reset();
}
Sms_Apu::~Sms_Apu()
{
}
void Sms_Apu::volume( double vol )
{
vol *= 0.85 / (osc_count * 64 * 2);
square_synth.volume( vol );
noise.synth.volume( vol );
}
void Sms_Apu::treble_eq( const blip_eq_t& eq )
{
square_synth.treble_eq( eq );
noise.synth.treble_eq( eq );
}
void Sms_Apu::osc_output( int index, Blip_Buffer* center, Blip_Buffer* left, Blip_Buffer* right )
{
require( (unsigned) index < osc_count );
require( (center && left && right) || (!center && !left && !right) );
Sms_Osc& osc = *oscs [index];
osc.outputs [1] = right;
osc.outputs [2] = left;
osc.outputs [3] = center;
osc.output = osc.outputs [osc.output_select];
}
void Sms_Apu::output( Blip_Buffer* center, Blip_Buffer* left, Blip_Buffer* right )
{
for ( int i = 0; i < osc_count; i++ )
osc_output( i, center, left, right );
}
void Sms_Apu::reset( unsigned feedback, int noise_width )
{
last_time = 0;
latch = 0;
ggstereo_save = 0xFF;
if ( !feedback || !noise_width )
{
feedback = 0x0009;
noise_width = 16;
}
// convert to "Galios configuration"
looped_feedback = 1 << (noise_width - 1);
noise_feedback = 0;
while ( noise_width-- )
{
noise_feedback = (noise_feedback << 1) | (feedback & 1);
feedback >>= 1;
}
squares [0].reset();
squares [1].reset();
squares [2].reset();
noise.reset();
}
void Sms_Apu::run_until( blip_time_t end_time )
{
require( end_time >= last_time ); // end_time must not be before previous time
if ( end_time > last_time )
{
// run oscillators
for ( int i = 0; i < osc_count; ++i )
{
Sms_Osc& osc = *oscs [i];
if ( osc.output )
{
if ( i < 3 )
squares [i].run( last_time, end_time );
else
noise.run( last_time, end_time );
}
}
last_time = end_time;
}
}
void Sms_Apu::end_frame( blip_time_t end_time )
{
if ( end_time > last_time )
run_until( end_time );
assert( last_time >= end_time );
last_time -= end_time;
}
void Sms_Apu::write_ggstereo( blip_time_t time, int data )
{
require( (unsigned) data <= 0xFF );
ggstereo_save = data;
run_until( time );
for ( int i = 0; i < osc_count; i++ )
{
Sms_Osc& osc = *oscs [i];
int flags = data >> i;
Blip_Buffer* old_output = osc.output;
osc.output_select = (flags >> 3 & 2) | (flags & 1);
osc.output = osc.outputs [osc.output_select];
if ( osc.output != old_output && osc.last_amp )
{
if ( old_output )
{
square_synth.offset( time, -osc.last_amp, old_output );
}
osc.last_amp = 0;
}
}
}
// volumes [i] = 64 * pow( 1.26, 15 - i ) / pow( 1.26, 15 )
static unsigned char const volumes [16] = {
64, 50, 39, 31, 24, 19, 15, 12, 9, 7, 5, 4, 3, 2, 1, 0
};
void Sms_Apu::write_data( blip_time_t time, int data )
{
require( (unsigned) data <= 0xFF );
run_until( time );
if ( data & 0x80 )
latch = data;
int index = (latch >> 5) & 3;
//if(index == 3)
//printf("Write @ %d; Index: %d, %d, Value: %02x\n", time, index, latch, data);
if ( latch & 0x10 )
{
oscs [index]->volume = volumes [data & 15];
}
else if ( index < 3 )
{
Sms_Square& sq = squares [index];
if ( data & 0x80 )
sq.period = (sq.period & 0xFF00) | (data << 4 & 0x00FF);
else
sq.period = (sq.period & 0x00FF) | (data << 8 & 0x3F00);
}
else
{
int select = data & 3;
if ( select < 3 )
noise.period = &noise_periods [select];
else
noise.period = &squares [2].period;
noise.feedback = (data & 0x04) ? noise_feedback : looped_feedback;
noise.shifter = 0x8000;
}
}
void Sms_Apu::save_state(Sms_ApuState *ret)
{
memset(ret, 0, sizeof(Sms_ApuState));
ret->ggstereo = ggstereo_save;
for(int x = 0; x < 4; x++)
{
ret->volume[x] = oscs[x]->volume;
}
for(int x = 0; x < 3; x++)
{
ret->sq_period[x] = squares[x].period;
ret->sq_phase[x] = squares[x].phase;
}
ret->noise_shifter = noise.shifter;
ret->noise_feedback = noise.feedback;
if(noise.period == &noise_periods[0])
ret->noise_period = 0;
else if(noise.period == &noise_periods[1])
ret->noise_period = 1;
else if(noise.period == &noise_periods[2])
ret->noise_period = 2;
else ret->noise_period = 3;
}
void Sms_Apu::load_state(const Sms_ApuState *state)
{
for(int x = 0; x < 4; x++)
{
oscs[x]->volume = state->volume[x];
}
for(int x = 0; x < 3; x++)
{
squares[x].period = state->sq_period[x];
squares[x].phase = state->sq_phase[x];
}
noise.shifter = state->noise_shifter;
noise.feedback = state->noise_feedback;
int select = state->noise_period;
if ( select < 3 )
noise.period = &noise_periods [select];
else
noise.period = &squares [2].period;
write_ggstereo(0, state->ggstereo);
}

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@ -1,92 +0,0 @@
// Sega Master System SN76489 PSG sound chip emulator
// Sms_Snd_Emu 0.1.4
#ifndef SMS_APU_H
#define SMS_APU_H
#include "Sms_Oscs.h"
typedef struct
{
int32 sq_period[3];
int32 sq_phase[3];
int32 noise_period;
uint32 noise_shifter;
uint32 noise_feedback;
int32 volume[4];
uint8 ggstereo;
uint8 latch;
} Sms_ApuState;
class Sms_Apu {
public:
// Set overall volume of all oscillators, where 1.0 is full volume
void volume( double );
// Set treble equalization
void treble_eq( const blip_eq_t& );
// Outputs can be assigned to a single buffer for mono output, or to three
// buffers for stereo output (using Stereo_Buffer to do the mixing).
// Assign all oscillator outputs to specified buffer(s). If buffer
// is NULL, silences all oscillators.
void output( Blip_Buffer* mono );
void output( Blip_Buffer* center, Blip_Buffer* left, Blip_Buffer* right );
// Assign single oscillator output to buffer(s). Valid indicies are 0 to 3,
// which refer to Square 1, Square 2, Square 3, and Noise. If buffer is NULL,
// silences oscillator.
enum { osc_count = 4 };
void osc_output( int index, Blip_Buffer* mono );
void osc_output( int index, Blip_Buffer* center, Blip_Buffer* left, Blip_Buffer* right );
// Reset oscillators and internal state
void reset( unsigned noise_feedback = 0, int noise_width = 0 );
// Write GameGear left/right assignment byte
void write_ggstereo( blip_time_t, int );
// Write to data port
void write_data( blip_time_t, int );
// Run all oscillators up to specified time, end current frame, then
// start a new frame at time 0.
void end_frame( blip_time_t );
void save_state(Sms_ApuState *);
void load_state(const Sms_ApuState *);
public:
Sms_Apu();
~Sms_Apu();
private:
// noncopyable
Sms_Apu( const Sms_Apu& );
Sms_Apu& operator = ( const Sms_Apu& );
Sms_Osc* oscs [osc_count];
Sms_Square squares [3];
Sms_Square::Synth square_synth; // used by squares
blip_time_t last_time;
int latch;
Sms_Noise noise;
unsigned noise_feedback;
unsigned looped_feedback;
unsigned int ggstereo_save;
void run_until( blip_time_t );
};
struct sms_apu_state_t
{
unsigned char regs [8] [2];
unsigned char latch;
};
inline void Sms_Apu::output( Blip_Buffer* b ) { output( b, b, b ); }
inline void Sms_Apu::osc_output( int i, Blip_Buffer* b ) { osc_output( i, b, b, b ); }
#endif

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@ -1,48 +0,0 @@
// Private oscillators used by Sms_Apu
// Sms_Snd_Emu 0.1.4
#ifndef SMS_OSCS_H
#define SMS_OSCS_H
#include <blip/Blip_Buffer.h>
struct Sms_Osc
{
Blip_Buffer* outputs [4]; // NULL, right, left, center
Blip_Buffer* output;
int output_select;
int delay;
int last_amp;
int volume;
Sms_Osc();
void reset();
};
struct Sms_Square : Sms_Osc
{
int period;
int phase;
typedef Blip_Synth<blip_good_quality,1> Synth;
const Synth* synth;
void reset();
void run( blip_time_t, blip_time_t );
};
struct Sms_Noise : Sms_Osc
{
const int* period;
unsigned shifter;
unsigned feedback;
typedef Blip_Synth<blip_med_quality,1> Synth;
Synth synth;
void reset();
void run( blip_time_t, blip_time_t );
};
#endif

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@ -1,20 +0,0 @@
0x49,0x4c,0x4c,0x32,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x61,0x61,0x1e,0x17,0xf0,0x7f,0x00,0x17,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x13,0x41,0x16,0x0e,0xfd,0xf4,0x23,0x23,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x03,0x01,0x9a,0x04,0xf3,0xf3,0x13,0xf3,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x11,0x61,0x0e,0x07,0xfa,0x64,0x70,0x17,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x22,0x21,0x1e,0x06,0xf0,0x76,0x00,0x28,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x21,0x22,0x16,0x05,0xf0,0x71,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x21,0x61,0x1d,0x07,0x82,0x80,0x17,0x17,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x23,0x21,0x2d,0x16,0x90,0x90,0x00,0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x21,0x21,0x1b,0x06,0x64,0x65,0x10,0x17,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x21,0x21,0x0b,0x1a,0x85,0xa0,0x70,0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x23,0x01,0x83,0x10,0xff,0xb4,0x10,0xf4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x97,0xc1,0x20,0x07,0xff,0xf4,0x22,0x22,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x61,0x00,0x0c,0x05,0xc2,0xf6,0x40,0x44,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x01,0x01,0x56,0x03,0x94,0xc2,0x03,0x12,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x21,0x01,0x89,0x03,0xf1,0xe4,0xf0,0x23,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x07,0x21,0x14,0x00,0xee,0xf8,0xff,0xf8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x01,0x31,0x00,0x00,0xf8,0xf7,0xf8,0xf7,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x25,0x11,0x00,0x00,0xf8,0xfa,0xf8,0x55,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00

File diff suppressed because it is too large Load Diff

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@ -1,123 +0,0 @@
#ifndef _EMU2413_H_
#define _EMU2413_H_
#define PI 3.14159265358979323846
enum {EMU2413_2413_TONE = 0};
/* voice data */
typedef struct {
uint32 TL,FB,EG,ML,AR,DR,SL,RR,KR,KL,AM,PM,WF ;
} EMU2413_PATCH ;
/* slot */
typedef struct {
EMU2413_PATCH *patch;
int32 type ; /* 0 : modulator 1 : carrier */
/* OUTPUT */
int32 feedback ;
int32 output[2] ; /* Output value of slot */
/* for Phase Generator (PG) */
uint32 *sintbl ; /* Wavetable */
uint32 phase ; /* Phase */
uint32 dphase ; /* Phase increment amount */
uint32 pgout ; /* output */
/* for Envelope Generator (EG) */
int32 fnum ; /* F-Number */
int32 block ; /* Block */
int32 volume ; /* Current volume */
int32 sustine ; /* Sustine 1 = ON, 0 = OFF */
uint32 tll ; /* Total Level + Key scale level*/
uint32 rks ; /* Key scale offset (Rks) */
int32 eg_mode ; /* Current state */
uint32 eg_phase ; /* Phase */
uint32 eg_dphase ; /* Phase increment amount */
uint32 egout ; /* output */
} EMU2413_SLOT ;
/* Mask */
#define EMU2413_MASK_CH(x) (1<<(x))
#define EMU2413_MASK_HH (1<<(9))
#define EMU2413_MASK_CYM (1<<(10))
#define EMU2413_MASK_TOM (1<<(11))
#define EMU2413_MASK_SD (1<<(12))
#define EMU2413_MASK_BD (1<<(13))
#define EMU2413_MASK_RHYTHM ( EMU2413_MASK_HH | EMU2413_MASK_CYM | EMU2413_MASK_TOM | EMU2413_MASK_SD | EMU2413_MASK_BD )
/* opll */
typedef struct
{
uint32 adr ;
int32 out ;
uint32 pan[16];
/* Register */
uint8 reg[0x40] ;
int32 slot_on_flag[18] ;
/* Pitch Modulator */
uint32 pm_phase ;
int32 lfo_pm ;
/* Amp Modulator */
int32 am_phase ;
int32 lfo_am ;
/* Noise Generator */
uint32 noise_seed ;
/* Channel Data */
int32 patch_number[9];
int32 key_status[9] ;
/* Slot */
EMU2413_SLOT slot[18] ;
/* Voice Data */
EMU2413_PATCH patch[19*2] ;
int32 patch_update[2] ; /* flag for check patch update */
uint32 mask ;
} EMU2413 ;
/* Create Object */
EMU2413 *EMU2413_new(uint32 clk);
void EMU2413_delete(EMU2413 *);
/* Setup */
void EMU2413_reset(EMU2413 *);
void EMU2413_reset_patch(EMU2413 *, int32);
void EMU2413_set_pan(EMU2413 *, uint32 ch, uint32 pan);
/* Port/Register access */
void EMU2413_writeIO(EMU2413 *, uint32 reg, uint32 val) ;
void EMU2413_writeReg(EMU2413 *, uint32 reg, uint32 val) ;
/* Synthsize */
int32 EMU2413_calc(EMU2413 *) ;
void EMU2413_calc_stereo(EMU2413 *, int32 out[2]) ;
/* Misc */
void EMU2413_setPatch(EMU2413 *, const uint8 *dump) ;
void EMU2413_copyPatch(EMU2413 *, int32, EMU2413_PATCH *) ;
void EMU2413_forceRefresh(EMU2413 *) ;
/* Utility */
void EMU2413_dump2patch(const uint8 *dump, EMU2413_PATCH *patch) ;
void EMU2413_patch2dump(const EMU2413_PATCH *patch, uint8 *dump) ;
void EMU2413_getDefaultPatch(int32 type, int32 num, EMU2413_PATCH *) ;
/* Channel Mask */
uint32 EMU2413_setMask(EMU2413 *, uint32 mask) ;
uint32 EMU2413_toggleMask(EMU2413 *, uint32 mask) ;
#endif

File diff suppressed because it is too large Load Diff

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@ -1,39 +0,0 @@
// YM2612 FM sound chip emulator interface
#ifndef YM2612_EMU_H
#define YM2612_EMU_H
#include "../../mednafen.h"
#include "../../lepacker.h"
struct Ym2612_Impl;
class Ym2612_Emu {
Ym2612_Impl* impl;
public:
Ym2612_Emu();
~Ym2612_Emu();
// Reset to power-up state
void reset();
// Mute voice n if bit n (1 << n) of mask is set
enum { channel_count = 6 };
void mute_voices( int mask );
// Write addr to register 0 then data to register 1
void write0( int addr, int data );
// Write addr to register 2 then data to register 3
void write1( int addr, int data );
int read(void);
// Run and add nt samples into current output buffer contents
typedef short sample_t;
enum { out_chan_count = 2 }; // stereo
void run( sample_t* out );
void serialize(MDFN::LEPacker &slizer, bool load);
};
#endif

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@ -1,400 +0,0 @@
class OpEG
{
public:
OpEG();
~OpEG();
void serialize(MDFN::LEPacker &slizer, bool load);
void Reset(void);
void SetKONOFF(bool);
void SetCSMKONOFF(bool);
void InstrParamChanged(void);
bool Run(bool div3_run_eg, unsigned GlobalEGCycleCounter, unsigned ksr);
void SetTL(unsigned);
void SetSL(unsigned);
void SetAR(unsigned);
void SetDR(unsigned);
void SetSR(unsigned);
void SetRR(unsigned);
void SetSSG_EG(unsigned);
uint32 GetOutAttenuation(void);
//
//
//
private:
void CheckPhaseAdvance(void);
unsigned CalcRate(unsigned ksr);
bool NeedFullKON;
bool KONOFF;
bool CSMKONOFF;
bool LA_OT_KONOFF;
uint8 TL, SL;
uint8 SSG_EG;
union
{
struct
{
uint8 AR, DR, SR, RR; // Note: RR is stored (<< 1) | 1 here
};
uint8 RawRates[4];
};
unsigned CurPhase;
signed Attenuation;
bool SSGInvert;
enum
{
ADSR_ATTACK = 0,
ADSR_DECAY = 1,
ADSR_SUSTAIN = 2,
ADSR_RELEASE = 3
};
#define SSGEG_MASK_HOLD 0x01
#define SSGEG_MASK_ALTERNATE 0x02
#define SSGEG_MASK_ATTACK 0x04
#define SSGEG_MASK_ENABLE 0x08
};
OpEG::OpEG()
{
Reset();
}
OpEG::~OpEG()
{
}
void OpEG::serialize(MDFN::LEPacker &slizer, bool load)
{
slizer ^ KONOFF;
slizer ^ CSMKONOFF;
slizer ^ LA_OT_KONOFF;
slizer ^ NeedFullKON;
slizer ^ TL;
slizer ^ SL;
slizer ^ SSG_EG;
slizer ^ AR;
slizer ^ DR;
slizer ^ SR;
slizer ^ RR;
slizer ^ CurPhase;
slizer ^ Attenuation;
slizer ^ SSGInvert;
}
void OpEG::Reset(void)
{
TL = 0;
SL = 0;
SSG_EG = 0;
AR = 0;
DR = 0;
SR = 0;
RR = 1;
CurPhase = ADSR_RELEASE;
Attenuation = 0x3FF;
SSGInvert = false;
KONOFF = false;
CSMKONOFF = false;
LA_OT_KONOFF = false;
NeedFullKON = false;
}
void OpEG::InstrParamChanged(void)
{
NeedFullKON = true;
}
void OpEG::SetCSMKONOFF(bool ns)
{
CSMKONOFF = ns;
}
void OpEG::SetKONOFF(bool ns)
{
// printf("NS: %d\n", ns);
//if(LA_OT_KONOFF != (KONOFF | CSMKONOFF))
// puts("IYEE :(\n\n");
KONOFF = ns;
}
void OpEG::SetTL(unsigned v)
{
TL = v & 0x7F;
}
void OpEG::SetSL(unsigned v)
{
SL = v & 0x0F;
}
void OpEG::SetAR(unsigned v)
{
AR = v & 0x1F;
//if(LA_OT_KONOFF != (KONOFF | CSMKONOFF) || CurPhase != ADSR_RELEASE)
// puts("AR Evil");
}
void OpEG::SetDR(unsigned v)
{
DR = v & 0x1F;
//if(LA_OT_KONOFF != (KONOFF | CSMKONOFF) || CurPhase != ADSR_RELEASE)
// puts("DR Evil");
}
void OpEG::SetSR(unsigned v)
{
SR = v & 0x1F;
//if(LA_OT_KONOFF != (KONOFF | CSMKONOFF) || CurPhase != ADSR_RELEASE)
// puts("SR Evil");
}
void OpEG::SetRR(unsigned v)
{
RR = ((v & 0x0F) << 1) | 1;
//if(LA_OT_KONOFF != (KONOFF | CSMKONOFF) || CurPhase != ADSR_RELEASE)
// puts("RR Evil");
}
void OpEG::SetSSG_EG(unsigned v)
{
SSG_EG = v & 0xF;
}
unsigned OpEG::CalcRate(unsigned ksr)
{
unsigned int rate = ((RawRates[CurPhase] << 1) + (RawRates[CurPhase] ? ksr : 0));
if(rate > 0x3F)
rate = 0x3F;
return(rate);
}
// See Mega Turrican track 3, and Flashback track 3.
void OpEG::CheckPhaseAdvance(void)
{
if(CurPhase == ADSR_ATTACK)
{
if(Attenuation == 0)
{
CurPhase = ADSR_DECAY;
}
}
if(CurPhase == ADSR_DECAY)
{
if(Attenuation >= ((SL == 0x0F) ? 0x3FF : (SL << 5)))
{
CurPhase = ADSR_SUSTAIN;
}
}
}
//
bool OpEG::Run(bool div3_run_eg, unsigned GlobalEGCycleCounter, unsigned ksr)
{
bool ret = true;
bool combo_KONOFF = KONOFF | CSMKONOFF;
if(combo_KONOFF != LA_OT_KONOFF)
{
if(combo_KONOFF) // Key on
{
//printf("Key on\n");
ret = false;
CurPhase = ADSR_ATTACK;
SSGInvert = false;
if(NeedFullKON)
{
Attenuation = 0x3FF;
NeedFullKON = false;
}
if(CalcRate(ksr) >= 0x3E)
{
Attenuation = 0;
}
CheckPhaseAdvance();
}
else // Key off
{
//printf("Key off\n");
CurPhase = ADSR_RELEASE;
if((SSG_EG & 0x08) && (SSGInvert ^ (bool)(SSG_EG & SSGEG_MASK_ATTACK)))
{
Attenuation = (0x200 - Attenuation) & 0x3FF;
}
}
}
LA_OT_KONOFF = combo_KONOFF;
if((SSG_EG & 0x08) && (Attenuation >= 0x200))
{
if((SSG_EG & SSGEG_MASK_ALTERNATE) && (!(SSG_EG & SSGEG_MASK_HOLD) || !SSGInvert))
{
SSGInvert = !SSGInvert;
}
if(!(SSG_EG & SSGEG_MASK_ALTERNATE) && !(SSG_EG & SSGEG_MASK_HOLD))
{
ret = false;
}
if(CurPhase != ADSR_ATTACK)
{
if((CurPhase != ADSR_RELEASE) && !(SSG_EG & SSGEG_MASK_HOLD))
{
ret = false;
CurPhase = ADSR_ATTACK;
//Attenuation = 0x3FF;
if(NeedFullKON)
{
Attenuation = 0x3FF;
NeedFullKON = false;
}
if(CalcRate(ksr) >= 0x3E)
{
Attenuation = 0;
}
CheckPhaseAdvance();
}
else if((CurPhase == ADSR_RELEASE) || !(SSGInvert ^ (bool)(SSG_EG & SSGEG_MASK_ATTACK)))
{
Attenuation = 0x3FF;
CheckPhaseAdvance();
}
}
}
if(div3_run_eg)
{
static const uint8 counter_shift_table[0x40] = {
11, 11, 11, 11, // 0-3 (0x00-0x03)
10, 10, 10, 10, // 4-7 (0x04-0x07)
9, 9, 9, 9, // 8-11 (0x08-0x0B)
8, 8, 8, 8, // 12-15 (0x0C-0x0F)
7, 7, 7, 7, // 16-19 (0x10-0x13)
6, 6, 6, 6, // 20-23 (0x14-0x17)
5, 5, 5, 5, // 24-27 (0x18-0x1B)
4, 4, 4, 4, // 28-31 (0x1C-0x1F)
3, 3, 3, 3, // 32-35 (0x20-0x23)
2, 2, 2, 2, // 36-39 (0x24-0x27)
1, 1, 1, 1, // 40-43 (0x28-0x2B)
0, 0, 0, 0, // 44-47 (0x2C-0x2F)
0, 0, 0, 0, // 48-51 (0x30-0x33)
0, 0, 0, 0, // 52-55 (0x34-0x37)
0, 0, 0, 0, // 56-59 (0x38-0x3B)
0, 0, 0, 0, // 60-63 (0x3C-0x3F)
};
static const uint8 atten_inc_table[0x40][0x08] = {
{ 0,0,0,0,0,0,0,0 }, { 0,0,0,0,0,0,0,0 }, { 0,1,0,1,0,1,0,1 }, { 0,1,0,1,0,1,0,1 }, // 0-3 (0x00-0x03)
{ 0,1,0,1,0,1,0,1 }, { 0,1,0,1,0,1,0,1 }, { 0,1,1,1,0,1,1,1 }, { 0,1,1,1,0,1,1,1 }, // 4-7 (0x04-0x07)
{ 0,1,0,1,0,1,0,1 }, { 0,1,0,1,1,1,0,1 }, { 0,1,1,1,0,1,1,1 }, { 0,1,1,1,1,1,1,1 }, // 8-11 (0x08-0x0B)
{ 0,1,0,1,0,1,0,1 }, { 0,1,0,1,1,1,0,1 }, { 0,1,1,1,0,1,1,1 }, { 0,1,1,1,1,1,1,1 }, // 12-15 (0x0C-0x0F)
{ 0,1,0,1,0,1,0,1 }, { 0,1,0,1,1,1,0,1 }, { 0,1,1,1,0,1,1,1 }, { 0,1,1,1,1,1,1,1 }, // 16-19 (0x10-0x13)
{ 0,1,0,1,0,1,0,1 }, { 0,1,0,1,1,1,0,1 }, { 0,1,1,1,0,1,1,1 }, { 0,1,1,1,1,1,1,1 }, // 20-23 (0x14-0x17)
{ 0,1,0,1,0,1,0,1 }, { 0,1,0,1,1,1,0,1 }, { 0,1,1,1,0,1,1,1 }, { 0,1,1,1,1,1,1,1 }, // 24-27 (0x18-0x1B)
{ 0,1,0,1,0,1,0,1 }, { 0,1,0,1,1,1,0,1 }, { 0,1,1,1,0,1,1,1 }, { 0,1,1,1,1,1,1,1 }, // 28-31 (0x1C-0x1F)
{ 0,1,0,1,0,1,0,1 }, { 0,1,0,1,1,1,0,1 }, { 0,1,1,1,0,1,1,1 }, { 0,1,1,1,1,1,1,1 }, // 32-35 (0x20-0x23)
{ 0,1,0,1,0,1,0,1 }, { 0,1,0,1,1,1,0,1 }, { 0,1,1,1,0,1,1,1 }, { 0,1,1,1,1,1,1,1 }, // 36-39 (0x24-0x27)
{ 0,1,0,1,0,1,0,1 }, { 0,1,0,1,1,1,0,1 }, { 0,1,1,1,0,1,1,1 }, { 0,1,1,1,1,1,1,1 }, // 40-43 (0x28-0x2B)
{ 0,1,0,1,0,1,0,1 }, { 0,1,0,1,1,1,0,1 }, { 0,1,1,1,0,1,1,1 }, { 0,1,1,1,1,1,1,1 }, // 44-47 (0x2C-0x2F)
{ 1,1,1,1,1,1,1,1 }, { 1,1,1,2,1,1,1,2 }, { 1,2,1,2,1,2,1,2 }, { 1,2,2,2,1,2,2,2 }, // 48-51 (0x30-0x33)
{ 2,2,2,2,2,2,2,2 }, { 2,2,2,4,2,2,2,4 }, { 2,4,2,4,2,4,2,4 }, { 2,4,4,4,2,4,4,4 }, // 52-55 (0x34-0x37)
{ 4,4,4,4,4,4,4,4 }, { 4,4,4,8,4,4,4,8 }, { 4,8,4,8,4,8,4,8 }, { 4,8,8,8,4,8,8,8 }, // 56-59 (0x38-0x3B)
{ 8,8,8,8,8,8,8,8 }, { 8,8,8,8,8,8,8,8 }, { 8,8,8,8,8,8,8,8 }, { 8,8,8,8,8,8,8,8 }, // 60-63 (0x3C-0x3F)
};
unsigned rate = CalcRate(ksr);
if((GlobalEGCycleCounter & ((1 << counter_shift_table[rate]) - 1)) == 0)
{
unsigned sub_cycle = (GlobalEGCycleCounter >> counter_shift_table[rate]) & 0x07;
signed inc_amount = atten_inc_table[rate][sub_cycle];
if(CurPhase == ADSR_ATTACK)
{
if(rate < 0x3E)
{
Attenuation += ((~Attenuation) * inc_amount) >> 4;
if(Attenuation < 0)
{
//printf("%d\n", Attenuation);
Attenuation = 0;
}
}
}
else
{
if(SSG_EG & 0x8)
{
if(Attenuation < 0x200)
{
Attenuation += inc_amount * 4;
}
}
else
Attenuation += inc_amount;
}
if(Attenuation > 0x3FF)
Attenuation = 0x3FF;
CheckPhaseAdvance();
}
}
return(ret);
}
uint32 OpEG::GetOutAttenuation(void)
{
unsigned ret;
if((SSG_EG & 0x08) && (CurPhase != ADSR_RELEASE) && (SSGInvert ^ (bool)(SSG_EG & SSGEG_MASK_ATTACK)))
{
ret = ((0x200 - Attenuation) & 0x3FF);
}
else
ret = Attenuation & 0x3FF;
ret += TL << 3;
if(ret > 0x3FF)
ret = 0x3FF;
return(ret);
}

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# Tell versions [3.59,3.63) of GNU make to not export all variables.
# Otherwise a system limit (for SysV at least) may be exceeded.
.NOEXPORT:

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@ -1,448 +0,0 @@
#ifndef __PCE_VDC_H
#define __PCE_VDC_H
#include "mednafen/lepacker.h"
#define VDC_PIXEL_OUT_MASK 0x01FF
// This bit will be set for a non-sprite pixel if the BG layer is disabled(via ToggleLayer()),
#define VDC_BGDISABLE_OUT_MASK 0x0200
// HSync and VSync out bits are only valid when the EX bits in VDC's CR
// are set so that the VDC will output sync signals rather than
// input them. If it is not configured in this manner, the bit(s) shall always be 0.
#define VDC_HSYNC_OUT_MASK 0x2000
#define VDC_VSYNC_OUT_MASK 0x4000
// The DISP bit can either denote active display area(1 = active, 0 = inactive),
// colorburst insertion period(0 = insert colorburst, 1 = not in colorburst period; may not be emulated correctly),
// or "internal horizontal synchronous signal"(may not be emulated correctly), depending on the TE
// bits in the VDC's CR.
#define VDC_DISP_OUT_MASK 0x8000
#define VDC_REGSETP(_reg, _data, _msb) { _reg &= 0xFF << ((_msb) ? 0 : 8); _reg |= (_data) << ((_msb) ? 8 : 0); }
#define VDC_REGGETP(_reg, _msb) ((_reg >> ((_msb) ? 8 : 0)) & 0xFF)
static const unsigned int vram_inc_tab[4] = { 1, 32, 64, 128 };
#define VDC_IS_BSY (pending_read || pending_write)
typedef struct
{
uint32 x;
uint32 flags;
uint8 palette_index;
uint16 pattern_data[4];
} SPRLE;
typedef struct
{
// In the case the VDC access doesn't cause a VRAM read/write, only ReadCount/WriteCount will be set to 0.
uint32 ReadStart;
uint32 ReadCount;
uint32 WriteStart;
uint32 WriteCount;
} VDC_SimulateResult;
class VDC
{
public:
// The VRAM size is specified in 16-bit words.
VDC(bool nospritelimit, uint32 par_VRAM_Size);
~VDC();
#if 0
void *operator new(size_t bcount)
{
void *ret = calloc(1, bcount);
return(ret);
}
void operator delete(void *ptr)
{
free(ptr);
}
#endif
int32 Reset(void) MDFN_WARN_UNUSED_RESULT;
// ResetSimulate(), SimulateWrite(), and SimulateRead() are intended to handle VRAM read/write breakpoints.
// SimulateWrite() and SimulateRead() will return the VRAM address that will EVENTUALLY be written(upper 32-bits) and/or read(lower 32-bits) to
// due to the access, or 0xFFFFFFFF in the upper or lower 32-bits if no VRAM access of that type occurs.
//
// The feature is intended to support block moves to VRAM in a single instruction. It may not function properly if the address passed to SimulateRead()
// or SimulateWrite() alternates(even if just once) between the data port high byte and control port between calls to ResetSimulate()
// Call to reset simulation state.
INLINE void ResetSimulate(void)
{
Simulate_MAWR = MAWR;
Simulate_MARR = MARR;
Simulate_select = select;
Simulate_CR = CR;
Simulate_LENR = LENR;
}
INLINE void SimulateRead(uint32 A, VDC_SimulateResult *result)
{
result->ReadCount = 0;
result->WriteCount = 0;
result->ReadStart = 0;
result->WriteStart = 0;
if((A & 0x3) == 0x3 && Simulate_select == 0x02)
{
Simulate_MARR += vram_inc_tab[(Simulate_CR >> 11) & 0x3];
result->ReadStart = Simulate_MARR;
result->ReadCount = 1;
}
}
INLINE void SimulateWrite(uint32 A, uint8 V, VDC_SimulateResult *result)
{
result->ReadCount = 0;
result->WriteCount = 0;
result->ReadStart = 0;
result->WriteStart = 0;
const unsigned int msb = A & 1;
switch(A & 0x3)
{
case 0x00: Simulate_select = V & 0x1F;
break;
case 0x02:
case 0x03:
switch(Simulate_select)
{
case 0x00: VDC_REGSETP(Simulate_MAWR, V, msb);
break;
case 0x01: VDC_REGSETP(Simulate_MARR, V, msb);
Simulate_MARR += vram_inc_tab[(Simulate_CR >> 11) & 0x3];
result->ReadStart = Simulate_MARR;
result->ReadCount = 1;
break;
case 0x02: if(msb)
{
result->WriteStart = Simulate_MAWR;
result->WriteCount = 1;
Simulate_MAWR += vram_inc_tab[(Simulate_CR >> 11) & 0x3];
}
break;
case 0x12: VDC_REGSETP(Simulate_LENR, V, msb);
if(msb)
{
result->ReadStart = SOUR;
result->ReadCount = Simulate_LENR + 1;
if(DCR & 0x4)
result->ReadStart = (result->ReadStart - (result->ReadCount - 1)) & 0xFFFF;
result->WriteStart = DESR;
result->WriteCount = Simulate_LENR + 1;
if(DCR & 0x8)
result->WriteStart = (result->WriteStart - (result->WriteCount - 1)) & 0xFFFF;
}
break;
}
break;
}
}
int32 HSync(bool);
int32 VSync(bool);
void Write(uint32 A, uint8 V, int32 &next_event);
uint8 Read(uint32 A, int32 &next_event, bool peek = FALSE);
void Write16(bool A, uint16 V);
uint16 Read16(bool A, bool peek = FALSE);
int32 Run(int32 clocks, /*bool hs, bool vs,*/ uint16 *pixels, bool skip);
void FixTileCache(uint16);
bool ToggleLayer(int);
void RunDMA(int32, bool force_completion = FALSE);
void RunSATDMA(int32, bool force_completion = FALSE);
void IncRCR(void);
void DoVBIRQTest(void);
void HDS_Start(void);
void StateExtra(MDFN::LEPacker &sl_packer, bool load);
int StateAction(StateMem *sm, int load, int data_only, const char *sname);
// Peek(VRAM/SAT) and Poke(VRAM/SAT) work in 16-bit VRAM word units.
INLINE uint16 PeekVRAM(uint16 Address)
{
if(Address < VRAM_Size)
return(VRAM[Address]);
else
return(0);
}
INLINE uint16 PeekSAT(uint8 Address)
{
return(SAT[Address]);
}
INLINE void PokeVRAM(uint16 Address, const uint16 Data)
{
if(Address < VRAM_Size)
{
VRAM[Address] = Data;
FixTileCache(Address);
}
}
INLINE void PokeSAT(uint8 Address, const uint16 Data)
{
SAT[Address] = Data;
}
// Register enums for GetRegister() and SetRegister()
enum
{
GSREG_MAWR = 0,
GSREG_MARR,
GSREG_CR,
GSREG_RCR,
GSREG_BXR,
GSREG_BYR,
GSREG_MWR,
GSREG_HSR,
GSREG_HDR,
GSREG_VSR,
GSREG_VDR,
GSREG_VCR,
GSREG_DCR,
GSREG_SOUR,
GSREG_DESR,
GSREG_LENR,
GSREG_DVSSR,
GSREG_SELECT,
GSREG_STATUS,
__GSREG_COUNT
};
// Pass NULL if you don't want more information about the special meaning of the value in the specified
// register. Otherwise, pass a buffer of at least 256 bytes in size.
uint32 GetRegister(const unsigned int id, char *special, const uint32 special_len);
void SetRegister(const unsigned int id, const uint32 value);
#ifdef WANT_DEBUGGER
bool DoGfxDecode(uint32 *target, const uint32 *color_table, const uint32 TransparentColor, bool DecodeSprites,
int32 w, int32 h, int32 scroll);
#endif
INLINE bool PeekIRQ(void)
{
return((bool)(status & 0x3F));
}
INLINE void SetIRQHook(void (*irqh)(bool))
{
IRQHook = irqh;
}
INLINE void SetWSHook(bool (*wsh)(int32))
{
WSHook = wsh;
}
private:
int TimeFromHDSStartToBYRLatch(void);
int TimeFromBYRLatchToBXRLatch(void);
enum
{
HPHASE_HDS = 0,
HPHASE_HDS_PART2,
HPHASE_HDS_PART3,
HPHASE_HDW,
HPHASE_HDW_FINAL,
HPHASE_HDE,
HPHASE_HSW,
HPHASE_COUNT
};
enum
{
VPHASE_VDS = 0,
VPHASE_VDW,
VPHASE_VCR,
VPHASE_VSW,
VPHASE_COUNT
};
int VRAM_Size; // = 0x8000;
int VRAM_SizeMask; // = VRAM_Size - 1; //0x7FFF;
int VRAM_BGTileNoMask; // = VRAM_SizeMask / 16; //0x7FF;
void (*IRQHook)(bool);
bool (*WSHook)(int32);
void DoWaitStates(void);
void CheckAndCommitPending(void);
INLINE int32 CalcNextEvent(void)
{
int32 next_event = HPhaseCounter;
if(sat_dma_counter > 0 && sat_dma_counter < next_event)
next_event = sat_dma_counter;
if(sprite_cg_fetch_counter > 0 && sprite_cg_fetch_counter < next_event)
next_event = sprite_cg_fetch_counter;
if(DMARunning)
{
assert(VDMA_CycleCounter < 2);
int32 next_vram_dma_event = ((LENR + 1) * 4) - (DMAReadWrite * 2) - VDMA_CycleCounter;
assert(next_vram_dma_event > 0);
if(next_vram_dma_event > 0 && next_vram_dma_event < next_event)
next_event = next_vram_dma_event;
//printf("Next VRAM DMA event: %d(LENR = %d)\n", next_vram_dma_event, LENR);
}
assert(next_event > 0);
return(next_event);
}
bool in_exhsync, in_exvsync;
void CalcWidthStartEnd(uint32 &display_width, uint32 &start, uint32 &end);
void DrawBG(uint16 *target, int enabled);
void DrawSprites(uint16 *target, int enabled);
void FetchSpriteData(void);
uint8 Simulate_select;
uint16 Simulate_MAWR;
uint16 Simulate_MARR;
uint16 Simulate_CR;
uint16 Simulate_LENR;
int32 sat_dma_counter;
uint8 select;
uint16 MAWR; // Memory Address Write Register
uint16 MARR; // Memory Address Read Register
uint16 CR; // Control Register
uint16 CR_cache; // Cache for BG/SPR enable
uint16 RCR; // Raster Compare Register
uint16 BXR; // Background X-Scroll Register
uint16 BYR; // Background Y-Scroll Register
uint16 MWR; // Memory Width Register
uint16 HSR; // Horizontal Sync Register
uint16 HDR; // Horizontal Display Register
uint16 VSR;
uint16 VDR;
uint16 VCR;
uint16 DCR;
uint16 SOUR;
uint16 DESR;
uint16 LENR;
uint16 DVSSR;
// Internal SAT DMA transfer variables.
//uint16 SAT_SOUR;
//uint16 SAT_DESR;
//uint16 SAT_LENR;
int32 VDMA_CycleCounter;
uint32 RCRCount;
bool pending_read;
uint16 pending_read_addr;
uint16 read_buffer;
uint8 write_latch; // LSB
bool pending_write;
uint16 pending_write_addr;
uint16 pending_write_latch;
uint8 status;
uint16 SAT[0x100];
uint16 VRAM[65536]; //VRAM_Size];
union
{
uint64 bg_tile_cache64[65536 / 16][8]; // Tile, y, x
uint8 bg_tile_cache[65536 / 16][8][8];
};
uint16 DMAReadBuffer;
bool DMAReadWrite;
bool DMARunning;
bool DMAPending;
bool SATBPending;
bool burst_mode;
uint32 BG_YOffset; // Reloaded from BYR at start of display area?
uint32 BG_XOffset; // Reloaded from BXR at each scanline, methinks.
uint32 HSW_cache, HDS_cache, HDW_cache, HDE_cache;
uint32 VDS_cache;
uint32 VSW_cache;
uint32 VDW_cache;
uint32 VCR_cache;
uint16 MWR_cache;
uint32 BG_YMoo;
bool NeedRCRInc, NeedVBIRQTest, NeedSATDMATest, NeedBGYInc;
int HPhase, VPhase;
int32 HPhaseCounter, VPhaseCounter;
int32 sprite_cg_fetch_counter;
int32 mystery_counter;
bool mystery_phase;
uint16 linebuf[1024 + 512];
uint32 pixel_desu;
int32 pixel_copy_count;
uint32 userle; // User layer enable.
bool unlimited_sprites;
int active_sprites;
SPRLE SpriteList[64 * 2]; // (see unlimited_sprites option, *2 to accommodate 32-pixel-width sprites ) //16];
};
#endif

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#ifndef __PCE_VDC_H
#define __PCE_VDC_H
#include "mednafen/lepacker.h"
#define VDC_PIXEL_OUT_MASK 0x01FF
// This bit will be set for a non-sprite pixel if the BG layer is disabled(via ToggleLayer()),
#define VDC_BGDISABLE_OUT_MASK 0x0200
// HSync and VSync out bits are only valid when the EX bits in VDC's CR
// are set so that the VDC will output sync signals rather than
// input them. If it is not configured in this manner, the bit(s) shall always be 0.
#define VDC_HSYNC_OUT_MASK 0x2000
#define VDC_VSYNC_OUT_MASK 0x4000
// The DISP bit can either denote active display area(1 = active, 0 = inactive),
// colorburst insertion period(0 = insert colorburst, 1 = not in colorburst period; may not be emulated correctly),
// or "internal horizontal synchronous signal"(may not be emulated correctly), depending on the TE
// bits in the VDC's CR.
#define VDC_DISP_OUT_MASK 0x8000
#define VDC_REGSETP(_reg, _data, _msb) { _reg &= 0xFF << ((_msb) ? 0 : 8); _reg |= (_data) << ((_msb) ? 8 : 0); }
#define VDC_REGGETP(_reg, _msb) ((_reg >> ((_msb) ? 8 : 0)) & 0xFF)
static const unsigned int vram_inc_tab[4] = { 1, 32, 64, 128 };
#define VDC_IS_BSY (pending_read || pending_write)
typedef struct
{
uint32 x;
uint32 flags;
uint8 palette_index;
uint16 pattern_data[4];
} SPRLE;
typedef struct
{
// In the case the VDC access doesn't cause a VRAM read/write, only ReadCount/WriteCount will be set to 0.
uint32 ReadStart;
uint32 ReadCount;
uint32 WriteStart;
uint32 WriteCount;
} VDC_SimulateResult;
class VDC
{
public:
// The VRAM size is specified in 16-bit words.
VDC(bool nospritelimit, uint32 par_VRAM_Size);
~VDC();
#if 0
void *operator new(size_t bcount)
{
void *ret = calloc(1, bcount);
return(ret);
}
void operator delete(void *ptr)
{
free(ptr);
}
#endif
int32 Reset(void) MDFN_WARN_UNUSED_RESULT;
// ResetSimulate(), SimulateWrite(), and SimulateRead() are intended to handle VRAM read/write breakpoints.
// SimulateWrite() and SimulateRead() will return the VRAM address that will EVENTUALLY be written(upper 32-bits) and/or read(lower 32-bits) to
// due to the access, or 0xFFFFFFFF in the upper or lower 32-bits if no VRAM access of that type occurs.
//
// The feature is intended to support block moves to VRAM in a single instruction. It may not function properly if the address passed to SimulateRead()
// or SimulateWrite() alternates(even if just once) between the data port high byte and control port between calls to ResetSimulate()
// Call to reset simulation state.
INLINE void ResetSimulate(void)
{
Simulate_MAWR = MAWR;
Simulate_MARR = MARR;
Simulate_select = select;
Simulate_CR = CR;
Simulate_LENR = LENR;
}
INLINE void SimulateRead(uint32 A, VDC_SimulateResult *result)
{
result->ReadCount = 0;
result->WriteCount = 0;
result->ReadStart = 0;
result->WriteStart = 0;
if((A & 0x3) == 0x3 && Simulate_select == 0x02)
{
Simulate_MARR += vram_inc_tab[(Simulate_CR >> 11) & 0x3];
result->ReadStart = Simulate_MARR;
result->ReadCount = 1;
}
}
INLINE void SimulateWrite(uint32 A, uint8 V, VDC_SimulateResult *result)
{
result->ReadCount = 0;
result->WriteCount = 0;
result->ReadStart = 0;
result->WriteStart = 0;
const unsigned int msb = A & 1;
switch(A & 0x3)
{
case 0x00: Simulate_select = V & 0x1F;
break;
case 0x02:
case 0x03:
switch(Simulate_select)
{
case 0x00: VDC_REGSETP(Simulate_MAWR, V, msb);
break;
case 0x01: VDC_REGSETP(Simulate_MARR, V, msb);
Simulate_MARR += vram_inc_tab[(Simulate_CR >> 11) & 0x3];
result->ReadStart = Simulate_MARR;
result->ReadCount = 1;
break;
case 0x02: if(msb)
{
result->WriteStart = Simulate_MAWR;
result->WriteCount = 1;
Simulate_MAWR += vram_inc_tab[(Simulate_CR >> 11) & 0x3];
}
break;
case 0x12: VDC_REGSETP(Simulate_LENR, V, msb);
if(msb)
{
result->ReadStart = SOUR;
result->ReadCount = Simulate_LENR + 1;
if(DCR & 0x4)
result->ReadStart = (result->ReadStart - (result->ReadCount - 1)) & 0xFFFF;
result->WriteStart = DESR;
result->WriteCount = Simulate_LENR + 1;
if(DCR & 0x8)
result->WriteStart = (result->WriteStart - (result->WriteCount - 1)) & 0xFFFF;
}
break;
}
break;
}
}
int32 HSync(bool);
int32 VSync(bool);
void Write(uint32 A, uint8 V, int32 &next_event);
uint8 Read(uint32 A, int32 &next_event, bool peek = FALSE);
void Write16(bool A, uint16 V);
uint16 Read16(bool A, bool peek = FALSE);
int32 Run(int32 clocks, /*bool hs, bool vs,*/ uint16 *pixels, bool skip);
void FixTileCache(uint16);
void SetLayerEnableMask(uint64 mask);
void RunDMA(int32, bool force_completion = FALSE);
void RunSATDMA(int32, bool force_completion = FALSE);
void IncRCR(void);
void DoVBIRQTest(void);
void HDS_Start(void);
void StateExtra(MDFN::LEPacker &sl_packer, bool load);
int StateAction(StateMem *sm, int load, int data_only, const char *sname);
// Peek(VRAM/SAT) and Poke(VRAM/SAT) work in 16-bit VRAM word units.
INLINE uint16 PeekVRAM(uint16 Address)
{
if(Address < VRAM_Size)
return(VRAM[Address]);
else
return(0);
}
INLINE uint16 PeekSAT(uint8 Address)
{
return(SAT[Address]);
}
INLINE void PokeVRAM(uint16 Address, const uint16 Data)
{
if(Address < VRAM_Size)
{
VRAM[Address] = Data;
FixTileCache(Address);
}
}
INLINE void PokeSAT(uint8 Address, const uint16 Data)
{
SAT[Address] = Data;
}
// Register enums for GetRegister() and SetRegister()
enum
{
GSREG_MAWR = 0,
GSREG_MARR,
GSREG_CR,
GSREG_RCR,
GSREG_BXR,
GSREG_BYR,
GSREG_MWR,
GSREG_HSR,
GSREG_HDR,
GSREG_VSR,
GSREG_VDR,
GSREG_VCR,
GSREG_DCR,
GSREG_SOUR,
GSREG_DESR,
GSREG_LENR,
GSREG_DVSSR,
GSREG_SELECT,
GSREG_STATUS,
__GSREG_COUNT
};
// Pass NULL if you don't want more information about the special meaning of the value in the specified
// register. Otherwise, pass a buffer of at least 256 bytes in size.
uint32 GetRegister(const unsigned int id, char *special, const uint32 special_len);
void SetRegister(const unsigned int id, const uint32 value);
#ifdef WANT_DEBUGGER
bool DoGfxDecode(uint32 *target, const uint32 *color_table, const uint32 TransparentColor, bool DecodeSprites,
int32 w, int32 h, int32 scroll);
#endif
INLINE bool PeekIRQ(void)
{
return((bool)(status & 0x3F));
}
INLINE void SetIRQHook(void (*irqh)(bool))
{
IRQHook = irqh;
}
INLINE void SetWSHook(bool (*wsh)(int32))
{
WSHook = wsh;
}
private:
int TimeFromHDSStartToBYRLatch(void);
int TimeFromBYRLatchToBXRLatch(void);
enum
{
HPHASE_HDS = 0,
HPHASE_HDS_PART2,
HPHASE_HDS_PART3,
HPHASE_HDW,
HPHASE_HDW_FINAL,
HPHASE_HDE,
HPHASE_HSW,
HPHASE_COUNT
};
enum
{
VPHASE_VDS = 0,
VPHASE_VDW,
VPHASE_VCR,
VPHASE_VSW,
VPHASE_COUNT
};
int VRAM_Size; // = 0x8000;
int VRAM_SizeMask; // = VRAM_Size - 1; //0x7FFF;
int VRAM_BGTileNoMask; // = VRAM_SizeMask / 16; //0x7FF;
void (*IRQHook)(bool);
bool (*WSHook)(int32);
void DoWaitStates(void);
void CheckAndCommitPending(void);
INLINE int32 CalcNextEvent(void)
{
int32 next_event = HPhaseCounter;
if(sat_dma_counter > 0 && sat_dma_counter < next_event)
next_event = sat_dma_counter;
if(sprite_cg_fetch_counter > 0 && sprite_cg_fetch_counter < next_event)
next_event = sprite_cg_fetch_counter;
if(DMARunning)
{
assert(VDMA_CycleCounter < 2);
int32 next_vram_dma_event = ((LENR + 1) * 4) - (DMAReadWrite * 2) - VDMA_CycleCounter;
assert(next_vram_dma_event > 0);
if(next_vram_dma_event > 0 && next_vram_dma_event < next_event)
next_event = next_vram_dma_event;
//printf("Next VRAM DMA event: %d(LENR = %d)\n", next_vram_dma_event, LENR);
}
assert(next_event > 0);
return(next_event);
}
bool in_exhsync, in_exvsync;
void CalcWidthStartEnd(uint32 &display_width, uint32 &start, uint32 &end);
void DrawBG(uint16 *target, int enabled);
void DrawSprites(uint16 *target, int enabled);
void FetchSpriteData(void);
uint8 Simulate_select;
uint16 Simulate_MAWR;
uint16 Simulate_MARR;
uint16 Simulate_CR;
uint16 Simulate_LENR;
int32 sat_dma_counter;
uint8 select;
uint16 MAWR; // Memory Address Write Register
uint16 MARR; // Memory Address Read Register
uint16 CR; // Control Register
uint16 CR_cache; // Cache for BG/SPR enable
uint16 RCR; // Raster Compare Register
uint16 BXR; // Background X-Scroll Register
uint16 BYR; // Background Y-Scroll Register
uint16 MWR; // Memory Width Register
uint16 HSR; // Horizontal Sync Register
uint16 HDR; // Horizontal Display Register
uint16 VSR;
uint16 VDR;
uint16 VCR;
uint16 DCR;
uint16 SOUR;
uint16 DESR;
uint16 LENR;
uint16 DVSSR;
// Internal SAT DMA transfer variables.
//uint16 SAT_SOUR;
//uint16 SAT_DESR;
//uint16 SAT_LENR;
int32 VDMA_CycleCounter;
uint32 RCRCount;
bool pending_read;
uint16 pending_read_addr;
uint16 read_buffer;
uint8 write_latch; // LSB
bool pending_write;
uint16 pending_write_addr;
uint16 pending_write_latch;
uint8 status;
uint16 SAT[0x100];
uint16 VRAM[65536]; //VRAM_Size];
union
{
uint64 bg_tile_cache64[65536 / 16][8]; // Tile, y, x
uint8 bg_tile_cache[65536 / 16][8][8];
};
uint16 DMAReadBuffer;
bool DMAReadWrite;
bool DMARunning;
bool DMAPending;
bool SATBPending;
bool burst_mode;
uint32 BG_YOffset; // Reloaded from BYR at start of display area?
uint32 BG_XOffset; // Reloaded from BXR at each scanline, methinks.
uint32 HSW_cache, HDS_cache, HDW_cache, HDE_cache;
uint32 VDS_cache;
uint32 VSW_cache;
uint32 VDW_cache;
uint32 VCR_cache;
uint16 MWR_cache;
uint32 BG_YMoo;
bool NeedRCRInc, NeedVBIRQTest, NeedSATDMATest, NeedBGYInc;
int HPhase, VPhase;
int32 HPhaseCounter, VPhaseCounter;
int32 sprite_cg_fetch_counter;
int32 mystery_counter;
bool mystery_phase;
uint16 linebuf[1024 + 512];
uint32 pixel_desu;
int32 pixel_copy_count;
uint32 userle; // User layer enable.
bool unlimited_sprites;
int active_sprites;
SPRLE SpriteList[64 * 2]; // (see unlimited_sprites option, *2 to accommodate 32-pixel-width sprites ) //16];
};
#endif

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@ -1,19 +0,0 @@
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# cart/ssp16.c
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libmd_a_SOURCES += cd/cd.cpp cd/timer.cpp cd/interrupt.cpp cd/pcm.cpp cd/cdc_cdd.cpp
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libmd_a_SOURCES += debug.cpp
endif

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@ -1,728 +0,0 @@
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install-strip installcheck installcheck-am installdirs \
maintainer-clean maintainer-clean-generic mostlyclean \
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# Tell versions [3.59,3.63) of GNU make to not export all variables.
# Otherwise a system limit (for SysV at least) may be exceeded.
.NOEXPORT:

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/* Mednafen - Multi-system Emulator
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "../shared.h"
#include "cart.h"
#include "map_rom.h"
#include "map_sram.h"
#include "map_eeprom.h"
#include "map_svp.h"
#include "map_realtec.h"
#include "map_ssf2.h"
#include "map_ff.h"
#include "map_rmx3.h"
#include "map_sbb.h"
#include "map_yase.h"
#include "../header.h"
#include "../../md5.h"
#include "../../general.h"
#include <ctype.h>
static MD_Cart_Type *cart_hardware = NULL;
static uint32 Cart_ROM_Size;
void MDCart_Write8(uint32 A, uint8 V)
{
cart_hardware->Write8(A, V);
}
void MDCart_Write16(uint32 A, uint16 V)
{
cart_hardware->Write16(A, V);
}
uint8 MDCart_Read8(uint32 A)
{
return(cart_hardware->Read8(A));
}
uint16 MDCart_Read16(uint32 A)
{
return(cart_hardware->Read16(A));
}
void MDCart_Reset(void)
{
cart_hardware->Reset();
}
// MD_Cart_Type* (*MapperMake)(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size);
// MD_Make_Cart_Type_REALTEC
// MD_Make_Cart_Type_SSF2
// Final Fantasy
// MD_Make_Cart_Type_FF
// MD_Make_Cart_Type_RMX3
// MD_Make_Cart_Type_SBB
// MD_Make_Cart_Type_YaSe
typedef struct
{
// Set any field to 0(or -1 for signed fields) to ignore it
const char *id;
const uint64 md5;
const uint64 header_md5;
const char *mapper;
// Overrides for bad headers
const uint32 sram_type;
const int32 sram_start;
const int32 sram_end;
const uint32 region_support;
} game_db_t;
static game_db_t GamesDB[] =
{
// Balloon Boy
{ NULL, 0, 0xa9509f505d00db6eULL, "REALTEC", 0, 0, 0, 0 },
// Earth Defend
{ NULL, 0, 0xcf6afbf45299a800ULL, "REALTEC", 0, 0, 0, 0 },
// Whac a Critter
{ NULL, 0, 0x5499d14fcef32f60ULL, "REALTEC", 0, 0, 0, 0 },
// Super Street Fighter II
{ "T-12056 -00", 0, 0, "SSF2", 0, 0, 0, 0 },
{ "T-12043 -00", 0, 0, "SSF2", 0, 0, 0, 0 },
// "Conquering the world III 0x3fff"
// "Xin Qi Gai Wing Zi", "
// 0xFFFF, 0x400000, 0x40ffff
// "Rings of Power", 0x200000 0x203fff
// Final Fantasy
{ NULL, 0, 0x7c0e11c426d65105ULL, "FF", 0, 0, 0, 0 },
{ NULL, 0, 0xe144baf931c8b61eULL, "FF", 0, 0, 0, 0 },
// Rockman X3
{ NULL, 0, 0x1d1add6f2a64fb99ULL, "RMX3", 0, 0, 0, 0 },
// Super Bubble Bobble
{ NULL, 0, 0x8eff5373b653111eULL, "SBB", 0, 0, 0, 0 },
// Ya-Se Chuan Shuo
{ NULL, 0, 0x2786df4902ef8856ULL, "YaSe", 0, 0, 0, 0 },
// Virtua Racing
{ "MK-1229 -00", 0, 0, "SVP", 0, 0, 0, 0 },
/***************************************
//
// SRAM-related header corrections
//
***************************************/
// Chaoji Dafuweng
{ NULL, 0, 0x13639e87230c85aaULL, NULL, 0x5241f820, 0x200001, 0x200fff, 0 },
// Psy-O-Blade
{ "T-26013 -00", 0, 0, NULL, 0x5241f820, 0x200000, 0x203fff, 0 },
// Sonic and Knuckles and Sonic 3
{ NULL, 0xde0ac4e17a844d10ULL, 0, NULL, 0x5241f820, 0x200000, 0x2003ff, 0 },
// Starflight
{ "T-50216 -00", 0, 0, NULL, 0x5241f820, 0x200000, 0x203fff, 0 },
{ "T-50216 -01", 0, 0, NULL, 0x5241f820, 0x200000, 0x203fff, 0 },
// Taiwan Tycoon(TODO)
// Top Shooter
{ NULL, 0, 0x31fea3093b231863ULL, NULL, 0x5241f820, 0x200001, 0x203fff, 0 },
// World Pro Baseball 94
{ NULL, 0, 0xe7bb31787f189ebeULL, NULL, 0x5241f820, 0x200001, 0x20ffff, 0 },
/***************************************
//
// EEPROM Carts
//
***************************************/
//
// Acclaim
//
// NBA Jam (UE)
{"T-081326 00", 0, 0, "Acclaim_24C02_Old", 0, 0, 0, 0 },
// NBA Jam (J)
{"T-81033 00", 0, 0, "Acclaim_24C02_Old", 0, 0, 0, 0 },
// NFL Quarterback Club
{"T-081276 00", 0, 0, "Acclaim_24C02", 0, 0, 0, 0 },
// NBA Jam TE
{"T-81406 -00", 0, 0, "Acclaim_24C04", 0, 0, 0, 0 },
// NFL Quarterback Club '96
{"T-081586-00", 0, 0, "Acclaim_24C16", 0, 0, 0, 0 },
// College Slam
{"T-81576 -00", 0, 0, "Acclaim_24C65", 0, 0, 0, 0 },
// Frank Thomas Big Hurt Baseball
{"T-81476 -00", 0, 0, "Acclaim_24C65", 0, 0, 0, 0 },
//
// EA
//
// Rings of Power
{"T-50176 -00", 0, 0, "EA_24C01", 0, 0, 0, 0 },
// NHLPA Hockey 93 (UE)
{"T-50396 -00", 0, 0, "EA_24C01", 0, 0, 0, 0 },
// John Madden Football 93
{"T-50446 -00", 0, 0, "EA_24C01", 0, 0, 0, 0 },
// John Madden Football 93 (Championship Edition)
{"T-50516 -00", 0, 0, "EA_24C01", 0, 0, 0, 0 },
// Bill Walsh College Football
{"T-50606 -00", 0, 0, "EA_24C01", 0, 0, 0, 0 },
//
// Sega
//
// Megaman - The Wily Wars
{"T-12046 -00", 0, 0, "Sega_24C01", 0, 0, 0, 0 },
// Rockman Mega World (J)
{"T-12053 -00", 0, 0x969a9e19a5850e7cULL, "Sega_24C01", 0, 0, 0, 0 }, // Hash necessary due to hacked RAM-using version floating around.
// Evander 'Real Deal' Holyfield's Boxing
{"MK-1215 -00", 0, 0, "Sega_24C01", 0, 0, 0, 0 },
// Greatest Heavyweights of the Ring (U)
{"MK-1228 -00", 0, 0, "Sega_24C01", 0, 0, 0, 0 },
// Greatest Heavyweights of the Ring (J)
{"G-5538 -00", 0, 0, "Sega_24C01", 0, 0, 0, 0 },
// Greatest Heavyweights of the Ring (E)
{"PR-1993 -00", 0, 0, "Sega_24C01", 0, 0, 0, 0 }, // Confirm correct product code.
// Wonderboy in Monster World
{"G-4060 -00", 0, 0, "Sega_24C01", 0, 0, 0, 0 },
// Sports Talk Baseball
{"00001211-00", 0, 0, "Sega_24C01", 0, 0, 0, 0 },
// Honoo no Toukyuuji Dodge Danpei
{"_00004076-00", 0, 0, "Sega_24C01", 0, 0, 0, 0 },
// Ninja Burai Densetsu
{"G-4524 -00", 0, 0, "Sega_24C01", 0, 0, 0, 0 },
// Game Toshokan
{"00054503-00", 0, 0, "Sega_24C01", 0, 0, 0, 0 },
//
// Codemasters
//
// Brian Lara Cricket
{"T-120106-00", 0, 0, "Codemasters_24C08", 0, 0, 0, 0 },
{"T-120106-50", 0, 0, "Codemasters_24C08", 0, 0, 0, 0 },
// Micro Machines Military
{ NULL, 0, 0x34253755ee0eed41ULL, "Codemasters_24C08", 0, 0, 0, 0 },
// Micro Machines Military (bad)
{ NULL, 0, 0x3241b7da6ce42fecULL, "Codemasters_24C08", 0, 0, 0, 0 },
// Micro Machines 2 - Turbo Tournament (E)
{"T-120096-50", 0, 0, "Codemasters_24C16", 0, 0, 0, 0 },
// Micro Machines Turbo Tournament 96
{NULL, 0, 0xe672e84fed6ce270ULL, "Codemasters_24C16", 0, 0, 0, 0 },
// Micro Machines Turbo Tournament 96 (bad)
{NULL, 0, 0x290afe3cd27be26cULL, "Codemasters_24C16", 0, 0, 0, 0 },
// Brian Lara Cricket 96, Shane Warne Cricket
{"T-120146-50", 0, 0, "Codemasters_24C65", 0, 0, 0, 0 },
//
// End EEPROM carts
//
/*
** Header region corrections
*/
/*
REGIONMASK_JAPAN_NTSC = 1,
REGIONMASK_JAPAN_PAL = 2,
REGIONMASK_OVERSEAS_NTSC = 4,
REGIONMASK_OVERSEAS_PAL = 8
REGIONMASK_JAPAN_NTSC
*/
};
typedef struct
{
const char *boardname;
MD_Cart_Type *(*MapperMake)(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size,
const uint32 iparam, const char *sparam);
const uint32 iparam;
const char *sparam;
} BoardHandler_t;
static BoardHandler_t BoardHandlers[] =
{
{ "ROM", MD_Make_Cart_Type_ROM, 0, NULL },
{ "SRAM", MD_Make_Cart_Type_SRAM, 0, NULL },
{ "SVP", MD_Make_Cart_Type_SVP, 0, NULL },
{ "REALTEC", MD_Make_Cart_Type_REALTEC, 0, NULL },
{ "SSF2", MD_Make_Cart_Type_SSF2, 0, NULL },
{ "FF", MD_Make_Cart_Type_FF, 0, NULL },
{ "RMX3", MD_Make_Cart_Type_RMX3, 0, NULL },
{ "SBB", MD_Make_Cart_Type_SBB, 0, NULL },
{ "YaSe", MD_Make_Cart_Type_YaSe, 0, NULL },
{ "Acclaim_24C02_Old", MD_Make_Cart_Type_EEPROM, EEP_ACCLAIM_24C02_OLD, NULL },
{ "Acclaim_24C02", MD_Make_Cart_Type_EEPROM, EEP_ACCLAIM_24C02, NULL },
{ "Acclaim_24C04", MD_Make_Cart_Type_EEPROM, EEP_ACCLAIM_24C04, NULL },
{ "Acclaim_24C16", MD_Make_Cart_Type_EEPROM, EEP_ACCLAIM_24C16, NULL },
{ "Acclaim_24C65", MD_Make_Cart_Type_EEPROM, EEP_ACCLAIM_24C65, NULL },
{ "EA_24C01", MD_Make_Cart_Type_EEPROM, EEP_EA_24C01, NULL },
{ "Sega_24C01", MD_Make_Cart_Type_EEPROM, EEP_SEGA_24C01, NULL },
{ "Codemasters_24C08", MD_Make_Cart_Type_EEPROM, EEP_CM_24C08, NULL },
{ "Codemasters_24C16", MD_Make_Cart_Type_EEPROM, EEP_CM_24C16, NULL },
{ "Codemasters_24C65", MD_Make_Cart_Type_EEPROM, EEP_CM_24C65, NULL },
{ NULL, NULL, 0, NULL },
};
bool MDCart_TestMagic(const char *name, MDFNFILE *fp)
{
if(fp->size < 512)
return(FALSE);
//if((fp->size & 512) && fp->data[0x01] == 0x03 && fp->data[0x08] == 0xAA && fp->data[0x09] == 0xBB && fp->data[0x0A] == 0x06)
// return(TRUE);
if(!memcmp(fp->data + 0x100, "SEGA MEGA DRIVE", 15) || !memcmp(fp->data + 0x100, "SEGA GENESIS", 12) || !memcmp(fp->data + 0x100, "SEGA 32X", 8))
return(TRUE);
if((!memcmp(fp->data + 0x100, "SEGA", 4) || !memcmp(fp->data + 0x100, " SEGA", 5)) && !strcmp(fp->ext, "bin"))
return(TRUE);
if(!strcmp(fp->ext, "gen") || !strcmp(fp->ext, "md"))
return(TRUE);
return(FALSE);
}
int MDCart_Load(md_game_info *ginfo, const char *name, MDFNFILE *fp)
{
const char *mapper = NULL;
md5_context md5;
MD_ReadSegaHeader(fp->data + 0x100, ginfo);
Cart_ROM_Size = fp->size;
cart_rom = (uint8 *)MDFN_calloc(1, Cart_ROM_Size, _("Cart ROM"));
memcpy(cart_rom, fp->data, fp->size);
ginfo->rom_size = Cart_ROM_Size = fp->size;
md5.starts();
md5.update(fp->data, fp->size);
md5.finish(ginfo->md5);
md5.starts();
md5.update(fp->data + 0x100, 0x100);
md5.finish(ginfo->info_header_md5);
ginfo->checksum_real = 0;
for(uint32 i = 0x200; i < fp->size; i += 2)
{
ginfo->checksum_real += cart_rom[i + 0] << 8;
ginfo->checksum_real += cart_rom[i + 1] << 0;
}
// Rockman MegaWorld: 5241e840
// Sonic 3: 5241f820
uint32 sram_type = READ_32_MSB(cart_rom, 0x1B0);
uint32 sram_start = READ_32_MSB(cart_rom, 0x1B4);
uint32 sram_end = READ_32_MSB(cart_rom, 0x1B8);
{
uint64 hmd5_partial = 0;
uint64 md5_partial = 0;
for(int i = 0; i < 8; i++)
{
hmd5_partial |= (uint64)ginfo->info_header_md5[15 - i] << (8 * i);
md5_partial |= (uint64)ginfo->md5[15 - i] << (8 * i);
}
printf("Real: 0x%016llxULL Header: 0x%016llxULL\n", (unsigned long long)md5_partial, (unsigned long long)hmd5_partial);
for(unsigned int i = 0; i < sizeof(GamesDB) / sizeof(game_db_t); i++)
{
bool found = true;
if(GamesDB[i].header_md5 && GamesDB[i].header_md5 != hmd5_partial)
found = false;
if(GamesDB[i].md5 && GamesDB[i].md5 != md5_partial)
found = false;
if(GamesDB[i].id && strcmp(GamesDB[i].id, ginfo->product_code))
found = false;
if(found)
{
if(GamesDB[i].mapper)
mapper = GamesDB[i].mapper;
if(GamesDB[i].sram_type != ~0U)
sram_type = GamesDB[i].sram_type;
if(GamesDB[i].sram_start > 0)
sram_start = GamesDB[i].sram_start;
if(GamesDB[i].sram_end > 0)
sram_end = GamesDB[i].sram_end;
if(GamesDB[i].region_support > 0)
ginfo->region_support = GamesDB[i].region_support;
break;
}
}
}
printf("%08x, %08x, %08x\n", sram_type, sram_start, sram_end);
if(sram_type == 0x5241f820 && sram_start == 0x20202020)
sram_type = 0x20202020;
ginfo->sram_type = sram_type;
ginfo->sram_start = sram_start;
ginfo->sram_end = sram_end;
if(!mapper)
{
if(sram_type == 0x5241f820)
mapper = "SRAM";
else if(sram_type == 0x5241e840)
mapper = "Sega_24C01";
else
mapper = "ROM";
}
{
const BoardHandler_t *bh = BoardHandlers;
bool BoardFound = FALSE;
printf("Mapper: %s\n", mapper);
while(bh->boardname)
{
if(!strcasecmp(bh->boardname, mapper))
{
cart_hardware = bh->MapperMake(ginfo, cart_rom, Cart_ROM_Size, bh->iparam, bh->sparam);
BoardFound = TRUE;
break;
}
bh++;
}
if(!BoardFound)
{
MDFN_printf(_("Handler for mapper/board \"%s\" not found!\n"), mapper);
return(0);
}
}
//MD_Cart_Type* (*MapperMake)(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size) = NULL;
//cart_hardware = MapperMake(ginfo, cart_rom, Cart_ROM_Size);
return(1);
}
bool MDCart_LoadNV(void)
{
// Load any saved RAM/EEPROM now!
if(cart_hardware->GetNVMemorySize())
{
uint32 sizeof_buf = cart_hardware->GetNVMemorySize();
uint8 *buf = new uint8[sizeof_buf];
memset(buf, 0, sizeof(buf));
gzFile sp;
if((sp = gzopen(MDFN_MakeFName(MDFNMKF_SAV, 0, "sav").c_str(), "rb")))
{
if(gzread(sp, buf, sizeof_buf) == sizeof_buf)
{
cart_hardware->WriteNVMemory(buf);
}
gzclose(sp);
}
delete[] buf;
}
return(TRUE);
}
bool MDCart_Close(void)
{
if(cart_hardware)
{
if(cart_hardware->GetNVMemorySize())
{
uint32 sizeof_buf = cart_hardware->GetNVMemorySize();
uint8* buf = new uint8[sizeof_buf];
cart_hardware->ReadNVMemory(buf);
MDFN_DumpToFile(MDFN_MakeFName(MDFNMKF_SAV, 0, "sav").c_str(), 6, buf, sizeof_buf);
delete[] buf;
}
delete cart_hardware;
cart_hardware = NULL;
}
return(TRUE);
}
int MDCart_StateAction(StateMem *sm, int load, int data_only)
{
return(cart_hardware->StateAction(sm, load, data_only, "CARTBOARD"));
}

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#ifndef __MDFN_MD_CART_H
#define __MDFN_MD_CART_H
#include "../header.h"
void MDCart_Write8(uint32 address, uint8 value);
void MDCart_Write16(uint32 address, uint16 value);
uint8 MDCart_Read8(uint32 address);
uint16 MDCart_Read16(uint32 address);
void MDCart_Reset(void);
int MDCart_Load(md_game_info *ginfo, const char *name, MDFNFILE *fp);
bool MDCart_TestMagic(const char *name, MDFNFILE *fp);
bool MDCart_LoadNV(void);
bool MDCart_Close(void);
int MDCart_StateAction(StateMem *sm, int load, int data_only);
class MD_Cart_Type
{
public:
MD_Cart_Type()
{
}
MD_Cart_Type(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size)
{
}
virtual ~MD_Cart_Type()
{
}
// Hard reset
virtual void Reset(void)
{
}
virtual void Write8(uint32 A, uint8 V)
{
}
virtual void Write16(uint32 A, uint8 V)
{
}
virtual uint8 Read8(uint32 A)
{
return(0xFF);
}
virtual uint16 Read16(uint32 A)
{
return(0xFF);
}
virtual int StateAction(StateMem *sm, int load, int data_only, const char *section_name)
{
return(1);
}
// In bytes
virtual uint32 GetNVMemorySize(void)
{
return(0);
}
virtual void ReadNVMemory(uint8 *buffer)
{
}
virtual void WriteNVMemory(const uint8 *buffer)
{
}
};
#endif

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/* Mednafen - Multi-system Emulator
*
* Copyright (C) 2007, 2008, 2009 EkeEke
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
Genesis Plus GX EEPROM emulation modified 2011 for usage in Mednafen
*/
#include "../shared.h"
#include "cart.h"
#include "map_eeprom.h"
typedef enum
{
STAND_BY = 0,
WAIT_STOP,
GET_SLAVE_ADR,
GET_WORD_ADR_7BITS,
GET_WORD_ADR_HIGH,
GET_WORD_ADR_LOW,
WRITE_DATA,
READ_DATA,
} T_EEPROM_STATE;
/* this defines the type of EEPROM inside the game cartridge as Backup RAM
*
* Here are some notes from 8BitWizard (http://www.spritesmind.net/_GenDev/forum):
*
* Mode 1 (7-bit) - the chip takes a single byte with a 7-bit memory address and a R/W bit (24C01)
* Mode 2 (8-bit) - the chip takes a 7-bit device address and R/W bit followed by an 8-bit memory address;
* the device address may contain up to three more memory address bits (24C01 - 24C16).
* You can also string eight 24C01, four 24C02, two 24C08, or various combinations, set their address config lines correctly,
* and the result appears exactly the same as a 24C16
* Mode 3 (16-bit) - the chip takes a 7-bit device address and R/W bit followed by a 16-bit memory address (24C32 and larger)
*
* Also, while most 24Cxx are addressed at 200000-2FFFFF, I have found two different ways of mapping the control lines.
* EA uses SDA on D7 (read/write) and SCL on D6 (write only), and I have found boards using different mapping (I think Accolade)
* which uses D1-read=SDA, D0-write=SDA, D1-write=SCL. Accolade also has a custom-chip mapper which may even use a third method.
*/
typedef struct
{
uint8 address_bits; /* number of bits needed to address memory: 7, 8 or 16 */
uint16 size_mask; /* depends on the max size of the memory (in bytes) */
uint16 pagewrite_mask; /* depends on the maximal number of bytes that can be written in a single write cycle */
uint32 sda_in_adr; /* 68000 memory address mapped to SDA_IN */
uint32 sda_out_adr; /* 68000 memory address mapped to SDA_OUT */
uint32 scl_adr; /* 68000 memory address mapped to SCL */
uint8 sda_in_bit; /* bit offset for SDA_IN */
uint8 sda_out_bit; /* bit offset for SDA_OUT */
uint8 scl_bit; /* bit offset for SCL */
} T_EEPROM_TYPE;
typedef struct
{
int board_type;
T_EEPROM_TYPE type;
} EEPROM_Config;
static const EEPROM_Config database[EEP_TOTAL] =
{
/* ACCLAIM mappers */
/* 24C02 (old mapper) */
{ EEP_ACCLAIM_24C02_OLD,{8, 0xFF, 0xFF, 0x200001, 0x200001, 0x200001, 0, 1, 1}},
/* 24C02 */
{ EEP_ACCLAIM_24C02, {8, 0xFF, 0xFF, 0x200001, 0x200001, 0x200000, 0, 0, 0}},
/* 24C04 */
{ EEP_ACCLAIM_24C04, {8, 0x1FF, 0x1FF, 0x200001, 0x200001, 0x200000, 0, 0, 0}},
/* 24C16 */
{ EEP_ACCLAIM_24C16, {8, 0x7FF, 0x7FF, 0x200001, 0x200001, 0x200000, 0, 0, 0}},
/* 24C65 */
{EEP_ACCLAIM_24C65, {16, 0x1FFF, 0x1FFF, 0x200001, 0x200001, 0x200000, 0, 0, 0}},
/* EA mapper (24C01 only) */
{ EEP_EA_24C01, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 7, 7, 6}},
/* SEGA mapper (24C01 only) */
{ EEP_SEGA_24C01, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 0, 0, 1}},
/* CODEMASTERS mapper */
/* 24C08 */
{ EEP_CM_24C08, {8, 0x3FF, 0x3FF, 0x300000, 0x380001, 0x300000, 0, 7, 1}},
/* 24C16 */
{ EEP_CM_24C16, {8, 0x7FF, 0x7FF, 0x300000, 0x380001, 0x300000, 0, 7, 1}},
/* 24C65 */
{ EEP_CM_24C65, {16, 0x1FFF, 0x1FFF, 0x300000, 0x380001, 0x300000, 0, 7, 1}}
};
class MD_Cart_Type_EEPROM : public MD_Cart_Type
{
public:
MD_Cart_Type_EEPROM(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const int BoardType);
virtual ~MD_Cart_Type_EEPROM();
virtual void Reset(void);
virtual void Write8(uint32 A, uint8 V);
virtual void Write16(uint32 A, uint8 V);
virtual uint8 Read8(uint32 A);
virtual uint16 Read16(uint32 A);
virtual int StateAction(StateMem *sm, int load, int data_only, const char *section_name);
// In bytes
virtual uint32 GetNVMemorySize(void);
virtual void ReadNVMemory(uint8 *buffer);
virtual void WriteNVMemory(const uint8 *buffer);
private:
void WriteEEPROM(unsigned int address, unsigned int value, bool word_access);
unsigned int ReadEEPROM(unsigned int address, bool word_access);
const uint8 *rom;
uint32 rom_size;
void Detect_START();
void Detect_STOP();
uint8 sda; /* current /SDA line state */
uint8 scl; /* current /SCL line state */
uint8 old_sda; /* previous /SDA line state */
uint8 old_scl; /* previous /SCL line state */
uint8 cycles; /* current operation cycle number (0-9) */
uint8 rw; /* operation type (1:READ, 0:WRITE) */
uint16 slave_mask; /* device address (shifted by the memory address width)*/
uint16 word_address; /* memory address */
uint8 *sram;
T_EEPROM_STATE state; /* current operation state */
T_EEPROM_TYPE type; /* EEPROM characteristics for this game */
};
MD_Cart_Type_EEPROM::MD_Cart_Type_EEPROM(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const int BoardType)
{
bool found_board_type = FALSE;
this->rom = ROM;
this->rom_size = ROM_size;
/* initialize eeprom */
sda = old_sda = 1;
scl = old_scl = 1;
state = STAND_BY;
for(int i = 0; i < EEP_TOTAL; i++)
{
if(database[i].board_type == BoardType)
{
memcpy(&type, &database[i].type, sizeof(T_EEPROM_TYPE));
found_board_type = TRUE;
break;
}
}
// Debugging sanity check
if(!found_board_type)
throw(0);
/* set SRAM start & end address */
if(!(sram = (uint8 *)MDFN_malloc(type.size_mask + 1, _("Cart EEPROM"))))
{
// FIXME
throw(-1);
}
memset(sram, 0xFF, type.size_mask + 1);
}
MD_Cart_Type_EEPROM::~MD_Cart_Type_EEPROM()
{
if(sram)
MDFN_free(sram);
}
INLINE void MD_Cart_Type_EEPROM::Detect_START()
{
if (old_scl && scl)
{
if (old_sda && !sda)
{
cycles = 0;
slave_mask = 0;
if (type.address_bits == 7)
{
word_address = 0;
state = GET_WORD_ADR_7BITS;
}
else state = GET_SLAVE_ADR;
}
}
}
INLINE void MD_Cart_Type_EEPROM::Detect_STOP()
{
if (old_scl && scl)
{
if (!old_sda && sda)
{
state = STAND_BY;
}
}
}
void MD_Cart_Type_EEPROM::Reset(void)
{
sda = old_sda = 1;
scl = old_scl = 1;
state = STAND_BY;
cycles = 0;
rw = 0;
slave_mask = 0;
word_address = 0;
}
void MD_Cart_Type_EEPROM::WriteEEPROM(unsigned int address, unsigned int data, bool word_access)
{
/* decode SCL and SDA value */
if (word_access)
{
/* 16-bits access */
if (type.sda_in_adr == address) sda = (data >> (8 + type.sda_in_bit)) & 1; /* MSB */
else if (type.sda_in_adr == (address | 1)) sda = (data >> type.sda_in_bit) & 1; /* LSB */
else sda = old_sda;
if (type.scl_adr == address) scl = (data >> (8 + type.scl_bit)) & 1; /* MSB */
else if (type.scl_adr == (address | 1)) scl = (data >> type.scl_bit) & 1; /* LSB */
else scl = old_scl;
}
else
{
if (type.sda_in_adr == address) sda = (data >> type.sda_in_bit) & 1;
else sda = old_sda;
if (type.scl_adr == address) scl = (data >> type.scl_bit) & 1;
else scl = old_scl;
}
/* EEPROM current state */
switch (state)
{
/* Standby Mode */
case STAND_BY:
Detect_START();
Detect_STOP();
break;
/* Suspended Mode */
case WAIT_STOP:
Detect_STOP();
break;
/* Get Word Address 7 bits: MODE-1 only (24C01)
* and R/W bit
*/
case GET_WORD_ADR_7BITS:
Detect_START();
Detect_STOP();
/* look for SCL LOW to HIGH transition */
if (!old_scl && scl)
{
if (cycles == 0) cycles ++;
}
/* look for SCL HIGH to LOW transition */
if (old_scl && !scl && (cycles > 0))
{
if (cycles < 8)
{
word_address |= (old_sda << (7 - cycles));
}
else if (cycles == 8)
{
rw = old_sda;
}
else
{ /* ACK CYCLE */
cycles = 0;
word_address &= type.size_mask;
state = rw ? READ_DATA : WRITE_DATA;
}
cycles ++;
}
break;
/* Get Slave Address (3bits) : MODE-2 & MODE-3 only (24C01 - 24C512) (0-3bits, depending on the array size)
* or/and Word Address MSB: MODE-2 only (24C04 - 24C16) (0-3bits, depending on the array size)
* and R/W bit
*/
case GET_SLAVE_ADR:
Detect_START();
Detect_STOP();
/* look for SCL LOW to HIGH transition */
if (!old_scl && scl)
{
if (cycles == 0) cycles ++;
}
/* look for SCL HIGH to LOW transition */
if (old_scl && !scl && (cycles > 0))
{
if ((cycles > 4) && (cycles <8))
{
if ((type.address_bits == 16) ||
(type.size_mask < (1 << (15 - cycles))))
{
/* this is a SLAVE ADDRESS bit */
slave_mask |= (old_sda << (7 - cycles));
}
else
{
/* this is a WORD ADDRESS high bit */
if (old_sda) word_address |= (1 << (15 - cycles));
else word_address &= ~(1 << (15 - cycles));
}
}
else if (cycles == 8) rw = old_sda;
else if (cycles > 8)
{
/* ACK CYCLE */
cycles = 0;
if (type.address_bits == 16)
{
/* two ADDRESS bytes */
state = rw ? READ_DATA : GET_WORD_ADR_HIGH;
slave_mask <<= 16;
}
else
{
/* one ADDRESS byte */
state = rw ? READ_DATA : GET_WORD_ADR_LOW;
slave_mask <<= 8;
}
}
cycles ++;
}
break;
/* Get Word Address MSB (4-8bits depending on the array size)
* MODE-3 only (24C32 - 24C512)
*/
case GET_WORD_ADR_HIGH:
Detect_START();
Detect_STOP();
/* look for SCL HIGH to LOW transition */
if (old_scl && !scl)
{
if (cycles < 9)
{
if ((type.size_mask + 1) < (1 << (17 - cycles)))
{
/* ignored bit: slave mask should be right-shifted by one */
slave_mask >>= 1;
}
else
{
/* this is a WORD ADDRESS high bit */
if (old_sda) word_address |= (1 << (16 - cycles));
else word_address &= ~(1 << (16 - cycles));
}
cycles ++;
}
else
{
/* ACK CYCLE */
cycles = 1;
state = GET_WORD_ADR_LOW;
}
}
break;
/* Get Word Address LSB: 7bits (24C01) or 8bits (24C02-24C512)
* MODE-2 and MODE-3 only (24C01 - 24C512)
*/
case GET_WORD_ADR_LOW:
Detect_START();
Detect_STOP();
/* look for SCL HIGH to LOW transition */
if (old_scl && !scl)
{
if (cycles < 9)
{
if ((type.size_mask + 1) < (1 << (9 - cycles)))
{
/* ignored bit (X24C01): slave mask should be right-shifted by one */
slave_mask >>= 1;
}
else
{
/* this is a WORD ADDRESS high bit */
if (old_sda) word_address |= (1 << (8 - cycles));
else word_address &= ~(1 << (8 - cycles));
}
cycles ++;
}
else
{
/* ACK CYCLE */
cycles = 1;
word_address &= type.size_mask;
state = WRITE_DATA;
}
}
break;
/*
* Read Cycle
*/
case READ_DATA:
Detect_START();
Detect_STOP();
/* look for SCL HIGH to LOW transition */
if (old_scl && !scl)
{
if (cycles < 9) cycles ++;
else
{
cycles = 1;
/* ACK not received */
if (old_sda) state = WAIT_STOP;
}
}
break;
/*
* Write Cycle
*/
case WRITE_DATA:
Detect_START();
Detect_STOP();
/* look for SCL HIGH to LOW transition */
if (old_scl && !scl)
{
if (cycles < 9)
{
/* Write DATA bits (max 64kBytes) */
uint16 sram_address = (slave_mask | word_address) & 0xFFFF;
if (old_sda) sram[sram_address] |= (1 << (8 - cycles));
else sram[sram_address] &= ~(1 << (8 - cycles));
if (cycles == 8)
{
/* WORD ADDRESS is incremented (roll up at maximum pagesize) */
word_address = (word_address & (0xFFFF - type.pagewrite_mask)) |
((word_address + 1) & type.pagewrite_mask);
}
cycles ++;
}
else cycles = 1; /* ACK cycle */
}
break;
}
old_scl = scl;
old_sda = sda;
}
unsigned int MD_Cart_Type_EEPROM::ReadEEPROM(unsigned int address, bool word_access)
{
uint8 sda_out = sda;
/* EEPROM state */
switch (state)
{
case READ_DATA:
if (cycles < 9)
{
/* Return DATA bits (max 64kBytes) */
uint16 sram_address = (slave_mask | word_address) & 0xffff;
sda_out = (sram[sram_address] >> (8 - cycles)) & 1;
if (cycles == 8)
{
/* WORD ADDRESS is incremented (roll up at maximum array size) */
word_address ++;
word_address &= type.size_mask;
}
}
break;
case GET_WORD_ADR_7BITS:
case GET_SLAVE_ADR:
case GET_WORD_ADR_HIGH:
case GET_WORD_ADR_LOW:
case WRITE_DATA:
if (cycles == 9) sda_out = 0;
break;
default:
break;
}
/* memory access */
if (word_access)
{
/* 16-bits access */
if (type.sda_out_adr & 1) return (sda_out << type.sda_out_bit); /* LSB */
else return (sda_out << (type.sda_out_bit + 8)); /* MSB */
}
else return (sda_out << type.sda_out_bit);
}
void MD_Cart_Type_EEPROM::Write8(uint32 A, uint8 V)
{
if((A == type.sda_in_adr) || (A == type.scl_adr))
WriteEEPROM(A, V, false);
}
void MD_Cart_Type_EEPROM::Write16(uint32 A, uint8 V)
{
if((A == (type.sda_in_adr & 0xFFFFFE)) || (A == (type.scl_adr & 0xFFFFFE)))
WriteEEPROM(A, V, true);
}
uint8 MD_Cart_Type_EEPROM::Read8(uint32 A)
{
if(A == type.sda_out_adr)
return(ReadEEPROM(A, false));
//
if(A < 0x400000)
{
if(A > rom_size)
{
printf("Moo: %08x\n", A);
return(0);
}
return(READ_BYTE_MSB(rom, A));
}
return(m68k_read_bus_8(A));
}
uint16 MD_Cart_Type_EEPROM::Read16(uint32 A)
{
if(A == (type.sda_out_adr & 0xFFFFFE))
return(ReadEEPROM(A, true));
//
if(A < 0x400000)
{
if(A > rom_size)
{
printf("Moo: %08x\n", A);
return(0);
}
return(READ_WORD_MSB(rom, A));
}
return(m68k_read_bus_16(A));
}
int MD_Cart_Type_EEPROM::StateAction(StateMem *sm, int load, int data_only, const char *section_name)
{
SFORMAT StateRegs[] =
{
SFVAR(sda),
SFVAR(scl),
SFVAR(old_sda),
SFVAR(old_scl),
SFVAR(cycles),
SFVAR(rw),
SFVAR(slave_mask),
SFVAR(word_address),
SFVAR(state),
SFARRAY(sram, type.size_mask + 1),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, section_name);
if(load)
{
}
return(ret);
}
uint32 MD_Cart_Type_EEPROM::GetNVMemorySize(void)
{
return(type.size_mask + 1);
}
void MD_Cart_Type_EEPROM::ReadNVMemory(uint8 *buffer)
{
memcpy(buffer, sram, type.size_mask + 1);
}
void MD_Cart_Type_EEPROM::WriteNVMemory(const uint8 *buffer)
{
memcpy(sram, buffer, type.size_mask + 1);
}
MD_Cart_Type *MD_Make_Cart_Type_EEPROM(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const uint32 iparam, const char *sparam)
{
return(new MD_Cart_Type_EEPROM(ginfo, ROM, ROM_size, iparam));
}

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@ -1,25 +0,0 @@
#ifndef __MD_MAP_EEPROM_H
#define __MD_MAP_EEPROM_H
enum
{
EEP_NONE = 0,
EEP_ACCLAIM_24C02_OLD = 1,
EEP_ACCLAIM_24C02,
EEP_ACCLAIM_24C04,
EEP_ACCLAIM_24C16,
EEP_ACCLAIM_24C65,
EEP_EA_24C01,
EEP_SEGA_24C01,
EEP_CM_24C08,
EEP_CM_24C16,
EEP_CM_24C65,
EEP_TOTAL
};
MD_Cart_Type *MD_Make_Cart_Type_EEPROM(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const uint32 iparam, const char *sparam);
#endif

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@ -1,176 +0,0 @@
/* Mednafen - Multi-system Emulator
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "../shared.h"
#include "cart.h"
#include "map_rom.h"
class MD_Cart_Type_FF : public MD_Cart_Type
{
public:
MD_Cart_Type_FF(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size);
virtual ~MD_Cart_Type_FF();
virtual void Reset(void);
virtual void Write8(uint32 A, uint8 V);
virtual void Write16(uint32 A, uint8 V);
virtual uint8 Read8(uint32 A);
virtual uint16 Read16(uint32 A);
virtual int StateAction(StateMem *sm, int load, int data_only, const char *section_name);
// In bytes
virtual uint32 GetNVMemorySize(void);
virtual void ReadNVMemory(uint8 *buffer);
virtual void WriteNVMemory(const uint8 *buffer);
private:
const uint8 *rom;
uint32 rom_size;
uint8 latch;
uint8 sram[8192];
};
MD_Cart_Type_FF::MD_Cart_Type_FF(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size)
{
this->rom = ROM;
this->rom_size = ROM_size;
}
MD_Cart_Type_FF::~MD_Cart_Type_FF()
{
memset(sram, 0xFF, 8192);
}
void MD_Cart_Type_FF::Reset(void)
{
latch = 0;
}
void MD_Cart_Type_FF::Write8(uint32 A, uint8 V)
{
if(A >= 0x200000 && A <= 0x203fff)
{
if(A & 1)
sram[(A >> 1) & 0x1FFF] = V;
}
else if(A == 0x400006)
latch = V;
else
printf("Write8: %08x %02x\n", A, V);
}
void MD_Cart_Type_FF::Write16(uint32 A, uint8 V)
{
if(A >= 0x200000 && A <= 0x203fff)
{
sram[(A >> 1) & 0x1FFF] = V;
}
else
printf("Write16: %08x %04x\n", A, V);
}
uint8 MD_Cart_Type_FF::Read8(uint32 A)
{
if(A < 0x400000)
{
if(A >= 0x200000 && A <= 0x203fff)
{
if(A & 1)
return(sram[(A >> 1) & 0x1FFF]);
}
if(A > rom_size)
{
printf("Moo8: %08x\n", A);
return(0);
}
return(READ_BYTE_MSB(rom, A));
}
if(A == 0x400006)
return(latch);
if(A > 0x410000)
printf("Moo8: %08x\n", A);
if(A >= 0x400000)
return(READ_BYTE_MSB(rom, (A & 0xFFFFF) + (61 * 32768)));
return(m68k_read_bus_8(A));
}
uint16 MD_Cart_Type_FF::Read16(uint32 A)
{
if(A < 0x400000)
{
if(A >= 0x200000 && A <= 0x203fff)
return(sram[(A >> 1) & 0x1FFF]);
if(A > rom_size)
{
printf("Moo16: %08x\n", A);
return(0);
}
return(READ_WORD_MSB(rom, A));
}
printf("Moo16: %08x\n", A);
return(m68k_read_bus_16(A));
}
int MD_Cart_Type_FF::StateAction(StateMem *sm, int load, int data_only, const char *section_name)
{
SFORMAT StateRegs[] =
{
SFVAR(latch),
SFARRAY(sram, 8192),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, section_name);
if(load)
{
}
return(ret);
return(1);
}
uint32 MD_Cart_Type_FF::GetNVMemorySize(void)
{
return(8192);
}
void MD_Cart_Type_FF::ReadNVMemory(uint8 *buffer)
{
memcpy(buffer, sram, 8192);
}
void MD_Cart_Type_FF::WriteNVMemory(const uint8 *buffer)
{
memcpy(sram, buffer, 8192);
}
MD_Cart_Type *MD_Make_Cart_Type_FF(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const uint32 iparam, const char *sparam)
{
return(new MD_Cart_Type_FF(ginfo, ROM, ROM_size));
}

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MD_Cart_Type *MD_Make_Cart_Type_FF(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const uint32 iparam, const char *sparam);

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@ -1,190 +0,0 @@
/* Mednafen - Multi-system Emulator
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "../shared.h"
#include "cart.h"
#include "map_rom.h"
class MD_Cart_Type_REALTEC : public MD_Cart_Type
{
public:
MD_Cart_Type_REALTEC(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size);
virtual ~MD_Cart_Type_REALTEC();
virtual void Reset(void);
virtual void Write8(uint32 A, uint8 V);
virtual void Write16(uint32 A, uint8 V);
virtual uint8 Read8(uint32 A);
virtual uint16 Read16(uint32 A);
virtual int StateAction(StateMem *sm, int load, int data_only, const char *section_name);
// In bytes
virtual uint32 GetNVMemorySize(void);
virtual void ReadNVMemory(uint8 *buffer);
virtual void WriteNVMemory(const uint8 *buffer);
private:
const uint8 *rom;
uint32 rom_size;
bool boot_mode;
uint8 bank_size;
uint8 bank_select;
};
MD_Cart_Type_REALTEC::MD_Cart_Type_REALTEC(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size)
{
this->rom = ROM;
this->rom_size = ROM_size;
}
MD_Cart_Type_REALTEC::~MD_Cart_Type_REALTEC()
{
}
void MD_Cart_Type_REALTEC::Reset(void)
{
boot_mode = TRUE;
bank_select = 0;
bank_size = 0;
}
void MD_Cart_Type_REALTEC::Write8(uint32 A, uint8 V)
{
//printf("Write8: %08x %02x\n", A, V);
switch(A & 0xC06000)
{
case 0x400000: boot_mode = !(V & 0x1);
bank_select &= ~0xC;
bank_select |= (V & 0x6) << 2;
break;
case 0x402000: bank_size = V;
break;
case 0x404000: bank_select &= ~0x7;
bank_select |= V & 0x7;
break;
}
}
void MD_Cart_Type_REALTEC::Write16(uint32 A, uint8 V)
{
//printf("Write16: %08x %04x\n", A, V);
switch(A & 0xC06000)
{
case 0x400000: boot_mode = !(V & 0x1);
bank_select &= ~0xC;
bank_select |= (V & 0x6) << 2;
break;
case 0x402000: bank_size = V;
break;
case 0x404000: bank_select &= ~0x7;
bank_select |= V & 0x7;
break;
}
}
uint8 MD_Cart_Type_REALTEC::Read8(uint32 A)
{
if(A < 0x400000)
{
uint32 rom_offset;
if(boot_mode)
rom_offset = (A & 0x1FFF) | 0x7E000; //(rom_size &~ 0x1FFF) - 0x2000;
else
{
rom_offset = (A & ((0x20000 * bank_size) - 1)) | (bank_select * 0x20000);
}
if(rom_offset >= rom_size)
return(0);
return(READ_BYTE_MSB(rom, rom_offset));
}
return(m68k_read_bus_8(A));
}
uint16 MD_Cart_Type_REALTEC::Read16(uint32 A)
{
if(A < 0x400000)
{
uint32 rom_offset;
if(boot_mode)
rom_offset = (A & 0x1FFF) | 0x07E000; //rom_size &~ 0x1FFF) - 0x2000;
else
{
rom_offset = (A & ((0x20000 * bank_size) - 1)) | (bank_select * 0x20000);
}
if(rom_offset >= rom_size)
return(0);
return(READ_WORD_MSB(rom, rom_offset));
}
return(m68k_read_bus_16(A));
}
int MD_Cart_Type_REALTEC::StateAction(StateMem *sm, int load, int data_only, const char *section_name)
{
SFORMAT StateRegs[] =
{
SFVAR(bank_size),
SFVAR(bank_select),
SFVAR(boot_mode),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, section_name);
if(load)
{
}
return(ret);
return(1);
}
uint32 MD_Cart_Type_REALTEC::GetNVMemorySize(void)
{
return(0);
}
void MD_Cart_Type_REALTEC::ReadNVMemory(uint8 *buffer)
{
}
void MD_Cart_Type_REALTEC::WriteNVMemory(const uint8 *buffer)
{
}
MD_Cart_Type *MD_Make_Cart_Type_REALTEC(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const uint32 iparam, const char *sparam)
{
return(new MD_Cart_Type_REALTEC(ginfo, ROM, ROM_size));
}

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@ -1,6 +0,0 @@
#ifndef __MD_MAP_REALTEC_H
#define __MD_MAP_REALTEC_H
MD_Cart_Type *MD_Make_Cart_Type_REALTEC(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const uint32 iparam, const char *sparam);
#endif

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@ -1,135 +0,0 @@
/* Mednafen - Multi-system Emulator
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "../shared.h"
#include "cart.h"
#include "map_rom.h"
class MD_Cart_Type_RMX3 : public MD_Cart_Type
{
public:
MD_Cart_Type_RMX3(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size);
virtual ~MD_Cart_Type_RMX3();
virtual void Write8(uint32 A, uint8 V);
virtual void Write16(uint32 A, uint8 V);
virtual uint8 Read8(uint32 A);
virtual uint16 Read16(uint32 A);
virtual int StateAction(StateMem *sm, int load, int data_only, const char *section_name);
// In bytes
virtual uint32 GetNVMemorySize(void);
virtual void ReadNVMemory(uint8 *buffer);
virtual void WriteNVMemory(const uint8 *buffer);
private:
const uint8 *rom;
uint32 rom_size;
};
MD_Cart_Type_RMX3::MD_Cart_Type_RMX3(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size)
{
this->rom = ROM;
this->rom_size = ROM_size;
}
MD_Cart_Type_RMX3::~MD_Cart_Type_RMX3()
{
}
void MD_Cart_Type_RMX3::Write8(uint32 A, uint8 V)
{
}
void MD_Cart_Type_RMX3::Write16(uint32 A, uint8 V)
{
}
uint8 MD_Cart_Type_RMX3::Read8(uint32 A)
{
if(A < 0x400000)
{
if(A > rom_size)
{
printf("Moo8: %08x\n", A);
return(0);
}
return(READ_BYTE_MSB(rom, A));
}
if(A == 0xa13000)
return(0x0C);
if(A == 0x400004)
return(0x88);
printf("Moo8: %08x\n", A);
return(m68k_read_bus_8(A));
}
uint16 MD_Cart_Type_RMX3::Read16(uint32 A)
{
if(A < 0x400000)
{
if(A > rom_size)
{
printf("Moo16: %08x\n", A);
return(0);
}
return(READ_WORD_MSB(rom, A));
}
if(A == 0xa13000)
return(0x0C);
if(A == 0x400004)
return(0x88);
printf("Moo16: %08x\n", A);
return(m68k_read_bus_16(A));
}
int MD_Cart_Type_RMX3::StateAction(StateMem *sm, int load, int data_only, const char *section_name)
{
return(1);
}
uint32 MD_Cart_Type_RMX3::GetNVMemorySize(void)
{
return(0);
}
void MD_Cart_Type_RMX3::ReadNVMemory(uint8 *buffer)
{
}
void MD_Cart_Type_RMX3::WriteNVMemory(const uint8 *buffer)
{
}
MD_Cart_Type *MD_Make_Cart_Type_RMX3(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const uint32 iparam, const char *sparam)
{
return(new MD_Cart_Type_RMX3(ginfo, ROM, ROM_size));
}

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@ -1,2 +0,0 @@
MD_Cart_Type *MD_Make_Cart_Type_RMX3(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const uint32 iparam, const char *sparam);

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/* Mednafen - Multi-system Emulator
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "../shared.h"
#include "cart.h"
#include "map_rom.h"
// Basic flat-space ROM-only mapper.
class MD_Cart_Type_ROM : public MD_Cart_Type
{
public:
MD_Cart_Type_ROM(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size);
virtual ~MD_Cart_Type_ROM();
virtual void Write8(uint32 A, uint8 V);
virtual void Write16(uint32 A, uint8 V);
virtual uint8 Read8(uint32 A);
virtual uint16 Read16(uint32 A);
virtual int StateAction(StateMem *sm, int load, int data_only, const char *section_name);
// In bytes
virtual uint32 GetNVMemorySize(void);
virtual void ReadNVMemory(uint8 *buffer);
virtual void WriteNVMemory(const uint8 *buffer);
private:
const uint8 *rom;
uint32 rom_size;
};
MD_Cart_Type_ROM::MD_Cart_Type_ROM(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size)
{
this->rom = ROM;
this->rom_size = ROM_size;
}
MD_Cart_Type_ROM::~MD_Cart_Type_ROM()
{
}
void MD_Cart_Type_ROM::Write8(uint32 A, uint8 V)
{
printf("Write8: %08x %02x\n", A, V);
}
void MD_Cart_Type_ROM::Write16(uint32 A, uint8 V)
{
printf("Write16: %08x %04x\n", A, V);
}
uint8 MD_Cart_Type_ROM::Read8(uint32 A)
{
if(A < 0x400000)
{
if(A > rom_size)
{
printf("Read8: %08x\n", A);
return(0);
}
return(READ_BYTE_MSB(rom, A));
}
printf("Read8: %08x\n", A);
return(m68k_read_bus_8(A));
}
uint16 MD_Cart_Type_ROM::Read16(uint32 A)
{
if(A < 0x400000)
{
if(A > rom_size)
{
printf("Read16: %08x\n", A);
return(0);
}
return(READ_WORD_MSB(rom, A));
}
printf("Read16: %08x\n", A);
return(m68k_read_bus_16(A));
}
int MD_Cart_Type_ROM::StateAction(StateMem *sm, int load, int data_only, const char *section_name)
{
return(1);
}
uint32 MD_Cart_Type_ROM::GetNVMemorySize(void)
{
return(0);
}
void MD_Cart_Type_ROM::ReadNVMemory(uint8 *buffer)
{
}
void MD_Cart_Type_ROM::WriteNVMemory(const uint8 *buffer)
{
}
MD_Cart_Type *MD_Make_Cart_Type_ROM(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const uint32 iparam, const char *sparam)
{
return(new MD_Cart_Type_ROM(ginfo, ROM, ROM_size));
}

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#ifndef __MD_MAP_ROM_H
#define __MD_MAP_ROM_H
MD_Cart_Type *MD_Make_Cart_Type_ROM(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const uint32 iparam, const char *sparam);
#endif

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/* Mednafen - Multi-system Emulator
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "../shared.h"
#include "cart.h"
#include "map_rom.h"
class MD_Cart_Type_SBB : public MD_Cart_Type
{
public:
MD_Cart_Type_SBB(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size);
virtual ~MD_Cart_Type_SBB();
virtual void Write8(uint32 A, uint8 V);
virtual void Write16(uint32 A, uint8 V);
virtual uint8 Read8(uint32 A);
virtual uint16 Read16(uint32 A);
virtual int StateAction(StateMem *sm, int load, int data_only, const char *section_name);
// In bytes
virtual uint32 GetNVMemorySize(void);
virtual void ReadNVMemory(uint8 *buffer);
virtual void WriteNVMemory(const uint8 *buffer);
private:
const uint8 *rom;
uint32 rom_size;
};
MD_Cart_Type_SBB::MD_Cart_Type_SBB(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size)
{
this->rom = ROM;
this->rom_size = ROM_size;
}
MD_Cart_Type_SBB::~MD_Cart_Type_SBB()
{
}
void MD_Cart_Type_SBB::Write8(uint32 A, uint8 V)
{
}
void MD_Cart_Type_SBB::Write16(uint32 A, uint8 V)
{
}
uint8 MD_Cart_Type_SBB::Read8(uint32 A)
{
if(A < 0x400000)
{
if(A > rom_size)
{
printf("Moo: %08x\n", A);
return(0);
}
return(READ_BYTE_MSB(rom, A));
}
if(A == 0x400000)
return(0x55);
if(A == 0x400002)
return(0x0f);
printf("Moo: %08x\n", A);
return(m68k_read_bus_8(A));
}
uint16 MD_Cart_Type_SBB::Read16(uint32 A)
{
if(A < 0x400000)
{
if(A > rom_size)
{
printf("Moo: %08x\n", A);
return(0);
}
return(READ_WORD_MSB(rom, A));
}
if(A == 0x400000)
return(0x55);
if(A == 0x400002)
return(0x0f);
printf("Moo: %08x\n", A);
return(m68k_read_bus_16(A));
}
int MD_Cart_Type_SBB::StateAction(StateMem *sm, int load, int data_only, const char *section_name)
{
return(1);
}
uint32 MD_Cart_Type_SBB::GetNVMemorySize(void)
{
return(0);
}
void MD_Cart_Type_SBB::ReadNVMemory(uint8 *buffer)
{
}
void MD_Cart_Type_SBB::WriteNVMemory(const uint8 *buffer)
{
}
MD_Cart_Type *MD_Make_Cart_Type_SBB(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const uint32 iparam, const char *sparam)
{
return(new MD_Cart_Type_SBB(ginfo, ROM, ROM_size));
}

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@ -1,2 +0,0 @@
MD_Cart_Type *MD_Make_Cart_Type_SBB(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const uint32 iparam, const char *sparam);

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@ -1,196 +0,0 @@
/* Mednafen - Multi-system Emulator
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "../shared.h"
#include "cart.h"
#include "map_sram.h"
// TODO: Add suport for 8-bit mapped into 16-bit space correctly
class MD_Cart_Type_SRAM : public MD_Cart_Type
{
public:
MD_Cart_Type_SRAM(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size);
virtual ~MD_Cart_Type_SRAM();
virtual void Reset(void);
virtual void Write8(uint32 A, uint8 V);
virtual void Write16(uint32 A, uint8 V);
virtual uint8 Read8(uint32 A);
virtual uint16 Read16(uint32 A);
virtual int StateAction(StateMem *sm, int load, int data_only, const char *section_name);
// In bytes
virtual uint32 GetNVMemorySize(void);
virtual void ReadNVMemory(uint8 *buffer);
virtual void WriteNVMemory(const uint8 *buffer);
private:
const uint8 *rom;
uint32 rom_size;
uint32 sram_start;
uint32 sram_end;
uint32 sram_size;
bool sram_enabled;
uint8 *sram;
};
MD_Cart_Type_SRAM::MD_Cart_Type_SRAM(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size)
{
this->rom = ROM;
this->rom_size = ROM_size;
sram_start = ginfo->sram_start;
sram_end = ginfo->sram_end;
sram_size = 0;
sram_start &= 0xFFFFFE;
sram_end |= 0x000001;
if((uint32)(sram_end - sram_start) >= 0x10000 || sram_start == sram_end)
{
sram_end = sram_start + 0xFFFF;
}
sram_size = sram_end - sram_start + 1;
printf("%08x %08x %08x\n", sram_start, sram_end, sram_size);
if(!(sram = (uint8 *)MDFN_malloc(sram_size, _("Cart SRAM"))))
{
// FIXME
throw(-1);
}
memset(sram, 0xFF, sram_size);
}
MD_Cart_Type_SRAM::~MD_Cart_Type_SRAM()
{
if(sram)
free(sram);
}
void MD_Cart_Type_SRAM::Reset(void)
{
if(rom_size > sram_start)
sram_enabled = FALSE;
else
sram_enabled = TRUE;
}
void MD_Cart_Type_SRAM::Write8(uint32 A, uint8 V)
{
if(A == 0xA130F1)
sram_enabled = V & 1;
if(A >= sram_start && A <= sram_end)
{
WRITE_BYTE_MSB(sram, A - sram_start, V);
}
}
void MD_Cart_Type_SRAM::Write16(uint32 A, uint8 V)
{
if(A == 0xA130F0)
sram_enabled = V & 1;
if(A >= sram_start && A <= sram_end)
{
WRITE_WORD_MSB(sram, A - sram_start, V);
}
}
uint8 MD_Cart_Type_SRAM::Read8(uint32 A)
{
if(sram_enabled && A >= sram_start && A <= sram_end)
{
return(READ_BYTE_MSB(sram, A - sram_start));
}
if(A < 0x400000)
{
if(A > rom_size)
{
printf("Moo: %08x\n", A);
return(0);
}
return(READ_BYTE_MSB(rom, A));
}
return(m68k_read_bus_8(A));
}
uint16 MD_Cart_Type_SRAM::Read16(uint32 A)
{
if(sram_enabled && A >= sram_start && A <= sram_end)
{
return(READ_WORD_MSB(sram, A - sram_start));
}
if(A < 0x400000)
{
if(A > rom_size)
{
printf("Moo: %08x\n", A);
return(0);
}
return(READ_WORD_MSB(rom, A));
}
return(m68k_read_bus_16(A));
}
int MD_Cart_Type_SRAM::StateAction(StateMem *sm, int load, int data_only, const char *section_name)
{
SFORMAT StateRegs[] =
{
SFVAR(sram_enabled),
SFARRAY(sram, sram_size),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, section_name);
if(load)
{
}
return(ret);
}
uint32 MD_Cart_Type_SRAM::GetNVMemorySize(void)
{
return(sram_size);
}
void MD_Cart_Type_SRAM::ReadNVMemory(uint8 *buffer)
{
memcpy(buffer, sram, sram_size);
}
void MD_Cart_Type_SRAM::WriteNVMemory(const uint8 *buffer)
{
memcpy(sram, buffer, sram_size);
}
MD_Cart_Type *MD_Make_Cart_Type_SRAM(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const uint32 iparam, const char *sparam)
{
return(new MD_Cart_Type_SRAM(ginfo, ROM, ROM_size));
}

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@ -1,6 +0,0 @@
#ifndef __MD_MAP_SRAM_H
#define __MD_MAP_SRAM_H
MD_Cart_Type *MD_Make_Cart_Type_SRAM(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const uint32 iparam, const char *sparam);
#endif

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/* Mednafen - Multi-system Emulator
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "../shared.h"
#include "cart.h"
#include "map_rom.h"
class MD_Cart_Type_SSF2 : public MD_Cart_Type
{
public:
MD_Cart_Type_SSF2(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size);
virtual ~MD_Cart_Type_SSF2();
virtual void Reset(void);
virtual void Write8(uint32 A, uint8 V);
virtual void Write16(uint32 A, uint8 V);
virtual uint8 Read8(uint32 A);
virtual uint16 Read16(uint32 A);
virtual int StateAction(StateMem *sm, int load, int data_only, const char *section_name);
// In bytes
virtual uint32 GetNVMemorySize(void);
virtual void ReadNVMemory(uint8 *buffer);
virtual void WriteNVMemory(const uint8 *buffer);
private:
const uint8 *rom;
uint32 rom_size;
uint8 sf2_banks[8];
uint8 control;
};
MD_Cart_Type_SSF2::MD_Cart_Type_SSF2(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size)
{
this->rom = ROM;
this->rom_size = ROM_size;
}
MD_Cart_Type_SSF2::~MD_Cart_Type_SSF2()
{
}
void MD_Cart_Type_SSF2::Reset(void)
{
control = 0;
for(int i = 0; i < 8; i++)
sf2_banks[i] = i;
}
void MD_Cart_Type_SSF2::Write8(uint32 A, uint8 V)
{
switch(A)
{
default: printf("Write8: %08x %02x\n", A, V); break;
case 0xA130F1: control = V & 0x3; break;
case 0xA130F3: sf2_banks[1] = V & 0x3F; break;
case 0xA130F5: sf2_banks[2] = V & 0x3F; break;
case 0xA130F7: sf2_banks[3] = V & 0x3F; break;
case 0xA130F9: sf2_banks[4] = V & 0x3F; break;
case 0xA130FB: sf2_banks[5] = V & 0x3F; break;
case 0xA130FD: sf2_banks[6] = V & 0x3F; break;
case 0xA130FF: sf2_banks[7] = V & 0x3F; break;
}
}
void MD_Cart_Type_SSF2::Write16(uint32 A, uint8 V)
{
// Just a guess
switch(A)
{
default: printf("Write16: %08x %04x\n", A, V); break;
case 0xA130F0: control = V & 0x3; break;
case 0xA130F2: sf2_banks[1] = V & 0x3F; break;
case 0xA130F4: sf2_banks[2] = V & 0x3F; break;
case 0xA130F6: sf2_banks[3] = V & 0x3F; break;
case 0xA130F8: sf2_banks[4] = V & 0x3F; break;
case 0xA130FA: sf2_banks[5] = V & 0x3F; break;
case 0xA130FC: sf2_banks[6] = V & 0x3F; break;
case 0xA130FE: sf2_banks[7] = V & 0x3F; break;
}
}
uint8 MD_Cart_Type_SSF2::Read8(uint32 A)
{
if(A < 0x400000)
{
uint32 rom_offset = (sf2_banks[(A >> 19) & 0x7] << 19) | (A & 0x7FFFF);
if(rom_offset >= rom_size)
return(0);
return(READ_BYTE_MSB(rom, rom_offset));
}
return(m68k_read_bus_8(A));
}
uint16 MD_Cart_Type_SSF2::Read16(uint32 A)
{
if(A < 0x400000)
{
uint32 rom_offset = (sf2_banks[(A >> 19) & 0x7] << 19) | (A & 0x7FFFF);
if(rom_offset >= rom_size)
return(0);
return(READ_WORD_MSB(rom, rom_offset));
}
return(m68k_read_bus_16(A));
}
int MD_Cart_Type_SSF2::StateAction(StateMem *sm, int load, int data_only, const char *section_name)
{
SFORMAT StateRegs[] =
{
SFARRAY(sf2_banks, 8),
SFVAR(control),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, section_name);
if(load)
{
}
return(ret);
return(1);
}
uint32 MD_Cart_Type_SSF2::GetNVMemorySize(void)
{
return(0);
}
void MD_Cart_Type_SSF2::ReadNVMemory(uint8 *buffer)
{
}
void MD_Cart_Type_SSF2::WriteNVMemory(const uint8 *buffer)
{
}
MD_Cart_Type *MD_Make_Cart_Type_SSF2(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const uint32 iparam, const char *sparam)
{
return(new MD_Cart_Type_SSF2(ginfo, ROM, ROM_size));
}

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#ifndef __MD_MAP_SSF2_H
#define __MD_MAP_SSF2_H
MD_Cart_Type *MD_Make_Cart_Type_SSF2(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const uint32 iparam, const char *sparam);
#endif

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/* Mednafen - Multi-system Emulator
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "../shared.h"
#include "cart.h"
#include "map_svp.h"
// UNFINISHED
class MD_Cart_Type_SVP : public MD_Cart_Type
{
public:
MD_Cart_Type_SVP(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size);
virtual ~MD_Cart_Type_SVP();
virtual void Write8(uint32 A, uint8 V);
virtual void Write16(uint32 A, uint8 V);
virtual uint8 Read8(uint32 A);
virtual uint16 Read16(uint32 A);
virtual int StateAction(StateMem *sm, int load, int data_only, const char *section_name);
// In bytes
virtual uint32 GetNVMemorySize(void);
virtual void ReadNVMemory(uint8 *buffer);
virtual void WriteNVMemory(const uint8 *buffer);
private:
const uint8 *rom;
uint32 rom_size;
};
MD_Cart_Type_SVP::MD_Cart_Type_SVP(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size)
{
this->rom = ROM;
this->rom_size = ROM_size;
}
MD_Cart_Type_SVP::~MD_Cart_Type_SVP()
{
}
void MD_Cart_Type_SVP::Write8(uint32 A, uint8 V)
{
printf("Write8: %08x %02x\n", A, V);
}
void MD_Cart_Type_SVP::Write16(uint32 A, uint8 V)
{
printf("Write16: %08x %04x\n", A, V);
}
uint8 MD_Cart_Type_SVP::Read8(uint32 A)
{
if(A < 0x400000)
{
if(A > rom_size)
{
printf("Read8: %08x\n", A);
return(0);
}
return(READ_BYTE_MSB(rom, A));
}
printf("Read8: %08x\n", A);
return(m68k_read_bus_8(A));
}
uint16 MD_Cart_Type_SVP::Read16(uint32 A)
{
if(A < 0x400000)
{
if(A > rom_size)
{
printf("Read16: %08x\n", A);
return(0);
}
return(READ_WORD_MSB(rom, A));
}
printf("Read16: %08x\n", A);
return(m68k_read_bus_16(A));
}
int MD_Cart_Type_SVP::StateAction(StateMem *sm, int load, int data_only, const char *section_name)
{
return(1);
}
uint32 MD_Cart_Type_SVP::GetNVMemorySize(void)
{
return(0);
}
void MD_Cart_Type_SVP::ReadNVMemory(uint8 *buffer)
{
}
void MD_Cart_Type_SVP::WriteNVMemory(const uint8 *buffer)
{
}
MD_Cart_Type *MD_Make_Cart_Type_SVP(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const uint32 iparam, const char *sparam)
{
return(new MD_Cart_Type_SVP(ginfo, ROM, ROM_size));
}

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@ -1,6 +0,0 @@
#ifndef __MD_MAP_SVP_H
#define __MD_MAP_SVP_H
MD_Cart_Type *MD_Make_Cart_Type_SVP(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const uint32 iparam, const char *sparam);
#endif

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@ -1,161 +0,0 @@
/* Mednafen - Multi-system Emulator
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "../shared.h"
#include "cart.h"
#include "map_rom.h"
class MD_Cart_Type_YaSe : public MD_Cart_Type
{
public:
MD_Cart_Type_YaSe(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size);
virtual ~MD_Cart_Type_YaSe();
virtual void Write8(uint32 A, uint8 V);
virtual void Write16(uint32 A, uint8 V);
virtual uint8 Read8(uint32 A);
virtual uint16 Read16(uint32 A);
virtual int StateAction(StateMem *sm, int load, int data_only, const char *section_name);
// In bytes
virtual uint32 GetNVMemorySize(void);
virtual void ReadNVMemory(uint8 *buffer);
virtual void WriteNVMemory(const uint8 *buffer);
private:
const uint8 *rom;
uint32 rom_size;
uint8 sram[4096];
};
MD_Cart_Type_YaSe::MD_Cart_Type_YaSe(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size)
{
this->rom = ROM;
this->rom_size = ROM_size;
memset(sram, 0xFF, 4096);
}
MD_Cart_Type_YaSe::~MD_Cart_Type_YaSe()
{
}
void MD_Cart_Type_YaSe::Write8(uint32 A, uint8 V)
{
if(A >= 0x200000 && A <= 0x201fff)
{
if(A & 1)
sram[(A >> 1) & 0x1FFF] = V;
}
}
void MD_Cart_Type_YaSe::Write16(uint32 A, uint8 V)
{
if(A >= 0x200000 && A <= 0x201fff)
{
sram[(A >> 1) & 0x1FFF] = V;
}
}
uint8 MD_Cart_Type_YaSe::Read8(uint32 A)
{
if(A >= 0x200000 && A <= 0x201fff)
{
if(A & 1)
return(sram[(A >> 1) & 0x1FFF]);
}
if(A < 0x400000)
{
if(A > rom_size)
{
printf("Moo8: %08x\n", A);
return(0);
}
return(READ_BYTE_MSB(rom, A));
}
if(A == 0x400000)
return(0x63);
if(A == 0x400002)
return(0x98);
if(A == 0x400004)
return(0xC9);
if(A == 0x400006)
return(0x18);
printf("Moo8: %08x\n", A);
return(m68k_read_bus_8(A));
}
uint16 MD_Cart_Type_YaSe::Read16(uint32 A)
{
if(A >= 0x200000 && A <= 0x201fff)
return(sram[(A >> 1) & 0x1FFF]);
if(A < 0x400000)
{
if(A > rom_size)
{
printf("Moo16: %08x\n", A);
return(0);
}
return(READ_WORD_MSB(rom, A));
}
if(A == 0x400000)
return(0x63);
if(A == 0x400002)
return(0x98);
if(A == 0x400004)
return(0xC9);
if(A == 0x400006)
return(0x18);
printf("Moo16: %08x\n", A);
return(m68k_read_bus_16(A));
}
int MD_Cart_Type_YaSe::StateAction(StateMem *sm, int load, int data_only, const char *section_name)
{
return(1);
}
uint32 MD_Cart_Type_YaSe::GetNVMemorySize(void)
{
return(4096);
}
void MD_Cart_Type_YaSe::ReadNVMemory(uint8 *buffer)
{
memcpy(buffer, sram, 4096);
}
void MD_Cart_Type_YaSe::WriteNVMemory(const uint8 *buffer)
{
memcpy(sram, buffer, 4096);
}
MD_Cart_Type *MD_Make_Cart_Type_YaSe(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const uint32 iparam, const char *sparam)
{
return(new MD_Cart_Type_YaSe(ginfo, ROM, ROM_size));
}

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@ -1,2 +0,0 @@
MD_Cart_Type *MD_Make_Cart_Type_YaSe(const md_game_info *ginfo, const uint8 *ROM, const uint32 ROM_size, const uint32 iparam, const char *sparam);

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@ -1,100 +0,0 @@
/*
* basic, incomplete SSP160x (SSP1601?) interpreter
*
* Copyright (c) Gražvydas "notaz" Ignotas, 2008
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the organization nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifdef __cplusplus
extern "C" {
#endif
// register names
enum {
SSP_GR0, SSP_X, SSP_Y, SSP_A,
SSP_ST, SSP_STACK, SSP_PC, SSP_P,
SSP_PM0, SSP_PM1, SSP_PM2, SSP_XST,
SSP_PM4, SSP_gr13, SSP_PMC, SSP_AL
};
typedef union
{
unsigned int v;
struct {
unsigned short l;
unsigned short h;
};
} ssp_reg_t;
typedef struct
{
union {
unsigned short RAM[256*2]; // 000 2 internal RAM banks
struct {
unsigned short RAM0[256];
unsigned short RAM1[256];
};
};
ssp_reg_t gr[16]; // 400 general registers
union {
unsigned char r[8]; // 440 BANK pointers
struct {
unsigned char r0[4];
unsigned char r1[4];
};
};
unsigned short stack[6]; // 448
unsigned int pmac_read[6]; // 454 read modes/addrs for PM0-PM5
unsigned int pmac_write[6]; // 46c write ...
//
#define SSP_PMC_HAVE_ADDR 0x0001 // address written to PMAC, waiting for mode
#define SSP_PMC_SET 0x0002 // PMAC is set
#define SSP_WAIT_PM0 0x2000 // bit1 in PM0
#define SSP_WAIT_30FE06 0x4000 // ssp tight loops on 30FE06 to become non-zero
#define SSP_WAIT_30FE08 0x8000 // same for 30FE06
#define SSP_WAIT_MASK 0xe000
unsigned int emu_status; // 484
/* used by recompiler only: */
struct {
unsigned int ptr_rom; // 488
unsigned int ptr_iram_rom; // 48c
unsigned int ptr_dram; // 490
unsigned int iram_dirty; // 494
unsigned int iram_context; // 498
unsigned int ptr_btable; // 49c
unsigned int ptr_btable_iram; // 4a0
unsigned int tmp0; // 4a4
unsigned int tmp1; // 4a8
unsigned int tmp2; // 4ac
} drc;
} ssp1601_t;
void ssp1601_reset(ssp1601_t *ssp);
void ssp1601_run(int cycles);
#ifdef __cplusplus
}
#endif

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#ifndef __MDFN_MD_CD_H
#define __MDFN_MD_CD_H
extern c68k_struc Sub68K;
void MDCD_Run(int32 md_master_cycles);
void MDCD_PCM_Run(int32 cycles);
void MDCD_Reset(bool poweron);
bool MDCD_Load(std::vector<CDIF *> *CDInterfaces, md_game_info *);
bool MDCD_TestMagic(std::vector<CDIF *> *CDInterfaces);
void MDCD_Close(void);
#endif

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#include "../shared.h"
#include "cd.h"
#include "cdc_cdd.h"
void MDCD_CDC_MainWrite8(uint32 A, uint8 V)
{
}
void MDCD_CDC_MainWrite16(uint32 A, uint16 V)
{
}
uint8 MDCD_CDC_MainRead8(uint32 A)
{
return 0;
}
uint16 MDCD_CDC_MainRead16(uint32 A)
{
return 0;
}
void MDCD_CDC_SubWrite8(uint32 A, uint8 V)
{
}
void MDCD_CDC_SubWrite16(uint32 A, uint16 V)
{
}
uint8 MDCD_CDC_SubRead8(uint32 A)
{
return 0;
}
uint16 MDCD_CDC_SubRead16(uint32 A)
{
return 0;
}
void MDCD_CDD_Write8(uint32 A, uint8 V)
{
}
void MDCD_CDD_Write16(uint32 A, uint16 V)
{
}
uint8 MDCD_CDD_Read8(uint32 A)
{
return 0;
}
uint16 MDCD_CDD_Read16(uint32 A)
{
return 0;
}

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#ifndef __MDFN_MDCD_CDCCDD_H
#define __MDFN_MDCD_CDCCDD_H
void MDCD_CDC_MainWrite8(uint32 A, uint8 V);
void MDCD_CDC_MainWrite16(uint32 A, uint16 V);
uint8 MDCD_CDC_MainRead8(uint32 A);
uint16 MDCD_CDC_MainRead16(uint32 A);
void MDCD_CDC_SubWrite8(uint32 A, uint8 V);
void MDCD_CDC_SubWrite16(uint32 A, uint16 V);
uint8 MDCD_CDC_SubRead8(uint32 A);
uint16 MDCD_CDC_SubRead16(uint32 A);
void MDCD_CDD_Write8(uint32 A, uint8 V);
void MDCD_CDD_Write16(uint32 A, uint16 V);
uint8 MDCD_CDD_Read8(uint32 A);
uint16 MDCD_CDD_Read16(uint32 A);
#endif

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/* Mednafen - Multi-system Emulator
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "../shared.h"
#include "cd.h"
#include "interrupt.h"
/* SegaCD interrupt levels:
6 - Sub-channel buffering completed
5 - CDC, error correction or buffer completed
4 - CDD, command reception is completed?
3 - Timer
2 - Software int from main CPU
1 - Graphics operation is completed
*/
static uint32 asserted;
static uint32 InterruptMask;
static void Rebuild(void)
{
int pending_level = 0;
uint32 awm = asserted & InterruptMask;
// Level 0 doesn't exist per-se.
// Level 7 doesn't seem to be used on the SegaCD
for(int i = 6; i > 0; i--)
{
if(awm & (1 << i))
{
pending_level = i;
break;
}
}
C68k_Set_IRQ(&Sub68K, pending_level);
}
uint8 MDCD_InterruptRead(void)
{
return(InterruptMask);
}
bool MDCD_InterruptGetMask(int level)
{
return((InterruptMask >> level) & 1);
}
bool MDCD_InterruptGetAsserted(int level)
{
return((asserted >> level) & 1);
}
void MDCD_InterruptWrite(uint8 V)
{
InterruptMask = V & 0x7E;
Rebuild();
}
int MDCD_InterruptAck(int level)
{
printf("Interrupt: %d\n", level);
asserted &= ~(1 << level);
Rebuild();
return(C68K_INT_ACK_AUTOVECTOR);
}
void MDCD_InterruptAssert(int level, bool status)
{
assert(status == 0 || status == 1);
asserted &= ~(1 << level);
asserted |= status << level;
Rebuild();
}
void MDCD_InterruptReset(void)
{
asserted = 0;
Rebuild();
}
void MDCD_InterruptInit(void)
{
}

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#ifndef __MDFN_MDCD_INTERRUPT_H
#define __MDFN_MDCD_INTERRUPT_H
bool MDCD_InterruptGetMask(int level);
bool MDCD_InterruptGetAsserted(int level);
int MDCD_InterruptAck(int level);
void MDCD_InterruptAssert(int level, bool status);
void MDCD_InterruptReset(void);
uint8 MDCD_InterruptRead(void);
void MDCD_InterruptWrite(uint8 V);
#endif

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@ -1,181 +0,0 @@
/* Mednafen - Multi-system Emulator
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "../shared.h"
#include "cd.h"
#include "pcm.h"
static bool IC_On; // Set by D7 of writes to 0x0007.
static uint8 WB; // Wave bank select. Set by the lower 4 bits of writes to 0x0007 when D6 is clear.
static uint8 CB; // Channel select. Set by the lower 3 bits of wries to 0x0007 when D6 is set.
static uint8 ChannelOn; // Register 0x0008, on/off register for each of the 8 channels
static uint8 WaveData[0x10000]; // 64KiB of waveform data
typedef struct
{
uint32 Counter; // Address counter. The lower 11 bits are the fractional component.
uint8 ENV; // 0x0000
uint8 PAN; // 0x0001. Upper 4 bits affect R output, lower 4 bits affect L output.
uint16 FD; // FDL(0x0002) and FDH(0x0003) Controls the incrementing of the address counter.
uint16 LS; // LSL(0x0004) and LSH(0x0005) When 0xFF(stop data) is read from waveform memory,
// the address counter will be reloaded with this value.
uint8 ST; // 0x0006
// Upper 8-bits of the channel's read address are set to when a channel is enabled(the lower 8 bits are set to 0).
} pcm_channel_t;
static pcm_channel_t Channels[8];
// Last timestamp
static int32 last_ts;
// Divide by (4 * 384) counter
static int32 div_count;
static void PCM_Clock(void);
static void MDCD_PCM_Update(void);
void MDCD_PCM_Write(uint32 A, uint8 V)
{
A &= 0x1FFF;
MDCD_PCM_Update();
if(A >= 0x1000)
{
WaveData[(WB << 12) | (A & 0x0FFF)] = V;
}
else switch(A)
{
case 0x00: Channels[CB].ENV = V;
break;
case 0x01: Channels[CB].PAN = V;
break;
case 0x02: Channels[CB].FD &= 0xFF00;
Channels[CB].FD |= V << 0;
break;
case 0x03: Channels[CB].FD &= 0x00FF;
Channels[CB].FD |= V << 8;
break;
case 0x04: Channels[CB].LS &= 0xFF00;
Channels[CB].LS |= V << 0;
break;
case 0x05: Channels[CB].LS &= 0x00FF;
Channels[CB].LS |= V << 8;
break;
case 0x06: Channels[CB].ST = V;
break;
case 0x07: IC_On = V & 0x80;
if(V & 0x40)
CB = V & 0x7;
else
WB = V & 0xF;
break;
case 0x08: ChannelOn = V;
break;
}
}
static void PCM_Clock(void)
{
int32 left = 0;
int32 right = 0;
for(int ch = 0; ch < 8; ch++)
{
pcm_channel_t *CurChan = &Channels[ch];
if(!IC_On)
{
CurChan->Counter = CurChan->ST << (8 + 11);
}
else
{
uint8 tmp_sample;
CurChan->Counter += CurChan->FD;
tmp_sample = WaveData[(CurChan->Counter >> 11) & 0xFFFF];
if(tmp_sample == 0xFF)
{
CurChan->Counter = CurChan->LS << 11;
}
}
int32 sample = WaveData[(CurChan->Counter >> 11) & 0xFFFF];
if(sample & 0x80)
sample = -(sample & 0x7F);
sample *= CurChan->ENV;
if(ChannelOn & (1 << ch))
{
left += (sample * (CurChan->PAN & 0x0F)) >> 4;
right += (sample * ((CurChan->PAN >> 4) & 0x0F)) >> 4;
}
}
if(left < -0x8000)
left = -0x8000;
if(left > 0x7FFF)
left = 0x7FFF;
if(right < -0x8000)
right = -0x8000;
if(right > 0x7FFF)
right = 0x7FFF;
}
void MDCD_PCM_Run(int32 cycles)
{
div_count -= cycles;
while(div_count <= 0)
{
PCM_Clock();
div_count += 384;
}
}
void MDCD_PCM_Update(void)
{
#if 0
int32 cycles = md_cd_timestamp - last_ts;
last_ts = md_cd_timestamp;
#endif
}
void MDCD_PCM_Reset(void)
{
IC_On = 0;
WB = 0;
CB = 0;
ChannelOn = 0;
memset(WaveData, 0, sizeof(WaveData));
memset(Channels, 0, sizeof(Channels));
}

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#ifndef __MDFN_MD_PCM_H
#define __MDFN_MD_PCM_H
void MDCD_PCM_Write(uint32 A, uint8 V);
void MDCD_PCM_Reset(void);
#endif

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/* Mednafen - Multi-system Emulator
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "../shared.h"
#include "cd.h"
#include "timer.h"
#include "interrupt.h"
static uint8 TimerLatch;
static int32 TimerDiv;
void MDCD_Timer_Reset(void)
{
TimerLatch = 0;
TimerDiv = 0;
MDCD_InterruptAssert(3, FALSE);
}
void MDCD_Timer_Run(int32 clocks)
{
TimerDiv -= clocks;
while(TimerDiv <= 0)
{
if(TimerLatch)
{
TimerLatch--;
if(!TimerLatch)
{
MDCD_InterruptAssert(3, TRUE);
}
}
TimerDiv += 384;
}
}
void MDCD_Timer_Write(uint8 V)
{
TimerLatch = V;
// Should we cancel a pending interrupt on writes(or writes of 0)?
}
uint8 MDCD_Timer_Read(void)
{
return(TimerLatch);
}

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#ifndef __MDFN_MDCD_TIMER_H
#define __MDFN_MDCD_TIMER_H
void MDCD_Timer_Reset(void);
void MDCD_Timer_Run(int32 clocks);
void MDCD_Timer_Write(uint8 V);
uint8 MDCD_Timer_Read(void);
#endif

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#ifndef CPUINTRF_H
#define CPUINTRF_H
#include "osd_cpu.h"
#define CPU_16BIT_PORT 0x4000
#define CPU_FLAGS_MASK 0xff00
#define CLEAR_LINE 0
#define ASSERT_LINE 1
#define REG_PREVIOUSPC -1
#define REG_SP_CONTENTS -2
/* daisy-chain link */
typedef struct {
void (*reset)(int); /* reset callback */
int (*interrupt_entry)(int); /* entry callback */
void (*interrupt_reti)(int); /* reti callback */
int irq_param; /* callback paramater */
} Z80_DaisyChain;
#define Z80_MAXDAISY 4 /* maximum of daisy chan device */
#define Z80_INT_REQ 0x01 /* interrupt request mask */
#define Z80_INT_IEO 0x02 /* interrupt disable mask(IEO) */
#define Z80_VECTOR(device,state) (((device)<<8)|(state))
#endif /* CPUINTRF_H */

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/* Mednafen - Multi-system Emulator
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "shared.h"
#include "debug.h"
#include <desa68/desa68.h>
namespace MDFN_IEN_MD
{
bool MD_DebugMode = FALSE;
static void (*DriverCPUHook)(uint32);
static c68k_struc Main68K_BP;
static void (*BPCallB)(uint32 PC) = NULL;
static bool BPActive = FALSE; // Any breakpoints on?
static bool BPNonPCActive = FALSE; // Any breakpoints other than PC on?
static bool FoundBPoint;
typedef struct
{
uint32 A[2];
int type;
} MD_BPOINT;
static std::vector<MD_BPOINT> BreakPointsPC, BreakPointsRead, BreakPointsWrite;
static std::vector<MD_BPOINT> BreakPointsAux0Read, BreakPointsAux0Write;
enum
{
C68K_GSREG_PC = 0,
C68K_GSREG_SR,
C68K_GSREG_D0,
C68K_GSREG_D7 = C68K_GSREG_D0 + 7,
C68K_GSREG_A0,
C68K_GSREG_A7 = C68K_GSREG_A0 + 7,
};
static uint32 M68K_GetRegister(const unsigned int id, char *special, const uint32 special_len)
{
uint32 ret = 0xDEADBEEF;
if(id == C68K_GSREG_PC)
{
ret = C68k_Get_PC(&Main68K);
}
else if(id == C68K_GSREG_SR)
{
ret = C68k_Get_SR(&Main68K);
}
else if(id >= C68K_GSREG_D0 && id <= C68K_GSREG_D7)
{
ret = C68k_Get_DReg(&Main68K, id - C68K_GSREG_D0);
}
else if(id >= C68K_GSREG_A0 && id <= C68K_GSREG_A7)
{
ret = C68k_Get_AReg(&Main68K, id - C68K_GSREG_A0);
}
return(ret);
}
void M68K_SetRegister(const unsigned int id, uint32 value)
{
if(id == C68K_GSREG_PC)
{
C68k_Set_PC(&Main68K, value);
}
}
static RegType M68K_Regs[] =
{
{ C68K_GSREG_PC, "PC", "Program Counter", 4 },
{ 0, "------", "", 0xFFFF },
{ C68K_GSREG_D0 + 0, "D0", "D0(Data Register 0)", 4 },
{ C68K_GSREG_D0 + 1, "D1", "D1(Data Register 1)", 4 },
{ C68K_GSREG_D0 + 2, "D2", "D2(Data Register 2)", 4 },
{ C68K_GSREG_D0 + 3, "D3", "D3(Data Register 3)", 4 },
{ C68K_GSREG_D0 + 4, "D4", "D4(Data Register 4)", 4 },
{ C68K_GSREG_D0 + 5, "D5", "D5(Data Register 5)", 4 },
{ C68K_GSREG_D0 + 6, "D6", "D6(Data Register 6)", 4 },
{ C68K_GSREG_D0 + 7, "D7", "D7(Data Register 7)", 4 },
{ 0, "------", "", 0xFFFF },
{ C68K_GSREG_A0 + 0, "A0", "A0(Address Register 0)", 4 },
{ C68K_GSREG_A0 + 1, "A1", "A1(Address Register 1)", 4 },
{ C68K_GSREG_A0 + 2, "A2", "A2(Address Register 2)", 4 },
{ C68K_GSREG_A0 + 3, "A3", "A3(Address Register 3)", 4 },
{ C68K_GSREG_A0 + 4, "A4", "A4(Address Register 4)", 4 },
{ C68K_GSREG_A0 + 5, "A5", "A5(Address Register 5)", 4 },
{ C68K_GSREG_A0 + 6, "A6", "A6(Address Register 6)", 4 },
{ C68K_GSREG_A0 + 7, "A7", "A7/USP(Address Register 7 / User Stack Pointer)", 4 },
{ 0, "------", "", 0xFFFF },
{ C68K_GSREG_SR, "SR", "Status Register", 2 },
{ 0, "", "", 0 },
};
static RegGroupType M68K_RegsGroup =
{
"M68K",
M68K_Regs,
M68K_GetRegister,
M68K_SetRegister
};
uint32 MemPeek(uint32 A, unsigned int bsize, bool hl, bool logical)
{
uint32 ret = 0;
MD_HackyHackyMode++;
for(unsigned int i = 0; i < bsize; i++)
{
A &= 0xFFFFFF;
ret |= MD_ReadMemory8(A) << ((bsize - 1 - i) * 8);
A++;
}
MD_HackyHackyMode--;
return(ret);
}
static uint16_t dis_callb(uint32_t A, void *private_data)
{
return(MD_ReadMemory16(A & 0xFFFFFF));
}
void Disassemble(uint32 &a, uint32 SpecialA, char *TextBuf)
{
DESA68parm_t d;
a &= 0xFFFFFE;
//printf("Disassemble %06x: ", a);
strcpy(TextBuf, "Invalid");
memset(&d, 0, sizeof(DESA68parm_t));
d.mem_callb = dis_callb;
d.memmsk = 0xFFFFFF;
d.pc = a;
d.str = TextBuf;
d.strmax = 255; // FIXME, MDFN API change
MD_HackyHackyMode++;
desa68(&d);
MD_HackyHackyMode--;
a = d.pc & 0xFFFFFF;
if(d.pc & 1)
puts("Oops");
if(!d.status)
strcpy(TextBuf, "Invalid");
//printf("%d\n", d.status);
// puts(TextBuf);
}
static inline void C68k_Copy_State2(const c68k_struc *source, c68k_struc *dest)
{
memcpy(&dest->D[0], &source->D[0], ((uint8 *)&(source->dirty1)) - ((uint8 *)&(source->D[0])));
}
void MDDBG_CPUHook(void) //uint32 PC, uint16 op)
{
uint32 PC = C68k_Get_PC(&Main68K);
std::vector<MD_BPOINT>::iterator bpit;
FoundBPoint = 0;
for(bpit = BreakPointsPC.begin(); bpit != BreakPointsPC.end(); bpit++)
{
if(PC >= bpit->A[0] && PC <= bpit->A[1])
{
FoundBPoint = TRUE;
break;
}
}
if(BPNonPCActive)
{
MD_HackyHackyMode++;
C68k_Copy_State2(&Main68K, &Main68K_BP);
//printf("Moo: %08x\n", C68k_Get_PC(&Main68K_BP)); //, (int)(((uint8 *)&(Main68K.dirty1)) - ((uint8 *)&(Main68K.D[0]))));
C68k_Exec(&Main68K_BP);
MD_HackyHackyMode--;
}
if(FoundBPoint)
BPCallB(PC);
if(DriverCPUHook)
DriverCPUHook(PC);
}
static void RedoCPUHook(void)
{
//C68k_Set_Debug(&Main68K, DriverCPUHook ? CPUHookHandler : NULL);
BPNonPCActive = BreakPointsRead.size() || BreakPointsWrite.size() || BreakPointsAux0Read.size() || BreakPointsAux0Write.size();
BPActive = BPNonPCActive || BreakPointsPC.size();
MD_DebugMode = (DriverCPUHook || BPActive);
}
static void AddBreakPoint(int type, unsigned int A1, unsigned int A2, bool logical)
{
MD_BPOINT tmp;
tmp.A[0] = A1;
tmp.A[1] = A2;
tmp.type = type;
if(type == BPOINT_READ)
BreakPointsRead.push_back(tmp);
else if(type == BPOINT_WRITE)
BreakPointsWrite.push_back(tmp);
else if(type == BPOINT_IO_READ)
BreakPointsAux0Read.push_back(tmp);
else if(type == BPOINT_AUX_WRITE)
BreakPointsAux0Write.push_back(tmp);
else if(type == BPOINT_PC)
BreakPointsPC.push_back(tmp);
RedoCPUHook();
}
void FlushBreakPoints(int type)
{
std::vector<MD_BPOINT>::iterator bpit;
if(type == BPOINT_READ)
BreakPointsRead.clear();
else if(type == BPOINT_WRITE)
BreakPointsWrite.clear();
else if(type == BPOINT_AUX_READ)
BreakPointsAux0Read.clear();
else if(type == BPOINT_AUX_WRITE)
BreakPointsAux0Write.clear();
else if(type == BPOINT_PC)
BreakPointsPC.clear();
RedoCPUHook();
}
void SetCPUCallback(void (*callb)(uint32 PC))
{
DriverCPUHook = callb;
RedoCPUHook();
}
void SetBPCallback(void (*callb)(uint32 PC))
{
BPCallB = callb;
}
std::vector<BranchTraceResult> GetBranchTrace(void)
{
std::vector<BranchTraceResult> ret;
return(ret);
}
static void GetAddressSpaceBytes(const char *name, uint32 Address, uint32 Length, uint8 *Buffer)
{
MD_HackyHackyMode++;
if(!strcmp(name, "cpu"))
{
while(Length--)
{
Address &= 0xFFFFFF;
*Buffer = MD_ReadMemory8(Address);
Address++;
Buffer++;
}
}
else if(!strcmp(name, "ram"))
{
while(Length--)
{
*Buffer = MD_ReadMemory8((Address & 0xFFFF) | 0xFF0000);
Address++;
Buffer++;
}
}
MD_HackyHackyMode--;
}
static void PutAddressSpaceBytes(const char *name, uint32 Address, uint32 Length, uint32 Granularity, bool hl, const uint8 *Buffer)
{
if(!strcmp(name, "cpu"))
{
while(Length--)
{
Address &= 0xFFFFFF;
}
}
else if(!strcmp(name, "ram"))
{
while(Length--)
{
MD_WriteMemory8((Address & 0xFFFF) | 0xFF0000, *Buffer);
Address++;
Buffer++;
}
}
}
static int dbg_int_ack_callback(int int_level)
{
return C68K_INT_ACK_AUTOVECTOR;
}
static uint8 MDDBG_ReadMemory8(uint32 address)
{
std::vector<MD_BPOINT>::iterator bpit;
address &= 0xFFFFFF;
for(bpit = BreakPointsRead.begin(); bpit != BreakPointsRead.end(); bpit++)
{
if(address >= bpit->A[0] && address <= bpit->A[1])
{
FoundBPoint = TRUE;
break;
}
}
return(MD_ReadMemory8(address));
}
static uint16 MDDBG_ReadMemory16(uint32 address)
{
std::vector<MD_BPOINT>::iterator bpit;
address &= 0xFFFFFF;
for(bpit = BreakPointsRead.begin(); bpit != BreakPointsRead.end(); bpit++)
{
if((address | 1) >= bpit->A[0] && address <= bpit->A[1])
{
FoundBPoint = TRUE;
break;
}
}
//printf("Read: %08x\n", address);
return(MD_ReadMemory16(address));
}
static void MDDBG_WriteMemory8(uint32 address, uint8 value)
{
std::vector<MD_BPOINT>::iterator bpit;
address &= 0xFFFFFF;
for(bpit = BreakPointsWrite.begin(); bpit != BreakPointsWrite.end(); bpit++)
{
if(address >= bpit->A[0] && address <= bpit->A[1])
{
FoundBPoint = TRUE;
break;
}
}
}
static void MDDBG_WriteMemory16(uint32 address, uint16 value)
{
std::vector<MD_BPOINT>::iterator bpit;
address &= 0xFFFFFF;
for(bpit = BreakPointsWrite.begin(); bpit != BreakPointsWrite.end(); bpit++)
{
if((address | 1) >= bpit->A[0] && address <= bpit->A[1])
{
FoundBPoint = TRUE;
break;
}
}
}
bool MDDBG_Init(void)
{
MDFNDBG_AddRegGroup(&M68K_RegsGroup);
ASpace_Add(GetAddressSpaceBytes, PutAddressSpaceBytes, "cpu", "CPU Physical", 24);
ASpace_Add(GetAddressSpaceBytes, PutAddressSpaceBytes, "ram", "Work RAM", 16);
C68k_Init(&Main68K_BP, dbg_int_ack_callback);
C68k_Set_TAS_Hack(&Main68K_BP, 1);
C68k_Set_ReadB(&Main68K_BP, MDDBG_ReadMemory8);
C68k_Set_ReadW(&Main68K_BP, MDDBG_ReadMemory16);
C68k_Set_WriteB(&Main68K_BP, MDDBG_WriteMemory8);
C68k_Set_WriteW(&Main68K_BP, MDDBG_WriteMemory16);
MD_DebugMode = FALSE;
return(TRUE);
}
DebuggerInfoStruct DBGInfo =
{
"shift_jis",
10, // Max instruction size(bytes)
2, // Instruction alignment(bytes)
24, // Logical address bits
24, // Physical address bits
0xFF0000, // Default watch address
~0U, // ZP
MemPeek,
Disassemble,
NULL,
NULL, // IRQ,
NULL, // NESDBG_GetVector,
FlushBreakPoints,
AddBreakPoint,
SetCPUCallback,
SetBPCallback,
GetBranchTrace,
NULL, //SetGraphicsDecode,
NULL, //GetGraphicsDecodeBuffer,
NULL, //SetLogFunc,
};
};

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#ifndef __MDFN_MD_DEBUG_H
#define __MDFN_MD_DEBUG_H
#ifdef WANT_DEBUGGER
namespace MDFN_IEN_MD
{
extern DebuggerInfoStruct DBGInfo;
bool MDDBG_Init(void);
void MDDBG_CPUHook(void);
extern bool MD_DebugMode;
};
#endif
#endif

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@ -1,131 +0,0 @@
/*
Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "shared.h"
namespace MDFN_IEN_MD
{
uint8 (*MD_ExtRead8)(uint32 address) = NULL;
uint16 (*MD_ExtRead16)(uint32 address) = NULL;
void (*MD_ExtWrite8)(uint32 address, uint8 value) = NULL;
void (*MD_ExtWrite16)(uint32 address, uint16 value) = NULL;
uint8 *cart_rom = NULL; //[0x400000]; /* Cartridge ROM */
uint8 work_ram[0x10000]; /* 68K work RAM */
uint8 zram[0x2000]; /* Z80 work RAM */
uint8 zbusreq; /* /BUSREQ from Z80 */
uint8 zreset; /* /RESET to Z80 */
uint8 zbusack; /* /BUSACK to Z80 */
uint8 zirq; /* /IRQ to Z80 */
uint32 zbank; /* Address of Z80 bank window */
uint8 gen_running;
c68k_struc Main68K;
MDVDP MainVDP;
/*--------------------------------------------------------------------------*/
/* Init, reset, shutdown functions */
/*--------------------------------------------------------------------------*/
int vdp_int_ack_callback(int int_level)
{
return(MainVDP.IntAckCallback(int_level));
}
void gen_init(void)
{
C68k_Init(&Main68K, vdp_int_ack_callback);
C68k_Set_TAS_Hack(&Main68K, 1);
C68k_Set_ReadB(&Main68K, MD_ReadMemory8);
C68k_Set_ReadW(&Main68K, MD_ReadMemory16);
C68k_Set_WriteB(&Main68K, MD_WriteMemory8);
C68k_Set_WriteW(&Main68K, MD_WriteMemory16);
}
void gen_reset(bool poweron)
{
/* Clear RAM */
if(poweron)
{
memset(work_ram, 0, sizeof(work_ram));
memset(zram, 0, sizeof(zram));
}
gen_running = 1;
zreset = 0; /* Z80 is reset */
zbusreq = 0; /* Z80 has control of the Z bus */
zbusack = 1; /* Z80 is busy using the Z bus */
zbank = 0; /* Assume default bank is 000000-007FFF */
zirq = 0; /* No interrupts occuring */
if(poweron)
{
gen_io_reset();
}
C68k_Reset(&Main68K);
z80_reset();
}
void gen_shutdown(void)
{
}
/*--------------------------------------------------------------------------*/
/* Bus controller chip functions */
/*--------------------------------------------------------------------------*/
int gen_busack_r(void)
{
//printf("busack_r: %d, %d\n", zbusack, md_timestamp);
return (zbusack & 1);
}
void gen_busreq_w(int state)
{
//printf("BUSREQ: %d, %d, %d\n", state, md_timestamp, scanline);
zbusreq = (state & 1);
zbusack = 1 ^ (zbusreq & zreset);
}
void gen_reset_w(int state)
{
//printf("ZRESET: %d, %d\n", state, md_timestamp);
zreset = (state & 1);
zbusack = 1 ^ (zbusreq & zreset);
MDSound_SetYM2612Reset(!zreset);
if(zreset == 0)
{
z80_reset();
}
}
void gen_bank_w(int state)
{
zbank = ((zbank >> 1) | ((state & 1) << 23)) & 0xFF8000;
}
}

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@ -1,42 +0,0 @@
#ifndef _GENESIS_H_
#define _GENESIS_H_
namespace MDFN_IEN_MD
{
extern uint8 (*MD_ExtRead8)(uint32 address);
extern uint16 (*MD_ExtRead16)(uint32 address);
extern void (*MD_ExtWrite8)(uint32 address, uint8 value);
extern void (*MD_ExtWrite16)(uint32 address, uint16 value);
class MDVDP;
/* Global variables */
extern uint8 *cart_rom; //[0x400000];
extern uint8 work_ram[0x10000];
extern uint8 zram[0x2000];
extern uint8 zbusreq;
extern uint8 zbusack;
extern uint8 zreset;
extern uint8 zirq;
extern uint32 zbank;
extern uint8 gen_running;
extern c68k_struc Main68K;
extern MDVDP MainVDP;
/* Function prototypes */
void gen_init(void);
void gen_reset(bool poweron);
void gen_shutdown(void);
int gen_busack_r(void);
void gen_busreq_w(int state);
void gen_reset_w(int state);
void gen_bank_w(int state);
int z80_irq_callback(int param);
void m68k_irq_ack_callback(int int_level);
}
#endif /* _GEN_H_ */

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/*
genio.c
I/O controller chip emulation
*/
#include "shared.h"
#include "input/gamepad.h"
#include "input/mouse.h"
namespace MDFN_IEN_MD
{
static bool is_pal;
static bool is_overseas;
static bool is_overseas_reported;
static bool is_pal_reported;
// 3 internal ports
enum port_names {PORT_A = 0, PORT_B, PORT_C, PORT_MAX};
enum device_names {DEVICE_NONE = 0, DEVICE_MS2B, DEVICE_MD3B, DEVICE_MD6B, DEVICE_MM};
static void SetDevice(int i, int type);
static MD_Input_Device *port[PORT_MAX] = { NULL };
static InputDeviceInfoStruct InputDeviceInfo[] =
{
// None
{
"none",
"none",
NULL,
NULL,
0,
NULL
},
{
"gamepad2",
"2-Button Gamepad",
NULL,
NULL,
sizeof(Gamepad2IDII) / sizeof(InputDeviceInputInfoStruct),
Gamepad2IDII,
},
{
"gamepad",
"3-Button Gamepad",
NULL,
NULL,
sizeof(GamepadIDII) / sizeof(InputDeviceInputInfoStruct),
GamepadIDII,
},
{
"gamepad6",
"6-Button Gamepad",
NULL,
NULL,
sizeof(Gamepad6IDII) / sizeof(InputDeviceInputInfoStruct),
Gamepad6IDII,
},
{
"megamouse",
"Sega Mega Mouse",
NULL,
NULL,
sizeof(MegaMouseIDII) / sizeof(InputDeviceInputInfoStruct),
MegaMouseIDII,
},
};
static const InputPortInfoStruct PortInfo[] =
{
{ "port1", "Port 1", sizeof(InputDeviceInfo) / sizeof(InputDeviceInfoStruct), InputDeviceInfo, "gamepad" },
{ "port2", "Port 2", sizeof(InputDeviceInfo) / sizeof(InputDeviceInfoStruct), InputDeviceInfo, "gamepad" }
};
InputInfoStruct MDInputInfo =
{
sizeof(PortInfo) / sizeof(InputPortInfoStruct),
PortInfo
};
static void UpdateBusThing(const int32 master_timestamp);
void MDIO_Init(bool overseas, bool PAL, bool overseas_reported, bool PAL_reported)
{
is_overseas = overseas;
is_pal = PAL;
is_overseas_reported = overseas_reported;
is_pal_reported = PAL_reported;
for(int i = 0; i < PORT_MAX; i++)
SetDevice(i, DEVICE_NONE);
UpdateBusThing(md_timestamp);
}
static uint8 PortData[3];
static uint8 PortDataBus[3];
static uint8 PortCtrl[3];
static uint8 PortTxData[3];
static uint8 PortSCtrl[3];
static void UpdateBusThing(const int32 master_timestamp)
{
for(int i = 0; i < PORT_MAX; i++)
{
PortDataBus[i] &= ~PortCtrl[i];
PortDataBus[i] |= PortData[i] & PortCtrl[i];
port[i]->UpdateBus(master_timestamp, PortDataBus[i], PortCtrl[i] & 0x7F);
}
}
void gen_io_reset(void)
{
for(int i = 0; i < 3; i++)
{
PortDataBus[i] = 0x7F;
PortData[i] = 0x00;
PortCtrl[i] = 0x00;
PortTxData[i] = 0xFF;
PortSCtrl[i] = 0x00;
port[i]->Power(); // Should be called before Write(...)
}
PortTxData[2] = 0xFB;
UpdateBusThing(0);
}
/*--------------------------------------------------------------------------*/
/* I/O chip functions */
/*--------------------------------------------------------------------------*/
void gen_io_w(int offset, int value)
{
//printf("I/O Write: %04x:%04x, %d @ %08x\n", offset, value, md_timestamp, C68k_Get_PC(&Main68K));
switch(offset)
{
case 0x01: /* Port A Data */
case 0x02: /* Port B Data */
case 0x03: /* Port C Data */
{
int wp = offset - 0x01;
PortData[wp] = value;
}
UpdateBusThing(md_timestamp);
break;
case 0x04: /* Port A Ctrl */
case 0x05: /* Port B Ctrl */
case 0x06: /* Port C Ctrl */
{
int wp = offset - 0x04;
PortCtrl[wp] = value;
}
UpdateBusThing(md_timestamp);
break;
case 0x07: /* Port A TxData */
case 0x0A: /* Port B TxData */
case 0x0D: /* Port C TxData */
PortTxData[(offset - 0x07) / 3] = value;
break;
case 0x09: /* Port A S-Ctrl */
case 0x0C: /* Port B S-Ctrl */
case 0x0F: /* Port C S-Ctrl */
PortSCtrl[(offset - 0x09) / 3] = value & 0xF8;
break;
}
}
int gen_io_r(int offset)
{
uint8 ret;
uint8 temp;
uint8 has_scd = MD_IsCD ? 0x00 : 0x20;
uint8 gen_ver = 0x00; /* Version 0 hardware */
switch(offset)
{
default:
ret = 0x00;
printf("Unmapped I/O Read: %04x\n", offset);
break;
case 0x00: /* Version */
temp = 0x00;
if(is_overseas_reported)
temp |= 0x80;
if(is_pal_reported)
temp |= 0x40;
ret = (temp | has_scd | gen_ver);
break;
case 0x01: /* Port A Data */
case 0x02: /* Port B Data */
case 0x03: /* Port C Data */
{
int wp = offset - 0x01;
UpdateBusThing(md_timestamp);
ret = (PortDataBus[wp] & 0x7F) | (PortCtrl[wp] & 0x80);
}
break;
case 0x04: /* Port A Ctrl */
case 0x05: /* Port B Ctrl */
case 0x06: /* Port C Ctrl */
ret = PortCtrl[offset - 0x04];
break;
case 0x07: /* Port A TxData */
case 0x0A: /* Port B TxData */
case 0x0D: /* Port C TxData */
ret = PortTxData[(offset - 0x07) / 3];
break;
case 0x09: /* Port A S-Ctrl */
case 0x0C: /* Port B S-Ctrl */
case 0x0F: /* Port C S-Ctrl */
ret = PortSCtrl[(offset - 0x09) / 3];
break;
}
//printf("I/O Read: %04x ret=%02x, %d @ %08x\n", offset, ret, md_timestamp, C68k_Get_PC(&Main68K));
return(ret);
}
void MDIO_BeginTimePeriod(const int32 timestamp_base)
{
for(int i = 0; i < 3; i++)
port[i]->BeginTimePeriod(timestamp_base);
}
void MDIO_EndTimePeriod(const int32 master_timestamp)
{
for(int i = 0; i < 3; i++)
port[i]->EndTimePeriod(master_timestamp);
}
/*--------------------------------------------------------------------------*/
/* Null device */
/*--------------------------------------------------------------------------*/
MD_Input_Device::MD_Input_Device()
{
}
MD_Input_Device::~MD_Input_Device()
{
}
void MD_Input_Device::Power(void)
{
}
void MD_Input_Device::UpdateBus(const int32 master_timestamp, uint8 &bus, const uint8 genesis_asserted)
{
// printf("%02x -- %02x\n", bus, genesis_asserted);
// bus |= 0x3F &~ genesis_asserted;
// bus &= genesis_asserted;
}
void MD_Input_Device::UpdatePhysicalState(const void *data)
{
}
void MD_Input_Device::BeginTimePeriod(const int32 timestamp_base)
{
}
void MD_Input_Device::EndTimePeriod(const int32 master_timestamp)
{
}
int MD_Input_Device::StateAction(StateMem *sm, int load, int data_only, const char *section_prefix)
{
return(1);
}
static void SetDevice(int i, int type)
{
if(port[i])
delete port[i];
switch(type)
{
case DEVICE_NONE:
port[i] = new MD_Input_Device();
break;
case DEVICE_MS2B:
port[i] = MDInput_MakeMS2B();
break;
case DEVICE_MD3B:
port[i] = MDInput_MakeMD3B();
break;
case DEVICE_MD6B:
port[i] = MDInput_MakeMD6B();
break;
case DEVICE_MM:
port[i] = MDInput_MakeMegaMouse();
break;
}
port[i]->Power();
}
static void *data_ptr[8];
void MDINPUT_Frame(void)
{
for(int i = 0; i < 2; i++)
{
port[i]->UpdatePhysicalState(data_ptr[i]);
}
}
void MDINPUT_SetInput(int aport, const char *type, void *ptr)
{
int itype = 0;
if(!strcasecmp(type, "none"))
{
itype = DEVICE_NONE;
}
if(!strcasecmp(type, "gamepad"))
{
itype = DEVICE_MD3B;
}
else if(!strcasecmp(type, "gamepad6"))
{
itype = DEVICE_MD6B;
}
else if(!strcasecmp(type, "gamepad2"))
{
itype = DEVICE_MS2B;
}
else if(!strcasecmp(type, "megamouse"))
{
itype = DEVICE_MM;
}
data_ptr[aport] = ptr;
SetDevice(aport, itype);
UpdateBusThing(md_timestamp);
}
int MDINPUT_StateAction(StateMem *sm, int load, int data_only)
{
SFORMAT StateRegs[] =
{
SFARRAY(PortData, 3),
SFARRAY(PortCtrl, 3),
SFARRAY(PortTxData, 3),
SFARRAY(PortSCtrl, 3),
SFARRAY(PortDataBus, 3),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, "IO");
ret &= port[0]->StateAction(sm, load, data_only, "PRTA");
ret &= port[1]->StateAction(sm, load, data_only, "PRTB");
ret &= port[2]->StateAction(sm, load, data_only, "PRTC");
if(load)
{
}
return(ret);
}
}

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#ifndef __MDFN_MD_GENIO_H
#define __MDFN_MD_GENIO_H
namespace MDFN_IEN_MD
{
/* Function prototypes */
extern void gen_io_reset(void);
extern void gen_io_w(int offset, int value);
extern int gen_io_r(int offset);
extern void gen_io_update(void);
extern void gen_io_set_device(int which, int type);
void MDIO_BeginTimePeriod(const int32 timestamp_base);
void MDIO_EndTimePeriod(const int32 master_timestamp);
void MDIO_Init(bool overseas, bool PAL, bool overseas_reported, bool PAL_reported);
void MDINPUT_Frame(void);
void MDINPUT_SetInput(int port, const char *type, void *ptr);
extern InputInfoStruct MDInputInfo;
class MD_Input_Device
{
public:
MD_Input_Device();
virtual ~MD_Input_Device();
virtual void Power(void);
// genesis_asserted is intended for more accurately emulating a device that has pull-up or pull-down resistors
// on one or more data lines.
virtual void UpdateBus(const int32 master_timestamp, uint8 &bus, const uint8 genesis_asserted); // genesis_asserted should
virtual void UpdatePhysicalState(const void *data);
virtual void BeginTimePeriod(const int32 timestamp_base);
virtual void EndTimePeriod(const int32 master_timestamp);
virtual int StateAction(StateMem *sm, int load, int data_only, const char *section_prefix);
};
int MDINPUT_StateAction(StateMem *sm, int load, int data_only);
}
#endif

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@ -1,69 +0,0 @@
static const uint8 cycle2hc32[488] =
{
0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x02, 0x02, 0x02, 0x03, 0x03, 0x03, 0x04, 0x04, 0x04, 0x05,
0x05, 0x05, 0x06, 0x06, 0x07, 0x07, 0x07, 0x08, 0x08, 0x08, 0x09, 0x09, 0x09, 0x0A, 0x0A, 0x0A,
0x0B, 0x0B, 0x0B, 0x0C, 0x0C, 0x0C, 0x0D, 0x0D, 0x0E, 0x0E, 0x0E, 0x0F, 0x0F, 0x0F, 0x10, 0x10,
0x10, 0x11, 0x11, 0x11, 0x12, 0x12, 0x12, 0x13, 0x13, 0x13, 0x14, 0x14, 0x15, 0x15, 0x15, 0x16,
0x16, 0x16, 0x17, 0x17, 0x17, 0x18, 0x18, 0x18, 0x19, 0x19, 0x19, 0x1A, 0x1A, 0x1B, 0x1B, 0x1B,
0x1C, 0x1C, 0x1C, 0x1D, 0x1D, 0x1D, 0x1E, 0x1E, 0x1E, 0x1F, 0x1F, 0x1F, 0x20, 0x20, 0x20, 0x21,
0x21, 0x22, 0x22, 0x22, 0x23, 0x23, 0x23, 0x24, 0x24, 0x24, 0x25, 0x25, 0x25, 0x26, 0x26, 0x26,
0x27, 0x27, 0x27, 0x28, 0x28, 0x29, 0x29, 0x29, 0x2A, 0x2A, 0x2A, 0x2B, 0x2B, 0x2B, 0x2C, 0x2C,
0x2C, 0x2D, 0x2D, 0x2D, 0x2E, 0x2E, 0x2F, 0x2F, 0x2F, 0x30, 0x30, 0x30, 0x31, 0x31, 0x31, 0x32,
0x32, 0x32, 0x33, 0x33, 0x33, 0x34, 0x34, 0x34, 0x35, 0x35, 0x36, 0x36, 0x36, 0x37, 0x37, 0x37,
0x38, 0x38, 0x38, 0x39, 0x39, 0x39, 0x3A, 0x3A, 0x3A, 0x3B, 0x3B, 0x3B, 0x3C, 0x3C, 0x3D, 0x3D,
0x3D, 0x3E, 0x3E, 0x3E, 0x3F, 0x3F, 0x3F, 0x40, 0x40, 0x40, 0x41, 0x41, 0x41, 0x42, 0x42, 0x42,
0x43, 0x43, 0x44, 0x44, 0x44, 0x45, 0x45, 0x45, 0x46, 0x46, 0x46, 0x47, 0x47, 0x47, 0x48, 0x48,
0x48, 0x49, 0x49, 0x4A, 0x4A, 0x4A, 0x4B, 0x4B, 0x4B, 0x4C, 0x4C, 0x4C, 0x4D, 0x4D, 0x4D, 0x4E,
0x4E, 0x4E, 0x4F, 0x4F, 0x4F, 0x50, 0x50, 0x51, 0x51, 0x51, 0x52, 0x52, 0x52, 0x53, 0x53, 0x53,
0x54, 0x54, 0x54, 0x55, 0x55, 0x55, 0x56, 0x56, 0x56, 0x57, 0x57, 0x58, 0x58, 0x58, 0x59, 0x59,
0x59, 0x5A, 0x5A, 0x5A, 0x5B, 0x5B, 0x5B, 0x5C, 0x5C, 0x5C, 0x5D, 0x5D, 0x5E, 0x5E, 0x5E, 0x5F,
0x5F, 0x5F, 0x60, 0x60, 0x60, 0x61, 0x61, 0x61, 0x62, 0x62, 0x62, 0x63, 0x63, 0x63, 0x64, 0x64,
0x65, 0x65, 0x65, 0x66, 0x66, 0x66, 0x67, 0x67, 0x67, 0x68, 0x68, 0x68, 0x69, 0x69, 0x69, 0x6A,
0x6A, 0x6A, 0x6B, 0x6B, 0x6C, 0x6C, 0x6C, 0x6D, 0x6D, 0x6D, 0x6E, 0x6E, 0x6E, 0x6F, 0x6F, 0x6F,
0x70, 0x70, 0x70, 0x71, 0x71, 0x72, 0x72, 0x72, 0x73, 0x73, 0x73, 0x74, 0x74, 0x74, 0x75, 0x75,
0x75, 0x76, 0x76, 0x76, 0x77, 0x77, 0x77, 0x78, 0x78, 0x79, 0x79, 0x79, 0x7A, 0x7A, 0x7A, 0x7B,
0x7B, 0x7B, 0x7C, 0x7C, 0x7C, 0x7D, 0x7D, 0x7D, 0x7E, 0x7E, 0x7E, 0x7F, 0x7F, 0x80, 0x80, 0x80,
0x81, 0x81, 0x81, 0x82, 0x82, 0x82, 0x83, 0x83, 0x83, 0x84, 0x84, 0x84, 0x85, 0x85, 0x85, 0x86,
0x86, 0x87, 0x87, 0x87, 0x88, 0x88, 0x88, 0x89, 0x89, 0x89, 0x8A, 0x8A, 0x8A, 0x8B, 0x8B, 0x8B,
0x8C, 0x8C, 0x8D, 0x8D, 0x8D, 0x8E, 0x8E, 0x8E, 0x8F, 0x8F, 0x8F, 0x90, 0x90, 0x90, 0x91, 0x91,
0x91, 0x92, 0x92, 0x92, 0x93, 0x93, 0xE9, 0xE9, 0xE9, 0xEA, 0xEA, 0xEA, 0xEB, 0xEB, 0xEB, 0xEC,
0xEC, 0xEC, 0xED, 0xED, 0xED, 0xEE, 0xEE, 0xEE, 0xEF, 0xEF, 0xF0, 0xF0, 0xF0, 0xF1, 0xF1, 0xF1,
0xF2, 0xF2, 0xF2, 0xF3, 0xF3, 0xF3, 0xF4, 0xF4, 0xF4, 0xF5, 0xF5, 0xF6, 0xF6, 0xF6, 0xF7, 0xF7,
0xF7, 0xF8, 0xF8, 0xF8, 0xF9, 0xF9, 0xF9, 0xFA, 0xFA, 0xFA, 0xFB, 0xFB, 0xFB, 0xFC, 0xFC, 0xFD,
0xFD, 0xFD, 0xFE, 0xFE, 0xFE, 0xFF, 0xFF, 0xFF,
};
static const uint8 cycle2hc40[488] =
{
0x00, 0x00, 0x00, 0x01, 0x01, 0x02, 0x02, 0x03, 0x03, 0x03, 0x04, 0x04, 0x05, 0x05, 0x06, 0x06,
0x06, 0x07, 0x07, 0x08, 0x08, 0x09, 0x09, 0x09, 0x0A, 0x0A, 0x0B, 0x0B, 0x0C, 0x0C, 0x0C, 0x0D,
0x0D, 0x0E, 0x0E, 0x0F, 0x0F, 0x10, 0x10, 0x10, 0x11, 0x11, 0x12, 0x12, 0x13, 0x13, 0x13, 0x14,
0x14, 0x15, 0x15, 0x16, 0x16, 0x16, 0x17, 0x17, 0x18, 0x18, 0x19, 0x19, 0x19, 0x1A, 0x1A, 0x1B,
0x1B, 0x1C, 0x1C, 0x1C, 0x1D, 0x1D, 0x1E, 0x1E, 0x1F, 0x1F, 0x20, 0x20, 0x20, 0x21, 0x21, 0x22,
0x22, 0x23, 0x23, 0x23, 0x24, 0x24, 0x25, 0x25, 0x26, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29,
0x29, 0x29, 0x2A, 0x2A, 0x2B, 0x2B, 0x2C, 0x2C, 0x2D, 0x2D, 0x2D, 0x2E, 0x2E, 0x2F, 0x2F, 0x30,
0x30, 0x30, 0x31, 0x31, 0x32, 0x32, 0x33, 0x33, 0x33, 0x34, 0x34, 0x35, 0x35, 0x36, 0x36, 0x36,
0x37, 0x37, 0x38, 0x38, 0x39, 0x39, 0x39, 0x3A, 0x3A, 0x3B, 0x3B, 0x3C, 0x3C, 0x3D, 0x3D, 0x3D,
0x3E, 0x3E, 0x3F, 0x3F, 0x40, 0x40, 0x40, 0x41, 0x41, 0x42, 0x42, 0x43, 0x43, 0x43, 0x44, 0x44,
0x45, 0x45, 0x46, 0x46, 0x46, 0x47, 0x47, 0x48, 0x48, 0x49, 0x49, 0x4A, 0x4A, 0x4A, 0x4B, 0x4B,
0x4C, 0x4C, 0x4D, 0x4D, 0x4D, 0x4E, 0x4E, 0x4F, 0x4F, 0x50, 0x50, 0x50, 0x51, 0x51, 0x52, 0x52,
0x53, 0x53, 0x53, 0x54, 0x54, 0x55, 0x55, 0x56, 0x56, 0x56, 0x57, 0x57, 0x58, 0x58, 0x59, 0x59,
0x5A, 0x5A, 0x5A, 0x5B, 0x5B, 0x5C, 0x5C, 0x5D, 0x5D, 0x5D, 0x5E, 0x5E, 0x5F, 0x5F, 0x60, 0x60,
0x60, 0x61, 0x61, 0x62, 0x62, 0x63, 0x63, 0x63, 0x64, 0x64, 0x65, 0x65, 0x66, 0x66, 0x67, 0x67,
0x67, 0x68, 0x68, 0x69, 0x69, 0x6A, 0x6A, 0x6A, 0x6B, 0x6B, 0x6C, 0x6C, 0x6D, 0x6D, 0x6D, 0x6E,
0x6E, 0x6F, 0x6F, 0x70, 0x70, 0x70, 0x71, 0x71, 0x72, 0x72, 0x73, 0x73, 0x73, 0x74, 0x74, 0x75,
0x75, 0x76, 0x76, 0x77, 0x77, 0x77, 0x78, 0x78, 0x79, 0x79, 0x7A, 0x7A, 0x7A, 0x7B, 0x7B, 0x7C,
0x7C, 0x7D, 0x7D, 0x7D, 0x7E, 0x7E, 0x7F, 0x7F, 0x80, 0x80, 0x80, 0x81, 0x81, 0x82, 0x82, 0x83,
0x83, 0x84, 0x84, 0x84, 0x85, 0x85, 0x86, 0x86, 0x87, 0x87, 0x87, 0x88, 0x88, 0x89, 0x89, 0x8A,
0x8A, 0x8A, 0x8B, 0x8B, 0x8C, 0x8C, 0x8D, 0x8D, 0x8D, 0x8E, 0x8E, 0x8F, 0x8F, 0x90, 0x90, 0x90,
0x91, 0x91, 0x92, 0x92, 0x93, 0x93, 0x94, 0x94, 0x94, 0x95, 0x95, 0x96, 0x96, 0x97, 0x97, 0x97,
0x98, 0x98, 0x99, 0x99, 0x9A, 0x9A, 0x9A, 0x9B, 0x9B, 0x9C, 0x9C, 0x9D, 0x9D, 0x9D, 0x9E, 0x9E,
0x9F, 0x9F, 0xA0, 0xA0, 0xA1, 0xA1, 0xA1, 0xA2, 0xA2, 0xA3, 0xA3, 0xA4, 0xA4, 0xA4, 0xA5, 0xA5,
0xA6, 0xA6, 0xA7, 0xA7, 0xA7, 0xA8, 0xA8, 0xA9, 0xA9, 0xAA, 0xAA, 0xAA, 0xAB, 0xAB, 0xAC, 0xAC,
0xAD, 0xAD, 0xAD, 0xAE, 0xAE, 0xAF, 0xAF, 0xB0, 0xB0, 0xB1, 0xB1, 0xB1, 0xB2, 0xB2, 0xB3, 0xB3,
0xB4, 0xB4, 0xB4, 0xB5, 0xB5, 0xB6, 0xB6, 0xE4, 0xE4, 0xE4, 0xE5, 0xE5, 0xE6, 0xE6, 0xE7, 0xE7,
0xE7, 0xE8, 0xE8, 0xE9, 0xE9, 0xEA, 0xEA, 0xEB, 0xEB, 0xEB, 0xEC, 0xEC, 0xED, 0xED, 0xEE, 0xEE,
0xEE, 0xEF, 0xEF, 0xF0, 0xF0, 0xF1, 0xF1, 0xF1, 0xF2, 0xF2, 0xF3, 0xF3, 0xF4, 0xF4, 0xF4, 0xF5,
0xF5, 0xF6, 0xF6, 0xF7, 0xF7, 0xF7, 0xF8, 0xF8, 0xF9, 0xF9, 0xFA, 0xFA, 0xFB, 0xFB, 0xFB, 0xFC,
0xFC, 0xFD, 0xFD, 0xFE, 0xFE, 0xFE, 0xFF, 0xFF,
};

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@ -1,120 +0,0 @@
/* Mednafen - Multi-system Emulator
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "shared.h"
#include "header.h"
#include "../general.h"
#include <ctype.h>
namespace MDFN_IEN_MD
{
typedef struct
{
uint8 ascii;
uint8 numeric;
} region_lut_t;
static const region_lut_t region_lut[] =
{
{ 0xFF, 0x1 },
{ 0x00, 0x1 },
{ 0xd4, 0x1 },
{ 4, 0x4 }, // Silly Toy Story
{ ' ', 0x1 }, // Assume Japanese
{ 'J', 0x1 },
{ 'U', 0x4 },
{ 'E', 0x8 },
{ '0', 0x0 },
{ '1', 0x1 },
{ '2', 0x2 },
{ '3', 0x3 },
{ '4', 0x4 },
{ '5', 0x5 },
{ '6', 0x6 },
{ '7', 0x7 },
{ '8', 0x8 },
{ '9', 0x9 },
{ 'A', 0xa },
{ 'B', 0xb },
{ 'C', 0xc },
{ 'D', 0xd },
{ 'E', 0xe },
{ 'F', 0xf }
};
static uint8 get_region_numeric(uint8 code)
{
code = toupper(code);
for(int i = 0; i < sizeof(region_lut) / sizeof(region_lut_t); i++)
{
if(region_lut[i].ascii == code)
{
return(region_lut[i].numeric);
}
}
printf("Unknown region code: %c %02x\n", code, code);
//exit(1);
return(0x0);
}
void MD_ReadSegaHeader(const uint8 *header, md_game_info *ginfo)
{
ginfo->rom_size = 0; //fp->size;
memcpy(ginfo->copyright, header + 0x10, 16);
ginfo->copyright[16] = 0;
MDFN_RemoveControlChars(ginfo->copyright);
memcpy(ginfo->domestic_name, header + 0x20, 0x30);
ginfo->domestic_name[0x30] = 0;
MDFN_RemoveControlChars(ginfo->domestic_name);
memcpy(ginfo->overseas_name, header + 0x50, 0x30);
ginfo->overseas_name[0x30] = 0;
MDFN_RemoveControlChars(ginfo->overseas_name);
memcpy(ginfo->product_code, header + 0x82, 0x0C);
ginfo->product_code[0xC] = 0;
MDFN_RemoveControlChars(ginfo->product_code);
MDFN_trim(ginfo->product_code);
ginfo->checksum = (header[0x8E] << 8) | (header[0x8F] << 0);
for(int i = 0; i < 16; i++)
{
for(unsigned int iot = 0; iot < sizeof(IO_types) / sizeof(IO_type_t); iot++)
{
if(IO_types[iot].code_char == header[0x90 + i])
{
ginfo->io_support |= 1 << IO_types[iot].id;
break;
}
}
}
ginfo->region_support = get_region_numeric(header[0xF0]);
}
}

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@ -1,84 +0,0 @@
#ifndef __MDFN_MD_HEADER_H
#define __MDFN_MD_HEADER_H
namespace MDFN_IEN_MD
{
enum
{
REGIONMASK_JAPAN_NTSC = 1,
REGIONMASK_JAPAN_PAL = 2,
REGIONMASK_OVERSEAS_NTSC = 4,
REGIONMASK_OVERSEAS_PAL = 8
};
enum
{
IOS_GAMEPAD = 0,
IOS_GAMEPAD6B,
IOS_KEYBOARD,
IOS_PRINTER,
IOS_BALL,
IOS_FLOPPY,
IOS_ACTIVATOR,
IOS_TEAM_PLAY,
IOS_GAMEPAD_MS,
IOS_RS232C,
IOS_TABLET,
IOS_PADDLE,
IOS_CDROM,
IOS_MEGA_MOUSE
};
typedef struct
{
const int id;
const char code_char;
const char *name;
} IO_type_t;
static const IO_type_t IO_types[] =
{
{ IOS_GAMEPAD, 'J', "3-Button Gamepad" },
{ IOS_GAMEPAD6B, '6', "6-Button Gamepad" },
{ IOS_KEYBOARD, 'K', "Keyboard" },
{ IOS_PRINTER, 'P', "Printer" },
{ IOS_BALL, 'B', "Ball Controller" },
{ IOS_FLOPPY, 'F', "Floppy disk drive" },
{ IOS_ACTIVATOR, 'L', "Activator" },
{ IOS_TEAM_PLAY, '4', "Team Play" },
{ IOS_GAMEPAD_MS, '0', "2-Button Master System Gamepad" },
{ IOS_RS232C, 'R', "RS232C Serial Port" },
{ IOS_TABLET, 'T', "Tablet" },
{ IOS_PADDLE, 'V', "Paddle Controller" },
{ IOS_CDROM, 'C', "CD-ROM" },
{ IOS_MEGA_MOUSE, 'M', "Mega Mouse" },
};
typedef struct
{
uint32 rom_size;
uint32 io_support;
char copyright[0x10 + 1];
char domestic_name[0x30 + 1];
char overseas_name[0x30 + 1];
char product_code[0xC + 1];
uint16 checksum; // Recorded game checksum
uint8 region_support;
uint32 sram_type;
uint32 sram_start;
uint32 sram_end;
// Convenience, not set by the header parsing code:
uint8 md5[16];
uint8 info_header_md5[16];
uint16 checksum_real;
} md_game_info;
void MD_ReadSegaHeader(const uint8 *header, md_game_info *ginfo);
}
#endif

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@ -1,817 +0,0 @@
/***************************************************************************************
* Genesis Plus
* HV Counters
*
* Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald
* Eke-Eke (2007,2008,2009), additional code & fixes for the GCN/Wii port
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
****************************************************************************************/
/*
NTSC, 256x192
-------------
Lines Description
192 Active display
24 Bottom border
3 Bottom blanking
3 Vertical blanking
13 Top blanking
27 Top border
V counter values
00-DA, D5-FF
NTSC, 256x224
-------------
Lines Description
224 Active display
8 Bottom border
3 Bottom blanking
3 Vertical blanking
13 Top blanking
11 Top border
V counter values
00-EA, E5-FF
NTSC, 256x240
-------------
This mode does not work on NTSC machines. All 30 rows of the name table are
displayed, there is no border, blanking, or retrace period, and the next
frame starts after the 30th row. The display rolls continuously though it
can be stabilized by adjusting the vertical hold.
V counter values
00-FF, 00-06
PAL, 256x192
------------
Lines Description
192 Active display
48 Bottom border
3 Bottom blanking
3 Vertical blanking
13 Top blanking
54 Top border
V counter values
00-F2, BA-FF
PAL, 256x224
------------
Lines Description
224 Active display
32 Bottom border
3 Bottom blanking
3 Vertical blanking
13 Top blanking
38 Top border
V counter values
00-FF, 00-02, CA-FF
PAL, 256x240
------------
Lines Description
240 Active display
24 Bottom border
3 Bottom blanking
3 Vertical blanking
13 Top blanking
30 Top border
V counter values
00-FF, 00-0A, D2-FF
Here are some details about what the different screen areas look like,
useful if you are emulating overscan or if you want to have a 'virtual'
vertical hold control in your emulator.
Active display - Where the display generated by the VDP goes.
Bottom border - Filled with border color from VDP register #7.
Bottom blanking - Filled with a light black color. (like display was blanked)
Vertical sync - Filled with a pure black color. (like display was turned off)
Top blanking - Filled with a light black color. (like display was blanked)
Top border - Filled with the border color from VDP register #7.
*/
#ifndef _HVC_H_
#define _HVC_H_
/***************************************************************/
/* */
/* H-counter timings in H32 & H40 modes (starts from HINT) */
/* */
/* There are exactly 3420 Master Clock counts per raster line. */
/* */
/* in H32 mode, dot clock is divided from MCLK (MCLK/10). */
/* in H40 mode, dot clock is divided from EDCLK (EDCLK/2). */
/* */
/* EDCLK (external dot clock ?) is generated outside the VDP: */
/* During HSYNC, it is oscillating between MCLK/10 and MCLK/8, */
/* otherwise it is fixed to MCLK/8. */
/* */
/***************************************************************/
static const uint8 cycle2hc32[3420] =
{
/* end of active display (16 pixels -> 160 Mcycles) , H interrupt triggered, Vcounter increment */
0x85, 0x85, 0x85, 0x85, 0x85, 0x85,
0x85, 0x85, 0x85, 0x85, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86,
0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87,
0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x88, 0x88, 0x88, 0x88,
0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88,
0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89,
0x89, 0x89, 0x89, 0x89, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a,
0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b,
0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8c, 0x8c, 0x8c, 0x8c,
0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c,
/* right border (14 pixels -> 140 Mcycles) */
0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d,
0x8d, 0x8d, 0x8d, 0x8d, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e,
0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f,
0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x90, 0x90, 0x90, 0x90,
0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90,
0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91,
0x91, 0x91, 0x91, 0x91, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92,
0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93,
0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93,
/* right blanking (9 pixels -> 90 Mcycles) , VDP status HBLANK flag set */
0xe9, 0xe9, 0xe9, 0xe9,
0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9,
0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea,
0xea, 0xea, 0xea, 0xea, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb,
0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec,
0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xed, 0xed, 0xed, 0xed,
0xed, 0xed, 0xed, 0xed, 0xed, 0xed,
/* horizontal sync (26 pixels -> 260 Mcycles) */
0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed,
0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee,
0xee, 0xee, 0xee, 0xee, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef,
0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0,
0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf1, 0xf1, 0xf1, 0xf1,
0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1,
0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2,
0xf2, 0xf2, 0xf2, 0xf2, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3,
0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4,
0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf5, 0xf5, 0xf5, 0xf5,
0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5,
0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6,
0xf6, 0xf6, 0xf6, 0xf6, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7,
0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8,
0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf9, 0xf9, 0xf9, 0xf9,
0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9,
0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa,
/* left blanking (24 pixels -> 240 Mcycles) */
0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa,
0xfa, 0xfa, 0xfa, 0xfa, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb,
0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc,
0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfd, 0xfd, 0xfd, 0xfd,
0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd,
0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe,
0xfe, 0xfe, 0xfe, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01,
0x01, 0x01, 0x01, 0x01,
/* V interrupt triggered (MD mode) */
0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02,
0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03,
0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x05, 0x05, 0x05, 0x05,
0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06,
/* left border (13 pixels -> 130 Mcycles) , VDP status HBLANK flag cleared */
0x06, 0x06, 0x06, 0x06, 0x06, 0x06,
0x06, 0x06, 0x06, 0x06, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x09, 0x09, 0x09, 0x09,
0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09,
0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
0x0a, 0x0a, 0x0a, 0x0a, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b,
0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c,
0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c,
/* remaining active display (240 pixels -> 2400 Mcycles) */
0x0d, 0x0d, 0x0d, 0x0d,
0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d,
0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e,
0x0e, 0x0e, 0x0e, 0x0e, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f,
0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x11, 0x11, 0x11, 0x11,
0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11,
0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12,
0x12, 0x12, 0x12, 0x12, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13,
0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14,
0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x15, 0x15, 0x15, 0x15,
0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16,
0x16, 0x16, 0x16, 0x16, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x19, 0x19, 0x19, 0x19,
0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19,
0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a,
0x1a, 0x1a, 0x1a, 0x1a, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b,
0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c,
0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1d, 0x1d, 0x1d, 0x1d,
0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d,
0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e,
0x1e, 0x1e, 0x1e, 0x1e, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f,
0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x21, 0x21,
0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21,
0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22,
0x22, 0x22, 0x22, 0x22, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23,
0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24,
0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x25, 0x25, 0x25, 0x25,
0x25, 0x25, 0x25, 0x25, 0x25, 0x25, 0x25, 0x25, 0x25, 0x25, 0x25, 0x25, 0x25, 0x25, 0x25, 0x25,
0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26,
0x26, 0x26, 0x26, 0x26, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27,
0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28,
0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x29, 0x29, 0x29, 0x29,
0x29, 0x29, 0x29, 0x29, 0x29, 0x29, 0x29, 0x29, 0x29, 0x29, 0x29, 0x29, 0x29, 0x29, 0x29, 0x29,
0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a,
0x2a, 0x2a, 0x2a, 0x2a, 0x2b, 0x2b, 0x2b, 0x2b, 0x2b, 0x2b, 0x2b, 0x2b, 0x2b, 0x2b, 0x2b, 0x2b,
0x2b, 0x2b, 0x2b, 0x2b, 0x2b, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c,
0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2d,
0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d,
0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e,
0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f,
0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30,
0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x31, 0x31, 0x31,
0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31,
0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32,
0x32, 0x32, 0x32, 0x32, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34,
0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x35, 0x35, 0x35, 0x35,
0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35,
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
0x36, 0x36, 0x36, 0x36, 0x37, 0x37, 0x37, 0x37, 0x37, 0x37, 0x37, 0x37, 0x37, 0x37, 0x37, 0x37,
0x37, 0x37, 0x37, 0x37, 0x37, 0x37, 0x37, 0x37, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38,
0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x39, 0x39, 0x39, 0x39,
0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39,
0x3a, 0x3a, 0x3a, 0x3a, 0x3a, 0x3a, 0x3a, 0x3a, 0x3a, 0x3a, 0x3a, 0x3a, 0x3a, 0x3a, 0x3a, 0x3a,
0x3a, 0x3a, 0x3a, 0x3a, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b,
0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3c, 0x3c, 0x3c, 0x3c, 0x3c, 0x3c, 0x3c, 0x3c,
0x3c, 0x3c, 0x3c, 0x3c, 0x3c, 0x3c, 0x3c, 0x3c, 0x3c, 0x3c, 0x3c, 0x3c, 0x3d, 0x3d, 0x3d, 0x3d,
0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d,
0x3e, 0x3e, 0x3e, 0x3e, 0x3e, 0x3e, 0x3e, 0x3e, 0x3e, 0x3e, 0x3e, 0x3e, 0x3e, 0x3e, 0x3e, 0x3e,
0x3e, 0x3e, 0x3e, 0x3e, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f,
0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40,
0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x41, 0x41, 0x41, 0x41,
0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41,
0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42,
0x42, 0x42, 0x42, 0x42, 0x43, 0x43, 0x43, 0x43, 0x43, 0x43, 0x43, 0x43, 0x43, 0x43, 0x43, 0x43,
0x43, 0x43, 0x43, 0x43, 0x43, 0x43, 0x43, 0x43, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44,
0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x45, 0x45, 0x45, 0x45,
0x45, 0x45, 0x45, 0x45, 0x45, 0x45, 0x45, 0x45, 0x45, 0x45, 0x45, 0x45, 0x45, 0x45, 0x45, 0x45,
0x46, 0x46, 0x46, 0x46, 0x46, 0x46, 0x46, 0x46, 0x46, 0x46, 0x46, 0x46, 0x46, 0x46, 0x46, 0x46,
0x46, 0x46, 0x46, 0x46, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47,
0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48,
0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x49, 0x49, 0x49, 0x49,
0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49,
0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a,
0x4a, 0x4a, 0x4a, 0x4a, 0x4b, 0x4b, 0x4b, 0x4b, 0x4b, 0x4b, 0x4b, 0x4b, 0x4b, 0x4b, 0x4b, 0x4b,
0x4b, 0x4b, 0x4b, 0x4b, 0x4b, 0x4b, 0x4b, 0x4b, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c,
0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4d, 0x4d, 0x4d, 0x4d,
0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d,
0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e,
0x4e, 0x4e, 0x4e, 0x4e, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f,
0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x50,
0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x51, 0x51, 0x51, 0x51,
0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51,
0x52, 0x52, 0x52, 0x52, 0x52, 0x52, 0x52, 0x52, 0x52, 0x52, 0x52, 0x52, 0x52, 0x52, 0x52, 0x52,
0x52, 0x52, 0x52, 0x52, 0x53, 0x53, 0x53, 0x53, 0x53, 0x53, 0x53, 0x53, 0x53, 0x53, 0x53, 0x53,
0x53, 0x53, 0x53, 0x53, 0x53, 0x53, 0x53, 0x53, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54,
0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x55, 0x55, 0x55, 0x55,
0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55,
0x56, 0x56, 0x56, 0x56, 0x56, 0x56, 0x56, 0x56, 0x56, 0x56, 0x56, 0x56, 0x56, 0x56, 0x56, 0x56,
0x56, 0x56, 0x56, 0x56, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57,
0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58,
0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x59, 0x59, 0x59, 0x59,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59,
0x5a, 0x5a, 0x5a, 0x5a, 0x5a, 0x5a, 0x5a, 0x5a, 0x5a, 0x5a, 0x5a, 0x5a, 0x5a, 0x5a, 0x5a, 0x5a,
0x5a, 0x5a, 0x5a, 0x5a, 0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0x5b,
0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c,
0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5d, 0x5d, 0x5d, 0x5d,
0x5d, 0x5d, 0x5d, 0x5d, 0x5d, 0x5d, 0x5d, 0x5d, 0x5d, 0x5d, 0x5d, 0x5d, 0x5d, 0x5d, 0x5d, 0x5d,
0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e,
0x5e, 0x5e, 0x5e, 0x5e, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f,
0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60,
0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x61, 0x61, 0x61, 0x61,
0x61, 0x61, 0x61, 0x61, 0x61, 0x61, 0x61, 0x61, 0x61, 0x61, 0x61, 0x61, 0x61, 0x61, 0x61, 0x61,
0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62,
0x62, 0x62, 0x62, 0x62, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63,
0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x64, 0x64, 0x64, 0x64, 0x64, 0x64, 0x64, 0x64,
0x64, 0x64, 0x64, 0x64, 0x64, 0x64, 0x64, 0x64, 0x64, 0x64, 0x64, 0x64, 0x65, 0x65, 0x65, 0x65,
0x65, 0x65, 0x65, 0x65, 0x65, 0x65, 0x65, 0x65, 0x65, 0x65, 0x65, 0x65, 0x65, 0x65, 0x65, 0x65,
0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66,
0x66, 0x66, 0x66, 0x66, 0x67, 0x67, 0x67, 0x67, 0x67, 0x67, 0x67, 0x67, 0x67, 0x67, 0x67, 0x67,
0x67, 0x67, 0x67, 0x67, 0x67, 0x67, 0x67, 0x67, 0x68, 0x68, 0x68, 0x68, 0x68, 0x68, 0x68, 0x68,
0x68, 0x68, 0x68, 0x68, 0x68, 0x68, 0x68, 0x68, 0x68, 0x68, 0x68, 0x68, 0x69, 0x69, 0x69, 0x69,
0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69,
0x6a, 0x6a, 0x6a, 0x6a, 0x6a, 0x6a, 0x6a, 0x6a, 0x6a, 0x6a, 0x6a, 0x6a, 0x6a, 0x6a, 0x6a, 0x6a,
0x6a, 0x6a, 0x6a, 0x6a, 0x6b, 0x6b, 0x6b, 0x6b, 0x6b, 0x6b, 0x6b, 0x6b, 0x6b, 0x6b, 0x6b, 0x6b,
0x6b, 0x6b, 0x6b, 0x6b, 0x6b, 0x6b, 0x6b, 0x6b, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c,
0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6d, 0x6d, 0x6d, 0x6d,
0x6d, 0x6d, 0x6d, 0x6d, 0x6d, 0x6d, 0x6d, 0x6d, 0x6d, 0x6d, 0x6d, 0x6d, 0x6d, 0x6d, 0x6d, 0x6d,
0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e,
0x6e, 0x6e, 0x6e, 0x6e, 0x6f, 0x6f, 0x6f, 0x6f, 0x6f, 0x6f, 0x6f, 0x6f, 0x6f, 0x6f, 0x6f, 0x6f,
0x6f, 0x6f, 0x6f, 0x6f, 0x6f, 0x6f, 0x6f, 0x6f, 0x70, 0x70, 0x70, 0x70, 0x70, 0x70, 0x70, 0x70,
0x70, 0x70, 0x70, 0x70, 0x70, 0x70, 0x70, 0x70, 0x70, 0x70, 0x70, 0x70, 0x71, 0x71, 0x71, 0x71,
0x71, 0x71, 0x71, 0x71, 0x71, 0x71, 0x71, 0x71, 0x71, 0x71, 0x71, 0x71, 0x71, 0x71, 0x71, 0x71,
0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72,
0x72, 0x72, 0x72, 0x72, 0x73, 0x73, 0x73, 0x73, 0x73, 0x73, 0x73, 0x73, 0x73, 0x73, 0x73, 0x73,
0x73, 0x73, 0x73, 0x73, 0x73, 0x73, 0x73, 0x73, 0x74, 0x74, 0x74, 0x74, 0x74, 0x74, 0x74, 0x74,
0x74, 0x74, 0x74, 0x74, 0x74, 0x74, 0x74, 0x74, 0x74, 0x74, 0x74, 0x74, 0x75, 0x75, 0x75, 0x75,
0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 0x75,
0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76,
0x76, 0x76, 0x76, 0x76, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77,
0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78,
0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x79, 0x79, 0x79, 0x79,
0x79, 0x79, 0x79, 0x79, 0x79, 0x79, 0x79, 0x79, 0x79, 0x79, 0x79, 0x79, 0x79, 0x79, 0x79, 0x79,
0x7a, 0x7a, 0x7a, 0x7a, 0x7a, 0x7a, 0x7a, 0x7a, 0x7a, 0x7a, 0x7a, 0x7a, 0x7a, 0x7a, 0x7a, 0x7a,
0x7a, 0x7a, 0x7a, 0x7a, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b,
0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c,
0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7d, 0x7d, 0x7d, 0x7d,
0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d,
0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e,
0x7e, 0x7e, 0x7e, 0x7e, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x81, 0x81, 0x81, 0x81,
0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81,
0x82, 0x82, 0x82, 0x82, 0x82, 0x82, 0x82, 0x82, 0x82, 0x82, 0x82, 0x82, 0x82, 0x82, 0x82, 0x82,
0x82, 0x82, 0x82, 0x82, 0x83, 0x83, 0x83, 0x83, 0x83, 0x83, 0x83, 0x83, 0x83, 0x83, 0x83, 0x83,
0x83, 0x83, 0x83, 0x83, 0x83, 0x83, 0x83, 0x83, 0x84, 0x84, 0x84, 0x84, 0x84, 0x84, 0x84, 0x84,
0x84, 0x84, 0x84, 0x84, 0x84, 0x84, 0x84, 0x84, 0x84, 0x84, 0x84, 0x84, 0x85, 0x85, 0x85, 0x85,
0x85, 0x85, 0x85, 0x85, 0x85, 0x85,
};
static const uint8 cycle2hc40[3420] =
{
/* end of active display (16 pixels -> 128 Mcycles) , HINT triggered , Vcounter increment */
0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5, 0xa5,
0xa6, 0xa6, 0xa6, 0xa6, 0xa6, 0xa6, 0xa6, 0xa6, 0xa6, 0xa6, 0xa6, 0xa6, 0xa6, 0xa6, 0xa6, 0xa6,
0xa7, 0xa7, 0xa7, 0xa7, 0xa7, 0xa7, 0xa7, 0xa7, 0xa7, 0xa7, 0xa7, 0xa7, 0xa7, 0xa7, 0xa7, 0xa7,
0xa8, 0xa8, 0xa8, 0xa8, 0xa8, 0xa8, 0xa8, 0xa8, 0xa8, 0xa8, 0xa8, 0xa8, 0xa8, 0xa8, 0xa8, 0xa8,
0xa9, 0xa9, 0xa9, 0xa9, 0xa9, 0xa9, 0xa9, 0xa9, 0xa9, 0xa9, 0xa9, 0xa9, 0xa9, 0xa9, 0xa9, 0xa9,
0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
0xab, 0xab, 0xab, 0xab, 0xab, 0xab, 0xab, 0xab, 0xab, 0xab, 0xab, 0xab, 0xab, 0xab, 0xab, 0xab,
0xac, 0xac, 0xac, 0xac, 0xac, 0xac, 0xac, 0xac, 0xac, 0xac, 0xac, 0xac, 0xac, 0xac, 0xac, 0xac,
/* right border (14 pixels -> 112 Mcycles) */
0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad,
0xae, 0xae, 0xae, 0xae, 0xae, 0xae, 0xae, 0xae, 0xae, 0xae, 0xae, 0xae, 0xae, 0xae, 0xae, 0xae,
0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf,
0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0,
0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1,
0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2,
0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3,
/* right blanking (9 pixels -> 72 Mcycles) , VDP status HBLANK flag set */
0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4,
0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5,
0xb6, 0xb6, 0xb6, 0xb6, 0xb6, 0xb6, 0xb6, 0xb6, 0xe4, 0xe4, 0xe4, 0xe4, 0xe4, 0xe4, 0xe4, 0xe4,
0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5,
0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6,
/* horizontal sync (32 pixels -> 313 Mcycles) */
0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6,
0xe6, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7,
0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8,
0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9,
0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xea, 0xea, 0xea,
0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xeb,
0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb,
0xeb, 0xeb, 0xeb, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec,
0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed,
0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xee, 0xee, 0xee, 0xee, 0xee,
0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xef, 0xef,
0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef,
0xef, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0,
0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1,
0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2,
0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf3, 0xf3, 0xf3,
0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf4,
0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4,
0xf4, 0xf4, 0xf4, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5,
0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6,
0xf6,
/* left blanking (32 pixels -> 259 Mcycles) */
0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7,
0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf8, 0xf8, 0xf8, 0xf8,
0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf9, 0xf9, 0xf9, 0xf9,
0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xfa, 0xfa, 0xfa, 0xfa,
0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfb, 0xfb, 0xfb, 0xfb,
0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfc, 0xfc, 0xfc, 0xfc,
0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfd, 0xfd, 0xfd, 0xfd,
0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfe, 0xfe, 0xfe, 0xfe,
0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00,
/* Vertical Interrupt triggered */
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01,
0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x02, 0x02, 0x02,
0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x03, 0x03,
0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x04, 0x04, 0x04, 0x04,
0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x05, 0x05, 0x05, 0x05,
0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x06, 0x06, 0x06, 0x06,
0x06, 0x06, 0x06, 0x06,
/* left border (13 pixels -> 104 Mcycles) , VDP status HBLANK flag cleared */
0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x07, 0x07, 0x07, 0x07,
0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x08, 0x08, 0x08, 0x08,
0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x09, 0x09, 0x09, 0x09,
0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x0a, 0x0a, 0x0a, 0x0a,
0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0b, 0x0b, 0x0b, 0x0b,
0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0c, 0x0c, 0x0c, 0x0c,
0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c,
/* remaining active display (304 pixels -> 2432 Mcycles) */
0x0d, 0x0d, 0x0d, 0x0d,
0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0e, 0x0e, 0x0e, 0x0e,
0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0f, 0x0f, 0x0f, 0x0f,
0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x10, 0x10, 0x10, 0x10,
0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x11, 0x11, 0x11, 0x11,
0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x12, 0x12, 0x12, 0x12,
0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x12, 0x13, 0x13, 0x13, 0x13,
0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x14, 0x14, 0x14, 0x14,
0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, 0x15, 0x15, 0x15, 0x15,
0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x16, 0x16, 0x16, 0x16,
0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x17, 0x17, 0x17, 0x17,
0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x18, 0x18, 0x18, 0x18,
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x19, 0x19, 0x19, 0x19,
0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x1a, 0x1a, 0x1a, 0x1a,
0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x1b, 0x1b, 0x1b, 0x1b,
0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1b, 0x1c, 0x1c, 0x1c, 0x1c,
0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1d, 0x1d, 0x1d, 0x1d,
0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1e, 0x1e, 0x1e, 0x1e,
0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1f, 0x1f, 0x1f, 0x1f,
0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x20, 0x20, 0x20, 0x20,
0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x21, 0x21, 0x21, 0x21,
0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x21, 0x22, 0x22, 0x22, 0x22,
0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 0x23, 0x23, 0x23, 0x23,
0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x23, 0x24, 0x24, 0x24, 0x24,
0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x24, 0x25, 0x25, 0x25, 0x25,
0x25, 0x25, 0x25, 0x25, 0x25, 0x25, 0x25, 0x25, 0x25, 0x25, 0x25, 0x25, 0x26, 0x26, 0x26, 0x26,
0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x26, 0x27, 0x27, 0x27, 0x27,
0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x27, 0x28, 0x28, 0x28, 0x28,
0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x28, 0x29, 0x29, 0x29, 0x29,
0x29, 0x29, 0x29, 0x29, 0x29, 0x29, 0x29, 0x29, 0x29, 0x29, 0x29, 0x29, 0x2a, 0x2a, 0x2a, 0x2a,
0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2a, 0x2b, 0x2b, 0x2b, 0x2b,
0x2b, 0x2b, 0x2b, 0x2b, 0x2b, 0x2b, 0x2b, 0x2b, 0x2b, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2c,
0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2d,
0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2d, 0x2e, 0x2e, 0x2e, 0x2e,
0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x2f,
0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x30, 0x30,
0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x31, 0x31, 0x31, 0x31,
0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x32, 0x32, 0x32, 0x32,
0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x32, 0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x34, 0x34, 0x34, 0x34,
0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x34, 0x35, 0x35, 0x35, 0x35,
0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x35, 0x36, 0x36, 0x36, 0x36,
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x37, 0x37, 0x37, 0x37,
0x37, 0x37, 0x37, 0x37, 0x37, 0x37, 0x37, 0x37, 0x37, 0x37, 0x37, 0x37, 0x38, 0x38, 0x38, 0x38,
0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x38, 0x39, 0x39, 0x39, 0x39,
0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x39, 0x3a, 0x3a, 0x3a, 0x3a,
0x3a, 0x3a, 0x3a, 0x3a, 0x3a, 0x3a, 0x3a, 0x3a, 0x3a, 0x3a, 0x3a, 0x3a, 0x3b, 0x3b, 0x3b, 0x3b,
0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3b, 0x3c, 0x3c, 0x3c, 0x3c,
0x3c, 0x3c, 0x3c, 0x3c, 0x3c, 0x3c, 0x3c, 0x3c, 0x3c, 0x3c, 0x3c, 0x3c, 0x3d, 0x3d, 0x3d, 0x3d,
0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3e, 0x3e, 0x3e, 0x3e,
0x3e, 0x3e, 0x3e, 0x3e, 0x3e, 0x3e, 0x3e, 0x3e, 0x3e, 0x3e, 0x3e, 0x3e, 0x3f, 0x3f, 0x3f, 0x3f,
0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x40, 0x40, 0x40, 0x40,
0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x41, 0x41, 0x41, 0x41,
0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x42, 0x42, 0x42, 0x42,
0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x43, 0x43, 0x43, 0x43,
0x43, 0x43, 0x43, 0x43, 0x43, 0x43, 0x43, 0x43, 0x43, 0x43, 0x43, 0x43, 0x44, 0x44, 0x44, 0x44,
0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x44, 0x45, 0x45, 0x45, 0x45,
0x45, 0x45, 0x45, 0x45, 0x45, 0x45, 0x45, 0x45, 0x45, 0x45, 0x45, 0x45, 0x46, 0x46, 0x46, 0x46,
0x46, 0x46, 0x46, 0x46, 0x46, 0x46, 0x46, 0x46, 0x46, 0x46, 0x46, 0x46, 0x47, 0x47, 0x47, 0x47,
0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x47, 0x48, 0x48, 0x48, 0x48,
0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x48, 0x49, 0x49, 0x49, 0x49,
0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0x4a, 0x4a, 0x4a, 0x4a,
0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4a, 0x4b, 0x4b, 0x4b, 0x4b,
0x4b, 0x4b, 0x4b, 0x4b, 0x4b, 0x4b, 0x4b, 0x4b, 0x4b, 0x4b, 0x4b, 0x4b, 0x4c, 0x4c, 0x4c, 0x4c,
0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4c, 0x4d, 0x4d, 0x4d, 0x4d,
0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4d, 0x4e, 0x4e, 0x4e, 0x4e,
0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4f, 0x4f, 0x4f, 0x4f,
0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x4f, 0x50, 0x50, 0x50, 0x50,
0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x51, 0x51, 0x51, 0x51,
0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x51, 0x52, 0x52, 0x52, 0x52,
0x52, 0x52, 0x52, 0x52, 0x52, 0x52, 0x52, 0x52, 0x52, 0x52, 0x52, 0x52, 0x53, 0x53, 0x53, 0x53,
0x53, 0x53, 0x53, 0x53, 0x53, 0x53, 0x53, 0x53, 0x53, 0x53, 0x53, 0x53, 0x54, 0x54, 0x54, 0x54,
0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x54, 0x55, 0x55, 0x55, 0x55,
0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x56, 0x56, 0x56, 0x56,
0x56, 0x56, 0x56, 0x56, 0x56, 0x56, 0x56, 0x56, 0x56, 0x56, 0x56, 0x56, 0x57, 0x57, 0x57, 0x57,
0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x57, 0x58, 0x58, 0x58, 0x58,
0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x58, 0x59, 0x59, 0x59, 0x59,
0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x59, 0x5a, 0x5a, 0x5a, 0x5a,
0x5a, 0x5a, 0x5a, 0x5a, 0x5a, 0x5a, 0x5a, 0x5a, 0x5a, 0x5a, 0x5a, 0x5a, 0x5b, 0x5b, 0x5b, 0x5b,
0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0x5c, 0x5c, 0x5c, 0x5c,
0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5c, 0x5d, 0x5d, 0x5d, 0x5d,
0x5d, 0x5d, 0x5d, 0x5d, 0x5d, 0x5d, 0x5d, 0x5d, 0x5d, 0x5d, 0x5d, 0x5d, 0x5e, 0x5e, 0x5e, 0x5e,
0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5e, 0x5f, 0x5f, 0x5f, 0x5f,
0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x5f, 0x60, 0x60, 0x60, 0x60,
0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x60, 0x61, 0x61, 0x61, 0x61,
0x61, 0x61, 0x61, 0x61, 0x61, 0x61, 0x61, 0x61, 0x61, 0x61, 0x61, 0x61, 0x62, 0x62, 0x62, 0x62,
0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x62, 0x63, 0x63, 0x63, 0x63,
0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x63, 0x64, 0x64, 0x64, 0x64,
0x64, 0x64, 0x64, 0x64, 0x64, 0x64, 0x64, 0x64, 0x64, 0x64, 0x64, 0x64, 0x65, 0x65, 0x65, 0x65,
0x65, 0x65, 0x65, 0x65, 0x65, 0x65, 0x65, 0x65, 0x65, 0x65, 0x65, 0x65, 0x66, 0x66, 0x66, 0x66,
0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x67, 0x67, 0x67, 0x67,
0x67, 0x67, 0x67, 0x67, 0x67, 0x67, 0x67, 0x67, 0x67, 0x67, 0x67, 0x67, 0x68, 0x68, 0x68, 0x68,
0x68, 0x68, 0x68, 0x68, 0x68, 0x68, 0x68, 0x68, 0x68, 0x68, 0x68, 0x68, 0x69, 0x69, 0x69, 0x69,
0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x69, 0x6a, 0x6a, 0x6a, 0x6a,
0x6a, 0x6a, 0x6a, 0x6a, 0x6a, 0x6a, 0x6a, 0x6a, 0x6a, 0x6a, 0x6a, 0x6a, 0x6b, 0x6b, 0x6b, 0x6b,
0x6b, 0x6b, 0x6b, 0x6b, 0x6b, 0x6b, 0x6b, 0x6b, 0x6b, 0x6b, 0x6b, 0x6b, 0x6c, 0x6c, 0x6c, 0x6c,
0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6c, 0x6d, 0x6d, 0x6d, 0x6d,
0x6d, 0x6d, 0x6d, 0x6d, 0x6d, 0x6d, 0x6d, 0x6d, 0x6d, 0x6d, 0x6d, 0x6d, 0x6e, 0x6e, 0x6e, 0x6e,
0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6e, 0x6f, 0x6f, 0x6f, 0x6f,
0x6f, 0x6f, 0x6f, 0x6f, 0x6f, 0x6f, 0x6f, 0x6f, 0x6f, 0x6f, 0x6f, 0x6f, 0x70, 0x70, 0x70, 0x70,
0x70, 0x70, 0x70, 0x70, 0x70, 0x70, 0x70, 0x70, 0x70, 0x70, 0x70, 0x70, 0x71, 0x71, 0x71, 0x71,
0x71, 0x71, 0x71, 0x71, 0x71, 0x71, 0x71, 0x71, 0x71, 0x71, 0x71, 0x71, 0x72, 0x72, 0x72, 0x72,
0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x72, 0x73, 0x73, 0x73, 0x73,
0x73, 0x73, 0x73, 0x73, 0x73, 0x73, 0x73, 0x73, 0x73, 0x73, 0x73, 0x73, 0x74, 0x74, 0x74, 0x74,
0x74, 0x74, 0x74, 0x74, 0x74, 0x74, 0x74, 0x74, 0x74, 0x74, 0x74, 0x74, 0x75, 0x75, 0x75, 0x75,
0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 0x75, 0x76, 0x76, 0x76, 0x76,
0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x77, 0x77, 0x77, 0x77,
0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x78, 0x78, 0x78, 0x78,
0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x79, 0x79, 0x79, 0x79,
0x79, 0x79, 0x79, 0x79, 0x79, 0x79, 0x79, 0x79, 0x79, 0x79, 0x79, 0x79, 0x7a, 0x7a, 0x7a, 0x7a,
0x7a, 0x7a, 0x7a, 0x7a, 0x7a, 0x7a, 0x7a, 0x7a, 0x7a, 0x7a, 0x7a, 0x7a, 0x7b, 0x7b, 0x7b, 0x7b,
0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7b, 0x7c, 0x7c, 0x7c, 0x7c,
0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7c, 0x7d, 0x7d, 0x7d, 0x7d,
0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7e, 0x7e, 0x7e, 0x7e,
0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7f, 0x7f, 0x7f, 0x7f,
0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x80, 0x80, 0x80, 0x80,
0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x81, 0x81, 0x81, 0x81,
0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x82, 0x82, 0x82, 0x82,
0x82, 0x82, 0x82, 0x82, 0x82, 0x82, 0x82, 0x82, 0x82, 0x82, 0x82, 0x82, 0x83, 0x83, 0x83, 0x83,
0x83, 0x83, 0x83, 0x83, 0x83, 0x83, 0x83, 0x83, 0x83, 0x83, 0x83, 0x83, 0x84, 0x84, 0x84, 0x84,
0x84, 0x84, 0x84, 0x84, 0x84, 0x84, 0x84, 0x84, 0x84, 0x84, 0x84, 0x84, 0x85, 0x85, 0x85, 0x85,
0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x86, 0x86, 0x86, 0x86,
0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x87, 0x87, 0x87, 0x87,
0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x88, 0x88, 0x88, 0x88,
0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x89, 0x89, 0x89, 0x89,
0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x8a, 0x8a, 0x8a, 0x8a,
0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8b, 0x8b, 0x8b, 0x8b,
0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8c, 0x8c, 0x8c, 0x8c,
0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8d, 0x8d, 0x8d, 0x8d,
0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8e, 0x8e, 0x8e, 0x8e,
0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8f, 0x8f, 0x8f, 0x8f,
0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x90, 0x90, 0x90, 0x90,
0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x91, 0x91, 0x91, 0x91,
0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x92, 0x92, 0x92, 0x92,
0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x93, 0x93, 0x93, 0x93,
0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x94, 0x94, 0x94, 0x94,
0x94, 0x94, 0x94, 0x94, 0x94, 0x94, 0x94, 0x94, 0x94, 0x94, 0x94, 0x94, 0x95, 0x95, 0x95, 0x95,
0x95, 0x95, 0x95, 0x95, 0x95, 0x95, 0x95, 0x95, 0x95, 0x95, 0x95, 0x95, 0x96, 0x96, 0x96, 0x96,
0x96, 0x96, 0x96, 0x96, 0x96, 0x96, 0x96, 0x96, 0x96, 0x96, 0x96, 0x96, 0x97, 0x97, 0x97, 0x97,
0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x97, 0x98, 0x98, 0x98, 0x98,
0x98, 0x98, 0x98, 0x98, 0x98, 0x98, 0x98, 0x98, 0x98, 0x98, 0x98, 0x98, 0x99, 0x99, 0x99, 0x99,
0x99, 0x99, 0x99, 0x99, 0x99, 0x99, 0x99, 0x99, 0x99, 0x99, 0x99, 0x99, 0x9a, 0x9a, 0x9a, 0x9a,
0x9a, 0x9a, 0x9a, 0x9a, 0x9a, 0x9a, 0x9a, 0x9a, 0x9a, 0x9a, 0x9a, 0x9a, 0x9b, 0x9b, 0x9b, 0x9b,
0x9b, 0x9b, 0x9b, 0x9b, 0x9b, 0x9b, 0x9b, 0x9b, 0x9b, 0x9b, 0x9b, 0x9b, 0x9c, 0x9c, 0x9c, 0x9c,
0x9c, 0x9c, 0x9c, 0x9c, 0x9c, 0x9c, 0x9c, 0x9c, 0x9c, 0x9c, 0x9c, 0x9c, 0x9d, 0x9d, 0x9d, 0x9d,
0x9d, 0x9d, 0x9d, 0x9d, 0x9d, 0x9d, 0x9d, 0x9d, 0x9d, 0x9d, 0x9d, 0x9d, 0x9e, 0x9e, 0x9e, 0x9e,
0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9f, 0x9f, 0x9f, 0x9f,
0x9f, 0x9f, 0x9f, 0x9f, 0x9f, 0x9f, 0x9f, 0x9f, 0x9f, 0x9f, 0x9f, 0x9f, 0xa0, 0xa0, 0xa0, 0xa0,
0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa1, 0xa1, 0xa1, 0xa1,
0xa1, 0xa1, 0xa1, 0xa1, 0xa1, 0xa1, 0xa1, 0xa1, 0xa1, 0xa1, 0xa1, 0xa1, 0xa2, 0xa2, 0xa2, 0xa2,
0xa2, 0xa2, 0xa2, 0xa2, 0xa2, 0xa2, 0xa2, 0xa2, 0xa2, 0xa2, 0xa2, 0xa2, 0xa3, 0xa3, 0xa3, 0xa3,
0xa3, 0xa3, 0xa3, 0xa3, 0xa3, 0xa3, 0xa3, 0xa3, 0xa3, 0xa3, 0xa3, 0xa3, 0xa4, 0xa4, 0xa4, 0xa4,
0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4};
#endif /* _HVC_H_ */
#if 0
#ifndef _HVC_H_
#define _HVC_H_
#if 0
/* V counter values for NTSC 192-line display */
static const uint8 vc_ntsc_192[262] = {
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA,
0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
};
/* V counter values for NTSC 224-line display */
static const uint8 vc_ntsc_224[262] = {
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA,
0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
};
/* V counter values for NTSC 240-line display */
static const uint8 vc_ntsc_240[262] = {
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF,
0x00, 0x01, 0x02, 0x03, 0x04, 0x05
};
/* V counter values for PAL 192-line display */
static const uint8 vc_pal_192[313] = {
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2,
0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
};
/* V counter values for PAL 224-line display */
static const uint8 vc_pal_224[313] = {
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF,
0x00, 0x01, 0x02,
0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
};
/* V counter values for PAL 240-line display */
static const uint8 vc_pal_240[313] = {
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF,
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A,
0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF,
};
#endif
/* H counter values for a 256-pixel wide display (342 pixel max.) */
static const uint8 hc_256[171] = {
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
0x90, 0x91, 0x92, 0x93,
0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
};
/* H counter values for a 320-pixel wide display (442[sic, is it really 422?] pixels max.) */
static const uint8 hc_320[211] = {
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6,
0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
};
#if 0
static const uint8 *vc_table[6] = {
vc_ntsc_192,
vc_ntsc_224,
vc_ntsc_240,
vc_pal_192,
vc_pal_224,
vc_pal_240
};
#endif
static const uint8 *hc_table[2] = {
hc_256,
hc_320,
};
#endif /* _HVC_H_ */
#endif

View File

@ -1,408 +0,0 @@
/* Mednafen - Multi-system Emulator
*
* Copyright notice for this file:
* Copyright (C) 1999, 2000, 2001, 2002, 2003 Charles MacDonald
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "../shared.h"
#include "gamepad.h"
#include <trio/trio.h>
/*--------------------------------------------------------------------------*/
/* Master System 2-button gamepad */
/*--------------------------------------------------------------------------*/
class Gamepad2 : public MD_Input_Device
{
public:
Gamepad2();
virtual ~Gamepad2();
virtual void UpdateBus(const int32 master_timestamp, uint8 &bus, const uint8 genesis_asserted);
virtual void UpdatePhysicalState(const void *data);
virtual int StateAction(StateMem *sm, int load, int data_only, const char *section_prefix);
private:
uint8 buttons;
};
/*--------------------------------------------------------------------------*/
/* Genesis 3-button gamepad */
/*--------------------------------------------------------------------------*/
class Gamepad3 : public MD_Input_Device
{
public:
Gamepad3();
virtual ~Gamepad3();
virtual void UpdateBus(const int32 master_timestamp, uint8 &bus, const uint8 genesis_asserted);
virtual void UpdatePhysicalState(const void *data);
virtual int StateAction(StateMem *sm, int load, int data_only, const char *section_prefix);
private:
uint8 buttons;
};
/*--------------------------------------------------------------------------*/
/* Fighting Pad 6B */
/*--------------------------------------------------------------------------*/
class Gamepad6 : public MD_Input_Device
{
public:
Gamepad6();
virtual ~Gamepad6();
virtual void Power(void);
virtual void UpdateBus(const int32 master_timestamp, uint8 &bus, const uint8 genesis_asserted);
virtual void UpdatePhysicalState(const void *data);
virtual void BeginTimePeriod(const int32 timestamp_base);
virtual void EndTimePeriod(const int32 master_timestamp);
virtual int StateAction(StateMem *sm, int load, int data_only, const char *section_prefix);
private:
void Run(const int32 master_timestamp);
int32 prev_timestamp;
int32 count;
bool old_select;
int32 timeout;
uint16 buttons;
bool compat_mode;
};
const InputDeviceInputInfoStruct Gamepad2IDII[7] =
{
{ "up", "UP ↑", 0, IDIT_BUTTON, "down" },
{ "down", "DOWN ↓", 1, IDIT_BUTTON, "up" },
{ "left", "LEFT ←", 2, IDIT_BUTTON, "right" },
{ "right", "RIGHT →", 3, IDIT_BUTTON, "left" },
{ "a", "A", 5, IDIT_BUTTON_CAN_RAPID, NULL },
{ "b", "B", 6, IDIT_BUTTON_CAN_RAPID, NULL },
{ "start", "Start", 4, IDIT_BUTTON, NULL },
};
Gamepad2::Gamepad2()
{
buttons = 0;
}
Gamepad2::~Gamepad2()
{
}
int Gamepad2::StateAction(StateMem *sm, int load, int data_only, const char *section_prefix)
{
SFORMAT StateRegs[] =
{
SFVAR(buttons),
SFEND
};
int ret = 1;
char sname[64];
trio_snprintf(sname, sizeof(sname), "%s-gp2", section_prefix);
ret &= MDFNSS_StateAction(sm, load, data_only, StateRegs, sname);
if(load)
{
}
return(ret);
}
void Gamepad2::UpdateBus(const int32 master_timestamp, uint8 &bus, const uint8 genesis_asserted)
{
bus = (bus &~ 0x3F) | (0x3F & ~buttons);
}
void Gamepad2::UpdatePhysicalState(const void *data)
{
buttons = *(uint8 *)data;
}
const InputDeviceInputInfoStruct GamepadIDII[8] =
{
{ "up", "UP ↑", 0, IDIT_BUTTON, "down" },
{ "down", "DOWN ↓", 1, IDIT_BUTTON, "up" },
{ "left", "LEFT ←", 2, IDIT_BUTTON, "right" },
{ "right", "RIGHT →", 3, IDIT_BUTTON, "left" },
{ "b", "B", 6, IDIT_BUTTON_CAN_RAPID, NULL },
{ "c", "C", 7, IDIT_BUTTON_CAN_RAPID, NULL },
{ "a", "A", 5, IDIT_BUTTON_CAN_RAPID, NULL },
{ "start", "Start", 4, IDIT_BUTTON, NULL },
};
Gamepad3::Gamepad3()
{
buttons = 0;
}
Gamepad3::~Gamepad3()
{
}
void Gamepad3::UpdateBus(const int32 master_timestamp, uint8 &bus, const uint8 genesis_asserted)
{
const bool select = (bus >> 6) & 1;
uint8 temp;
if(select)
temp = 0x3F & ~buttons;
else
temp = 0x33 & ~(buttons & 0x3) & ~((buttons >> 2) & 0x30);
bus = (bus & ~0x3F) | temp;
}
void Gamepad3::UpdatePhysicalState(const void *data)
{
buttons = *(uint8 *)data;
}
int Gamepad3::StateAction(StateMem *sm, int load, int data_only, const char *section_prefix)
{
SFORMAT StateRegs[] =
{
SFVAR(buttons),
SFEND
};
int ret = 1;
char sname[64];
trio_snprintf(sname, sizeof(sname), "%s-gp3", section_prefix);
ret &= MDFNSS_StateAction(sm, load, data_only, StateRegs, sname);
if(load)
{
}
return(ret);
}
const InputDeviceInputInfoStruct Gamepad6IDII[12] =
{
{ "up", "UP ↑", 0, IDIT_BUTTON, "down" },
{ "down", "DOWN ↓", 1, IDIT_BUTTON, "up" },
{ "left", "LEFT ←", 2, IDIT_BUTTON, "right" },
{ "right", "RIGHT →", 3, IDIT_BUTTON, "left" },
{ "b", "B", 6, IDIT_BUTTON_CAN_RAPID, NULL },
{ "c", "C", 7, IDIT_BUTTON_CAN_RAPID, NULL },
{ "a", "A", 5, IDIT_BUTTON_CAN_RAPID, NULL },
{ "start", "Start", 4, IDIT_BUTTON, NULL },
{ "z", "Z", 10, IDIT_BUTTON_CAN_RAPID, NULL },
{ "y", "Y", 9, IDIT_BUTTON_CAN_RAPID, NULL },
{ "x", "X", 8, IDIT_BUTTON_CAN_RAPID, NULL },
{ "mode", "Mode", 11, IDIT_BUTTON, NULL },
};
Gamepad6::Gamepad6()
{
buttons = 0;
old_select = 0;
prev_timestamp = 0;
}
Gamepad6::~Gamepad6() // Destructor. DEEEEEEEE. Don't put variables to initialize here again!
{
}
void Gamepad6::Power(void)
{
count = 0;
timeout = 0;
//compat_mode = false; //(bool)(buttons & (1 << 11));
//compat_mode_counter = 4474431; // ~5 video frames
compat_mode = (bool)(buttons & (1 << 11));
}
int Gamepad6::StateAction(StateMem *sm, int load, int data_only, const char *section_prefix)
{
SFORMAT StateRegs[] =
{
SFVAR(old_select),
SFVAR(buttons),
SFVAR(count),
SFVAR(timeout),
SFVAR(compat_mode),
SFEND
};
int ret = 1;
char sname[64];
trio_snprintf(sname, sizeof(sname), "%s-gp6", section_prefix);
ret &= MDFNSS_StateAction(sm, load, data_only, StateRegs, sname);
if(load)
{
}
return(ret);
}
void Gamepad6::Run(const int32 master_timestamp)
{
const int32 clocks = master_timestamp - prev_timestamp;
//printf("%d\n", master_timestamp - prev_timestamp);
#if 0
if(compat_mode_counter >= 0)
{
if(!(buttons & (1 << 11)))
compat_mode_counter = false;
else
{
compat_mode_counter -= clocks;
if(compat_mode_counter <= 0)
compat_mode = true;
}
}
#endif
timeout += clocks;
if(timeout >= 8192 * 7)
{
timeout = 0;
count = 0;
//if(!select)
// count++;
//printf("TIMEOUT: %d\n", select);
}
prev_timestamp = master_timestamp;
}
void Gamepad6::BeginTimePeriod(const int32 timestamp_base)
{
//printf("Begin: %d\n", timestamp_base);
prev_timestamp = timestamp_base;
}
void Gamepad6::EndTimePeriod(const int32 master_timestamp)
{
//printf("End: %d\n", master_timestamp);
Run(master_timestamp);
}
/*
How it's implemented here(copy/pasted from Charles' doc, and rearranged a bit):
Count:
0 TH = 0 : ?0SA00DU 3-button pad return value
0 TH = 1 : ?1CBRLDU 3-button pad return value
1 TH = 0 : ?0SA00DU 3-button pad return value
1 TH = 1 : ?1CBRLDU 3-button pad return value
2 TH = 0 : ?0SA00DU 3-button pad return value
2 TH = 1 : ?1CBRLDU 3-button pad return value
3 TH = 0 : ?0SA0000 D3-0 are forced to '0'
3 TH = 1 : ?1CBMXYZ Extra buttons returned in D3-0
4 TH = 0 : ?0SA1111 D3-0 are forced to '1'
4 TH = 1 : ?1CBRLDU 3-button pad return value
... TH = 0 : ?0SA00DU 3-button pad return value
... TH = 1 : ?1CBRLDU 3-button pad return value
*/
void Gamepad6::UpdateBus(const int32 master_timestamp, uint8 &bus, const uint8 genesis_asserted)
{
Run(master_timestamp);
const bool select = (bus >> 6) & 1;
uint8 temp = 0x3F;
// Only take action if TH changed.
if(select != old_select)
{
timeout = 0;
old_select = select;
if(!select && count < 5 && !compat_mode) // If TH is going from 1->0, and we haven't reached the end yet, increment the counter.
count++;
}
switch(count)
{
case 5:
case 0:
case 1:
case 2:
if(select)
temp = 0x3F & ~buttons;
else
temp = 0x33 & ~(buttons & 0x3) & ~((buttons >> 2) & 0x30);
break;
case 3:
if(select)
temp = (0x30 & ~buttons) | (0x0F & ~(buttons >> 8));
else
temp = 0x30 & ~((buttons >> 2) & 0x30);
break;
case 4:
if(select)
temp = 0x3F & ~buttons;
else
temp = 0x3F & ~((buttons >> 2) & 0x30);
break;
}
//printf("Read: %d 0x%02x\n", (count << 1) | select, temp);
bus = (bus & ~0x3F) | temp;
}
void Gamepad6::UpdatePhysicalState(const void *data)
{
//printf("Buttons: %04x\n", MDFN_de16lsb((uint8 *)data));
buttons = MDFN_de16lsb((uint8 *)data);
}
MD_Input_Device *MDInput_MakeMS2B(void)
{
return new Gamepad2;
}
MD_Input_Device *MDInput_MakeMD3B(void)
{
return new Gamepad3;
}
MD_Input_Device *MDInput_MakeMD6B(void)
{
return new Gamepad6;
}

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@ -1,7 +0,0 @@
extern const InputDeviceInputInfoStruct Gamepad2IDII[7];
extern const InputDeviceInputInfoStruct GamepadIDII[8];
extern const InputDeviceInputInfoStruct Gamepad6IDII[12];
MD_Input_Device *MDInput_MakeMS2B(void);
MD_Input_Device *MDInput_MakeMD3B(void);
MD_Input_Device *MDInput_MakeMD6B(void);

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@ -1,220 +0,0 @@
/* Mednafen - Multi-system Emulator
*
* Copyright notice for this file:
* Copyright (C) 1999, 2000, 2001, 2002, 2003 Charles MacDonald
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "../shared.h"
#include "mouse.h"
enum
{
MASK_TH = 0x40,
MASK_TR = 0x20,
MASK_TL = 0x10,
MASK_DATA = 0x0F
};
class MegaMouse : public MD_Input_Device
{
public:
MegaMouse();
virtual ~MegaMouse();
virtual void UpdateBus(const int32 master_timestamp, uint8 &bus, const uint8 genesis_asserted);
virtual void UpdatePhysicalState(const void *data);
private:
int32 mouse_x;
int32 mouse_y;
uint8 buttons;
uint8 data_buffer[0xA];
uint8 counter;
bool last_th;
bool last_tr;
bool tl_ret;
bool happy_mode;
int32 busy_meow;
};
const InputDeviceInputInfoStruct MegaMouseIDII[6] =
{
{ "x_axis", "X Axis", -1, IDIT_X_AXIS_REL },
{ "y_axis", "Y Axis", -1, IDIT_Y_AXIS_REL },
{ "left", "Left Button", 0, IDIT_BUTTON, NULL },
{ "right", "Right Button", 1, IDIT_BUTTON, NULL },
{ "middle", "Middle Button", 2, IDIT_BUTTON, NULL },
{ "start", "Start Button", 3, IDIT_BUTTON, NULL },
};
MegaMouse::MegaMouse()
{
mouse_x = 0;
mouse_y = 0;
buttons = 0;
counter = 0;
last_th = 0;
last_tr = 0;
tl_ret = 0;
happy_mode = 0;
busy_meow = 0;
}
MegaMouse::~MegaMouse()
{
}
void MegaMouse::UpdateBus(const int32 master_timestamp, uint8 &bus, const uint8 genesis_asserted)
{
const uint8 data = bus;
uint8 temp;
//printf("Write: %02x\n", data);
#if 0
if((data & 0x60) == 0x60 && counter == 9)
{
happy_mode = FALSE;
tl_ret = FALSE;
last_th = 0;
last_tr = 0;
return;
}
#endif
if(((data & MASK_TH) && !(last_th)) || (data & 0x60) == 0x60)
{
if((data & 0x60) == 0x60)
{
happy_mode = TRUE;
tl_ret = TRUE;
}
int32 rel_x = mouse_x;
int32 rel_y = mouse_y;
bool x_neg = 0;
bool y_neg = 0;
if(rel_x < -255)
rel_x = -255;
if(rel_x > 255)
rel_x = 255;
if(rel_y < -255)
rel_y = -255;
if(rel_y > 255)
rel_y = 255;
mouse_x -= rel_x;
mouse_y -= rel_y;
rel_y = -rel_y;
if(rel_x < 0)
{
x_neg = TRUE;
}
if(rel_y < 0)
{
y_neg = TRUE;
}
//printf("%02x, %d %d\n", buttons, rel_x, rel_y);
counter = 0;
data_buffer[0] = 0x0;
data_buffer[1] = 0xB;
data_buffer[2] = 0xF;
data_buffer[3] = 0xF;
data_buffer[4] = (x_neg ? 0x1 : 0x0) | (y_neg ? 0x2 : 0x0); // Axis sign and overflow
data_buffer[5] = buttons; // Button state
data_buffer[6] = (rel_x >> 4) & 0xF; // X axis MSN
data_buffer[7] = (rel_x >> 0) & 0xF; // X axis LSN
data_buffer[8] = (rel_y >> 4) & 0xF; // Y axis MSN
data_buffer[9] = (rel_y >> 0) & 0xF; // Y axis LSN
}
else if(!(data & MASK_TH) && last_th)
{
counter++;
if(counter > 9)
counter = 9;
}
// Mouse vs Mega
if(!(data & MASK_TH))
{
if((data & MASK_TR) && !last_tr)
{
tl_ret = TRUE;
counter++;
if(counter > 9)
counter = 9;
if(counter == 9)
busy_meow = 10;
}
else if(!(data & MASK_TR) && (last_tr))
{
tl_ret = FALSE;
counter++;
if(counter > 9)
counter = 9;
}
}
last_th = data & MASK_TH;
last_tr = data & MASK_TR;
//
//
//
temp = data_buffer[counter];
if(tl_ret)
temp |= MASK_TL;
if(busy_meow > 0)
{
busy_meow--;
if(!busy_meow)
tl_ret = 0;
}
bus = (bus & ~0x60) | (temp & 0x1F);
//printf("Read: %02x, %d\n", ret, counter);
}
void MegaMouse::UpdatePhysicalState(const void *data)
{
mouse_x += (int32)MDFN_de32lsb((uint8 *)data + 0);
mouse_y += (int32)MDFN_de32lsb((uint8 *)data + 4);
buttons = ((uint8 *)data)[8];
MDFNGameInfo->mouse_sensitivity = 1.0; //MDFN_GetSettingF("pcfx.mouse_sensitivity");
}
MD_Input_Device *MDInput_MakeMegaMouse(void)
{
MD_Input_Device *ret = new MegaMouse();
return(ret);
}

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extern const InputDeviceInputInfoStruct MegaMouseIDII[6];
MD_Input_Device *MDInput_MakeMegaMouse(void);

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#ifndef _MACROS_H_
#define _MACROS_H_
static inline uint8 READ_BYTE_MSB(const uint8 *base, const unsigned int addr)
{
return(base[addr + 0]);
}
static inline uint16 READ_WORD_MSB(const uint8 *base, const unsigned int addr)
{
return((base[addr + 0] << 8) | (base[addr + 1] << 0));
}
static inline uint32 READ_32_MSB(const uint8 *base, const unsigned int addr, const bool is_aligned = 0)
{
#ifdef MSB_FIRST
if(is_aligned)
return(*(uint32 *)&base[addr]);
else
#endif
return((base[addr + 0] << 24) | (base[addr + 1] << 16) | (base[addr + 2] << 8) | (base[addr + 3] << 0));
}
static inline void WRITE_BYTE_MSB(uint8 *base, const unsigned int addr, const uint8 value)
{
base[addr + 0] = value;
}
static inline void WRITE_WORD_MSB(uint8 *base, const unsigned int addr, const uint16 value)
{
base[addr + 0] = value >> 8;
base[addr + 1] = value;
}
static inline uint8 READ_BYTE_LSB(const uint8 *base, const unsigned int addr)
{
return(base[addr + 0]);
}
static inline uint16 READ_WORD_LSB(const uint8 *base, const unsigned int addr)
{
return((base[addr + 0] << 0) | (base[addr + 1] << 8));
}
static inline uint32 READ_32_LSB(const uint8 *base, const unsigned int addr, const bool is_aligned = 0)
{
#ifdef LSB_FIRST
if(is_aligned)
return(*(uint32 *)&base[addr]);
else
#endif
return((base[addr + 0] << 0) | (base[addr + 1] << 8) | (base[addr + 2] << 16) | (base[addr + 3] << 24));
}
static inline void WRITE_BYTE_LSB(uint8 *base, const unsigned int addr, const uint8 value)
{
base[addr + 0] = value;
}
static inline void WRITE_WORD_LSB(uint8 *base, const unsigned int addr, const uint16 value)
{
base[addr + 0] = value >> 0;
base[addr + 1] = value >> 8;
}
#endif /* _MACROS_H_ */

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/*
Copyright (C) 1999, 2000, 2001, 2002, 2003 Charles MacDonald
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "shared.h"
namespace MDFN_IEN_MD
{
unsigned int m68k_read_bus_8(unsigned int address)
{
uint16 temp = m68k_read_bus_16(address);
return ((address & 1) ? (temp & 0xFF) : (temp >> 8));
}
unsigned int m68k_read_bus_16(unsigned int address)
{
uint16 temp = 0x4e71;
if(address >= 0xC00000)
{
return (temp);
}
else
{
return (temp & 0xFF00);
}
}
void m68k_unused_8_w(unsigned int address, unsigned int value)
{
printf("Unused %08X = %02X\n", address, value);
}
void m68k_unused_16_w(unsigned int address, unsigned int value)
{
printf("Unused %08X = %04X\n", address, value);
}
/*
Functions to handle memory accesses which cause the Genesis to halt
either temporarily (press RESET button to restart) or unrecoverably
(cycle power to restart).
*/
void m68k_lockup_w_8(unsigned int address, unsigned int value)
{
printf("Lockup %08X = %02X (%08X)\n", address, value, C68k_Get_PC(&Main68K));
}
void m68k_lockup_w_16(unsigned int address, unsigned int value)
{
printf("Lockup %08X = %04X (%08X)\n", address, value, C68k_Get_PC(&Main68K));
}
unsigned int m68k_lockup_r_8(unsigned int address)
{
printf("Lockup %08X.b (%08X)\n", address, C68k_Get_PC(&Main68K));
return -1;
}
unsigned int m68k_lockup_r_16(unsigned int address)
{
printf("Lockup %08X.w (%08X)\n", address, C68k_Get_PC(&Main68K));
return -1;
}
/*--------------------------------------------------------------------------*/
/* 68000 memory handlers */
/*--------------------------------------------------------------------------*/
uint8 MD_ReadMemory8(uint32 address)
{
MD_UpdateSubStuff();
address &= 0xFFFFFF;
//printf("Read8: %08x\n", address);
switch((address >> 21) & 7)
{
case 0: /* ROM */
case 1:
case 2: /* Unused */
case 3:
return(MD_ExtRead8(address));
case 7: /* RAM */
return READ_BYTE_MSB(work_ram, address & 0xFFFF);
case 5: /* Z80 & I/O */
if(address <= 0xA0FFFF)
{
if(zbusack == 1)
{
/* Z80 controls Z bus */
return (m68k_read_bus_8(address));
}
else
{
/* Read data from Z bus */
switch(address & 0x6000)
{
case 0x0000: /* RAM */
case 0x2000:
return (zram[(address & 0x1FFF)]);
case 0x4000: /* YM2612 */
return (MDSound_ReadFM(address & 3));
case 0x6000: /* Unused */
switch(address & 0xFF00)
{
case 0x7F00: /* VDP */
m68k_lockup_r_8(address);
default: /* Unused */
return (0xFF);
}
break;
}
}
}
else
{
switch((address >> 8) & 0xFF)
{
case 0x00: /* I/O CHIP */
if(address <= 0xA1001F)
{
return (gen_io_r((address >> 1) & 0x0F));
}
else
{
return (m68k_read_bus_8(address));
}
break;
case 0x10: /* MEMORY MODE */
return (m68k_read_bus_8(address));
case 0x11: /* BUSACK */
if((address & 1) == 0)
{
return (gen_busack_r() | (m68k_read_bus_8(address) & 0xFE));
}
else
return (m68k_read_bus_8(address));
case 0x12: /* RESET */
case 0x13: /* TIME */
case 0x20: /* UNKNOWN */
case 0x30: /* UNKNOWN */
return (MD_ExtRead8(address));
default: /* Unused */
return (m68k_lockup_r_8(address));
}
}
break;
case 6: /* VDP */
if((address & 0xE700E0) == 0xC00000)
{
switch(address & 0x1F)
{
case 0x00: /* DATA */
case 0x02:
return (MainVDP.vdp_data_r() >> 8);
case 0x01: /* DATA */
case 0x03:
return (MainVDP.vdp_data_r() & 0xFF);
case 0x04: /* CTRL */
case 0x06:
return ((m68k_read_bus_8(address) & 0xFC) | (MainVDP.vdp_ctrl_r() >> 8));
case 0x05: /* CTRL */
case 0x07:
return (MainVDP.vdp_ctrl_r() & 0xFF);
case 0x08: /* HVC */
case 0x0A:
case 0x0C:
case 0x0E:
return (MainVDP.vdp_hvc_r() >> 8);
case 0x09: /* HVC */
case 0x0B:
case 0x0D:
case 0x0F:
return (MainVDP.vdp_hvc_r() & 0xFF);
case 0x10: /* PSG */
case 0x11:
case 0x12:
case 0x13:
case 0x14:
case 0x15:
case 0x16:
case 0x17:
return (m68k_lockup_r_8(address));
case 0x18: /* Unused */
case 0x19:
case 0x1A:
case 0x1B:
case 0x1C:
case 0x1D:
case 0x1E:
case 0x1F:
return (m68k_read_bus_8(address));
}
}
else
{
/* Unused */
return (m68k_lockup_r_8(address));
}
break;
case 4: /* Unused */
return (m68k_lockup_r_8(address));
}
return -1;
}
uint16 MD_ReadMemory16(uint32 address)
{
MD_UpdateSubStuff();
if(address & 1)
{
// TODO: Generate 68K exception(and remove address &= ~1)
printf("16-bit unaligned read: %08x\n", address);
address &= ~1;
}
address &= 0xFFFFFF;
//printf("Read16: %08x\n", address);
switch((address >> 21) & 7)
{
case 0: /* ROM */
case 1:
case 2:
case 3:
return(MD_ExtRead16(address));
case 7: /* RAM */
return READ_WORD_MSB(work_ram, address & 0xFFFF);
case 5: /* Z80 & I/O */
if(address <= 0xA0FFFF)
{
if(zbusack == 1)
{
return (m68k_read_bus_16(address));
}
else
{
uint8 temp;
switch(address & 0x6000)
{
case 0x0000: /* RAM */
case 0x2000:
temp = zram[address & 0x1FFF];
return (temp << 8 | temp);
case 0x4000: /* YM2612 */
temp = MDSound_ReadFM(address & 3);
return (temp << 8 | temp);
case 0x6000:
switch(address & 0xFF00)
{
case 0x7F00: /* VDP */
m68k_lockup_r_16(address);
default: /* Unused */
return (0xFFFF);
}
break;
}
}
}
else
{
if(address <= 0xA1001F)
{
uint8 temp = gen_io_r((address >> 1) & 0x0F);
return (temp << 8 | temp);
}
else
{
switch((address >> 8) & 0xFF)
{
case 0x10: /* MEMORY MODE */
return (m68k_read_bus_16(address));
case 0x11: /* BUSACK */
return ((m68k_read_bus_16(address) & 0xFEFF) | (gen_busack_r() << 8));
case 0x12: /* RESET */
case 0x13: /* TIME */
case 0x20: /* UNKNOWN */
case 0x30: /* UNKNOWN */
return(MD_ExtRead16(address));
default: /* Unused */
return (m68k_lockup_r_16(address));
}
}
}
break;
case 6:
if((address & 0xE700E0) == 0xC00000)
{
switch(address & 0x1F)
{
case 0x00: /* DATA */
case 0x02:
return (MainVDP.vdp_data_r());
case 0x04: /* CTRL */
case 0x06:
return (MainVDP.vdp_ctrl_r() | (m68k_read_bus_16(address) & 0xFC00));
case 0x08: /* HVC */
case 0x0A:
case 0x0C:
case 0x0E:
return (MainVDP.vdp_hvc_r());
case 0x10: /* PSG */
case 0x12:
case 0x14:
case 0x16:
return (m68k_lockup_r_16(address));
case 0x18: /* Unused */
case 0x1A:
case 0x1C:
case 0x1E:
return (m68k_read_bus_16(address));
}
}
else
{
return (m68k_lockup_r_16(address));
}
break;
case 4:
return (m68k_lockup_r_16(address));
}
return (0xA5A5);
}
void MD_WriteMemory8(uint32 address, uint8 value)
{
MD_UpdateSubStuff();
address &= 0xFFFFFF;
//printf("Write8: %08x %02x\n", address & 0xFFFFFF, value);
switch((address >> 21) & 7)
{
case 7:
WRITE_BYTE_MSB(work_ram, address & 0xFFFF, value);
return;
case 6:
if((address & 0xE700E0) == 0xC00000)
{
switch(address & 0x1F)
{
case 0x00: /* DATA */
case 0x01:
case 0x02:
case 0x03:
MainVDP.vdp_data_w(value << 8 | value);
return;
case 0x04: /* CTRL */
case 0x05:
case 0x06:
case 0x07:
MainVDP.vdp_ctrl_w(value << 8 | value);
return;
case 0x08: /* HVC */
case 0x09:
case 0x0A:
case 0x0B:
case 0x0C:
case 0x0D:
case 0x0E:
case 0x0F:
m68k_lockup_w_8(address, value);
return;
case 0x10: /* PSG */
case 0x12:
case 0x14:
case 0x16:
m68k_unused_8_w(address, value);
return;
case 0x11: /* PSG */
case 0x13:
case 0x15:
case 0x17:
psg_write(value);
return;
case 0x18: /* Unused */
case 0x19:
case 0x1A:
case 0x1B:
case 0x1C:
case 0x1D:
case 0x1E:
case 0x1F:
m68k_unused_8_w(address, value);
return;
}
}
else
{
m68k_lockup_w_8(address, value);
return;
}
case 5:
if(address <= 0xA0FFFF)
{
if(zbusack == 1)
{
m68k_unused_8_w(address, value);
return;
}
else
{
switch(address & 0x6000)
{
case 0x0000:
case 0x2000:
zram[(address & 0x1FFF)] = value;
return;
case 0x4000:
fm_write(address & 3, value);
return;
case 0x6000:
switch(address & 0xFF00)
{
case 0x6000: /* BANK */
gen_bank_w(value & 1);
return;
case 0x7F00: /* VDP */
m68k_lockup_w_8(address, value);
return;
default: /* Unused */
m68k_unused_8_w(address, value);
return;
}
break;
}
}
}
else
{
if(address <= 0xA1001F)
{
/* I/O chip only gets /LWR */
if(address & 1)
gen_io_w((address >> 1) & 0x0F, value);
return;
}
else
{
/* Bus control chip registers */
switch((address >> 8) & 0xFF)
{
case 0x10: /* MEMORY MODE */
m68k_unused_8_w(address, value);
return;
case 0x11: /* BUSREQ */
if((address & 1) == 0)
{
gen_busreq_w(value & 1);
}
else
{
m68k_unused_8_w(address, value);
}
return;
case 0x12: /* RESET */
gen_reset_w(value & 1);
return;
case 0x13: /* TIME */
case 0x20: /* UNKNOWN */
case 0x30: /* UNKNOWN */
MD_ExtWrite8(address, value);
return;
default: /* Unused */
m68k_lockup_w_8(address, value);
return;
}
}
}
break;
case 0: /* ROM */
case 1: /* ROM */
case 2: /* Unused */
case 3:
MD_ExtWrite8(address, value);
//m68k_unused_8_w(address, value);
return;
case 4: /* Unused */
m68k_lockup_w_8(address, value);
return;
}
}
void MD_WriteMemory16(uint32 address, uint16 value)
{
MD_UpdateSubStuff();
if(address & 1)
{
// TODO: Generate 68K exception(and remove address &= ~1)
printf("16-bit unaligned write: %08x %04x\n", address, value);
address &= ~1;
}
address &= 0xFFFFFF;
//printf("Write16: %08x %04x\n", address & 0xFFFFFF, value);
switch((address >> 21) & 7)
{
case 0: /* ROM */
case 1: /* ROM */
case 2: /* Unused */
case 3:
MD_ExtWrite16(address, value);
return;
case 4: /* Unused */
m68k_lockup_w_16(address, value);
return;
case 5: /* Z80 area, I/O chip, miscellaneous. */
if(address <= 0xA0FFFF)
{
/* Writes are ignored when the Z80 hogs the Z-bus */
if(zbusack == 1) {
m68k_unused_8_w(address, value);
return;
}
/* Write into Z80 address space */
switch(address & 0x6000)
{
case 0x0000: /* Work RAM */
case 0x2000: /* Work RAM */
zram[(address & 0x1FFF)] = (value >> 8) & 0xFF;
return;
case 0x4000: /* YM2612 */
fm_write(address & 3, (value >> 8) & 0xFF);
return;
case 0x6000: /* Bank register and VDP */
switch(address & 0x7F00)
{
case 0x6000: /* Bank register */
printf("Bank16: %04x\n", value);
gen_bank_w((value >> 8) & 1);
return;
case 0x7F00: /* VDP registers */
m68k_lockup_w_16(address, value);
return;
default: /* Unused */
m68k_unused_16_w(address, value);
return;
}
break;
}
}
else
{
/* I/O chip */
if(address <= 0xA1001F)
{
gen_io_w((address >> 1) & 0x0F, value & 0x00FF);
return;
}
else
{
/* Bus control chip registers */
switch((address >> 8) & 0xFF)
{
case 0x10: /* MEMORY MODE */
m68k_unused_16_w(address, value);
return;
case 0x11: /* BUSREQ */
gen_busreq_w((value >> 8) & 1);
return;
case 0x12: /* RESET */
gen_reset_w((value >> 8) & 1);
return;
case 0x13: /* TIME */
case 0x20: /* UNKNOWN */
case 0x30: /* UNKNOWN */
MD_ExtWrite16(address, value);
return;
default: /* Unused */
m68k_lockup_w_16(address, value);
return;
}
}
}
break;
case 6: /* VDP */
if((address & 0xE700E0) == 0xC00000)
{
switch(address & 0x1C)
{
case 0x00: /* DATA */
MainVDP.vdp_data_w(value);
return;
case 0x04: /* CTRL */
MainVDP.vdp_ctrl_w(value);
return;
case 0x08: /* HV counter */
case 0x0C: /* HV counter */
m68k_lockup_w_16(address, value);
return;
case 0x10: /* PSG */
case 0x14: /* PSG */
psg_write(value & 0xFF);
return;
case 0x18: /* Unused */
case 0x1C: /* Unused */
m68k_unused_8_w(address, value);
return;
}
}
else
{
/* Invalid address */
m68k_lockup_w_16(address, value);
}
break;
case 7: /* Work RAM */
WRITE_WORD_MSB(work_ram, address & 0xFFFF, value);
return;
}
}
}

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#ifndef _MEM68K_H_
#define _MEM68K_H_
namespace MDFN_IEN_MD
{
/* Function prototypes */
unsigned int m68k_read_bus_8(unsigned int address);
unsigned int m68k_read_bus_16(unsigned int address);
void m68k_lockup_w_8(unsigned int address, unsigned int value);
void m68k_lockup_w_16(unsigned int address, unsigned int value);
unsigned int m68k_lockup_r_8(unsigned int address);
unsigned int m68k_lockup_r_16(unsigned int address);
uint8 MD_ReadMemory8(uint32 address);
uint16 MD_ReadMemory16(uint32 address);
void MD_WriteMemory8(uint32 address, uint8 value);
void MD_WriteMemory16(uint32 address, uint16 value);
}
#endif /* _MEM68K_H_ */

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/*
membnk.c --
Memory handlers Z80 access to the banked V-bus address space.
*/
#include "shared.h"
#include "cart/cart.h"
namespace MDFN_IEN_MD
{
void z80_write_banked_memory(unsigned int address, unsigned int data)
{
//printf("Z80 Banked Write: %02x, %08x, %02x\n", address >> 21, address, data);
switch((address >> 21) & 7)
{
case 0: /* Cartridge ROM */
case 1:
MD_ExtWrite8(address, data);
return;
case 2: /* Unused */
case 3:
MD_ExtWrite8(address, data);
return;
case 4: /* Unused (lockup) */
z80bank_lockup_w(address, data);
return;
case 5: /* Z80, I/O chip, etc. */
if(address <= 0xA0FFFF)
{
z80bank_lockup_w(address, data);
return;
}
else
{
switch((address >> 8) & 0xFF)
{
case 0x00: /* I/O chip */
if(address <= 0xA1001F)
gen_io_w((address >> 1) & 0x0F, data);
else
z80bank_unused_w(address, data);
return;
case 0x10: /* DRAM refresh */
z80bank_unused_w(address, data);
return;
case 0x11: /* /BUSREQ */
if(address & 1)
z80bank_unused_w(address, data);
else
gen_busreq_w(data & 1);
return;
case 0x12: /* /RESET (w) */
if(address & 1)
z80bank_unused_w(address, data);
else
gen_reset_w(data & 1);
return;
case 0x13: /* /TIME region */
case 0x20: /* ? */
case 0x30: /* ? */
MD_ExtWrite8(address, data);
return;
default: /* Invalid */
z80bank_lockup_w(address, data);
return;
}
}
return;
case 6: /* VDP */
z80bank_vdp_w(address, data);
return;
case 7: /* Work RAM */
WRITE_BYTE_MSB(work_ram, address & 0xFFFF, data);
return;
}
}
int z80_read_banked_memory(unsigned int address)
{
//printf("Z80 Banked Read: %02x, %08x\n", address >> 21, address);
switch((address >> 21) & 7)
{
case 0: /* Cartridge ROM */
case 1:
return(MD_ExtRead8(address));
case 2: /* Unused */
case 3:
return(MD_ExtRead8(address));
case 4: /* Unused (lockup) */
return z80bank_lockup_r(address);
case 5: /* Z80, I/O chip, etc.*/
if(address <= 0xA0FFFF)
{
return z80bank_lockup_r(address);
}
else
{
switch((address >> 8) & 0xFF)
{
case 0x00: /* I/O chip */
if(address <= 0xA1001F)
return gen_io_r((address >> 1) & 0x0F);
else
return z80bank_unused_r(address);
break;
case 0x10: /* Unused */
return z80bank_unused_r(address);
case 0x11: /* /BUSACK from Z80 */
/* The Z80 can't read this bit (it would be halted
when the bit was zero) so we always return '1'. */
return 0xFF;
case 0x12: /* Unused */
case 0x13: /* /TIME region */
case 0x20: /* Unused */
case 0x30: /* Unused */
return(MD_ExtRead8(address));
default: /* Lockup */
return z80bank_lockup_r(address);
}
}
break;
case 6: /* VDP */
return z80bank_vdp_r(address);
case 7: /* Work RAM - can't be read on some Genesis models (!) */
return 0xFF;
}
return (-1);
}
void z80bank_vdp_w(int address, int data)
{
if((address & 0xE700E0) == 0xC00000)
{
switch(address & 0x1F)
{
case 0x00: /* Data port */
case 0x01:
case 0x02:
case 0x03:
puts("MOO2");
MainVDP.vdp_data_w(data << 8 | data);
return;
case 0x04: /* Control port */
case 0x05:
case 0x06:
case 0x07:
MainVDP.vdp_ctrl_w(data << 8 | data);
return;
case 0x08: /* Lockup (HVC) */
case 0x09:
case 0x0A:
case 0x0B:
case 0x0C:
case 0x0D:
case 0x0E:
case 0x0F:
z80bank_lockup_w(address, data);
return;
case 0x10: /* Unused */
case 0x12:
case 0x14:
case 0x16:
z80bank_unused_w(address, data);
return;
case 0x11: /* PSG */
case 0x13:
case 0x15:
case 0x17:
psg_write(data);
return;
case 0x18: /* Unused */
case 0x19:
case 0x1A:
case 0x1B:
z80bank_unused_w(address, data);
return;
case 0x1C: /* Test register */
case 0x1D:
case 0x1E:
case 0x1F:
MainVDP.vdp_test_w(data << 8 | data);
return;
}
}
else
{
/* Invalid VDP address */
z80bank_lockup_w(address, data);
return;
}
}
int z80bank_vdp_r(int address)
{
if((address & 0xE700E0) == 0xC00000)
{
switch(address & 0x1F)
{
case 0x00: /* Data */
case 0x02:
return (MainVDP.vdp_data_r() >> 8) & 0xFF;
case 0x01: /* Data */
case 0x03:
return MainVDP.vdp_data_r() & 0xFF;
case 0x04: /* Control */
case 0x06:
return (0xFC | (MainVDP.vdp_ctrl_r() >> 8)) & 0xFF;
case 0x05: /* Control */
case 0x07:
return MainVDP.vdp_ctrl_r() & 0xFF;
case 0x08: /* HVC */
case 0x0A:
case 0x0C:
case 0x0E:
return (MainVDP.vdp_hvc_r() >> 8) & 0xFF;
case 0x09: /* HVC */
case 0x0B:
case 0x0D:
case 0x0F:
return MainVDP.vdp_hvc_r() & 0xFF;
case 0x10: /* Lockup */
case 0x11:
case 0x12:
case 0x13:
case 0x14:
case 0x15:
case 0x16:
case 0x17:
return z80bank_lockup_r(address);
case 0x18: /* Unused */
case 0x19:
case 0x1A:
case 0x1B:
case 0x1C:
case 0x1D:
case 0x1E:
case 0x1F:
return (z80bank_unused_r(address) | 0xFF);
}
}
else
{
/* Invalid VDP address */
return z80bank_lockup_r(address);
}
return 0xFF;
}
/*
Handlers for access to unused addresses and those which make the
machine lock up.
*/
void z80bank_unused_w(int address, int data)
{
error("Z80 bank unused write %06X = %02X (%04X)\n", address, data, z80_get_reg(Z80_PC));
}
int z80bank_unused_r(int address)
{
error("Z80 bank unused read %06X (%04X)\n", address, z80_get_reg(Z80_PC));
return (address & 1) ? 0x00 : 0xFF;
}
void z80bank_lockup_w(int address, int data)
{
printf("Z80 bank lockup write %06X = %02X (%04X)\n", address, data, z80_getpc()); //_reg(Z80_PC));
gen_running = 0;
// FIXME/TODO
//z80_end_timeslice();
}
int z80bank_lockup_r(int address)
{
printf("Z80 bank lockup read %06X (%04X)\n", address, z80_getpc()); //reg(Z80_PC));
gen_running = 0;
//z80_end_timeslice();
// FIXME/TODO
return 0xFF;
}
}

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#ifndef _MEMBNK_H_
#define _MEMBNK_H_
namespace MDFN_IEN_MD
{
/* Function prototypes */
void z80_write_banked_memory(unsigned int address, unsigned int data);
int z80_read_banked_memory(unsigned int address);
void z80bank_vdp_w(int address, int data);
int z80bank_vdp_r(int address);
void z80bank_unused_w(int address, int data);
int z80bank_unused_r(int address);
void z80bank_lockup_w(int address, int data);
int z80bank_lockup_r(int address);
}
#endif /* _MEMBNK_H_ */

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/*
memvdp.c --
Memory handlers for when the VDP reads the V-bus during DMA.
*/
#include "shared.h"
#include "cart/cart.h"
namespace MDFN_IEN_MD
{
unsigned int vdp_dma_r(unsigned int address)
{
switch((address >> 21) & 7)
{
case 0: /* Cartridge ROM */
case 1:
case 2: /* Unused */
case 3:
return(MD_ExtRead16(address));
//return READ_WORD_MSB(cart_rom, address);
//return 0xFF00;
case 4: /* Work RAM */
case 6:
case 7:
return READ_WORD_MSB(work_ram, address & 0xFFFF);
case 5: /* Z80 area and I/O chip */
/* Z80 area always returns $FFFF */
if(address <= 0xA0FFFF)
{
/* Return $FFFF only when the Z80 isn't hogging the Z-bus.
(e.g. Z80 isn't reset and 68000 has the bus) */
return (zbusack == 0)
? 0xFFFF
: READ_WORD_MSB(work_ram, address & 0xFFFF);
}
else
/* The I/O chip and work RAM try to drive the data bus which
results in both values being combined in random ways when read.
We return the I/O chip values which seem to have precedence, */
if(address <= 0xA1001F)
{
uint8 temp = gen_io_r((address >> 1) & 0x0F);
return (temp << 8 | temp);
}
else
/* All remaining locations access work RAM */
return READ_WORD_MSB(work_ram, address & 0xFFFF);
}
return -1;
}
}

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#ifndef _MEMVDP_H_
#define _MEMVDP_H_
namespace MDFN_IEN_MD
{
/* Function prototypes */
unsigned int vdp_dma_r(unsigned int address);
}
#endif /* _MEMVDP_H_ */

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/*
memz80.c --
Memory handlers for Z80 memory and port access, and the Z80 to
VDP interface.
*/
#define LOG_PORT 0 /* 1= Log Z80 I/O port accesses */
#include "shared.h"
namespace MDFN_IEN_MD
{
uint8 MD_Z80_ReadByte(uint16 address)
{
switch((address >> 13) & 7)
{
case 0: /* Work RAM */
case 1:
return zram[address & 0x1FFF];
case 2: /* YM2612 */
return MDSound_ReadFM(address & 3);
case 3: /* VDP */
// printf("Z80 Read: %08x, %04x, %08x\n", zbank, address, zbank | address);
if((address & 0xFF00) == 0x7F00)
return z80_vdp_r(address);
return 0xFF;
default: /* V-bus bank */
return z80_read_banked_memory(zbank | (address & 0x7FFF));
}
return 0xFF;
}
void MD_Z80_WriteByte(uint16 address, uint8 data)
{
switch((address >> 13) & 7)
{
case 0: /* Work RAM */
case 1:
zram[address & 0x1FFF] = data;
return;
case 2: /* YM2612 */
fm_write(address & 3, data);
return;
case 3: /* Bank register and VDP */
//printf("Z80 Write: %08x, %04x, %08x\n", zbank, address, zbank | address);
switch(address & 0xFF00)
{
case 0x6000:
gen_bank_w(data & 1);
return;
case 0x7F00:
z80_vdp_w(address, data);
return;
default:
z80_unused_w(address, data);
return;
}
return;
default: /* V-bus bank */
z80_write_banked_memory(zbank | (address & 0x7FFF), data);
return;
}
}
int z80_vdp_r(int address)
{
switch(address & 0xFF)
{
case 0x00: /* VDP data port */
case 0x02:
return (MainVDP.vdp_data_r() >> 8) & 0xFF;
case 0x01: /* VDP data port */
case 0x03:
return (MainVDP.vdp_data_r() & 0xFF);
case 0x04: /* VDP control port */
case 0x06:
return (0xFF | ((MainVDP.vdp_ctrl_r() >> 8) & 3));
case 0x05: /* VDP control port */
case 0x07:
return (MainVDP.vdp_ctrl_r() & 0xFF);
case 0x08: /* HV counter */
case 0x0A:
case 0x0C:
case 0x0E:
return (MainVDP.vdp_hvc_r() >> 8) & 0xFF;
case 0x09: /* HV counter */
case 0x0B:
case 0x0D:
case 0x0F:
return (MainVDP.vdp_hvc_r() & 0xFF);
case 0x10: /* Unused (PSG) */
case 0x11:
case 0x12:
case 0x13:
case 0x14:
case 0x15:
case 0x16:
case 0x17:
return z80_lockup_r(address);
case 0x18: /* Unused */
case 0x19:
case 0x1A:
case 0x1B:
return z80_unused_r(address);
case 0x1C: /* Unused (test register) */
case 0x1D:
case 0x1E:
case 0x1F:
return z80_unused_r(address);
default: /* Invalid VDP addresses */
return z80_lockup_r(address);
}
return 0xFF;
}
void z80_vdp_w(int address, int data)
{
switch(address & 0xFF)
{
case 0x00: /* VDP data port */
case 0x01:
case 0x02:
case 0x03:
puts("MOO");
MainVDP.vdp_data_w(data << 8 | data);
return;
case 0x04: /* VDP control port */
case 0x05:
case 0x06:
case 0x07:
MainVDP.vdp_ctrl_w(data << 8 | data);
return;
case 0x08: /* Unused (HV counter) */
case 0x09:
case 0x0A:
case 0x0B:
case 0x0C:
case 0x0D:
case 0x0E:
case 0x0F:
z80_lockup_w(address, data);
return;
case 0x11: /* PSG */
case 0x13:
case 0x15:
case 0x17:
psg_write(data);
return;
case 0x10: /* Unused */
case 0x12:
case 0x14:
case 0x16:
z80_unused_w(address, data);
case 0x18: /* Unused */
case 0x19:
case 0x1A:
case 0x1B:
z80_unused_w(address, data);
return;
case 0x1C: /* Test register */
case 0x1D:
case 0x1E:
case 0x1F:
MainVDP.vdp_test_w(data << 8 | data);
return;
default: /* Invalid VDP addresses */
z80_lockup_w(address, data);
return;
}
}
/*
Port handlers. Ports are unused when not in Mark III compatability mode.
Games that access ports anyway:
- Thunder Force IV reads port $BF in its interrupt handler.
*/
uint8 MD_Z80_ReadPort(uint16 address)
{
#if LOG_PORT
error("Z80 read port %04X (%04X)\n", port, z80_get_reg(Z80_PC));
#endif
return 0xFF;
}
void MD_Z80_WritePort(uint16 address, uint8 data)
{
#if LOG_PORT
error("Z80 write %02X to port %04X (%04X)\n", data, port, z80_get_reg(Z80_PC));
#endif
}
/*
Handlers for access to unused addresses and those which make the
machine lock up.
*/
void z80_unused_w(int address, int data)
{
printf("Z80 unused write %04X = %02X (%04X)\n", address, data, z80_getpc());
}
int z80_unused_r(int address)
{
printf("Z80 unused read %04X (%04X)\n", address, z80_getpc());
return 0xFF;
}
void z80_lockup_w(int address, int data)
{
printf("Z80 lockup write %04X = %02X (%04X)\n", address, data, z80_getpc());
gen_running = 0;
//z80_end_timeslice();
// FIXME/TODO
}
int z80_lockup_r(int address)
{
printf("Z80 lockup read %04X (%04X)\n", address, z80_getpc());
gen_running = 0;
//z80_end_timeslice();
// FIXME/TODO
return 0xFF;
}
}

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#ifndef _MEMZ80_H_
#define _MEMZ80_H_
namespace MDFN_IEN_MD
{
/* Function prototypes */
uint8 MD_Z80_ReadByte(uint16 address);
void MD_Z80_WriteByte(uint16 address, uint8 data);
uint8 MD_Z80_ReadPort(uint16 address);
void MD_Z80_WritePort(uint16 address, uint8 data);
void z80_unused_w(int address, int data);
int z80_unused_r(int address);
void z80_lockup_w(int address, int data);
int z80_lockup_r(int address);
int z80_vdp_r(int address);
void z80_vdp_w(int address, int data);
}
#endif /* _MEMZ80_H_ */

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/*******************************************************************************
* *
* Define size independent data types and operations. *
* *
* The following types must be supported by all platforms: *
* *
* uint8 - Unsigned 8-bit Integer int8 - Signed 8-bit integer *
* uint16 - Unsigned 16-bit Integer int16 - Signed 16-bit integer *
* uint32 - Unsigned 32-bit Integer int32 - Signed 32-bit integer *
* uint64 - Unsigned 64-bit Integer INT64 - Signed 64-bit integer *
* *
* *
* The macro names for the artithmatic operations are composed as follows: *
* *
* XXX_R_A_B, where XXX - 3 letter operation code (ADD, SUB, etc.) *
* R - The type of the result *
* A - The type of operand 1 *
* B - The type of operand 2 (if binary operation) *
* *
* Each type is one of: U8,8,U16,16,U32,32,U64,64 *
* *
*******************************************************************************/
#ifndef OSD_CPU_H
#define OSD_CPU_H
/* Combine two 32-bit integers into a 64-bit integer */
#define COMBINE_64_32_32(A,B) ((((uint64)(A))<<32) | (uint32)(B))
#define COMBINE_U64_U32_U32(A,B) COMBINE_64_32_32(A,B)
/* Return upper 32 bits of a 64-bit integer */
#define HI32_32_64(A) (((uint64)(A)) >> 32)
#define HI32_U32_U64(A) HI32_32_64(A)
/* Return lower 32 bits of a 64-bit integer */
#define LO32_32_64(A) ((A) & 0xffffffff)
#define LO32_U32_U64(A) LO32_32_64(A)
#define DIV_64_64_32(A,B) ((A)/(B))
#define DIV_U64_U64_U32(A,B) ((A)/(uint32)(B))
#define MOD_32_64_32(A,B) ((A)%(B))
#define MOD_U32_U64_U32(A,B) ((A)%(uint32)(B))
#define MUL_64_32_32(A,B) ((A)*(INT64)(B))
#define MUL_U64_U32_U32(A,B) ((A)*(uint64)(uint32)(B))
/******************************************************************************
* Union of uint8, uint16 and uint32 in native endianess of the target
* This is used to access bytes and words in a machine independent manner.
* The upper bytes h2 and h3 normally contain zero (16 bit CPU cores)
* thus PAIR.d can be used to pass arguments to the memory system
* which expects 'int' really.
******************************************************************************/
typedef union {
#ifdef LSB_FIRST
struct { uint8 l,h,h2,h3; } b;
struct { uint16 l,h; } w;
#else
struct { uint8 h3,h2,h,l; } b;
struct { uint16 h,l; } w;
#endif
uint32 d;
} PAIR;
#endif /* defined OSD_CPU_H */

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#ifndef _SHARED_H_
#define _SHARED_H_
#include "../mednafen.h"
#include "../masmem.h"
#include <stdio.h>
#include <math.h>
#define error(...)
enum
{
CLOCK_NTSC = 53693175,
CLOCK_PAL = 53203424 // Is this correct?
};
#include "macros.h"
#include "hw_cpu/c68k/c68k.h"
#include "hw_cpu/z80-fuse/z80.h"
#include "../state.h"
#include "header.h"
#include "debug.h"
#include "genesis.h"
#include "mem68k.h"
#include "memz80.h"
#include "membnk.h"
#include "memvdp.h"
#include "system.h"
#include "genio.h"
#include "sound.h"
#include "vdp.h"
using namespace MDFN_IEN_MD;
#endif /* _SHARED_H_ */

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/*
sound.c
YM2612 and SN76489 emulation
*/
#include "shared.h"
#include "hw_sound/ym2612/Ym2612_Emu.h"
#include "hw_sound/sms_apu/Sms_Apu.h"
#include <blip/Blip_Buffer.h>
#include <blip/Stereo_Buffer.h>
static Stereo_Buffer zebuf;
static Sms_Apu apu;
/* YM2612 data */
static Blip_Synth<blip_good_quality, 65536> FMSynth;
static int16 fm_last_values[2];
static int32 fm_last_timestamp;
static int32 fm_div;
static uint32 fm_latch; // Address latch(9-bits)
static Ym2612_Emu FMUnit;
static bool FMReset;
namespace MDFN_IEN_MD
{
static void UpdateFM(void)
{
int32 cycles = md_timestamp - fm_last_timestamp;
fm_div -= cycles;
while(fm_div <= 0)
{
int16 new_values[2];
new_values[0] = new_values[1] = 0;
if(!FMReset)
FMUnit.run(new_values);
//if(FSettings.SndRate)
{
FMSynth.offset((md_timestamp + fm_div) / 15, new_values[0] - fm_last_values[0], zebuf.left());
FMSynth.offset((md_timestamp + fm_div) / 15, new_values[1] - fm_last_values[1], zebuf.right());
fm_last_values[0] = new_values[0];
fm_last_values[1] = new_values[1];
}
fm_div += (72 * 7 * 2);
}
fm_last_timestamp = md_timestamp;
}
void fm_write(int address, int data)
{
if(FMReset)
return;
if(address & 0x1)
{
UpdateFM();
if(fm_latch & 0x100)
FMUnit.write1(fm_latch & 0xFF, data);
else
FMUnit.write0(fm_latch & 0xFF, data);
}
else
{
/* Register latch */
fm_latch = data | ((address & 0x2) ? 0x100 : 0x00);
}
}
int MDSound_ReadFM(int address)
{
if(FMReset)
return(0x00);
UpdateFM();
return(FMUnit.read());
}
void MDSound_SetYM2612Reset(bool new_reset)
{
// Only call the reset routine when reset begins, and just ignore all
// reads/writes while reset is active.
if(new_reset && !FMReset)
{
UpdateFM();
FMUnit.reset();
}
FMReset = new_reset;
}
void psg_write(int data)
{
apu.write_data(md_timestamp / 15, data);
}
static void RedoVolume(void)
{
apu.output(zebuf.center(), zebuf.left(), zebuf.right());
//apu.volume(0.15);
apu.volume(0.25);
FMSynth.volume(1.00);
}
bool MDSound_SetSoundRate(uint32 rate)
{
zebuf.set_sample_rate(rate ?rate : 44100, 60);
return(TRUE);
}
int32 MDSound_Flush(int16 *SoundBuf, const int32 MaxSoundFrames)
{
int32 FrameCount = 0;
UpdateFM();
apu.end_frame(md_timestamp / 15);
zebuf.end_frame(md_timestamp / 15);
if(SoundBuf)
FrameCount = zebuf.read_samples(SoundBuf, MaxSoundFrames * 2) / 2;
else
zebuf.clear();
fm_last_timestamp = 0;
return(FrameCount);
}
int MDSound_Init(void)
{
MDSound_SetSoundRate(0);
zebuf.clock_rate((long)(CLOCK_NTSC / 15));
RedoVolume();
zebuf.bass_freq(20);
return(1);
}
void MDSound_Kill(void)
{
}
void MDSound_Power(void)
{
FMUnit.reset();
apu.reset();
}
int MDSound_StateAction(StateMem *sm, int load, int data_only)
{
Sms_ApuState sn_state;
MDFN::LEPacker fm_slizer;
apu.save_state(&sn_state);
FMUnit.serialize(fm_slizer, false);
SFORMAT StateRegs[] =
{
SFVAR(fm_last_timestamp),
SFVAR(FMReset),
SFVAR(fm_div),
SFVAR(fm_latch),
SFARRAYN(&fm_slizer[0], fm_slizer.size(), "FMState"),
SFARRAY32N(sn_state.volume, 4, "Volume"),
SFARRAY32N(sn_state.sq_period, 3, "SQPeriod"),
SFARRAY32N(sn_state.sq_phase, 3, "SQPhase"),
SFVARN(sn_state.noise_period, "NPeriod"),
SFVARN(sn_state.noise_shifter, "NShifter"),
SFVARN(sn_state.noise_feedback, "NFeedback"),
SFVARN(sn_state.latch, "Latch"),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, "SND");
if(load)
{
FMUnit.serialize(fm_slizer, true);
apu.load_state(&sn_state);
}
return(ret);
}
};

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@ -1,25 +0,0 @@
#ifndef _SOUND_H_
#define _SOUND_H_
namespace MDFN_IEN_MD
{
/* Function prototypes */
void fm_write(int address, int data);
void psg_write(int data);
void MDSound_SetYM2612Reset(bool new_reset);
int MDSound_ReadFM(int address);
void MDSound_SetSoundMultiplier(double multiplier);
bool MDSound_SetSoundRate(uint32 rate);
int32 MDSound_Flush(int16 *SoundBuf, const int32 MaxSoundFrames);
int MDSound_Init(void);
void MDSound_Kill(void);
void MDSound_Power(void);
int MDSound_StateAction(StateMem *sm, int load, int data_only);
};
#endif /* _SOUND_H_ */

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/*
Copyright (C) 1999, 2000, 2001, 2002, 2003 Charles MacDonald
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include "shared.h"
#include "cart/cart.h"
#include "cd/cd.h"
#include "../md5.h"
#include "../general.h"
#include "../mempatcher.h"
namespace MDFN_IEN_MD
{
enum
{
REGION_SAME = 1,
REGION_GAME,
REGION_OVERSEAS_NTSC,
REGION_OVERSEAS_PAL,
REGION_DOMESTIC_NTSC,
REGION_DOMESTIC_PAL
};
int MD_HackyHackyMode = 0;
bool MD_IsCD;
static int32 z80_cycle_counter;
static int32 z80_last_ts;
int32 md_timestamp;
static bool suspend68k = FALSE;
static bool run_cpu;
void MD_Suspend68K(bool state)
{
suspend68k = state;
}
bool MD_Is68KSuspended(void)
{
return(suspend68k);
}
static void system_init(bool overseas, bool PAL, bool overseas_reported, bool PAL_reported)
{
gen_running = 1;
z80_init();
z80_readbyte = MD_Z80_ReadByte;
z80_writebyte = MD_Z80_WriteByte;
z80_readport = MD_Z80_ReadPort;
z80_writeport = MD_Z80_WritePort;
gen_init();
MDIO_Init(overseas, PAL, overseas_reported, PAL_reported);
MainVDP.SetSettings(PAL, PAL_reported, MDFN_GetSettingB("md.correct_aspect"));
#ifdef WANT_DEBUGGER
MDDBG_Init();
#endif
}
static void system_reset(bool poweron)
{
z80_cycle_counter = 0;
z80_last_ts = 0;
if(MD_IsCD)
MDCD_Reset(poweron);
else
MDCart_Reset();
gen_reset(poweron);
if(poweron)
MainVDP.Reset();
MDSound_Power();
}
static void system_shutdown(void)
{
gen_shutdown();
}
void MD_ExitCPULoop(void)
{
run_cpu = FALSE;
}
void MD_UpdateSubStuff(void)
{
int32 max_md_timestamp;
max_md_timestamp = Main68K.timestamp * 7;
if(zreset == 1 && zbusreq == 0)
{
z80_cycle_counter += max_md_timestamp - z80_last_ts;
while(z80_cycle_counter > 0)
{
int32 z80_temp = z80_do_opcode() * 15;
z80_cycle_counter -= z80_temp;
md_timestamp += z80_temp;
if(md_timestamp > max_md_timestamp)
{
//printf("Meow: %d\n", md_timestamp - max_md_timestamp);
md_timestamp = max_md_timestamp;
}
MainVDP.Run();
}
}
z80_last_ts = max_md_timestamp;
md_timestamp = max_md_timestamp;
MainVDP.Run();
//if(MD_IsCD)
// MDCD_Run(master_cycles);
}
static int system_frame(int do_skip)
{
run_cpu = TRUE;
while(run_cpu > 0)
{
if(suspend68k)
{
Main68K.timestamp += 4;
}
else
{
#ifdef WANT_DEBUGGER
if(MD_DebugMode)
MDDBG_CPUHook();
#endif
C68k_Exec(&Main68K);
}
MD_UpdateSubStuff();
}
return gen_running;
}
static void Emulate(EmulateSpecStruct *espec)
{
MDFNMP_ApplyPeriodicCheats();
MDIO_BeginTimePeriod(md_timestamp);
MDINPUT_Frame();
if(espec->VideoFormatChanged)
MainVDP.SetPixelFormat(espec->surface->format); //.Rshift, espec->surface->format.Gshift, espec->surface->format.Bshift);
if(espec->SoundFormatChanged)
MDSound_SetSoundRate(espec->SoundRate);
MainVDP.SetSurface(espec); //espec->surface, &espec->DisplayRect);
system_frame(0);
espec->MasterCycles = md_timestamp;
espec->SoundBufSize = MDSound_Flush(espec->SoundBuf, espec->SoundBufMaxSize);
#if 0
{
static double avg = 0;
static double s_avg = 0;
avg += (espec->MasterCycles - avg) * 0.05;
s_avg += (espec->SoundBufSize - s_avg) * 0.05;
printf("%f, %f\n", avg / 262 / 10, 48000 / s_avg);
}
#endif
MDIO_EndTimePeriod(md_timestamp);
md_timestamp = 0;
z80_last_ts = 0;
Main68K.timestamp = 0;
MainVDP.ResetTS();
//MainVDP.SetSurface(NULL);
}
static void CloseGame(void)
{
MDCart_Close();
}
static bool decode_region_setting(const int setting, bool &overseas, bool &pal)
{
switch(setting)
{
default: assert(0);
return(false);
case REGION_OVERSEAS_NTSC:
overseas = TRUE;
pal = FALSE;
return(TRUE);
case REGION_OVERSEAS_PAL:
overseas = TRUE;
pal = TRUE;
return(TRUE);
case REGION_DOMESTIC_NTSC:
overseas = FALSE;
pal = FALSE;
return(TRUE);
case REGION_DOMESTIC_PAL:
overseas = FALSE;
pal = TRUE;
return(TRUE);
}
}
static int LoadCommonPost(const md_game_info &ginfo);
static int LoadCommonPost(const md_game_info &ginfo)
{
MDFN_printf(_("ROM: %dKiB\n"), (ginfo.rom_size + 1023) / 1024);
MDFN_printf(_("ROM MD5: 0x%s\n"), md5_context::asciistr(ginfo.md5, 0).c_str());
MDFN_printf(_("Header MD5: 0x%s\n"), md5_context::asciistr(ginfo.info_header_md5, 0).c_str());
MDFN_printf(_("Product Code: %s\n"), ginfo.product_code);
MDFN_printf(_("Domestic name: %s\n"), ginfo.domestic_name); // TODO: Character set conversion(shift_jis -> utf-8)
MDFN_printf(_("Overseas name: %s\n"), ginfo.overseas_name);
MDFN_printf(_("Copyright: %s\n"), ginfo.copyright);
if(ginfo.checksum == ginfo.checksum_real)
MDFN_printf(_("Checksum: 0x%04x\n"), ginfo.checksum);
else
MDFN_printf(_("Checksum: 0x%04x\n Warning: calculated checksum(0x%04x) does not match\n"), ginfo.checksum, ginfo.checksum_real);
MDFN_printf(_("Supported I/O devices:\n"));
MDFN_indent(1);
for(unsigned int iot = 0; iot < sizeof(IO_types) / sizeof(IO_type_t); iot++)
{
if(ginfo.io_support & (1 << IO_types[iot].id))
MDFN_printf(_("%s\n"), _(IO_types[iot].name));
}
MDFN_indent(-1);
MDFNMP_Init(8192, (1 << 24) / 8192);
MDFNMP_AddRAM(65536, 0x7 << 21, work_ram);
MDFNGameInfo->GameSetMD5Valid = FALSE;
MDSound_Init();
MDFN_printf(_("Supported regions:\n"));
MDFN_indent(1);
if(ginfo.region_support & REGIONMASK_JAPAN_NTSC)
MDFN_printf(_("Japan/Domestic NTSC\n"));
if(ginfo.region_support & REGIONMASK_JAPAN_PAL)
MDFN_printf(_("Japan/Domestic PAL\n"));
if(ginfo.region_support & REGIONMASK_OVERSEAS_NTSC)
MDFN_printf(_("Overseas NTSC\n"));
if(ginfo.region_support & REGIONMASK_OVERSEAS_PAL)
MDFN_printf(_("Overseas PAL\n"));
MDFN_indent(-1);
{
const int region_setting = MDFN_GetSettingI("md.region");
const int reported_region_setting = MDFN_GetSettingI("md.reported_region");
// Default, in case the game doesn't support any regions!
bool game_overseas = TRUE;
bool game_pal = FALSE;
bool overseas;
bool pal;
bool overseas_reported;
bool pal_reported;
// Preference order, TODO: Make it configurable
if(ginfo.region_support & REGIONMASK_OVERSEAS_NTSC)
{
game_overseas = TRUE;
game_pal = FALSE;
}
else if(ginfo.region_support & REGIONMASK_JAPAN_NTSC)
{
game_overseas = FALSE;
game_pal = FALSE;
}
else if(ginfo.region_support & REGIONMASK_OVERSEAS_PAL)
{
game_overseas = TRUE;
game_pal = TRUE;
}
else if(ginfo.region_support & REGIONMASK_JAPAN_PAL) // WTF?
{
game_overseas = FALSE;
game_pal = TRUE;
}
if(region_setting == REGION_GAME)
{
overseas = game_overseas;
pal = game_pal;
}
else
{
decode_region_setting(region_setting, overseas, pal);
}
if(reported_region_setting == REGION_GAME)
{
overseas_reported = game_overseas;
pal_reported = game_pal;
}
else if(reported_region_setting == REGION_SAME)
{
overseas_reported = overseas;
pal_reported = pal;
}
else
{
decode_region_setting(reported_region_setting, overseas_reported, pal_reported);
}
MDFN_printf("\n");
MDFN_printf(_("Active Region: %s %s\n"), overseas ? _("Overseas") : _("Domestic"), pal ? _("PAL") : _("NTSC"));
MDFN_printf(_("Active Region Reported: %s %s\n"), overseas_reported ? _("Overseas") : _("Domestic"), pal_reported ? _("PAL") : _("NTSC"));
system_init(overseas, pal, overseas_reported, pal_reported);
if(pal)
MDFNGameInfo->nominal_height = 240;
else
MDFNGameInfo->nominal_height = 224;
MDFNGameInfo->MasterClock = MDFN_MASTERCLOCK_FIXED(pal ? CLOCK_PAL : CLOCK_NTSC);
if(pal)
MDFNGameInfo->fps = (int64)CLOCK_PAL * 65536 * 256 / (313 * 3420);
else
MDFNGameInfo->fps = (int64)CLOCK_NTSC * 65536 * 256 / (262 * 3420);
//printf("%f\n", (double)MDFNGameInfo->fps / 65536 / 256);
}
if(MDFN_GetSettingB("md.correct_aspect"))
{
MDFNGameInfo->nominal_width = 292;
MDFNGameInfo->lcm_width = 1280;
}
else
{
MDFNGameInfo->nominal_width = 320;
MDFNGameInfo->lcm_width = 320;
}
MDFNGameInfo->lcm_height = MDFNGameInfo->nominal_height * 2;
MDFNGameInfo->LayerNames = "BG0\0BG1\0OBJ\0";
system_reset(true);
return(1);
}
static int Load(const char *name, MDFNFILE *fp)
{
md_game_info ginfo;
int ret;
memset(&ginfo, 0, sizeof(md_game_info));
ret = MDCart_Load(&ginfo, name, fp);
if(ret <= 0)
return(ret);
memcpy(MDFNGameInfo->MD5, ginfo.md5, 16);
MD_IsCD = FALSE;
MD_ExtRead8 = MDCart_Read8;
MD_ExtRead16 = MDCart_Read16;
MD_ExtWrite8 = MDCart_Write8;
MD_ExtWrite16 = MDCart_Write16;
MDCart_LoadNV();
if(!LoadCommonPost(ginfo))
return(0);
return(1);
}
static int LoadCD(std::vector<CDIF *> *CDInterfaces)
{
md_game_info ginfo;
memset(&ginfo, 0, sizeof(md_game_info));
MD_IsCD = TRUE;
if(!MDCD_Load(CDInterfaces, &ginfo))
{
puts("BOOM");
return(FALSE);
}
memcpy(MDFNGameInfo->MD5, ginfo.md5, 16);
if(!LoadCommonPost(ginfo))
return(0);
return(TRUE);
}
static bool TestMagicCD(std::vector<CDIF *> *CDInterfaces)
{
return(MDCD_TestMagic(CDInterfaces));
}
static void DoSimpleCommand(int cmd)
{
switch(cmd)
{
case MDFN_MSC_POWER: system_reset(true); break;
case MDFN_MSC_RESET: system_reset(false); break;
}
}
static int StateAction(StateMem *sm, int load, int data_only)
{
int ret = 1;
unsigned int c68k_state_len = C68k_Get_State_Max_Len();
//zero 29-oct-2012 - remove dynamic array
uint8* c68k_state = new uint8[c68k_state_len];
C68k_Save_State(&Main68K, c68k_state);
SFORMAT StateRegs[] =
{
SFARRAY(work_ram, 65536),
SFARRAY(zram, 8192),
SFVAR(zbusreq),
SFVAR(zreset),
SFVAR(zbusack),
SFVAR(zirq),
SFVAR(zbank),
SFVAR(md_timestamp),
SFVAR(suspend68k),
SFVAR(z80_cycle_counter),
SFARRAY(c68k_state, c68k_state_len),
SFEND
};
ret &= MDFNSS_StateAction(sm, load, data_only, StateRegs, "MAIN");
ret &= z80_state_action(sm, load, data_only, "Z80");
ret &= MDINPUT_StateAction(sm, load, data_only);
ret &= MainVDP.StateAction(sm, load, data_only);
ret &= MDSound_StateAction(sm, load, data_only);
ret &= MDCart_StateAction(sm, load, data_only);
if(load)
{
C68k_Load_State(&Main68K, c68k_state);
z80_set_interrupt(zirq);
}
delete[] c68k_state;
return(ret);
}
static const MDFNSetting_EnumList RegionList[] =
{
{ "game", REGION_GAME, gettext_noop("Match game's header."), gettext_noop("Emulate the region that the game indicates it expects to run in via data in the header(or in an internal database for a few games that may have bad header data).") },
{ "overseas_ntsc", REGION_OVERSEAS_NTSC, gettext_noop("Overseas(non-Japan), NTSC"), gettext_noop("Region used in North America.") },
{ "overseas_pal", REGION_OVERSEAS_PAL, gettext_noop("Overseas(non-Japan), PAL"), gettext_noop("Region used in Europe.") },
{ "domestic_ntsc", REGION_DOMESTIC_NTSC, gettext_noop("Domestic(Japan), NTSC"), gettext_noop("Region used in Japan.") },
{ "domestic_pal", REGION_DOMESTIC_PAL, gettext_noop("Domestic(Japan), PAL"), gettext_noop("Probably an invalid region, but available for testing purposes anyway.") },
{ NULL, 0 }
};
static const MDFNSetting_EnumList ReportedRegionList[] =
{
{ "same", REGION_SAME, gettext_noop("Match the region emulated.") },
{ "game", REGION_GAME, gettext_noop("Match game's header."), gettext_noop("This option, in conjunction with the \"md.region\" setting, can be used to run all games at NTSC speeds, or all games at PAL speeds.") },
{ "overseas_ntsc", REGION_OVERSEAS_NTSC, gettext_noop("Overseas(non-Japan), NTSC"), gettext_noop("Region used in North America.") },
{ "overseas_pal", REGION_OVERSEAS_PAL, gettext_noop("Overseas(non-Japan), PAL"), gettext_noop("Region used in Europe.") },
{ "domestic_ntsc", REGION_DOMESTIC_NTSC, gettext_noop("Domestic(Japan), NTSC"), gettext_noop("Region used in Japan.") },
{ "domestic_pal", REGION_DOMESTIC_PAL, gettext_noop("Domestic(Japan), PAL"), gettext_noop("Probably an invalid region, but available for testing purposes anyway.") },
{ NULL, 0 },
};
static MDFNSetting MDSettings[] =
{
{ "md.region", MDFNSF_EMU_STATE | MDFNSF_UNTRUSTED_SAFE, gettext_noop("Emulate the specified region's Genesis/MegaDrive"), NULL, MDFNST_ENUM, "game", NULL, NULL, NULL, NULL, RegionList },
{ "md.reported_region", MDFNSF_EMU_STATE | MDFNSF_UNTRUSTED_SAFE, gettext_noop("Region reported to the game."), NULL, MDFNST_ENUM, "same", NULL, NULL, NULL, NULL, ReportedRegionList },
{ "md.cdbios", MDFNSF_EMU_STATE, gettext_noop("Path to the CD BIOS"), gettext_noop("SegaCD/MegaCD emulation is currently nonfunctional."), MDFNST_STRING, "us_scd1_9210.bin" },
{ "md.correct_aspect", MDFNSF_CAT_VIDEO, gettext_noop("Correct the aspect ratio."), NULL, MDFNST_BOOL, "1" },
// off, teamplay, 4way, auto
// { "md.input.4player", MDFNSF_EMU_STATE | MDFNSF_UNTRUSTED_SAFE | MDFNSF_CAT_INPUT, gettext_noop("Which 4-player adapter to use."), NULL, MDFNST_STRING, "auto", NULL, NULL },
{ NULL }
};
static const FileExtensionSpecStruct KnownExtensions[] =
{
{ ".bin", gettext_noop("Super Magic Drive binary ROM Image") },
{ ".smd", gettext_noop("Super Magic Drive interleaved format ROM Image") },
{ ".md", gettext_noop("Multi Game Doctor format ROM Image") },
{ NULL, NULL }
};
void SetLayerEnableMask(uint64 mask)
{
MainVDP.SetLayerEnableMask(mask);
}
}
MDFNGI EmulatedMD =
{
"md",
"Sega Genesis/MegaDrive",
KnownExtensions,
MODPRIO_INTERNAL_HIGH,
#ifdef WANT_DEBUGGER
&DBGInfo,
#else
NULL,
#endif
&MDInputInfo,
Load,
MDCart_TestMagic,
LoadCD,
TestMagicCD,
CloseGame,
SetLayerEnableMask,
NULL,
NULL,
NULL,
NULL, //InstallReadPatch,
NULL, //RemoveReadPatches,
NULL, //MemRead,
false,
StateAction,
Emulate,
MDINPUT_SetInput,
DoSimpleCommand,
MDSettings,
0, // MasterClock(set in game loading code)
0,
TRUE, // Multires possible?
0, // lcm_width // Calculated in game load
0, // lcm_height // Calculated in game load
NULL, // Dummy
// We want maximum values for nominal width and height here so the automatic fullscreen setting generation code will have
// selected a setting suitable if aspect ratio correction is turned off.
320, // Nominal width(adjusted in game loading code, with aspect ratio correction enabled, it's 292, otherwise 320)
240, // Nominal height(adjusted in game loading code to 224 for NTSC, and 240 for PAL)
1024, // Framebuffer width
512, // Framebuffer height
2, // Number of output sound channels
};

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@ -1,43 +0,0 @@
#ifndef _SYSTEM_H_
#define _SYSTEM_H_
namespace MDFN_IEN_MD
{
/* Input devices */
#define MAX_DEVICES (8) /* Unsure of maximum */
#define DEVICE_2BUTTON (0) /* 2-button gamepad */
#define DEVICE_3BUTTON (1) /* 3-button gamepad */
#define DEVICE_6BUTTON (2) /* 6-button gamepad */
/* Input bitmasks */
#define INPUT_MODE (0x00000800)
#define INPUT_Z (0x00000400)
#define INPUT_Y (0x00000200)
#define INPUT_X (0x00000100)
#define INPUT_START (0x00000080)
#define INPUT_C (0x00000040)
#define INPUT_B (0x00000020)
#define INPUT_A (0x00000010)
#define INPUT_RIGHT (0x00000008)
#define INPUT_LEFT (0x00000004)
#define INPUT_DOWN (0x00000002)
#define INPUT_UP (0x00000001)
extern int32 md_timestamp;
void MD_ExitCPULoop(void);
void MD_Suspend68K(bool state);
void MD_68KHALTHack(void);
bool MD_Is68KSuspended(void);
void MD_UpdateSubStuff();
extern bool MD_IsCD;
extern int MD_HackyHackyMode;
}
#endif /* _SYSTEM_H_ */

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@ -1,98 +0,0 @@
#ifndef __MDFN_MD_VCNT_H_
#define __MDFN_MD_VCNT_H_
// TODO: Recheck vc30 and PAL counts
static const uint8 vc28_ntsc[262] =
{
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9,
0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9,
0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
};
static const uint8 vc30_ntsc[262] =
{
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF,
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, //0x06,
};
static const uint8 vc28_pal[313] =
{
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2,
0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6,
0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6,
0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6,
0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6,
0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
};
static const uint8 vc30_pal[313] =
{
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F,
0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F,
0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F,
0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F,
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B, 0x7C, 0x7D, 0x7E, 0x7F,
0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B, 0x8C, 0x8D, 0x8E, 0x8F,
0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B, 0x9C, 0x9D, 0x9E, 0x9F,
0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC, 0xAD, 0xAE, 0xAF,
0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD, 0xBE, 0xBF,
0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD, 0xCE, 0xCF,
0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF,
0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF,
0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF,
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A,
0xD2, 0xD3, 0xD4, 0xD5, 0xD6,
0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD, 0xDE, 0xDF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6,
0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED, 0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6,
0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD, 0xFE, 0xFF
};
#endif

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