libgambatte: Refactor Memory
This commit is contained in:
MrWint
parent
51e8ba3cf5
commit
ae98698758
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@ -1206,6 +1206,7 @@ void gambatte::setInitState(SaveState &state, const bool cgb, const bool gbaCgbM
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state.mem.lastOamDmaUpdate = disabled_time;
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state.mem.unhaltTime = disabled_time;
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state.mem.minIntTime = 0;
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state.mem.halttime = 0;
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state.mem.rombank = 1;
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state.mem.dmaSource = 0;
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state.mem.dmaDestination = 0;
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@ -1217,6 +1218,7 @@ void gambatte::setInitState(SaveState &state, const bool cgb, const bool gbaCgbM
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state.mem.rambankMode = false;
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state.mem.hdmaTransfer = false;
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state.mem.gbIsCgb = cgb;
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state.mem.stopped = false;
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for (int i = 0x00; i < 0x40; i += 0x02) {
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File diff suppressed because it is too large
Load Diff
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@ -1,30 +1,30 @@
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/***************************************************************************
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* Copyright (C) 2007 by Sindre Aamås *
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* aamas@stud.ntnu.no *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License version 2 as *
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* published by the Free Software Foundation. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License version 2 for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* version 2 along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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//
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// Copyright (C) 2007 by sinamas <sinamas at users.sourceforge.net>
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//
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// This program is free software; you can redistribute it and/or modify
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// it under the terms of the GNU General Public License version 2 as
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// published by the Free Software Foundation.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License version 2 for more details.
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//
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// You should have received a copy of the GNU General Public License
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// version 2 along with this program; if not, write to the
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// Free Software Foundation, Inc.,
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// 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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#ifndef MEMORY_H
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#define MEMORY_H
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static unsigned char const agbOverride[0xD] = { 0xFF, 0x00, 0xCD, 0x03, 0x35, 0xAA, 0x31, 0x90, 0x94, 0x00, 0x00, 0x00, 0x00 };
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#include "mem/cartridge.h"
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#include "video.h"
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#include "sound.h"
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#include "tima.h"
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#include "video.h"
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#include "newstate.h"
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#include "gambatte.h"
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@ -32,111 +32,59 @@ namespace gambatte {
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class FilterInfo;
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class Memory {
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Cartridge cart;
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unsigned char ioamhram[0x200];
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unsigned char cgbBios[0x900];
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unsigned char dmgBios[0x100];
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bool biosMode;
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bool cgbSwitching;
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bool agbMode;
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bool gbIsCgb_;
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bool stopped;
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unsigned short &SP;
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unsigned short &PC;
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unsigned long basetime;
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unsigned long halttime;
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MemoryCallback readCallback;
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MemoryCallback writeCallback;
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MemoryCallback execCallback;
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CDCallback cdCallback;
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void(*linkCallback)();
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unsigned (*getInput)();
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unsigned long divLastUpdate;
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unsigned long lastOamDmaUpdate;
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InterruptRequester intreq;
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Tima tima;
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LCD display;
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PSG sound;
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unsigned short dmaSource;
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unsigned short dmaDestination;
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unsigned char oamDmaPos;
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unsigned char serialCnt;
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bool blanklcd;
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bool LINKCABLE;
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bool linkClockTrigger;
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void decEventCycles(IntEventId eventId, unsigned long dec);
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void oamDmaInitSetup();
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void updateOamDma(unsigned long cycleCounter);
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void startOamDma(unsigned long cycleCounter);
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void endOamDma(unsigned long cycleCounter);
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const unsigned char * oamDmaSrcPtr() const;
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unsigned nontrivial_ff_read(unsigned P, unsigned long cycleCounter);
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unsigned nontrivial_read(unsigned P, unsigned long cycleCounter);
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void nontrivial_ff_write(unsigned P, unsigned data, unsigned long cycleCounter);
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void nontrivial_write(unsigned P, unsigned data, unsigned long cycleCounter);
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unsigned nontrivial_peek(unsigned P);
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unsigned nontrivial_ff_peek(unsigned P);
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void updateSerial(unsigned long cc);
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void updateTimaIrq(unsigned long cc);
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void updateIrqs(unsigned long cc);
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bool isDoubleSpeed() const { return display.isDoubleSpeed(); }
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public:
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explicit Memory(unsigned short &sp, unsigned short &pc);
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bool loaded() const { return cart.loaded(); }
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unsigned curRomBank() const { return cart.curRomBank(); }
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char const * romTitle() const { return cart.romTitle(); }
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int debugGetLY() const { return display.debugGetLY(); }
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bool loaded() const { return cart_.loaded(); }
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unsigned char curRomBank() const { return cart_.curRomBank(); }
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char const * romTitle() const { return cart_.romTitle(); }
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int debugGetLY() const { return lcd_.debugGetLY(); }
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void setStatePtrs(SaveState &state);
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void loadState(const SaveState &state/*, unsigned long oldCc*/);
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void loadSavedata(char const *data) { cart.loadSavedata(data); }
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int saveSavedataLength() {return cart.saveSavedataLength(); }
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void saveSavedata(char *dest) { cart.saveSavedata(dest); }
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void loadState(SaveState const &state);
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void loadSavedata(char const *data) { cart_.loadSavedata(data); }
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int saveSavedataLength() {return cart_.saveSavedataLength(); }
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void saveSavedata(char *dest) { cart_.saveSavedata(dest); }
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void updateInput();
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unsigned char* cgbBiosBuffer() { return (unsigned char*)cgbBios; }
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unsigned char* dmgBiosBuffer() { return (unsigned char*)dmgBios; }
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unsigned char* cgbBiosBuffer() { return (unsigned char*)cgbBios_; }
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unsigned char* dmgBiosBuffer() { return (unsigned char*)dmgBios_; }
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bool gbIsCgb() { return gbIsCgb_; }
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bool getMemoryArea(int which, unsigned char **data, int *length); // { return cart.getMemoryArea(which, data, length); }
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unsigned long stop(unsigned long cycleCounter);
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bool isCgb() const { return display.isCgb(); }
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bool ime() const { return intreq.ime(); }
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bool halted() const { return intreq.halted(); }
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unsigned long nextEventTime() const { return intreq.minEventTime(); }
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bool isCgb() const { return lcd_.isCgb(); }
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bool ime() const { return intreq_.ime(); }
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bool halted() const { return intreq_.halted(); }
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unsigned long nextEventTime() const { return intreq_.minEventTime(); }
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void setLayers(unsigned mask) { lcd_.setLayers(mask); }
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bool isActive() const { return intreq_.eventTime(intevent_end) != disabled_time; }
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void setLayers(unsigned mask) { display.setLayers(mask); }
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long cyclesSinceBlit(unsigned long cc) const {
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if (cc < intreq_.eventTime(intevent_blit))
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return -1;
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bool isActive() const { return intreq.eventTime(intevent_end) != disabled_time; }
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long cyclesSinceBlit(const unsigned long cc) const {
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return cc < intreq.eventTime(intevent_blit) ? -1 : static_cast<long>((cc - intreq.eventTime(intevent_blit)) >> isDoubleSpeed());
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return (cc - intreq_.eventTime(intevent_blit)) >> isDoubleSpeed();
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}
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void halt(unsigned long cycleCounter) { halttime = cycleCounter; intreq.halt(); }
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void ei(unsigned long cycleCounter) { if (!ime()) { intreq.ei(cycleCounter); } }
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void halt(unsigned long cycleCounter) { halttime_ = cycleCounter; intreq_.halt(); }
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void ei(unsigned long cycleCounter) { if (!ime()) { intreq_.ei(cycleCounter); } }
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void di() { intreq_.di(); }
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void di() { intreq.di(); }
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unsigned readBios(unsigned p) {
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if (gbIsCgb_) {
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if (agbMode_ && p >= 0xF3 && p < 0x100) {
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return (agbOverride[p - 0xF3] + cgbBios_[p]) & 0xFF;
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}
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return cgbBios_[p];
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}
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return dmgBios_[p];
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}
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unsigned ff_read(const unsigned P, const unsigned long cycleCounter) {
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if (readCallback)
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readCallback(P, (cycleCounter - basetime) >> 1);
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return P < 0x80 ? nontrivial_ff_read(P, cycleCounter) : ioamhram[P + 0x100];
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unsigned ff_read(unsigned p, unsigned long cc) {
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if (readCallback_)
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readCallback_(p, (cc - basetime_) >> 1);
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return p < 0x80 ? nontrivial_ff_read(p, cc) : ioamhram_[p + 0x100];
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}
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struct CDMapResult
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@ -145,30 +93,30 @@ public:
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unsigned addr;
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};
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CDMapResult CDMap(const unsigned P) const
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CDMapResult CDMap(const unsigned p) const
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{
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if(P<0x4000)
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if(p < 0x4000)
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{
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CDMapResult ret = { eCDLog_AddrType_ROM, P };
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CDMapResult ret = { eCDLog_AddrType_ROM, p };
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return ret;
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}
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else if(P<0x8000)
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else if(p < 0x8000)
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{
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unsigned bank = cart.rmem(P>>12) - cart.rmem(0);
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unsigned addr = P+bank;
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unsigned bank = cart_.rmem(p >> 12) - cart_.rmem(0);
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unsigned addr = p + bank;
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CDMapResult ret = { eCDLog_AddrType_ROM, addr };
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return ret;
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}
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else if(P<0xA000) {}
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else if(P<0xC000)
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else if(p < 0xA000) {}
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else if(p < 0xC000)
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{
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if(cart.wsrambankptr())
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if(cart_.wsrambankptr())
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{
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//not bankable. but. we're not sure how much might be here
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unsigned char *data;
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int length;
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bool has = cart.getMemoryArea(3,&data,&length);
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unsigned addr = P&(length-1);
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bool has = cart_.getMemoryArea(3,&data,&length);
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unsigned addr = p & (length-1);
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if(has && length!=0)
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{
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CDMapResult ret = { eCDLog_AddrType_CartRAM, addr };
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@ -176,14 +124,14 @@ public:
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}
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}
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}
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else if(P<0xE000)
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else if(p < 0xE000)
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{
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unsigned bank = cart.wramdata(P >> 12 & 1) - cart.wramdata(0);
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unsigned addr = (P&0xFFF)+bank;
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unsigned bank = cart_.wramdata(p >> 12 & 1) - cart_.wramdata(0);
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unsigned addr = (p & 0xFFF) + bank;
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CDMapResult ret = { eCDLog_AddrType_WRAM, addr };
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return ret;
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}
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else if(P<0xFF80) {}
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else if(p < 0xFF80) {}
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else
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{
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////this is just for debugging, really, it's pretty useless
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@ -195,157 +143,190 @@ public:
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return ret;
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}
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unsigned readBios(const unsigned P) {
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if (gbIsCgb_) {
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if (agbMode && P >= 0xF3 && P < 0x100) {
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return (agbOverride[P - 0xF3] + cgbBios[P]) & 0xFF;
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}
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return cgbBios[P];
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}
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return dmgBios[P];
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}
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unsigned read(const unsigned P, const unsigned long cycleCounter) {
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if (readCallback)
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readCallback(P, (cycleCounter - basetime) >> 1);
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bool biosRange = ((!gbIsCgb_ && P < 0x100) || (gbIsCgb_ && P < 0x900 && (P < 0x100 || P >= 0x200)));
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if(biosMode) {
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unsigned read(unsigned p, unsigned long cc) {
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if (readCallback_)
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readCallback_(p, (cc - basetime_) >> 1);
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bool biosRange = ((!gbIsCgb_ && p < 0x100) || (gbIsCgb_ && p < 0x900 && (p < 0x100 || p >= 0x200)));
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if(biosMode_) {
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if (biosRange)
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return readBios(P);
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return readBios(p);
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}
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else
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{
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if(cdCallback)
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{
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CDMapResult map = CDMap(P);
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if(map.type != eCDLog_AddrType_None)
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cdCallback(map.addr,map.type,eCDLog_Flags_Data);
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}
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else if(cdCallback_) {
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CDMapResult map = CDMap(p);
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if(map.type != eCDLog_AddrType_None)
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cdCallback_(map.addr, map.type, eCDLog_Flags_Data);
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}
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return cart.rmem(P >> 12) ? cart.rmem(P >> 12)[P] : nontrivial_read(P, cycleCounter);
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return cart_.rmem(p >> 12) ? cart_.rmem(p >> 12)[p] : nontrivial_read(p, cc);
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}
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unsigned read_excb(const unsigned P, const unsigned long cycleCounter, bool first) {
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if (execCallback)
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execCallback(P, (cycleCounter - basetime) >> 1);
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bool biosRange = ((!gbIsCgb_ && P < 0x100) || (gbIsCgb_ && P < 0x900 && (P < 0x100 || P >= 0x200)));
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if (biosMode) {
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unsigned read_excb(unsigned p, unsigned long cc, bool first) {
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if (execCallback_)
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execCallback_(p, (cc - basetime_) >> 1);
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bool biosRange = ((!gbIsCgb_ && p < 0x100) || (gbIsCgb_ && p < 0x900 && (p < 0x100 || p >= 0x200)));
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if (biosMode_) {
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if(biosRange)
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return readBios(P);
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return readBios(p);
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}
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else
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{
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if(cdCallback)
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{
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CDMapResult map = CDMap(P);
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if(map.type != eCDLog_AddrType_None)
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cdCallback(map.addr,map.type,first?eCDLog_Flags_ExecFirst : eCDLog_Flags_ExecOperand);
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}
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}
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return cart.rmem(P >> 12) ? cart.rmem(P >> 12)[P] : nontrivial_read(P, cycleCounter);
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}
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unsigned peek(const unsigned P) {
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if (biosMode && ((!gbIsCgb_ && P < 0x100) || (gbIsCgb_ && P < 0x900 && (P < 0x100 || P >= 0x200)))) {
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return readBios(P);
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}
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return cart.rmem(P >> 12) ? cart.rmem(P >> 12)[P] : nontrivial_peek(P);
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}
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void write_nocb(const unsigned P, const unsigned data, const unsigned long cycleCounter) {
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if (cart.wmem(P >> 12)) {
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cart.wmem(P >> 12)[P] = data;
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} else
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nontrivial_write(P, data, cycleCounter);
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}
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void write(const unsigned P, const unsigned data, const unsigned long cycleCounter) {
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if (cart.wmem(P >> 12)) {
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cart.wmem(P >> 12)[P] = data;
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} else
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nontrivial_write(P, data, cycleCounter);
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if (writeCallback)
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writeCallback(P, (cycleCounter - basetime) >> 1);
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if(cdCallback && !biosMode)
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{
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CDMapResult map = CDMap(P);
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else if(cdCallback_) {
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CDMapResult map = CDMap(p);
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if(map.type != eCDLog_AddrType_None)
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cdCallback(map.addr,map.type,eCDLog_Flags_Data);
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cdCallback_(map.addr, map.type, first ? eCDLog_Flags_ExecFirst : eCDLog_Flags_ExecOperand);
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}
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return cart_.rmem(p >> 12) ? cart_.rmem(p >> 12)[p] : nontrivial_read(p, cc);
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}
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unsigned peek(unsigned p) {
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bool biosRange = ((!gbIsCgb_ && p < 0x100) || (gbIsCgb_ && p < 0x900 && (p < 0x100 || p >= 0x200)));
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if (biosMode_ && biosRange) {
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return readBios(p);
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}
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return cart_.rmem(p >> 12) ? cart_.rmem(p >> 12)[p] : nontrivial_peek(p);
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}
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void write_nocb(unsigned p, unsigned data, unsigned long cc) {
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if (cart_.wmem(p >> 12)) {
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cart_.wmem(p >> 12)[p] = data;
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} else
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nontrivial_write(p, data, cc);
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}
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void write(unsigned p, unsigned data, unsigned long cc) {
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if (cart_.wmem(p >> 12)) {
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cart_.wmem(p >> 12)[p] = data;
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} else
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nontrivial_write(p, data, cc);
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if (writeCallback_)
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writeCallback_(p, (cc - basetime_) >> 1);
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if(cdCallback_ && !biosMode_) {
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CDMapResult map = CDMap(p);
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if(map.type != eCDLog_AddrType_None)
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cdCallback_(map.addr, map.type, eCDLog_Flags_Data);
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}
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}
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void ff_write(const unsigned P, const unsigned data, const unsigned long cycleCounter) {
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if (P - 0x80u < 0x7Fu) {
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ioamhram[P + 0x100] = data;
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void ff_write(unsigned p, unsigned data, unsigned long cc) {
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if (p - 0x80u < 0x7Fu) {
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ioamhram_[p + 0x100] = data;
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} else
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nontrivial_ff_write(P, data, cycleCounter);
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if (writeCallback)
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writeCallback(P, (cycleCounter - basetime) >> 1);
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if(cdCallback && !biosMode)
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nontrivial_ff_write(p, data, cc);
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if (writeCallback_)
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writeCallback_(0xff00 + p, (cc - basetime_) >> 1);
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if(cdCallback_ && !biosMode_)
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{
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CDMapResult map = CDMap(P);
|
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CDMapResult map = CDMap(0xff00 + p);
|
||||
if(map.type != eCDLog_AddrType_None)
|
||||
cdCallback(map.addr,map.type,eCDLog_Flags_Data);
|
||||
cdCallback_(map.addr, map.type, eCDLog_Flags_Data);
|
||||
}
|
||||
}
|
||||
|
||||
unsigned long event(unsigned long cycleCounter);
|
||||
unsigned long resetCounters(unsigned long cycleCounter);
|
||||
|
||||
LoadRes loadROM(char const *romfiledata, unsigned romfilelength, bool forceDmg, bool multicartCompat);
|
||||
|
||||
void setInputGetter(unsigned (*getInput)()) {
|
||||
this->getInput = getInput;
|
||||
getInput_ = getInput;
|
||||
}
|
||||
|
||||
void setReadCallback(MemoryCallback callback) {
|
||||
this->readCallback = callback;
|
||||
this->readCallback_ = callback;
|
||||
}
|
||||
void setWriteCallback(MemoryCallback callback) {
|
||||
this->writeCallback = callback;
|
||||
this->writeCallback_ = callback;
|
||||
}
|
||||
void setExecCallback(MemoryCallback callback) {
|
||||
this->execCallback = callback;
|
||||
this->execCallback_ = callback;
|
||||
}
|
||||
void setCDCallback(CDCallback cdc) {
|
||||
this->cdCallback = cdc;
|
||||
this->cdCallback_ = cdc;
|
||||
}
|
||||
|
||||
void setScanlineCallback(void (*callback)(), int sl) {
|
||||
display.setScanlineCallback(callback, sl);
|
||||
lcd_.setScanlineCallback(callback, sl);
|
||||
}
|
||||
|
||||
void setRTCCallback(std::uint32_t (*callback)()) {
|
||||
cart.setRTCCallback(callback);
|
||||
cart_.setRTCCallback(callback);
|
||||
}
|
||||
|
||||
void setLinkCallback(void(*callback)()) {
|
||||
this->linkCallback = callback;
|
||||
this->linkCallback_ = callback;
|
||||
}
|
||||
|
||||
void setBasetime(unsigned long cc) { basetime = cc; }
|
||||
void setEndtime(unsigned long cc, unsigned long inc);
|
||||
void setBasetime(unsigned long cc) { basetime_ = cc; }
|
||||
|
||||
void setSoundBuffer(uint_least32_t *const buf) { sound.setBuffer(buf); }
|
||||
void setSoundBuffer(uint_least32_t *buf) { psg_.setBuffer(buf); }
|
||||
std::size_t fillSoundBuffer(unsigned long cc);
|
||||
|
||||
void setVideoBuffer(uint_least32_t *const videoBuf, const std::ptrdiff_t pitch) {
|
||||
display.setVideoBuffer(videoBuf, pitch);
|
||||
void setVideoBuffer(uint_least32_t *videoBuf, std::ptrdiff_t pitch) {
|
||||
lcd_.setVideoBuffer(videoBuf, pitch);
|
||||
}
|
||||
|
||||
void setDmgPaletteColor(int palNum, int colorNum, unsigned long rgb32) {
|
||||
display.setDmgPaletteColor(palNum, colorNum, rgb32);
|
||||
lcd_.setDmgPaletteColor(palNum, colorNum, rgb32);
|
||||
}
|
||||
|
||||
void setCgbPalette(unsigned *lut);
|
||||
|
||||
void blackScreen() {
|
||||
display.blackScreen();
|
||||
lcd_.blackScreen();
|
||||
}
|
||||
|
||||
int linkStatus(int which);
|
||||
|
||||
private:
|
||||
Cartridge cart_;
|
||||
unsigned char ioamhram_[0x200];
|
||||
unsigned char cgbBios_[0x900];
|
||||
unsigned char dmgBios_[0x100];
|
||||
unsigned (*getInput_)();
|
||||
unsigned long divLastUpdate_;
|
||||
unsigned long lastOamDmaUpdate_;
|
||||
InterruptRequester intreq_;
|
||||
Tima tima_;
|
||||
LCD lcd_;
|
||||
PSG psg_;
|
||||
unsigned short dmaSource_;
|
||||
unsigned short dmaDestination_;
|
||||
unsigned char oamDmaPos_;
|
||||
unsigned char serialCnt_;
|
||||
bool blanklcd_;
|
||||
bool biosMode_;
|
||||
bool cgbSwitching_;
|
||||
bool agbMode_;
|
||||
bool gbIsCgb_;
|
||||
unsigned short &sp_;
|
||||
unsigned short &pc_;
|
||||
unsigned long basetime_;
|
||||
unsigned long halttime_;
|
||||
bool stopped_;
|
||||
|
||||
MemoryCallback readCallback_;
|
||||
MemoryCallback writeCallback_;
|
||||
MemoryCallback execCallback_;
|
||||
CDCallback cdCallback_;
|
||||
void(*linkCallback_)();
|
||||
bool LINKCABLE_;
|
||||
bool linkClockTrigger_;
|
||||
|
||||
void decEventCycles(IntEventId eventId, unsigned long dec);
|
||||
void oamDmaInitSetup();
|
||||
void updateOamDma(unsigned long cycleCounter);
|
||||
void startOamDma(unsigned long cycleCounter);
|
||||
void endOamDma(unsigned long cycleCounter);
|
||||
unsigned char const * oamDmaSrcPtr() const;
|
||||
unsigned nontrivial_ff_read(unsigned p, unsigned long cycleCounter);
|
||||
unsigned nontrivial_read(unsigned p, unsigned long cycleCounter);
|
||||
void nontrivial_ff_write(unsigned p, unsigned data, unsigned long cycleCounter);
|
||||
void nontrivial_write(unsigned p, unsigned data, unsigned long cycleCounter);
|
||||
unsigned nontrivial_peek(unsigned p);
|
||||
unsigned nontrivial_ff_peek(unsigned p);
|
||||
void updateSerial(unsigned long cc);
|
||||
void updateTimaIrq(unsigned long cc);
|
||||
void updateIrqs(unsigned long cc);
|
||||
bool isDoubleSpeed() const { return lcd_.isDoubleSpeed(); }
|
||||
|
||||
public:
|
||||
template<bool isReader>void SyncState(NewState *ns);
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -70,6 +70,7 @@ struct SaveState {
|
|||
unsigned long lastOamDmaUpdate;
|
||||
unsigned long minIntTime;
|
||||
unsigned long unhaltTime;
|
||||
unsigned long halttime;
|
||||
unsigned short rombank;
|
||||
unsigned short dmaSource;
|
||||
unsigned short dmaDestination;
|
||||
|
|
@ -84,6 +85,7 @@ struct SaveState {
|
|||
unsigned char /*bool*/ cgbSwitching;
|
||||
unsigned char /*bool*/ agbMode;
|
||||
unsigned char /*bool*/ gbIsCgb;
|
||||
unsigned char /*bool*/ stopped;
|
||||
} mem;
|
||||
|
||||
struct PPU {
|
||||
|
|
|
|||
Binary file not shown.
Loading…
Reference in New Issue