gpgx: make a clumsy attempt at fixing initial state determinism problems. you are advised not to view this diff.
This commit is contained in:
goyuken
parent
4bfdfd31c6
commit
ab1972fa4d
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@ -37,6 +37,16 @@ static int nsamples;
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static int vwidth;
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static int vheight;
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static uint8_t brm_format[0x40] =
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{
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0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x00,0x00,0x00,0x00,0x40,
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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0x53,0x45,0x47,0x41,0x5f,0x43,0x44,0x5f,0x52,0x4f,0x4d,0x00,0x01,0x00,0x00,0x00,
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0x52,0x41,0x4d,0x5f,0x43,0x41,0x52,0x54,0x52,0x49,0x44,0x47,0x45,0x5f,0x5f,0x5f
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};
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extern void zap(void);
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static void update_viewport(void)
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{
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vwidth = bitmap.viewport.w + (bitmap.viewport.x * 2);
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@ -168,14 +178,6 @@ GPGX_EX void gpgx_advance(void)
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}
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static uint8_t brm_format[0x40] =
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{
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0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x00,0x00,0x00,0x00,0x40,
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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0x53,0x45,0x47,0x41,0x5f,0x43,0x44,0x5f,0x52,0x4f,0x4d,0x00,0x01,0x00,0x00,0x00,
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0x52,0x41,0x4d,0x5f,0x43,0x41,0x52,0x54,0x52,0x49,0x44,0x47,0x45,0x5f,0x5f,0x5f
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};
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GPGX_EX void gpgx_clear_sram(void)
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{
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// clear sram
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@ -234,6 +236,8 @@ GPGX_EX void gpgx_get_sram(void **area, int *size, int type)
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GPGX_EX int gpgx_init(const char *feromextension, int (*feload_archive_cb)(const char *filename, unsigned char *buffer, int maxsize), int sixbutton, char system_a, char system_b)
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{
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zap();
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memset(&bitmap, 0, sizeof(bitmap));
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memset(bitmap_data_, 0, sizeof(bitmap_data_));
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@ -0,0 +1,596 @@
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#include "shared.h"
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#include "eeprom_93c.h"
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#include "eq.h"
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extern struct
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{
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uint8 enabled;
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uint8 status;
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uint8 *rom;
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uint8 *ram;
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uint16 regs[13];
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uint16 old[4];
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uint16 data[4];
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uint32 addr[4];
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} action_replay;
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typedef struct
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{
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uint8 address_bits; // number of bits needed to address memory: 7, 8 or 16 //
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uint16 size_mask; // depends on the max size of the memory (in bytes) //
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uint16 pagewrite_mask; // depends on the maximal number of bytes that can be written in a single write cycle //
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uint32 sda_in_adr; // 68000 memory address mapped to SDA_IN //
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uint32 sda_out_adr; // 68000 memory address mapped to SDA_OUT //
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uint32 scl_adr; // 68000 memory address mapped to SCL //
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uint8 sda_in_bit; // bit offset for SDA_IN //
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uint8 sda_out_bit; // bit offset for SDA_OUT //
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uint8 scl_bit; // bit offset for SCL //
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} T_CONFIG_I2C;
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typedef enum
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{
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STAND_BY = 0,
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WAIT_STOP,
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GET_SLAVE_ADR,
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GET_WORD_ADR_7BITS,
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GET_WORD_ADR_HIGH,
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GET_WORD_ADR_LOW,
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WRITE_DATA,
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READ_DATA
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} T_STATE_I2C;
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typedef struct
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{
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uint8 sda; // current /SDA line state //
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uint8 scl; // current /SCL line state //
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uint8 old_sda; // previous /SDA line state //
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uint8 old_scl; // previous /SCL line state //
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uint8 cycles; // current operation cycle number (0-9) //
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uint8 rw; // operation type (1:READ, 0:WRITE) //
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uint16 slave_mask; // device address (shifted by the memory address width)//
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uint16 word_address; // memory address //
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T_STATE_I2C state; // current operation state //
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T_CONFIG_I2C config; // EEPROM characteristics for this game //
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} T_EEPROM_I2C;
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extern T_EEPROM_I2C eeprom_i2c;
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typedef enum
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{
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STANDBY,
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GET_OPCODE_,//
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GET_ADDRESS,
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WRITE_BYTE,
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READ_BYTE
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} T_STATE_SPI;
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typedef struct
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{
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uint8 cs; // !CS line state //
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uint8 clk; // SCLK line state //
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uint8 out; // SO line state //
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uint8 status; // status register //
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uint8 opcode; // 8-bit opcode //
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uint8 buffer; // 8-bit data buffer //
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uint16 addr; // 16-bit address //
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uint32 cycles; // current operation cycle //
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T_STATE_SPI state; // current operation state //
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} T_EEPROM_SPI;
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extern T_EEPROM_SPI spi_eeprom;
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extern struct
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{
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uint8 enabled;
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uint8 *rom;
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uint16 regs[0x20];
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uint16 old[6];
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uint16 data[6];
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uint32 addr[6];
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} ggenie;
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extern struct
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{
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uint8 State;
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uint8 Counter;
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} activator[2];
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extern struct
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{
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uint8 State;
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uint8 Counter;
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uint8 Timeout;
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} gamepad[MAX_DEVICES];
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extern uint8 pad_index;
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extern struct
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{
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uint8 State;
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uint8 Port;
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} lightgun;
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extern struct
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{
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uint8 State;
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uint8 Counter;
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uint8 Wait;
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uint8 Port;
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} mouse;
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extern struct
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{
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uint8 State;
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} paddle[2];
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extern struct
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{
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uint8 State;
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uint8 Counter;
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} sportspad[2];
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extern struct
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{
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uint8 State;
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uint8 Counter;
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uint8 Table[12];
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} teamplayer[2];
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extern struct
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{
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uint8 axis;
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uint8 busy;
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} tablet;
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extern struct
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{
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uint8 State;
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uint8 Counter;
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uint8 Latency;
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} xe_a1p[2];
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typedef struct
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{
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// Configuration //
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int PreAmp[4][2]; // stereo channels pre-amplification ratio (%) //
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int NoiseFeedback;
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int SRWidth;
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// PSG registers: //
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int Registers[8]; // Tone, vol x4 //
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int LatchedRegister;
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int NoiseShiftRegister;
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int NoiseFreq; // Noise channel signal generator frequency //
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// Output calculation variables //
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int ToneFreqVals[4]; // Frequency register values (counters) //
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int ToneFreqPos[4]; // Frequency channel flip-flops //
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int Channel[4][2]; // current amplitude of each (stereo) channel //
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int ChanOut[4][2]; // current output value of each (stereo) channel //
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// Internal M-clock counter //
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unsigned long clocks;
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} SN76489_Context;
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extern SN76489_Context SN76489;
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extern int fm_buffer[1080 * 2];
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extern int fm_last[2];
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extern int *fm_ptr;
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// Cycle-accurate FM samples //
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extern uint32 fm_cycles_ratio;
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extern uint32 fm_cycles_start;
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extern uint32 fm_cycles_count;
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// YM chip function pointers //
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extern void (*YM_Reset)(void);
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extern void (*YM_Update)(int *buffer, int length);
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extern void (*YM_Write)(unsigned int a, unsigned int v);
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typedef struct
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{
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UINT32 ar; // attack rate: AR<<2 //
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UINT32 dr; // decay rate: DR<<2 //
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UINT32 rr; // release rate:RR<<2 //
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UINT8 KSR; // key scale rate //
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UINT8 ksl; // keyscale level //
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UINT8 ksr; // key scale rate: kcode>>KSR //
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UINT8 mul; // multiple: mul_tab[ML] //
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// Phase Generator //
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UINT32 phase; // frequency counter //
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UINT32 freq; // frequency counter step //
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UINT8 fb_shift; // feedback shift value //
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INT32 op1_out[2]; // slot1 output for feedback //
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// Envelope Generator //
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UINT8 eg_type; // percussive/nonpercussive mode //
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UINT8 state; // phase type //
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UINT32 TL; // total level: TL << 2 //
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INT32 TLL; // adjusted now TL //
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INT32 volume; // envelope counter //
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UINT32 sl; // sustain level: sl_tab[SL] //
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UINT8 eg_sh_dp; // (dump state) //
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UINT8 eg_sel_dp; // (dump state) //
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UINT8 eg_sh_ar; // (attack state) //
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UINT8 eg_sel_ar; // (attack state) //
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UINT8 eg_sh_dr; // (decay state) //
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UINT8 eg_sel_dr; // (decay state) //
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UINT8 eg_sh_rr; // (release state for non-perc.) //
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UINT8 eg_sel_rr; // (release state for non-perc.) //
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UINT8 eg_sh_rs; // (release state for perc.mode) //
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UINT8 eg_sel_rs; // (release state for perc.mode) //
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UINT32 key; // 0 = KEY OFF, >0 = KEY ON //
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// LFO //
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UINT32 AMmask; // LFO Amplitude Modulation enable mask //
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UINT8 vib; // LFO Phase Modulation enable flag (active high)//
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// waveform select //
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unsigned int wavetable;
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} YM2413_OPLL_SLOT;
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typedef struct
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{
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YM2413_OPLL_SLOT SLOT[2];
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// phase generator state //
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UINT32 block_fnum; // block+fnum //
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UINT32 fc; // Freq. freqement base //
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UINT32 ksl_base; // KeyScaleLevel Base step //
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UINT8 kcode; // key code (for key scaling) //
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UINT8 sus; // sus on/off (release speed in percussive mode) //
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} YM2413_OPLL_CH;
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// chip state //
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typedef struct {
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YM2413_OPLL_CH P_CH[9]; // OPLL chips have 9 channels //
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UINT8 instvol_r[9]; // instrument/volume (or volume/volume in percussive mode) //
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UINT32 eg_cnt; // global envelope generator counter //
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UINT32 eg_timer; // global envelope generator counter works at frequency = chipclock/72 //
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UINT32 eg_timer_add; // step of eg_timer //
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UINT32 eg_timer_overflow; // envelope generator timer overlfows every 1 sample (on real chip) //
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UINT8 rhythm; // Rhythm mode //
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// LFO //
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UINT32 lfo_am_cnt;
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UINT32 lfo_am_inc;
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UINT32 lfo_pm_cnt;
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UINT32 lfo_pm_inc;
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UINT32 noise_rng; // 23 bit noise shift register //
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UINT32 noise_p; // current noise 'phase' //
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UINT32 noise_f; // current noise period //
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// instrument settings //
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//
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//0-user instrument
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//1-15 - fixed instruments
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//16 -bass drum settings
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//17,18 - other percussion instruments
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//
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UINT8 inst_tab[19][8];
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UINT32 fn_tab[1024]; // fnumber->increment counter //
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UINT8 address; // address register //
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UINT8 status; // status flag //
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double clock; // master clock (Hz) //
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int rate; // sampling rate (Hz) //
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} YM2413;
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extern YM2413 ym2413;
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// struct describing a single operator (SLOT) //
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typedef struct
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{
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INT32 *DT; // detune :dt_tab[DT] //
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UINT8 KSR; // key scale rate :3-KSR //
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UINT32 ar; // attack rate //
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UINT32 d1r; // decay rate //
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UINT32 d2r; // sustain rate //
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UINT32 rr; // release rate //
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UINT8 ksr; // key scale rate :kcode>>(3-KSR) //
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UINT32 mul; // multiple :ML_TABLE[ML] //
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// Phase Generator //
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UINT32 phase; // phase counter //
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INT32 Incr; // phase step //
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// Envelope Generator //
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UINT8 state; // phase type //
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UINT32 tl; // total level: TL << 3 //
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INT32 volume; // envelope counter //
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UINT32 sl; // sustain level:sl_table[SL] //
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UINT32 vol_out; // current output from EG circuit (without AM from LFO) //
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UINT8 eg_sh_ar; // (attack state) //
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UINT8 eg_sel_ar; // (attack state) //
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UINT8 eg_sh_d1r; // (decay state) //
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UINT8 eg_sel_d1r; // (decay state) //
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UINT8 eg_sh_d2r; // (sustain state) //
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UINT8 eg_sel_d2r; // (sustain state) //
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UINT8 eg_sh_rr; // (release state) //
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UINT8 eg_sel_rr; // (release state) //
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UINT8 ssg; // SSG-EG waveform //
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UINT8 ssgn; // SSG-EG negated output //
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UINT8 key; // 0=last key was KEY OFF, 1=KEY ON //
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// LFO //
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UINT32 AMmask; // AM enable flag //
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} FM_SLOT;
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typedef struct
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{
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FM_SLOT SLOT[4]; // four SLOTs (operators) //
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UINT8 ALGO; // algorithm //
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UINT8 FB; // feedback shift //
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INT32 op1_out[2]; // op1 output for feedback //
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INT32 *connect1; // SLOT1 output pointer //
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INT32 *connect3; // SLOT3 output pointer //
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INT32 *connect2; // SLOT2 output pointer //
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INT32 *connect4; // SLOT4 output pointer //
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INT32 *mem_connect; // where to put the delayed sample (MEM) //
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INT32 mem_value; // delayed sample (MEM) value //
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INT32 pms; // channel PMS //
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UINT8 ams; // channel AMS //
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UINT32 fc; // fnum,blk //
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UINT8 kcode; // key code //
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UINT32 block_fnum; // blk/fnum value (for LFO PM calculations) //
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} FM_CH;
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typedef struct
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{
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UINT16 address; // address register //
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UINT8 status; // status flag //
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UINT32 mode; // mode CSM / 3SLOT //
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UINT8 fn_h; // freq latch //
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INT32 TA; // timer a value //
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INT32 TAL; // timer a base //
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INT32 TAC; // timer a counter //
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INT32 TB; // timer b value //
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INT32 TBL; // timer b base //
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INT32 TBC; // timer b counter //
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INT32 dt_tab[8][32]; // DeTune table //
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} FM_ST;
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// OPN unit //
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// OPN 3slot struct //
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typedef struct
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{
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UINT32 fc[3]; // fnum3,blk3: calculated //
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UINT8 fn_h; // freq3 latch //
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UINT8 kcode[3]; // key code //
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UINT32 block_fnum[3]; // current fnum value for this slot (can be different betweeen slots of one channel in 3slot mode) //
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UINT8 key_csm; // CSM mode Key-ON flag //
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} FM_3SLOT;
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// OPN/A/B common state //
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typedef struct
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{
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FM_ST ST; // general state //
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FM_3SLOT SL3; // 3 slot mode state //
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unsigned int pan[6*2]; // fm channels output masks (0xffffffff = enable) //
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// EG //
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UINT32 eg_cnt; // global envelope generator counter //
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UINT32 eg_timer; // global envelope generator counter works at frequency = chipclock/144/3 //
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// LFO //
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UINT8 lfo_cnt; // current LFO phase (out of 128) //
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UINT32 lfo_timer; // current LFO phase runs at LFO frequency //
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UINT32 lfo_timer_overflow; // LFO timer overflows every N samples (depends on LFO frequency) //
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UINT32 LFO_AM; // current LFO AM step //
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UINT32 LFO_PM; // current LFO PM step //
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} FM_OPN;
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// YM2612 chip //
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typedef struct
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{
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FM_CH CH[6]; // channel state //
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UINT8 dacen; // DAC mode //
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INT32 dacout; // DAC output //
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FM_OPN OPN; // OPN state //
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} YM2612;
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extern YM2612 ym2612;
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// current chip state //
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extern INT32 m2,c1,c2; // Phase Modulation input for operators 2,3,4 //
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extern INT32 mem; // one sample delay memory //
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extern INT32 out_fm[8]; // outputs of working channels //
|
||||
extern UINT32 bitmask; // working channels output bitmasking (DAC quantization) //
|
||||
|
||||
extern uint8 tmss[4]; // TMSS security register //
|
||||
|
||||
extern uint8 rom_region;
|
||||
|
||||
extern uint8 pause_b;
|
||||
extern EQSTATE eq;
|
||||
extern int16 llp,rrp;
|
||||
|
||||
|
||||
|
||||
#define Z(a) memset((a), 0, sizeof(*(a)))
|
||||
#define Y(a) memset((a), 0, sizeof((a)))
|
||||
|
||||
void zap(void)
|
||||
{
|
||||
Z(&config);
|
||||
Z(&eeprom_93c);
|
||||
|
||||
Z(&ext);
|
||||
Y(boot_rom);
|
||||
Y(work_ram);
|
||||
Y(zram);
|
||||
Z(&zbank);
|
||||
Z(&zstate);
|
||||
Z(&pico_current);
|
||||
Z(&input);
|
||||
memset(old_system, -1, sizeof(old_system));
|
||||
Y(io_reg);
|
||||
Z(®ion_code);
|
||||
Z(&rominfo);
|
||||
Z(&romtype);
|
||||
Z(&m68k);
|
||||
Z(&s68k);
|
||||
|
||||
Y(zbank_memory_map);
|
||||
|
||||
Z(&sram); // NB: sram.sram is not allocated
|
||||
|
||||
Z(&svp);
|
||||
|
||||
Z(&bitmap);
|
||||
Z(&snd);
|
||||
Z(&mcycles_vdp);
|
||||
Z(&SVP_cycles);
|
||||
Z(&system_hw);
|
||||
Z(&system_bios);
|
||||
Z(&system_clock);
|
||||
|
||||
Y(reg);
|
||||
Y(sat);
|
||||
Y(vram);
|
||||
Y(cram);
|
||||
Y(vsram);
|
||||
Z(&hint_pending);
|
||||
Z(&vint_pending);
|
||||
Z(&status);
|
||||
Z(&dma_length);
|
||||
|
||||
Z(&ntab);
|
||||
Z(&ntbb);
|
||||
Z(&ntwb);
|
||||
Z(&satb);
|
||||
Z(&hscb);
|
||||
Y(bg_name_dirty);
|
||||
Y(bg_name_list);
|
||||
Z(&bg_list_index);
|
||||
Z(&hscroll_mask);
|
||||
Z(&playfield_shift);
|
||||
Z(&playfield_col_mask);
|
||||
Z(&playfield_row_mask);
|
||||
Z(&odd_frame);
|
||||
Z(&im2_flag);
|
||||
Z(&interlaced);
|
||||
Z(&vdp_pal);
|
||||
Z(&v_counter);
|
||||
Z(&vc_max);
|
||||
Z(&vscroll);
|
||||
Z(&lines_per_frame);
|
||||
Z(&max_sprite_pixels);
|
||||
Z(&fifo_write_cnt);
|
||||
Z(&fifo_slots);
|
||||
Z(&hvc_latch);
|
||||
Z(&hctab);
|
||||
|
||||
Z(&vdp_68k_data_w);
|
||||
Z(&vdp_z80_data_w);
|
||||
Z(&vdp_68k_data_r);
|
||||
Z(&vdp_z80_data_r);
|
||||
|
||||
Z(&spr_col);
|
||||
|
||||
Z(&Z80);
|
||||
|
||||
Y(z80_readmap);
|
||||
Y(z80_writemap);
|
||||
|
||||
Z(&z80_writemem);
|
||||
Z(&z80_readmem);
|
||||
Z(&z80_writeport);
|
||||
Z(&z80_readport);
|
||||
|
||||
//=======
|
||||
|
||||
Z(&action_replay);
|
||||
|
||||
Z(&eeprom_i2c);
|
||||
Z(&spi_eeprom);
|
||||
|
||||
Z(&ggenie);
|
||||
|
||||
Y(activator);
|
||||
|
||||
Y(gamepad);
|
||||
|
||||
Z(&pad_index);
|
||||
|
||||
|
||||
Z(&lightgun);
|
||||
|
||||
Z(&mouse);
|
||||
|
||||
Y(paddle);
|
||||
|
||||
Y(sportspad);
|
||||
|
||||
Y(teamplayer);
|
||||
|
||||
Z(&tablet);
|
||||
|
||||
Y(xe_a1p);
|
||||
|
||||
Z(&SN76489);
|
||||
|
||||
Y(fm_buffer);
|
||||
Y(fm_last);
|
||||
Z(&fm_ptr);
|
||||
|
||||
Z(&fm_cycles_ratio);
|
||||
Z(&fm_cycles_start);
|
||||
Z(&fm_cycles_count);
|
||||
|
||||
Z(&YM_Reset);
|
||||
Z(&YM_Update);
|
||||
Z(&YM_Write);
|
||||
|
||||
Z(&ym2413);
|
||||
|
||||
Z(&ym2612);
|
||||
|
||||
Z(&m2);
|
||||
Z(&c1);
|
||||
Z(&c2);
|
||||
Z(&mem);
|
||||
Y(out_fm);
|
||||
Z(&bitmask);
|
||||
|
||||
Y(tmss);
|
||||
|
||||
Z(&rom_region);
|
||||
|
||||
Z(&pause_b);
|
||||
Z(&eq);
|
||||
Z(&llp);
|
||||
Z(&rrp);
|
||||
|
||||
}
|
||||
|
||||
|
|
@ -41,7 +41,7 @@
|
|||
#define TYPE_PRO1 0x12
|
||||
#define TYPE_PRO2 0x22
|
||||
|
||||
static struct
|
||||
struct
|
||||
{
|
||||
uint8 enabled;
|
||||
uint8 status;
|
||||
|
|
|
|||
|
|
@ -149,7 +149,7 @@ static const T_GAME_ENTRY database[GAME_CNT] =
|
|||
{{"T-120146-50"}, 0, {16, 0x1FFF, 0x1FFF, 0x300000, 0x380001, 0x300000, 0, 7, 1}} /* Brian Lara Cricket 96, Shane Warne Cricket */
|
||||
};
|
||||
|
||||
static T_EEPROM_I2C eeprom_i2c;
|
||||
T_EEPROM_I2C eeprom_i2c;
|
||||
|
||||
static unsigned int eeprom_i2c_read_byte(unsigned int address);
|
||||
static unsigned int eeprom_i2c_read_word(unsigned int address);
|
||||
|
|
|
|||
|
|
@ -70,7 +70,7 @@ typedef struct
|
|||
T_STATE_SPI state; /* current operation state */
|
||||
} T_EEPROM_SPI;
|
||||
|
||||
static T_EEPROM_SPI spi_eeprom;
|
||||
T_EEPROM_SPI spi_eeprom;
|
||||
|
||||
void eeprom_spi_init()
|
||||
{
|
||||
|
|
|
|||
|
|
@ -41,7 +41,7 @@
|
|||
|
||||
#include "shared.h"
|
||||
|
||||
static struct
|
||||
struct
|
||||
{
|
||||
uint8 enabled;
|
||||
uint8 *rom;
|
||||
|
|
|
|||
|
|
@ -37,12 +37,6 @@
|
|||
****************************************************************************************/
|
||||
#include "shared.h"
|
||||
|
||||
#ifdef USE_LIBTREMOR
|
||||
#define SUPPORTED_EXT 20
|
||||
#else
|
||||
#define SUPPORTED_EXT 10
|
||||
#endif
|
||||
|
||||
/* BCD conversion lookup tables */
|
||||
static const uint8 lut_BCD_8[100] =
|
||||
{
|
||||
|
|
|
|||
|
|
@ -49,7 +49,7 @@ uint32 zbank; /* Z80 bank window address */
|
|||
uint8 zstate; /* Z80 bus state (d0 = BUSACK, d1 = /RESET) */
|
||||
uint8 pico_current; /* PICO current page */
|
||||
|
||||
static uint8 tmss[4]; /* TMSS security register */
|
||||
uint8 tmss[4]; /* TMSS security register */
|
||||
|
||||
/*--------------------------------------------------------------------------*/
|
||||
/* Init, reset, shutdown functions */
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
|
||||
#include "shared.h"
|
||||
|
||||
static struct
|
||||
struct
|
||||
{
|
||||
uint8 State;
|
||||
uint8 Counter;
|
||||
|
|
|
|||
|
|
@ -40,14 +40,14 @@
|
|||
#include "shared.h"
|
||||
#include "gamepad.h"
|
||||
|
||||
static struct
|
||||
struct
|
||||
{
|
||||
uint8 State;
|
||||
uint8 Counter;
|
||||
uint8 Timeout;
|
||||
} gamepad[MAX_DEVICES];
|
||||
|
||||
static uint8 pad_index;
|
||||
uint8 pad_index;
|
||||
|
||||
|
||||
void gamepad_reset(int port)
|
||||
|
|
|
|||
|
|
@ -83,7 +83,7 @@ static const uint8 hc_320[210] =
|
|||
0xFE, 0xFF
|
||||
};
|
||||
|
||||
static struct
|
||||
struct
|
||||
{
|
||||
uint8 State;
|
||||
uint8 Port;
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
|
||||
#include "shared.h"
|
||||
|
||||
static struct
|
||||
struct
|
||||
{
|
||||
uint8 State;
|
||||
uint8 Counter;
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
|
||||
#include "shared.h"
|
||||
|
||||
static struct
|
||||
struct
|
||||
{
|
||||
uint8 State;
|
||||
} paddle[2];
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
|
||||
#include "shared.h"
|
||||
|
||||
static struct
|
||||
struct
|
||||
{
|
||||
uint8 State;
|
||||
uint8 Counter;
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
|
||||
#include "shared.h"
|
||||
|
||||
static struct
|
||||
struct
|
||||
{
|
||||
uint8 State;
|
||||
uint8 Counter;
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
|
||||
#include "shared.h"
|
||||
|
||||
static struct
|
||||
struct
|
||||
{
|
||||
uint8 axis;
|
||||
uint8 busy;
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
|
||||
#include "shared.h"
|
||||
|
||||
static struct
|
||||
struct
|
||||
{
|
||||
uint8 State;
|
||||
uint8 Counter;
|
||||
|
|
|
|||
|
|
@ -92,7 +92,7 @@ typedef struct
|
|||
ROMINFO rominfo;
|
||||
uint8 romtype;
|
||||
|
||||
static uint8 rom_region;
|
||||
uint8 rom_region;
|
||||
|
||||
/***************************************************************************
|
||||
* Genesis ROM Manufacturers
|
||||
|
|
|
|||
|
|
@ -92,7 +92,7 @@ static const uint16 PSGVolumeValues[16] =
|
|||
1516,1205,957,760,603,479,381,303,240,191,152,120,96,76,60,0
|
||||
};
|
||||
|
||||
static SN76489_Context SN76489;
|
||||
SN76489_Context SN76489;
|
||||
|
||||
static blip_t* blip[2];
|
||||
|
||||
|
|
|
|||
|
|
@ -41,19 +41,19 @@
|
|||
#include "blip_buf.h"
|
||||
|
||||
/* FM output buffer (large enough to hold a whole frame at original chips rate) */
|
||||
static int fm_buffer[1080 * 2];
|
||||
static int fm_last[2];
|
||||
static int *fm_ptr;
|
||||
int fm_buffer[1080 * 2];
|
||||
int fm_last[2];
|
||||
int *fm_ptr;
|
||||
|
||||
/* Cycle-accurate FM samples */
|
||||
static uint32 fm_cycles_ratio;
|
||||
static uint32 fm_cycles_start;
|
||||
static uint32 fm_cycles_count;
|
||||
uint32 fm_cycles_ratio;
|
||||
uint32 fm_cycles_start;
|
||||
uint32 fm_cycles_count;
|
||||
|
||||
/* YM chip function pointers */
|
||||
static void (*YM_Reset)(void);
|
||||
static void (*YM_Update)(int *buffer, int length);
|
||||
static void (*YM_Write)(unsigned int a, unsigned int v);
|
||||
void (*YM_Reset)(void);
|
||||
void (*YM_Update)(int *buffer, int length);
|
||||
void (*YM_Write)(unsigned int a, unsigned int v);
|
||||
|
||||
/* Run FM chip until required M-cycles */
|
||||
INLINE void fm_update(unsigned int cycles)
|
||||
|
|
|
|||
|
|
@ -502,7 +502,7 @@ static UINT32 LFO_AM;
|
|||
static INT32 LFO_PM;
|
||||
|
||||
/* emulated chip */
|
||||
static YM2413 ym2413;
|
||||
YM2413 ym2413;
|
||||
|
||||
/* advance LFO to next sample */
|
||||
INLINE void advance_lfo(void)
|
||||
|
|
|
|||
|
|
@ -607,13 +607,13 @@ typedef struct
|
|||
} YM2612;
|
||||
|
||||
/* emulated chip */
|
||||
static YM2612 ym2612;
|
||||
YM2612 ym2612;
|
||||
|
||||
/* current chip state */
|
||||
static INT32 m2,c1,c2; /* Phase Modulation input for operators 2,3,4 */
|
||||
static INT32 mem; /* one sample delay memory */
|
||||
static INT32 out_fm[8]; /* outputs of working channels */
|
||||
static UINT32 bitmask; /* working channels output bitmasking (DAC quantization) */
|
||||
INT32 m2,c1,c2; /* Phase Modulation input for operators 2,3,4 */
|
||||
INT32 mem; /* one sample delay memory */
|
||||
INT32 out_fm[8]; /* outputs of working channels */
|
||||
UINT32 bitmask; /* working channels output bitmasking (DAC quantization) */
|
||||
|
||||
|
||||
INLINE void FM_KEYON(FM_CH *CH , int s )
|
||||
|
|
|
|||
|
|
@ -51,9 +51,9 @@ uint8 system_bios;
|
|||
uint32 system_clock;
|
||||
int16 SVP_cycles = 800;
|
||||
|
||||
static uint8 pause_b;
|
||||
static EQSTATE eq;
|
||||
static int16 llp,rrp;
|
||||
uint8 pause_b;
|
||||
EQSTATE eq;
|
||||
int16 llp,rrp;
|
||||
|
||||
/******************************************************************************************/
|
||||
/* Audio subsystem */
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@
|
|||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
<ClCompile Include="..\..\..\cinterface\cinterface.c" />
|
||||
<ClCompile Include="..\..\..\cinterface\zap.c" />
|
||||
<ClCompile Include="..\..\..\core\cart_hw\areplay.c" />
|
||||
<ClCompile Include="..\..\..\core\cart_hw\eeprom_93c.c" />
|
||||
<ClCompile Include="..\..\..\core\cart_hw\eeprom_i2c.c" />
|
||||
|
|
@ -61,6 +62,73 @@
|
|||
<ClCompile Include="..\..\..\core\z80\z80.c" />
|
||||
<ClCompile Include="..\..\scrc32.c" />
|
||||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
<ClInclude Include="..\..\..\core\cart_hw\areplay.h" />
|
||||
<ClInclude Include="..\..\..\core\cart_hw\eeprom_93c.h" />
|
||||
<ClInclude Include="..\..\..\core\cart_hw\eeprom_i2c.h" />
|
||||
<ClInclude Include="..\..\..\core\cart_hw\eeprom_spi.h" />
|
||||
<ClInclude Include="..\..\..\core\cart_hw\ggenie.h" />
|
||||
<ClInclude Include="..\..\..\core\cart_hw\md_cart.h" />
|
||||
<ClInclude Include="..\..\..\core\cart_hw\sms_cart.h" />
|
||||
<ClInclude Include="..\..\..\core\cart_hw\sram.h" />
|
||||
<ClInclude Include="..\..\..\core\cart_hw\svp\ssp16.h" />
|
||||
<ClInclude Include="..\..\..\core\cart_hw\svp\svp.h" />
|
||||
<ClInclude Include="..\..\..\core\cd_hw\cdc.h" />
|
||||
<ClInclude Include="..\..\..\core\cd_hw\cdd.h" />
|
||||
<ClInclude Include="..\..\..\core\cd_hw\cd_cart.h" />
|
||||
<ClInclude Include="..\..\..\core\cd_hw\gfx.h" />
|
||||
<ClInclude Include="..\..\..\core\cd_hw\pcm.h" />
|
||||
<ClInclude Include="..\..\..\core\cd_hw\scd.h" />
|
||||
<ClInclude Include="..\..\..\core\genesis.h" />
|
||||
<ClInclude Include="..\..\..\core\hvc.h" />
|
||||
<ClInclude Include="..\..\..\core\input_hw\activator.h" />
|
||||
<ClInclude Include="..\..\..\core\input_hw\gamepad.h" />
|
||||
<ClInclude Include="..\..\..\core\input_hw\input.h" />
|
||||
<ClInclude Include="..\..\..\core\input_hw\lightgun.h" />
|
||||
<ClInclude Include="..\..\..\core\input_hw\mouse.h" />
|
||||
<ClInclude Include="..\..\..\core\input_hw\paddle.h" />
|
||||
<ClInclude Include="..\..\..\core\input_hw\sportspad.h" />
|
||||
<ClInclude Include="..\..\..\core\input_hw\teamplayer.h" />
|
||||
<ClInclude Include="..\..\..\core\input_hw\terebi_oekaki.h" />
|
||||
<ClInclude Include="..\..\..\core\input_hw\xe_a1p.h" />
|
||||
<ClInclude Include="..\..\..\core\io_ctrl.h" />
|
||||
<ClInclude Include="..\..\..\core\loadrom.h" />
|
||||
<ClInclude Include="..\..\..\core\m68k\m68k.h" />
|
||||
<ClInclude Include="..\..\..\core\m68k\m68kconf.h" />
|
||||
<ClInclude Include="..\..\..\core\m68k\m68kcpu.h" />
|
||||
<ClInclude Include="..\..\..\core\m68k\m68ki_cycles.h" />
|
||||
<ClInclude Include="..\..\..\core\m68k\m68ki_instruction_jump_table.h" />
|
||||
<ClInclude Include="..\..\..\core\m68k\m68kops.h" />
|
||||
<ClInclude Include="..\..\..\core\m68k\s68kconf.h" />
|
||||
<ClInclude Include="..\..\..\core\m68k\s68ki_cycles.h" />
|
||||
<ClInclude Include="..\..\..\core\macros.h" />
|
||||
<ClInclude Include="..\..\..\core\mem68k.h" />
|
||||
<ClInclude Include="..\..\..\core\membnk.h" />
|
||||
<ClInclude Include="..\..\..\core\memz80.h" />
|
||||
<ClInclude Include="..\..\..\core\ntsc\md_ntsc.h" />
|
||||
<ClInclude Include="..\..\..\core\ntsc\md_ntsc_config.h" />
|
||||
<ClInclude Include="..\..\..\core\ntsc\md_ntsc_impl.h" />
|
||||
<ClInclude Include="..\..\..\core\shared.h" />
|
||||
<ClInclude Include="..\..\..\core\sound\blip_buf.h" />
|
||||
<ClInclude Include="..\..\..\core\sound\eq.h" />
|
||||
<ClInclude Include="..\..\..\core\sound\sn76489.h" />
|
||||
<ClInclude Include="..\..\..\core\sound\sound.h" />
|
||||
<ClInclude Include="..\..\..\core\sound\ym2413.h" />
|
||||
<ClInclude Include="..\..\..\core\sound\ym2612.h" />
|
||||
<ClInclude Include="..\..\..\core\state.h" />
|
||||
<ClInclude Include="..\..\..\core\system.h" />
|
||||
<ClInclude Include="..\..\..\core\types.h" />
|
||||
<ClInclude Include="..\..\..\core\vdp_ctrl.h" />
|
||||
<ClInclude Include="..\..\..\core\vdp_render.h" />
|
||||
<ClInclude Include="..\..\..\core\z80\osd_cpu.h" />
|
||||
<ClInclude Include="..\..\..\core\z80\z80.h" />
|
||||
<ClInclude Include="..\..\..\gx\config.h" />
|
||||
<ClInclude Include="..\..\..\gx\gui\cheats.h" />
|
||||
<ClInclude Include="..\..\..\gx\gui\saveicon.h" />
|
||||
<ClInclude Include="..\..\..\sdl\config.h" />
|
||||
<ClInclude Include="..\..\..\sdl\error.h" />
|
||||
<ClInclude Include="..\..\libretro.h" />
|
||||
</ItemGroup>
|
||||
<PropertyGroup Label="Globals">
|
||||
<ProjectGuid>{29DF2EE7-2930-4BD3-8AC5-81A2534ACC99}</ProjectGuid>
|
||||
<Keyword>Win32Proj</Keyword>
|
||||
|
|
|
|||
|
|
@ -192,5 +192,205 @@
|
|||
<ClCompile Include="..\..\scrc32.c">
|
||||
<Filter>Source Files\libretro</Filter>
|
||||
</ClCompile>
|
||||
<ClCompile Include="..\..\..\cinterface\zap.c">
|
||||
<Filter>Source Files\cinterface</Filter>
|
||||
</ClCompile>
|
||||
</ItemGroup>
|
||||
<ItemGroup>
|
||||
<ClInclude Include="..\..\..\core\cd_hw\cdd.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\input_hw\activator.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\sound\blip_buf.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
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|
||||
<Filter>Header Files</Filter>
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||||
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||||
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||||
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||||
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||||
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||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\input_hw\gamepad.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\genesis.h">
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||||
<Filter>Header Files</Filter>
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||||
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||||
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||||
<Filter>Header Files</Filter>
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||||
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||||
<ClInclude Include="..\..\..\core\input_hw\input.h">
|
||||
<Filter>Header Files</Filter>
|
||||
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|
||||
<ClInclude Include="..\..\..\core\input_hw\lightgun.h">
|
||||
<Filter>Header Files</Filter>
|
||||
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||||
<ClInclude Include="..\..\..\core\m68k\m68k.h">
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||||
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|
||||
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<ClInclude Include="..\..\..\core\m68k\m68kconf.h">
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||||
<Filter>Header Files</Filter>
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
<Filter>Header Files</Filter>
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||||
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<Filter>Header Files</Filter>
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||||
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||||
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||||
<Filter>Header Files</Filter>
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||||
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||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
<ClInclude Include="..\..\..\core\memz80.h">
|
||||
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|
||||
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||||
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|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\z80\osd_cpu.h">
|
||||
<Filter>Header Files</Filter>
|
||||
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|
||||
<ClInclude Include="..\..\..\core\input_hw\paddle.h">
|
||||
<Filter>Header Files</Filter>
|
||||
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|
||||
<ClInclude Include="..\..\..\core\m68k\s68kconf.h">
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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||||
<ClInclude Include="..\..\..\core\sound\sound.h">
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||||
<Filter>Header Files</Filter>
|
||||
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||||
<ClInclude Include="..\..\..\core\input_hw\sportspad.h">
|
||||
<Filter>Header Files</Filter>
|
||||
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|
||||
<ClInclude Include="..\..\..\core\state.h">
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||||
<Filter>Header Files</Filter>
|
||||
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||||
<ClInclude Include="..\..\..\core\system.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\input_hw\teamplayer.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\input_hw\terebi_oekaki.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\types.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\vdp_ctrl.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\vdp_render.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\input_hw\xe_a1p.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\sound\ym2413.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\sound\ym2612.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\z80\z80.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\cart_hw\areplay.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\cd_hw\cd_cart.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\cd_hw\cdc.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\sdl\config.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\cart_hw\eeprom_93c.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\cart_hw\eeprom_i2c.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\cart_hw\eeprom_spi.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\sdl\error.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\cd_hw\gfx.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\cart_hw\ggenie.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\io_ctrl.h">
|
||||
<Filter>Header Files</Filter>
|
||||
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|
||||
<ClInclude Include="..\..\libretro.h">
|
||||
<Filter>Header Files</Filter>
|
||||
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|
||||
<ClInclude Include="..\..\..\core\loadrom.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\cart_hw\md_cart.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\cd_hw\pcm.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\cd_hw\scd.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\cart_hw\sms_cart.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\cart_hw\sram.h">
|
||||
<Filter>Header Files</Filter>
|
||||
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|
||||
<ClInclude Include="..\..\..\core\cart_hw\svp\ssp16.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
<ClInclude Include="..\..\..\core\cart_hw\svp\svp.h">
|
||||
<Filter>Header Files</Filter>
|
||||
</ClInclude>
|
||||
</ItemGroup>
|
||||
</Project>
|
||||
Binary file not shown.
Loading…
Reference in New Issue