From a818710589924916fcb4981ff0ed531c94d4d832 Mon Sep 17 00:00:00 2001 From: goyuken Date: Sun, 15 Dec 2013 20:51:57 +0000 Subject: [PATCH] http://www.youtube.com/watch?v=V3w2saj52fI --- BizHawk.Client.EmuHawk/MainForm.cs | 7 +- .../BizHawk.Emulation.Cores.csproj | 2 + .../Consoles/Sega/gpgx/GPGX.cs | 280 + .../Consoles/Sega/gpgx/LibGPGX.cs | 27 + genplus-gx/HISTORY.txt | 1023 + genplus-gx/LICENSE.txt | 621 + genplus-gx/Makefile.gc | 148 + genplus-gx/Makefile.libretro | 235 + genplus-gx/Makefile.wii | 148 + genplus-gx/cinterface/cinterface.c | 175 + genplus-gx/core/cart_hw/areplay.c | 319 + genplus-gx/core/cart_hw/areplay.h | 52 + genplus-gx/core/cart_hw/eeprom_93c.c | 249 + genplus-gx/core/cart_hw/eeprom_93c.h | 72 + genplus-gx/core/cart_hw/eeprom_i2c.c | 621 + genplus-gx/core/cart_hw/eeprom_i2c.h | 45 + genplus-gx/core/cart_hw/eeprom_spi.c | 358 + genplus-gx/core/cart_hw/eeprom_spi.h | 47 + genplus-gx/core/cart_hw/ggenie.c | 283 + genplus-gx/core/cart_hw/ggenie.h | 51 + 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genplus-gx/sdl/md.ico create mode 100644 genplus-gx/sdl/osd.h create mode 100644 genplus-gx/sdl/readme-sdl.txt create mode 100644 genplus-gx/sdl/unzip.c create mode 100644 genplus-gx/sdl/unzip.h create mode 100644 output/dll/libgenplusgx.dll diff --git a/BizHawk.Client.EmuHawk/MainForm.cs b/BizHawk.Client.EmuHawk/MainForm.cs index 0069e9a6a1..ba260f7245 100644 --- a/BizHawk.Client.EmuHawk/MainForm.cs +++ b/BizHawk.Client.EmuHawk/MainForm.cs @@ -3219,8 +3219,11 @@ namespace BizHawk.Client.EmuHawk nextEmulator = new PCEngine(nextComm, game, rom.RomData); break; case "GEN": - nextEmulator = new Genesis(nextComm, game, rom.RomData); - break; + { + //nextEmulator = new Genesis(nextComm, game, rom.RomData); + nextEmulator = new BizHawk.Emulation.Cores.Consoles.Sega.gpgx.GPGX(nextComm, rom.RomData, "GEN"); + break; + } case "TI83": nextEmulator = new TI83(nextComm, game, rom.RomData); if (Global.Config.TI83autoloadKeyPad) diff --git a/BizHawk.Emulation.Cores/BizHawk.Emulation.Cores.csproj b/BizHawk.Emulation.Cores/BizHawk.Emulation.Cores.csproj index ba6064dafa..c3fe608365 100644 --- a/BizHawk.Emulation.Cores/BizHawk.Emulation.Cores.csproj +++ b/BizHawk.Emulation.Cores/BizHawk.Emulation.Cores.csproj @@ -408,6 +408,8 @@ + + diff --git a/BizHawk.Emulation.Cores/Consoles/Sega/gpgx/GPGX.cs b/BizHawk.Emulation.Cores/Consoles/Sega/gpgx/GPGX.cs new file mode 100644 index 0000000000..89bbe4f05c --- /dev/null +++ b/BizHawk.Emulation.Cores/Consoles/Sega/gpgx/GPGX.cs @@ -0,0 +1,280 @@ +using System; +using System.Collections.Generic; +using System.Linq; +using System.Text; + +using BizHawk.Common; +using BizHawk.Emulation.Common; + +using System.Runtime.InteropServices; + + +namespace BizHawk.Emulation.Cores.Consoles.Sega.gpgx +{ + public class GPGX : IEmulator, ISyncSoundProvider, IVideoProvider + { + static GPGX AttachedCore = null; + + byte[] romfile; + + bool disposed = false; + + LibGPGX.load_archive_cb LoadCallback = null; + + public GPGX(CoreComm NextComm, byte[] romfile, string romextension) + { + try + { + CoreComm = NextComm; + if (AttachedCore != null) + { + AttachedCore.Dispose(); + AttachedCore = null; + } + AttachedCore = this; + + MemoryDomains = MemoryDomainList.GetDummyList(); + + LoadCallback = new LibGPGX.load_archive_cb(load_archive); + + this.romfile = romfile; + + if (!LibGPGX.gpgx_init(romextension, LoadCallback)) + throw new Exception("gpgx_init() failed"); + } + catch + { + Dispose(); + throw; + } + } + + /// + /// core callback for file loading + /// + /// string identifying file to be loaded + /// buffer to load file to + /// maximum length buffer can hold + /// actual size loaded, or 0 on failure + int load_archive(string filename, IntPtr buffer, int maxsize) + { + byte[] srcdata = null; + + if (buffer == IntPtr.Zero) + { + Console.WriteLine("Couldn't satisfy firmware request {0} because buffer == NULL", filename); + return 0; + } + + if (filename == "PRIMARY_ROM") + srcdata = romfile; + else + { + // use corecomm for firmware requests + } + + if (srcdata != null) + { + if (srcdata.Length > maxsize) + { + Console.WriteLine("Couldn't satisfy firmware request {0} because {1} > {2}", filename, srcdata.Length, maxsize); + return 0; + } + else + { + Marshal.Copy(srcdata, 0, buffer, srcdata.Length); + Console.WriteLine("Firmware request {0} satisfied at size {1}", filename, srcdata.Length); + return srcdata.Length; + } + } + else + { + Console.WriteLine("Couldn't satisfy firmware request {0} for unknown reasons", filename); + return 0; + } + + } + + #region controller + + public ControllerDefinition ControllerDefinition { get { return NullEmulator.NullController; } } + public IController Controller { get; set; } + + #endregion + + public void FrameAdvance(bool render, bool rendersound = true) + { + IsLagFrame = true; + Frame++; + LibGPGX.gpgx_advance(); + update_video(); + update_audio(); + } + + public int Frame { get; private set; } + public int LagCount { get; set; } + public bool IsLagFrame { get; private set; } + + public string SystemId { get { return "GEN"; } } + public bool DeterministicEmulation { get { return true; } } + public string BoardName { get { return null; } } + + public CoreComm CoreComm { get; private set; } + + #region saveram + + public byte[] ReadSaveRam() + { + throw new NotImplementedException(); + } + + public void StoreSaveRam(byte[] data) + { + throw new NotImplementedException(); + } + + public void ClearSaveRam() + { + throw new NotImplementedException(); + } + + public bool SaveRamModified + { + get + { + return false; + } + set + { + throw new NotImplementedException(); + } + } + + #endregion + + public void ResetCounters() + { + Frame = 0; + IsLagFrame = false; + LagCount = 0; + } + + #region savestates + + public void SaveStateText(System.IO.TextWriter writer) + { + } + + public void LoadStateText(System.IO.TextReader reader) + { + } + + public void SaveStateBinary(System.IO.BinaryWriter writer) + { + } + + public void LoadStateBinary(System.IO.BinaryReader reader) + { + } + + public byte[] SaveStateBinary() + { + return new byte[0]; + } + + public bool BinarySaveStatesPreferred { get { return true; } } + + #endregion + + public MemoryDomainList MemoryDomains { get; private set; } + + public List> GetCpuFlagsAndRegisters() + { + return new List>(); + } + + public void Dispose() + { + if (!disposed) + { + if (AttachedCore != this) + throw new Exception(); + AttachedCore = null; + } + } + + #region SoundProvider + + short[] samples = new short[4096]; + int nsamp = 0; + + public ISoundProvider SoundProvider { get { return null; } } + public ISyncSoundProvider SyncSoundProvider { get { return this; } } + public bool StartAsyncSound() { return false; } + public void EndAsyncSound() { } + + public void GetSamples(out short[] samples, out int nsamp) + { + nsamp = this.nsamp; + samples = this.samples; + this.nsamp = 0; + } + + public void DiscardSamples() + { + this.nsamp = 0; + } + + void update_audio() + { + IntPtr src = IntPtr.Zero; + LibGPGX.gpgx_get_audio(ref nsamp, ref src); + if (src != IntPtr.Zero) + { + Marshal.Copy(src, samples, 0, nsamp * 2); + } + } + + #endregion + + #region VideoProvider + + public IVideoProvider VideoProvider { get { return this; } } + + int[] vidbuff = new int[0]; + int vwidth; + int vheight; + public int[] GetVideoBuffer() { return vidbuff; } + public int VirtualWidth { get { return BufferWidth; } } // TODO + public int BufferWidth { get { return vwidth; } } + public int BufferHeight { get { return vheight; } } + public int BackgroundColor { get { return unchecked((int)0xff000000); } } + + unsafe void update_video() + { + int pitch = 0; + IntPtr src = IntPtr.Zero; + + LibGPGX.gpgx_get_video(ref vwidth, ref vheight, ref pitch, ref src); + + if (vidbuff.Length < vwidth * vheight) + vidbuff = new int[vwidth * vheight]; + + int rinc = (pitch / 4) - vwidth; + fixed (int* pdst_ = &vidbuff[0]) + { + int* pdst = pdst_; + int* psrc = (int*)src; + + for (int j = 0; j < vheight; j++) + { + for (int i = 0; i < vwidth; i++) + *pdst++ = *psrc++ | unchecked((int)0xff000000); + psrc += rinc; + } + } + } + + #endregion + } +} diff --git a/BizHawk.Emulation.Cores/Consoles/Sega/gpgx/LibGPGX.cs b/BizHawk.Emulation.Cores/Consoles/Sega/gpgx/LibGPGX.cs new file mode 100644 index 0000000000..8d38a126b9 --- /dev/null +++ b/BizHawk.Emulation.Cores/Consoles/Sega/gpgx/LibGPGX.cs @@ -0,0 +1,27 @@ +using System; +using System.Collections.Generic; +using System.Linq; +using System.Text; +using System.Runtime.InteropServices; + +namespace BizHawk.Emulation.Cores.Consoles.Sega.gpgx +{ + public static class LibGPGX + { + [DllImport("libgenplusgx.dll", CallingConvention = CallingConvention.Cdecl)] + public static extern void gpgx_get_video(ref int w, ref int h, ref int pitch, ref IntPtr buffer); + + [DllImport("libgenplusgx.dll", CallingConvention = CallingConvention.Cdecl)] + public static extern void gpgx_get_audio(ref int n, ref IntPtr buffer); + + [UnmanagedFunctionPointer(CallingConvention.Cdecl)] + public delegate int load_archive_cb(string filename, IntPtr buffer, int maxsize); + + [DllImport("libgenplusgx.dll", CallingConvention = CallingConvention.Cdecl)] + public static extern void gpgx_advance(); + + [DllImport("libgenplusgx.dll", CallingConvention = CallingConvention.Cdecl)] + public static extern bool gpgx_init(string feromextension, load_archive_cb feload_archive_cb); + + } +} diff --git a/genplus-gx/HISTORY.txt b/genplus-gx/HISTORY.txt new file mode 100644 index 0000000000..fe8c528787 --- /dev/null +++ b/genplus-gx/HISTORY.txt @@ -0,0 +1,1023 @@ +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX 1.7.4 (21/06/2013) (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core/SCD] +--------------- +* fixed access to read-only registers on Main-CPU side ("Batman Returns" platform level freeze) +* fixed & improved emulation of PRG-RAM write protection register ("Lunar Eternal Blue" japanese version freeze) +* improved SUB & MAIN-CPU synchronization ("Dracula Unleashed" freeze when using US Model 2 BIOS) +* improved CPU polling detection +* improved CDD emulation & added CD drive access time for SEEK command ("Panic!/Switch" intro missing scene) +* added missing reinitialization of MAIN-CPU PRG-RAM bank on reset +* added .OGG audio tracks support through LIBTREMOR + +[Core/Sound] +--------------- +* fixed YM2612 configurable DAC depth emulation +* improved Low-Pass filter +* added optional "MONO" output mode + +[Core/VDP] +--------------- +* fixed FIFO access timings when using invalid write code value ("Clue" menu) +* fixed DMA Copy with undocumented code value ("Fatal Labyrinth" end sequence) +* minor code fixes & optimizations + +[Core/CPU] +--------------- +* optimized 68k stack read/write functions +* fixed broken 68k address error emulation +* fixed 68k interrupt behavior (prevents interrupts from being executed multiple time when 68k is halted) +* fixed Z80 registers initial state, added proper initialization when using PBC (verified on real hardware by Charles McDonald) + +[Core/MD] +--------------- +* fixed SRAM incompatibilities between BIG ENDIAN & LITTLE ENDIAN platforms (note: this breaks old .srm files with LITTLE ENDIAN platform ports) +* added support for a few recently dumped unlicensed games +* added auto-detection of byte-swapped ROM files + +[Gamecube/Wii] +--------------- +* fixed CD Leds positioning when using NTSC filter +* improved on-screen CD Leds (thanks to Iceknight) +* various code fixes & improvements + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX 1.7.3 (26/11/2012) (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Gamecube/Wii] +--------------- +* fixed broken input system initialization + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX 1.7.2 (24/11/2012) (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core/SCD] +--------------- +* added default TOC for Shadow of the Beast II (prevent hangs when audio tracks are missing) +* fixed CD-DA fader muting +* fixed PCM channels panning on reset +* fixed backup RAM file management when using disc swap with Mode 1 cartridge +* incremented CD drive read latency: fixes Space Adventure Cobra (freeze when opening coffin at 2nd morgue scene) +* improved CDD emulation accuracy: fixes Snatcher (freeze at the end of Act 2) & various CD player bugs +* improved MAIN-SUB memory map mirroring in SCD mode (verified on real hardware by Charles McDonald) +* implemented cycle-accurate "stopwatch" register emulation + +[Core/Sound] +--------------- +* fixed broken PSG noise frequency +* fixed incorrect Game Gear PSG stereo emulation +* implemented cycle-accurate Game Gear PSG stereo + +[Core/VDP] +--------------- +* fixed broken VDP DMA from SVP ROM latency (graphic errors in Virtua Racing) + +[Core/MD] +--------------- +* added Super Mario World 64 (unlicensed) cartridge hardware emulation + +[Core/Input] +--------------- +* added automatic detection for CD games with Justifier/Menacer support +* improved Justifier/Menacer emulation + +[Gamecube/Wii] +--------------- +* fixed screen rendering when borders are disabled +* added configurable on-screen CD leds + +[Wii] +--------------- +* DVD light now indicates when virtual CD tray is open +* fixed automatic input settings detection +* improved lightgun crosshair positionning + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX 1.7.1 (13/10/2012) (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core/SCD] +--------------- +* added support for CUE files +* added CD-DA tracks emulation (needs CUE+BIN or ISO+WAV images) +* added CD fader emulation +* added CDD "Fast FW" & "Fast RW" commands emulation +* improved CDD TOC emulation (random freezes in Sonic CD, Switch/Panic, Final Fight CD and probably many others) +* improved PCM chip synchronization with SUB-CPU (missing speeches in Willy Beamish) +* fixed PCM chip emulation (random hangs in Snatcher, missing sound effects in Switch/Panic, Final Fight CD, Wonderdog...) +* fixed Word-RAM memory mode on soft-reset (missing logo gfx effects) +* fixed SUB-CPU access to unused areas when using PC-relative instructions (Final Fight CD first boss random crash) +* fixed CPU idle loop detection on memory mode register access (Pugsy CD first boss slowdown) +* fixed Mode 1 emulation (cartridge boot mode) + +[Core/Sound] +--------------- +* replaced FIR resampler by Blip Buffer for FM resampling +* modified SN76489 core for use of Blip Buffer +* improved PSG & FM chips synchronization using Blip Buffer +* added Game Gear PSG stereo support +* fixed SG-1000 specific PSG noise +* fixed YM2612 LFO AM waveform (California Games surfing event) +* fixed YM2612 phase precision +* minor optimizations to YM2612 core + +[Core/Game Gear] +--------------- +* added support for CJ Elephant Fugitive (recently released by SMS Power) +* added Game Gear extended screen option + +[Core/Genesis] +--------------- +* added support for a few recently dumped (but unreleased) games + +[Core/General] +--------------- +* improved ROM & CD image file loading +* various code cleanup + +[Gamecube/Wii] +--------------- +* added automatic disc swap feature +* removed automatic frameskipping (no use) +* improved general audio/video sync +* various code cleanup & bugfixes + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX 1.7.0 (01/07/2012) (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core/SCD] +--------------- +* added Mega CD / Sega CD hardware emulation (incl. Sub 68K, CDD, CDC, PCM, GFX rotation/scaling, etc) +* added .ISO & .BIN CD image file support +* added 512K backup cartridge RAM support +* added savestate support for CD games + +NOTES: +~~~~~~ +* to play CD games, original BIOS ROM files are required in /genplus/bios/ directory: unzip & rename them to bios_CD_U.bin, bios_CD_E.bin, bios_CD_J.bin +* CD audio tracks (CD-DA) are not supported (yet) + +[Core/CPU] +--------------- +* modified 68k core for Mega CD / Sega CD support +* optimized 68k core using prebuild const tables + +[Core/VDP] +--------------- +* improved DMA accuracy +* improved accuracy of nametables register & VSRAM writes during HBLANK: fixes "The Adventures of Batman & Robin" (graphical issues during 2nd Boss fight). +* added support for 8-bit VRAM writes with undocumented code value (verified on real hardware by Nemesis) + +[Core/Sound] +--------------- +* improved synchronization between SN76489 & YM2162 cores. +* improved accuracy of SN76489 core timings. + +[Core/MD] +--------------- +* added support for some recently dumped unlicensed games. +* improved emulation of 32k bankswitch hardware used by a few unlicensed games. +* fixed behavior of Z80 banked reads from 68k RAM (verified on real hardware). +* fixed support for 128K Pro Action Replay ROM. + +[Core/MS] +--------------- +* added support for all recent korean ROM dumps by SMS Power. +* added emulation of korean multi-game mapper (4-Pak All Action) +* added pseudo-random RAM pattern initialization on Mark-III and Japanese Master System (fixes "Alibaba and 40 Thieves" & "Block Hole") +* added port $3E emulation & internal BOOTROM support (Master System & Game Gear only). + +[Core/General] +--------------- +* added an option to set VDP mode (PAL/NTSC) independently from console region. +* added an option to select original system master clock frequency (PAL/NTSC/AUTO), emulation will run at selected frequency when VSYNC is disabled. +* fixed 68k context loading/saving (Sol Deace). +* fixed C89 incompatibilities for better portability. +* removed use of "long int" type for portability on 64-bit platforms. +* moved savestate zlib compression out of emulation core (for ports that don't use it). +* various optimizations. + +[Gamecube/Wii] +--------------- +* removed ROM load device selection from Load Menu: default ROM device must now be configured in menu settings. +* added specific load buttons, browsers & saved paths for each systems, this also fixes slowdowns caused by screenshot loading when browsing from slow devices. +* added support for left/right buttons as page up/down keys in ROM browsers +* added right analog stick as default "return to menu" key for Gamecube controllers +* added alternate remappable menu key combo for Gamecube controllers +* added an option to disable VSYNC (emulator is synced with audio hardware instead of video). +* added an option to boot system from "BIOS", with or without cartridge. +* added Master System & Game Gear "BIOS" support (files should be named bios_U.sms, bios_J.sms, bios_E.sms & bios.gg and copied to /genplus/bios directory). +* replaced "Hard Reset" button by a Soft Reset for systems having a Reset button (Mega Drive / Genesis & Master System) +* State & SRAM files are now only compressed when saving to Gamecube Memory Cards +* various fixes & cleanup. +* compiled with devkitPPC r26 & libogc 1.8.11. + +[Gamecube] +---------- +* improved progressive mode support when component cable is detected (hold B during startup to switch menu video mode configuration) + + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX 1.6.0 (07/08/2011) (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core/Sound] +--------------- +* added YM2413 emulation in Master System compatibility mode. +* fixed SN76489 noise boost initialization. +* minor YM2612 core optimizations. + +[Core/VDP] +--------------- +* added accurate emulation of SG-1000, Master System (315-5124, 315-5246) & Game Gear VDP. +* added support for all TMS9918 rendering modes. +* improved Mega Drive VDP timings accuracy in Master System Compatibility mode. +* fixed color palette initialization. +* fixed shifted sprites rendering in Mode 4. +* modified pixel rendering support (pixel depth is now forced at compilation time). + +[Core/CPU] +--------------- +* optimized 68k core (rewrote 68k interrupt handling, removed multiple CPU types support & unused code) for 5~8% speed improvment + +[Core/IO] +--------------- +* added accurate emulation of Master System (315-5216, 315-5237, 315-5297) & Game Gear I/O controllers. +* added Terebi Oekaki tablet emulation. +* improved Mouse emulation (fixes mouse support in Cannon Fodder). +* improved Justifier emulation (fixes gun support in Lethal Enforcers 2). +* improved 6-Buttons control pad emulation (fixes Duke Nukem 3D) +* modified lightgun emulation to use common key inputs for all devices. +* 2-buttons controller is now picked by default for Master System games. + +[Core/MD] +--------------- +* added copy-protection hardware emulation for some new dumped games (Tiny Toon Adventures 3, Mighty Morphin Power Rangers & The Battle of Red Cliffs). +* added Game Toshokan in EEPROM database (verified on real cartridge). +* fixed Micro Machines 2 - Turbo Tournament EEPROM size (verified on real cartridge). +* modified SRAM banswitch hardware emulation to be more compatible with some hacks. + +[Core/MS] +--------------- +* added Cyborg Z to Korean mapper database. +* +[Core/GG] +--------------- +* added 93C46 EEPROM emulation (Majors Pro Baseball, World Series Baseball & World Series Baseball 95). + +[Core/General] +--------------- +* added support for .mdx ROM format. +* added Game Gear & SG-1000 ROM support. +* added accurate emulation of SG-1000, Master System (I, II) & Game Gear hardware models for 100% compatibility. +* updated to new Genesis Plus license (see http://cgfm2.emuviews.com/) +* various code cleanup. + +[Gamecube/Wii] +--------------- +* IMPORTANT: cheats, screenshots & save files are now stored in console-specific directories (ex: /snaps/md, /cheats/ms, /saves/gg, ...) +* added 8-bit Action Replay & Game Genie codes support (for Master System & Game Gear games). +* improved audio/video synchronization for PAL games in 50Hz TV modes (now use VSYNC like NTSC games in 60hz modes). +* improved gun cursor positioning accuracy. +* improved horizontal scaling & screenshots rendering in H32 mode. +* fixed a bug with ROM file extension handling that would affect cheats, snapshots, sram & savestate files. +* removed ARAM/injected ROM support (unused). +* removed WPAD_ and PAD_ update from VSYNC callback. +* increased GCC inlining limits for some speed improvment. +* compiled with devkitPPC r24 & libogc 1.8.7. + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX 1.5.0 (31/03/2011) (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core/VDP] +--------------- +* added support for Master System compatibility mode (Z80 ports access mode), incl. Mode 5 rendering. +* added Mode 4 rendering for both Genesis & Master System modes. +* added alternate BG planes rendering functions (should be faster on PPC architectures). + +[Core/IO] +--------------- +* added support for Master System compatibility mode (Z80 ports access mode). +* added Master System peripherals emulation (Control Pad, Paddle, Sports Pad & Light Phaser). +* added XE-1AP (analog controller) emulation. +* added Activator emulation. + +[Core/Extra] +--------------- +* added support for all known Master System cartridge mappers. +* added copy-protection hardware emulation for a few MD unlicensed games: fixes 777 Casino (crash when talking to bunny girls). +(NB: most of those unlicensed games seem to have been already patched by ROM dumpers, main purpose is documenting them) +* added support for Top Shooter arcade board controller. (A=Shoot, B=Bet, C/RIGHT=Coins, START=Start, hold UP on startup to enter service mode) +* improved King of Fighters 98 mapper emulation (registers address decoding is now 100% accurate) +* fixed Game Genie when several codes affect same ROM address. +* fixed EEPROM types for Brian Lara Cricket & NBA Jam TE (verified on real cartridges) + +[Core/General] +--------------- +* added Master System compatibility mode emulation (automatically enabled when loading ROM file with .sms extension). +* improved savestate stability & compatibility (support for old 1.4.x savestates is preserved) +* various code cleanup & comments. + +[Gamecube/Wii] +--------------- +* fixed cheat codes handling when several codes affect same ROM address. +* improved input controller detection on menu exit. +* improved key remapping dialog box to match emulated device +* changed Menu key for Gamecube controller to allow MODE button mapping +* fixed DVD not being unmounted on swap (memory leak) + +[Wii only] +--------------- +* added USB mouse support for Sega Mouse emulation +* compiled with latest libogc: improves USB compatibility & fixes stability issues with Wiimotes. + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX 1.4.1 (04/12/2010) (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core/VDP] +--------------- +* improved VBLANK flag accuracy, as observed on real hardware. +* improved DMA operations accuracy, writes are now performed on a scanline basis: fixes Gaiares (flickering title screen). +* improved DMA Fill timing accuracy. +* fixed DMA with bad code values: fixes Williams Arcade Classics (corrupted gfx after soft reset). +* fixed horizontal resolution changes during HBLANK: fixes Bugs Bunny in Double Trouble (2nd stage). +* fixed Vertical Counter in interlace mode 1, as observed on real hardware. +* fixed horizontal border width, as observed on real hardware. +* various code improvments & optimizations. + +[Core/Extra] +--------------- +* improved savestate format: added DMA, SVP, cartridge mapping & internal registers state informations +* improved unlicensed ROM mappers emulation +* added Chinese Fighters III mapper support +* added Top Fighter mapper support +* fixed Barver Battle Saga mapper support +* fixed cartridge hardware soft-reset (Game Genie, SVP, ...) +* fixed Game Genie registers byte reads + +[Gamecube/Wii] +--------------- +* added message box when inputs config uses disconnected controllers. +* added message box when settings are reseted to default on startup. +* fixed default inputs configuration. +* fixed memory leak in Cheat Menu causing spurious resets. +* added an option to enable/disable automatic cheat activation +* increased max number of cheat codes +* optimized cheat codes requiring RAM patching. +* improved default horizontal scaling to better match output from a real Mega Drive + +[Gamecube specific] +--------------- +* fixed inverted keys in cheat menu. +* fixed audio input frequency, now use exact audio hardware samplerate, as measured on my Game Cube (~48044 Hz), + (NB: Wii samplerate has been verified to be closer to 48000 Hz) + +[Wii specific] +--------------- +* added the possibility for any wiimotes to be used as input device, regardless of the connected expansion controller. +* fixed USB drive not being detected when application is loaded from USB (HBC), thanks to Tantric for the tips. + + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX 1.4.0 (01/11/2010) (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core/Sound] +--------------- +* completely rewrote sound processing/mixing: sound chips are now clocked with exact output framerate +to ensure 100% smooth video & audio playback, with no lag or skipping, while rendering an accurate number +of samples per frame and keeping PSG & FM chips in sync. +* improved PSG & FM chips synchronization with CPU execution (fixed point precision). +* improved YM2612 core general accuracy (SSG-EG, CSM mode,...) (based upon Nemesis recent tests on real hardware) +* improved YM2612 LFO emulation accuracy: fixes "Spider-Man & Venom : Separation Anxiety" (intro) +* fixed YM2612 bug with Timer B: fixes "Langrisser Hikari II"/"Der Langrisser II" (Sega logo) +* fixed YM2612 context saving/loading. +* fixed YM2612 state on reset. +* removed outdated & less accurate Gens YM2612 core +* added configurable YM2612 DAC resolution emulation. +* added configurable & faster FIR resampler (thanks to Blargg & AamirM), removed libsamplerate support. +* added configurable Low-Pass filtering +* added configurable 3-Band Equalizer (thanks to Neil C). +* added an option to boost SN76489 Noise Channel. +* adjusted SN76489 cut-off frequency. +* implemented Blargg's blip buffer in SN76489 core (all channels are now lineary interpolated) + +[Core/VDP] +--------------- +* added support for CRAM writes during horizontal blanking (Striker, Zero the Kamikaze Squirrel,...) +* added support for 2-Cell vertical scrolling in Interlaced 2 mode +* added support for some undocumented mode register bits +* added proper emulation of HV Counter latch: fixes Sunset Riders intro +* added pixel-accurate emulation of mid-line display on/off (Nigel Mansell World Championship PAL, Ren & Stimpy's Invention PAL,...) +* improved 2-cell vscroll emulation accuracy, as verified on real hardware (Gynoug, Cutie Suzuki no Ringside Angel, Formula One, Kawasaki Superbike Challenge) +* improved FIFO timings accuracy: fixes Sol Deace intro +* improved sprite masking accuracy (thanks to Nemesis for his test program) +* improved sprites processing accuracy: fixes (un)masked sprites in Mickey Mania (3D level), Sonic 2 (VS mode). +* improved HBLANK flag timing accuracy: fixes Mega Turrican (Sky level) +* improved horizontal blanking & HINT/VINT occurence timing accuracy, as measured on real hardware. +* improved HCounter accuracy in 40-cell mode, as measured on real hardware. +* improved color accuracy in VDP highlight mode to match results observed on real hardware + +[Core/CPU] +--------------- +* updated Z80 core to last version (fixes interrupt Mode 0 timing and some BIT instructions). +* fixed some Z80 instructions timing. +* fixed state of Z80 registers on reset (sound issues with Defender & Defender 2 in Williams Arcade Classics) +* improved Z80 interrupt accuracy +* improved 68k accuracy (initial Reset timing + auto-vectored interrupts handling). +* improved 68k timing accuracy for DIVU/DVIS (thanks to Jorge Cwik) & MULU/MULS instructions. +* implemented 68k undocumented flags behavior for DIVU/DIVS instructions (Bloodshot / Battle Frenzy) +* improved Z80 & 68k cpu execution/synchronization accuracy by using Master Clock as common reference (now run exactly 3420 M-Cycles per line). +* modified Z80 & 68k cores to directly use external cycle count instead of intermediate counters. + +[Core/Extra] +--------------- +* added Game Genie hardware emulation. +* added Action Replay & Pro Action Replay hardware emulation (only preliminary Pro Action Replay 2 support). +* added Sonic & Knuckles "Lock-On" support. +* added Cartridge "Hot Swap" feature. +* added missing EEPROM support in more games. +* added VDP lock-out emulation (TMSS). +* improved emulation of copy-protection hardware found in some unlicensed cartridges (Mulan, Pocket Monsters II). +* fixed Realtec mapper emulation: fixes missing sound in Balloon Boy / Funny World. +* fixed lightgun auto-detection: fixes default cursor position in Lethal Enforcers II. +* enabled simultaneous use of multitap & J-CART (Super Skidmarks 6-player mode) +* lots of code cleanup, bugfixes & optimization. + + +[Gamecube/Wii] +--------------- +* implemented custom FONT engine (uses internal IPL font & GX hardware rendering). +* implemented custom GUI engine (uses GX hardware rendering & multithreading) +* implemented advanced menu interface (IR pointing, game snapshots, cheats & saves manager, visual & sound effects, BGM support, etc). +* improved audio/video synchronization to ensure 100% smooth video & audio playback. +* improved soft-reset button support, now works more like real Mega Drive / Genesis (model 1) reset button. +* improved lightgun cursors layout. +* added automatic ROM loading feature (last played game launches immediately when starting the emulator) +* added PAR codes and .pat files support +* fixed lot of stability issues and potential memory leaks. + +[Wii specific] +--------------- +* added Video Hardware "Gamma" control +* added Video Hardware "Trap Filter" control +* improved Mouse emulation through Wii remote +* compiled with devkitPPC r22 & libOGC 1.8.5 (includes SDHC & USB2 support through IOS58, removes DVDX support) + + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX 1.3.1 (20/12/2008) (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Gamecube/Wii] + +* improved sound engine +* modified frame synchronization (now use audio DMA interrupt) + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX 1.3.0 (14/12/2008) (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core] + +* YM2612 bugfixes (MAME core): + .fixed EG Decay->Substain transition when SL & DR are minimals: fix tracks #3 and #9 in "Mega Turrican" + .fixed a bug in SSG-EG emulation code: fix Level 1 music in "Alisia Dragoon" + .modified SSG-EG Decay End Level: fix some sound effects (ChainSaw, Zap...) in "Beavis & Butthead" + .improved Detune overflow accuracy: fix very high frequency sounds in many games + .fixed registers 0x20-0x26 Reset state: fix intro music in "B.O.B" + .reverted incorrect fix with KEY ON: fix "Flamethrower" sound effect in "Alien 3" and many others +* adjusted HCounter values: fixes line flickering in "Sonic 3D" bonus stage +* adjusted VINT timing: fixes hang-up in "V.R Troopers" +* improved HBLANK flag accuracy: fixes line flickering in "Gouketsuji Ichizoku" +* fixed broken Z80 access to WRAM: fixes hang-up in "Mamono Hunter Youko" +* modified JCART emulation: fixes corrupted tracks logo in "Micro Machines 2" +* added Blargg's NTSC Filters support (NTSC video artifacts emulation) +* optimized VDP rendering core, rewrote 68k interface (memory handlers, cycle execution, interrupts): greatly improved emulation speed + +[Gamecube/Wii] + +* remove slowest libsamplerate settings under "HQ YM2612" option, only keeps SRC_LINEAR (faster) and SRC_SINC_FAST (better) +* added an option to enable/disable bilinear filtering +* rewrote video engine: improved horizontal scaling (VI+GX), improved rendering speed (direct texture mapping) +* removed embedded font, (re)enabled IPL font support: now should works for Qoob users too (thanks to emukiddid) +* fixed "Reset" button behavior, now acts more like Genesis Reset button ;-) +* patched libfat for faster SDCARD accesses (thanks to svpe) +* SRAM and SaveState filenames are now based on the ROM filename (for FAT devices only) +* various bugfixes, menu tweaks and code cleanup + +[Gamecube] + +* added 480p support in menu + +[Wii] + +* implemented fast scrolling in menu using Wiimote D-PAD +* added "Power" button support +* added USB Storage support +* Widescreen menu fix +* *new* libogc 1.7.0 features: SDHC support, Wiimote shutdown button support + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX release 080826 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core] + +* YM2612(MAME): fixed LFO phase update for CH3 special mode: fix sound effects in Warlock & Aladdin (thanks to AamirM) +* YM2612(MAME): fixed EG attenuation level on "KEY ON": fix Ecco 2's splash sound +* YM2612(MAME): fixed SSG-EG emulation: fix Bubba'n Stix (Track 5) and many others +* YM2612(MAME): replaced sample interpolation with libsamplerate support, High Quality mode is now more accurate +* implemented cycle-accurate HINT timings: every timing sensitive games/demos are now *finally* working fine +* fixed a bug affecting CRAM/VSRAM DMA timings +* fixed Sprite Attribute Table address mask for VRAM writes +* improved accuracy of 68k access to Z80: fix music in Pacman 2 when entering PAUSE menu +* disabled "Address Error" emulation when UMK3 hack is loaded: fix game crashing after a round ends up +* added support for some more unlicensed games: Pocket Monster, King of Fighter 98, Soul Blade (credits to Haze) +* improved Menacer emulation: fix lightgun support in Body Count & T2: The Arcade Game +* added Konami Justifier emulation: fix lightgun support in Lethal Enforcers 1 & 2 +* added Sega Mouse emulation (Populous 2, Body Count, Shangai 2, Fun'n Games, ...) + +[Gamecube/Wii] + +* added Wiimote support for Menacer/Justifier/Mouse +* added DVD support in Wii mode (no modchip required) +* added "Gun cursor" option to enable/disable gun position display +* added "Invert Mouse" option to invert Sega Mouse vertical axe (required by some games) +* improved Controller options: Wiimote/Nunchuk and Classical Controllers can now be affected separately to ANY player + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX release 080716 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core] + +* adjusted (again) HINT timings: fix Double Dragon 2 (game freezed), hopefully does not break anything else +* fixed broken EEPROM support for Codemaster games +* modified input update timings: fix Dungeons & Dragons * Warriors of the Eternal Sun (thanks to Notaz) +* added support for "Ultimate Mortal Kombat Trilogy" hack (max. size supported is 10MBytes) +* added (VERY) preliminar support for PICO roms (credits to Notaz for his documentation) +* improved YM2612 emulation (credits to Nemesis for his tests on real hardware): + .implemented phase overflow emulation: improved fix for special music instrument used in Comix Zone, Flashback, Ariel, Shaq Fu... + .improved SSG-EG emulation in MAME core (also based on additional code from Alone Coder) + .improved Timers emulation accuracy + .improved Enveloppe Generator accuracy + .fixed Channel 3 CSM mode emulation + .implemented sample interpolation in MAME core to emulate the chip at original frequency (HQ YM2612 mode, from gens) + +[Gamecube/Wii] + +* added automatic alphabetical filesorting (Marty Disibio) +* added ROM History for faster ROM access (Marty Disibio) +* fixed a silly input bug in "ROM Infos" & "Game Genie" menus +* modified "Hard Reset" option +* improved display sharpness in original rendering mode (H40 cell mode only), filtering is now completely disabled +* enabled overscan emulation in "STRETCH" aspect mode also +* added support for horizontal wiimote handling in Menu (automatically used when the wiimote is not pointed towards the screen) +* improved Controller options + .prevented keys reconfiguration if device is not detected + .added support for up to 8 players (ISS Pro Deluxe, ...) + .each player can be affected to a custom device (GAMECUBE Pad, WIIMOTE/NUNCHUK or CLASSIC) + .added the ability to use classic controller & wiimote pad from the same port separately + .modified "soft-reset" key on the Wiimote to avoid "accidental" resets (now press Buttons + & * simultaneously) + .added MODE button mapping: use "START+Z" on gamepad or "Button Minus" on wiimote/classic (not reconfigurable) + .added automatic configuration save for controller options + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX release 080601 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core] + +* improved HCounter accuracy: fix graphic glitches in "Striker (Europe)" +* improved HINT timing accuracy: fix flickering in "Zero The Kamikaze Squirrel (USA)" +* improved rendering accuracy when backdrop color is modified during HBLANK (Road Rash I/II/III) +* fixed broken Game Genie support + +[Gamecube/Wii] + +* added full horizontal scaling (up to 720 pixels) when using "stretch" aspect mode (use Xscale to increase width) +* added progressive mode support (480p) in menu also +* added automatic SRAM/FreezeState support (OFF by default, check "system options") +* added automatic configuration file support +* /genplus/saves is now automatically created if it does not exist +* use libfat automatic SDCARD detection: default slot is now always used when accessing SDCARD +* assigned Reset Button to Genesis Soft-Reset + +[Wii] + +* added automatic TV mode detection (from SYSCONF), no more PAL60 version needed +* added option to return to Wii System Menu +* fixed "TP reload" option: now compatible with HB channel +* removed SD-Gekko support (Wii slot becomes default slot) +* added Wii SD slot support for SRAM & FreezeState files +* added Wiimote, Nunchuk & Classic controllers support through libwiiuse (see User Manual for default keys) +* added customizable key mapping (for each configurations: wiimote only, wiimote+nunchuk or classic) + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX release 080419 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core] + +* modified VINT timings a little bit: fix lockup during Desert Strike's intro +* corrected 68k interrupts handling: fix graphic glitches in Darius II/Sagaia + +[Gamecube/Wii] + +* fixed 60Hz "Bilinear" rendering mode (was broken in last release) +* fixed issue with the 1st file when browsing SDCARD through SD-Gekko +* fixed GX initialization: fix "freeze" issue that occured sometime when starting a game +* added "Wii Reboot" option +* added PAL 50hz support in menu (black borders) +* added progressive rendering mode support (480p) in Wii mode (not supported by the PAL60 version, use the other one !) +* compiled with a modified libogc: should definitely fix the PAL "red screen" issue for RGB-cable users (still use the PAL60 version !) + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX release 080406 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core] + +* updated SVP core: fix some perspective issues in Virtua Racing (thanks to Notaz) +* added internal SAT update during VRAM Fill: fix unmasked sprites during Battletech's intro +* fixed m68k core issues with gcc 4.2.3: fix Xperts, Lemmings 2, M1 Abrams Battle Tank +* forced YM2612 Enveloppe update: fix intro music in Batman&Robin (thanks to Aamir) + +[Gamecube/Wii] + +* removed not working DVD features (Wii mode only) +* fixed Timers with PAL roms +* added EURGB60 TV mode support: fix "red screen" issue with PAL Wii when using RGB cable +* added PAL50 TV mode support (PAL and NTSC roms), see video options +* added "TP reload" option, use "System Reboot" (Wii mode only) +* added Front SD rom loading support with LFN & subdirectory browsing (Wii mode only) + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX release 080301 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core] + +* added SVP emulation: Virtua Racing is now emulated (big thanks to Notaz and TascoDeluxe) +* fixed VDP registers behaviour when VDP Mode 4 is enabled: fix Bass Masters Classic Pro, Captain Planet & The Planeeters +* corrected a bug in DMA Fill operation: fix James Pond 3, Rockman World/Megaman Willy Wars (corrupted VRAM) +* corrected typo errors in CPU cycle counters update: fix optiom screen music in "College Slam" and probably others games. +* added preliminary support of undocumented YM2612 bug: fixes soundtracks of Shaq Fu, Spiderman, Comix Zone, Ariel and some others +* added support for mappers & copy protection devices used in many unlicensed/pirate cartridges (see cart_hw.c for details) +* rewrote memory handlers for better modularity and some (little) speedup +* reduced Savestate size + +[Gamecube] + +* compiled with last LibOGC (20080228): fix issues when unplugging controller, support for Wii mode (see release.txt) +* added "hard-coded" IPL font (no more direct access to BOOTROM): fix font problem for Qoob users +* added SDCARD Slot B support for loading Roms +* removed unused MAME PSG Core +* added 'Force DTACK' option for prototype games usually hanging on real hardware (example: Sonic Crackers) +* added an option to underclock SVP core (with default cycle count, Virtua Racing actually does not run fullspeed in GC mode) +* fixed frame timing in PAL mode +* fixed analog stick sensitivity + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX release 080107 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core] + +* fixed interleaved rom detection: roms with .smd extension should now work fine +* fixed a recently introduced bug in VDP registers writes: fixes bad colors in Toy Story (intro) +* updated list of games using EEPROM: added Sports Talk Baseball (internal memory check fixed) and Brian Lara Cricket +* fixed VINT flag update when VINT is disabled: fixes NCAA College Football +* adjusted DMA timings in H32 mode: fixes flickering in Out of this World, Kawasaki Superbike Challenge & Formula One +* adjusted line rendering and HBLANK timings: fixes flickering in Nigel Mansell's World Championship Racing, Deadly Moves/Power Athlete +* fixed unmapped ROM reads through Z80 Bank: fixes Zombie High (Proto) +* added support for custom ROM/RAM mapping used by Game no Kanzume Otokuyou + +[Gamecube] + +* fixed broken SDCARD support for SRAM and Savestate files + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX release 071230 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Gamecube] + +* fixed ROM injector base address (DATA section 1) + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX release 071228 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core] + +* many sourcecode cleanup and optimization +* completely rewrote EEPROM emulation: now support all known EEPROM types (24C01-24C65) and mappers (Sega, Acclaim, EA, Codemasters) +used in a few games (now use internal game database) as external RAM. This should at least fix save support in the following games: + . NBA Jam (alternate Acclaim mapper) + . College Slam, Frank Thomas Big Hurt Baseball (24C65 type) + . NHLPA Hockey 93, Rings of Power (EA mapper) + . Micro Machines serie, Brian Lara Cricket 96/Shane Warne Cricket (Codemasters mapper) +* external RAM is now initialized to 0xFF by default: fix Micromachines 2, Dino Dini Soccer +* fixed SRAM 16-bits memory handlers: fix some Sega Sports and EA Sports games (NFL95, NBA Action 95, NHL97, NHL98,...) +* modified WRITE_xxx & READ_xxx macros for better portability and faster memory access on BIG ENDIAN platform +* completely rewrote BIG ENDIAN support in render.c and vdp.c: rendering should be a little faster +* rewrote ROM bankswitch emulation (Super Street Fighter II): ROM access are faster, using memory pointers instead of reading ROM copy from ARAM +* fixed leftmost Window/PlaneA column render and implemented Window bug (as described by Charles Mc Donald) +* improved "Sprite Limit" and "Sprite Collision" detection accuracy +* modified RGB565 Color Palette to use the full available color range (0-31;0-63) +* implemented "cycle accurate" HV Interrupt timings: fix Sesame's Street Counting Cafe, Legend of Galahad (intro) +* improved VDP access timings accuracy (added FIFO emulation): fix Double Clutch +* improved DMA timings accuracy: fix Winter Olympics (E), Arch Rivals and probably more +* fixed HCounter again: Road Rash serie (I,II,III) don't need timing hacks anymore +* fixed VCounter in Interlaced 2 mode: fix Combat Cars "VS-Mode" +* improved Interlaced 2 mode (double resolution) rendering: Sonic 2, Combat Cars ("VS-Modes") look far better +* added TMSS BIOS support (optional) +* rewrote part of the YM2162 MAME's core: fixed internal FM timers handling, removed non-YM2612 emulation code and unused multiple cpu support +* implemented "cycle accurate" FM timers & sound samples rendering +* improved Z80 Interrupt timing accuracy: fix Sonic 3 music slowdowns +* updated Z80 & 68000 cores to last MAME versions +* improved Soft Reset emulation: X-Men 2 and Eternal Champions (random character selection) now work more like on real hardware. +* added full overscan emulation (vertical & horizontal borders) for "pixel perfect" aspect ratio (tested against a real genesis) + +[Gamecube] + +* fixed rom checksum calculation (only used for rom information) +* some modifications in GX rendering code. +* added support for original Genesis/Megadrive NTSC & PAL video modes: this makes games looking exactly as on original hardware (progressive rendering with reduced resolution) +* added "Aspect" option to switch between ORIGINAL (aspect ratio is fixed and borders are emulated) and MANUAL SET (horizontal and vertical scaling can be manually configured, borders are not emulated) +* added "Overscan" option to disable the original borders color and always use black borders (only used when ORIGINAL Aspect mode is enabled) +* added support for up to 720 pixels horizontal resolution (needed for proper aspect ratio emulation) +* added "TV Mode" option to enable automatic switching to PAL(50Hz) TV mode when the Genesis runs in PAL mode +* added "Xshift" & "Yshift" settings to let you adjust display area position while keeping the original aspect ratio +* added option to disable/enable SSG-EG support in FM cores: this special mode is indeed not properly emulated and some games might sound wrong when enabled +* removed "CPU Type" option, you can also now force Region (JAP/EUR/USA) without reseting the game, choose USA or JAP for 60hz, EUR for 50hz, this can be useful to bypass game region protection at startup. + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX release 070720 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core] + +* corrected TeamPlayer support: fix multiplayer in Gauntlet 4 (Sept. version), Pengo and a lot of others +* added J-Cart support: enable multiplayer in Codemasters games (Pete Sampras, Micromachines games, Super Skidmarks) +* added serial EEPROM autodetection: fix games with bad SRAM informations in header (NBA Jam TE) +* added SVP faking: display 2D graphics in Virtua Racing (the game is however still unplayable) +* added support for more internal IO registers: fixe some unlicensed games (Wisdom Tree games...) +* added preliminary support for unmapped protection device: fix some unlicensed games with special built-in hardware (Squirell King, Lion King 2...) +* added "Soft Reset" combo (in game, use L+Z triggers): this should be like pressing the RESET button on a real Genesis and this is required + in some games to enable special features or even complete the game (ex: X-Men). + +[Gamecube] + +* added separate configuration for PortA/PortB inputs (GAMEPAD, MULTITAP or NONE, see Joypad Config): this let you setting + PORTB as unplugged, which is needed in some games to access special modes or enable cheat codes (Alien Storm, X-Men...) +* Freezestate & SRAM files are now compressed (using zlib) +* FreezeState & SRAM files can now be saved/loaded to/from SDCARD: located in /genplus/saves/ from the root of your SDCARD +* changed initial ROMS directory for SDCARD user: now looking for /genplus/roms/ from the root of your SDCARD +* added user-transparent SRAM autoload (detection order is MCARD then SDCARD, SLOTA then SLOTB) +* "System reboot" is now used for console reboot and SD/PSO reload (if detected) +* added new font: now use original IPL font, extracted from Bootrom +* modified controls when going into the rom selection menu (DVD or SDCARD): + . use B button to go up one directory + . use Z button to quit the file selection menu + . use L/R triggers to go down/up one full page + . use Left/Right buttons or Analog stick to scroll the selected entry's filename when it can't be full displayed +* various menu rearrangment, minor bugfixes & sourcecode cleanup + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX release 070621 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core] + +* added Multitap support (EA 4-Way Play and Sega Teamplayer): allowed up to four players in games supporting those peripherals +* added partial Sega Menacer lightgun support: automatically set when detecting the 6-in-1 Menacer game + +[Gamecube] + +* added 4.7GB DVD support for WII drives (the maximal allowed size for Gamecube DVD is still 1.35GB) +* removed MPAL video timings, always use 60Hz NTSC: fix display problems for PAL wii users (no more PAL50 version needed) +* added Console Reboot option in main menu (IPL Reboot) + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX release 070518 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core] + +* you can now switch between FM cores without reseting the game. FM registers value are automatically restored when switching. +* removed the previous VINT timings modification because it brokes some games (Rocket Knight, Thunderforce III,...) +* added automatic Timing configuration (VDP latency, VINT timing & alternate Line Timing) at game loading, based upon specific romname detection. +This means you can still modify some of these options afterwards but they are now automatically set/unset when loading a game which need +special timing fixes. These fixes are also automatically desactivated when the current game doesn't need them. +For information, games that are actually detected and need special timings to run properly are: + .Legend of Galahad & Road Rash series (single line not rendered properly) + .Sesame Street Counting Cafe (don't boot) + .Chaos Engine/Soldiers of Fortune (graphic glitches on scrolling) + +[Gamecube] + +* modified PAL framesync a little bit: the 20ms period is now applied between the start of 2 consecutive frames, +no more between the end of the previous and the start of the next one, which seems more correct to me + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX release 070508 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core] + +* VINT timings are now a little more accurate: fixes Sesame's Street Counting Cafe +* SN76496 MAX_OUTPUT back to normal +* modified FB_WNOISE value in SN76496 core according to John Kortink's last informations +* added support for Maxim's PSG core, same as used in SMSPLUS (it becomes the default PSG core) +* updated FM core to the latest MAME version +* corrected DAC output level (fixes voices and some special FX being too low) +* added support for Gens YM2612 (FM) core (MAME's one still remains default FM core) + +[Gamecube] + +* corrected L & R buttons assignment: fixes Genesis X & Z buttons being inverted +* added configurable preamplification for each sound cores (see Emulator Options) +* added some other configurable sound options (boost overall volume, FM improvment for Gens YM2612) + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX release 070411 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core] + +* corrected MAX_OUTPUT value in SN76496 core: fix PSG sound (SFX) volume +* removed unused sound buffer allocation + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX release 070326 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Gamecube] + +* added DVD automount: automatically call libogc DVD_Mount function if ISO PVD reading failed (idea taken from softdev's last neocdredux release). This may be useful for loading roms from a DVD after booting from SDLOAD or after stopping DVD motor. +* added "DVD motor off" feature, like in others emulators +* corrected Memory Card mounting function: EXI_ProbeReset() function was never called if the first mounting attempt failed. Should fix some of the "Unable to mount memory card" errors. + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX release 070322 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Gamecube] + + * added SDCARD subdirectory browsing and LFN (255 char. max) support + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX release 070317 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core] + + * Color RAM update now always reset color 0 to border color (fix color glitches in Mortal Kombat,...) (thanks to Noop's for the idea) + +[Gamecube] + + * remove some rendering unused code (only used by DOS version of genesis plus) for little speedup + * added an option to enable alternate line rendering timing (fix single line error in Road Rash series and Legend of Galahad's Intro) + * added last Softdev's modifications (normalised memory access and ASM GU functions used intead of 'C' ones) for some speedup + * updated gcaram.c to be compatible with last libogc version + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX release 070309 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core] + +* little rendering code speedups +* modified HV counter tables (fix graphic glitches in Skitchin's sky, Lotus 2 Recs, Panorama Cotton, Dashin Desperados & maybe more) +* completely rewrote DMA timings emulation so that it works for all games (no more cpu freezing) +* added all DMA tranfer rates handling for each three DMA modes and added dma busy flag emulation +* modified interrupts handling on VDP register #0 and #1 writes (fix Lemmings status bar) +* added VDP RAM write latency (fix Chaos Engine/Soldier of Fortune gfx glitches) +* modified FM timers handling a bit (fix Vectorman2 music) +* corrected Sprite Limit rendering (fix Sonic 1 & Micromachines 2 title screens) +* corrected IO Registers writes (fix Decap' Attack controls, no more need for alternate input) +* corrected 6 Buttons Pad emulation (fix 6buttons detection in Mortal Kombat 3, Comix Zone and other 6-buttons compatible games) +* modified sound mixing a bit according to Generator sourcecode (FM and PSG ratios seems more correct) +* added separate CPU Region (USA, Europe, Japan,...) & Speed (PAL or NTSC) choice in menu options +* modified main frame synchro in PAL mode (fix sound glitch in this mode), thanks to Softdev for the solution +* added savestates support (go to SRAM menu, memory card supports only) + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX release 070207 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core] + +* fm timers fixed (fix missing music in Castle of Illusion, Quackshot, Undead Line, Wonderboy in Monster Lair, Cal 50, Turbo Outrun, Thundeforce 4 and maybe more) +* added complete EEPROM emulation (save support now works fine in Wonderboy5, Megaman Willy Wars, NBA Jam...) (credits to Notaz, adapted from Picodrive code) +* added preliminar dma timing emulation (fix bottom screen in Legend of Galahad) (credits to Notaz, adapted from Picodrive code) +* hack: clear Vint pending after Hint (INT level 4) acknowledge (fix Fatal Rewind) +* hack: modify read_bus16 to return a random value (fake fetch) (fix Time Killers) +* modified cpu execution timings, with more correct hblank and interrupts timing (fix ISS Deluxe, Double Dragon 2 and certainly more) (Based on Gens code) +* modified busreq mechanism: better synchro between z80 & 68k (no need to dejitter anymore) (Based on Gens code) +* added sprite collision detection (fix Strider 2) +* modified dma fill operation for big endian platform (fix Contra Hardcorps gfx garbage) + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX WIP 1.2 (Softdev) +--------------------------------------------------------------------------------------------------------- + +[Gamecube] + +* Added partial zip support (unzip.c) + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX WIP 1.1 (Softdev) +--------------------------------------------------------------------------------------------------------- + +[Core] + +* sio.c added +* Added six button pad support from x86 Gens +* Additional changes based on Charles MacDonald's gen-hw.txt + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX WIP 1 - 7 March 2006 (Softdev) +--------------------------------------------------------------------------------------------------------- + +[Core] + +* Updated SN76496 driver + +[Gamecube] + +* Added GX Hardware Scaling + + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX WIP 0 (Softdev) +--------------------------------------------------------------------------------------------------------- + +[Gamecube] + +* initial port based on Genesis Plus 1.2a from Charles McDonald (http://cgfm2.emuviews.com/) diff --git a/genplus-gx/LICENSE.txt b/genplus-gx/LICENSE.txt new file mode 100644 index 0000000000..ea974bc4e7 --- /dev/null +++ b/genplus-gx/LICENSE.txt @@ -0,0 +1,621 @@ + +Unless otherwise explicitly stated, all code in Genesis Plus GX is released +under the following license: + +Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles MacDonald +Some portions copyright Nicola Salmoria and the MAME team +All rights reserved. + +Copyright (c) 2007-2013 Eke-Eke +All rights reserved. + +Redistribution and use of this code or any derivative works are permitted +provided that the following conditions are met: + +* Redistributions may not be sold, nor may they be used in a commercial +product or activity. + +* Redistributions that are modified from the original source must include the +complete source code, including the source code for all components used by a +binary built from the modified sources. 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Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the + library `Frob' (a library for tweaking knobs) written by James Random Hacker. + + , 1 April 1990 + Ty Coon, President of Vice + +That's all there is to it! + + +---------------------------------------------------------------------------------------- + +Gamecube & Wii ports are linked with LIBASND library and includes code distributed under +the following license: + +Copyright (c) 2008 Hermes +All rights reserved. + +Redistribution and use in source and binary forms, with or without modification, are +permitted provided that the following conditions are met: + +- Redistributions of source code must retain the above copyright notice, this list of + conditions and the following disclaimer. +- Redistributions in binary form must reproduce the above copyright notice, this list + of conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. +- The names of the contributors may not be used to endorse or promote products derived + from this software without specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY +EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL +THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, +STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF +THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + +---------------------------------------------------------------------------------------- + + + diff --git a/genplus-gx/Makefile.gc b/genplus-gx/Makefile.gc new file mode 100644 index 0000000000..8eb625ff0a --- /dev/null +++ b/genplus-gx/Makefile.gc @@ -0,0 +1,148 @@ +#--------------------------------------------------------------------------------- +# Clear the implicit built in rules +#--------------------------------------------------------------------------------- +.SUFFIXES: +#--------------------------------------------------------------------------------- +ifeq ($(strip $(DEVKITPPC)),) +$(error "Please set DEVKITPPC in your environment. export DEVKITPPC=devkitPPC) +endif + +include $(DEVKITPPC)/gamecube_rules + +#--------------------------------------------------------------------------------- +# TARGET is the name of the output +# BUILD is the directory where object files & intermediate files will be placed +# SOURCES is a list of directories containing source code +# INCLUDES is a list of directories containing extra header files +#--------------------------------------------------------------------------------- +TARGET := genplus_cube +BUILD := build_cube +SOURCES := core core/m68k core/z80 core/sound core/tremor core/ntsc core/input_hw core/cd_hw core/cart_hw core/cart_hw/svp \ + gx gx/utils gx/gui gx/fileio gx/images gx/sounds +INCLUDES := core core/m68k core/z80 core/sound core/tremor core/ntsc core/input_hw core/cd_hw core/cart_hw core/cart_hw/svp \ + gx gx/utils gx/gui gx/fileio gx/images gx/sounds \ + $(BUILD) + +#--------------------------------------------------------------------------------- +# options for code generation +#--------------------------------------------------------------------------------- + +CFLAGS = -O3 -fomit-frame-pointer --param large-function-growth=800 --param inline-unit-growth=200 -Wall -Winline -Wno-strict-aliasing $(MACHDEP) $(INCLUDE) -DUSE_LIBTREMOR -DDISABLE_MANY_OGG_OPEN_FILES -DUSE_16BPP_RENDERING -DALT_RENDERER +CXXFLAGS = $(CFLAGS) + +LDFLAGS = $(MACHDEP) -Wl,-Map,$(notdir $@).map + +#--------------------------------------------------------------------------------- +# any extra libraries we wish to link with the project +#--------------------------------------------------------------------------------- +LIBS := -lpng -lfat -liso9660 -lasnd -logc -lm -lz + +#--------------------------------------------------------------------------------- +# list of directories containing libraries, this must be the top level containing +# include and lib +#--------------------------------------------------------------------------------- +LIBDIRS := $(PORTLIBS) + +#--------------------------------------------------------------------------------- +# no real need to edit anything past this point unless you need to add additional +# rules for different file extensions +#--------------------------------------------------------------------------------- +ifneq ($(BUILD),$(notdir $(CURDIR))) +#--------------------------------------------------------------------------------- + +export OUTPUT := $(CURDIR)/$(TARGET) + +export VPATH := $(foreach dir,$(SOURCES),$(CURDIR)/$(dir)) \ + $(foreach dir,$(DATA),$(CURDIR)/$(dir)) + +export DEPSDIR := $(CURDIR)/$(BUILD) + +#--------------------------------------------------------------------------------- +# automatically build a list of object files for our project +#--------------------------------------------------------------------------------- +CFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.c))) +CPPFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.cpp))) +sFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.s))) +SFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.S))) +BINFILES := $(foreach dir,$(DATA),$(notdir $(wildcard $(dir)/*.*))) +PNGFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.png))) +PCMFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.pcm))) +OGGFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.ogg))) + +#--------------------------------------------------------------------------------- +# use CXX for linking C++ projects, CC for standard C +#--------------------------------------------------------------------------------- +ifeq ($(strip $(CPPFILES)),) + export LD := $(CC) +else + export LD := $(CXX) +endif + +export OFILES := $(addsuffix .o,$(BINFILES)) \ + $(PNGFILES:.png=.png.o) $(PCMFILES:.pcm=.pcm.o) $(OGGFILES:.ogg=.ogg.o) \ + $(CPPFILES:.cpp=.o) $(CFILES:.c=.o) \ + $(sFILES:.s=.o) $(SFILES:.S=.o) + +#--------------------------------------------------------------------------------- +# build a list of include paths +#--------------------------------------------------------------------------------- +export INCLUDE := $(foreach dir,$(INCLUDES),-I$(CURDIR)/$(dir)) \ + $(foreach dir,$(LIBDIRS),-I$(dir)/include) \ + -I$(CURDIR)/$(BUILD) \ + -I$(LIBOGC_INC) -I$(PORTLIBS)/include + +#--------------------------------------------------------------------------------- +# build a list of library paths +#--------------------------------------------------------------------------------- +export LIBPATHS := $(foreach dir,$(LIBDIRS),-L$(dir)/lib) \ + -L$(LIBOGC_LIB) + +export OUTPUT := $(CURDIR)/$(TARGET) +.PHONY: $(BUILD) clean + +#--------------------------------------------------------------------------------- +$(BUILD): + @[ -d $@ ] || mkdir -p $@ + @make --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile.gc + +#--------------------------------------------------------------------------------- +clean: + @echo clean ... + @rm -fr $(BUILD) $(OUTPUT).elf $(OUTPUT).dol + + +#--------------------------------------------------------------------------------- +else + +DEPENDS := $(OFILES:.o=.d) + +#--------------------------------------------------------------------------------- +# main targets +#--------------------------------------------------------------------------------- +$(OUTPUT).dol: $(OUTPUT).elf +$(OUTPUT).elf: $(OFILES) + +#--------------------------------------------------------------------------------- +# This rule links in binary data with the various extension +#--------------------------------------------------------------------------------- +%.jpg.o : %.jpg + @echo $(notdir $<) + $(bin2o) + +%.png.o : %.png + @echo $(notdir $<) + $(bin2o) + +%.pcm.o : %.pcm + @echo $(notdir $<) + $(bin2o) + +%.ogg.o : %.ogg + @echo $(notdir $<) + $(bin2o) + +-include $(DEPENDS) + +#--------------------------------------------------------------------------------- +endif +#--------------------------------------------------------------------------------- diff --git a/genplus-gx/Makefile.libretro b/genplus-gx/Makefile.libretro new file mode 100644 index 0000000000..2b5174cd39 --- /dev/null +++ b/genplus-gx/Makefile.libretro @@ -0,0 +1,235 @@ +DEBUG = 0 +LOGSOUND = 0 +FRONTEND_SUPPORTS_RGB565 = 1 + +GENPLUS_SRC_DIR := core +LIBRETRO_DIR := libretro + +ifeq ($(platform),) +platform = unix +ifeq ($(shell uname -a),) + platform = win +else ifneq ($(findstring MINGW,$(shell uname -a)),) + platform = win +else ifneq ($(findstring Darwin,$(shell uname -a)),) + platform = osx +else ifneq ($(findstring win,$(shell uname -a)),) + platform = win +endif +endif + +# system platform +system_platform = unix +ifeq ($(shell uname -a),) +EXE_EXT = .exe + system_platform = win +else ifneq ($(findstring Darwin,$(shell uname -a)),) + system_platform = osx +else ifneq ($(findstring MINGW,$(shell uname -a)),) + system_platform = win +endif + +TARGET_NAME := genesis_plus_gx + +ifeq ($(platform), unix) + TARGET := $(TARGET_NAME)_libretro.so + fpic := -fPIC + SHARED := -shared -Wl,--version-script=libretro/link.T -Wl,--no-undefined -lz + ENDIANNESS_DEFINES := -DLSB_FIRST + PLATFORM_DEFINES := -DHAVE_ZLIB +else ifeq ($(platform), osx) + TARGET := $(TARGET_NAME)_libretro.dylib + fpic := -fPIC + SHARED := -dynamiclib -lz + ENDIANNESS_DEFINES := -DLSB_FIRST + PLATFORM_DEFINES := -DHAVE_ZLIB +else ifeq ($(platform), ios) + TARGET := $(TARGET_NAME)_libretro_ios.dylib + fpic := -fPIC + SHARED := -dynamiclib -lz + ENDIANNESS_DEFINES := -DLSB_FIRST + PLATFORM_DEFINES := -DHAVE_ZLIB + + CC = clang -arch armv7 -isysroot $(IOSSDK) +else ifeq ($(platform), qnx) + TARGET := $(TARGET_NAME)_libretro_qnx.so + fpic := -fPIC + SHARED := -lm -shared -Wl,--version-script=libretro/link.T -Wl,--no-undefined -lz + ENDIANNESS_DEFINES := -DLSB_FIRST + PLATFORM_DEFINES := -DHAVE_ZLIB + CC = qcc -Vgcc_ntoarmv7le + AR = qcc -Vgcc_ntoarmv7le + PLATFORM_DEFINES := -D__BLACKBERRY_QNX__ -marm -mcpu=cortex-a9 -mfpu=neon -mfloat-abi=softfp +else ifeq ($(platform), ps3) + TARGET := $(TARGET_NAME)_libretro_ps3.a + CC = $(CELL_SDK)/host-win32/ppu/bin/ppu-lv2-gcc.exe + AR = $(CELL_SDK)/host-win32/ppu/bin/ppu-lv2-ar.exe + PLATFORM_DEFINES := -D__CELLOS_LV2 -DALT_RENDER + STATIC_LINKING = 1 +else ifeq ($(platform), sncps3) + TARGET := $(TARGET_NAME)_libretro_ps3.a + CC = $(CELL_SDK)/host-win32/sn/bin/ps3ppusnc.exe + AR = $(CELL_SDK)/host-win32/sn/bin/ps3snarl.exe + PLATFORM_DEFINES := -D__CELLOS_LV2 -DALT_RENDER + STATIC_LINKING = 1 +else ifeq ($(platform), psl1ght) + TARGET := $(TARGET_NAME)_libretro_psl1ght.a$(EXE_EXT) + CC = $(PS3DEV)/ppu/bin/ppu-gcc$(EXE_EXT) + AR = $(PS3DEV)/ppu/bin/ppu-ar$(EXE_EXT) + PLATFORM_DEFINES := -D__CELLOS_LV2 -DALT_RENDER + STATIC_LINKING = 1 +else ifeq ($(platform), psp1) + TARGET := $(TARGET_NAME)_libretro_psp1.a$(EXE_EXT) + CC = psp-gcc$(EXE_EXT) + AR = psp-ar$(EXE_EXT) + ENDIANNESS_DEFINES := -DLSB_FIRST + PLATFORM_DEFINES := -DPSP + CFLAGS += -G0 + STATIC_LINKING = 1 +else ifeq ($(platform), xenon) + TARGET := $(TARGET_NAME)_libretro_xenon360.a + CC = xenon-gcc$(EXE_EXT) + AR = xenon-ar$(EXE_EXT) + PLATFORM_DEFINES := -D__LIBXENON__ -DALT_RENDER + STATIC_LINKING = 1 +else ifeq ($(platform), ngc) + TARGET := $(TARGET_NAME)_libretro_ngc.a + CC = $(DEVKITPPC)/bin/powerpc-eabi-gcc$(EXE_EXT) + AR = $(DEVKITPPC)/bin/powerpc-eabi-ar$(EXE_EXT) + PLATFORM_DEFINES := -DGEKKO -DHW_DOL -mrvl -mcpu=750 -meabi -mhard-float -DALT_RENDER + STATIC_LINKING = 1 +else ifeq ($(platform), wii) + TARGET := $(TARGET_NAME)_libretro_wii.a + CC = $(DEVKITPPC)/bin/powerpc-eabi-gcc$(EXE_EXT) + AR = $(DEVKITPPC)/bin/powerpc-eabi-ar$(EXE_EXT) + PLATFORM_DEFINES := -DGEKKO -DHW_RVL -mrvl -mcpu=750 -meabi -mhard-float -DALT_RENDER + STATIC_LINKING = 1 +else + TARGET := $(TARGET_NAME)_libretro.dll + CC = gcc + SHARED := -shared -static-libgcc -static-libstdc++ -Wl,--version-script=libretro/link.T -Wl,--no-undefined -lz + + ENDIANNESS_DEFINES := -DLSB_FIRST + PLATFORM_DEFINES := -DHAVE_ZLIB +endif + +ifeq ($(DEBUG), 1) + CFLAGS += -O0 -g +else +ifeq ($(platform),qnx) + CFLAGS += -Os -DNDEBUG +else + CFLAGS += -O3 -DNDEBUG +endif +endif + +LIBRETRO_SRC := $(GENPLUS_SRC_DIR)/genesis.c \ + $(GENPLUS_SRC_DIR)/vdp_ctrl.c \ + $(GENPLUS_SRC_DIR)/vdp_render.c \ + $(GENPLUS_SRC_DIR)/system.c \ + $(GENPLUS_SRC_DIR)/io_ctrl.c \ + $(GENPLUS_SRC_DIR)/loadrom.c \ + $(GENPLUS_SRC_DIR)/mem68k.c \ + $(GENPLUS_SRC_DIR)/state.c \ + $(GENPLUS_SRC_DIR)/memz80.c \ + $(GENPLUS_SRC_DIR)/membnk.c \ + $(GENPLUS_SRC_DIR)/input_hw/activator.c \ + $(GENPLUS_SRC_DIR)/input_hw/gamepad.c \ + $(GENPLUS_SRC_DIR)/input_hw/input.c \ + $(GENPLUS_SRC_DIR)/input_hw/lightgun.c \ + $(GENPLUS_SRC_DIR)/input_hw/mouse.c \ + $(GENPLUS_SRC_DIR)/input_hw/paddle.c \ + $(GENPLUS_SRC_DIR)/input_hw/sportspad.c \ + $(GENPLUS_SRC_DIR)/input_hw/teamplayer.c \ + $(GENPLUS_SRC_DIR)/input_hw/xe_a1p.c \ + $(GENPLUS_SRC_DIR)/input_hw/terebi_oekaki.c \ + $(GENPLUS_SRC_DIR)/cd_hw/cd_cart.c \ + $(GENPLUS_SRC_DIR)/cd_hw/cdc.c \ + $(GENPLUS_SRC_DIR)/cd_hw/cdd.c \ + $(GENPLUS_SRC_DIR)/cd_hw/gfx.c \ + $(GENPLUS_SRC_DIR)/cd_hw/pcm.c \ + $(GENPLUS_SRC_DIR)/cd_hw/scd.c \ + $(GENPLUS_SRC_DIR)/cart_hw/areplay.c \ + $(GENPLUS_SRC_DIR)/cart_hw/md_cart.c \ + $(GENPLUS_SRC_DIR)/cart_hw/sms_cart.c \ + $(GENPLUS_SRC_DIR)/cart_hw/eeprom_93c.c \ + $(GENPLUS_SRC_DIR)/cart_hw/eeprom_i2c.c \ + $(GENPLUS_SRC_DIR)/cart_hw/eeprom_spi.c \ + $(GENPLUS_SRC_DIR)/cart_hw/ggenie.c \ + $(GENPLUS_SRC_DIR)/cart_hw/sram.c \ + $(GENPLUS_SRC_DIR)/cart_hw/svp/ssp16.c \ + $(GENPLUS_SRC_DIR)/cart_hw/svp/svp.c \ + $(GENPLUS_SRC_DIR)/ntsc/md_ntsc.c \ + $(GENPLUS_SRC_DIR)/ntsc/sms_ntsc.c \ + $(GENPLUS_SRC_DIR)/sound/eq.c \ + $(GENPLUS_SRC_DIR)/sound/sound.c \ + $(GENPLUS_SRC_DIR)/sound/ym2612.c \ + $(GENPLUS_SRC_DIR)/sound/ym2413.c \ + $(GENPLUS_SRC_DIR)/sound/sn76489.c \ + $(GENPLUS_SRC_DIR)/sound/blip_buf.c \ + $(GENPLUS_SRC_DIR)/z80/z80.c \ + $(GENPLUS_SRC_DIR)/m68k/m68kcpu.c \ + $(GENPLUS_SRC_DIR)/m68k/s68kcpu.c \ + $(LIBRETRO_DIR)/libretro.c + +LIBRETRO_OBJ := $(LIBRETRO_SRC:.c=.o) + +ifeq ($(LOGSOUND), 1) +LIBRETRO_CFLAGS := -DLOGSOUND +endif + +DEFINES := +CFLAGS += $(fpic) $(DEFINES) $(CODE_DEFINES) + +ifeq ($(FRONTEND_SUPPORTS_RGB565), 1) +# if you have a new frontend that supports RGB565 +BPP_DEFINES = -DUSE_16BPP_RENDERING -DFRONTEND_SUPPORTS_RGB565 +else +BPP_DEFINES = -DUSE_15BPP_RENDERING +endif + +LIBRETRO_CFLAGS += -I$(GENPLUS_SRC_DIR) \ + -I$(GENPLUS_SRC_DIR)/sound \ + -I$(GENPLUS_SRC_DIR)/input_hw \ + -I$(GENPLUS_SRC_DIR)/cart_hw \ + -I$(GENPLUS_SRC_DIR)/cd_hw \ + -I$(GENPLUS_SRC_DIR)/cart_hw/svp \ + -I$(GENPLUS_SRC_DIR)/m68k \ + -I$(GENPLUS_SRC_DIR)/z80 \ + -I$(GENPLUS_SRC_DIR)/ntsc \ + -I$(LIBRETRO_DIR) \ + $(BPP_DEFINES) \ + $(ENDIANNESS_DEFINES) \ + $(PLATFORM_DEFINES) \ + -D__LIBRETRO__ + +ifeq ($(platform), qnx) + LIBRETRO_CFLAGS += -D__inline__=inline +else + LIBRETRO_CFLAGS += -DINLINE="static inline" +endif + +LIBRETRO_LIBS := -lm + + +all: $(TARGET) + +%.o: %.c + $(CC) -o $@ -c $< $(CFLAGS) $(LIBRETRO_CFLAGS) + +$(TARGET): $(LIBRETRO_OBJ) +ifeq ($(STATIC_LINKING), 1) + $(AR) rcs $@ $(LIBRETRO_OBJ) +else + $(CC) -o $(TARGET) $(fpic) $(LIBRETRO_OBJ) $(LIBRETRO_LIBS) $(SHARED) +endif + +clean-objs: + rm -f $(LIBRETRO_OBJ) + +clean: + rm -f $(LIBRETRO_OBJ) + rm -f $(TARGET) + +.PHONY: clean clean-objs + diff --git a/genplus-gx/Makefile.wii b/genplus-gx/Makefile.wii new file mode 100644 index 0000000000..10db880708 --- /dev/null +++ b/genplus-gx/Makefile.wii @@ -0,0 +1,148 @@ +#--------------------------------------------------------------------------------- +# Clear the implicit built in rules +#--------------------------------------------------------------------------------- +.SUFFIXES: +#--------------------------------------------------------------------------------- +ifeq ($(strip $(DEVKITPPC)),) +$(error "Please set DEVKITPPC in your environment. export DEVKITPPC=devkitPPC) +endif + +include $(DEVKITPPC)/wii_rules + +#--------------------------------------------------------------------------------- +# TARGET is the name of the output +# BUILD is the directory where object files & intermediate files will be placed +# SOURCES is a list of directories containing source code +# INCLUDES is a list of directories containing extra header files +#--------------------------------------------------------------------------------- +TARGET := genplus_wii +BUILD := build_wii +SOURCES := core core/m68k core/z80 core/sound core/tremor core/ntsc core/input_hw core/cd_hw core/cart_hw core/cart_hw/svp \ + gx gx/utils gx/gui gx/fileio gx/images gx/sounds +INCLUDES := core core/m68k core/z80 core/sound core/tremor core/ntsc core/input_hw core/cd_hw core/cart_hw core/cart_hw/svp \ + gx gx/utils gx/gui gx/fileio gx/images gx/sounds \ + $(BUILD) + +#--------------------------------------------------------------------------------- +# options for code generation +#--------------------------------------------------------------------------------- + +CFLAGS = -O3 -fomit-frame-pointer --param large-function-growth=800 --param inline-unit-growth=200 -Wall -Winline -Wno-strict-aliasing $(MACHDEP) $(INCLUDE) -DUSE_LIBTREMOR -DUSE_16BPP_RENDERING -DALT_RENDERER -DHW_RVL +CXXFLAGS = $(CFLAGS) + +LDFLAGS = $(MACHDEP) -Wl,-Map,$(notdir $@).map + +#--------------------------------------------------------------------------------- +# any extra libraries we wish to link with the project +#--------------------------------------------------------------------------------- +LIBS := -lpng -ldi -lfat -liso9660 -lasnd -lwiiuse -lbte -logc -lm -lz + +#--------------------------------------------------------------------------------- +# list of directories containing libraries, this must be the top level containing +# include and lib +#--------------------------------------------------------------------------------- +LIBDIRS := $(PORTLIBS) + +#--------------------------------------------------------------------------------- +# no real need to edit anything past this point unless you need to add additional +# rules for different file extensions +#--------------------------------------------------------------------------------- +ifneq ($(BUILD),$(notdir $(CURDIR))) +#--------------------------------------------------------------------------------- + +export OUTPUT := $(CURDIR)/$(TARGET) + +export VPATH := $(foreach dir,$(SOURCES),$(CURDIR)/$(dir)) \ + $(foreach dir,$(DATA),$(CURDIR)/$(dir)) + +export DEPSDIR := $(CURDIR)/$(BUILD) + +#--------------------------------------------------------------------------------- +# automatically build a list of object files for our project +#--------------------------------------------------------------------------------- +CFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.c))) +CPPFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.cpp))) +sFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.s))) +SFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.S))) +BINFILES := $(foreach dir,$(DATA),$(notdir $(wildcard $(dir)/*.*))) +PNGFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.png))) +PCMFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.pcm))) +OGGFILES := $(foreach dir,$(SOURCES),$(notdir $(wildcard $(dir)/*.ogg))) + +#--------------------------------------------------------------------------------- +# use CXX for linking C++ projects, CC for standard C +#--------------------------------------------------------------------------------- +ifeq ($(strip $(CPPFILES)),) + export LD := $(CC) +else + export LD := $(CXX) +endif + +export OFILES := $(addsuffix .o,$(BINFILES)) \ + $(PNGFILES:.png=.png.o) $(PCMFILES:.pcm=.pcm.o) $(OGGFILES:.ogg=.ogg.o) \ + $(CPPFILES:.cpp=.o) $(CFILES:.c=.o) \ + $(sFILES:.s=.o) $(SFILES:.S=.o) + +#--------------------------------------------------------------------------------- +# build a list of include paths +#--------------------------------------------------------------------------------- +export INCLUDE := $(foreach dir,$(INCLUDES),-I$(CURDIR)/$(dir)) \ + $(foreach dir,$(LIBDIRS),-I$(dir)/include) \ + -I$(CURDIR)/$(BUILD) \ + -I$(LIBOGC_INC) -I$(PORTLIBS)/include + +#--------------------------------------------------------------------------------- +# build a list of library paths +#--------------------------------------------------------------------------------- +export LIBPATHS := $(foreach dir,$(LIBDIRS),-L$(dir)/lib) \ + -L$(LIBOGC_LIB) + +export OUTPUT := $(CURDIR)/$(TARGET) +.PHONY: $(BUILD) clean + +#--------------------------------------------------------------------------------- +$(BUILD): + @[ -d $@ ] || mkdir -p $@ + @make --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile.wii + +#--------------------------------------------------------------------------------- +clean: + @echo clean ... + @rm -fr $(BUILD) $(OUTPUT).elf $(OUTPUT).dol + + +#--------------------------------------------------------------------------------- +else + +DEPENDS := $(OFILES:.o=.d) + +#--------------------------------------------------------------------------------- +# main targets +#--------------------------------------------------------------------------------- +$(OUTPUT).dol: $(OUTPUT).elf +$(OUTPUT).elf: $(OFILES) + +#--------------------------------------------------------------------------------- +# This rule links in binary data with the various extension +#--------------------------------------------------------------------------------- +%.jpg.o : %.jpg + @echo $(notdir $<) + $(bin2o) + +%.png.o : %.png + @echo $(notdir $<) + $(bin2o) + +%.pcm.o : %.pcm + @echo $(notdir $<) + $(bin2o) + +%.ogg.o : %.ogg + @echo $(notdir $<) + $(bin2o) + +-include $(DEPENDS) + +#--------------------------------------------------------------------------------- +endif +#--------------------------------------------------------------------------------- diff --git a/genplus-gx/cinterface/cinterface.c b/genplus-gx/cinterface/cinterface.c new file mode 100644 index 0000000000..13cbb11471 --- /dev/null +++ b/genplus-gx/cinterface/cinterface.c @@ -0,0 +1,175 @@ +#include +#include +#include + +#ifdef _MSC_VER +#define snprintf _snprintf +#endif + +#include "shared.h" +#include "libretro.h" +#include "state.h" +#include "genesis.h" +#include "md_ntsc.h" +#include "sms_ntsc.h" + +char GG_ROM[256] = "GG_ROM"; +char AR_ROM[256] = "AR_ROM"; +char SK_ROM[256] = "SK_ROM"; +char SK_UPMEM[256] = "SK_UPMEM"; +char GG_BIOS[256] = "GG_BIOS"; +char CD_BIOS_EU[256] = "CD_BIOS_EU"; +char CD_BIOS_US[256] = "CD_BIOS_US"; +char CD_BIOS_JP[256] = "CD_BIOS_JP"; +char MS_BIOS_US[256] = "MS_BIOS_US"; +char MS_BIOS_EU[256] = "MS_BIOS_EU"; +char MS_BIOS_JP[256] = "MS_BIOS_JP"; + +char romextension[4]; + +static uint32_t bitmap_data_[1024 * 512]; + +static int16 soundbuffer[4096]; +static int nsamples; + +#define GPGX_EX __declspec(dllexport) + +static int vwidth; +static int vheight; + +static void update_viewport(void) +{ + vwidth = bitmap.viewport.w + (bitmap.viewport.x * 2); + vheight = bitmap.viewport.h + (bitmap.viewport.y * 2); + + if (config.ntsc) + { + if (reg[12] & 1) + vwidth = MD_NTSC_OUT_WIDTH(vwidth); + else + vwidth = SMS_NTSC_OUT_WIDTH(vwidth); + } + + if (config.render && interlaced) + { + vheight = vheight * 2; + } +} + +GPGX_EX void gpgx_get_video(int *w, int *h, int *pitch, void **buffer) +{ + if (w) + *w = vwidth; + if (h) + *h = vheight; + if (pitch) + *pitch = bitmap.pitch; + if (buffer) + *buffer = bitmap.data; +} + +GPGX_EX void gpgx_get_audio(int *n, void **buffer) +{ + if (n) + *n = nsamples; + if (buffer) + *buffer = soundbuffer; +} + + +void osd_input_update(void) +{ +} + +int (*load_archive_cb)(const char *filename, unsigned char *buffer, int maxsize); + +// return 0 on failure, else actual loaded size +// extension, if not null, should be populated with the extension of the file loaded +// (up to 3 chars and null terminator, no more) +int load_archive(char *filename, unsigned char *buffer, int maxsize, char *extension) +{ + if (extension) + memcpy(extension, romextension, 4); + + return load_archive_cb(filename, buffer, maxsize); +} + +GPGX_EX void gpgx_advance(void) +{ + if (system_hw == SYSTEM_MCD) + system_frame_scd(0); + else if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + system_frame_gen(0); + else + system_frame_sms(0); + + if (bitmap.viewport.changed & 1) + { + bitmap.viewport.changed &= ~1; + update_viewport(); + } + + nsamples = audio_update(soundbuffer); +} + + +GPGX_EX int gpgx_init(const char *feromextension, int (*feload_archive_cb)(const char *filename, unsigned char *buffer, int maxsize)) +{ + memset(&bitmap, 0, sizeof(bitmap)); + memset(bitmap_data_, 0, sizeof(bitmap_data_)); + + strncpy(romextension, feromextension, 3); + romextension[3] = 0; + + load_archive_cb = feload_archive_cb; + + bitmap.width = 1024; + bitmap.height = 512; + bitmap.pitch = 1024 * 4; + bitmap.data = (uint8_t *)bitmap_data_; + + /* sound options */ + config.psg_preamp = 150; + config.fm_preamp= 100; + config.hq_fm = 1; /* high-quality resampling */ + config.psgBoostNoise = 1; + config.filter= 0; /* no filter */ + config.lp_range = 0x9999; /* 0.6 in 16.16 fixed point */ + config.low_freq = 880; + config.high_freq= 5000; + config.lg = 1.0; + config.mg = 1.0; + config.hg = 1.0; + config.dac_bits = 14; /* MAX DEPTH */ + config.ym2413= 2; /* AUTO */ + config.mono = 0; /* STEREO output */ + + /* system options */ + config.system= 0; /* AUTO */ + config.region_detect = 0; /* AUTO */ + config.vdp_mode = 0; /* AUTO */ + config.master_clock= 0; /* AUTO */ + config.force_dtack = 0; + config.addr_error = 1; + config.bios = 0; + config.lock_on = 0; + + /* video options */ + config.overscan = 0; + config.gg_extra = 0; + config.ntsc = 0; + config.render= 0; + + if (!load_rom("PRIMARY_ROM")) + return 0; + + audio_init(44100, 0); + system_init(); + system_reset(); + + update_viewport(); + + return 1; +} + + diff --git a/genplus-gx/core/cart_hw/areplay.c b/genplus-gx/core/cart_hw/areplay.c new file mode 100644 index 0000000000..c27f8d86e0 --- /dev/null +++ b/genplus-gx/core/cart_hw/areplay.c @@ -0,0 +1,319 @@ +/**************************************************************************** + * Genesis Plus + * Action Replay / Pro Action Replay emulation + * + * Copyright (C) 2009-2011 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + +#define TYPE_PRO1 0x12 +#define TYPE_PRO2 0x22 + +static struct +{ + uint8 enabled; + uint8 status; + uint8 *rom; + uint8 *ram; + uint16 regs[13]; + uint16 old[4]; + uint16 data[4]; + uint32 addr[4]; +} action_replay; + +static void ar_write_regs(uint32 address, uint32 data); +static void ar_write_regs_2(uint32 address, uint32 data); +static void ar_write_ram_8(uint32 address, uint32 data); + +void areplay_init(void) +{ + int size; + FILE *f; + + memset(&action_replay,0,sizeof(action_replay)); + + /* store Action replay ROM (max. 128k) & RAM (64k) above cartridge ROM + SRAM area */ + if (cart.romsize > 0x810000) return; + action_replay.rom = cart.rom + 0x810000; + action_replay.ram = cart.rom + 0x830000; + + /* Open Action Replay ROM */ + f = fopen(AR_ROM,"rb"); + if (f == NULL) return; + + /* ROM size */ + fseek(f, 0, SEEK_END); + size = ftell(f); + fseek(f, 0, SEEK_SET); + + /* detect Action Replay board type */ + switch (size) + { + case 0x8000: + { + /* normal Action Replay (32K) */ + action_replay.enabled = TYPE_AR; + + /* internal registers mapped at $010000-$01ffff */ + m68k.memory_map[0x01].write16 = ar_write_regs; + break; + } + + case 0x10000: + case 0x20000: + { + /* read Stack Pointer */ + uint8 sp[4]; + fread(&sp, 4, 1, f); + fseek(f, 0, SEEK_SET); + + /* Detect board version */ + if (sp[1] == 0x42) + { + /* PRO Action Replay 1 (64/128K) */ + action_replay.enabled = TYPE_PRO1; + + /* internal registers mapped at $010000-$01ffff */ + m68k.memory_map[0x01].write16 = ar_write_regs; + } + else if (sp[1] == 0x60) + { + /* PRO Action Replay 2 (64K) */ + action_replay.enabled = TYPE_PRO2; + + /* internal registers mapped at $100000-$10ffff */ + m68k.memory_map[0x10].write16 = ar_write_regs_2; + } + + /* internal RAM (64k), mapped at $420000-$42ffff or $600000-$60ffff */ + if (action_replay.enabled) + { + m68k.memory_map[sp[1]].base = action_replay.ram; + m68k.memory_map[sp[1]].read8 = NULL; + m68k.memory_map[sp[1]].read16 = NULL; + m68k.memory_map[sp[1]].write8 = ar_write_ram_8; + m68k.memory_map[sp[1]].write16 = NULL; + } + break; + } + + default: + { + break; + } + } + + if (action_replay.enabled) + { + /* Load ROM */ + int i = 0; + for (i=0; i> 1; + if (offset > 12) + { + m68k_unused_16_w(address,data); + return; + } + + /* update internal register */ + action_replay.regs[offset] = data; + + /* MODE register */ + if (action_replay.regs[3] == 0xffff) + { + /* check switch status */ + if (action_replay.status == AR_SWITCH_ON) + { + /* reset existing patches */ + areplay_set_status(AR_SWITCH_OFF); + areplay_set_status(AR_SWITCH_ON); + } + + /* enable Cartridge ROM */ + m68k.memory_map[0].base = cart.rom; + } +} + +static void ar_write_regs_2(uint32 address, uint32 data) +{ + /* enable Cartridge ROM */ + if (((address & 0xff) == 0x78) && (data == 0xffff)) + { + m68k.memory_map[0].base = cart.rom; + } +} + +static void ar_write_ram_8(uint32 address, uint32 data) +{ + /* byte writes are handled as word writes, with LSB duplicated in MSB (/LWR is not used) */ + *(uint16 *)(action_replay.ram + (address & 0xfffe)) = (data | (data << 8)); +} + diff --git a/genplus-gx/core/cart_hw/areplay.h b/genplus-gx/core/cart_hw/areplay.h new file mode 100644 index 0000000000..5f1befdab1 --- /dev/null +++ b/genplus-gx/core/cart_hw/areplay.h @@ -0,0 +1,52 @@ +/**************************************************************************** + * Genesis Plus + * DATEL Action Replay / Pro Action Replay emulation + * + * Copyright (C) 2009-2011 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _AREPLAY_H_ +#define _AREPLAY_H_ + +#define AR_SWITCH_OFF (0) +#define AR_SWITCH_ON (1) +#define AR_SWITCH_TRAINER (2) + +extern void areplay_init(void); +extern void areplay_shutdown(void); +extern void areplay_reset(int hard); +extern void areplay_set_status(int status); +extern int areplay_get_status(void); + +#endif diff --git a/genplus-gx/core/cart_hw/eeprom_93c.c b/genplus-gx/core/cart_hw/eeprom_93c.c new file mode 100644 index 0000000000..3e0a64f81d --- /dev/null +++ b/genplus-gx/core/cart_hw/eeprom_93c.c @@ -0,0 +1,249 @@ +/**************************************************************************** + * Genesis Plus + * Microwire Serial EEPROM (93C46 only) support + * + * Copyright (C) 2011 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "eeprom_93c.h" + +/* fixed board implementation */ +#define BIT_DATA (0) +#define BIT_CLK (1) +#define BIT_CS (2) + + +T_EEPROM_93C eeprom_93c; + +void eeprom_93c_init() +{ + /* default eeprom state */ + memset(&eeprom_93c, 0, sizeof(T_EEPROM_93C)); + eeprom_93c.data = 1; + eeprom_93c.state = WAIT_START; + sram.custom = 3; +} + +void eeprom_93c_write(unsigned char data) +{ + /* Make sure CS is HIGH */ + if (data & (1 << BIT_CS)) + { + /* Data latched on CLK postive edge */ + if ((data & (1 << BIT_CLK)) && !eeprom_93c.clk) + { + /* Current EEPROM state */ + switch (eeprom_93c.state) + { + case WAIT_START: + { + /* Wait for START bit */ + if (data & (1 << BIT_DATA)) + { + eeprom_93c.opcode = 0; + eeprom_93c.cycles = 0; + eeprom_93c.state = GET_OPCODE; + } + break; + } + + case GET_OPCODE: + { + /* 8-bit buffer (opcode + address) */ + eeprom_93c.opcode |= ((data >> BIT_DATA) & 1) << (7 - eeprom_93c.cycles); + eeprom_93c.cycles++; + + if (eeprom_93c.cycles == 8) + { + /* Decode instruction */ + switch ((eeprom_93c.opcode >> 6) & 3) + { + case 1: + { + /* WRITE */ + eeprom_93c.buffer = 0; + eeprom_93c.cycles = 0; + eeprom_93c.state = WRITE_WORD; + break; + } + + case 2: + { + /* READ */ + eeprom_93c.buffer = *(uint16 *)(sram.sram + ((eeprom_93c.opcode & 0x3F) << 1)); + eeprom_93c.cycles = 0; + eeprom_93c.state = READ_WORD; + + /* Force DATA OUT */ + eeprom_93c.data = 0; + break; + } + + case 3: + { + /* ERASE */ + if (eeprom_93c.we) + { + *(uint16 *)(sram.sram + ((eeprom_93c.opcode & 0x3F) << 1)) = 0xFFFF; + } + + /* wait for next command */ + eeprom_93c.state = WAIT_STANDBY; + break; + } + + default: + { + /* special command */ + switch ((eeprom_93c.opcode >> 4) & 3) + { + case 1: + { + /* WRITE ALL */ + eeprom_93c.buffer = 0; + eeprom_93c.cycles = 0; + eeprom_93c.state = WRITE_WORD; + break; + } + + case 2: + { + /* ERASE ALL */ + if (eeprom_93c.we) + { + memset(sram.sram, 0xFF, 128); + } + + /* wait for next command */ + eeprom_93c.state = WAIT_STANDBY; + break; + } + + default: + { + /* WRITE ENABLE/DISABLE */ + eeprom_93c.we = (eeprom_93c.opcode >> 4) & 1; + + /* wait for next command */ + eeprom_93c.state = WAIT_STANDBY; + break; + } + } + break; + } + } + } + break; + } + + case WRITE_WORD: + { + /* 16-bit data buffer */ + eeprom_93c.buffer |= ((data >> BIT_DATA) & 1) << (15 - eeprom_93c.cycles); + eeprom_93c.cycles++; + + if (eeprom_93c.cycles == 16) + { + /* check EEPROM write protection */ + if (eeprom_93c.we) + { + if (eeprom_93c.opcode & 0x40) + { + /* write one word */ + *(uint16 *)(sram.sram + ((eeprom_93c.opcode & 0x3F) << 1)) = eeprom_93c.buffer; + } + else + { + /* write 64 words */ + int i; + for (i=0; i<64; i++) + { + *(uint16 *)(sram.sram + (i << 1)) = eeprom_93c.buffer; + + } + } + } + + /* wait for next command */ + eeprom_93c.state = WAIT_STANDBY; + } + break; + } + + case READ_WORD: + { + /* set DATA OUT */ + eeprom_93c.data = ((eeprom_93c.buffer >> (15 - eeprom_93c.cycles)) & 1); + eeprom_93c.cycles++; + + if (eeprom_93c.cycles == 16) + { + /* read next word (93C46B) */ + eeprom_93c.opcode++; + eeprom_93c.cycles = 0; + eeprom_93c.buffer = *(uint16 *)(sram.sram + ((eeprom_93c.opcode & 0x3F) << 1)); + } + break; + } + + default: + { + /* wait for STANDBY mode */ + break; + } + } + } + } + else + { + /* CS HIGH->LOW transition */ + if (eeprom_93c.cs) + { + /* standby mode */ + eeprom_93c.data = 1; + eeprom_93c.state = WAIT_START; + } + } + + /* Update input lines */ + eeprom_93c.cs = (data >> BIT_CS) & 1; + eeprom_93c.clk = (data >> BIT_CLK) & 1; +} + +unsigned char eeprom_93c_read(void) +{ + return ((eeprom_93c.cs << BIT_CS) | (eeprom_93c.data << BIT_DATA) | (1 << BIT_CLK)); +} + diff --git a/genplus-gx/core/cart_hw/eeprom_93c.h b/genplus-gx/core/cart_hw/eeprom_93c.h new file mode 100644 index 0000000000..6c4e6e3f04 --- /dev/null +++ b/genplus-gx/core/cart_hw/eeprom_93c.h @@ -0,0 +1,72 @@ +/**************************************************************************** + * Genesis Plus + * Microwire Serial EEPROM (93C46 only) support + * + * Copyright (C) 2011 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _EEPROM_93C_H_ +#define _EEPROM_93C_H_ + +typedef enum +{ + WAIT_STANDBY, + WAIT_START, + GET_OPCODE, + WRITE_WORD, + READ_WORD +} T_STATE_93C; + +typedef struct +{ + uint8 enabled; /* 1: chip enabled */ + uint8 cs; /* CHIP SELECT line state */ + uint8 clk; /* CLK line state */ + uint8 data; /* DATA OUT line state */ + uint8 cycles; /* current operation cycle */ + uint8 we; /* 1: write enabled */ + uint8 opcode; /* 8-bit opcode + address */ + uint16 buffer; /* 16-bit data buffer */ + T_STATE_93C state; /* current operation state */ +} T_EEPROM_93C; + +/* global variables */ +extern T_EEPROM_93C eeprom_93c; + +/* Function prototypes */ +extern void eeprom_93c_init(); +extern void eeprom_93c_write(unsigned char data); +extern unsigned char eeprom_93c_read(void); + +#endif diff --git a/genplus-gx/core/cart_hw/eeprom_i2c.c b/genplus-gx/core/cart_hw/eeprom_i2c.c new file mode 100644 index 0000000000..12c4bdd466 --- /dev/null +++ b/genplus-gx/core/cart_hw/eeprom_i2c.c @@ -0,0 +1,621 @@ +/**************************************************************************** + * Genesis Plus + * I2C Serial EEPROM (24Cxx) support + * + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + +#define GAME_CNT 28 + +/* this defines the type of EEPROM inside the game cartridge as Backup RAM + * + * Here are some notes from 8BitWizard (http://www.spritesmind.net/_GenDev/forum): + * + * Mode 1 (7-bit) - the chip takes a single byte with a 7-bit memory address and a R/W bit (24C01) + * Mode 2 (8-bit) - the chip takes a 7-bit device address and R/W bit followed by an 8-bit memory address; + * the device address may contain up to three more memory address bits (24C01 - 24C16). + * You can also string eight 24C01, four 24C02, two 24C08, or various combinations, set their address config lines correctly, + * and the result appears exactly the same as a 24C16 + * Mode 3 (16-bit) - the chip takes a 7-bit device address and R/W bit followed by a 16-bit memory address (24C32 and larger) + * + * Also, while most 24Cxx are addressed at 200000-2FFFFF, I have found two different ways of mapping the control lines. + * EA uses SDA on D7 (read/write) and SCL on D6 (write only), and I have found boards using different mapping (I think Accolade) + * which uses D1-read=SDA, D0-write=SDA, D1-write=SCL. Accolade also has a custom-chip mapper which may even use a third method. + */ + +typedef struct +{ + uint8 address_bits; /* number of bits needed to address memory: 7, 8 or 16 */ + uint16 size_mask; /* depends on the max size of the memory (in bytes) */ + uint16 pagewrite_mask; /* depends on the maximal number of bytes that can be written in a single write cycle */ + uint32 sda_in_adr; /* 68000 memory address mapped to SDA_IN */ + uint32 sda_out_adr; /* 68000 memory address mapped to SDA_OUT */ + uint32 scl_adr; /* 68000 memory address mapped to SCL */ + uint8 sda_in_bit; /* bit offset for SDA_IN */ + uint8 sda_out_bit; /* bit offset for SDA_OUT */ + uint8 scl_bit; /* bit offset for SCL */ +} T_CONFIG_I2C; + +typedef enum +{ + STAND_BY = 0, + WAIT_STOP, + GET_SLAVE_ADR, + GET_WORD_ADR_7BITS, + GET_WORD_ADR_HIGH, + GET_WORD_ADR_LOW, + WRITE_DATA, + READ_DATA +} T_STATE_I2C; + +typedef struct +{ + uint8 sda; /* current /SDA line state */ + uint8 scl; /* current /SCL line state */ + uint8 old_sda; /* previous /SDA line state */ + uint8 old_scl; /* previous /SCL line state */ + uint8 cycles; /* current operation cycle number (0-9) */ + uint8 rw; /* operation type (1:READ, 0:WRITE) */ + uint16 slave_mask; /* device address (shifted by the memory address width)*/ + uint16 word_address; /* memory address */ + T_STATE_I2C state; /* current operation state */ + T_CONFIG_I2C config; /* EEPROM characteristics for this game */ +} T_EEPROM_I2C; + +typedef struct +{ + char game_id[16]; + uint16 chk; + T_CONFIG_I2C config; +} T_GAME_ENTRY; + +static const T_GAME_ENTRY database[GAME_CNT] = +{ + /* ACCLAIM mappers */ + /* 24C02 (old mapper) */ + {{"T-081326" }, 0, {8, 0xFF, 0xFF, 0x200001, 0x200001, 0x200001, 0, 1, 1}}, /* NBA Jam (UE) */ + {{"T-81033" }, 0, {8, 0xFF, 0xFF, 0x200001, 0x200001, 0x200001, 0, 1, 1}}, /* NBA Jam (J) */ + /* 24C02 */ + {{"T-081276" }, 0, {8, 0xFF, 0xFF, 0x200001, 0x200001, 0x200000, 0, 0, 0}}, /* NFL Quarterback Club */ + /* 24C04 */ + {{"T-81406" }, 0, {8, 0x1FF, 0x1FF, 0x200001, 0x200001, 0x200000, 0, 0, 0}}, /* NBA Jam TE */ + /* 24C16 */ + {{"T-081586" }, 0, {8, 0x7FF, 0x7FF, 0x200001, 0x200001, 0x200000, 0, 0, 0}}, /* NFL Quarterback Club '96 */ + /* 24C65 */ + {{"T-81576" }, 0, {16, 0x1FFF, 0x1FFF, 0x200001, 0x200001, 0x200000, 0, 0, 0}}, /* College Slam */ + {{"T-81476" }, 0, {16, 0x1FFF, 0x1FFF, 0x200001, 0x200001, 0x200000, 0, 0, 0}}, /* Frank Thomas Big Hurt Baseball */ + + /* EA mapper (X24C01 only) */ + {{"T-50176" }, 0, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 7, 7, 6}}, /* Rings of Power */ + {{"T-50396" }, 0, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 7, 7, 6}}, /* NHLPA Hockey 93 */ + {{"T-50446" }, 0, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 7, 7, 6}}, /* John Madden Football 93 */ + {{"T-50516" }, 0, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 7, 7, 6}}, /* John Madden Football 93 (Championship Ed.) */ + {{"T-50606" }, 0, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 7, 7, 6}}, /* Bill Walsh College Football */ + + /* SEGA mapper (X24C01 only) */ + {{"T-12046" }, 0xAD23, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 0, 0, 1}}, /* Megaman - The Wily Wars */ + {{"T-12053" }, 0xEA80, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 0, 0, 1}}, /* Rockman Mega World [Alt] */ + {{"MK-1215" }, 0, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 0, 0, 1}}, /* Evander 'Real Deal' Holyfield's Boxing */ + {{"MK-1228" }, 0, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 0, 0, 1}}, /* Greatest Heavyweights of the Ring (U) */ + {{"G-5538" }, 0, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 0, 0, 1}}, /* Greatest Heavyweights of the Ring (J) */ + {{"PR-1993" }, 0, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 0, 0, 1}}, /* Greatest Heavyweights of the Ring (E) */ + {{"G-4060" }, 0, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 0, 0, 1}}, /* Wonderboy in Monster World */ + {{"00001211-00"}, 0, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 0, 0, 1}}, /* Sports Talk Baseball */ + {{"00004076-00"}, 0, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 0, 0, 1}}, /* Honoo no Toukyuuji Dodge Danpei */ + {{"G-4524" }, 0, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 0, 0, 1}}, /* Ninja Burai Densetsu */ + {{"00054503-00"}, 0, {7, 0x7F, 0x7F, 0x200001, 0x200001, 0x200001, 0, 0, 1}}, /* Game Toshokan */ + + /* CODEMASTERS mapper */ + /* 24C08 */ + {{"T-120106" }, 0, {8, 0x3FF, 0x3FF, 0x300000, 0x380001, 0x300000, 0, 7, 1}}, /* Brian Lara Cricket */ + {{"00000000-00"}, 0xCEE0, {8, 0x3FF, 0x3FF, 0x300000, 0x380001, 0x300000, 0, 7, 1}}, /* Micro Machines Military */ + /* 24C16 */ + {{"T-120096" }, 0, {8, 0x7FF, 0x7FF, 0x300000, 0x380001, 0x300000, 0, 7, 1}}, /* Micro Machines 2 - Turbo Tournament */ + {{"00000000-00"}, 0x2C41, {8, 0x7FF, 0x7FF, 0x300000, 0x380001, 0x300000, 0, 7, 1}}, /* Micro Machines Turbo Tournament 96 */ + /* 24C65 */ + {{"T-120146-50"}, 0, {16, 0x1FFF, 0x1FFF, 0x300000, 0x380001, 0x300000, 0, 7, 1}} /* Brian Lara Cricket 96, Shane Warne Cricket */ +}; + +static T_EEPROM_I2C eeprom_i2c; + +static unsigned int eeprom_i2c_read_byte(unsigned int address); +static unsigned int eeprom_i2c_read_word(unsigned int address); +static void eeprom_i2c_write_byte(unsigned int address, unsigned int data); +static void eeprom_i2c_write_word(unsigned int address, unsigned int data); + +void eeprom_i2c_init() +{ + int i = 0; + + /* initialize eeprom */ + memset(&eeprom_i2c, 0, sizeof(T_EEPROM_I2C)); + eeprom_i2c.sda = eeprom_i2c.old_sda = 1; + eeprom_i2c.scl = eeprom_i2c.old_scl = 1; + eeprom_i2c.state = STAND_BY; + + /* no eeprom by default */ + sram.custom = 0; + + /* look into game database */ + while (i> 16].read8 = eeprom_i2c_read_byte; + m68k.memory_map[eeprom_i2c.config.sda_out_adr >> 16].read16 = eeprom_i2c_read_word; + m68k.memory_map[eeprom_i2c.config.sda_in_adr >> 16].read8 = eeprom_i2c_read_byte; + m68k.memory_map[eeprom_i2c.config.sda_in_adr >> 16].read16 = eeprom_i2c_read_word; + m68k.memory_map[eeprom_i2c.config.scl_adr >> 16].write8 = eeprom_i2c_write_byte; + m68k.memory_map[eeprom_i2c.config.scl_adr >> 16].write16 = eeprom_i2c_write_word; + zbank_memory_map[eeprom_i2c.config.sda_out_adr >> 16].read = eeprom_i2c_read_byte; + zbank_memory_map[eeprom_i2c.config.sda_in_adr >> 16].read = eeprom_i2c_read_byte; + zbank_memory_map[eeprom_i2c.config.scl_adr >> 16].write = eeprom_i2c_write_byte; + } +} + +INLINE void Detect_START() +{ + if (eeprom_i2c.old_scl && eeprom_i2c.scl) + { + if (eeprom_i2c.old_sda && !eeprom_i2c.sda) + { + eeprom_i2c.cycles = 0; + eeprom_i2c.slave_mask = 0; + if (eeprom_i2c.config.address_bits == 7) + { + eeprom_i2c.word_address = 0; + eeprom_i2c.state = GET_WORD_ADR_7BITS; + } + else eeprom_i2c.state = GET_SLAVE_ADR; + } + } +} + +INLINE void Detect_STOP() +{ + if (eeprom_i2c.old_scl && eeprom_i2c.scl) + { + if (!eeprom_i2c.old_sda && eeprom_i2c.sda) + { + eeprom_i2c.state = STAND_BY; + } + } +} + +static void eeprom_i2c_update(void) +{ + /* EEPROM current state */ + switch (eeprom_i2c.state) + { + /* Standby Mode */ + case STAND_BY: + { + Detect_START(); + Detect_STOP(); + break; + } + + /* Suspended Mode */ + case WAIT_STOP: + { + Detect_STOP(); + break; + } + + /* Get Word Address 7 bits: MODE-1 only (24C01) + * and R/W bit + */ + case GET_WORD_ADR_7BITS: + { + Detect_START(); + Detect_STOP(); + + /* look for SCL LOW to HIGH transition */ + if (!eeprom_i2c.old_scl && eeprom_i2c.scl) + { + if (eeprom_i2c.cycles == 0) eeprom_i2c.cycles ++; + } + + + /* look for SCL HIGH to LOW transition */ + if (eeprom_i2c.old_scl && !eeprom_i2c.scl && (eeprom_i2c.cycles > 0)) + { + if (eeprom_i2c.cycles < 8) + { + eeprom_i2c.word_address |= (eeprom_i2c.old_sda << (7 - eeprom_i2c.cycles)); + } + else if (eeprom_i2c.cycles == 8) + { + eeprom_i2c.rw = eeprom_i2c.old_sda; + } + else + { /* ACK CYCLE */ + eeprom_i2c.cycles = 0; + eeprom_i2c.word_address &= eeprom_i2c.config.size_mask; + eeprom_i2c.state = eeprom_i2c.rw ? READ_DATA : WRITE_DATA; + } + + eeprom_i2c.cycles ++; + } + break; + } + + /* Get Slave Address (3bits) : MODE-2 & MODE-3 only (24C01 - 24C512) (0-3bits, depending on the array size) + * or/and Word Address MSB: MODE-2 only (24C04 - 24C16) (0-3bits, depending on the array size) + * and R/W bit + */ + case GET_SLAVE_ADR: + { + Detect_START(); + Detect_STOP(); + + /* look for SCL LOW to HIGH transition */ + if (!eeprom_i2c.old_scl && eeprom_i2c.scl) + { + if (eeprom_i2c.cycles == 0) eeprom_i2c.cycles ++; + } + + /* look for SCL HIGH to LOW transition */ + if (eeprom_i2c.old_scl && !eeprom_i2c.scl && (eeprom_i2c.cycles > 0)) + { + if ((eeprom_i2c.cycles > 4) && (eeprom_i2c.cycles <8)) + { + if ((eeprom_i2c.config.address_bits == 16) || + (eeprom_i2c.config.size_mask < (1 << (15 - eeprom_i2c.cycles)))) + { + /* this is a SLAVE ADDRESS bit */ + eeprom_i2c.slave_mask |= (eeprom_i2c.old_sda << (7 - eeprom_i2c.cycles)); + } + else + { + /* this is a WORD ADDRESS high bit */ + if (eeprom_i2c.old_sda) eeprom_i2c.word_address |= (1 << (15 - eeprom_i2c.cycles)); + else eeprom_i2c.word_address &= ~(1 << (15 - eeprom_i2c.cycles)); + } + } + else if (eeprom_i2c.cycles == 8) eeprom_i2c.rw = eeprom_i2c.old_sda; + else if (eeprom_i2c.cycles > 8) + { + /* ACK CYCLE */ + eeprom_i2c.cycles = 0; + if (eeprom_i2c.config.address_bits == 16) + { + /* two ADDRESS bytes */ + eeprom_i2c.state = eeprom_i2c.rw ? READ_DATA : GET_WORD_ADR_HIGH; + eeprom_i2c.slave_mask <<= 16; + } + else + { + /* one ADDRESS byte */ + eeprom_i2c.state = eeprom_i2c.rw ? READ_DATA : GET_WORD_ADR_LOW; + eeprom_i2c.slave_mask <<= 8; + } + } + + eeprom_i2c.cycles ++; + } + break; + } + + /* Get Word Address MSB (4-8bits depending on the array size) + * MODE-3 only (24C32 - 24C512) + */ + case GET_WORD_ADR_HIGH: + { + Detect_START(); + Detect_STOP(); + + /* look for SCL HIGH to LOW transition */ + if (eeprom_i2c.old_scl && !eeprom_i2c.scl) + { + if (eeprom_i2c.cycles < 9) + { + if ((eeprom_i2c.config.size_mask + 1) < (1 << (17 - eeprom_i2c.cycles))) + { + /* ignored bit: slave mask should be right-shifted by one */ + eeprom_i2c.slave_mask >>= 1; + } + else + { + /* this is a WORD ADDRESS high bit */ + if (eeprom_i2c.old_sda) eeprom_i2c.word_address |= (1 << (16 - eeprom_i2c.cycles)); + else eeprom_i2c.word_address &= ~(1 << (16 - eeprom_i2c.cycles)); + } + + eeprom_i2c.cycles ++; + } + else + { + /* ACK CYCLE */ + eeprom_i2c.cycles = 1; + eeprom_i2c.state = GET_WORD_ADR_LOW; + } + } + break; + } + + /* Get Word Address LSB: 7bits (24C01) or 8bits (24C02-24C512) + * MODE-2 and MODE-3 only (24C01 - 24C512) + */ + case GET_WORD_ADR_LOW: + { + Detect_START(); + Detect_STOP(); + + /* look for SCL HIGH to LOW transition */ + if (eeprom_i2c.old_scl && !eeprom_i2c.scl) + { + if (eeprom_i2c.cycles < 9) + { + if ((eeprom_i2c.config.size_mask + 1) < (1 << (9 - eeprom_i2c.cycles))) + { + /* ignored bit (X24C01): slave mask should be right-shifted by one */ + eeprom_i2c.slave_mask >>= 1; + } + else + { + /* this is a WORD ADDRESS high bit */ + if (eeprom_i2c.old_sda) eeprom_i2c.word_address |= (1 << (8 - eeprom_i2c.cycles)); + else eeprom_i2c.word_address &= ~(1 << (8 - eeprom_i2c.cycles)); + } + + eeprom_i2c.cycles ++; + } + else + { + /* ACK CYCLE */ + eeprom_i2c.cycles = 1; + eeprom_i2c.word_address &= eeprom_i2c.config.size_mask; + eeprom_i2c.state = WRITE_DATA; + } + } + break; + } + + /* + * Read Cycle + */ + case READ_DATA: + { + Detect_START(); + Detect_STOP(); + + /* look for SCL HIGH to LOW transition */ + if (eeprom_i2c.old_scl && !eeprom_i2c.scl) + { + if (eeprom_i2c.cycles < 9) eeprom_i2c.cycles ++; + else + { + eeprom_i2c.cycles = 1; + + /* ACK not received */ + if (eeprom_i2c.old_sda) eeprom_i2c.state = WAIT_STOP; + } + } + break; + } + + /* + * Write Cycle + */ + case WRITE_DATA: + { + Detect_START(); + Detect_STOP(); + + /* look for SCL HIGH to LOW transition */ + if (eeprom_i2c.old_scl && !eeprom_i2c.scl) + { + if (eeprom_i2c.cycles < 9) + { + /* Write DATA bits (max 64kBytes) */ + uint16 sram_address = (eeprom_i2c.slave_mask | eeprom_i2c.word_address) & 0xFFFF; + if (eeprom_i2c.old_sda) sram.sram[sram_address] |= (1 << (8 - eeprom_i2c.cycles)); + else sram.sram[sram_address] &= ~(1 << (8 - eeprom_i2c.cycles)); + + if (eeprom_i2c.cycles == 8) + { + /* WORD ADDRESS is incremented (roll up at maximum pagesize) */ + eeprom_i2c.word_address = (eeprom_i2c.word_address & (0xFFFF - eeprom_i2c.config.pagewrite_mask)) | + ((eeprom_i2c.word_address + 1) & eeprom_i2c.config.pagewrite_mask); + } + + eeprom_i2c.cycles ++; + } + else eeprom_i2c.cycles = 1; /* ACK cycle */ + } + break; + } + } + + eeprom_i2c.old_scl = eeprom_i2c.scl; + eeprom_i2c.old_sda = eeprom_i2c.sda; +} + +static unsigned char eeprom_i2c_out(void) +{ + uint8 sda_out = eeprom_i2c.sda; + + /* EEPROM state */ + switch (eeprom_i2c.state) + { + case READ_DATA: + { + if (eeprom_i2c.cycles < 9) + { + /* Return DATA bits (max 64kBytes) */ + uint16 sram_address = (eeprom_i2c.slave_mask | eeprom_i2c.word_address) & 0xffff; + sda_out = (sram.sram[sram_address] >> (8 - eeprom_i2c.cycles)) & 1; + + if (eeprom_i2c.cycles == 8) + { + /* WORD ADDRESS is incremented (roll up at maximum array size) */ + eeprom_i2c.word_address ++; + eeprom_i2c.word_address &= eeprom_i2c.config.size_mask; + } + } + break; + } + + case GET_WORD_ADR_7BITS: + case GET_SLAVE_ADR: + case GET_WORD_ADR_HIGH: + case GET_WORD_ADR_LOW: + case WRITE_DATA: + { + if (eeprom_i2c.cycles == 9) sda_out = 0; + break; + } + + default: + { + break; + } + } + + return (sda_out << eeprom_i2c.config.sda_out_bit); +} + +static unsigned int eeprom_i2c_read_byte(unsigned int address) +{ + if (address == eeprom_i2c.config.sda_out_adr) + { + return eeprom_i2c_out(); + } + + return READ_BYTE(cart.rom, address); +} + +static unsigned int eeprom_i2c_read_word(unsigned int address) +{ + if (address == eeprom_i2c.config.sda_out_adr) + { + return (eeprom_i2c_out() << 8); + } + + if (address == (eeprom_i2c.config.sda_out_adr ^ 1)) + { + return eeprom_i2c_out(); + } + + return *(uint16 *)(cart.rom + address); +} + +static void eeprom_i2c_write_byte(unsigned int address, unsigned int data) +{ + int do_update = 0; + + if (address == eeprom_i2c.config.sda_in_adr) + { + eeprom_i2c.sda = (data >> eeprom_i2c.config.sda_in_bit) & 1; + do_update = 1; + } + + if (address == eeprom_i2c.config.scl_adr) + { + eeprom_i2c.scl = (data >> eeprom_i2c.config.scl_bit) & 1; + do_update = 1; + } + + if (do_update) + { + eeprom_i2c_update(); + return; + } + + m68k_unused_8_w(address, data); +} + +static void eeprom_i2c_write_word(unsigned int address, unsigned int data) +{ + int do_update = 0; + + if (address == eeprom_i2c.config.sda_in_adr) + { + eeprom_i2c.sda = (data >> (8 + eeprom_i2c.config.sda_in_bit)) & 1; + do_update = 1; + } + else if (address == (eeprom_i2c.config.sda_in_adr ^1)) + { + eeprom_i2c.sda = (data >> eeprom_i2c.config.sda_in_bit) & 1; + do_update = 1; + } + + if (address == eeprom_i2c.config.scl_adr) + { + eeprom_i2c.scl = (data >> (8 + eeprom_i2c.config.scl_bit)) & 1; + do_update = 1; + } + else if (address == (eeprom_i2c.config.scl_adr ^1)) + { + eeprom_i2c.scl = (data >> eeprom_i2c.config.scl_bit) & 1; + do_update = 1; + } + + if (do_update) + { + eeprom_i2c_update(); + return; + } + + m68k_unused_16_w(address, data); +} diff --git a/genplus-gx/core/cart_hw/eeprom_i2c.h b/genplus-gx/core/cart_hw/eeprom_i2c.h new file mode 100644 index 0000000000..7c90497b60 --- /dev/null +++ b/genplus-gx/core/cart_hw/eeprom_i2c.h @@ -0,0 +1,45 @@ +/**************************************************************************** + * Genesis Plus + * I2C Serial EEPROM (24Cxx) support + * + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _EEPROM_I2C_H_ +#define _EEPROM_I2C_H_ + +/* Function prototypes */ +extern void eeprom_i2c_init(); + +#endif diff --git a/genplus-gx/core/cart_hw/eeprom_spi.c b/genplus-gx/core/cart_hw/eeprom_spi.c new file mode 100644 index 0000000000..c913e9c113 --- /dev/null +++ b/genplus-gx/core/cart_hw/eeprom_spi.c @@ -0,0 +1,358 @@ +/**************************************************************************** + * Genesis Plus + * SPI Serial EEPROM (25xxx/95xxx) support + * + * Copyright (C) 2012 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + +/* max supported size 64KB (25x512/95x512) */ +#define SIZE_MASK 0xffff +#define PAGE_MASK 0x7f + +/* hard-coded board implementation (!WP pin not used) */ +#define BIT_DATA (0) +#define BIT_CLK (1) +#define BIT_HOLD (2) +#define BIT_CS (3) + +typedef enum +{ + STANDBY, + GET_OPCODE, + GET_ADDRESS, + WRITE_BYTE, + READ_BYTE +} T_STATE_SPI; + +typedef struct +{ + uint8 cs; /* !CS line state */ + uint8 clk; /* SCLK line state */ + uint8 out; /* SO line state */ + uint8 status; /* status register */ + uint8 opcode; /* 8-bit opcode */ + uint8 buffer; /* 8-bit data buffer */ + uint16 addr; /* 16-bit address */ + uint32 cycles; /* current operation cycle */ + T_STATE_SPI state; /* current operation state */ +} T_EEPROM_SPI; + +static T_EEPROM_SPI spi_eeprom; + +void eeprom_spi_init() +{ + /* reset eeprom state */ + memset(&spi_eeprom, 0, sizeof(T_EEPROM_SPI)); + spi_eeprom.out = 1; + spi_eeprom.state = GET_OPCODE; + + /* enable backup RAM */ + sram.custom = 2; + sram.on = 1; +} + +void eeprom_spi_write(unsigned char data) +{ + /* Make sure !HOLD is high */ + if (data & (1 << BIT_HOLD)) + { + /* Check !CS state */ + if (data & (1 << BIT_CS)) + { + /* !CS high -> end of current operation */ + spi_eeprom.cycles = 0; + spi_eeprom.out = 1; + spi_eeprom.opcode = 0; + spi_eeprom.state = GET_OPCODE; + } + else + { + /* !CS low -> process current operation */ + switch (spi_eeprom.state) + { + case GET_OPCODE: + { + /* latch data on CLK positive edge */ + if ((data & (1 << BIT_CLK)) && !spi_eeprom.clk) + { + /* 8-bit opcode buffer */ + spi_eeprom.opcode |= ((data >> BIT_DATA) & 1); + spi_eeprom.cycles++; + + /* last bit ? */ + if (spi_eeprom.cycles == 8) + { + /* reset cycles count */ + spi_eeprom.cycles = 0; + + /* Decode instruction */ + switch (spi_eeprom.opcode) + { + case 0x01: + { + /* WRITE STATUS */ + spi_eeprom.buffer = 0; + spi_eeprom.state = WRITE_BYTE; + break; + } + + case 0x02: + { + /* WRITE BYTE */ + spi_eeprom.addr = 0; + spi_eeprom.state = GET_ADDRESS; + break; + } + + case 0x03: + { + /* READ BYTE */ + spi_eeprom.addr = 0; + spi_eeprom.state = GET_ADDRESS; + break; + } + + case 0x04: + { + /* WRITE DISABLE */ + spi_eeprom.status &= ~0x02; + spi_eeprom.state = STANDBY; + break; + } + + case 0x05: + { + /* READ STATUS */ + spi_eeprom.buffer = spi_eeprom.status; + spi_eeprom.state = READ_BYTE; + break; + } + + case 0x06: + { + /* WRITE ENABLE */ + spi_eeprom.status |= 0x02; + spi_eeprom.state = STANDBY; + break; + } + + default: + { + /* specific instructions (not supported) */ + spi_eeprom.state = STANDBY; + break; + } + } + } + else + { + /* shift opcode value */ + spi_eeprom.opcode = spi_eeprom.opcode << 1; + } + } + break; + } + + case GET_ADDRESS: + { + /* latch data on CLK positive edge */ + if ((data & (1 << BIT_CLK)) && !spi_eeprom.clk) + { + /* 16-bit address */ + spi_eeprom.addr |= ((data >> BIT_DATA) & 1); + spi_eeprom.cycles++; + + /* last bit ? */ + if (spi_eeprom.cycles == 16) + { + /* reset cycles count */ + spi_eeprom.cycles = 0; + + /* mask unused address bits */ + spi_eeprom.addr &= SIZE_MASK; + + /* operation type */ + if (spi_eeprom.opcode & 0x01) + { + /* READ operation */ + spi_eeprom.buffer = sram.sram[spi_eeprom.addr]; + spi_eeprom.state = READ_BYTE; + } + else + { + /* WRITE operation */ + spi_eeprom.buffer = 0; + spi_eeprom.state = WRITE_BYTE; + } + } + else + { + /* shift address value */ + spi_eeprom.addr = spi_eeprom.addr << 1; + } + } + break; + } + + case WRITE_BYTE: + { + /* latch data on CLK positive edge */ + if ((data & (1 << BIT_CLK)) && !spi_eeprom.clk) + { + /* 8-bit data buffer */ + spi_eeprom.buffer |= ((data >> BIT_DATA) & 1); + spi_eeprom.cycles++; + + /* last bit ? */ + if (spi_eeprom.cycles == 8) + { + /* reset cycles count */ + spi_eeprom.cycles = 0; + + /* write data to destination */ + if (spi_eeprom.opcode & 0x01) + { + /* update status register */ + spi_eeprom.status = (spi_eeprom.status & 0x02) | (spi_eeprom.buffer & 0x0c); + + /* wait for operation end */ + spi_eeprom.state = STANDBY; + } + else + { + /* Memory Array (write-protected) */ + if (spi_eeprom.status & 2) + { + /* check array protection bits (BP0, BP1) */ + switch ((spi_eeprom.status >> 2) & 0x03) + { + case 0x01: + { + /* $C000-$FFFF (sector #3) is protected */ + if (spi_eeprom.addr < 0xC000) + { + sram.sram[spi_eeprom.addr] = spi_eeprom.buffer; + } + break; + } + + case 0x02: + { + /* $8000-$FFFF (sectors #2 and #3) is protected */ + if (spi_eeprom.addr < 0x8000) + { + sram.sram[spi_eeprom.addr] = spi_eeprom.buffer; + } + break; + } + + case 0x03: + { + /* $0000-$FFFF (all sectors) is protected */ + break; + } + + default: + { + /* no sectors protected */ + sram.sram[spi_eeprom.addr] = spi_eeprom.buffer; + break; + } + } + } + + /* reset data buffer */ + spi_eeprom.buffer = 0; + + /* increase array address (sequential writes are limited within the same page) */ + spi_eeprom.addr = (spi_eeprom.addr & ~PAGE_MASK) | ((spi_eeprom.addr + 1) & PAGE_MASK); + } + } + else + { + /* shift data buffer value */ + spi_eeprom.buffer = spi_eeprom.buffer << 1; + } + } + break; + } + + case READ_BYTE: + { + /* output data on CLK positive edge */ + if ((data & (1 << BIT_CLK)) && !spi_eeprom.clk) + { + /* read out bits */ + spi_eeprom.out = (spi_eeprom.buffer >> (7 - spi_eeprom.cycles)) & 1; + spi_eeprom.cycles++; + + /* last bit ? */ + if (spi_eeprom.cycles == 8) + { + /* reset cycles count */ + spi_eeprom.cycles = 0; + + /* read from memory array ? */ + if (spi_eeprom.opcode == 0x03) + { + /* read next array byte */ + spi_eeprom.addr = (spi_eeprom.addr + 1) & SIZE_MASK; + spi_eeprom.buffer = sram.sram[spi_eeprom.addr]; + } + } + } + break; + } + + default: + { + /* wait for !CS low->high transition */ + break; + } + } + } + } + + /* update input lines */ + spi_eeprom.cs = (data >> BIT_CS) & 1; + spi_eeprom.clk = (data >> BIT_CLK) & 1; +} + +unsigned int eeprom_spi_read(unsigned int address) +{ + return (spi_eeprom.out << BIT_DATA); +} + diff --git a/genplus-gx/core/cart_hw/eeprom_spi.h b/genplus-gx/core/cart_hw/eeprom_spi.h new file mode 100644 index 0000000000..b1287bdd89 --- /dev/null +++ b/genplus-gx/core/cart_hw/eeprom_spi.h @@ -0,0 +1,47 @@ +/**************************************************************************** + * Genesis Plus + * SPI Serial EEPROM (25XX512 only) support + * + * Copyright (C) 2012 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _EEPROM_SPI_H_ +#define _EEPROM_SPI_H_ + +/* Function prototypes */ +extern void eeprom_spi_init(); +extern void eeprom_spi_write(unsigned char data); +extern unsigned int eeprom_spi_read(unsigned int address); + +#endif diff --git a/genplus-gx/core/cart_hw/ggenie.c b/genplus-gx/core/cart_hw/ggenie.c new file mode 100644 index 0000000000..e6d82c1713 --- /dev/null +++ b/genplus-gx/core/cart_hw/ggenie.c @@ -0,0 +1,283 @@ +/**************************************************************************** + * Genesis Plus + * Game Genie Hardware emulation + * + * Copyright (C) 2009-2011 Eke-Eke (Genesis Plus GX) + * + * Based on documentation from Charles McDonald + * (http://cgfm2.emuviews.com/txt/genie.txt) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + +static struct +{ + uint8 enabled; + uint8 *rom; + uint16 regs[0x20]; + uint16 old[6]; + uint16 data[6]; + uint32 addr[6]; +} ggenie; + +static unsigned int ggenie_read_byte(unsigned int address); +static unsigned int ggenie_read_word(unsigned int address); +static void ggenie_write_byte(unsigned int address, unsigned int data); +static void ggenie_write_word(unsigned int address, unsigned int data); +static void ggenie_write_regs(unsigned int offset, unsigned int data); + +void ggenie_init(void) +{ + int i; + FILE *f; + + memset(&ggenie,0,sizeof(ggenie)); + + /* Store Game Genie ROM (32k) above cartridge ROM + SRAM area */ + if (cart.romsize > 0x810000) return; + ggenie.rom = cart.rom + 0x810000; + + /* Open Game Genie ROM file */ + f = fopen(GG_ROM,"rb"); + if (f == NULL) return; + + /* Load ROM */ + for (i=0; i<0x8000; i+=0x1000) + { + fread(ggenie.rom + i, 0x1000, 1, f); + } + + /* Close ROM file */ + fclose(f); + +#ifdef LSB_FIRST + for (i=0; i<0x8000; i+=2) + { + /* Byteswap ROM */ + uint8 temp = ggenie.rom[i]; + ggenie.rom[i] = ggenie.rom[i+1]; + ggenie.rom[i+1] = temp; + } +#endif + + /* $0000-$7fff mirrored into $8000-$ffff */ + memcpy(ggenie.rom + 0x8000, ggenie.rom, 0x8000); + + /* set flag */ + ggenie.enabled = 1; +} + +void ggenie_shutdown(void) +{ + if (ggenie.enabled) + { + ggenie_switch(0); + ggenie.enabled = 0; + } +} + +void ggenie_reset(int hard) +{ + if (ggenie.enabled) + { + if (hard) + { + /* clear codes */ + ggenie_switch(0); + + /* reset internal state */ + memset(ggenie.regs,0,sizeof(ggenie.regs)); + memset(ggenie.old,0,sizeof(ggenie.old)); + memset(ggenie.data,0,sizeof(ggenie.data)); + memset(ggenie.addr,0,sizeof(ggenie.addr)); + } + + /* Game Genie ROM is mapped at $000000-$007fff */ + m68k.memory_map[0].base = ggenie.rom; + + /* Internal registers are mapped at $000000-$00001f */ + m68k.memory_map[0].write8 = ggenie_write_byte; + m68k.memory_map[0].write16 = ggenie_write_word; + + /* Disable registers reads */ + m68k.memory_map[0].read16 = NULL; + } +} + +void ggenie_switch(int enable) +{ + int i; + if (enable) + { + /* enable cheats */ + for (i=0; i<6; i++) + { + /* patch is enabled ? */ + if (ggenie.regs[0] & (1 << i)) + { + /* save old value and patch ROM if enabled */ + ggenie.old[i] = *(uint16 *)(cart.rom + ggenie.addr[i]); + *(uint16 *)(cart.rom + ggenie.addr[i]) = ggenie.data[i]; + } + } + } + else + { + /* disable cheats in reversed order in case the same address is used by multiple patches */ + for (i=5; i>=0; i--) + { + /* patch is enabled ? */ + if (ggenie.regs[0] & (1 << i)) + { + /* restore original ROM value */ + *(uint16 *)(cart.rom + ggenie.addr[i]) = ggenie.old[i]; + } + } + } +} + +static unsigned int ggenie_read_byte(unsigned int address) +{ + unsigned int data = ggenie.regs[(address >> 1) & 0x1f]; + return ((address & 1) ? (data & 0xff) : ((data >> 8) & 0xff)); +} + +static unsigned int ggenie_read_word(unsigned int address) +{ + return ggenie.regs[(address >> 1) & 0x1f]; +} + +static void ggenie_write_byte(unsigned int address, unsigned int data) +{ + /* Register offset */ + uint8 offset = (address >> 1) & 0x1f; + + /* /LWR and /UWR are used to decode writes */ + if (address & 1) + { + data = (ggenie.regs[offset] & 0xff00) | (data & 0xff); + } + else + { + data = (ggenie.regs[offset] & 0x00ff) | ((data & 0xff) << 8); + } + + /* Update internal register */ + ggenie_write_regs(offset,data); +} + +static void ggenie_write_word(unsigned int address, unsigned int data) +{ + /* Register offset */ + uint8 offset = (address >> 1) & 0x1f; + + /* Write internal register (full WORD) */ + ggenie_write_regs(offset,data); +} + +static void ggenie_write_regs(unsigned int offset, unsigned int data) +{ + /* update internal register */ + ggenie.regs[offset] = data; + + /* Mode Register */ + if (offset == 0) + { + /* MODE bit */ + if (data & 0x400) + { + /* $0000-$7ffff reads mapped to Cartridge ROM */ + m68k.memory_map[0].base = cart.rom; + m68k.memory_map[0].read8 = NULL; + m68k.memory_map[0].read16 = NULL; + } + else + { + /* $0000-$7ffff reads mapped to Game Genie ROM */ + m68k.memory_map[0].base = ggenie.rom; + m68k.memory_map[0].read8 = NULL; + m68k.memory_map[0].read16 = NULL; + + /* READ_ENABLE bit */ + if (data & 0x200) + { + /* $0000-$7ffff reads mapped to Game Genie Registers */ + /* code doing this should execute in RAM so we don't need to modify base address */ + m68k.memory_map[0].read8 = ggenie_read_byte; + m68k.memory_map[0].read16 = ggenie_read_word; + } + } + + /* LOCK bit */ + if (data & 0x100) + { + /* decode patch address (ROM area only)*/ + /* note: Charles's doc is wrong, first register holds bits 23-16 of patch address */ + ggenie.addr[0] = ((ggenie.regs[2] & 0x3f) << 16) | ggenie.regs[3]; + ggenie.addr[1] = ((ggenie.regs[5] & 0x3f) << 16) | ggenie.regs[6]; + ggenie.addr[2] = ((ggenie.regs[8] & 0x3f) << 16) | ggenie.regs[9]; + ggenie.addr[3] = ((ggenie.regs[11] & 0x3f) << 16) | ggenie.regs[12]; + ggenie.addr[4] = ((ggenie.regs[14] & 0x3f) << 16) | ggenie.regs[15]; + ggenie.addr[5] = ((ggenie.regs[17] & 0x3f) << 16) | ggenie.regs[18]; + + /* decode patch data */ + ggenie.data[0] = ggenie.regs[4]; + ggenie.data[1] = ggenie.regs[7]; + ggenie.data[2] = ggenie.regs[10]; + ggenie.data[3] = ggenie.regs[13]; + ggenie.data[4] = ggenie.regs[16]; + ggenie.data[5] = ggenie.regs[19]; + + /* disable internal registers */ + m68k.memory_map[0].write8 = m68k_unused_8_w; + m68k.memory_map[0].write16 = m68k_unused_16_w; + + /* patch ROM when GG program exits (LOCK bit set) */ + /* this is done here to handle patched program reads faster & more easily */ + /* on real HW, address decoding would be done on each reads */ + ggenie_switch(1); + } + else + { + m68k.memory_map[0].write8 = ggenie_write_byte; + m68k.memory_map[0].write16 = ggenie_write_word; + } + } + + /* RESET register */ + else if (offset == 1) + { + ggenie.regs[1] |= 1; + } +} diff --git a/genplus-gx/core/cart_hw/ggenie.h b/genplus-gx/core/cart_hw/ggenie.h new file mode 100644 index 0000000000..524c751434 --- /dev/null +++ b/genplus-gx/core/cart_hw/ggenie.h @@ -0,0 +1,51 @@ +/**************************************************************************** + * Genesis Plus + * Game Genie Hardware emulation + * + * Copyright (C) 2009-2011 Eke-Eke (Genesis Plus GX) + * + * Based on documentation from Charles McDonald + * (http://cgfm2.emuviews.com/txt/genie.txt) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _GGENIE_H_ +#define _GGENIE_H_ + +/* Function prototypes */ +extern void ggenie_init(void); +extern void ggenie_shutdown(void); +extern void ggenie_reset(int hard); +extern void ggenie_switch(int enable); + +#endif diff --git a/genplus-gx/core/cart_hw/md_cart.c b/genplus-gx/core/cart_hw/md_cart.c new file mode 100644 index 0000000000..c7ddf5850e --- /dev/null +++ b/genplus-gx/core/cart_hw/md_cart.c @@ -0,0 +1,1906 @@ +/**************************************************************************** + * Genesis Plus + * Mega Drive cartridge hardware support + * + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Many cartridge protections were initially documented by Haze + * (http://haze.mameworld.info/) + * + * Realtec mapper was documented by TascoDeluxe + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "eeprom_i2c.h" +#include "eeprom_spi.h" +#include "gamepad.h" + +#define CART_CNT (55) + +/* Cart database entry */ +typedef struct +{ + uint16 chk_1; /* header checksum */ + uint16 chk_2; /* real checksum */ + uint8 bank_start; /* first mapped bank in $400000-$7fffff region */ + uint8 bank_end; /* last mapped bank in $400000-$7fffff region */ + cart_hw_t cart_hw; /* hardware description */ +} md_entry_t; + +/* Function prototypes */ +static void mapper_sega_w(uint32 data); +static void mapper_ssf2_w(uint32 address, uint32 data); +static void mapper_sf001_w(uint32 address, uint32 data); +static void mapper_sf002_w(uint32 address, uint32 data); +static void mapper_sf004_w(uint32 address, uint32 data); +static uint32 mapper_sf004_r(uint32 address); +static void mapper_t5740_w(uint32 address, uint32 data); +static uint32 mapper_t5740_r(uint32 address); +static uint32 mapper_smw_64_r(uint32 address); +static void mapper_smw_64_w(uint32 address, uint32 data); +static void mapper_realtec_w(uint32 address, uint32 data); +static void mapper_seganet_w(uint32 address, uint32 data); +static void mapper_32k_w(uint32 data); +static void mapper_64k_w(uint32 data); +static void mapper_64k_multi_w(uint32 address); +static uint32 mapper_radica_r(uint32 address); +static void default_time_w(uint32 address, uint32 data); +static void default_regs_w(uint32 address, uint32 data); +static uint32 default_regs_r(uint32 address); +static uint32 default_regs_r_16(uint32 address); +static uint32 custom_regs_r(uint32 address); +static void custom_regs_w(uint32 address, uint32 data); +static void custom_alt_regs_w(uint32 address, uint32 data); +static uint32 topshooter_r(uint32 address); +static void topshooter_w(uint32 address, uint32 data); +static uint32 tekken_regs_r(uint32 address); +static void tekken_regs_w(uint32 address, uint32 data); + +/* Games that need extra hardware emulation: + - copy protection device + - custom ROM banking device +*/ +static const md_entry_t rom_database[CART_CNT] = +{ +/* Funny World & Balloon Boy */ + {0x0000,0x06ab,0x40,0x40,{{0x00,0x00,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0x000000,0x000000,0x000000,0x000000},1,0,NULL,NULL,NULL,mapper_realtec_w}}, +/* Whac-a-Critter */ + {0xffff,0xf863,0x40,0x40,{{0x00,0x00,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0x000000,0x000000,0x000000,0x000000},1,0,NULL,NULL,NULL,mapper_realtec_w}}, +/* Earth Defense */ + {0xffff,0x44fb,0x40,0x40,{{0x00,0x00,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0x000000,0x000000,0x000000,0x000000},1,0,NULL,NULL,NULL,mapper_realtec_w}}, + + +/* RADICA (Volume 1) (bad dump ?) */ + {0x0000,0x2326,0x00,0x00,{{0x00,0x00,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0x000000,0x000000,0x000000,0x000000},0,1,mapper_radica_r,NULL,NULL,NULL}}, +/* RADICA (Volume 1) */ + {0x24f4,0xfc84,0x00,0x00,{{0x00,0x00,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0x000000,0x000000,0x000000,0x000000},0,0,mapper_radica_r,NULL,NULL,NULL}}, +/* RADICA (Volume 2) */ + {0x104f,0x32e9,0x00,0x00,{{0x00,0x00,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0x000000,0x000000,0x000000,0x000000},0,0,mapper_radica_r,NULL,NULL,NULL}}, + + +/* Tenchi wo Kurau III: Sangokushi Gaiden - Chinese Fighter */ + {0x9490,0x8180,0x40,0x6f,{{0x00,0x00,0x00,0x00},{0xf0000c,0xf0000c,0xf0000c,0xf0000c},{0x400000,0x400004,0x400008,0x40000c},0,1,NULL,NULL,default_regs_r,custom_alt_regs_w}}, + + +/* Top Fighter */ + {0x4eb9,0x5d8b,0x60,0x7f,{{0x00,0x00,0x00,0x00},{0xf00007,0xf00007,0xf00007,0xffffff},{0x600001,0x600003,0x600005,0x000000},0,1,NULL,NULL,default_regs_r,custom_regs_w}}, +/* Soul Edge VS Samurai Spirits */ + {0x00ff,0x5d34,0x60,0x7f,{{0x00,0x00,0x00,0x00},{0xf00007,0xf00007,0xf00007,0xffffff},{0x600001,0x600003,0x600005,0x000000},0,1,NULL,NULL,default_regs_r,custom_regs_w}}, +/* Mulan */ + {0x0404,0x1b40,0x60,0x7f,{{0x00,0x00,0x00,0x00},{0xf00007,0xf00007,0xf00007,0xffffff},{0x600001,0x600003,0x600005,0x000000},0,1,NULL,NULL,default_regs_r,custom_regs_w}}, +/* Pocket Monsters II */ + {0x47f9,0x17e5,0x60,0x7f,{{0x00,0x00,0x00,0x00},{0xf00007,0xf00007,0xf00007,0xffffff},{0x600001,0x600003,0x600005,0x000000},0,1,NULL,NULL,default_regs_r,custom_regs_w}}, +/* Lion King 3 */ + {0x0000,0x507c,0x60,0x7f,{{0x00,0x00,0x00,0x00},{0xf00007,0xf00007,0xf00007,0xffffff},{0x600001,0x600003,0x600005,0x000000},0,1,NULL,NULL,default_regs_r,custom_regs_w}}, +/* Super King Kong 99 */ + {0x0000,0x7d6e,0x60,0x7f,{{0x00,0x00,0x00,0x00},{0xf00007,0xf00007,0xf00007,0xffffff},{0x600001,0x600003,0x600005,0x000000},0,1,NULL,NULL,default_regs_r,custom_regs_w}}, +/* Gunfight 3-in-1 */ + {0x0000,0x6ff8,0x60,0x7f,{{0x00,0x00,0x00,0x00},{0xf00007,0xf00007,0xf00007,0xffffff},{0x600001,0x600003,0x600005,0x000000},0,1,NULL,NULL,default_regs_r,custom_regs_w}}, +/* Pokemon Stadium */ + {0x0000,0x843c,0x70,0x7f,{{0x00,0x00,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0x000000,0x000000,0x000000,0x000000},0,1,NULL,NULL,NULL,custom_regs_w}}, + + +/* Tekken 3 Special (original dump) (a bootleg version also exists, with patched protection & different boot routine which reads unused !TIME mapped area) */ + {0x0000,0xc2f0,0x40,0x40,{{0x00,0x00,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0x000000,0x000000,0x000000,0x000000},0,0,NULL,NULL,tekken_regs_r,tekken_regs_w}}, + + +/* Lion King 2 */ + {0xffff,0x1d9b,0x40,0x40,{{0x00,0x00,0x00,0x00},{0xfffffd,0xfffffd,0xffffff,0xffffff},{0x400000,0x400004,0x000000,0x000000},0,0,NULL,NULL,default_regs_r,default_regs_w}}, +/* Squirell King */ + {0x0000,0x8ec8,0x40,0x40,{{0x00,0x00,0x00,0x00},{0xfffffd,0xfffffd,0xffffff,0xffffff},{0x400000,0x400004,0x000000,0x000000},0,0,NULL,NULL,default_regs_r,default_regs_w}}, +/* Tiny Toon Adventures 3 */ + {0x2020,0xed9c,0x40,0x40,{{0x00,0x00,0x00,0x00},{0xfffffd,0xfffffd,0xffffff,0xffffff},{0x400000,0x400004,0x000000,0x000000},0,0,NULL,NULL,default_regs_r,default_regs_w}}, +/* Lian Huan Pao - Barver Battle Saga (registers accessed by Z80, related to sound engine ?) */ + {0x30b9,0x1c2a,0x40,0x40,{{0x00,0x00,0x00,0x00},{0xfffffd,0xfffffd,0xffffff,0xffffff},{0x400000,0x400004,0x000000,0x000000},0,0,NULL,NULL,default_regs_r,default_regs_w}}, +/* Shui Hu Zhuan (registers accessed by Z80, related to sound engine ?) */ + {0x6001,0x0211,0x40,0x40,{{0x00,0x00,0x00,0x00},{0xfffffd,0xfffffd,0xffffff,0xffffff},{0x400000,0x400004,0x000000,0x000000},0,0,NULL,NULL,default_regs_r,default_regs_w}}, +/* Feng Shen Ying Jie Chuan (registers accessed by Z80, related to sound engine ?) */ + {0xffff,0x5d98,0x40,0x40,{{0x00,0x00,0x00,0x00},{0xfffffd,0xfffffd,0xffffff,0xffffff},{0x400000,0x400004,0x000000,0x000000},0,0,NULL,NULL,default_regs_r,default_regs_w}}, +/* (*) Shui Hu - Feng Yun Zhuan (patched ROM, unused registers) */ + {0x3332,0x872b,0x40,0x40,{{0x00,0x00,0x00,0x00},{0xfffffd,0xfffffd,0xffffff,0xffffff},{0x400000,0x400004,0x000000,0x000000},0,0,NULL,NULL,default_regs_r,default_regs_w}}, + + +/* (*) Chao Ji Da Fu Weng (patched ROM, various words witten to register, long word also read from $7E0000, unknown banking hardware ?) */ + {0xa697,0xa697,0x40,0x40,{{0x00,0x00,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0x400000,0x000000,0x000000,0x000000},0,0,NULL,NULL,NULL,default_regs_w}}, + +/* (*) Aq Renkan Awa (patched ROM, ON/OFF bit sequence is written to register, unknown banking hardware ?) */ + {0x8104,0x0517,0x40,0x40,{{0x00,0x00,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0x400001,0x000000,0x000000,0x000000},0,0,NULL,NULL,NULL,default_regs_w}}, + + +/* (*) Tun Shi Tian Di III (patched ROM, unused register) */ + {0x0000,0x9c5e,0x40,0x40,{{0xab,0x00,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0x400046,0x000000,0x000000,0x000000},0,0,NULL,NULL,default_regs_r,NULL}}, + + +/* Ma Jiang Qing Ren - Ji Ma Jiang Zhi */ + {0x0000,0x7037,0x40,0x40,{{0x90,0xd3,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0x400000,0x401000,0x000000,0x000000},0,0,NULL,NULL,default_regs_r,NULL}}, +/* Super Majon Club */ + {0x0000,0x3b95,0x40,0x40,{{0x90,0xd3,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0x400000,0x401000,0x000000,0x000000},0,0,NULL,NULL,default_regs_r,NULL}}, +/* Feng Kuang Tao Hua Yuan (original version from Creaton Softec Inc) (a bootleg version also exists with patched protection and minor title screen variations) */ + {0x0000,0x9dc4,0x40,0x40,{{0x90,0xd3,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0x400000,0x401000,0x000000,0x000000},0,0,NULL,NULL,default_regs_r,NULL}}, + + +/* (*) Jiu Ji Ma Jiang II - Ye Yan Bian (patched ROM, using expected register value - $0f - crashes the game) (uses 16-bits reads) */ + {0x0c44,0xba81,0x40,0x40,{{0x00,0x00,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0x000000,0x000000,0x000000,0x400006},0,0,NULL,NULL,default_regs_r_16,NULL}}, +/* 16 Zhang Ma Jiang (uses 16-bits reads) */ + {0xfb40,0x4bed,0x40,0x40,{{0x00,0xaa,0x00,0xf0},{0xffffff,0xffffff,0xffffff,0xffffff},{0x000000,0x400002,0x000000,0x400006},0,0,NULL,NULL,default_regs_r_16,NULL}}, +/* 16 Tiles Mahjong II (uses 16-bits reads) */ + {0xffff,0x0903,0x40,0x40,{{0x00,0x00,0xc9,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0x000000,0x000000,0x400004,0x000000},0,0,NULL,NULL,default_regs_r_16,NULL}}, +/* Thunderbolt II (uses 16-bits reads) */ + {0x0000,0x1585,0x40,0x40,{{0x55,0x0f,0xaa,0xf0},{0xffffff,0xffffff,0xffffff,0xffffff},{0x400000,0x400002,0x400004,0x400006},0,0,NULL,NULL,default_regs_r_16,NULL}}, + + +/* Super Bubble Bobble */ + {0x0000,0x16cd,0x40,0x40,{{0x55,0x0f,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0x400000,0x400002,0x000000,0x000000},0,0,NULL,NULL,default_regs_r,NULL}}, +/* Tenchi wo Kurau II - The Battle of Red Cliffs (Unl) */ + {0x0000,0xed61,0x40,0x40,{{0x55,0x0f,0xaa,0xf0},{0xffffff,0xffffff,0xffffff,0xffffff},{0x400000,0x400002,0x400004,0x400006},0,0,NULL,NULL,default_regs_r,NULL}}, +/* Huan Le Tao Qi Shu - Smart Mouse */ + {0x0000,0x1a28,0x40,0x40,{{0x55,0x0f,0xaa,0xf0},{0xffffff,0xffffff,0xffffff,0xffffff},{0x400000,0x400002,0x400004,0x400006},0,0,NULL,NULL,default_regs_r,NULL}}, +/* (*) Hei Tao 2 - Super Big 2 (patched ROM, unused registers) */ + {0x0000,0x5843,0x40,0x40,{{0x55,0x0f,0xaa,0xf0},{0xffffff,0xffffff,0xffffff,0xffffff},{0x400000,0x400002,0x400004,0x400006},0,0,NULL,NULL,default_regs_r,NULL}}, +/* Mighty Morphin Power Rangers - The Fighting Edition */ + {0x0000,0x2288,0x40,0x40,{{0x55,0x0f,0xc9,0x18},{0xffffff,0xffffff,0xffffff,0xffffff},{0x400000,0x400002,0x400004,0x400006},0,0,NULL,NULL,default_regs_r,NULL}}, +/* Elf Wor */ + {0x0080,0x3dba,0x40,0x40,{{0x55,0x0f,0xc9,0x18},{0xffffff,0xffffff,0xffffff,0xffffff},{0x400000,0x400002,0x400004,0x400006},0,0,NULL,NULL,default_regs_r,NULL}}, +/* Ya-Se Chuanshuo */ + {0xffff,0xd472,0x40,0x40,{{0x63,0x98,0xc9,0x18},{0xffffff,0xffffff,0xffffff,0xffffff},{0x400000,0x400002,0x400004,0x400006},0,0,NULL,NULL,default_regs_r,NULL}}, +/* 777 Casino (For first one, 0x55 works as well. Other values are never used so they are guessed from on other unlicensed games using similar mapper) */ + {0x0000,0xf8d9,0x40,0x40,{{0x63,0x98,0xc9,0x18},{0xffffff,0xffffff,0xffffff,0xffffff},{0x400000,0x400002,0x400004,0x400006},0,0,NULL,NULL,default_regs_r,NULL}}, +/* Wu Kong Wai Zhuan (original) (a bootleg version also exists, with patched protection & modified SRAM test routine ?) */ + {0x0000,0x19ff,0x40,0x40,{{0x63,0x98,0xc9,0x18},{0xffffff,0xffffff,0xffffff,0xffffff},{0x400000,0x400002,0x400004,0x400006},0,0,NULL,NULL,default_regs_r,NULL}}, +/* Soul Blade */ + {0x0000,0x0c5b,0x40,0x40,{{0x63,0x98,0xc9,0xf0},{0xffffff,0xffffff,0xffffff,0xffffff},{0x400000,0x400002,0x400004,0x400006},0,0,NULL,NULL,default_regs_r,NULL}}, + + +/* King of Fighter 98 */ + {0x0000,0xd0a0,0x48,0x4f,{{0x00,0x00,0xaa,0xf0},{0xffffff,0xffffff,0xfc0000,0xfc0000},{0x000000,0x000000,0x480000,0x4c0000},0,0,NULL,NULL,default_regs_r,NULL}}, + + +/* Rockman X3 (bootleg version ? two last register returned values are ignored, note that 0xaa/0x18 would work as well) */ + {0x0000,0x9d0e,0x40,0x40,{{0x0c,0x00,0xc9,0xf0},{0xffffff,0xffffff,0xffffff,0xffffff},{0xa13000,0x000000,0x400004,0x400006},0,0,default_regs_r,NULL,default_regs_r,NULL}}, + + +/* (*) Dragon Ball Final Bout (patched ROM, in original code, different switches occurs depending on returned value $00-$0f) */ + {0xc65a,0xc65a,0x00,0x00,{{0x00,0x00,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0xa13000,0x000000,0x000000,0x000000},0,0,default_regs_r,NULL,NULL,NULL}}, +/* (*) Yang Jia Jiang - Yang Warrior Family (patched ROM, register value unused) */ + {0x0000,0x96b0,0x00,0x00,{{0x00,0x00,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0xa13000,0x000000,0x000000,0x000000},0,0,default_regs_r,NULL,NULL,NULL}}, +/* Super Mario 2 1998 */ + {0xffff,0x0474,0x00,0x00,{{0x0a,0x00,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0xa13000,0x000000,0x000000,0x000000},0,0,default_regs_r,NULL,NULL,NULL}}, +/* Super Mario World */ + {0x2020,0xb4eb,0x00,0x00,{{0x1c,0x00,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0xa13000,0x000000,0x000000,0x000000},0,0,default_regs_r,NULL,NULL,NULL}}, + + +/* King of Fighter 99 */ + {0x0000,0x021e,0x00,0x00,{{0x00,0x01,0x1f,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0xa13000,0xa13002,0xa1303e,0x000000},0,0,custom_regs_r,default_regs_w,NULL,NULL}}, +/* Pocket Monster */ + {0xd6fc,0x1eb1,0x00,0x00,{{0x00,0x01,0x1f,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0xa13000,0xa13002,0xa1303e,0x000000},0,0,custom_regs_r,default_regs_w,NULL,NULL}}, +/* Pocket Monster (bootleg version ? two last register returned values are ignored & first register test has been modified) */ + {0xd6fc,0x6319,0x00,0x00,{{0x14,0x01,0x1f,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0xa13000,0xa13002,0xa1303e,0x000000},0,0,default_regs_r,m68k_unused_8_w,NULL,NULL}}, +/* A Bug's Life (bootleg version ? two last register returned values are ignored & first register test has been modified ?) */ + {0x7f7f,0x2aad,0x00,0x00,{{0x28,0x01,0x1f,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0xa13000,0xa13002,0xa1303e,0x000000},0,0,default_regs_r,m68k_unused_8_w,NULL,NULL}}, + + +/* Game no Kanzume Otokuyou */ + {0x0000,0xf9d1,0x00,0x00,{{0x00,0x00,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0x000000,0x000000,0x000000,0x000000},0,0,NULL,mapper_seganet_w,NULL,NULL}}, + + +/* Top Shooter (arcade hardware) */ + {0xffff,0x3632,0x20,0x20,{{0x00,0x00,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0x000000,0x000000,0x000000,0x000000},0,0,NULL,NULL,topshooter_r,topshooter_w}} +}; + + +/************************************************************ + Cart Hardware initialization +*************************************************************/ + +void md_cart_init(void) +{ + int i; + + /*************************************************************************************************************** + CARTRIDGE ROM MIRRORING + *************************************************************************************************************** + + MD Cartridge area is mapped to $000000-$3fffff: + + -> when accessing ROM, 68k address lines A1 to A21 can be used by the internal cartridge hardware to decode + full 4MB address range. + -> depending on ROM total size and additional decoding hardware, some address lines might be ignored, + resulting in ROM mirroring. + + Cartridges can use either 8-bits (x2) or 16-bits (x1, x2) Mask ROM chips, each chip size is a factor of 2 bytes: + + -> two 8-bits chips are equivalent to one 16-bits chip, no specific address decoding is required, needed + address lines are simply connected to each chip, upper address lines are ignored and data lines are + connected appropriately to each chip (D0-D7 to one chip, D8-D15 to the other one). + ROM is generally mirrored each N bytes where N=2^(k+1) is the total ROM size (ROM1+ROM2,ROM1+ROM2,...) + + -> one single 16-bits chip do not need specific address decoding, address lines are simply connected + depending on the ROM size, upper address lines being ignored. + ROM is generally mirrored each N bytes where N=2^k is the size of the ROM chip (ROM1,ROM1,ROM1,...) + + -> two 16-bits chips of the same size are equivalent to one chip of double size, address decoding generally + is the same except that specific hardware is used (one address line is generally used for chip selection, + lower ones being used to address the chips and upper ones being ignored). + ROM is generally mirrored each N bytes where N=2^(k+1) is the total ROM size (ROM1,ROM2,ROM1,ROM2,...) + + -> two 16-bits chips with different size are mapped differently. Address decoding is done the same way as + above (one address line used for chip selection) but the ignored & required address lines differ from + one chip to another, which makes ROM mirroring different. + ROM2 size is generally half of ROM1 size and upper half ignored (ROM1,ROM2,XXXX,ROM1,ROM2,XXXX,...) + + From the emulator point of view, we only need to distinguish 2 cases: + + 1/ total ROM size is a factor of 2: ROM is mirrored each 2^k bytes. + + 2/ total ROM size is not a factor of 2: ROM is padded up to 2^k then mirrored each 2^k bytes. + + ******************************************************************************************************************/ + + /* calculate nearest size with factor of 2 */ + unsigned int size = 0x10000; + while (cart.romsize > size) + size <<= 1; + + /* total ROM size is not a factor of 2 */ + /* TODO: handle all possible ROM configurations using cartridge database */ + if ((size < MAXROMSIZE) && (cart.romsize < size)) + { + /* ROM is padded up to 2^k bytes */ + memset(cart.rom + cart.romsize, 0xff, size - cart.romsize); + } + + /* Sonic & Knuckles */ + if (strstr(rominfo.international,"SONIC & KNUCKLES")) + { + /* disable ROM mirroring at $200000-$3fffff (normally mapped to external cartridge) */ + size = 0x400000; + } + + /* ROM is mirrored each 2^k bytes */ + cart.mask = size - 1; + + /********************************************** + DEFAULT CARTRIDGE MAPPING + ***********************************************/ + for (i=0; i<0x40; i++) + { + /* cartridge ROM */ + m68k.memory_map[i].base = cart.rom + ((i<<16) & cart.mask); + m68k.memory_map[i].read8 = NULL; + m68k.memory_map[i].read16 = NULL; + m68k.memory_map[i].write8 = m68k_unused_8_w; + m68k.memory_map[i].write16 = m68k_unused_16_w; + zbank_memory_map[i].read = NULL; + zbank_memory_map[i].write = zbank_unused_w; + } + + for (i=0x40; i<0x80; i++) + { + /* unused area */ + m68k.memory_map[i].base = cart.rom + (i<<16); + m68k.memory_map[i].read8 = m68k_read_bus_8; + m68k.memory_map[i].read16 = m68k_read_bus_16; + m68k.memory_map[i].write8 = m68k_unused_8_w; + m68k.memory_map[i].write16 = m68k_unused_16_w; + zbank_memory_map[i].read = zbank_unused_r; + zbank_memory_map[i].write = zbank_unused_w; + } + + /* support for Quackshot REV 01 (real) dump */ + if (strstr(rominfo.product,"00004054-01") && (cart.romsize == 0x80000)) + { + /* $000000-$0fffff: first 256K mirrored (A18 not connected to ROM chip, A19 not decoded) */ + for (i=0x00; i<0x10; i++) + { + /* $200000-$3fffff: mirror of $000000-$1fffff (A21 not decoded) */ + m68k.memory_map[i].base = m68k.memory_map[i + 0x20].base = cart.rom + ((i & 0x03) << 16); + } + + /* $100000-$1fffff: second 256K mirrored (A20 connected to ROM chip A18) */ + for (i=0x10; i<0x20; i++) + { + /* $200000-$3fffff: mirror of $000000-$1fffff (A21 not decoded) */ + m68k.memory_map[i].base = m68k.memory_map[i + 0x20].base = cart.rom + 0x40000 + ((i & 0x03) << 16); + } + } + + /********************************************** + BACKUP MEMORY + ***********************************************/ + sram_init(); + eeprom_i2c_init(); + + /* external SRAM */ + if (sram.on && !sram.custom) + { + /* disabled on startup if ROM is mapped in same area */ + if (cart.romsize <= sram.start) + { + /* initialize m68k bus handlers */ + m68k.memory_map[sram.start >> 16].base = sram.sram; + m68k.memory_map[sram.start >> 16].read8 = sram_read_byte; + m68k.memory_map[sram.start >> 16].read16 = sram_read_word; + m68k.memory_map[sram.start >> 16].write8 = sram_write_byte; + m68k.memory_map[sram.start >> 16].write16 = sram_write_word; + zbank_memory_map[sram.start >> 16].read = sram_read_byte; + zbank_memory_map[sram.start >> 16].write = sram_write_byte; + } + } + + /********************************************** + SVP CHIP + ***********************************************/ + svp = NULL; + if (strstr(rominfo.international,"Virtua Racing")) + { + svp_init(); + + m68k.memory_map[0x30].base = svp->dram; + m68k.memory_map[0x30].read16 = NULL; + m68k.memory_map[0x30].write16 = svp_write_dram; + + m68k.memory_map[0x31].base = svp->dram + 0x10000; + m68k.memory_map[0x31].read16 = NULL; + m68k.memory_map[0x31].write16 = svp_write_dram; + + m68k.memory_map[0x39].read16 = svp_read_cell_1; + m68k.memory_map[0x3a].read16 = svp_read_cell_2; + } + + /********************************************** + J-CART + ***********************************************/ + cart.special = 0; + if ((strstr(rominfo.product,"00000000") && (rominfo.checksum == 0x168b)) || /* Super Skidmarks, Micro Machines Military */ + (strstr(rominfo.product,"00000000") && (rominfo.checksum == 0x165e)) || /* Pete Sampras Tennis (1991), Micro Machines 96 */ + (strstr(rominfo.product,"00000000") && (rominfo.checksum == 0xcee0)) || /* Micro Machines Military (bad) */ + (strstr(rominfo.product,"00000000") && (rominfo.checksum == 0x2c41)) || /* Micro Machines 96 (bad) */ + (strstr(rominfo.product,"XXXXXXXX") && (rominfo.checksum == 0xdf39)) || /* Sampras Tennis 96 */ + (strstr(rominfo.product,"T-123456") && (rominfo.checksum == 0x1eae)) || /* Sampras Tennis 96 */ + (strstr(rominfo.product,"T-120066") && (rominfo.checksum == 0x16a4)) || /* Pete Sampras Tennis (1994)*/ + strstr(rominfo.product,"T-120096")) /* Micro Machines 2 */ + { + if (cart.romsize <= 0x380000) /* just to be sure (checksum might not be enough) */ + { + cart.special |= HW_J_CART; + + /* force port 1 setting */ + if (input.system[1] != SYSTEM_WAYPLAY) + { + old_system[1] = input.system[1]; + input.system[1] = SYSTEM_MD_GAMEPAD; + } + + /* extra connectors mapped at $38xxxx or $3Fxxxx */ + m68k.memory_map[0x38].read16 = jcart_read; + m68k.memory_map[0x38].write16 = jcart_write; + m68k.memory_map[0x3f].read16 = jcart_read; + m68k.memory_map[0x3f].write16 = jcart_write; + } + } + + /********************************************** + LOCK-ON + ***********************************************/ + + /* clear existing patches */ + ggenie_shutdown(); + areplay_shutdown(); + + /* initialize extra hardware */ + switch (config.lock_on) + { + case TYPE_GG: + { + ggenie_init(); + break; + } + + case TYPE_AR: + { + areplay_init(); + break; + } + + case TYPE_SK: + { + FILE *f; + + /* store S&K ROM above cartridge ROM (and before backup memory) */ + if (cart.romsize > 0x600000) break; + + /* load Sonic & Knuckles ROM (2 MB) */ + f = fopen(SK_ROM,"rb"); + if (!f) break; + for (i=0; i<0x200000; i+=0x1000) + { + fread(cart.rom + 0x600000 + i, 0x1000, 1, f); + } + fclose(f); + + /* load Sonic 2 UPMEM ROM (256 KB) */ + f = fopen(SK_UPMEM,"rb"); + if (!f) break; + for (i=0; i<0x40000; i+=0x1000) + { + fread(cart.rom + 0x900000 + i, 0x1000, 1, f); + } + fclose(f); + +#ifdef LSB_FIRST + for (i=0; i<0x200000; i+=2) + { + /* Byteswap ROM */ + uint8 temp = cart.rom[i + 0x600000]; + cart.rom[i + 0x600000] = cart.rom[i + 0x600000 + 1]; + cart.rom[i + 0x600000 + 1] = temp; + } + + for (i=0; i<0x40000; i+=2) + { + /* Byteswap ROM */ + uint8 temp = cart.rom[i + 0x900000]; + cart.rom[i + 0x900000] = cart.rom[i + 0x900000 + 1]; + cart.rom[i + 0x900000 + 1] = temp; + } +#endif + + /* $000000-$1FFFFF is mapped to S&K ROM */ + for (i=0x00; i<0x20; i++) + { + m68k.memory_map[i].base = cart.rom + 0x600000 + (i << 16); + } + + cart.special |= HW_LOCK_ON; + break; + } + + default: + { + break; + } + } + + /********************************************** + CARTRIDGE EXTRA HARDWARE + ***********************************************/ + memset(&cart.hw, 0, sizeof(cart.hw)); + + /* search for game into database */ + for (i=0; i 0x400000) + { + /* assume linear ROM mapper without bankswitching (max. 10MB) */ + for (i=0x40; i<0xA0; i++) + { + m68k.memory_map[i].base = cart.rom + (i<<16); + m68k.memory_map[i].read8 = NULL; + m68k.memory_map[i].read16 = NULL; + zbank_memory_map[i].read = NULL; + } + } + + /* default write handler for !TIME range ($A130xx)*/ + if (!cart.hw.time_w) + { + cart.hw.time_w = default_time_w; + } +} + +/* hardware that need to be reseted on power on */ +void md_cart_reset(int hard_reset) +{ + int i; + + /* reset cartridge mapping */ + if (cart.hw.bankshift) + { + for (i=0x00; i<0x40; i++) + { + m68k.memory_map[i].base = cart.rom + ((i<<16) & cart.mask); + } + } + + /* SVP chip */ + if (svp) + { + svp_reset(); + } + + /* Lock-ON */ + switch (config.lock_on) + { + case TYPE_GG: + { + ggenie_reset(hard_reset); + break; + } + + case TYPE_AR: + { + areplay_reset(hard_reset); + break; + } + + case TYPE_SK: + { + if (cart.special & HW_LOCK_ON) + { + /* disable UPMEM chip at $300000-$3fffff */ + for (i=0x30; i<0x40; i++) + { + m68k.memory_map[i].base = cart.rom + ((i<<16) & cart.mask); + } + } + break; + } + + default: + { + break; + } + } +} + +int md_cart_context_save(uint8 *state) +{ + int i; + int bufferptr = 0; + uint8 *base; + + /* cartridge mapping */ + for (i=0; i<0x40; i++) + { + /* get base address */ + base = m68k.memory_map[i].base; + + if (base == sram.sram) + { + /* SRAM */ + state[bufferptr++] = 0xff; + } + else + { + /* ROM */ + state[bufferptr++] = ((base - cart.rom) >> 16) & 0xff; + } + } + + /* hardware registers */ + save_param(cart.hw.regs, sizeof(cart.hw.regs)); + + /* SVP */ + if (svp) + { + save_param(svp->iram_rom, 0x800); + save_param(svp->dram,sizeof(svp->dram)); + save_param(&svp->ssp1601,sizeof(ssp1601_t)); + } + + return bufferptr; +} + +int md_cart_context_load(uint8 *state) +{ + int i; + int bufferptr = 0; + uint8 offset; + + /* cartridge mapping */ + for (i=0; i<0x40; i++) + { + /* get offset */ + offset = state[bufferptr++]; + + if (offset == 0xff) + { + /* SRAM */ + m68k.memory_map[i].base = sram.sram; + m68k.memory_map[i].read8 = sram_read_byte; + m68k.memory_map[i].read16 = sram_read_word; + m68k.memory_map[i].write8 = sram_write_byte; + m68k.memory_map[i].write16 = sram_write_word; + zbank_memory_map[i].read = sram_read_byte; + zbank_memory_map[i].write = sram_write_byte; + + } + else + { + /* check if SRAM was mapped there before loading state */ + if (m68k.memory_map[i].base == sram.sram) + { + m68k.memory_map[i].read8 = NULL; + m68k.memory_map[i].read16 = NULL; + m68k.memory_map[i].write8 = m68k_unused_8_w; + m68k.memory_map[i].write16 = m68k_unused_16_w; + zbank_memory_map[i].read = NULL; + zbank_memory_map[i].write = zbank_unused_w; + } + + /* ROM */ + m68k.memory_map[i].base = cart.rom + (offset << 16); + } + } + + /* hardware registers */ + load_param(cart.hw.regs, sizeof(cart.hw.regs)); + + /* SVP */ + if (svp) + { + load_param(svp->iram_rom, 0x800); + load_param(svp->dram,sizeof(svp->dram)); + load_param(&svp->ssp1601,sizeof(ssp1601_t)); + } + + return bufferptr; +} + +/************************************************************ + MAPPER handlers +*************************************************************/ + +/* + "official" ROM/SRAM bankswitch (Phantasy Star IV, Story of Thor/Beyond Oasis, Sonic 3 & Knuckles) +*/ +static void mapper_sega_w(uint32 data) +{ + int i; + + if (data & 1) + { + if (sram.on) + { + /* Backup RAM mapped to $200000-$20ffff (normally mirrored up to $3fffff but this breaks Sonic Megamix and no game need it) */ + m68k.memory_map[0x20].base = sram.sram; + m68k.memory_map[0x20].read8 = sram_read_byte; + m68k.memory_map[0x20].read16 = sram_read_word; + zbank_memory_map[0x20].read = sram_read_byte; + + /* Backup RAM write protection */ + if (data & 2) + { + m68k.memory_map[0x20].write8 = m68k_unused_8_w; + m68k.memory_map[0x20].write16 = m68k_unused_16_w; + zbank_memory_map[0x20].write = zbank_unused_w; + } + else + { + m68k.memory_map[0x20].write8 = sram_write_byte; + m68k.memory_map[0x20].write16 = sram_write_word; + zbank_memory_map[0x20].write = sram_write_byte; + } + } + + /* S&K lock-on chip */ + if ((cart.special & HW_LOCK_ON) && (config.lock_on == TYPE_SK)) + { + /* S2K upmem chip mapped to $300000-$3fffff (256K mirrored) */ + for (i=0x30; i<0x40; i++) + { + m68k.memory_map[i].base = (cart.rom + 0x900000) + ((i & 3) << 16); + } + } + } + else + { + /* cartridge ROM mapped to $200000-$3fffff */ + for (i=0x20; i<0x40; i++) + { + m68k.memory_map[i].base = cart.rom + ((i<<16) & cart.mask); + m68k.memory_map[i].read8 = NULL; + m68k.memory_map[i].read16 = NULL; + zbank_memory_map[i].read = NULL; + m68k.memory_map[i].write8 = m68k_unused_8_w; + m68k.memory_map[i].write16 = m68k_unused_16_w; + zbank_memory_map[i].write = zbank_unused_w; + } + } +} + +/* + Super Street Fighter 2 ROM bankswitch + documented by Bart Trzynadlowski (http://www.trzy.org/files/ssf2.txt) +*/ +static void mapper_ssf2_w(uint32 address, uint32 data) +{ + /* 8 x 512k banks */ + address = (address << 2) & 0x38; + + /* bank 0 remains unchanged */ + if (address) + { + uint32 i; + uint8 *src = cart.rom + (data << 19); + + for (i=0; i<8; i++) + { + m68k.memory_map[address++].base = src + (i<<16); + } + } +} + +/* + SF-001 mapper +*/ +static void mapper_sf001_w(uint32 address, uint32 data) +{ + switch ((address >> 8) & 0xf) + { + case 0xe: + { + int i; + + /* bit 6: enable / disable cartridge access */ + if (data & 0x40) + { + /* $000000-$3FFFFF is not mapped */ + for (i=0x00; i<0x40; i++) + { + m68k.memory_map[i].base = cart.rom + (i << 16); + m68k.memory_map[i].read8 = m68k_read_bus_8; + m68k.memory_map[i].read16 = m68k_read_bus_16; + m68k.memory_map[i].write8 = (i > 0x00) ? m68k_unused_8_w : mapper_sf001_w; + m68k.memory_map[i].write16 = (i > 0x00) ? m68k_unused_16_w : mapper_sf001_w; + zbank_memory_map[i].read = zbank_unused_r; + zbank_memory_map[i].write = (i > 0x00) ? m68k_unused_8_w : mapper_sf001_w; + } + } + + /* bit 7: enable / disable SRAM & ROM bankswitching */ + else if (data & 0x80) + { + /* 256K ROM bank #15 mapped to $000000-$03FFFF */ + for (i=0x00; i<0x04; i++) + { + m68k.memory_map[i].base = cart.rom + ((0x38 + i) << 16); + m68k.memory_map[i].read8 = NULL; + m68k.memory_map[i].read16 = NULL; + zbank_memory_map[i].read = NULL; + } + + /* 256K ROM banks #2 to #15 mapped to $040000-$3BFFFF (last revision) or $040000-$3FFFFF (older revisions) */ + for (i=0x04; i<(sram.start >> 16); i++) + { + m68k.memory_map[i].base = cart.rom + (i << 16); + m68k.memory_map[i].read8 = NULL; + m68k.memory_map[i].read16 = NULL; + zbank_memory_map[i].read = NULL; + } + + /* 32K static RAM mirrored into $3C0000-$3FFFFF (odd bytes only) (last revision only) */ + while (i<0x40) + { + m68k.memory_map[i].base = sram.sram; + m68k.memory_map[i].read8 = sram_read_byte; + m68k.memory_map[i].read16 = sram_read_word; + m68k.memory_map[i].write8 = sram_write_byte; + m68k.memory_map[i].write16 = sram_write_word; + zbank_memory_map[i].read = sram_read_byte; + zbank_memory_map[i].write = sram_write_byte; + i++; + } + } + else + { + /* 256K ROM banks #1 to #16 mapped to $000000-$3FFFFF (default) */ + for (i=0x00; i<0x40; i++) + { + m68k.memory_map[i].base = cart.rom + (i << 16); + m68k.memory_map[i].read8 = NULL; + m68k.memory_map[i].read16 = NULL; + m68k.memory_map[i].write8 = (i > 0x00) ? m68k_unused_8_w : mapper_sf001_w; + m68k.memory_map[i].write16 = (i > 0x00) ? m68k_unused_16_w : mapper_sf001_w; + zbank_memory_map[i].read = NULL; + zbank_memory_map[i].write = (i > 0x00) ? m68k_unused_8_w : mapper_sf001_w; + } + } + + /* bit 5: lock bankswitch hardware when set */ + if (data & 0x20) + { + /* disable bankswitch hardware access until hard reset */ + m68k.memory_map[0x00].write8 = m68k_unused_8_w; + m68k.memory_map[0x00].write16 = m68k_unused_16_w; + zbank_memory_map[0x00].write = m68k_unused_8_w; + } + + return; + } + + default: + { + m68k_unused_8_w(address, data); + return; + } + } +} + +/* + SF-002 mapper +*/ +static void mapper_sf002_w(uint32 address, uint32 data) +{ + int i; + if (data & 0x80) + { + /* $000000-$1BFFFF mapped to $200000-$3BFFFF */ + for (i=0x20; i<0x3C; i++) + { + m68k.memory_map[i].base = cart.rom + ((i & 0x1F) << 16); + } + } + else + { + /* $200000-$3BFFFF mapped to $200000-$3BFFFF */ + for (i=0x20; i<0x3C; i++) + { + m68k.memory_map[i].base = cart.rom + (i << 16); + } + } +} + +/* + SF-004 mapper +*/ +static void mapper_sf004_w(uint32 address, uint32 data) +{ + int i; + switch ((address >> 8) & 0xf) + { + case 0xd: + { + /* bit 7: enable/disable static RAM access */ + if (data & 0x80) + { + /* 32KB static RAM mirrored into $200000-$2FFFFF (odd bytes only) */ + for (i=0x20; i<0x30; i++) + { + m68k.memory_map[i].read8 = sram_read_byte; + m68k.memory_map[i].read16 = sram_read_word; + m68k.memory_map[i].write8 = sram_write_byte; + m68k.memory_map[i].write16 = sram_write_word; + zbank_memory_map[i].read = sram_read_byte; + zbank_memory_map[i].write = sram_write_byte; + } + } + else + { + /* 32KB static RAM disabled at $200000-$2FFFFF */ + for (i=0x20; i<0x30; i++) + { + m68k.memory_map[i].read8 = m68k_read_bus_8; + m68k.memory_map[i].read16 = m68k_read_bus_16; + m68k.memory_map[i].write8 = m68k_unused_8_w; + m68k.memory_map[i].write16 = m68k_unused_16_w; + zbank_memory_map[i].read = m68k_read_bus_8; + zbank_memory_map[i].write = m68k_unused_8_w; + } + } + + return; + } + + case 0x0e: + { + /* bit 5: enable / disable cartridge ROM access */ + if (data & 0x20) + { + /* $000000-$1FFFFF is not mapped */ + for (i=0x00; i<0x20; i++) + { + m68k.memory_map[i].read8 = m68k_read_bus_8; + m68k.memory_map[i].read16 = m68k_read_bus_16; + zbank_memory_map[i].read = m68k_read_bus_8; + } + } + + /* bit 6: enable / disable first page mirroring */ + else if (data & 0x40) + { + /* first page ROM bank */ + uint8 base = (m68k.memory_map[0x00].base - cart.rom) >> 16; + + /* 5 x 256K ROM banks mapped to $000000-$13FFFF, starting from first page ROM bank */ + for (i=0x00; i<0x14; i++) + { + m68k.memory_map[i].base = cart.rom + (((base + i) & 0x1f) << 16); + m68k.memory_map[i].read8 = NULL; + m68k.memory_map[i].read16 = NULL; + zbank_memory_map[i].read = NULL; + } + + /* $140000-$1FFFFF is not mapped */ + for (i=0x14; i<0x20; i++) + { + m68k.memory_map[i].read8 = m68k_read_bus_8; + m68k.memory_map[i].read16 = m68k_read_bus_16; + zbank_memory_map[i].read = m68k_read_bus_8; + } + } + else + { + /* first page 256K ROM bank mirrored into $000000-$1FFFFF */ + for (i=0x00; i<0x20; i++) + { + m68k.memory_map[i].base = m68k.memory_map[0].base + ((i & 0x03) << 16); + m68k.memory_map[i].read8 = NULL; + m68k.memory_map[i].read16 = NULL; + zbank_memory_map[i].read = NULL; + } + } + + /* bit 7: lock ROM bankswitching hardware when cleared */ + if (!(data & 0x80)) + { + /* disable bankswitch hardware access */ + m68k.memory_map[0x00].write8 = m68k_unused_8_w; + m68k.memory_map[0x00].write16 = m68k_unused_16_w; + zbank_memory_map[0x00].write = m68k_unused_8_w; + } + + return; + } + + case 0x0f: + { + /* bits 6-4: select first page ROM bank (8 x 256K ROM banks) */ + uint8 base = ((data >> 4) & 7) << 2; + + if (m68k.memory_map[0].base == m68k.memory_map[4].base) + { + /* selected 256K ROM bank mirrored into $000000-$1FFFFF */ + for (i=0x00; i<0x20; i++) + { + m68k.memory_map[i].base = cart.rom + ((base + (i & 0x03)) << 16); + } + } + else + { + /* 5 x 256K ROM banks mapped to $000000-$13FFFF, starting from selected bank */ + for (i=0x00; i<0x14; i++) + { + m68k.memory_map[i].base = cart.rom + (((base + i) & 0x1f) << 16); + } + } + + return; + } + + default: + { + m68k_unused_8_w(address, data); + return; + } + } +} + +static uint32 mapper_sf004_r(uint32 address) +{ + /* return first page 256K bank index ($00,$10,$20,...,$70) */ + return (((m68k.memory_map[0x00].base - cart.rom) >> 18) << 4); +} + +/* + T-5740xx-xx mapper +*/ +static void mapper_t5740_w(uint32 address, uint32 data) +{ + int i; + uint8 *base; + + switch (address & 0xff) + { + case 0x01: /* mode register */ + { + /* bits 7-4: unused ? */ + /* bit 3: enable SPI registers access ? */ + /* bit 2: not used ? */ + /* bit 1: enable bankswitch registers access ? */ + /* bit 0: always set, enable hardware access ? */ + return; + } + + case 0x03: /* page #5 register */ + { + /* map any of 16 x 512K ROM banks to $280000-$2FFFFF */ + base = cart.rom + ((data & 0x0f) << 19); + for (i=0x28; i<0x30; i++) + { + m68k.memory_map[i].base = base + ((i & 0x07) << 16); + } + return; + } + + case 0x05: /* page #6 register */ + { + /* map any of 16 x 512K ROM banks to $300000-$37FFFF */ + base = cart.rom + ((data & 0x0f) << 19); + for (i=0x30; i<0x38; i++) + { + m68k.memory_map[i].base = base + ((i & 0x07) << 16); + } + return; + } + + case 0x07: /* page #7 register */ + { + /* map any of 16 x 512K ROM banks to $380000-$3FFFFF */ + base = cart.rom + ((data & 0x0f) << 19); + for (i=0x38; i<0x40; i++) + { + m68k.memory_map[i].base = base + ((i & 0x07) << 16); + } + return; + } + + case 0x09: /* serial EEPROM SPI board support */ + { + eeprom_spi_write(data); + return; + } + + default: + { + /* unknown registers */ + m68k_unused_8_w(address, data); + return; + } + } +} + +static uint32 mapper_t5740_r(uint32 address) +{ + /* By default, first 32K of each eight 512K pages mapped in $000000-$3FFFFF are mirrored in the 512K page */ + /* mirroring is disabled/enabled when a specific number of words is being read from specific ROM addresses */ + /* Exact decoding isn't known but mirrored data is expected on startup when reading a few times from $181xx */ + /* this area doesn't seem to be accessed as byte later so it seems safe to always return mirrored data here */ + if ((address & 0xff00) == 0x8100) + { + return READ_BYTE(cart.rom , (address & 0x7fff)); + } + + return READ_BYTE(cart.rom, address); +} + +/* + Super Mario World 64 (unlicensed) mapper +*/ +static void mapper_smw_64_w(uint32 address, uint32 data) +{ + /* internal registers (saved to backup RAM) */ + switch ((address >> 16) & 0x07) + { + case 0x00: /* $60xxxx */ + { + if (address & 2) + { + /* $600003 data write mode ? */ + switch (sram.sram[0x00] & 0x07) + { + case 0x00: + { + /* update value returned at $660001-$660003 */ + sram.sram[0x06] = ((sram.sram[0x06] ^ sram.sram[0x01]) ^ data) & 0xFE; + break; + } + + case 0x01: + { + /* update value returned at $660005-$660007 */ + sram.sram[0x07] = data & 0xFE; + break; + } + + case 0x07: + { + /* update selected ROM bank (upper 512K) mapped at $610000-$61ffff */ + m68k.memory_map[0x61].base = m68k.memory_map[0x69].base = cart.rom + 0x080000 + ((data & 0x1c) << 14); + break; + } + + default: + { + /* unknown mode */ + break; + } + } + + /* $600003 data register */ + sram.sram[0x01] = data; + } + else + { + /* $600001 ctrl register */ + sram.sram[0x00] = data; + } + return; + } + + case 0x01: /* $61xxxx */ + { + if (address & 2) + { + /* $610003 ctrl register */ + sram.sram[0x02] = data; + } + return; + } + + case 0x04: /* $64xxxx */ + { + if (address & 2) + { + /* $640003 data register */ + sram.sram[0x04] = data; + } + else + { + /* $640001 data register */ + sram.sram[0x03] = data; + } + return; + } + + case 0x06: /* $66xxxx */ + { + /* unknown */ + return; + } + + case 0x07: /* $67xxxx */ + { + if (!(address & 2)) + { + /* $670001 ctrl register */ + sram.sram[0x05] = data; + + /* upper 512K ROM bank-switching enabled ? */ + if (sram.sram[0x02] & 0x80) + { + /* update selected ROM bank (upper 512K) mapped at $600000-$60ffff */ + m68k.memory_map[0x60].base = m68k.memory_map[0x68].base = cart.rom + 0x080000 + ((data & 0x1c) << 14); + } + } + return; + } + + default: /* not used */ + { + m68k_unused_8_w(address, data); + return; + } + } +} + +static uint32 mapper_smw_64_r(uint32 address) +{ + /* internal registers (saved to backup RAM) */ + switch ((address >> 16) & 0x03) + { + case 0x02: /* $66xxxx */ + { + switch ((address >> 1) & 7) + { + case 0x00: return sram.sram[0x06]; + case 0x01: return sram.sram[0x06] + 1; + case 0x02: return sram.sram[0x07]; + case 0x03: return sram.sram[0x07] + 1; + case 0x04: return sram.sram[0x08]; + case 0x05: return sram.sram[0x08] + 1; + case 0x06: return sram.sram[0x08] + 2; + case 0x07: return sram.sram[0x08] + 3; + } + } + + case 0x03: /* $67xxxx */ + { + uint8 data = (sram.sram[0x02] & 0x80) ? ((sram.sram[0x05] & 0x40) ? (sram.sram[0x03] & sram.sram[0x04]) : (sram.sram[0x03] ^ 0xFF)) : 0x00; + + if (address & 2) + { + /* $670003 */ + data &= 0x7f; + } + else + { + /* $66xxxx data registers update */ + if (sram.sram[0x05] & 0x80) + { + if (sram.sram[0x05] & 0x20) + { + /* update $660009-$66000f data register */ + sram.sram[0x08] = (sram.sram[0x04] << 2) & 0xFC; + } + else + { + /* update $660001-$660003 data register */ + sram.sram[0x06] = (sram.sram[0x01] ^ (sram.sram[0x03] << 1)) & 0xFE; + } + } + } + + return data; + } + + default: /* 64xxxx-$65xxxx */ + { + return 0x00; + } + } +} + +/* + Realtec ROM bankswitch (Earth Defend, Balloon Boy & Funny World, Whac-A-Critter) + (Note: register usage is inverted in TascoDlx documentation) +*/ +static void mapper_realtec_w(uint32 address, uint32 data) +{ + switch (address) + { + case 0x402000: + { + /* number of mapped 64k blocks (the written value is a number of 128k blocks) */ + cart.hw.regs[2] = data << 1; + return; + } + + case 0x404000: + { + /* 00000xxx */ + cart.hw.regs[0] = data & 7; + return; + } + + case 0x400000: + { + /* 00000yy1 */ + cart.hw.regs[1] = data & 6; + + /* ensure mapped size is not null */ + if (cart.hw.regs[2]) + { + /* mapped start address is 00yy xxx0 0000 0000 0000 0000 */ + uint32 base = (cart.hw.regs[0] << 1) | (cart.hw.regs[1] << 3); + + /* selected blocks are mirrored into the whole cartridge area */ + int i; + for (i=0x00; i<0x40; i++) + { + m68k.memory_map[i].base = &cart.rom[(base + (i % cart.hw.regs[2])) << 16]; + } + } + return; + } + } +} + +/* Game no Kanzume Otokuyou ROM Mapper */ +static void mapper_seganet_w(uint32 address, uint32 data) +{ + if ((address & 0xff) == 0xf1) + { + int i; + if (data & 1) + { + /* ROM Write protected */ + for (i=0; i<0x40; i++) + { + m68k.memory_map[i].write8 = m68k_unused_8_w; + m68k.memory_map[i].write16 = m68k_unused_16_w; + zbank_memory_map[i].write = zbank_unused_w; + } + } + else + { + /* ROM Write enabled */ + for (i=0; i<0x40; i++) + { + m68k.memory_map[i].write8 = NULL; + m68k.memory_map[i].write16 = NULL; + zbank_memory_map[i].write = NULL; + } + } + } +} + +/* + Custom ROM Bankswitch used in Soul Edge VS Samurai Spirits, Top Fighter, Mulan, Pocket Monsters II, Lion King 3, Super King Kong 99, Pokemon Stadium +*/ +static void mapper_32k_w(uint32 data) +{ + int i; + + /* 64 x 32k banks */ + if (data) + { + for (i=0; i<0x10; i++) + { + /* Remap to unused ROM area */ + m68k.memory_map[i].base = &cart.rom[0x400000 + (i << 16)]; + + /* address = address OR (value << 15) */ + memcpy(m68k.memory_map[i].base, cart.rom + ((i << 16) | (data & 0x3f) << 15), 0x8000); + memcpy(m68k.memory_map[i].base + 0x8000, cart.rom + ((i << 16) | ((data | 1) & 0x3f) << 15), 0x8000); + } + } + else + { + /* reset default $000000-$0FFFFF mapping */ + for (i=0; i<16; i++) + { + m68k.memory_map[i].base = &cart.rom[i << 16]; + } + } +} + +/* + Custom ROM Bankswitch used in Chinese Fighter III +*/ +static void mapper_64k_w(uint32 data) +{ + int i; + + /* 16 x 64k banks */ + if (data) + { + /* bank is mapped at $000000-$0FFFFF */ + for (i=0; i<16; i++) + { + m68k.memory_map[i].base = &cart.rom[(data & 0xf) << 16]; + } + } + else + { + /* reset default $000000-$0FFFFF mapping */ + for (i=0; i<16; i++) + { + m68k.memory_map[i].base = &cart.rom[(i & 0xf) << 16]; + } + } +} + +/* + Custom ROM Bankswitch used in pirate "Multi-in-1" cartridges, A Bug's Life, King of Fighter 99, Pocket Monster, Rockman X3 + */ +static void mapper_64k_multi_w(uint32 address) +{ + int i; + + /* 64 x 64k banks */ + for (i=0; i<64; i++) + { + m68k.memory_map[i].base = &cart.rom[((address++) & 0x3f) << 16]; + } +} + +/* + Custom ROM Bankswitch used in RADICA cartridges +*/ +static uint32 mapper_radica_r(uint32 address) +{ + int i = 0; + address = (address >> 1); + + /* 64 x 64k banks */ + for (i = 0; i < 64; i++) + { + m68k.memory_map[i].base = &cart.rom[((address++)& 0x3f)<< 16]; + } + + return 0xffff; +} + + +/************************************************************ + default !TIME signal handler +*************************************************************/ + +static void default_time_w(uint32 address, uint32 data) +{ + if (address < 0xa13040) + { + /* unlicensed cartridges mapper (default) */ + mapper_64k_multi_w(address); + return; + } + + /* official cartridges mapper (default) */ + mapper_sega_w(data); +} + + +/************************************************************ + Internal register handlers +*************************************************************/ + +static uint32 default_regs_r(uint32 address) +{ + int i; + for (i=0; i<4; i++) + { + if ((address & cart.hw.mask[i]) == cart.hw.addr[i]) + { + return cart.hw.regs[i]; + } + } + return m68k_read_bus_8(address); +} + +static uint32 default_regs_r_16(uint32 address) +{ + int i; + for (i=0; i<4; i++) + { + if ((address & cart.hw.mask[i]) == cart.hw.addr[i]) + { + return (cart.hw.regs[i] << 8); + } + } + return m68k_read_bus_16(address); +} + +static void default_regs_w(uint32 address, uint32 data) +{ + int i; + for (i=0; i<4; i++) + { + if ((address & cart.hw.mask[i]) == cart.hw.addr[i]) + { + cart.hw.regs[i] = data; + return; + } + } + m68k_unused_8_w(address, data); +} + +/* basic register shifting hardware (Bug's Life, Pocket Monster) */ +static uint32 custom_regs_r(uint32 address) +{ + int i; + for (i=0; i<4; i++) + { + if ((address & cart.hw.mask[i]) == cart.hw.addr[i]) + { + return cart.hw.regs[i] >> 1; + } + } + + return m68k_read_bus_8(address); +} + +/* custom register hardware (Top Fighter, Lion King III, Super Donkey Kong 99, Mulan, Pocket Monsters II, Pokemon Stadium) */ +static void custom_regs_w(uint32 address, uint32 data) +{ + uint8 temp; + + /* ROM bankswitch */ + if ((address >> 16) > 0x6f) + { + mapper_32k_w(data); + return; + } + + /* write register */ + default_regs_w(address, data); + + /* bitswapping */ + temp = cart.hw.regs[0]; + switch (cart.hw.regs[1] & 3) + { + case 0: + cart.hw.regs[2] = (temp << 1); + break; + + case 1: + cart.hw.regs[2] = (temp >> 1); + return; + + case 2: + cart.hw.regs[2] = ((temp >> 4) | ((temp & 0x0F) << 4)); + return; + + default: + cart.hw.regs[2] = (((temp >> 7) & 0x01) | ((temp >> 5) & 0x02) | + ((temp >> 3) & 0x04) | ((temp >> 1) & 0x08) | + ((temp << 1) & 0x10) | ((temp << 3) & 0x20) | + ((temp << 5) & 0x40) | ((temp << 7) & 0x80)); + return; + } +} + +/* alternate custom register hardware (Chinese Fighters III) */ +static void custom_alt_regs_w(uint32 address, uint32 data) +{ + /* ROM bankswitch */ + if ((address >> 16) > 0x5f) + { + mapper_64k_w(data); + return; + } + + /* write regs */ + default_regs_w(address, data); +} + + +/* "Tekken 3 Special" custom register hardware */ +static uint32 tekken_regs_r(uint32 address) +{ + /* data output */ + if ((address & 0x0e) == 0x02) + { + /* maybe depends on mode bits ? */ + return (cart.hw.regs[0] - 1); + } + + return m68k_read_bus_16(address); +} + +static void tekken_regs_w(uint32 address, uint32 data) +{ + switch (address & 0x0e) + { + case 0x00: + { + /* data output reset ? (game writes $FF before & after protection check) */ + cart.hw.regs[0]= 0x00; + break; + } + + case 0x02: + { + /* read only ? */ + break; + } + + case 0x0c: + { + /* data output mode bit 0 ? (game writes $01) */ + break; + } + + case 0x0e: + { + /* data output mode bit 1 ? (never written by game) */ + break; + } + + default: + { + /* data input (only connected to D0 ?)*/ + if (data & 1) + { + /* 4-bit hardware register ($400004 corresponds to bit0, $400006 to bit1, etc) */ + cart.hw.regs[0] |= 1 << (((address - 0x04) >> 1) & 3); + } + break; + } + } +} + +/* "Top Shooter" arcade board hardware */ +static uint32 topshooter_r(uint32 address) +{ + if (address < 0x202000) + { + uint8 temp = 0xff; + + switch (address & 0xff) + { + case 0x43: + { + if (input.pad[0] & INPUT_A) temp &= ~0x80; /* Shoot */ + if (input.pad[0] & INPUT_B) temp &= ~0x10; /* Bet */ + if (input.pad[0] & INPUT_START) temp &= ~0x20; /* Start */ + break; + } + + case 0x45: /* ??? (DOWN) & Service Mode (UP) */ + { + if (input.pad[0] & INPUT_UP) temp &= ~0x08; /* Service Mode */ + if (input.pad[0] & INPUT_DOWN) temp &= ~0x10; /* ???, used in service menu to select next option */ + break; + } + + case 0x47: + { + if (input.pad[0] & INPUT_RIGHT) temp &= ~0x03; /* Insert 10 coins */ + break; + } + + case 0x49: + { + if (input.pad[0] & INPUT_LEFT) temp &= ~0x03; /* Clear coins */ + if (input.pad[0] & INPUT_C) temp &= ~0x01; /* Insert XXX coins */ + break; + } + + case 0x51: + { + temp = 0xA5; + break; + } + + default: + { + temp = m68k_read_bus_8(address); + break; + } + } + return temp; + } + + return READ_BYTE(sram.sram , address & 0xffff); +} + +static void topshooter_w(uint32 address, uint32 data) +{ + if (address >= 0x202000) + { + WRITE_BYTE(sram.sram , address & 0xffff, data); + return; + } + + m68k_unused_8_w(address, data); +} + + +/* Sega Channel hardware (not emulated) */ +/* + +$A13004: BUSY ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? + +Unused read16 00A13004 (00005B54) +Unused read16 00A13004 (00005B70) +Unused read16 00A13006 (00005B7C) + +Unused read16 00A13004 (00005BC4) +Unused read16 00A13004 (00005BDA) + +Unused write16 00A13032 = 0004 (00005706) +Unused write16 00A130F0 = 0000 (0000570E) + +Unused write16 00A130F0 = 0000 (0000463E) +Unused write16 00A130F2 = 0001 (00004646) +Unused write16 00A130F4 = 0002 (0000464E) +Unused write16 00A130F6 = 0003 (00004656) +Unused write16 00A130F8 = 0004 (0000465E) +Unused write16 00A130FA = 0005 (00004666) + +Unused write16 00A13032 = 0004 (00005706) +Unused write16 00A13032 = 0104 (0000579E) + +Unused write16 00380000 = ACDC (00005718) +Unused write16 00380002 = 0000 (00005722) +Unused read16 00380000 (0000572C) +Unused write16 00A13032 = 0104 (0000579E) +Unused write16 00300000 = ACDC (000057B2) +Unused write16 00380000 = 0000 (000057BC) +Unused read16 00300000 (000057C6) + +static uint32 sega_channel_r(uint32 address) +{ + return m68k_read_bus_16(address);; +} + +static void sega_channel_w(uint32 address, uint32 data) +{ + m68k_unused_16_w(address, data); +} +*/ diff --git a/genplus-gx/core/cart_hw/md_cart.h b/genplus-gx/core/cart_hw/md_cart.h new file mode 100644 index 0000000000..24c0bee038 --- /dev/null +++ b/genplus-gx/core/cart_hw/md_cart.h @@ -0,0 +1,90 @@ +/**************************************************************************** + * Genesis Plus + * Mega Drive cartridge hardware support + * + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Most cartridge protections were initially documented by Haze + * (http://haze.mameworld.info/) + * + * Realtec mapper was documented by TascoDeluxe + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _MD_CART_H_ +#define _MD_CART_H_ + +#define cart ext.md_cart + +/* Lock-On cartridge type */ +#define TYPE_GG 0x01 /* Game Genie */ +#define TYPE_AR 0x02 /* (Pro) Action Replay */ +#define TYPE_SK 0x03 /* Sonic & Knuckles */ + +/* Special hardware (0x01 & 0x02 reserved for Master System 3-D glasses & Terebi Oekaki) */ +#define HW_J_CART 0x04 +#define HW_LOCK_ON 0x08 + +/* Cartridge extra hardware */ +typedef struct +{ + uint8 regs[4]; /* internal registers (R/W) */ + uint32 mask[4]; /* registers address mask */ + uint32 addr[4]; /* registers address */ + uint16 realtec; /* realtec mapper */ + uint16 bankshift; /* cartridge with bankshift mecanism reseted on software reset */ + unsigned int (*time_r)(unsigned int address); /* !TIME signal ($a130xx) read handler */ + void (*time_w)(unsigned int address, unsigned int data); /* !TIME signal ($a130xx) write handler */ + unsigned int (*regs_r)(unsigned int address); /* cart hardware registers read handler */ + void (*regs_w)(unsigned int address, unsigned int data); /* cart hardware registers write handler */ +} cart_hw_t; + +/* Cartridge type */ +typedef struct +{ + uint8 rom[MAXROMSIZE]; /* ROM area */ + uint8 *base; /* ROM base (saved for OS/Cartridge ROM swap) */ + uint32 romsize; /* ROM size */ + uint32 mask; /* ROM mask */ + uint8 special; /* Lock-On, J-Cart or SMS 3-D glasses hardware */ + cart_hw_t hw; /* Extra mapping hardware */ +} md_cart_t; + + +/* Function prototypes */ +extern void md_cart_init(void); +extern void md_cart_reset(int hard_reset); +extern int md_cart_context_save(uint8 *state); +extern int md_cart_context_load(uint8 *state); + +#endif diff --git a/genplus-gx/core/cart_hw/sms_cart.c b/genplus-gx/core/cart_hw/sms_cart.c new file mode 100644 index 0000000000..1d3728e1c4 --- /dev/null +++ b/genplus-gx/core/cart_hw/sms_cart.c @@ -0,0 +1,1324 @@ +/**************************************************************************** + * Genesis Plus + * SG-1000, Master System & Game Gear cartridge hardware support + * + * Copyright (C) 2007-2012 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "eeprom_93c.h" +#include "terebi_oekaki.h" + +#define MAPPER_NONE (0x00) +#define MAPPER_TEREBI (0x01) +#define MAPPER_RAM_8K_EXT1 (0x02) +#define MAPPER_RAM_8K_EXT2 (0x03) +#define MAPPER_SEGA (0x10) +#define MAPPER_SEGA_X (0x11) +#define MAPPER_93C46 (0x12) +#define MAPPER_CODIES (0x13) +#define MAPPER_MULTI (0x14) +#define MAPPER_KOREA (0x15) +#define MAPPER_KOREA_16K (0x16) +#define MAPPER_KOREA_8K (0x20) +#define MAPPER_MSX (0x21) +#define MAPPER_MSX_NEMESIS (0x22) + +#define GAME_DATABASE_CNT (211) + +typedef struct +{ + uint32 crc; + uint8 g_3d; + uint8 fm; + uint8 peripheral; + uint8 mapper; + uint8 system; + uint8 region; +} rominfo_t; + +typedef struct +{ + uint8 fcr[4]; + uint8 mapper; + uint8 pages; +} romhw_t; + +static const rominfo_t game_list[GAME_DATABASE_CNT] = +{ + /* program requiring Mega Drive VDP (Mode 5) */ + {0x47FA618D, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_PBC, REGION_USA}, /* Charles MacDonald's Mode 5 Demo Program */ + + /* game requiring SEGA mapper */ + {0xFF67359B, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* DataStorm (homebrew) */ + + /* games requiring 315-5124 VDP (Mark-III, Master System I) */ + {0x32759751, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Y's (J) */ + + /* games requiring Sega 315-5235 mapper without bank shifting */ + {0x23BAC434, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA_X, SYSTEM_GG, REGION_USA}, /* Shining Force Gaiden - Final Conflict (JP) [T-Eng] */ + + /* games using various Korean mappers */ + {0x17AB6883, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_NONE, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* FA Tetris (KR) */ + {0x61E8806F, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_NONE, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Flash Point (KR) */ + {0x445525E2, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_MSX, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Penguin Adventure (KR) */ + {0x83F0EEDE, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_MSX, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Street Master (KR) */ + {0xA05258F5, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_MSX, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Won-Si-In (KR) */ + {0x06965ED9, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_MSX, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* F-1 Spirit - The way to Formula-1 (KR) */ + {0x77EFE84A, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_MSX, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Cyborg Z (KR) */ + {0xF89AF3CC, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_MSX, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Knightmare II - The Maze of Galious (KR) */ + {0x9195C34C, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_MSX, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Super Boy 3 (KR) */ + {0xE316C06D, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_MSX_NEMESIS, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Nemesis (KR) */ + {0x0A77FA5E, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_MSX, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Nemesis 2 (KR) */ + {0xA67F2A5C, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_MULTI, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* 4-Pak All Action (KR) */ + {0x89B79E77, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_KOREA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Dodgeball King (KR) */ + {0x18FB98A3, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_KOREA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Jang Pung 3 (KR) */ + {0x97D03541, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_KOREA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Sangokushi 3 (KR) */ + {0x67C2F0FF, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_KOREA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Super Boy 2 (KR) */ + {0x192949D5, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_KOREA_8K, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Janggun-ui Adeul (KR) */ + {0x9FA727A0, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_KOREA_16K, SYSTEM_GGMS, REGION_USA}, /* Street Hero [Proto 0] [SMS-GG] (US) */ + {0xFB481971, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_KOREA_16K, SYSTEM_GGMS, REGION_USA}, /* Street Hero [Proto 1] [SMS-GG] (US) */ + + /* games using Codemaster mapper */ + {0x29822980, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_CODIES, SYSTEM_SMS2, REGION_EUROPE}, /* Cosmic Spacehead */ + {0x8813514B, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_CODIES, SYSTEM_SMS2, REGION_EUROPE}, /* Excellent Dizzy Collection, The [Proto] */ + {0xB9664AE1, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_CODIES, SYSTEM_SMS2, REGION_EUROPE}, /* Fantastic Dizzy */ + {0xA577CE46, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_CODIES, SYSTEM_SMS2, REGION_EUROPE}, /* Micro Machines */ + {0xEA5C3A6F, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_CODIES, SYSTEM_SMS2, REGION_USA}, /* Dinobasher - Starring Bignose the Caveman [Proto] */ + {0xAA140C9C, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_CODIES, SYSTEM_GGMS, REGION_USA}, /* Excellent Dizzy Collection, The [SMS-GG] */ + {0xC888222B, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_CODIES, SYSTEM_GGMS, REGION_USA}, /* Fantastic Dizzy [SMS-GG] */ + {0x76C5BDFB, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_CODIES, SYSTEM_GGMS, REGION_USA}, /* Jang Pung 2 [SMS-GG] */ + {0x6CAA625B, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_CODIES, SYSTEM_GG, REGION_USA}, /* Cosmic Spacehead [GG]*/ + {0x152F0DCC, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_CODIES, SYSTEM_GG, REGION_USA}, /* Drop Zone" */ + {0x5E53C7F7, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_CODIES, SYSTEM_GG, REGION_USA}, /* Ernie Els Golf */ + {0xD9A7F170, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_CODIES, SYSTEM_GG, REGION_USA}, /* Man Overboard! */ + {0xF7C524F6, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_CODIES, SYSTEM_GG, REGION_USA}, /* Micro Machines [GG] */ + {0xDBE8895C, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_CODIES, SYSTEM_GG, REGION_USA}, /* Micro Machines 2 - Turbo Tournament */ + {0xC1756BEE, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_CODIES, SYSTEM_GG, REGION_USA}, /* Pete Sampras Tennis */ + {0x72981057, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_CODIES, SYSTEM_GG, REGION_USA}, /* CJ Elephant Fugitive */ + + /* games using serial EEPROM */ + {0x36EBCD6D, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_93C46, SYSTEM_GG, REGION_USA}, /* Majors Pro Baseball */ + {0x3D8D0DD6, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_93C46, SYSTEM_GG, REGION_USA}, /* World Series Baseball [v0] */ + {0xBB38CFD7, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_93C46, SYSTEM_GG, REGION_USA}, /* World Series Baseball [v1] */ + {0x578A8A38, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_93C46, SYSTEM_GG, REGION_USA}, /* World Series Baseball '95 */ + + /* games using Terebi Oekaki graphic board */ + {0xDD4A661B, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_TEREBI, SYSTEM_SG, REGION_JAPAN_NTSC}, /* Terebi Oekaki */ + + /* games requiring 8K RAM extension adapter */ + {0xCE5648C3, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_RAM_8K_EXT1, SYSTEM_SG, REGION_JAPAN_NTSC}, /* Bomberman Special [DahJee] (TW) */ + {0x223397A1, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_RAM_8K_EXT1, SYSTEM_SG, REGION_JAPAN_NTSC}, /* King's Valley (TW) */ + {0x281D2888, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_RAM_8K_EXT1, SYSTEM_SG, REGION_JAPAN_NTSC}, /* Knightmare (TW) */ + {0x306D5F78, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_RAM_8K_EXT1, SYSTEM_SG, REGION_JAPAN_NTSC}, /* Rally-X [DahJee] (TW) */ + {0x29E047CC, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_RAM_8K_EXT1, SYSTEM_SG, REGION_JAPAN_NTSC}, /* Road Fighter (TW) */ + {0x5CBD1163, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_RAM_8K_EXT1, SYSTEM_SG, REGION_JAPAN_NTSC}, /* Tank Battalion (TW) */ + {0x2E7166D5, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_RAM_8K_EXT1, SYSTEM_SG, REGION_JAPAN_NTSC}, /* The Legend of Kage (TW) */ + {0xC550B4F0, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_RAM_8K_EXT1, SYSTEM_SG, REGION_JAPAN_NTSC}, /* TwinBee (TW) */ + {0xFC87463C, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_RAM_8K_EXT1, SYSTEM_SG, REGION_JAPAN_NTSC}, /* Yie Ar Kung-Fu II (TW) */ + {0x69FC1494, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_RAM_8K_EXT2, SYSTEM_SG, REGION_JAPAN_NTSC}, /* Bomberman Special (TW) */ + {0xFFC4EE3F, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_RAM_8K_EXT2, SYSTEM_SG, REGION_JAPAN_NTSC}, /* Magical Kid Wiz (TW) */ + {0x2E366CCF, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_RAM_8K_EXT2, SYSTEM_SG, REGION_JAPAN_NTSC}, /* The Castle (TW) */ + {0xAAAC12CF, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_RAM_8K_EXT2, SYSTEM_SG, REGION_JAPAN_NTSC}, /* Rally-X (TW) */ + {0xD2EDD329, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_RAM_8K_EXT2, SYSTEM_SG, REGION_JAPAN_NTSC}, /* Road Fighter (TW) */ + + /* games requiring Japanese region setting */ + {0x71DEBA5A, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_GG, REGION_JAPAN_NTSC}, /* Pop Breaker */ + {0xC9DD4E5F, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Woody Pop (Super Arkanoid) */ + + /* games requiring Mark-III hardware (no Memory Control port) */ + {0xBD1CC7DF, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_MARKIII, REGION_JAPAN_NTSC}, /* Super Tetris (KR) */ + {0x6D309AC5, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_MARKIII, REGION_JAPAN_NTSC}, /* Power Boggle Boggle (KR) */ + + /* games requiring random RAM pattern initialization */ + {0x08BF3DE3, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_NONE, SYSTEM_MARKIII, REGION_JAPAN_NTSC}, /* Alibaba and 40 Thieves (KR) */ + {0x643B6B76, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_NONE, SYSTEM_MARKIII, REGION_JAPAN_NTSC}, /* Block Hole (KR) */ + + /* games requiring PAL timings */ + {0x72420F38, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_EUROPE}, /* Addams Familly */ + {0x2D48C1D3, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_EUROPE}, /* Back to the Future Part III */ + {0x1CBB7BF1, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_EUROPE}, /* Battlemaniacs (BR) */ + {0x1B10A951, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_EUROPE}, /* Bram Stoker's Dracula */ + {0xC0E25D62, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_EUROPE}, /* California Games II */ + {0x45C50294, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_EUROPE}, /* Jogos de Verao II (BR) */ + {0xC9DBF936, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_EUROPE}, /* Home Alone */ + {0x0047B615, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_EUROPE}, /* Predator2 */ + {0xF42E145C, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_EUROPE}, /* Quest for the Shaven Yak Starring Ren Hoek & Stimpy (BR) */ + {0x9F951756, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_EUROPE}, /* RoboCop 3 */ + {0xF8176918, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_EUROPE}, /* Sensible Soccer */ + {0x1575581D, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_EUROPE}, /* Shadow of the Beast */ + {0x96B3F29E, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_EUROPE}, /* Sonic Blast (BR) */ + {0x5B3B922C, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_EUROPE}, /* Sonic the Hedgehog 2 [V0] */ + {0xD6F2BFCA, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_EUROPE}, /* Sonic the Hedgehog 2 [V1] */ + {0xCA1D3752, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_EUROPE}, /* Space Harrier [50 Hz] */ + {0x85CFC9C9, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_EUROPE}, /* Taito Chase H.Q. */ + {0x332A847D, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_EUROPE}, /* NBA Jam [Proto] */ + + /* games running in Game Gear MS compatibility mode */ + {0x59840FD6, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_GGMS, REGION_USA}, /* Castle of Illusion - Starring Mickey Mouse [SMS-GG] */ + {0x9C76FB3A, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_GGMS, REGION_USA}, /* Rastan Saga [SMS-GG] */ + {0xC8381DEF, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_GGMS, REGION_USA}, /* Taito Chase H.Q [SMS-GG] */ + {0xDA8E95A9, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_GGMS, REGION_USA}, /* WWF Wrestlemania Steel Cage Challenge [SMS-GG] */ + {0x1D93246E, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_GGMS, REGION_USA}, /* Olympic Gold [A][SMS-GG] */ + {0xA2F9C7AF, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_GGMS, REGION_USA}, /* Olympic Gold [B][SMS-GG] */ + {0x01EAB89D, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_GGMS, REGION_USA}, /* Out Run Europa [SMS-GG] */ + {0xF037EC00, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_GGMS, REGION_USA}, /* Out Run Europa (US) [SMS-GG] */ + {0xE5F789B9, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_GGMS, REGION_USA}, /* Predator 2 [SMS-GG] */ + {0x311D2863, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_GGMS, REGION_USA}, /* Prince of Persia [A][SMS-GG] */ + {0x45F058D6, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_GGMS, REGION_USA}, /* Prince of Persia [B][SMS-GG] */ + {0x56201996, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_GGMS, REGION_USA}, /* R.C. Grand Prix [SMS-GG] */ + {0x10DBBEF4, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_GGMS, REGION_USA}, /* Super Kick Off [SMS-GG] */ + {0x9942B69B, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_GGMS, REGION_JAPAN_NTSC}, /* Castle of Illusion - Starring Mickey Mouse (J) [SMS-GG] */ + {0x7BB81E3D, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_GGMS, REGION_JAPAN_NTSC}, /* Taito Chase H.Q (J) [SMS-GG] */ + {0x6F8E46CF, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_GGMS, REGION_JAPAN_NTSC}, /* Alex Kidd in Miracle World (TW) [SMS-GG] */ + {0x3382D73F, 0, 0, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_GGMS, REGION_JAPAN_NTSC}, /* Olympic Gold (TW) [SMS-GG] */ + + /* games requiring 3-D Glasses */ + {0x6BD5C2BF, 1, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Space Harrier 3-D */ + {0x8ECD201C, 1, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Blade Eagle 3-D */ + {0xFBF96C81, 1, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Blade Eagle 3-D (BR) */ + {0x58D5FC48, 1, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Blade Eagle 3-D [Proto] */ + {0x31B8040B, 1, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Maze Hunter 3-D */ + {0xABD48AD2, 1, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Poseidon Wars 3-D */ + {0xA3EF13CB, 1, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Zaxxon 3-D */ + {0xBBA74147, 1, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Zaxxon 3-D [Proto] */ + {0xD6F43DDA, 1, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Out Run 3-D */ + {0x871562b0, 1, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Maze Walker */ + {0x156948f9, 1, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Space Harrier 3-D (J) */ + + /* games requiring 3-D Glasses & Sega Light Phaser */ + {0xFBE5CFBB, 1, 0, SYSTEM_LIGHTPHASER, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Missile Defense 3D */ + {0xE79BB689, 1, 0, SYSTEM_LIGHTPHASER, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Missile Defense 3D [BIOS] */ + + /* games requiring Sega Light Phaser */ + {0x861B6E79, 0, 0, SYSTEM_LIGHTPHASER, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Assault City [Light Phaser] */ + {0x5FC74D2A, 0, 0, SYSTEM_LIGHTPHASER, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Gangster Town */ + {0xE167A561, 0, 0, SYSTEM_LIGHTPHASER, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Hang-On / Safari Hunt */ + {0x91E93385, 0, 0, SYSTEM_LIGHTPHASER, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Hang-On / Safari Hunt [BIOS] */ + {0xE8EA842C, 0, 0, SYSTEM_LIGHTPHASER, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Marksman Shooting / Trap Shooting */ + {0xE8215C2E, 0, 0, SYSTEM_LIGHTPHASER, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Marksman Shooting / Trap Shooting / Safari Hunt */ + {0x205CAAE8, 0, 0, SYSTEM_LIGHTPHASER, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Operation Wolf */ + {0x23283F37, 0, 0, SYSTEM_LIGHTPHASER, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Operation Wolf [A] */ + {0xDA5A7013, 0, 0, SYSTEM_LIGHTPHASER, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Rambo 3 */ + {0x79AC8E7F, 0, 1, SYSTEM_LIGHTPHASER, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Rescue Mission */ + {0x4B051022, 0, 0, SYSTEM_LIGHTPHASER, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Shooting Gallery */ + {0xA908CFF5, 0, 0, SYSTEM_LIGHTPHASER, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Spacegun */ + {0x5359762D, 0, 0, SYSTEM_LIGHTPHASER, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Wanted */ + {0x0CA95637, 0, 0, SYSTEM_LIGHTPHASER, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Laser Ghost */ + + /* games requiring Sega Paddle */ + {0xF9DBB533, 0, 1, SYSTEM_PADDLE, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Alex Kidd BMX Trial */ + {0xA6FA42D0, 0, 1, SYSTEM_PADDLE, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Galactic Protector */ + {0x29BC7FAD, 0, 1, SYSTEM_PADDLE, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Megumi Rescue */ + {0x315917D4, 0, 0, SYSTEM_PADDLE, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Woody Pop */ + + /* games requiring Sega Sport Pad */ + {0x0CB7E21F, 0, 0, SYSTEM_SPORTSPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Great Ice Hockey */ + {0xE42E4998, 0, 0, SYSTEM_SPORTSPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Sports Pad Football */ + {0x41C948BF, 0, 0, SYSTEM_SPORTSPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Sports Pad Soccer */ + + /* games supporting YM2413 FM */ + {0x1C951F8E, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* After Burner */ + {0xC13896D5, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Alex Kidd: The Lost Stars */ + {0x5CBFE997, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Alien Syndrome */ + {0xBBA2FE98, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Altered Beast */ + {0xFF614EB3, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Aztec Adventure */ + {0x3084CF11, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Bomber Raid */ + {0xAC6009A7, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* California Games */ + {0xA4852757, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Captain Silver */ + {0xB81F6FA5, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Captain Silver (U) */ + {0x3CFF6E80, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Casino Games */ + {0xE7F62E6D, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Cloud Master */ + {0x908E7524, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Cyborg Hunter */ + {0xA55D89F3, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Double Dragon */ + {0xB8B141F9, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Fantasy Zone II */ + {0xD29889AD, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Fantasy Zone: The Maze */ + {0xA4AC35D8, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Galaxy Force */ + {0x6C827520, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Galaxy Force (U) */ + {0x1890F407, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Game Box Série Esportes Radicais (BR) */ + {0xB746A6F5, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Global Defense */ + {0x91A0FC4E, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Global Defense [Proto] */ + {0x48651325, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Golfamania */ + {0x5DABFDC3, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Golfamania [Proto] */ + {0xA51376FE, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Golvellius - Valley of Doom */ + {0x98E4AE4A, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Great Golf */ + {0x516ED32E, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Kenseiden */ + {0xE8511B08, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Lord of The Sword */ + {0x0E333B6E, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Miracle Warriors - Seal of The Dark Lord */ + {0x301A59AA, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Miracle Warriors - Seal of The Dark Lord [Proto] */ + {0x01D67C0B, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Mônica no Castelo do Dragão (BR) */ + {0x5589D8D2, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Out Run */ + {0xE030E66C, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Parlour Games */ + {0xF97E9875, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Penguin Land */ + {0x4077EFD9, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Power Strike */ + {0xBB54B6B0, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* R-Type */ + {0x42FC47EE, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Rampage */ + {0xC547EB1B, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Rastan */ + {0x9A8B28EC, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Scramble Spirits */ + {0xAAB67EC3, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Shanghai */ + {0x0C6FAC4E, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Shinobi */ + {0x4752CAE7, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* SpellCaster */ + {0x1A390B93, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Tennis Ace */ + {0xAE920E4B, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Thunder Blade */ + {0x51BD14BE, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Time Soldiers */ + {0x22CCA9BB, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Turma da Mônica em: O Resgate (BR) */ + {0xB52D60C8, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Ultima IV */ + {0xDE9F8517, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Ultima IV [Proto] */ + {0xDFB0B161, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Vigilante */ + {0x679E1676, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Wonder Boy III: The Dragon's Trap */ + {0x8CBEF0C1, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Wonder Boy in Monster Land */ + {0x2F2E3BC9, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS2, REGION_USA}, /* Zillion II - The Tri Formation */ + {0x48D44A13, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_NONE, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* BIOS (J) */ + {0xD8C4165B, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Aleste */ + {0x4CC11DF9, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Alien Syndrome (J) */ + {0xE421E466, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Chouon Senshi Borgman */ + {0x2BCDB8FA, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Doki Doki Penguin Land - Uchuu-Daibouken */ + {0x56BD2455, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Doki Doki Penguin Land - Uchuu-Daibouken [Proto] */ + {0xC722FB42, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Fantasy Zone II (J) */ + {0x7ABC70E9, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Family Games (Party Games) */ + {0x6586BD1F, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Masters Golf */ + {0x4847BC91, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Masters Golf [Proto] */ + {0xB9FDF6D9, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Haja no Fuuin */ + {0x955A009E, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Hoshi wo Sagashite */ + {0x05EA5353, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Kenseiden (J) */ + {0xD11D32E4, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Kujakuou */ + {0xAA7D6F45, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Lord of Sword */ + {0xBF0411AD, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Maou Golvellius */ + {0x21A21352, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Maou Golvellius [Proto] */ + {0x5B5F9106, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Nekyuu Kousien */ + {0xBEA27D5C, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Opa Opa */ + {0x6605D36A, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Phantasy Star (J) */ + {0xE1FFF1BB, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Shinobi (J) */ + {0x11645549, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Solomon no Kagi - Oujo Rihita no Namida */ + {0x7E0EF8CB, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Super Racing */ + {0xB1DA6A30, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Super Wonder Boy Monster World */ + {0x8132AB2C, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Tensai Bakabon */ + {0xC0CE19B1, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_SMS, REGION_JAPAN_NTSC}, /* Thunder Blade (J) */ + {0x07301F83, 0, 1, SYSTEM_MS_GAMEPAD, MAPPER_SEGA, SYSTEM_PBC, REGION_JAPAN_NTSC} /* Phantasy Star [Megadrive] (J) */ +}; + +/* Cartridge & BIOS ROM hardware */ +static romhw_t cart_rom; +static romhw_t bios_rom; + +/* Current slot */ +static struct +{ + uint8 *rom; + uint8 *fcr; + uint8 mapper; + uint8 pages; +} slot; + +/* Function prototypes */ +static void mapper_reset(void); +static void mapper_8k_w(int offset, unsigned int data); +static void mapper_16k_w(int offset, unsigned int data); +static void write_mapper_none(unsigned int address, unsigned char data); +static void write_mapper_sega(unsigned int address, unsigned char data); +static void write_mapper_codies(unsigned int address, unsigned char data); +static void write_mapper_korea(unsigned int address, unsigned char data); +static void write_mapper_korea_8k(unsigned int address, unsigned char data); +static void write_mapper_korea_16k(unsigned int address, unsigned char data); +static void write_mapper_msx(unsigned int address, unsigned char data); +static void write_mapper_multi(unsigned int address, unsigned char data); +static void write_mapper_93c46(unsigned int address, unsigned char data); +static void write_mapper_terebi(unsigned int address, unsigned char data); +static unsigned char read_mapper_93c46(unsigned int address); +static unsigned char read_mapper_terebi(unsigned int address); +static unsigned char read_mapper_korea_8k(unsigned int address); +static unsigned char read_mapper_default(unsigned int address); + +void sms_cart_init(void) +{ + int i; + + /* game CRC */ + uint32 crc = crc32(0, cart.rom, cart.romsize); + + /* use Master System controller by default */ + uint8 device = SYSTEM_MS_GAMEPAD; + + /* unmapped memory return $FF on read (mapped to unused cartridge areas $510000-$5103FF & $510400-$5107FF) */ + memset(cart.rom + 0x510000, 0xFF, 0x800); + + /* default cartridge ROM mapper */ + cart_rom.mapper = (cart.romsize > 0xC000) ? MAPPER_SEGA : MAPPER_NONE; + + /* disable 3-D Glasses by default */ + cart.special = 0; + + /* YM2413 chip in AUTO mode */ + if (config.ym2413 & 2) + { + if ((system_hw & SYSTEM_SMS) && (region_code == REGION_JAPAN_NTSC)) + { + /* japanese Master System has built-in FM chip */ + config.ym2413 = 3; + } + else + { + /* by default, FM chip is disabled */ + config.ym2413 = 2; + } + } + + /* auto-detect game settings */ + for (i=0; i> 10; + } + else if (cart_rom.mapper & MAPPER_KOREA_8K) + { + /* 8k ROM banks */ + cart_rom.pages = (cart.romsize + (1 << 13) - 1) >> 13; + } + else + { + /* 16k ROM banks */ + cart_rom.pages = (cart.romsize + (1 << 14) - 1) >> 14; + } + + /* initialize extra hardware */ + if (cart_rom.mapper == MAPPER_93C46) + { + /* 93C46 eeprom */ + eeprom_93c_init(); + } + else if (cart_rom.mapper == MAPPER_TEREBI) + { + /* Terebi Oekaki tablet */ + cart.special |= HW_TEREBI_OEKAKI; + } + + /* initialize SRAM */ + sram_init(); + + /* enable cartridge backup memory by default */ + sram.on = 1; + + /* save current settings */ + if (old_system[0] == -1) + { + old_system[0] = input.system[0]; + } + if (old_system[1] == -1) + { + old_system[1] = input.system[1]; + } + + /* force port A & port B configuration */ + input.system[0] = device; + input.system[1] = SYSTEM_MS_GAMEPAD; + + /* default gun offset */ + input.x_offset = 20; + input.y_offset = 0; + + /* SpaceGun & Gangster Town use different gun offset */ + if ((crc == 0x5359762D) || (crc == 0x5FC74D2A)) + { + input.x_offset = 16; + } + + /* BIOS support */ + if (config.bios & 1) + { + /* load BIOS file */ + int bios_size = load_bios(); + + if (bios_size > 0xC000) + { + /* assume SEGA mapper if BIOS ROM is larger than 48k */ + bios_rom.mapper = MAPPER_SEGA; + bios_rom.pages = bios_size >> 14; + } + else if (bios_size >= 0) + { + /* default BIOS ROM mapper */ + bios_rom.mapper = MAPPER_NONE; + bios_rom.pages = bios_size >> 10; + } + + /* unload cartridge if required & BIOS ROM is loaded */ + if (!(config.bios & 2) && bios_rom.pages) + { + cart_rom.pages = 0; + } + } + else + { + /* mark Master System & Game Gear BIOS as unloaded */ + system_bios &= ~(SYSTEM_SMS | SYSTEM_GG); + + /* BIOS ROM is disabled */ + bios_rom.pages = 0; + } +} + +void sms_cart_reset(void) +{ + /* reset BIOS ROM paging (SEGA mapper by default) */ + bios_rom.fcr[0] = 0; + bios_rom.fcr[1] = 0; + bios_rom.fcr[2] = 1; + bios_rom.fcr[3] = 2; + + /* reset cartridge ROM paging */ + switch (cart_rom.mapper) + { + case MAPPER_SEGA: + case MAPPER_SEGA_X: + cart_rom.fcr[0] = 0; + cart_rom.fcr[1] = 0; + cart_rom.fcr[2] = 1; + cart_rom.fcr[3] = 2; + break; + + case MAPPER_KOREA_8K: + case MAPPER_MSX: + case MAPPER_MSX_NEMESIS: + cart_rom.fcr[0] = 0; + cart_rom.fcr[1] = 0; + cart_rom.fcr[2] = 0; + cart_rom.fcr[3] = 0; + break; + + default: + cart_rom.fcr[0] = 0; + cart_rom.fcr[1] = 0; + cart_rom.fcr[2] = 1; + cart_rom.fcr[3] = 0; + break; + } + + /* check if BIOS is larger than 1k */ + if (bios_rom.pages > 1) + { + /* enable BIOS ROM */ + slot.rom = cart.rom + 0x400000; + slot.fcr = bios_rom.fcr; + slot.mapper = bios_rom.mapper; + slot.pages = bios_rom.pages; + } + else + { + /* enable cartridge ROM */ + slot.rom = cart.rom; + slot.fcr = cart_rom.fcr; + slot.mapper = cart_rom.mapper; + slot.pages = cart_rom.pages; + + /* force Memory Control register value in RAM (usually set by Master System BIOS) */ + if (system_hw & SYSTEM_SMS) + { + work_ram[0] = 0xA8; + } + } + + /* reset Memory Control register (RAM & I/O are enabled, either BIOS or Cartridge ROM are enabled) */ + io_reg[0x0E] = bios_rom.pages ? 0xE0 : 0xA8; + + /* reset Z80 memory map */ + mapper_reset(); + + /* 1k BIOS special case (Majesco GG) */ + if (bios_rom.pages == 1) + { + /* BIOS ROM is mapped to $0000-$03FF */ + z80_readmap[0] = cart.rom + 0x400000; + } +} + +void sms_cart_switch(uint8 mode) +{ + /* by default, disable cartridge & BIOS ROM */ + slot.pages = 0; + + /* cartridge ROM enabled ? */ + if (mode & 0x40) + { + /* check if cartridge is loaded */ + if (cart_rom.pages) + { + /* map cartridge ROM */ + slot.rom = cart.rom; + slot.fcr = cart_rom.fcr; + slot.mapper = cart_rom.mapper; + slot.pages = cart_rom.pages; + } + } + else + { + /* BIOS ROM enabled ? */ + if (mode & 0x08) + { + /* check if BIOS ROM is larger than 1K */ + if (bios_rom.pages > 1) + { + /* map BIOS ROM */ + slot.rom = cart.rom + 0x400000; + slot.fcr = bios_rom.fcr; + slot.mapper = bios_rom.mapper; + slot.pages = bios_rom.pages; + } + else + { + /* by default, map cartridge ROM */ + slot.rom = cart.rom; + slot.fcr = cart_rom.fcr; + slot.mapper = cart_rom.mapper; + slot.pages = cart_rom.pages; + } + } + + /* assume only BIOS would disable cartridge slot */ + if (!bios_rom.pages) + { + /* max. BIOS ROM size supported is 1MB */ + if (cart.romsize <= 0x100000) + { + /* copy to BIOS ROM */ + memcpy(cart.rom + 0x400000, cart.rom, cart.romsize); + memcpy(bios_rom.fcr, cart_rom.fcr, 4); + bios_rom.mapper = cart_rom.mapper; + bios_rom.pages = cart_rom.pages; + + /* unload cartridge */ + cart_rom.pages = 0; + } + } + } + + /* reset Z80 memory map */ + mapper_reset(); + + /* 1k BIOS special case (Majesco GG) */ + if ((bios_rom.pages == 1) && ((mode & 0x48) == 0x08)) + { + /* BIOS ROM is mapped to $0000-$03FF */ + z80_readmap[0] = cart.rom + 0x400000; + } +} + +int sms_cart_region_detect(void) +{ + int i; + + /* compute CRC */ + uint32 crc = crc32(0, cart.rom, cart.romsize); + + /* Turma da Mônica em: O Resgate & Wonder Boy III enable FM support on japanese hardware only */ + if (config.ym2413 && ((crc == 0x22CCA9BB) || (crc == 0x679E1676))) + { + return REGION_JAPAN_NTSC; + } + + /* game database */ + for (i=0; i> 10][address & 0x03FF] = data; +} + +static void write_mapper_sega(unsigned int address, unsigned char data) +{ + if (address >= 0xFFFC) + { + mapper_16k_w(address & 3, data); + } + + z80_writemap[address >> 10][address & 0x03FF] = data; +} + +static void write_mapper_codies(unsigned int address, unsigned char data) +{ + if (address == 0x0000) + { + mapper_16k_w(1,data); + return; + } + + if (address == 0x4000) + { + mapper_16k_w(2,data); + return; + } + + if (address == 0x8000) + { + mapper_16k_w(3,data); + return; + } + + z80_writemap[address >> 10][address & 0x03FF] = data; +} + +static void write_mapper_multi(unsigned int address, unsigned char data) +{ + if (address == 0x3FFE) + { + mapper_16k_w(1,data); + return; + } + + if (address == 0x7FFF) + { + mapper_16k_w(2,data); + return; + } + + if (address == 0xBFFF) + { + mapper_16k_w(3,(slot.fcr[1] & 0x30) + data); + return; + } + + z80_writemap[address >> 10][address & 0x03FF] = data; +} + +static void write_mapper_korea(unsigned int address, unsigned char data) +{ + if (address == 0xA000) + { + mapper_16k_w(3,data); + return; + } + + z80_writemap[address >> 10][address & 0x03FF] = data; +} + +static void write_mapper_msx(unsigned int address, unsigned char data) +{ + if (address <= 0x0003) + { + mapper_8k_w(address,data); + return; + } + + z80_writemap[address >> 10][address & 0x03FF] = data; +} + +static void write_mapper_korea_8k(unsigned int address, unsigned char data) +{ + if (address == 0x4000) + { + mapper_8k_w(2,data); + return; + } + + if (address == 0x6000) + { + mapper_8k_w(3,data); + return; + } + + if (address == 0x8000) + { + mapper_8k_w(0,data); + return; + } + + if (address == 0xA000) + { + mapper_8k_w(1,data); + return; + } + + if (address == 0xFFFE) + { + mapper_8k_w(2,(data << 1) & 0xFF); + mapper_8k_w(3,(1 + (data << 1)) & 0xFF); + } + else if (address == 0xFFFF) + { + mapper_8k_w(0,(data << 1) & 0xFF); + mapper_8k_w(1,(1 + (data << 1)) & 0xFF); + } + + z80_writemap[address >> 10][address & 0x03FF] = data; +} + +static void write_mapper_korea_16k(unsigned int address, unsigned char data) +{ + if (address == 0x4000) + { + mapper_16k_w(2,data); + return; + } + + if (address == 0x8000) + { + mapper_16k_w(3,data); + return; + } + + /* SEGA mapper compatibility */ + if (address >= 0xFFFC) + { + mapper_16k_w(address & 3, data); + } + + z80_writemap[address >> 10][address & 0x03FF] = data; +} + +static void write_mapper_93c46(unsigned int address, unsigned char data) +{ + /* EEPROM serial input */ + if ((address == 0x8000) && eeprom_93c.enabled) + { + eeprom_93c_write(data); + return; + } + + /* EEPROM ctrl */ + if (address == 0xFFFC) + { + /* enable/disable EEPROM */ + eeprom_93c.enabled = data & 0x08; + + if (data & 0x80) + { + /* reset EEPROM */ + eeprom_93c_init(); + } + } + + /* SEGA mapper compatibility */ + if (address > 0xFFFC) + { + mapper_16k_w(address & 3, data); + } + + z80_writemap[address >> 10][address & 0x03FF] = data; +} + +static void write_mapper_terebi(unsigned int address, unsigned char data) +{ + if (address == 0x6000) + { + terebi_oekaki_write(data); + return; + } + + z80_writemap[address >> 10][address & 0x03FF] = data; +} + +static unsigned char read_mapper_93c46(unsigned int address) +{ + if ((address == 0x8000) && eeprom_93c.enabled) + { + return eeprom_93c_read(); + } + + return z80_readmap[address >> 10][address & 0x03FF]; +} + +static unsigned char read_mapper_terebi(unsigned int address) +{ + if (address == 0x8000) + { + return (terebi_oekaki_read() >> 8); + } + + if (address == 0xA000) + { + return (terebi_oekaki_read() & 0xFF); + } + + return z80_readmap[address >> 10][address & 0x03FF]; +} + +static unsigned char read_mapper_korea_8k(unsigned int address) +{ + unsigned char data = z80_readmap[address >> 10][address & 0x03FF]; + + /* 16k page */ + unsigned char page = address >> 14; + + /* $4000-$7FFFF and $8000-$BFFF area are protected */ + if (((page == 1) && (slot.fcr[2] & 0x80)) || ((page == 2) && (slot.fcr[0] & 0x80))) + { + /* bit-swapped value */ + data = (((data >> 7) & 0x01) | ((data >> 5) & 0x02) | + ((data >> 3) & 0x04) | ((data >> 1) & 0x08) | + ((data << 1) & 0x10) | ((data << 3) & 0x20) | + ((data << 5) & 0x40) | ((data << 7) & 0x80)); + } + + return data; +} + +static unsigned char read_mapper_default(unsigned int address) +{ + return z80_readmap[address >> 10][address & 0x03FF]; +} diff --git a/genplus-gx/core/cart_hw/sms_cart.h b/genplus-gx/core/cart_hw/sms_cart.h new file mode 100644 index 0000000000..36d51c93c9 --- /dev/null +++ b/genplus-gx/core/cart_hw/sms_cart.h @@ -0,0 +1,56 @@ +/**************************************************************************** + * Genesis Plus + * SG-1000, Master System & Game Gear cartridge hardware support + * + * Copyright (C) 2007-2012 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _SMS_CART_H_ +#define _SMS_CART_H_ + +/* Special hardware */ +#define HW_3D_GLASSES 0x01 +#define HW_TEREBI_OEKAKI 0x02 + +/* Function prototypes */ +extern void sms_cart_init(void); +extern void sms_cart_reset(void); +extern void sms_cart_switch(uint8 mode); +extern int sms_cart_region_detect(void); +extern int sms_cart_context_save(uint8 *state); +extern int sms_cart_context_load(uint8 *state); + +#endif + + diff --git a/genplus-gx/core/cart_hw/sram.c b/genplus-gx/core/cart_hw/sram.c new file mode 100644 index 0000000000..ed8bea9067 --- /dev/null +++ b/genplus-gx/core/cart_hw/sram.c @@ -0,0 +1,221 @@ +/*************************************************************************************** + * Genesis Plus + * Backup RAM support + * + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + +T_SRAM sram; + +/**************************************************************************** + * A quick guide to external RAM on the Genesis + * + * The external RAM definition is held at offset 0x1b0 of the ROM header. + * + * 1B0h: dc.b 'RA', %1x1yz000, %abc00000 + * 1B4h: dc.l RAM start address + * 1B8h: dc.l RAM end address + * x 1 for BACKUP (not volatile), 0 for volatile RAM + * yz 10 if even address only + * 11 if odd address only + * 00 if both even and odd address + * 01 others (serial EEPROM, RAM with 4-bit data bus, etc) + * abc 001 if SRAM + * 010 if EEPROM (serial or parallel) + * other values unused + * + * Assuming max. 64k backup RAM throughout + ****************************************************************************/ +void sram_init() +{ + memset(&sram, 0, sizeof (T_SRAM)); + + /* backup RAM data is stored above cartridge ROM area, at $800000-$80FFFF (max. 64K) */ + if (cart.romsize > 0x800000) return; + sram.sram = cart.rom + 0x800000; + + /* initialize Backup RAM */ + memset(sram.sram, 0xFF, 0x10000); + sram.crc = crc32(0, sram.sram, 0x10000); + + /* retrieve informations from header */ + if ((READ_BYTE(cart.rom,0x1b0) == 0x52) && (READ_BYTE(cart.rom,0x1b1) == 0x41)) + { + /* backup RAM detected */ + sram.detected = 1; + + /* enable backup RAM */ + sram.on = 1; + + /* retrieve backup RAM start & end addresses */ + sram.start = READ_WORD_LONG(cart.rom, 0x1b4); + sram.end = READ_WORD_LONG(cart.rom, 0x1b8); + + /* autodetect games with wrong header infos */ + if (strstr(rominfo.product,"T-26013") != NULL) + { + /* Psy-O-Blade (wrong header) */ + sram.start = 0x200001; + sram.end = 0x203fff; + } + + /* fixe games indicating internal RAM as volatile external RAM (Feng Kuang Tao Hua Yuan) */ + else if (sram.start == 0xff0000) + { + /* backup RAM should be disabled */ + sram.on = 0; + } + + /* fixe other bad header informations */ + else if ((sram.start > sram.end) || ((sram.end - sram.start) >= 0x10000)) + { + sram.end = sram.start + 0xffff; + } + } + else + { + /* autodetect games with missing header infos */ + if (strstr(rominfo.product,"T-50086") != NULL) + { + /* PGA Tour Golf */ + sram.on = 1; + sram.start = 0x200001; + sram.end = 0x203fff; + } + else if (strstr(rominfo.product,"ACLD007") != NULL) + { + /* Winter Challenge */ + sram.on = 1; + sram.start = 0x200001; + sram.end = 0x200fff; + } + else if (strstr(rominfo.product,"T-50286") != NULL) + { + /* Buck Rogers - Countdown to Doomsday */ + sram.on = 1; + sram.start = 0x200001; + sram.end = 0x203fff; + } + else if (((rominfo.realchecksum == 0xaeaa) || (rominfo.realchecksum == 0x8dba)) && + (rominfo.checksum == 0x8104)) + { + /* Xin Qigai Wangzi (use uncommon area) */ + sram.on = 1; + sram.start = 0x400001; + sram.end = 0x40ffff; + } + else if ((strstr(rominfo.ROMType,"SF") != NULL) && (strstr(rominfo.product,"001") != NULL)) + { + /* SF-001 */ + sram.on = 1; + if (rominfo.checksum == 0x3e08) + { + /* last revision (use bankswitching) */ + sram.start = 0x3c0001; + sram.end = 0x3cffff; + } + else + { + /* older revisions (use uncommon area) */ + sram.start = 0x400001; + sram.end = 0x40ffff; + } + } + else if ((strstr(rominfo.ROMType,"SF") != NULL) && (strstr(rominfo.product,"004") != NULL)) + { + /* SF-004 (use bankswitching) */ + sram.on = 1; + sram.start = 0x200001; + sram.end = 0x203fff; + } + else if (strstr(rominfo.international,"SONIC & KNUCKLES") != NULL) + { + /* Sonic 3 & Knuckles combined ROM */ + if (cart.romsize == 0x400000) + { + /* Sonic & Knuckle does not have backup RAM but can access FRAM from Sonic 3 cartridge */ + sram.on = 1; + sram.start = 0x200001; + sram.end = 0x203fff; + } + } + + /* auto-detect games which need disabled backup RAM */ + else if (strstr(rominfo.product,"T-113016") != NULL) + { + /* Pugsy (does not have backup RAM but tries writing outside ROM area as copy protection) */ + sram.on = 0; + } + else if (strstr(rominfo.international,"SONIC THE HEDGEHOG 2") != NULL) + { + /* Sonic the Hedgehog 2 (does not have backup RAM) */ + /* this prevents backup RAM from being mapped in place of mirrored ROM when using S&K LOCK-ON feature */ + sram.on = 0; + } + + /* by default, enable backup RAM for ROM smaller than 2MB */ + else if (cart.romsize <= 0x200000) + { + /* 64KB static RAM mapped to $200000-$20ffff */ + sram.start = 0x200000; + sram.end = 0x20ffff; + sram.on = 1; + } + } +} + +unsigned int sram_read_byte(unsigned int address) +{ + return sram.sram[address & 0xffff]; +} + +unsigned int sram_read_word(unsigned int address) +{ + address &= 0xfffe; + return (sram.sram[address + 1] | (sram.sram[address] << 8)); +} + +void sram_write_byte(unsigned int address, unsigned int data) +{ + sram.sram[address & 0xffff] = data; +} + +void sram_write_word(unsigned int address, unsigned int data) +{ + address &= 0xfffe; + sram.sram[address] = data >> 8; + sram.sram[address + 1] = data & 0xff; +} diff --git a/genplus-gx/core/cart_hw/sram.h b/genplus-gx/core/cart_hw/sram.h new file mode 100644 index 0000000000..64934cab6e --- /dev/null +++ b/genplus-gx/core/cart_hw/sram.h @@ -0,0 +1,63 @@ +/*************************************************************************************** + * Genesis Plus + * Backup RAM support + * + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _SRAM_H_ +#define _SRAM_H_ + +typedef struct +{ + uint8 detected; + uint8 on; + uint8 custom; + uint32 start; + uint32 end; + uint32 crc; + uint8 *sram; +} T_SRAM; + +/* Function prototypes */ +extern void sram_init(); +extern unsigned int sram_read_byte(unsigned int address); +extern unsigned int sram_read_word(unsigned int address); +extern void sram_write_byte(unsigned int address, unsigned int data); +extern void sram_write_word(unsigned int address, unsigned int data); + +/* global variables */ +extern T_SRAM sram; + +#endif diff --git a/genplus-gx/core/cart_hw/svp/imageformat.txt b/genplus-gx/core/cart_hw/svp/imageformat.txt new file mode 100644 index 0000000000..2d453b3330 --- /dev/null +++ b/genplus-gx/core/cart_hw/svp/imageformat.txt @@ -0,0 +1,68 @@ + +vscroll: 1 (0); 209 (26) - alternates every 4 frames +vram range for patterns: 0000-999f (low scr 0000-395f,72e0-999f; high 3980-999f) +name table address: c000 +seen DMAs (in order): + [300002-3026c3]->[0020-26e1] len 4961 + [3026c2-303943]->[26e0-3961] len 2369 + [303942-306003]->[72e0-99a1] len 4961 + --- + [306002-3086c3]->[3980-6041] len 4961 + [3086c2-309943]->[6040-72c1] len 2369 + [309942-30c003]->[72e0-99a2] len 4961 +tile arrangement: + +000: 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 +001: 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 +002: 001 003 005 007 009 00b 00d 00f 011 013 015 017 019 01b 01d 01f 021 023 025 027 029 02b 02d 02f 031 033 035 037 039 03b 03d 03f +003: 002 004 006 008 00a 00c 00e 010 012 014 016 018 01a 01c 01e 020 022 024 026 028 02a 02c 02e 030 032 034 036 038 03a 03c 03e 040 +004: 041 043 045 047 049 04b 04d 04f 051 053 055 057 059 05b 05d 05f 061 063 065 067 069 06b 06d 06f 071 073 075 077 079 07b 07d 07f +005: 042 044 046 048 04a 04c 04e 050 052 054 056 058 05a 05c 05e 060 062 064 066 068 06a 06c 06e 070 072 074 076 078 07a 07c 07e 080 +006: 081 083 085 087 089 08b 08d 08f 091 093 095 097 099 09b 09d 09f 0a1 0a3 0a5 0a7 0a9 0ab 0ad 0af 0b1 0b3 0b5 0b7 0b9 0bb 0bd 0bf +007: 082 084 086 088 08a 08c 08e 090 092 094 096 098 09a 09c 09e 0a0 0a2 0a4 0a6 0a8 0aa 0ac 0ae 0b0 0b2 0b4 0b6 0b8 0ba 0bc 0be 0c0 +008: 0c1 0c3 0c5 0c7 0c9 0cb 0cd 0cf 0d1 0d3 0d5 0d7 0d9 0db 0dd 0df 0e1 0e3 0e5 0e7 0e9 0eb 0ed 0ef 0f1 0f3 0f5 0f7 0f9 0fb 0fd 0ff +009: 0c2 0c4 0c6 0c8 0ca 0cc 0ce 0d0 0d2 0d4 0d6 0d8 0da 0dc 0de 0e0 0e2 0e4 0e6 0e8 0ea 0ec 0ee 0f0 0f2 0f4 0f6 0f8 0fa 0fc 0fe 100 +010: 101 103 105 107 109 10b 10d 10f 111 113 115 117 119 11b 11d 11f 121 123 125 127 129 12b 12d 12f 131 133 135 137 139 13b 13d 13f +011: 102 104 106 108 10a 10c 10e 110 112 114 116 118 11a 11c 11e 120 122 124 126 128 12a 12c 12e 130 132 134 136 138 13a 13c 13e 140 +012: 141 143 145 147 149 14b 14d 14f 151 153 155 157 159 15b 15d 15f 161 163 165 167 169 16b 16d 16f 171 173 175 177 179 17b 17d 17f +013: 142 144 146 148 14a 14c 14e 150 152 154 156 158 15a 15c 15e 160 162 164 166 168 16a 16c 16e 170 172 174 176 178 17a 17c 17e 180 +014: 181 183 185 187 189 18b 18d 18f 191 193 195 197 199 19b 19d 19f 1a1 1a3 1a5 1a7 1a9 1ab 1ad 1af 1b1 1b3 1b5 1b7 1b9 1bb 1bd 1bf +015: 182 184 186 188 18a 18c 18e 190 192 194 196 198 19a 19c 19e 1a0 1a2 1a4 1a6 1a8 1aa 1ac 1ae 1b0 1b2 1b4 1b6 1b8 1ba 1bc 1be 1c0 +016: 1c1 1c3 1c5 1c7 1c9 397 399 39b 39d 39f 3a1 3a3 3a5 3a7 3a9 3ab 3ad 3af 3b1 3b3 3b5 3b7 3b9 3bb 3bd 3bf 3c1 3c3 3c5 3c7 3c9 3cb +017: 1c2 1c4 1c6 1c8 1ca 398 39a 39c 39e 3a0 3a2 3a4 3a6 3a8 3aa 3ac 3ae 3b0 3b2 3b4 3b6 3b8 3ba 3bc 3be 3c0 3c2 3c4 3c6 3c8 3ca 3cc +018: 3cd 3cf 3d1 3d3 3d5 3d7 3d9 3db 3dd 3df 3e1 3e3 3e5 3e7 3e9 3eb 3ed 3ef 3f1 3f3 3f5 3f7 3f9 3fb 3fd 3ff 401 403 405 407 409 40b +019: 3ce 3d0 3d2 3d4 3d6 3d8 3da 3dc 3de 3e0 3e2 3e4 3e6 3e8 3ea 3ec 3ee 3f0 3f2 3f4 3f6 3f8 3fa 3fc 3fe 400 402 404 406 408 40a 40c +020: 40d 40f 411 413 415 417 419 41b 41d 41f 421 423 425 427 429 42b 42d 42f 431 433 435 437 439 43b 43d 43f 441 443 445 447 449 44b +021: 40e 410 412 414 416 418 41a 41c 41e 420 422 424 426 428 42a 42c 42e 430 432 434 436 438 43a 43c 43e 440 442 444 446 448 44a 44c +022: 44d 44f 451 453 455 457 459 45b 45d 45f 461 463 465 467 469 46b 46d 46f 471 473 475 477 479 47b 47d 47f 481 483 485 487 489 48b +023: 44e 450 452 454 456 458 45a 45c 45e 460 462 464 466 468 46a 46c 46e 470 472 474 476 478 47a 47c 47e 480 482 484 486 488 48a 48c +024: 48d 48f 491 493 495 497 499 49b 49d 49f 4a1 4a3 4a5 4a7 4a9 4ab 4ad 4af 4b1 4b3 4b5 4b7 4b9 4bb 4bd 4bf 4c1 4c3 4c5 4c7 4c9 4cb +025: 48e 490 492 494 496 498 49a 49c 49e 4a0 4a2 4a4 4a6 4a8 4aa 4ac 4ae 4b0 4b2 4b4 4b6 4b8 4ba 4bc 4be 4c0 4c2 4c4 4c6 4c8 4ca 4cc +026: 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 +027: 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 +028: 1cc 1ce 1d0 1d2 1d4 1d6 1d8 1da 1dc 1de 1e0 1e2 1e4 1e6 1e8 1ea 1ec 1ee 1f0 1f2 1f4 1f6 1f8 1fa 1fc 1fe 200 202 204 206 208 20a +029: 1cd 1cf 1d1 1d3 1d5 1d7 1d9 1db 1dd 1df 1e1 1e3 1e5 1e7 1e9 1eb 1ed 1ef 1f1 1f3 1f5 1f7 1f9 1fb 1fd 1ff 201 203 205 207 209 20b +030: 20c 20e 210 212 214 216 218 21a 21c 21e 220 222 224 226 228 22a 22c 22e 230 232 234 236 238 23a 23c 23e 240 242 244 246 248 24a +031: 20d 20f 211 213 215 217 219 21b 21d 21f 221 223 225 227 229 22b 22d 22f 231 233 235 237 239 23b 23d 23f 241 243 245 247 249 24b +032: 24c 24e 250 252 254 256 258 25a 25c 25e 260 262 264 266 268 26a 26c 26e 270 272 274 276 278 27a 27c 27e 280 282 284 286 288 28a +033: 24d 24f 251 253 255 257 259 25b 25d 25f 261 263 265 267 269 26b 26d 26f 271 273 275 277 279 27b 27d 27f 281 283 285 287 289 28b +034: 28c 28e 290 292 294 296 298 29a 29c 29e 2a0 2a2 2a4 2a6 2a8 2aa 2ac 2ae 2b0 2b2 2b4 2b6 2b8 2ba 2bc 2be 2c0 2c2 2c4 2c6 2c8 2ca +035: 28d 28f 291 293 295 297 299 29b 29d 29f 2a1 2a3 2a5 2a7 2a9 2ab 2ad 2af 2b1 2b3 2b5 2b7 2b9 2bb 2bd 2bf 2c1 2c3 2c5 2c7 2c9 2cb +036: 2cc 2ce 2d0 2d2 2d4 2d6 2d8 2da 2dc 2de 2e0 2e2 2e4 2e6 2e8 2ea 2ec 2ee 2f0 2f2 2f4 2f6 2f8 2fa 2fc 2fe 300 302 304 306 308 30a +037: 2cd 2cf 2d1 2d3 2d5 2d7 2d9 2db 2dd 2df 2e1 2e3 2e5 2e7 2e9 2eb 2ed 2ef 2f1 2f3 2f5 2f7 2f9 2fb 2fd 2ff 301 303 305 307 309 30b +038: 30c 30e 310 312 314 316 318 31a 31c 31e 320 322 324 326 328 32a 32c 32e 330 332 334 336 338 33a 33c 33e 340 342 344 346 348 34a +039: 30d 30f 311 313 315 317 319 31b 31d 31f 321 323 325 327 329 32b 32d 32f 331 333 335 337 339 33b 33d 33f 341 343 345 347 349 34b +040: 34c 34e 350 352 354 356 358 35a 35c 35e 360 362 364 366 368 36a 36c 36e 370 372 374 376 378 37a 37c 37e 380 382 384 386 388 38a +041: 34d 34f 351 353 355 357 359 35b 35d 35f 361 363 365 367 369 36b 36d 36f 371 373 375 377 379 37b 37d 37f 381 383 385 387 389 38b +042: 38c 38e 390 392 394 397 399 39b 39d 39f 3a1 3a3 3a5 3a7 3a9 3ab 3ad 3af 3b1 3b3 3b5 3b7 3b9 3bb 3bd 3bf 3c1 3c3 3c5 3c7 3c9 3cb +043: 38d 38f 391 393 395 398 39a 39c 39e 3a0 3a2 3a4 3a6 3a8 3aa 3ac 3ae 3b0 3b2 3b4 3b6 3b8 3ba 3bc 3be 3c0 3c2 3c4 3c6 3c8 3ca 3cc +044: 3cd 3cf 3d1 3d3 3d5 3d7 3d9 3db 3dd 3df 3e1 3e3 3e5 3e7 3e9 3eb 3ed 3ef 3f1 3f3 3f5 3f7 3f9 3fb 3fd 3ff 401 403 405 407 409 40b +045: 3ce 3d0 3d2 3d4 3d6 3d8 3da 3dc 3de 3e0 3e2 3e4 3e6 3e8 3ea 3ec 3ee 3f0 3f2 3f4 3f6 3f8 3fa 3fc 3fe 400 402 404 406 408 40a 40c +046: 40d 40f 411 413 415 417 419 41b 41d 41f 421 423 425 427 429 42b 42d 42f 431 433 435 437 439 43b 43d 43f 441 443 445 447 449 44b +047: 40e 410 412 414 416 418 41a 41c 41e 420 422 424 426 428 42a 42c 42e 430 432 434 436 438 43a 43c 43e 440 442 444 446 448 44a 44c +048: 44d 44f 451 453 455 457 459 45b 45d 45f 461 463 465 467 469 46b 46d 46f 471 473 475 477 479 47b 47d 47f 481 483 485 487 489 48b +049: 44e 450 452 454 456 458 45a 45c 45e 460 462 464 466 468 46a 46c 46e 470 472 474 476 478 47a 47c 47e 480 482 484 486 488 48a 48c +050: 48d 48f 491 493 495 497 499 49b 49d 49f 4a1 4a3 4a5 4a7 4a9 4ab 4ad 4af 4b1 4b3 4b5 4b7 4b9 4bb 4bd 4bf 4c1 4c3 4c5 4c7 4c9 4cb +051: 48e 490 492 494 496 498 49a 49c 49e 4a0 4a2 4a4 4a6 4a8 4aa 4ac 4ae 4b0 4b2 4b4 4b6 4b8 4ba 4bc 4be 4c0 4c2 4c4 4c6 4c8 4ca 4cc +052: 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 +053: 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 000 diff --git a/genplus-gx/core/cart_hw/svp/ssp16.c b/genplus-gx/core/cart_hw/svp/ssp16.c new file mode 100644 index 0000000000..f2f648c0fd --- /dev/null +++ b/genplus-gx/core/cart_hw/svp/ssp16.c @@ -0,0 +1,1333 @@ +/* + basic, incomplete SSP160x (SSP1601?) interpreter + with SVP memory controller emu + + (c) Copyright 2008, Grazvydas "notaz" Ignotas + Free for non-commercial use. + + For commercial use, separate licencing terms must be obtained. + + Modified for Genesis Plus GX (Eke-Eke), added big endian support, fixed mode & addr +*/ + + +/* + * Register info + * + * 0. "-" + * size: 16 + * desc: Constant register with all bits set (0xffff). + * + * 1. "X" + * size: 16 + * desc: Generic register. When set, updates P (P = X * Y * 2) + * + * 2. "Y" + * size: 16 + * desc: Generic register. When set, updates P (P = X * Y * 2) + * + * 3. "A" + * size: 32 + * desc: Accumulator. + * + * 4. "ST" + * size: 16 + * desc: Status register. From MAME: bits 0-9 are CONTROL, other FLAG + * fedc ba98 7654 3210 + * 210 - RPL (?) "Loop size". If non-zero, makes (rX+) and (rX-) respectively + * modulo-increment and modulo-decrement. The value shows which + * power of 2 to use, i.e. 4 means modulo by 16. + * (e: fir16_32.sc, IIR_4B.SC, DECIM.SC) + * 43 - RB (?) + * 5 - GP0_0 (ST5?) Changed before acessing PM0 (affects banking?). + * 6 - GP0_1 (ST6?) Cleared before acessing PM0 (affects banking?). Set after. + * datasheet says these (5,6) bits correspond to hardware pins. + * 7 - IE (?) Not directly used by SVP code (never set, but preserved)? + * 8 - OP (?) Not used by SVP code (only cleared)? (MAME: saturated value + * (probably means clamping? i.e. 0x7ffc + 9 -> 0x7fff)) + * 9 - MACS (?) Not used by SVP code (only cleared)? (e: "mac shift") + * a - GPI_0 Interrupt 0 enable/status? + * b - GPI_1 Interrupt 1 enable/status? + * c - L L flag. Carry? + * d - Z Zero flag. + * e - OV Overflow flag. + * f - N Negative flag. + * seen directly changing code sequences: + * ldi ST, 0 ld A, ST ld A, ST ld A, ST ldi st, 20h + * ldi ST, 60h ori A, 60h and A, E8h and A, E8h + * ld ST, A ld ST, A ori 3 + * ld ST, A + * + * 5. "STACK" + * size: 16 + * desc: hw stack of 6 levels (according to datasheet) + * + * 6. "PC" + * size: 16 + * desc: Program counter. + * + * 7. "P" + * size: 32 + * desc: multiply result register. P = X * Y * 2 + * probably affected by MACS bit in ST. + * + * 8. "PM0" (PM from PMAR name from Tasco's docs) + * size: 16? + * desc: Programmable Memory access register. + * On reset, or when one (both?) GP0 bits are clear, + * acts as status for XST, mapped at 015004 at 68k side: + * bit0: ssp has written something to XST (cleared when 015004 is read) + * bit1: 68k has written something through a1500{0|2} (cleared on PM0 read) + * + * 9. "PM1" + * size: 16? + * desc: Programmable Memory access register. + * This reg. is only used as PMAR. + * + * 10. "PM2" + * size: 16? + * desc: Programmable Memory access register. + * This reg. is only used as PMAR. + * + * 11. "XST" + * size: 16? + * desc: eXternal STate. Mapped to a15000 and a15002 at 68k side. + * Can be programmed as PMAR? (only seen in test mode code) + * Affects PM0 when written to? + * + * 12. "PM4" + * size: 16? + * desc: Programmable Memory access register. + * This reg. is only used as PMAR. The most used PMAR by VR. + * + * 13. (unused by VR) + * + * 14. "PMC" (PMC from PMAC name from Tasco's docs) + * size: 32? + * desc: Programmable Memory access Control. Set using 2 16bit writes, + * first address, then mode word. After setting PMAC, PMAR sould + * be blind accessed (ld -, PMx or ld PMx, -) to program it for + * reading and writing respectively. + * Reading the register also shifts it's state (from "waiting for + * address" to "waiting for mode" and back). Reads always return + * address related to last PMx register accressed. + * (note: addresses do not wrap). + * + * 15. "AL" + * size: 16 + * desc: Accumulator Low. 16 least significant bits of accumulator. + * (normally reading acc (ld X, A) you get 16 most significant bits). + * + * + * There are 8 8-bit pointer registers rX. r0-r3 (ri) point to RAM0, r4-r7 (rj) point to RAM1. + * They can be accessed directly, or 2 indirection levels can be used [ (rX), ((rX)) ], + * which work similar to * and ** operators in C, only they use different memory banks and + * ((rX)) also does post-increment. First indirection level (rX) accesses RAMx, second accesses + * program memory at address read from (rX), and increments value in (rX). + * + * r0,r1,r2,r4,r5,r6 can be modified [ex: ldi r0, 5]. + * 3 modifiers can be applied (optional): + * + : post-increment [ex: ld a, (r0+) ]. Can be made modulo-increment by setting RPL bits in ST. + * - : post-decrement. Can be made modulo-decrement by setting RPL bits in ST (not sure). + * +!: post-increment, unaffected by RPL (probably). + * These are only used on 1st indirection level, so things like [ld a, ((r0+))] and [ld X, r6-] + * ar probably invalid. + * + * r3 and r7 are special and can not be changed (at least Samsung samples and SVP code never do). + * They are fixed to the start of their RAM banks. (They are probably changeable for ssp1605+, + * Samsung's old DSP page claims that). + * 1 of these 4 modifiers must be used (short form direct addressing?): + * |00: RAMx[0] [ex: (r3|00), 0] (based on sample code) + * |01: RAMx[1] + * |10: RAMx[2] ? maybe 10h? accortding to Div_c_dp.sc, 2 + * |11: RAMx[3] + * + * + * Instruction notes + * + * ld a, * doesn't affect flags! (e: A_LAW.SC, Div_c_dp.sc) + * + * mld (rj), (ri) [, b] + * operation: A = 0; P = (rj) * (ri) + * notes: based on IIR_4B.SC sample. flags? what is b??? + * + * mpya (rj), (ri) [, b] + * name: multiply and add? + * operation: A += P; P = (rj) * (ri) + * + * mpys (rj), (ri), b + * name: multiply and subtract? + * notes: not used by VR code. + * + * mod cond, op + * mod cond, shr does arithmetic shift + * + * 'ld -, AL' and probably 'ld AL, -' are for dummy assigns + * + * memory map: + * 000000 - 1fffff ROM, accessable by both + * 200000 - 2fffff unused? + * 300000 - 31ffff DRAM, both + * 320000 - 38ffff unused? + * 390000 - 3907ff IRAM. can only be accessed by ssp? + * 390000 - 39ffff similar mapping to "cell arrange" in Sega CD, 68k only? + * 3a0000 - 3affff similar mapping to "cell arrange" in Sega CD, a bit different + * + * 30fe02 - 0 if SVP busy, 1 if done (set by SVP, checked and cleared by 68k) + * 30fe06 - also sync related. + * 30fe08 - job number [1-12] for SVP. 0 means no job. Set by 68k, read-cleared by SVP. + * + * + figure out if 'op A, P' is 32bit (nearly sure it is) + * * does mld, mpya load their operands into X and Y? + * * OP simm + * + * Assumptions in this code + * P is not directly writeable + * flags correspond to full 32bit accumulator + * only Z and N status flags are emulated (others unused by SVP) + * modifiers for 'OP a, ri' are ignored (invalid?/not used by SVP) + * 'ld d, (a)' loads from program ROM + */ + +#include "shared.h" + + +#define u32 unsigned int + +/*#define USE_DEBUGGER*/ + +/* 0 */ +#define rX ssp->gr[SSP_X].byte.h +#define rY ssp->gr[SSP_Y].byte.h +#define rA ssp->gr[SSP_A].byte.h +#define rST ssp->gr[SSP_ST].byte.h /* 4 */ +#define rSTACK ssp->gr[SSP_STACK].byte.h +#define rPC ssp->gr[SSP_PC].byte.h +#define rP ssp->gr[SSP_P] +#define rPM0 ssp->gr[SSP_PM0].byte.h /* 8 */ +#define rPM1 ssp->gr[SSP_PM1].byte.h +#define rPM2 ssp->gr[SSP_PM2].byte.h +#define rXST ssp->gr[SSP_XST].byte.h +#define rPM4 ssp->gr[SSP_PM4].byte.h /* 12 */ +/* 13 */ +#define rPMC ssp->gr[SSP_PMC] /* will keep addr in .h, mode in .l */ +#define rAL ssp->gr[SSP_A].byte.l + +#define rA32 ssp->gr[SSP_A].v +#define rIJ ssp->ptr.r + +#define IJind (((op>>6)&4)|(op&3)) + +#define GET_PC() (PC - (unsigned short *)svp->iram_rom) +#define GET_PPC_OFFS() ((unsigned int)PC - (unsigned int)svp->iram_rom - 2) +#define SET_PC(d) PC = (unsigned short *)svp->iram_rom + d + +#define REG_READ(r) (((r) <= 4) ? ssp->gr[r].byte.h : read_handlers[r]()) +#define REG_WRITE(r,d) { \ + int r1 = r; \ + if (r1 >= 4) write_handlers[r1](d); \ + else if (r1 > 0) ssp->gr[r1].byte.h = d; \ +} + +/* flags */ +#define SSP_FLAG_L (1<<0xc) +#define SSP_FLAG_Z (1<<0xd) +#define SSP_FLAG_V (1<<0xe) +#define SSP_FLAG_N (1<<0xf) + +/* update ZN according to 32bit ACC. */ +#define UPD_ACC_ZN \ + rST &= ~(SSP_FLAG_Z|SSP_FLAG_N); \ + if (!rA32) rST |= SSP_FLAG_Z; \ + else rST |= (rA32>>16)&SSP_FLAG_N; + +/* it seems SVP code never checks for L and OV, so we leave them out. */ +/* rST |= (t>>4)&SSP_FLAG_L; */ +#define UPD_LZVN \ + rST &= ~(SSP_FLAG_L|SSP_FLAG_Z|SSP_FLAG_V|SSP_FLAG_N); \ + if (!rA32) rST |= SSP_FLAG_Z; \ + else rST |= (rA32>>16)&SSP_FLAG_N; + +/* standard cond processing. */ +/* again, only Z and N is checked, as SVP doesn't seem to use any other conds. */ +#define COND_CHECK \ + switch (op&0xf0) { \ + case 0x00: cond = 1; break; /* always true */ \ + case 0x50: cond = !((rST ^ (op<<5)) & SSP_FLAG_Z); break; /* Z matches f(?) bit */ \ + case 0x70: cond = !((rST ^ (op<<7)) & SSP_FLAG_N); break; /* N matches f(?) bit */ \ + default: break; \ + } + +/* ops with accumulator. */ +/* how is low word really affected by these? */ +/* nearly sure 'ld A' doesn't affect flags */ +#define OP_LDA(x) \ + rA = x + +#define OP_LDA32(x) \ + rA32 = x + +#define OP_SUBA(x) { \ + rA32 -= (x) << 16; \ + UPD_LZVN \ +} + +#define OP_SUBA32(x) { \ + rA32 -= (x); \ + UPD_LZVN \ +} + +#define OP_CMPA(x) { \ + u32 t = rA32 - ((x) << 16); \ + rST &= ~(SSP_FLAG_L|SSP_FLAG_Z|SSP_FLAG_V|SSP_FLAG_N); \ + if (!t) rST |= SSP_FLAG_Z; \ + else rST |= (t>>16)&SSP_FLAG_N; \ +} + +#define OP_CMPA32(x) { \ + u32 t = rA32 - (x); \ + rST &= ~(SSP_FLAG_L|SSP_FLAG_Z|SSP_FLAG_V|SSP_FLAG_N); \ + if (!t) rST |= SSP_FLAG_Z; \ + else rST |= (t>>16)&SSP_FLAG_N; \ +} + +#define OP_ADDA(x) { \ + rA32 += (x) << 16; \ + UPD_LZVN \ +} + +#define OP_ADDA32(x) { \ + rA32 += (x); \ + UPD_LZVN \ +} + +#define OP_ANDA(x) \ + rA32 &= (x) << 16; \ + UPD_ACC_ZN + +#define OP_ANDA32(x) \ + rA32 &= (x); \ + UPD_ACC_ZN + +#define OP_ORA(x) \ + rA32 |= (x) << 16; \ + UPD_ACC_ZN + +#define OP_ORA32(x) \ + rA32 |= (x); \ + UPD_ACC_ZN + +#define OP_EORA(x) \ + rA32 ^= (x) << 16; \ + UPD_ACC_ZN + +#define OP_EORA32(x) \ + rA32 ^= (x); \ + UPD_ACC_ZN + + +#define OP_CHECK32(OP) { \ + if ((op & 0x0f) == SSP_P) { /* A <- P */ \ + read_P(); /* update P */ \ + OP(rP.v); \ + break; \ + } \ + if ((op & 0x0f) == SSP_A) { /* A <- A */ \ + OP(rA32); \ + break; \ + } \ +} + + +static ssp1601_t *ssp = NULL; +static unsigned short *PC; +static int g_cycles; + +#ifdef USE_DEBUGGER +static int running = 0; +static int last_iram = 0; +#endif + +/* ----------------------------------------------------- */ +/* register i/o handlers */ + +/* 0-4, 13 */ +static u32 read_unknown(void) +{ +#ifdef LOG_SVP + elprintf(EL_ANOMALY|EL_SVP, "ssp FIXME: unknown read @ %04x", GET_PPC_OFFS()); +#endif + return 0; +} + +static void write_unknown(u32 d) +{ +#ifdef LOG_SVP + elprintf(EL_ANOMALY|EL_SVP, "ssp FIXME: unknown write @ %04x", GET_PPC_OFFS()); +#endif +} + +/* 4 */ +static void write_ST(u32 d) +{ + /* if ((rST ^ d) & 0x0007) elprintf(EL_SVP, "ssp RPL %i -> %i @ %04x", rST&7, d&7, GET_PPC_OFFS()); */ +#ifdef LOG_SVP + if ((rST ^ d) & 0x0f98) elprintf(EL_SVP|EL_ANOMALY, "ssp FIXME ST %04x -> %04x @ %04x", rST, d, GET_PPC_OFFS()); +#endif + rST = d; +} + +/* 5 */ +static u32 read_STACK(void) +{ + --rSTACK; + if ((short)rSTACK < 0) { + rSTACK = 5; +#ifdef LOG_SVP + elprintf(EL_ANOMALY|EL_SVP, "ssp FIXME: stack underflow! (%i) @ %04x", rSTACK, GET_PPC_OFFS()); +#endif + } + return ssp->stack[rSTACK]; +} + +static void write_STACK(u32 d) +{ + if (rSTACK >= 6) { +#ifdef LOG_SVP + elprintf(EL_ANOMALY|EL_SVP, "ssp FIXME: stack overflow! (%i) @ %04x", rSTACK, GET_PPC_OFFS()); +#endif + rSTACK = 0; + } + ssp->stack[rSTACK++] = d; +} + +/* 6 */ +static u32 read_PC(void) +{ + /* g_cycles--; */ + return GET_PC(); +} + +static void write_PC(u32 d) +{ + SET_PC(d); + g_cycles--; +} + +/* 7 */ +static u32 read_P(void) +{ + int m1 = (signed short)rX; + int m2 = (signed short)rY; + rP.v = (m1 * m2 * 2); + return rP.byte.h; +} + +/* ----------------------------------------------------- */ + +static int get_inc(int mode) +{ + int inc = (mode >> 11) & 7; + if (inc != 0) { + if (inc != 7) inc--; + /* inc = (1<<16) << inc; */ + inc = 1 << inc; /* 0 1 2 4 8 16 32 128 */ + if (mode & 0x8000) inc = -inc; /* decrement mode */ + } + return inc; +} + +#define overwite_write(dst, d) \ +{ \ + if (d & 0xf000) { dst &= ~0xf000; dst |= d & 0xf000; } \ + if (d & 0x0f00) { dst &= ~0x0f00; dst |= d & 0x0f00; } \ + if (d & 0x00f0) { dst &= ~0x00f0; dst |= d & 0x00f0; } \ + if (d & 0x000f) { dst &= ~0x000f; dst |= d & 0x000f; } \ +} + +static u32 pm_io(int reg, int write, u32 d) +{ + if (ssp->emu_status & SSP_PMC_SET) + { + /* this MUST be blind r or w */ + if ((*(PC-1) & 0xff0f) && (*(PC-1) & 0xfff0)) { +#ifdef LOG_SVP + elprintf(EL_SVP|EL_ANOMALY, "ssp FIXME: tried to set PM%i (%c) with non-blind i/o %08x @ %04x", + reg, write ? 'w' : 'r', rPMC.v, GET_PPC_OFFS()); +#endif + ssp->emu_status &= ~SSP_PMC_SET; + return 0; + } +#ifdef LOG_SVP + elprintf(EL_SVP, "PM%i (%c) set to %08x @ %04x", reg, write ? 'w' : 'r', rPMC.v, GET_PPC_OFFS()); +#endif + ssp->pmac[write][reg] = rPMC.v; + ssp->emu_status &= ~SSP_PMC_SET; +#ifdef LOG_SVP + if ((rPMC.v & 0x7f) == 0x1c && (rPMC.v & 0x7fff0000) == 0) { + elprintf(EL_SVP, "ssp IRAM copy from %06x", (ssp->mem.bank.RAM1[0]-1)<<1); +#ifdef USE_DEBUGGER + last_iram = (ssp->mem.bank.RAM1[0]-1)<<1; +#endif + } +#endif + return 0; + } + + /* just in case */ + if (ssp->emu_status & SSP_PMC_HAVE_ADDR) { +#ifdef LOG_SVP + elprintf(EL_SVP|EL_ANOMALY, "ssp FIXME: PM%i (%c) with only addr set @ %04x", + reg, write ? 'w' : 'r', GET_PPC_OFFS()); +#endif + ssp->emu_status &= ~SSP_PMC_HAVE_ADDR; + } + + if (reg == 4 || (rST & 0x60)) + { +#ifdef LOG_SVP + #define CADDR ((((mode<<16)&0x7f0000)|addr)<<1) +#endif + unsigned short *dram = (unsigned short *)svp->dram; + if (write) + { + /*int mode = ssp->pmac_write[reg]&0xffff; + int addr = ssp->pmac_write[reg]>>16;*/ + int addr = ssp->pmac[1][reg]&0xffff; + int mode = ssp->pmac[1][reg]>>16; +#ifdef LOG_SVP + if ((mode & 0xb800) == 0xb800) + elprintf(EL_SVP|EL_ANOMALY, "ssp FIXME: mode %04x", mode); +#endif + if ((mode & 0x43ff) == 0x0018) /* DRAM */ + { + int inc = get_inc(mode); +#ifdef LOG_SVP + elprintf(EL_SVP, "ssp PM%i DRAM w [%06x] %04x (inc %i, ovrw %i)", + reg, CADDR, d, inc >> 16, (mode>>10)&1); +#endif + if (mode & 0x0400) { + overwite_write(dram[addr], d); + } else dram[addr] = d; + ssp->pmac[1][reg] += inc; + } + else if ((mode & 0xfbff) == 0x4018) /* DRAM, cell inc */ + { +#ifdef LOG_SVP + elprintf(EL_SVP, "ssp PM%i DRAM w [%06x] %04x (cell inc, ovrw %i) @ %04x", + reg, CADDR, d, (mode>>10)&1, GET_PPC_OFFS()); +#endif + if (mode & 0x0400) { + overwite_write(dram[addr], d); + } else dram[addr] = d; + /* ssp->pmac_write[reg] += (addr&1) ? (31<<16) : (1<<16); */ + ssp->pmac[1][reg] += (addr&1) ? 31 : 1; + } + else if ((mode & 0x47ff) == 0x001c) /* IRAM */ + { + int inc = get_inc(mode); +#ifdef LOG_SVP + if ((addr&0xfc00) != 0x8000) + elprintf(EL_SVP|EL_ANOMALY, "ssp FIXME: invalid IRAM addr: %04x", addr<<1); + elprintf(EL_SVP, "ssp IRAM w [%06x] %04x (inc %i)", (addr<<1)&0x7ff, d, inc >> 16); +#endif + ((unsigned short *)svp->iram_rom)[addr&0x3ff] = d; + ssp->pmac[1][reg] += inc; + } +#ifdef LOG_SVP + else + { + elprintf(EL_SVP|EL_ANOMALY, "ssp FIXME: PM%i unhandled write mode %04x, [%06x] %04x @ %04x", + reg, mode, CADDR, d, GET_PPC_OFFS()); + } +#endif + } + else + { + /*int mode = ssp->pmac_read[reg]&0xffff; + int addr = ssp->pmac_read[reg]>>16;*/ + int addr = ssp->pmac[0][reg]&0xffff; + int mode = ssp->pmac[0][reg]>>16; + + if ((mode & 0xfff0) == 0x0800) /* ROM, inc 1, verified to be correct */ + { +#ifdef LOG_SVP + elprintf(EL_SVP, "ssp ROM r [%06x] %04x", CADDR, + ((unsigned short *)cart.rom)[addr|((mode&0xf)<<16)]); +#endif + /*if ((signed int)ssp->pmac_read[reg] >> 16 == -1) ssp->pmac_read[reg]++; + ssp->pmac_read[reg] += 1<<16;*/ + if ((signed int)(ssp->pmac[0][reg] & 0xffff) == -1) ssp->pmac[0][reg] += 1<<16; + ssp->pmac[0][reg] ++; + + d = ((unsigned short *)cart.rom)[addr|((mode&0xf)<<16)]; + } + else if ((mode & 0x47ff) == 0x0018) /* DRAM */ + { + int inc = get_inc(mode); +#ifdef LOG_SVP + elprintf(EL_SVP, "ssp PM%i DRAM r [%06x] %04x (inc %i)", reg, CADDR, dram[addr], inc >> 16); +#endif + d = dram[addr]; + ssp->pmac[0][reg] += inc; + } + else + { +#ifdef LOG_SVP + elprintf(EL_SVP|EL_ANOMALY, "ssp FIXME: PM%i unhandled read mode %04x, [%06x] @ %04x", + reg, mode, CADDR, GET_PPC_OFFS()); +#endif + d = 0; + } + } + + /* PMC value corresponds to last PMR accessed (not sure). */ + rPMC.v = ssp->pmac[write][reg]; + + return d; + } + + return (u32)-1; +} + +/* 8 */ +static u32 read_PM0(void) +{ + u32 d = pm_io(0, 0, 0); + if (d != (u32)-1) return d; +#ifdef LOG_SVP + elprintf(EL_SVP, "PM0 raw r %04x @ %04x", rPM0, GET_PPC_OFFS()); +#endif + d = rPM0; + if (!(d & 2) && (GET_PPC_OFFS() == 0x800 || GET_PPC_OFFS() == 0x1851E)) { + ssp->emu_status |= SSP_WAIT_PM0; +#ifdef LOG_SVP + elprintf(EL_SVP, "det TIGHT loop: PM0"); +#endif + } + rPM0 &= ~2; /* ? */ + return d; +} + +static void write_PM0(u32 d) +{ + u32 r = pm_io(0, 1, d); + if (r != (u32)-1) return; +#ifdef LOG_SVP + elprintf(EL_SVP, "PM0 raw w %04x @ %04x", d, GET_PPC_OFFS()); +#endif + rPM0 = d; +} + +/* 9 */ +static u32 read_PM1(void) +{ + u32 d = pm_io(1, 0, 0); + if (d != (u32)-1) return d; + /* can be removed? */ +#ifdef LOG_SVP + elprintf(EL_SVP|EL_ANOMALY, "PM1 raw r %04x @ %04x", rPM1, GET_PPC_OFFS()); +#endif + return rPM1; +} + +static void write_PM1(u32 d) +{ + u32 r = pm_io(1, 1, d); + if (r != (u32)-1) return; + /* can be removed? */ +#ifdef LOG_SVP + elprintf(EL_SVP|EL_ANOMALY, "PM1 raw w %04x @ %04x", d, GET_PPC_OFFS()); +#endif + rPM1 = d; +} + +/* 10 */ +static u32 read_PM2(void) +{ + u32 d = pm_io(2, 0, 0); + if (d != (u32)-1) return d; + /* can be removed? */ +#ifdef LOG_SVP + elprintf(EL_SVP|EL_ANOMALY, "PM2 raw r %04x @ %04x", rPM2, GET_PPC_OFFS()); +#endif + return rPM2; +} + +static void write_PM2(u32 d) +{ + u32 r = pm_io(2, 1, d); + if (r != (u32)-1) return; + /* can be removed? */ +#ifdef LOG_SVP + elprintf(EL_SVP|EL_ANOMALY, "PM2 raw w %04x @ %04x", d, GET_PPC_OFFS()); +#endif + rPM2 = d; +} + +/* 11 */ +static u32 read_XST(void) +{ + /* can be removed? */ + u32 d = pm_io(3, 0, 0); + if (d != (u32)-1) return d; +#ifdef LOG_SVP + elprintf(EL_SVP, "XST raw r %04x @ %04x", rXST, GET_PPC_OFFS()); +#endif + return rXST; +} + +static void write_XST(u32 d) +{ + /* can be removed? */ + u32 r = pm_io(3, 1, d); + if (r != (u32)-1) return; +#ifdef LOG_SVP + elprintf(EL_SVP, "XST raw w %04x @ %04x", d, GET_PPC_OFFS()); +#endif + rPM0 |= 1; + rXST = d; +} + +/* 12 */ +static u32 read_PM4(void) +{ + u32 d = pm_io(4, 0, 0); + if (d == 0) { + switch (GET_PPC_OFFS()) { + case 0x0854: + ssp->emu_status |= SSP_WAIT_30FE08; +#ifdef LOG_SVP + elprintf(EL_SVP, "det TIGHT loop: [30fe08]"); +#endif + break; + case 0x4f12: + ssp->emu_status |= SSP_WAIT_30FE06; +#ifdef LOG_SVP + elprintf(EL_SVP, "det TIGHT loop: [30fe06]"); +#endif + break; + } + } + if (d != (u32)-1) return d; + /* can be removed? */ +#ifdef LOG_SVP + elprintf(EL_SVP|EL_ANOMALY, "PM4 raw r %04x @ %04x", rPM4, GET_PPC_OFFS()); +#endif + return rPM4; +} + +static void write_PM4(u32 d) +{ + u32 r = pm_io(4, 1, d); + if (r != (u32)-1) return; + /* can be removed? */ +#ifdef LOG_SVP + elprintf(EL_SVP|EL_ANOMALY, "PM4 raw w %04x @ %04x", d, GET_PPC_OFFS()); +#endif + rPM4 = d; +} + +/* 14 */ +static u32 read_PMC(void) +{ +#ifdef LOG_SVP + elprintf(EL_SVP, "PMC r a %04x (st %c) @ %04x", rPMC.byte.h, + (ssp->emu_status & SSP_PMC_HAVE_ADDR) ? 'm' : 'a', GET_PPC_OFFS()); +#endif + if (ssp->emu_status & SSP_PMC_HAVE_ADDR) { + /* if (ssp->emu_status & SSP_PMC_SET) */ + /* elprintf(EL_ANOMALY|EL_SVP, "prev PMC not used @ %04x", GET_PPC_OFFS()); */ + ssp->emu_status |= SSP_PMC_SET; + ssp->emu_status &= ~SSP_PMC_HAVE_ADDR; + /* return ((rPMC.h << 4) & 0xfff0) | ((rPMC.h >> 4) & 0xf); */ + return ((rPMC.byte.l << 4) & 0xfff0) | ((rPMC.byte.l >> 4) & 0xf); + } else { + ssp->emu_status |= SSP_PMC_HAVE_ADDR; + /* return rPMC.h; */ + return rPMC.byte.l; + } +} + +static void write_PMC(u32 d) +{ + if (ssp->emu_status & SSP_PMC_HAVE_ADDR) { + /* if (ssp->emu_status & SSP_PMC_SET) */ + /* elprintf(EL_ANOMALY|EL_SVP, "prev PMC not used @ %04x", GET_PPC_OFFS()); */ + ssp->emu_status |= SSP_PMC_SET; + ssp->emu_status &= ~SSP_PMC_HAVE_ADDR; + /* rPMC.l = d; */ + rPMC.byte.h = d; +#ifdef LOG_SVP + elprintf(EL_SVP, "PMC w m %04x @ %04x", rPMC.byte.l, GET_PPC_OFFS()); +#endif + } else { + ssp->emu_status |= SSP_PMC_HAVE_ADDR; + /* rPMC.h = d; */ + rPMC.byte.l = d; +#ifdef LOG_SVP + elprintf(EL_SVP, "PMC w a %04x @ %04x", rPMC.byte.h, GET_PPC_OFFS()); +#endif + } +} + +/* 15 */ +static u32 read_AL(void) +{ + if (*(PC-1) == 0x000f) { +#ifdef LOG_SVP + elprintf(EL_SVP, "ssp dummy PM assign %08x @ %04x", rPMC.v, GET_PPC_OFFS()); +#endif + ssp->emu_status &= ~(SSP_PMC_SET|SSP_PMC_HAVE_ADDR); /* ? */ + } + return rAL; +} + +static void write_AL(u32 d) +{ + rAL = d; +} + + +typedef u32 (*read_func_t)(void); +typedef void (*write_func_t)(u32 d); + +static read_func_t read_handlers[16] = +{ + read_unknown, read_unknown, read_unknown, read_unknown, /* -, X, Y, A */ + read_unknown, /* 4 ST */ + read_STACK, + read_PC, + read_P, + read_PM0, /* 8 */ + read_PM1, + read_PM2, + read_XST, + read_PM4, /* 12 */ + read_unknown, /* 13 gr13 */ + read_PMC, + read_AL +}; + +static write_func_t write_handlers[16] = +{ + write_unknown, write_unknown, write_unknown, write_unknown, /* -, X, Y, A */ +/* write_unknown, */ /* 4 ST */ + write_ST, /* 4 ST (debug hook) */ + write_STACK, + write_PC, + write_unknown, /* 7 P */ + write_PM0, /* 8 */ + write_PM1, + write_PM2, + write_XST, + write_PM4, /* 12 */ + write_unknown, /* 13 gr13 */ + write_PMC, + write_AL +}; + +/* ----------------------------------------------------- */ +/* pointer register handlers */ + +#define ptr1_read(op) ptr1_read_(op&3,(op>>6)&4,(op<<1)&0x18) + +static u32 ptr1_read_(int ri, int isj2, int modi3) +{ + /* int t = (op&3) | ((op>>6)&4) | ((op<<1)&0x18); */ + u32 mask, add = 0, t = ri | isj2 | modi3; + unsigned char *rp = NULL; + switch (t) + { + /* mod=0 (00) */ + case 0x00: + case 0x01: + case 0x02: return ssp->mem.bank.RAM0[ssp->ptr.bank.r0[t&3]]; + case 0x03: return ssp->mem.bank.RAM0[0]; + case 0x04: + case 0x05: + case 0x06: return ssp->mem.bank.RAM1[ssp->ptr.bank.r1[t&3]]; + case 0x07: return ssp->mem.bank.RAM1[0]; + /* mod=1 (01), "+!" */ + case 0x08: + case 0x09: + case 0x0a: return ssp->mem.bank.RAM0[ssp->ptr.bank.r0[t&3]++]; + case 0x0b: return ssp->mem.bank.RAM0[1]; + case 0x0c: + case 0x0d: + case 0x0e: return ssp->mem.bank.RAM1[ssp->ptr.bank.r1[t&3]++]; + case 0x0f: return ssp->mem.bank.RAM1[1]; + /* mod=2 (10), "-" */ + case 0x10: + case 0x11: + case 0x12: rp = &ssp->ptr.bank.r0[t&3]; t = ssp->mem.bank.RAM0[*rp]; + if (!(rST&7)) { (*rp)--; return t; } + add = -1; goto modulo; + case 0x13: return ssp->mem.bank.RAM0[2]; + case 0x14: + case 0x15: + case 0x16: rp = &ssp->ptr.bank.r1[t&3]; t = ssp->mem.bank.RAM1[*rp]; + if (!(rST&7)) { (*rp)--; return t; } + add = -1; goto modulo; + case 0x17: return ssp->mem.bank.RAM1[2]; + /* mod=3 (11), "+" */ + case 0x18: + case 0x19: + case 0x1a: rp = &ssp->ptr.bank.r0[t&3]; t = ssp->mem.bank.RAM0[*rp]; + if (!(rST&7)) { (*rp)++; return t; } + add = 1; goto modulo; + case 0x1b: return ssp->mem.bank.RAM0[3]; + case 0x1c: + case 0x1d: + case 0x1e: rp = &ssp->ptr.bank.r1[t&3]; t = ssp->mem.bank.RAM1[*rp]; + if (!(rST&7)) { (*rp)++; return t; } + add = 1; goto modulo; + case 0x1f: return ssp->mem.bank.RAM1[3]; + } + + return 0; + +modulo: + mask = (1 << (rST&7)) - 1; + *rp = (*rp & ~mask) | ((*rp + add) & mask); + return t; +} + +static void ptr1_write(int op, u32 d) +{ + int t = (op&3) | ((op>>6)&4) | ((op<<1)&0x18); + switch (t) + { + /* mod=0 (00) */ + case 0x00: + case 0x01: + case 0x02: ssp->mem.bank.RAM0[ssp->ptr.bank.r0[t&3]] = d; return; + case 0x03: ssp->mem.bank.RAM0[0] = d; return; + case 0x04: + case 0x05: + case 0x06: ssp->mem.bank.RAM1[ssp->ptr.bank.r1[t&3]] = d; return; + case 0x07: ssp->mem.bank.RAM1[0] = d; return; + /* mod=1 (01), "+!" */ + /* mod=3, "+" */ + case 0x08: + case 0x18: + case 0x09: + case 0x19: + case 0x0a: + case 0x1a: ssp->mem.bank.RAM0[ssp->ptr.bank.r0[t&3]++] = d; return; + case 0x0b: ssp->mem.bank.RAM0[1] = d; return; + case 0x0c: + case 0x1c: + case 0x0d: + case 0x1d: + case 0x0e: + case 0x1e: ssp->mem.bank.RAM1[ssp->ptr.bank.r1[t&3]++] = d; return; + case 0x0f: ssp->mem.bank.RAM1[1] = d; return; + /* mod=2 (10), "-" */ + case 0x10: + case 0x11: + case 0x12: ssp->mem.bank.RAM0[ssp->ptr.bank.r0[t&3]--] = d; return; + case 0x13: ssp->mem.bank.RAM0[2] = d; return; + case 0x14: + case 0x15: + case 0x16: ssp->mem.bank.RAM1[ssp->ptr.bank.r1[t&3]--] = d; return; + case 0x17: ssp->mem.bank.RAM1[2] = d; return; + /* mod=3 (11) */ + case 0x1b: ssp->mem.bank.RAM0[3] = d; return; + case 0x1f: ssp->mem.bank.RAM1[3] = d; return; + } +} + +static u32 ptr2_read(int op) +{ + int mv = 0, t = (op&3) | ((op>>6)&4) | ((op<<1)&0x18); + switch (t) + { + /* mod=0 (00) */ + case 0x00: + case 0x01: + case 0x02: mv = ssp->mem.bank.RAM0[ssp->ptr.bank.r0[t&3]]++; break; + case 0x03: mv = ssp->mem.bank.RAM0[0]++; break; + case 0x04: + case 0x05: + case 0x06: mv = ssp->mem.bank.RAM1[ssp->ptr.bank.r1[t&3]]++; break; + case 0x07: mv = ssp->mem.bank.RAM1[0]++; break; + /* mod=1 (01) */ + case 0x0b: mv = ssp->mem.bank.RAM0[1]++; break; + case 0x0f: mv = ssp->mem.bank.RAM1[1]++; break; + /* mod=2 (10) */ + case 0x13: mv = ssp->mem.bank.RAM0[2]++; break; + case 0x17: mv = ssp->mem.bank.RAM1[2]++; break; + /* mod=3 (11) */ + case 0x1b: mv = ssp->mem.bank.RAM0[3]++; break; + case 0x1f: mv = ssp->mem.bank.RAM1[3]++; break; + default: +#ifdef LOG_SVP + elprintf(EL_SVP|EL_ANOMALY, "ssp FIXME: invalid mod in ((rX))? @ %04x", GET_PPC_OFFS()); +#endif + return 0; + } + + return ((unsigned short *)svp->iram_rom)[mv]; +} + + +/* ----------------------------------------------------- */ + +void ssp1601_reset(ssp1601_t *l_ssp) +{ + ssp = l_ssp; + ssp->emu_status = 0; + ssp->gr[SSP_GR0].v = 0xffff0000; + rPC = 0x400; + rSTACK = 0; /* ? using ascending stack */ + rST = 0; +} + + +#ifdef USE_DEBUGGER +static void debug_dump(void) +{ + printf("GR0: %04x X: %04x Y: %04x A: %08x\n", ssp->gr[SSP_GR0].byte.h, rX, rY, ssp->gr[SSP_A].v); + printf("PC: %04x (%04x) P: %08x\n", GET_PC(), GET_PC() << 1, ssp->gr[SSP_P].v); + printf("PM0: %04x PM1: %04x PM2: %04x\n", rPM0, rPM1, rPM2); + printf("XST: %04x PM4: %04x PMC: %08x\n", rXST, rPM4, ssp->gr[SSP_PMC].v); + printf(" ST: %04x %c%c%c%c, GP0_0 %i, GP0_1 %i\n", rST, rST&SSP_FLAG_N?'N':'n', rST&SSP_FLAG_V?'V':'v', + rST&SSP_FLAG_Z?'Z':'z', rST&SSP_FLAG_L?'L':'l', (rST>>5)&1, (rST>>6)&1); + printf("STACK: %i %04x %04x %04x %04x %04x %04x\n", rSTACK, ssp->stack[0], ssp->stack[1], + ssp->stack[2], ssp->stack[3], ssp->stack[4], ssp->stack[5]); + printf("r0-r2: %02x %02x %02x r4-r6: %02x %02x %02x\n", rIJ[0], rIJ[1], rIJ[2], rIJ[4], rIJ[5], rIJ[6]); + elprintf(EL_SVP, "cycles: %i, emu_status: %x", g_cycles, ssp->emu_status); +} + +static void debug_dump_mem(void) +{ + int h, i; + printf("RAM0\n"); + for (h = 0; h < 32; h++) + { + if (h == 16) printf("RAM1\n"); + printf("%03x:", h*16); + for (i = 0; i < 16; i++) + printf(" %04x", ssp->mem.RAM[h*16+i]); + printf("\n"); + } +} + +static void debug_dump2file(const char *fname, void *mem, int len) +{ + FILE *f = fopen(fname, "wb"); + unsigned short *p = mem; + int i; + if (f) { + for (i = 0; i < len/2; i++) p[i] = (p[i]<<8) | (p[i]>>8); + fwrite(mem, 1, len, f); + fclose(f); + for (i = 0; i < len/2; i++) p[i] = (p[i]<<8) | (p[i]>>8); + printf("dumped to %s\n", fname); + } + else + printf("dump failed\n"); +} + +static int bpts[10] = { 0, }; + +static void debug(unsigned int pc, unsigned int op) +{ + static char buffo[64] = {0,}; + char buff[64] = {0,}; + int i; + + if (running) { + for (i = 0; i < 10; i++) + if (pc != 0 && bpts[i] == pc) { + printf("breakpoint %i\n", i); + running = 0; + break; + } + } + if (running) return; + + printf("%04x (%02x) @ %04x\n", op, op >> 9, pc<<1); + + while (1) + { + printf("dbg> "); + fflush(stdout); + fgets(buff, sizeof(buff), stdin); + if (buff[0] == '\n') strcpy(buff, buffo); + else strcpy(buffo, buff); + + switch (buff[0]) { + case 0: exit(0); + case 'c': + case 'r': running = 1; return; + case 's': + case 'n': return; + case 'x': debug_dump(); break; + case 'm': debug_dump_mem(); break; + case 'b': { + char *baddr = buff + 2; + i = 0; + if (buff[3] == ' ') { i = buff[2] - '0'; baddr = buff + 4; } + bpts[i] = strtol(baddr, NULL, 16) >> 1; + printf("breakpoint %i set @ %04x\n", i, bpts[i]<<1); + break; + } + case 'd': + sprintf(buff, "iramrom_%04x.bin", last_iram); + debug_dump2file(buff, svp->iram_rom, sizeof(svp->iram_rom)); + debug_dump2file("dram.bin", svp->dram, sizeof(svp->dram)); + break; + default: printf("unknown command\n"); break; + } + } +} +#endif /* USE_DEBUGGER */ + + +void ssp1601_run(int cycles) +{ + SET_PC(rPC); + g_cycles = cycles; + + do + { + int op; + u32 tmpv; + + op = *PC++; +#ifdef USE_DEBUGGER + debug(GET_PC()-1, op); +#endif + switch (op >> 9) + { + /* ld d, s */ + case 0x00: + if (op == 0) break; /* nop */ + if (op == ((SSP_A<<4)|SSP_P)) { /* A <- P */ + /* not sure. MAME claims that only hi word is transfered. */ + read_P(); /* update P */ + rA32 = rP.v; + } + else + { + tmpv = REG_READ(op & 0x0f); + REG_WRITE((op & 0xf0) >> 4, tmpv); + } + break; + + /* ld d, (ri) */ + case 0x01: tmpv = ptr1_read(op); REG_WRITE((op & 0xf0) >> 4, tmpv); break; + + /* ld (ri), s */ + case 0x02: tmpv = REG_READ((op & 0xf0) >> 4); ptr1_write(op, tmpv); break; + + /* ldi d, imm */ + case 0x04: tmpv = *PC++; REG_WRITE((op & 0xf0) >> 4, tmpv); break; + + /* ld d, ((ri)) */ + case 0x05: tmpv = ptr2_read(op); REG_WRITE((op & 0xf0) >> 4, tmpv); break; + + /* ldi (ri), imm */ + case 0x06: tmpv = *PC++; ptr1_write(op, tmpv); break; + + /* ld adr, a */ + case 0x07: ssp->mem.RAM[op & 0x1ff] = rA; break; + + /* ld d, ri */ + case 0x09: tmpv = rIJ[(op&3)|((op>>6)&4)]; REG_WRITE((op & 0xf0) >> 4, tmpv); break; + + /* ld ri, s */ + case 0x0a: rIJ[(op&3)|((op>>6)&4)] = REG_READ((op & 0xf0) >> 4); break; + + /* ldi ri, simm */ + case 0x0c: + case 0x0d: + case 0x0e: + case 0x0f: rIJ[(op>>8)&7] = op; break; + + /* call cond, addr */ + case 0x24: { + int cond = 0; + COND_CHECK + if (cond) { int new_PC = *PC++; write_STACK(GET_PC()); write_PC(new_PC); } + else PC++; + break; + } + + /* ld d, (a) */ + case 0x25: tmpv = ((unsigned short *)svp->iram_rom)[rA]; REG_WRITE((op & 0xf0) >> 4, tmpv); break; + + /* bra cond, addr */ + case 0x26: { + int cond = 0; + COND_CHECK + if (cond) { int new_PC = *PC++; write_PC(new_PC); } + else PC++; + break; + } + + /* mod cond, op */ + case 0x48: { + int cond = 0; + COND_CHECK + if (cond) { + switch (op & 7) { + case 2: rA32 = (signed int)rA32 >> 1; break; /* shr (arithmetic) */ + case 3: rA32 <<= 1; break; /* shl */ + case 6: rA32 = -(signed int)rA32; break; /* neg */ + case 7: if ((int)rA32 < 0) rA32 = -(signed int)rA32; break; /* abs */ + default: +#ifdef LOG_SVP + elprintf(EL_SVP|EL_ANOMALY, "ssp FIXME: unhandled mod %i @ %04x", + op&7, GET_PPC_OFFS()); +#endif + break; + } + UPD_ACC_ZN /* ? */ + } + break; + } + + /* mpys? */ + case 0x1b: +#ifdef LOG_SVP + if (!(op&0x100)) elprintf(EL_SVP|EL_ANOMALY, "ssp FIXME: no b bit @ %04x", GET_PPC_OFFS()); +#endif + read_P(); /* update P */ + rA32 -= rP.v; /* maybe only upper word? */ + UPD_ACC_ZN /* there checking flags after this */ + rX = ptr1_read_(op&3, 0, (op<<1)&0x18); /* ri (maybe rj?) */ + rY = ptr1_read_((op>>4)&3, 4, (op>>3)&0x18); /* rj */ + break; + + /* mpya (rj), (ri), b */ + case 0x4b: +#ifdef LOG_SVP + if (!(op&0x100)) elprintf(EL_SVP|EL_ANOMALY, "ssp FIXME: no b bit @ %04x", GET_PPC_OFFS()); +#endif + read_P(); /* update P */ + rA32 += rP.v; /* confirmed to be 32bit */ + UPD_ACC_ZN /* ? */ + rX = ptr1_read_(op&3, 0, (op<<1)&0x18); /* ri (maybe rj?) */ + rY = ptr1_read_((op>>4)&3, 4, (op>>3)&0x18); /* rj */ + break; + + /* mld (rj), (ri), b */ + case 0x5b: +#ifdef LOG_SVP + if (!(op&0x100)) elprintf(EL_SVP|EL_ANOMALY, "ssp FIXME: no b bit @ %04x", GET_PPC_OFFS()); +#endif + rA32 = 0; + rST &= 0x0fff; /* ? */ + rX = ptr1_read_(op&3, 0, (op<<1)&0x18); /* ri (maybe rj?) */ + rY = ptr1_read_((op>>4)&3, 4, (op>>3)&0x18); /* rj */ + break; + + /* OP a, s */ + case 0x10: OP_CHECK32(OP_SUBA32); tmpv = REG_READ(op & 0x0f); OP_SUBA(tmpv); break; + case 0x30: OP_CHECK32(OP_CMPA32); tmpv = REG_READ(op & 0x0f); OP_CMPA(tmpv); break; + case 0x40: OP_CHECK32(OP_ADDA32); tmpv = REG_READ(op & 0x0f); OP_ADDA(tmpv); break; + case 0x50: OP_CHECK32(OP_ANDA32); tmpv = REG_READ(op & 0x0f); OP_ANDA(tmpv); break; + case 0x60: OP_CHECK32(OP_ORA32 ); tmpv = REG_READ(op & 0x0f); OP_ORA (tmpv); break; + case 0x70: OP_CHECK32(OP_EORA32); tmpv = REG_READ(op & 0x0f); OP_EORA(tmpv); break; + + /* OP a, (ri) */ + case 0x11: tmpv = ptr1_read(op); OP_SUBA(tmpv); break; + case 0x31: tmpv = ptr1_read(op); OP_CMPA(tmpv); break; + case 0x41: tmpv = ptr1_read(op); OP_ADDA(tmpv); break; + case 0x51: tmpv = ptr1_read(op); OP_ANDA(tmpv); break; + case 0x61: tmpv = ptr1_read(op); OP_ORA (tmpv); break; + case 0x71: tmpv = ptr1_read(op); OP_EORA(tmpv); break; + + /* OP a, adr */ + case 0x03: tmpv = ssp->mem.RAM[op & 0x1ff]; OP_LDA (tmpv); break; + case 0x13: tmpv = ssp->mem.RAM[op & 0x1ff]; OP_SUBA(tmpv); break; + case 0x33: tmpv = ssp->mem.RAM[op & 0x1ff]; OP_CMPA(tmpv); break; + case 0x43: tmpv = ssp->mem.RAM[op & 0x1ff]; OP_ADDA(tmpv); break; + case 0x53: tmpv = ssp->mem.RAM[op & 0x1ff]; OP_ANDA(tmpv); break; + case 0x63: tmpv = ssp->mem.RAM[op & 0x1ff]; OP_ORA (tmpv); break; + case 0x73: tmpv = ssp->mem.RAM[op & 0x1ff]; OP_EORA(tmpv); break; + + /* OP a, imm */ + case 0x14: tmpv = *PC++; OP_SUBA(tmpv); break; + case 0x34: tmpv = *PC++; OP_CMPA(tmpv); break; + case 0x44: tmpv = *PC++; OP_ADDA(tmpv); break; + case 0x54: tmpv = *PC++; OP_ANDA(tmpv); break; + case 0x64: tmpv = *PC++; OP_ORA (tmpv); break; + case 0x74: tmpv = *PC++; OP_EORA(tmpv); break; + + /* OP a, ((ri)) */ + case 0x15: tmpv = ptr2_read(op); OP_SUBA(tmpv); break; + case 0x35: tmpv = ptr2_read(op); OP_CMPA(tmpv); break; + case 0x45: tmpv = ptr2_read(op); OP_ADDA(tmpv); break; + case 0x55: tmpv = ptr2_read(op); OP_ANDA(tmpv); break; + case 0x65: tmpv = ptr2_read(op); OP_ORA (tmpv); break; + case 0x75: tmpv = ptr2_read(op); OP_EORA(tmpv); break; + + /* OP a, ri */ + case 0x19: tmpv = rIJ[IJind]; OP_SUBA(tmpv); break; + case 0x39: tmpv = rIJ[IJind]; OP_CMPA(tmpv); break; + case 0x49: tmpv = rIJ[IJind]; OP_ADDA(tmpv); break; + case 0x59: tmpv = rIJ[IJind]; OP_ANDA(tmpv); break; + case 0x69: tmpv = rIJ[IJind]; OP_ORA (tmpv); break; + case 0x79: tmpv = rIJ[IJind]; OP_EORA(tmpv); break; + + /* OP simm */ + case 0x1c: + OP_SUBA(op & 0xff); +#ifdef LOG_SVP + if (op&0x100) elprintf(EL_SVP|EL_ANOMALY, "FIXME: simm with upper bit set"); +#endif + break; + case 0x3c: + OP_CMPA(op & 0xff); +#ifdef LOG_SVP + if (op&0x100) elprintf(EL_SVP|EL_ANOMALY, "FIXME: simm with upper bit set"); +#endif + break; + case 0x4c: + OP_ADDA(op & 0xff); +#ifdef LOG_SVP + if (op&0x100) elprintf(EL_SVP|EL_ANOMALY, "FIXME: simm with upper bit set"); +#endif + break; + /* MAME code only does LSB of top word, but this looks wrong to me. */ + case 0x5c: + OP_ANDA(op & 0xff); +#ifdef LOG_SVP + if (op&0x100) elprintf(EL_SVP|EL_ANOMALY, "FIXME: simm with upper bit set"); +#endif + break; + case 0x6c: + OP_ORA (op & 0xff); +#ifdef LOG_SVP + if (op&0x100) elprintf(EL_SVP|EL_ANOMALY, "FIXME: simm with upper bit set"); +#endif + break; + case 0x7c: + OP_EORA(op & 0xff); +#ifdef LOG_SVP + if (op&0x100) elprintf(EL_SVP|EL_ANOMALY, "FIXME: simm with upper bit set"); +#endif + break; + + default: +#ifdef LOG_SVP + elprintf(EL_ANOMALY|EL_SVP, "ssp FIXME unhandled op %04x @ %04x", op, GET_PPC_OFFS()); +#endif + break; + } + } + while (--g_cycles > 0 && !(ssp->emu_status & SSP_WAIT_MASK)); + + read_P(); /* update P */ + rPC = GET_PC(); + +#ifdef LOG_SVP + if (ssp->gr[SSP_GR0].v != 0xffff0000) + elprintf(EL_ANOMALY|EL_SVP, "ssp FIXME: REG 0 corruption! %08x", ssp->gr[SSP_GR0].v); +#endif +} + diff --git a/genplus-gx/core/cart_hw/svp/ssp16.h b/genplus-gx/core/cart_hw/svp/ssp16.h new file mode 100644 index 0000000000..1717489df3 --- /dev/null +++ b/genplus-gx/core/cart_hw/svp/ssp16.h @@ -0,0 +1,79 @@ +/* + basic, incomplete SSP160x (SSP1601?) interpreter + with SVP memory controller emu + + (c) Copyright 2008, Grazvydas "notaz" Ignotas + Free for non-commercial use. + + For commercial use, separate licencing terms must be obtained. + + Modified for Genesis Plus GX (Eke-Eke): added BIG ENDIAN support, fixed addr/code inversion +*/ + +#ifndef _SSP16_H_ +#define _SSP16_H_ + +/* emulation event logging (from Picodrive) */ +#ifdef LOG_SVP +#define EL_SVP 0x00004000 /* SVP stuff */ +#define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */ +#define elprintf(w,f,...) error("%d(%d): " f "\n",frame_count,v_counter,##__VA_ARGS__); +#endif + +/* register names */ +enum { + SSP_GR0, SSP_X, SSP_Y, SSP_A, + SSP_ST, SSP_STACK, SSP_PC, SSP_P, + SSP_PM0, SSP_PM1, SSP_PM2, SSP_XST, + SSP_PM4, SSP_gr13, SSP_PMC, SSP_AL +}; + +typedef union +{ + unsigned int v; + struct { +#ifdef LSB_FIRST + unsigned short l; + unsigned short h; +#else + unsigned short h; + unsigned short l; +#endif + } byte; +} ssp_reg_t; + +typedef struct +{ + union { + unsigned short RAM[256*2]; /* 2 internal RAM banks */ + struct { + unsigned short RAM0[256]; + unsigned short RAM1[256]; + } bank; + } mem; + ssp_reg_t gr[16]; /* general registers */ + union { + unsigned char r[8]; /* BANK pointers */ + struct { + unsigned char r0[4]; + unsigned char r1[4]; + } bank; + } ptr; + unsigned short stack[6]; + unsigned int pmac[2][6]; /* read/write modes/addrs for PM0-PM5 */ + #define SSP_PMC_HAVE_ADDR 0x0001 /* address written to PMAC, waiting for mode */ + #define SSP_PMC_SET 0x0002 /* PMAC is set */ + #define SSP_HANG 0x1000 /* 68000 hangs SVP */ + #define SSP_WAIT_PM0 0x2000 /* bit1 in PM0 */ + #define SSP_WAIT_30FE06 0x4000 /* ssp tight loops on 30FE08 to become non-zero */ + #define SSP_WAIT_30FE08 0x8000 /* same for 30FE06 */ + #define SSP_WAIT_MASK 0xf000 + unsigned int emu_status; + unsigned int pad[30]; +} ssp1601_t; + + +void ssp1601_reset(ssp1601_t *ssp); +void ssp1601_run(int cycles); + +#endif diff --git a/genplus-gx/core/cart_hw/svp/svp.c b/genplus-gx/core/cart_hw/svp/svp.c new file mode 100644 index 0000000000..9176319fd5 --- /dev/null +++ b/genplus-gx/core/cart_hw/svp/svp.c @@ -0,0 +1,49 @@ +/* + basic, incomplete SSP160x (SSP1601?) interpreter + with SVP memory controller emu + + (c) Copyright 2008, Grazvydas "notaz" Ignotas + Free for non-commercial use. + + For commercial use, separate licencing terms must be obtained. + + Modified for Genesis Plus GX (Eke-Eke): added BIG ENDIAN support, fixed addr/code inversion +*/ + +#include "shared.h" + +svp_t *svp = NULL; + +void svp_init(void) +{ + svp = (void *) ((char *)cart.rom + 0x200000); + memset(svp, 0, sizeof(*svp)); +} + +void svp_reset(void) +{ + memcpy(svp->iram_rom + 0x800, cart.rom + 0x800, 0x20000 - 0x800); + ssp1601_reset(&svp->ssp1601); +} + +void svp_write_dram(uint32 address, uint32 data) +{ + *(uint16 *)(svp->dram + (address & 0x1fffe)) = data; + if ((address == 0x30fe06) && data) svp->ssp1601.emu_status &= ~SSP_WAIT_30FE06; + if ((address == 0x30fe08) && data) svp->ssp1601.emu_status &= ~SSP_WAIT_30FE08; +} + +uint32 svp_read_cell_1(uint32 address) +{ + address >>= 1; + address = (address & 0x7001) | ((address & 0x3e) << 6) | ((address & 0xfc0) >> 5); + return *(uint16 *)(svp->dram + (address & 0x1fffe)); +} + +uint32 svp_read_cell_2(uint32 address) +{ + address >>= 1; + address = (address & 0x7801) | ((address & 0x1e) << 6) | ((address & 0x7e0) >> 4); + return *(uint16 *)(svp->dram + (address & 0x1fffe)); +} + diff --git a/genplus-gx/core/cart_hw/svp/svp.h b/genplus-gx/core/cart_hw/svp/svp.h new file mode 100644 index 0000000000..e052053465 --- /dev/null +++ b/genplus-gx/core/cart_hw/svp/svp.h @@ -0,0 +1,33 @@ +/* + basic, incomplete SSP160x (SSP1601?) interpreter + with SVP memory controller emu + + (c) Copyright 2008, Grazvydas "notaz" Ignotas + Free for non-commercial use. + + For commercial use, separate licencing terms must be obtained. + + Modified for Genesis Plus GX (Eke-Eke): added BIG ENDIAN support, fixed addr/code inversion +*/ + +#ifndef _SVP_H_ +#define _SVP_H_ + +#include "shared.h" +#include "ssp16.h" + +typedef struct { + unsigned char iram_rom[0x20000]; /* IRAM (0-0x7ff) and program ROM (0x800-0x1ffff) */ + unsigned char dram[0x20000]; + ssp1601_t ssp1601; +} svp_t; + +extern svp_t *svp; + +extern void svp_init(void); +extern void svp_reset(void); +extern void svp_write_dram(uint32 address, uint32 data); +extern uint32 svp_read_cell_1(uint32 address); +extern uint32 svp_read_cell_2(uint32 address); + +#endif diff --git a/genplus-gx/core/cart_hw/svp/svpdoc.txt b/genplus-gx/core/cart_hw/svp/svpdoc.txt new file mode 100644 index 0000000000..001178cd3d --- /dev/null +++ b/genplus-gx/core/cart_hw/svp/svpdoc.txt @@ -0,0 +1,524 @@ +------------------------------------------------------------------------------- + notaz's SVP doc + $Id: svpdoc.txt 349 2008-02-04 23:13:59Z notaz $ + Copyright 2008, Grazvydas Ignotas (notaz) +------------------------------------------------------------------------------- + +If you use this, please credit me in your work or it's documentation. +Tasco Deluxe should also be credited for his pioneering work on the subject. +Thanks. + +Use monospace font and disable word wrap when reading this document. + +------------------------------------------------------------------------------- + Table of Contents +------------------------------------------------------------------------------- + + 0. Introduction + 1. Overview + 2. The SSP160x DSP + 2.1. General registers + 2.2. External registers + 2.3. Pointer registers + 2.4. The instruction set + 3. Memory map + 4. Other notes + + +------------------------------------------------------------------------------- + 0. Introduction +------------------------------------------------------------------------------- + +This document is an attempt to provide technical information needed to +emulate Sega's SVP chip. It is based on reverse engineering Virtua Racing +game and on various internet sources. None of information provided here +was verified on the real hardware, so some things are likely to be +inaccurate. + +The following information sources were used while writing this document +and emulator implementation: + + [1] SVP Reference Guide (annotated) and SVP Register Guide (annotated) + by Tasco Deluxe < tasco.deluxe @ gmail.com > + http://www.sharemation.com/TascoDLX/SVP%20Reference%20Guide%202007.02.11.txt + http://www.sharemation.com/TascoDLX/SVP%20Register%20Guide%202007.02.11.txt + [2] SSP1610 disassembler + written by Pierpaolo Prazzoli, MAME source code. + http://mamedev.org/ + [3] SSP1601 DSP datasheet + http://notaz.gp2x.de/docs/SSP1601.pdf + [4] DSP page (with code samples) in Samsung Semiconductor website from 1997 + retrieved from Internet Archive: The Wayback Machine + http://web.archive.org/web/19970607052826/www.sec.samsung.com/Products/dsp/dspcore.htm + [5] Sega's SVP Chip: The Road not Taken? + Ken Horowitz, Sega-16 + http://sega-16.com/feature_page.php?id=37&title=Sega's%20SVP%20Chip:%20The%20Road%20not%20Taken? + + +------------------------------------------------------------------------------- + 1. Overview +------------------------------------------------------------------------------- + +The only game released with SVP chip was Virtua Racing. There are at least 4 +versions of the game: USA, Jap and 2 different Eur revisions. Three of them +share identical SSP160x code, one of the Eur revisions has some differences. + +From the software developer's point of view, the game cartridge contains +at least: + + * Samsung SSP160x 16-bit DSP core, which includes [3]: + * Two independent high-speed RAM banks, accessed in single clock cycle, + 256 words each. + * 16 x 16 bit multiply unit. + * 32-bit ALU, status register. + * Hardware stack of 6 levels. + * 128KB of DRAM. + * 2KB of IRAM (instruction RAM). + * Memory controller with address mapping capability. + * 2MB of game ROM. + +[5] claims there is also "2 Channels PWM" in the cartridge, but it's either +not used or not there at all. +Various sources claim that SSP160x is SSP1601 which is likely to be true, +because the code doesn't seem to use any SSP1605+ features. + + +------------------------------------------------------------------------------- + 2. The SSP160x DSP +------------------------------------------------------------------------------- + +SSP160x is 16-bit DSP, capable of performing multiplication + addition in +single clock cycle [3]. It has 8 general, 8 external and 8 pointer registers. +There is a status register which has operation control bits and condition +flags. Condition flags are set/cleared during ALU (arithmetic, logic) +operations. It also has 6-level hardware stack and 2 internal RAM banks +RAM0 and RAM1, 256 words each. + +The device is only capable of addressing 16-bit words, so all addresses refer +to words (16bit value in ROM, accessed by 68k through address 0x84 would be +accessed by SSP160x using address 0x42). + +[3] mentions interrupt pins, but interrupts don't seem to be used by SVP code +(actually there are functions which look like interrupt handler routines, but +they don't seem to do anything important). + +2.1. General registers +---------------------- + +There are 8 general registers: -, X, Y, A, ST, STACK, PC and P ([2] [4]). +Size is given in bits. + +2.1.1. "-" + Constant register with all bits set (0xffff). Also used for programming + external registers (blind reads/writes, see 2.2). + size: 16 + +2.1.2. "X" + Generic register. Also acts as a multiplier 1 for P register. + size: 16 + +2.1.3. "Y" + Generic register. Also acts as a multiplier 2 for P register. + size: 16 + +2.1.4. "A" + Accumulator. Stores the result of all ALU (but not multiply) operations, + status register is updated according to this. When directly accessed, + only upper word is read/written. Low word can be accessed by using AL + (see 2.2.8). + size: 32 + +2.1.5. "ST" + STatus register. Bits 0-9 are CONTROL, other are FLAG [2]. Only some of + them are actually used by SVP. + Bits: fedc ba98 7654 3210 + 210 - RPL "Loop size". If non-zero, makes (rX+) and (rX-) respectively + modulo-increment and modulo-decrement (see 2.3). The value + shows which power of 2 to use, i.e. 4 means modulo by 16. + 43 - RB Unknown. Not used by SVP code. + 5 - ST5 Affects behavior of external registers. See 2.2. + 6 - ST6 Affects behavior of external registers. See 2.2. + According to [3] (5,6) bits correspond to hardware pins. + 7 - IE Interrupt enable? Not used by SVP code. + 8 - OP Saturated value? Not used by SVP code. + 9 - MACS MAC shift? Not used by SVP code. + a - GPI_0 Interrupt 0 enable/status? Not used by SVP code. + b - GPI_1 Interrupt 1 enable/status? Not used by SVP code. + c - L L flag. Similar to carry? Not used by SVP code. + d - Z Zero flag. Set after ALU operations, when all 32 accumulator + bits become zero. + e - OV Overflow flag. Not used by SVP code. + f - N Negative flag. Set after ALU operations, when bit31 in + accumulator is 1. + size: 16 + +2.1.6. "STACK" + Hardware stack of 6 levels [3]. Values are "pushed" by directly writing to + it, or by "call" instruction. "Pop" is performed by directly reading the + register or by "ret" instruction. + size: 16 + +2.1.7. "PC" + Program Counter. Can be written directly to perform a jump. It is not clear + if it is possible to read it (SVP code never does). + size: 16 + +2.1.8. "P" + multiply Product - multiplication result register. + Always contains 32-bit multiplication result of X, Y and 2 (P = X * Y * 2). + X and Y are sign-extended before performing the multiplication. + size: 32 + +2.2. External registers +----------------------- + +The external registers, as the name says, are external to SSP160x, they are +hooked to memory controller in SVP, so by accessing them we actually program +the memory controller. They act as programmable memory access registers or +external status registers [1]. Some of them can act as both, depending on how +ST5 ans ST6 bits are set in status register. After a register is programmed, +accessing it causes reads/writes from/to external memory (see section 3 for +the memory map). The access may also cause some additional effects, like +incremental of address, associated with accessed register. +In this document and my emu, instead of using names EXT0-EXT7 +from [4] I used different names for these registers. Those names are from +Tasco Deluxe's [1] doc. + +All these registers can be blind-accessed (as said in [1]) by performing +(ld -, PMx) or (ld PMx, -). This programs them to access memory (except PMC, +where the effect is different). +All registers are 16-bit. + +2.2.1. "PM0" + If ST5 or ST6 is set, acts as Programmable Memory access register + (see 2.2.7). Else it acts as status of XST (2.2.4). It is also mapped + to a15004 on 68k side: + ???????? ??????10 + 0: set, when SSP160x has written something to XST + (cleared when 015004 is read by 68k) + 1: set, when 68k has written something to a15000 or a15002 + (cleared on PM0 read by SSP160x) + Note that this is likely to be incorrect, but such behavior is OK for + emulation to work. + +2.2.2. "PM1" + Programmable Memory access register. Only accessed with ST bits set by + SVP code. + +2.2.3. "PM2" + Same as PM1. + +2.2.4. "XST" + If ST5 or ST6 is set, acts as Programmable Memory access register + (only used by memory test code). Else it acts as eXternal STatus + register, which is also mapped to a15000 and a15002 on 68k side. + Affects PM0 when written to. + +2.2.5. "PM4" + Programmable Memory access register. Not affected by ST5 and ST6 bits, + always stays in PMAR mode. + +2.2.6. "EXT5" + Not used by SVP, so not covered by this document. + +2.2.7. "PMC" + Programmable Memory access Control. It is set using 2 16bit writes, first + address, then mode word. After setting PMAC, PMx should be blind accessed + using (ld -, PMx) or (ld PMx, -) to program it for reading or writing + external memory respectively. Every PMx register can be programmed to + access it's own memory location with it's own mode. Registers are programmed + separately for reading and writing. + + Reading PMC register also shifts it's state (from "waiting for address" to + "waiting for mode" and back). Reads always return address word related to + last PMx register accessed, or last address word written to PMC (whichever + event happened last before PMC read). + + The address word contains bits 0-15 of the memory word-address. + The mode word format is as follows: + dsnnnv?? ???aaaaa + a: bits 16-20 of memory word-address. + n: auto-increment value. If set, after every access of PMx, word-address + value related to it will be incremented by (words): + 1 - 1 5 - 16 + 2 - 2 6 - 32 + 3 - 4 7 - 128 + 4 - 8 + d: make auto-increment negative - decrement by count listed above. + s: special-increment mode. If current address is even (when accessing + programmed PMx), increment it by 1. Else, increment by 32. It is not + clear what happens if d and n bits are also set (never done by SVP). + v: over-write mode when writing, unknown when reading (not used). + Over-write mode splits the word being written into 4 half-bytes and + only writes those half-bytes, which are not zero. + When auto-increment is performed, it affects all 21 address bits. + +2.2.8. "AL" + This register acts more like a general register. + If this register is blind-accessed, it is "dummy programmed", i.e. nothing + happens and PMC is reset to "waiting for address" state. + In all other cases, it is Accumulator Low, 16 least significant bits of + accumulator. Normally reading acc (ld X, A) you get 16 most significant + bits, so this allows you access the low word of 32bit accumulator. + +2.3. Pointer registers +---------------------- + +There are 8 8-bit pointer registers rX, which are internal to SSP160x and are +used to access internal RAM banks RAM0 and RAM1, or program memory indirectly. +r0-r3 (ri) point to RAM0, r4-r7 (rj) point to RAM1. Each bank has 256 words of +RAM, so 8bit registers can fully address them. The registers can be accessed +directly, or 2 indirection levels can be used [ (rX), ((rX)) ]. They work +similar to * and ** operators in C, only they use different types of memory +and ((rX)) also performs post-increment. First indirection level (rX) accesses +a word in RAMx, second accesses program memory at address read from (rX), and +increments value in (rX). + +Only r0,r1,r2,r4,r5,r6 can be directly modified (ldi r0, 5), or by using +modifiers. 3 modifiers can be applied when using first indirection level +(optional): + + : post-increment (ld a, (r0+) ). Increment register value after operation. + Can be made modulo-increment by setting RPL bits in status register + (see 2.1.5). + - : post-decrement. Also can be made modulo-decrement by using RPL bits in ST. + +!: post-increment, unaffected by RPL (probably). +These are only used on 1st indirection level, so things like ( ld a, ((r0+)) ) +and (ld X, r6-) are probably invalid. + +r3 and r7 are special and can not be changed (at least Samsung samples [4] and +SVP code never do). They are fixed to the start of their RAM banks. (They are +probably changeable for ssp1605+, Samsung's old DSP page claims that). +1 of these 4 modifiers must be used on these registers (short form direct +addressing? [2]): + |00: RAMx[0] The very first word in the RAM bank. + |01: RAMx[1] Second word + |10: RAMx[2] ... + |11: RAMx[3] + +2.4. The instruction set +------------------------ + +The Samsung SSP16 series assembler uses right-to-left notation ([2] [4]): +ld X, Y +means value from Y should be copied to X. + +Size of every instruction is word, some have extension words for immediate +values. When writing an interpreter, 7 most significant bits are usually +enough to determine which opcode it is. + +encoding bits are marked as: +rrrr - general or external register, in order specified in 2.1 and 2.2 + (0 is '-', 1 'X', ..., 8 is 'PM0', ..., 0xf is 'AL') +dddd - same as above, as destination operand +ssss - same as above, as source operand +jpp - pointer register index, 0-7 +j - specifies RAM bank, i.e. RAM0 or RAM1 +i* - immediate value bits +a* - offset in internal RAM bank +mm - modifier for pointer register, depending on register: + r0-r2,r4-r6 r3,r7 examples + 0: (none) |00 ld a, (r0) cmp a, (r7|00) + 1: +! |01 ld (r0+!), a ld (r7|01), a + 2: - |10 add a, (r0-) + 3: + |11 +cccc - encodes condition, only 3 used by SVP, see check_cond() below +ooo - operation to perform + +Operation is written in C-style pseudo-code, where: +program_memory[X] - access program memory at address X +RAMj[X] - access internal RAM bank j=0,1 (RAM0 or RAM1), word + offset X +RIJ[X] - pointer register rX, X=0-7 +pr_modif_read(m,X) - read pointer register rX, applying modifier m: + if register is r3 or r7, return value m + else switch on value m: + 0: return rX; + 1: tmp = rX; rX++; return tmp; // rX+! + 2: tmp = rX; modulo_decrement(rX); return tmp; // rX- + 3: tmp = rX; modulo_increment(rX); return tmp; // rX+ + the modulo value used (if used at all) depends on ST + RPL bits (see 2.1.5) +check_cond(c,f) - checks if a flag matches f bit: + switch (c) { + case 0: return true; + case 5: return (Z == f) ? true : false; // check Z flag + case 7: return (N == f) ? true : false; // check N flag + } // other conditions are possible, but they are not used +update_flags() - update ST flags according to last ALU operation. +sign_extend(X) - sign extend 16bit value X to 32bits. +next_op_address() - address of instruction after current instruction. + +2.4.1. ALU instructions + +All of these instructions update flags, which are set according to full 32bit +accumulator. The SVP code only checks N and Z flags, so it is not known when +exactly OV and L flags are set. Operations are performed on full A, so +(andi A, 0) would clear all 32 bits of A. + +They share the same addressing modes. The exact arithmetic operation is +determined by 3 most significant (ooo) bits: + 001 - sub - subtract (OP -=) + 011 - cmp - compare (OP -, flags are updated according to result) + 100 - add - add (OP +=) + 101 - and - binary AND (OP &=) + 110 - or - binary OR (OP |=) + 111 - eor - exclusive OR (OP ^=) + + syntax encoding operation + OP A, s ooo0 0000 0000 rrrr A OP r << 16; + OP A, (ri) ooo0 001j 0000 mmpp A OP RAMj[pr_modif_read(m,jpp)] << 16; + OP A, adr ooo0 011j aaaa aaaa A OP RAMj[a] << 16; + OPi A, imm ooo0 1000 0000 0000 A OP i << 16; + iiii iiii iiii iiii + op A, ((ri)) ooo0 101j 0000 mmpp tmp = pr_modif_read(m,jpp); + A OP program_memory[RAMj[tmp]] << 16; + RAMj[tmp]++; + op A, ri ooo1 001j 0000 00pp A OP RIJ[jpp] << 16; + OPi simm ooo1 1000 iiii iiii A OP i << 16; + +There is also "perform operation on accumulator" instruction: + + syntax encoding operation + mod cond, op 1001 000f cccc 0ooo if (check_cond(c,f)) switch(o) { + case 2: A >>= 1; break; // arithmetic shift + case 3: A <<= 1; break; + case 6: A = -A; break; // negate A + case 7: A = abs(A); break; // absolute val. + } // other operations are possible, but + // they are not used by SVP. + +2.4.2. Load (move) instructions + +These instructions never affect flags (even ld A). +If destination is A, and source is 16bit, only upper word is transfered (same +thing happens on opposite). If dest. is A, and source is P, whole 32bit value +is transfered. It is not clear if P can be destination operand (probably not, +no code ever does this). +Writing to STACK pushes a value there, reading pops. It is not known what +happens on overflow/underflow (never happens in SVP code). +ld -, - is used as a nop. + + syntax encoding operation + ld d, s 0000 0000 dddd ssss d = s; + ld d, (ri) 0000 001j dddd mmpp d = RAMj[pr_modif_read(m,jpp)]; + ld (ri), s 0000 010j ssss mmpp RAMj[pr_modif_read(m,jpp)] = s; + ldi d, imm 0000 1000 dddd 0000 d = i; + iiii iiii iiii iiii + ld d, ((ri)) 0000 101j dddd mmpp tmp = pr_modif_read(m,jpp); + d = program_memory[RAMj[tmp]]; + RAMj[tmp]++; + ldi (ri), imm 0000 110l 0000 mmpp RAMj[pr_modif_read(m,jpp)] = i; + iiii iiii iiii iiii + ld adr, a 0000 111j aaaa aaaa RAMj[a] = A; + ld d, ri 0001 001j dddd 00pp d = RIJ[jpp]; + ld ri, s 0001 010j ssss 00pp RIJ[jpp] = s; + ldi ri, simm 0001 1jpp iiii iiii RIJ[jpp] = i; + ld d, (a) 0100 1010 dddd 0000 d = program_memory[A[31:16]]; + // read a word from program memory. Offset + // is the upper word in A. + +2.4.3. Program control instructions + +Only 3 instructions: call, ret (alias of ld PC, STACK) and branch. Indirect +jumps can be performed by simply writing to PC. + + syntax encoding operation + call cond, addr 0100 100f cccc 0000 if (check_cond(c,f)) { + aaaa aaaa aaaa aaaa STACK = next_op_address(); PC = a; + } + bra cond, addr 0100 110f cccc 0000 if (check_cond(c,f)) PC = a; + aaaa aaaa aaaa aaaa + ret 0000 0000 0110 0101 PC = STACK; // same as ld PC, STACK + +2.4.4. Multiply-accumulate instructions + +Not sure if (ri) and (rj) really get loaded into X and Y, but multiplication +result surely is loaded into P. There is probably optional 3rd operand (1, 0; +encoded by bit16, default 1), but it's not used by SVP code. + + syntax encoding operation + mld (rj), (ri) 1011 0111 nnjj mmii A = 0; update_flags(); + X = RAM0[pr_modif_read(m,0ii)]; + Y = RAM1[pr_modif_read(m,1jj)]; + P = sign_extend(X) * sign_extend(Y) * 2 + mpya (rj), (ri) 1001 0111 nnjj mmii A += P; update_flags(); + X = RAM0[pr_modif_read(m,0ii)]; + Y = RAM1[pr_modif_read(m,1jj)]; + P = sign_extend(X) * sign_extend(Y) * 2 + mpys (rj), (ri) 0011 0111 nnjj mmii A -= P; update_flags(); + X = RAM0[pr_modif_read(m,0ii)]; + Y = RAM1[pr_modif_read(m,1jj)]; + P = sign_extend(X) * sign_extend(Y) * 2 + +------------------------------------------------------------------------------- + 3. Memory map +------------------------------------------------------------------------------- + +The SSp160x can access it's own program memory, and external memory through EXT +registers (see 2.2). Program memory is read-execute-only, the size of this +space is 64K words (this is how much 16bit PC can address): + + byte address word address name + 0- 7ff 0- 3ff IRAM + 800-1ffff 400-ffff ROM + +There were reports that SVP has internal ROM, but fortunately they were wrong. +The location 800-1ffff is mapped from the same location in the 2MB game ROM. +The IRAM is read-only (as SSP160x doesn't have any means of writing to it's +program memory), but it can be changed through external memory space, as it's +also mapped there. + +The external memory space seems to match the one visible by 68k, with some +differences: + + 68k space SVP space word address name + 0-1fffff 0-1fffff 0- fffff game ROM + 300000-31ffff 300000-31ffff 180000-18ffff DRAM + ? 390000-3907ff 1c8000-1c83ff IRAM + 390000-39ffff ? ? "cell arrange" 1 + 3a0000-3affff ? ? "cell arrange" 2 + a15000-a15009 n/a n/a Status/control registers + +The external memory can be read/written by SSP160x (except game ROM, which can +only be read). + +"cell arrange" 1 and 2 are similar to the one used in SegaCD, they map +300000-30ffff location to 390000-39ffff and 3a0000-3affff, where linear image +written to 300000 can be read as VDP patterns at 390000. Virtua Racing doesn't +seem to use this feature, it is only used by memory test code. + +Here is the list of status/control registers (16bit size): + a15000 - w/r command/result register. Visible as XST for SSP160x (2.2.4). + a15002 - mirror of the above. + a15004 - status of command/result register (see 2.2.1). + a15006 - possibly halts the SVP. Before doing DMA from DRAM, 68k code writes + 0xa, and after it's finished, writes 0. This is probably done to + prevent SVP accessing DRAM and avoid bus clashes. + a15008 - possibly causes an interrupt. There is (unused?) code which writes + 0, 1, and again 0 in sequence. + + +------------------------------------------------------------------------------- + 4. Other notes +------------------------------------------------------------------------------- + +The game has arcade-style memory self-check mode, which can be accessed by +pressing _all_ buttons (including directions) on 3-button controller. There was +probably some loopback plug for this. + +SVP seems to have DMA latency issue similar to one in Sega CD, as the code +always sets DMA source address value larger by 2, then intended for copy. +This is even true for DMAs from ROM, as it's probably hooked through SVP's +memory controller. + +The entry point for the code seems to be at address 0x800 (word 0x400) in ROM, +but it is not clear where the address is fetched from when the system powers +up. The memory test code also sets up "ld PC, .." opcodes at 0x7f4, 0x7f8 and +0x7fc, which jump to some routines, possibly interrupt handlers. This means +that mentioned addresses might be built-in interrupt vectors. + +The SVP code doesn't seem to be timing sensitive, so it can be emulated without +knowing timing of the instructions or even how fast the chip is clocked. +Overclocking doesn't have any effect, underclocking causes slowdowns. Running +10-12M instructions/sec (or possibly less) is sufficient. + diff --git a/genplus-gx/core/cd_hw/cd_cart.c b/genplus-gx/core/cd_hw/cd_cart.c new file mode 100644 index 0000000000..954222162b --- /dev/null +++ b/genplus-gx/core/cd_hw/cd_cart.c @@ -0,0 +1,267 @@ +/*************************************************************************************** + * Genesis Plus + * CD compatible ROM/RAM cartridge support + * + * Copyright (C) 2012 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + + +/*--------------------------------------------------------------------------*/ +/* backup RAM cartridge (max. 512KB) */ +/*--------------------------------------------------------------------------*/ +static unsigned int cart_ram_read_byte(unsigned int address) +{ + /* LSB only */ + if (address & 1) + { + return scd.cartridge.area[(address >> 1) & scd.cartridge.mask]; + } + + return 0xff; +} + +static unsigned int cart_ram_read_word(unsigned int address) +{ + return (scd.cartridge.area[(address >> 1) & scd.cartridge.mask] | 0xff00); +} + +static void cart_ram_write_byte(unsigned int address, unsigned int data) +{ + /* LSB only */ + if (address & 1) + { + scd.cartridge.area[(address >> 1) & scd.cartridge.mask] = data; + } +} + +static void cart_ram_write_word(unsigned int address, unsigned int data) +{ + scd.cartridge.area[(address >> 1) & scd.cartridge.mask] = data & 0xff; +} + + +/*--------------------------------------------------------------------------*/ +/* backup RAM cartridge ID */ +/*--------------------------------------------------------------------------*/ + +static unsigned int cart_id_read_byte(unsigned int address) +{ + /* LSB only */ + if (address & 1) + { + return scd.cartridge.id; + } + + return 0xff; +} + +static unsigned int cart_id_read_word(unsigned int address) +{ + return (scd.cartridge.id | 0xff00); +} + + +/*--------------------------------------------------------------------------*/ +/* backup RAM cartridge write protection */ +/*--------------------------------------------------------------------------*/ + +static unsigned int cart_prot_read_byte(unsigned int address) +{ + /* LSB only */ + if (address & 1) + { + return scd.cartridge.prot; + } + + return 0xff; +} + +static unsigned int cart_prot_read_word(unsigned int address) +{ + return (scd.cartridge.prot | 0xff00); +} + +static void cart_prot_write_byte(unsigned int address, unsigned int data) +{ + /* LSB only */ + if (address & 1) + { + int i; + + if (data & 1) + { + /* cartridge is write enabled */ + for (i=0x60; i<0x70; i++) + { + m68k.memory_map[i].write8 = cart_ram_write_byte; + m68k.memory_map[i].write16 = cart_ram_write_word; + zbank_memory_map[i].write = cart_ram_write_byte; + } + } + else + { + /* cartridge is write protected */ + for (i=0x60; i<0x70; i++) + { + m68k.memory_map[i].write8 = m68k_unused_8_w; + m68k.memory_map[i].write16 = m68k_unused_16_w; + zbank_memory_map[i].write = zbank_unused_w; + } + } + + scd.cartridge.prot = data; + } +} + +static void cart_prot_write_word(unsigned int address, unsigned int data) +{ + int i; + + if (data & 1) + { + /* cartridge is write enabled */ + for (i=0x60; i<0x70; i++) + { + m68k.memory_map[i].write8 = cart_ram_write_byte; + m68k.memory_map[i].write16 = cart_ram_write_word; + zbank_memory_map[i].write = cart_ram_write_byte; + } + } + else + { + /* cartridge is write protected */ + for (i=0x60; i<0x70; i++) + { + m68k.memory_map[i].write8 = m68k_unused_8_w; + m68k.memory_map[i].write16 = m68k_unused_16_w; + zbank_memory_map[i].write = zbank_unused_w; + } + } + + scd.cartridge.prot = data & 0xff; +} + +/*--------------------------------------------------------------------------*/ +/* ROM/RAM cartridge initialization */ +/*--------------------------------------------------------------------------*/ +void cd_cart_init(void) +{ + int i; + + /* System boot mode */ + if (scd.cartridge.boot) + { + /* disable backup RAM cartridge when booting from cartridge (Mode 1) */ + scd.cartridge.id = 0; + } + else + { + /* enable 512K backup RAM cartridge when booting from CD (Mode 2) */ + scd.cartridge.id = 6; + } + + /* RAM cartridge enabled ? */ + if (scd.cartridge.id) + { + /* disable cartridge backup memory */ + memset(&sram, 0, sizeof (T_SRAM)); + + /* clear backup RAM */ + memset(scd.cartridge.area, 0x00, sizeof(scd.cartridge.area)); + + /* backup RAM size mask */ + scd.cartridge.mask = (1 << (scd.cartridge.id + 13)) - 1; + + /* enable RAM cartridge write access */ + scd.cartridge.prot = 1; + + /* RAM cartridge ID register (read-only) */ + for (i=0x40; i<0x60; i++) + { + m68k.memory_map[i].base = NULL; + m68k.memory_map[i].read8 = cart_id_read_byte; + m68k.memory_map[i].read16 = cart_id_read_word; + m68k.memory_map[i].write8 = m68k_unused_8_w; + m68k.memory_map[i].write16 = m68k_unused_16_w; + zbank_memory_map[i].read = cart_id_read_byte; + zbank_memory_map[i].write = zbank_unused_w; + } + + /* RAM cartridge memory */ + for (i=0x60; i<0x70; i++) + { + m68k.memory_map[i].base = NULL; + m68k.memory_map[i].read8 = cart_ram_read_byte; + m68k.memory_map[i].read16 = cart_ram_read_word; + m68k.memory_map[i].write8 = cart_ram_write_byte; + m68k.memory_map[i].write16 = cart_ram_write_word; + zbank_memory_map[i].read = cart_ram_read_byte; + zbank_memory_map[i].write = cart_ram_write_byte; + } + + /* RAM cartridge write protection register */ + for (i=0x70; i<0x80; i++) + { + m68k.memory_map[i].base = NULL; + m68k.memory_map[i].read8 = cart_prot_read_byte; + m68k.memory_map[i].read16 = cart_prot_read_word; + m68k.memory_map[i].write8 = cart_prot_write_byte; + m68k.memory_map[i].write16 = cart_prot_write_word; + zbank_memory_map[i].read = cart_prot_read_byte; + zbank_memory_map[i].write = cart_prot_write_byte; + } + } + else + { + /* initialize ROM cartridge */ + md_cart_init(); + + /* when booting from CD, cartridge is mapped to $400000-$7FFFFF */ + if (!scd.cartridge.boot) + { + for (i=0; i<0x40; i++) + { + m68k.memory_map[i+0x40].base = m68k.memory_map[i].base; + m68k.memory_map[i+0x40].read8 = m68k.memory_map[i].read8; + m68k.memory_map[i+0x40].read16 = m68k.memory_map[i].read16; + m68k.memory_map[i+0x40].write8 = m68k.memory_map[i].write8; + m68k.memory_map[i+0x40].write16 = m68k.memory_map[i].write16; + zbank_memory_map[i+0x40].read = zbank_memory_map[i].read; + zbank_memory_map[i+0x40].write = zbank_memory_map[i].write; + } + } + } +} diff --git a/genplus-gx/core/cd_hw/cd_cart.h b/genplus-gx/core/cd_hw/cd_cart.h new file mode 100644 index 0000000000..7fef4bd778 --- /dev/null +++ b/genplus-gx/core/cd_hw/cd_cart.h @@ -0,0 +1,51 @@ +/*************************************************************************************** + * Genesis Plus + * CD compatible ROM/RAM cartridge support + * + * Copyright (C) 2012 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + + + /* CD compatible ROM/RAM cartridge */ +typedef struct +{ + uint8 area[0x810000]; /* cartridge ROM/RAM area (max. 8MB + 64KB backup) */ + uint8 boot; /* cartridge boot mode (0x00: boot from CD with ROM/RAM cartridge enabled, 0x40: boot from ROM cartridge with CD enabled) */ + uint8 id; /* RAM cartridge ID (related to RAM size, 0 if disabled) */ + uint8 prot; /* RAM cartridge write protection */ + uint32 mask; /* RAM cartridge size mask */ +} cd_cart_t; + +/* Function prototypes */ +extern void cd_cart_init(void); diff --git a/genplus-gx/core/cd_hw/cdc.c b/genplus-gx/core/cd_hw/cdc.c new file mode 100644 index 0000000000..25a15c3efd --- /dev/null +++ b/genplus-gx/core/cd_hw/cdc.c @@ -0,0 +1,705 @@ +/*************************************************************************************** + * Genesis Plus + * CD data controller (LC89510 compatible) + * + * Copyright (C) 2012 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + +/* IFSTAT register bitmasks */ +#define BIT_DTEI 0x40 +#define BIT_DECI 0x20 +#define BIT_DTBSY 0x08 +#define BIT_DTEN 0x02 + +/* IFCTRL register bitmasks */ +#define BIT_DTEIEN 0x40 +#define BIT_DECIEN 0x20 +#define BIT_DOUTEN 0x02 + +/* CTRL0 register bitmasks */ +#define BIT_DECEN 0x80 +#define BIT_E01RQ 0x20 +#define BIT_AUTORQ 0x10 +#define BIT_WRRQ 0x04 + +/* CTRL1 register bitmasks */ +#define BIT_MODRQ 0x08 +#define BIT_FORMRQ 0x04 +#define BIT_SHDREN 0x01 + +/* CTRL2 register bitmask */ +#define BIT_VALST 0x80 + +/* TODO: figure exact DMA transfer rate */ +#define DMA_BYTES_PER_LINE 512 + +void cdc_init(void) +{ + memset(&cdc, 0, sizeof(cdc_t)); +} + +void cdc_reset(void) +{ + /* reset CDC register index */ + scd.regs[0x04>>1].byte.l = 0x00; + + /* reset CDC registers */ + cdc.ifstat = 0xff; + cdc.ifctrl = 0x00; + cdc.ctrl[0] = 0x00; + cdc.ctrl[1] = 0x00; + cdc.stat[0] = 0x00; + cdc.stat[1] = 0x00; + cdc.stat[2] = 0x00; + cdc.stat[3] = 0x80; + cdc.head[0][0] = 0x00; + cdc.head[0][1] = 0x00; + cdc.head[0][2] = 0x00; + cdc.head[0][3] = 0x01; + cdc.head[1][0] = 0x00; + cdc.head[1][1] = 0x00; + cdc.head[1][2] = 0x00; + cdc.head[1][3] = 0x00; + + /* reset CDC cycle counter */ + cdc.cycles = 0; + + /* DMA transfer disabled */ + cdc.dma_w = 0; + + /* clear any pending IRQ */ + if (scd.pending & (1 << 5)) + { + /* clear any pending interrupt level 5 */ + scd.pending &= ~(1 << 5); + + /* update IRQ level */ + s68k_update_irq((scd.pending & scd.regs[0x32>>1].byte.l) >> 1); + } +} + +int cdc_context_save(uint8 *state) +{ + uint8 tmp8; + int bufferptr = 0; + + if (cdc.dma_w == pcm_ram_dma_w) + { + tmp8 = 1; + } + else if (cdc.dma_w == prg_ram_dma_w) + { + tmp8 = 2; + } + else if (cdc.dma_w == word_ram_0_dma_w) + { + tmp8 = 3; + } + else if (cdc.dma_w == word_ram_1_dma_w) + { + tmp8 = 4; + } + else if (cdc.dma_w == word_ram_2M_dma_w) + { + tmp8 = 5; + } + else + { + tmp8 = 0; + } + + save_param(&cdc, sizeof(cdc)); + save_param(&tmp8, 1); + + return bufferptr; +} + +int cdc_context_load(uint8 *state) +{ + uint8 tmp8; + int bufferptr = 0; + + load_param(&cdc, sizeof(cdc)); + load_param(&tmp8, 1); + + switch (tmp8) + { + case 1: + cdc.dma_w = pcm_ram_dma_w; + break; + case 2: + cdc.dma_w = prg_ram_dma_w; + break; + case 3: + cdc.dma_w = word_ram_0_dma_w; + break; + case 4: + cdc.dma_w = word_ram_1_dma_w; + break; + case 5: + cdc.dma_w = word_ram_2M_dma_w; + break; + default: + cdc.dma_w = 0; + break; + } + + return bufferptr; +} + +void cdc_dma_update(void) +{ + /* maximal transfer length */ + int length = DMA_BYTES_PER_LINE; + + /* end of DMA transfer ? */ + if (cdc.dbc.w < DMA_BYTES_PER_LINE) + { + /* transfer remaining words using 16-bit DMA */ + cdc.dma_w((cdc.dbc.w + 1) >> 1); + + /* reset data byte counter (DBCH bits 4-7 should be set to 1) */ + cdc.dbc.w = 0xf000; + + /* clear !DTEN and !DTBSY */ + cdc.ifstat |= (BIT_DTBSY | BIT_DTEN); + + /* pending Data Transfer End interrupt */ + cdc.ifstat &= ~BIT_DTEI; + + /* Data Transfer End interrupt enabled ? */ + if (cdc.ifctrl & BIT_DTEIEN) + { + /* pending level 5 interrupt */ + scd.pending |= (1 << 5); + + /* level 5 interrupt enabled ? */ + if (scd.regs[0x32>>1].byte.l & 0x20) + { + /* update IRQ level */ + s68k_update_irq((scd.pending & scd.regs[0x32>>1].byte.l) >> 1); + } + } + + /* clear DSR bit & set EDT bit (CD register $04) */ + scd.regs[0x04>>1].byte.h = (scd.regs[0x04>>1].byte.h & 0x07) | 0x80; + + /* SUB-CPU idle on register $04 polling ? */ + if (s68k.stopped & (1<<0x04)) + { + /* sync SUB-CPU with CDC */ + s68k.cycles = scd.cycles; + + /* restart SUB-CPU */ + s68k.stopped = 0; +#ifdef LOG_SCD + error("s68k started from %d cycles\n", s68k.cycles); +#endif + } + + /* disable DMA transfer */ + cdc.dma_w = 0; + } + else + { + /* transfer all words using 16-bit DMA */ + cdc.dma_w(DMA_BYTES_PER_LINE >> 1); + + /* decrement data byte counter */ + cdc.dbc.w -= length; + } +} + +int cdc_decoder_update(uint32 header) +{ + /* data decoding enabled ? */ + if (cdc.ctrl[0] & BIT_DECEN) + { + /* update HEAD registers */ + *(uint32 *)(cdc.head[0]) = header; + + /* set !VALST */ + cdc.stat[3] = 0x00; + + /* pending decoder interrupt */ + cdc.ifstat &= ~BIT_DECI; + + /* decoder interrupt enabled ? */ + if (cdc.ifctrl & BIT_DECIEN) + { + /* pending level 5 interrupt */ + scd.pending |= (1 << 5); + + /* level 5 interrupt enabled ? */ + if (scd.regs[0x32>>1].byte.l & 0x20) + { + /* update IRQ level */ + s68k_update_irq((scd.pending & scd.regs[0x32>>1].byte.l) >> 1); + } + } + + /* buffer RAM write enabled ? */ + if (cdc.ctrl[0] & BIT_WRRQ) + { + uint16 offset; + + /* increment block pointer */ + cdc.pt.w += 2352; + + /* increment write address */ + cdc.wa.w += 2352; + + /* CDC buffer address */ + offset = cdc.pt.w & 0x3fff; + + /* write CDD block header (4 bytes) */ + *(uint32 *)(cdc.ram + offset) = header; + + /* write CDD block data (2048 bytes) */ + cdd_read_data(cdc.ram + 4 + offset); + + /* take care of buffer overrun */ + if (offset > (0x4000 - 2048 - 4)) + { + /* data should be written at the start of buffer */ + memcpy(cdc.ram, cdc.ram + 0x4000, offset + 2048 + 4 - 0x4000); + } + + /* read next data block */ + return 1; + } + } + + /* keep decoding same data block if Buffer Write is disabled */ + return 0; +} + +void cdc_reg_w(unsigned char data) +{ +#ifdef LOG_CDC + error("CDC register %X write 0x%04x (%X)\n", scd.regs[0x04>>1].byte.l & 0x0F, data, s68k.pc); +#endif + switch (scd.regs[0x04>>1].byte.l & 0x0F) + { + case 0x01: /* IFCTRL */ + { + /* pending interrupts ? */ + if (((data & BIT_DTEIEN) && !(cdc.ifstat & BIT_DTEI)) || + ((data & BIT_DECIEN) && !(cdc.ifstat & BIT_DECI))) + { + /* pending level 5 interrupt */ + scd.pending |= (1 << 5); + + /* level 5 interrupt enabled ? */ + if (scd.regs[0x32>>1].byte.l & 0x20) + { + /* update IRQ level */ + s68k_update_irq((scd.pending & scd.regs[0x32>>1].byte.l) >> 1); + } + } + else if (scd.pending & (1 << 5)) + { + /* clear pending level 5 interrupts */ + scd.pending &= ~(1 << 5); + + /* update IRQ level */ + s68k_update_irq((scd.pending & scd.regs[0x32>>1].byte.l) >> 1); + } + + /* abort any data transfer if data output is disabled */ + if (!(data & BIT_DOUTEN)) + { + /* clear !DTBSY and !DTEN */ + cdc.ifstat |= (BIT_DTBSY | BIT_DTEN); + } + + cdc.ifctrl = data; + scd.regs[0x04>>1].byte.l = 0x02; + break; + } + + case 0x02: /* DBCL */ + cdc.dbc.byte.l = data; + scd.regs[0x04>>1].byte.l = 0x03; + break; + + case 0x03: /* DBCH */ + cdc.dbc.byte.h = data; + scd.regs[0x04>>1].byte.l = 0x04; + break; + + case 0x04: /* DACL */ + cdc.dac.byte.l = data; + scd.regs[0x04>>1].byte.l = 0x05; + break; + + case 0x05: /* DACH */ + cdc.dac.byte.h = data; + scd.regs[0x04>>1].byte.l = 0x06; + break; + + case 0x06: /* DTRG */ + { + /* start data transfer if data output is enabled */ + if (cdc.ifctrl & BIT_DOUTEN) + { + /* set !DTBSY */ + cdc.ifstat &= ~BIT_DTBSY; + + /* clear DBCH bits 4-7 */ + cdc.dbc.byte.h &= 0x0f; + + /* clear EDT & DSR bits (SCD register $04) */ + scd.regs[0x04>>1].byte.h &= 0x07; + + /* setup data transfer destination */ + switch (scd.regs[0x04>>1].byte.h & 0x07) + { + case 2: /* MAIN-CPU host read */ + case 3: /* SUB-CPU host read */ + { + /* set !DTEN */ + cdc.ifstat &= ~BIT_DTEN; + + /* set DSR bit (register $04) */ + scd.regs[0x04>>1].byte.h |= 0x40; + break; + } + + case 4: /* PCM RAM DMA */ + { + cdc.dma_w = pcm_ram_dma_w; + break; + } + + case 5: /* PRG-RAM DMA */ + { + cdc.dma_w = prg_ram_dma_w; + break; + } + + case 7: /* WORD-RAM DMA */ + { + /* check memory mode */ + if (scd.regs[0x02 >> 1].byte.l & 0x04) + { + /* 1M mode */ + if (scd.regs[0x02 >> 1].byte.l & 0x01) + { + /* Word-RAM bank 0 is assigned to SUB-CPU */ + cdc.dma_w = word_ram_0_dma_w; + } + else + { + /* Word-RAM bank 1 is assigned to SUB-CPU */ + cdc.dma_w = word_ram_1_dma_w; + } + } + else + { + /* 2M mode */ + if (scd.regs[0x02 >> 1].byte.l & 0x02) + { + /* only process DMA if Word-RAM is assigned to SUB-CPU */ + cdc.dma_w = word_ram_2M_dma_w; + } + } + break; + } + + default: /* invalid */ + { + #ifdef LOG_CDC + error("invalid CDC tranfer destination (%d)\n", scd.regs[0x04>>1].byte.h & 0x07); + #endif + break; + } + } + } + + scd.regs[0x04>>1].byte.l = 0x07; + break; + } + + case 0x07: /* DTACK */ + { + /* clear pending data transfer end interrupt */ + cdc.ifstat |= BIT_DTEI; + + /* clear DBCH bits 4-7 */ + cdc.dbc.byte.h &= 0x0f; + +#if 0 + /* no pending decoder interrupt ? */ + if ((cdc.ifstat | BIT_DECI) || !(cdc.ifctrl & BIT_DECIEN)) + { + /* clear pending level 5 interrupt */ + scd.pending &= ~(1 << 5); + + /* update IRQ level */ + s68k_update_irq((scd.pending & scd.regs[0x32>>1].byte.l) >> 1); + } +#endif + scd.regs[0x04>>1].byte.l = 0x08; + break; + } + + case 0x08: /* WAL */ + cdc.wa.byte.l = data; + scd.regs[0x04>>1].byte.l = 0x09; + break; + + case 0x09: /* WAH */ + cdc.wa.byte.h = data; + scd.regs[0x04>>1].byte.l = 0x0a; + break; + + case 0x0a: /* CTRL0 */ + { + /* set CRCOK bit only if decoding is enabled */ + cdc.stat[0] = data & BIT_DECEN; + + /* update decoding mode */ + if (data & BIT_AUTORQ) + { + /* set MODE bit according to CTRL1 register & clear FORM bit */ + cdc.stat[2] = cdc.ctrl[1] & BIT_MODRQ; + } + else + { + /* set MODE & FORM bits according to CTRL1 register */ + cdc.stat[2] = cdc.ctrl[1] & (BIT_MODRQ | BIT_FORMRQ); + } + + cdc.ctrl[0] = data; + scd.regs[0x04>>1].byte.l = 0x0b; + break; + } + + case 0x0b: /* CTRL1 */ + { + /* update decoding mode */ + if (cdc.ctrl[0] & BIT_AUTORQ) + { + /* set MODE bit according to CTRL1 register & clear FORM bit */ + cdc.stat[2] = data & BIT_MODRQ; + } + else + { + /* set MODE & FORM bits according to CTRL1 register */ + cdc.stat[2] = data & (BIT_MODRQ | BIT_FORMRQ); + } + + cdc.ctrl[1] = data; + scd.regs[0x04>>1].byte.l = 0x0c; + break; + } + + case 0x0c: /* PTL */ + cdc.pt.byte.l = data; + scd.regs[0x04>>1].byte.l = 0x0d; + break; + + case 0x0d: /* PTH */ + cdc.pt.byte.h = data; + scd.regs[0x04>>1].byte.l = 0x0e; + break; + + case 0x0e: /* CTRL2 (unused) */ + scd.regs[0x04>>1].byte.l = 0x0f; + break; + + case 0x0f: /* RESET */ + cdc_reset(); + break; + + default: /* by default, SBOUT is not used */ + break; + } +} + +unsigned char cdc_reg_r(void) +{ + switch (scd.regs[0x04>>1].byte.l & 0x0F) + { + case 0x01: /* IFSTAT */ + scd.regs[0x04>>1].byte.l = 0x02; + return cdc.ifstat; + + case 0x02: /* DBCL */ + scd.regs[0x04>>1].byte.l = 0x03; + return cdc.dbc.byte.l; + + case 0x03: /* DBCH */ + scd.regs[0x04>>1].byte.l = 0x04; + return cdc.dbc.byte.h; + + case 0x04: /* HEAD0 */ + scd.regs[0x04>>1].byte.l = 0x05; + return cdc.head[cdc.ctrl[1] & BIT_SHDREN][0]; + + case 0x05: /* HEAD1 */ + scd.regs[0x04>>1].byte.l = 0x06; + return cdc.head[cdc.ctrl[1] & BIT_SHDREN][1]; + + case 0x06: /* HEAD2 */ + scd.regs[0x04>>1].byte.l = 0x07; + return cdc.head[cdc.ctrl[1] & BIT_SHDREN][2]; + + case 0x07: /* HEAD3 */ + scd.regs[0x04>>1].byte.l = 0x08; + return cdc.head[cdc.ctrl[1] & BIT_SHDREN][3]; + + case 0x08: /* PTL */ + scd.regs[0x04>>1].byte.l = 0x09; + return cdc.pt.byte.l; + + case 0x09: /* PTH */ + scd.regs[0x04>>1].byte.l = 0x0a; + return cdc.pt.byte.h; + + case 0x0a: /* WAL */ + scd.regs[0x04>>1].byte.l = 0x0b; + return cdc.wa.byte.l; + + case 0x0b: /* WAH */ + scd.regs[0x04>>1].byte.l = 0x0c; + return cdc.wa.byte.h; + + case 0x0c: /* STAT0 */ + scd.regs[0x04>>1].byte.l = 0x0d; + return cdc.stat[0]; + + case 0x0d: /* STAT1 (always return 0) */ + scd.regs[0x04>>1].byte.l = 0x0e; + return 0x00; + + case 0x0e: /* STAT2 */ + scd.regs[0x04>>1].byte.l = 0x0f; + return cdc.stat[2]; + + case 0x0f: /* STAT3 */ + { + uint8 data = cdc.stat[3]; + + /* clear !VALST (note: this is not 100% correct but BIOS do not seem to care) */ + cdc.stat[3] = BIT_VALST; + + /* clear pending decoder interrupt */ + cdc.ifstat |= BIT_DECI; + +#if 0 + /* no pending data transfer end interrupt */ + if ((cdc.ifstat | BIT_DTEI) || !(cdc.ifctrl & BIT_DTEIEN)) + { + /* clear pending level 5 interrupt */ + scd.pending &= ~(1 << 5); + + /* update IRQ level */ + s68k_update_irq((scd.pending & scd.regs[0x32>>1].byte.l) >> 1); + } +#endif + + scd.regs[0x04>>1].byte.l = 0x00; + return data; + } + + default: /* by default, COMIN is always empty */ + return 0xff; + } +} + +unsigned short cdc_host_r(void) +{ + /* check if data is available */ + if (!(cdc.ifstat & BIT_DTEN)) + { + /* read data word from CDC RAM buffer */ + uint16 data = *(uint16 *)(cdc.ram + (cdc.dac.w & 0x3ffe)); + +#ifdef LSB_FIRST + /* source data is stored in big endian format */ + data = ((data >> 8) | (data << 8)) & 0xffff; +#endif + +#ifdef LOG_CDC + error("CDC host read 0x%04x -> 0x%04x (dbc=0x%x) (%X)\n", cdc.dac.w, data, cdc.dbc.w, s68k.pc); +#endif + + /* increment data address counter */ + cdc.dac.w += 2; + + /* decrement data byte counter */ + cdc.dbc.w -= 2; + + /* end of transfer ? */ + if ((int16)cdc.dbc.w <= 0) + { + /* reset data byte counter (DBCH bits 4-7 should be set to 1) */ + cdc.dbc.w = 0xf000; + + /* clear !DTEN and !DTBSY */ + cdc.ifstat |= (BIT_DTBSY | BIT_DTEN); + + /* pending Data Transfer End interrupt */ + cdc.ifstat &= ~BIT_DTEI; + + /* Data Transfer End interrupt enabled ? */ + if (cdc.ifctrl & BIT_DTEIEN) + { + /* pending level 5 interrupt */ + scd.pending |= (1 << 5); + + /* level 5 interrupt enabled ? */ + if (scd.regs[0x32>>1].byte.l & 0x20) + { + /* update IRQ level */ + s68k_update_irq((scd.pending & scd.regs[0x32>>1].byte.l) >> 1); + } + } + + /* clear DSR bit & set EDT bit (SCD register $04) */ + scd.regs[0x04>>1].byte.h = (scd.regs[0x04>>1].byte.h & 0x07) | 0x80; + } + + return data; + } + +#ifdef LOG_CDC + error("error reading CDC host (data transfer disabled)\n"); +#endif + return 0xffff; +} diff --git a/genplus-gx/core/cd_hw/cdc.h b/genplus-gx/core/cd_hw/cdc.h new file mode 100644 index 0000000000..01267f9283 --- /dev/null +++ b/genplus-gx/core/cd_hw/cdc.h @@ -0,0 +1,71 @@ +/*************************************************************************************** + * Genesis Plus + * CD data controller (LC89510 compatible) + * + * Copyright (C) 2012 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ +#ifndef _HW_CDC_ +#define _HW_CDC_ + +#define cdc scd.cdc_hw + +/* CDC hardware */ +typedef struct +{ + uint8 ifstat; + uint8 ifctrl; + reg16_t dbc; + reg16_t dac; + reg16_t pt; + reg16_t wa; + uint8 ctrl[2]; + uint8 head[2][4]; + uint8 stat[4]; + int cycles; + void (*dma_w)(unsigned int words); /* DMA transfer callback */ + uint8 ram[0x4000 + 2352]; /* 16K external RAM (with one block overhead to handle buffer overrun) */ +} cdc_t; + +/* Function prototypes */ +extern void cdc_init(void); +extern void cdc_reset(void); +extern int cdc_context_save(uint8 *state); +extern int cdc_context_load(uint8 *state); +extern void cdc_dma_update(void); +extern int cdc_decoder_update(uint32 header); +extern void cdc_reg_w(unsigned char data); +extern unsigned char cdc_reg_r(void); +extern unsigned short cdc_host_r(void); + +#endif diff --git a/genplus-gx/core/cd_hw/cdd.c b/genplus-gx/core/cd_hw/cdd.c new file mode 100644 index 0000000000..1f2933bb8d --- /dev/null +++ b/genplus-gx/core/cd_hw/cdd.c @@ -0,0 +1,1740 @@ +/*************************************************************************************** + * Genesis Plus + * CD drive processor & CD-DA fader + * + * Copyright (C) 2012-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ +#include "shared.h" + +#ifdef USE_LIBTREMOR +#define SUPPORTED_EXT 20 +#else +#define SUPPORTED_EXT 10 +#endif + +/* BCD conversion lookup tables */ +static const uint8 lut_BCD_8[100] = +{ + 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, + 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, + 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, + 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, + 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, + 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, + 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, + 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, + 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, + 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, +}; + +static const uint16 lut_BCD_16[100] = +{ + 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, 0x0008, 0x0009, + 0x0100, 0x0101, 0x0102, 0x0103, 0x0104, 0x0105, 0x0106, 0x0107, 0x0108, 0x0109, + 0x0200, 0x0201, 0x0202, 0x0203, 0x0204, 0x0205, 0x0206, 0x0207, 0x0208, 0x0209, + 0x0300, 0x0301, 0x0302, 0x0303, 0x0304, 0x0305, 0x0306, 0x0307, 0x0308, 0x0309, + 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0406, 0x0407, 0x0408, 0x0409, + 0x0500, 0x0501, 0x0502, 0x0503, 0x0504, 0x0505, 0x0506, 0x0507, 0x0508, 0x0509, + 0x0600, 0x0601, 0x0602, 0x0603, 0x0604, 0x0605, 0x0606, 0x0607, 0x0608, 0x0609, + 0x0700, 0x0701, 0x0702, 0x0703, 0x0704, 0x0705, 0x0706, 0x0707, 0x0708, 0x0709, + 0x0800, 0x0801, 0x0802, 0x0803, 0x0804, 0x0805, 0x0806, 0x0807, 0x0808, 0x0809, + 0x0900, 0x0901, 0x0902, 0x0903, 0x0904, 0x0905, 0x0906, 0x0907, 0x0908, 0x0909, +}; + +/* pre-build TOC */ +static const uint16 toc_snatcher[21] = +{ + 56014, 495, 10120, 20555, 1580, 5417, 12502, 16090, 6553, 9681, + 8148, 20228, 8622, 6142, 5858, 1287, 7424, 3535, 31697, 2485, + 31380 +}; + +static const uint16 toc_lunar[52] = +{ + 5422, 1057, 7932, 5401, 6380, 6592, 5862, 5937, 5478, 5870, + 6673, 6613, 6429, 4996, 4977, 5657, 3720, 5892, 3140, 3263, + 6351, 5187, 3249, 1464, 1596, 1750, 1751, 6599, 4578, 5205, + 1550, 1827, 2328, 1346, 1569, 1613, 7199, 4928, 1656, 2549, + 1875, 3901, 1850, 2399, 2028, 1724, 4889, 14551, 1184, 2132, + 685, 3167 +}; + +static const uint32 toc_shadow[15] = +{ + 10226, 70054, 11100, 12532, 12444, 11923, 10059, 10167, 10138, 13792, + 11637, 2547, 2521, 3856, 900 +}; + +static const uint32 toc_dungeon[13] = +{ + 2250, 22950, 16350, 24900, 13875, 19950, 13800, 15375, 17400, 17100, + 3325, 6825, 25275 +}; + +static const uint32 toc_ffight[26] = +{ + 11994, 9742, 10136, 9685, 9553, 14588, 9430, 8721, 9975, 9764, + 9704, 12796, 585, 754, 951, 624, 9047, 1068, 817, 9191, 1024, + 14562, 10320, 8627, 3795, 3047 +}; + +static const uint32 toc_ffightj[29] = +{ + 11994, 9752, 10119, 9690, 9567, 14575, 9431, 8731, 9965, 9763, + 9716, 12791, 579, 751, 958, 630, 9050, 1052, 825, 9193, 1026, + 14553, 9834, 10542, 1699, 1792, 1781, 3783, 3052 +}; + +/* supported WAVE file header (16-bit stereo samples @44.1kHz) */ +static const unsigned char waveHeader[32] = +{ + 0x57,0x41,0x56,0x45,0x66,0x6d,0x74,0x20,0x10,0x00,0x00,0x00,0x01,0x00,0x02,0x00, + 0x44,0xac,0x00,0x00,0x10,0xb1,0x02,0x00,0x04,0x00,0x10,0x00,0x64,0x61,0x74,0x61 +}; + +/* supported WAVE file extensions */ +static const char extensions[SUPPORTED_EXT][16] = +{ +#ifdef USE_LIBTREMOR + "%02d.ogg", + " %02d.ogg", + "-%02d.ogg", + "_%02d.ogg", + " - %02d.ogg", + "%d.ogg", + " %d.ogg", + "-%d.ogg", + "_%d.ogg", + " - %d.ogg", +#endif + "%02d.wav", + " %02d.wav", + "-%02d.wav", + "_%02d.wav", + " - %02d.wav", + "%d.wav", + " %d.wav", + "-%d.wav", + "_%d.wav", + " - %d.wav" +}; + +static blip_t* blip[2]; + + +#ifdef USE_LIBTREMOR +#ifdef DISABLE_MANY_OGG_OPEN_FILES +static void ogg_free(int i) +{ + /* clear OGG file descriptor to prevent file from being closed */ + cdd.toc.tracks[i].vf.datasource = NULL; + + /* close VORBIS file structure */ + ov_clear(&cdd.toc.tracks[i].vf); + + /* indicates that the track is a seekable VORBIS file */ + cdd.toc.tracks[i].vf.seekable = 1; + + /* reset file reading position */ + fseek(cdd.toc.tracks[i].fd, 0, SEEK_SET); +} +#endif +#endif + +void cdd_init(blip_t* left, blip_t* right) +{ + /* CD-DA is running by default at 44100 Hz */ + /* Audio stream is resampled to desired rate using Blip Buffer */ + blip[0] = left; + blip[1] = right; + blip_set_rates(left, 44100, snd.sample_rate); + blip_set_rates(right, 44100, snd.sample_rate); +} + +void cdd_reset(void) +{ + /* reset cycle counter */ + cdd.cycles = 0; + + /* reset drive access latency */ + cdd.latency = 0; + + /* reset track index */ + cdd.index = 0; + + /* reset logical block address */ + cdd.lba = 0; + + /* reset status */ + cdd.status = cdd.loaded ? CD_STOP : NO_DISC; + + /* reset CD-DA fader (full volume) */ + cdd.volume = 0x400; + + /* clear CD-DA output */ + cdd.audio[0] = cdd.audio[1] = 0; +} + +int cdd_context_save(uint8 *state) +{ + int bufferptr = 0; + + save_param(&cdd.cycles, sizeof(cdd.cycles)); + save_param(&cdd.latency, sizeof(cdd.latency)); + save_param(&cdd.index, sizeof(cdd.index)); + save_param(&cdd.lba, sizeof(cdd.lba)); + save_param(&cdd.scanOffset, sizeof(cdd.scanOffset)); + save_param(&cdd.volume, sizeof(cdd.volume)); + save_param(&cdd.status, sizeof(cdd.status)); + + return bufferptr; +} + +int cdd_context_load(uint8 *state) +{ + int lba; + int bufferptr = 0; + +#ifdef USE_LIBTREMOR +#ifdef DISABLE_MANY_OGG_OPEN_FILES + /* close previous track VORBIS file structure to save memory */ + if (cdd.toc.tracks[cdd.index].vf.datasource) + { + ogg_free(cdd.index); + } +#endif +#endif + + load_param(&cdd.cycles, sizeof(cdd.cycles)); + load_param(&cdd.latency, sizeof(cdd.latency)); + load_param(&cdd.index, sizeof(cdd.index)); + load_param(&cdd.lba, sizeof(cdd.lba)); + load_param(&cdd.scanOffset, sizeof(cdd.scanOffset)); + load_param(&cdd.volume, sizeof(cdd.volume)); + load_param(&cdd.status, sizeof(cdd.status)); + + /* adjust current LBA within track limit */ + lba = cdd.lba; + if (lba < cdd.toc.tracks[cdd.index].start) + { + lba = cdd.toc.tracks[cdd.index].start; + } + + /* seek to current track position */ + if (!cdd.index) + { + /* DATA track */ + if (cdd.toc.tracks[0].fd) + { + fseek(cdd.toc.tracks[0].fd, lba * cdd.sectorSize, SEEK_SET); + } + } +#ifdef USE_LIBTREMOR + else if (cdd.toc.tracks[cdd.index].vf.seekable) + { +#ifdef DISABLE_MANY_OGG_OPEN_FILES + /* VORBIS file need to be opened first */ + ov_open(cdd.toc.tracks[cdd.index].fd,&cdd.toc.tracks[cdd.index].vf,0,0); +#endif + /* VORBIS AUDIO track */ + ov_pcm_seek(&cdd.toc.tracks[cdd.index].vf, (lba - cdd.toc.tracks[cdd.index].start) * 588 - cdd.toc.tracks[cdd.index].offset); + } +#endif + else if (cdd.toc.tracks[cdd.index].fd) + { + /* PCM AUDIO track */ + fseek(cdd.toc.tracks[cdd.index].fd, (lba * 2352) - cdd.toc.tracks[cdd.index].offset, SEEK_SET); + } + + return bufferptr; +} + +int cdd_load(char *filename, char *header) +{ + char fname[256]; + char line[128]; + char *ptr = 0; + char *lptr = 0; + FILE *fd; + + /* first unmount any loaded disc */ + cdd_unload(); + + /* open file */ + fd = fopen(filename, "rb"); + + /* save a copy of base filename */ + strncpy(fname, filename, 256); + + /* autodetect .cue file */ + if (!memcmp(".cue", &filename[strlen(filename) - 4], 4) || !memcmp(".CUE", &filename[strlen(filename) - 4], 4)) + { + if (fd) + { + /* find first FILE command */ + while (!lptr) + { + if (fgets(line, 128, fd) == NULL) + { + break; + } + lptr = strstr(line, "FILE"); + } + + /* get BINARY file name */ + if (lptr && strstr(line, " BINARY")) + { + /* skip "FILE" attribute */ + lptr += 4; + + /* skip DOUBLE QUOTE or SPACE characters */ + while ((*lptr == 0x20) || (*lptr == '\"')) lptr++; + + /* set pointer at the end of filepath */ + ptr = fname + strlen(fname) - 1; + while ((ptr - fname) && (*ptr != '/') && (*ptr != '\\')) ptr--; + if (ptr - fname) ptr++; + + /* append filename characters after filepath */ + while ((*lptr != '\"') && memcmp(lptr, " BINARY", 7) && (ptr < (fname + 255))) + { + *ptr++ = *lptr++; + } + *ptr = 0; + + /* open file & initialize DATA track file descriptor */ + cdd.toc.tracks[0].fd = fopen(fname, "rb"); + } + else + { + /* close .cue file */ + fclose(fd); + + /* invalid .cue file */ + return -1; + } + } + } + else + { + /* initialize DATA track file descriptor */ + cdd.toc.tracks[0].fd = fd; + + /* automatically try to open associated .cue file */ + strncpy(&fname[strlen(fname) - 4], ".cue", 4); + fd = fopen(fname, "rb"); + } + + if (!cdd.toc.tracks[0].fd) + { + /* close any opened .cue file */ + if (fd) fclose(fd); + + /* error opening file */ + return -1; + } + + /* read first 16 bytes */ + fread(header, 0x10, 1, cdd.toc.tracks[0].fd); + + /* look for valid CD image ID string */ + if (memcmp("SEGADISCSYSTEM", header, 14)) + { + /* if not found, read next 16 bytes */ + fread(header, 0x10, 1, cdd.toc.tracks[0].fd); + + /* look again for valid CD image ID string */ + if (memcmp("SEGADISCSYSTEM", header, 14)) + { + /* close any opened .cue file */ + if (fd) fclose(fd); + + /* close binary file */ + fclose(cdd.toc.tracks[0].fd); + cdd.toc.tracks[0].fd = 0; + + /* not a CD image file */ + return 0; + } + + /* BIN format (2352 bytes data blocks) */ + cdd.sectorSize = 2352; + } + else + { + /* ISO format (2048 bytes data blocks) */ + cdd.sectorSize = 2048; + } + + /* read CD image header + security code */ + fread(header + 0x10, 0x200, 1, cdd.toc.tracks[0].fd); + + /* DATA track start time (based on DATA file length) */ + fseek(cdd.toc.tracks[0].fd, 0, SEEK_END); + cdd.toc.tracks[0].end = ftell(cdd.toc.tracks[0].fd) / cdd.sectorSize; + + /* DATA track start time (logical block 0) */ + fseek(cdd.toc.tracks[0].fd, 0, SEEK_SET); + cdd.toc.tracks[0].start = 0; + + /* initialize TOC */ + cdd.toc.end = cdd.toc.tracks[0].end; + cdd.toc.last = 1; + + /* automatically retrieve audio tracks infos from .cue file */ + if (fd) + { + int pregap = 0; + int mm, ss, bb; + + /* skip first (DATA) track */ + while (!strstr(line, "INDEX 01") && !strstr(line, "INDEX 1")) + { + if (fgets(line, 128, fd) == NULL) + { + break; + } + } + + /* read next lines until end of file */ + while (fgets(line, 128, fd) != NULL) + { + /* skip any SPACE characters */ + lptr = line; + while (*lptr == 0x20) lptr++; + + /* decode FILE commands */ + if (!(memcmp(lptr, "FILE", 4))) + { + /* skip "FILE" attribute */ + lptr += 4; + + /* skip DOUBLE QUOTE or SPACE characters */ + while ((*lptr == 0x20) || (*lptr == '\"')) lptr++; + + /* set pointer at the end of filepath */ + ptr = fname + strlen(fname) - 1; + while ((ptr - fname) && (*ptr != '/') && (*ptr != '\\')) ptr--; + if (ptr - fname) ptr++; + + /* append filename characters after filepath */ + while ((*lptr != '\"') && (lptr <= (line + 128)) && (ptr < (fname + 255))) + { + *ptr++ = *lptr++; + } + *ptr = 0; + + /* open file & initialize track file descriptor */ + cdd.toc.tracks[cdd.toc.last].fd = fopen(fname, "rb"); + if (!cdd.toc.tracks[cdd.toc.last].fd) + { + /* error opening file */ + break; + } + + /* reset current file PREGAP length */ + pregap = 0; + + /* reset current file read offset */ + cdd.toc.tracks[cdd.toc.last].offset = 0; + + /* check supported file types */ + if (!strstr(lptr,"BINARY")) + { + /* read file header */ + unsigned char head[32]; + fseek(cdd.toc.tracks[cdd.toc.last].fd, 8, SEEK_SET); + fread(head, 32, 1, cdd.toc.tracks[cdd.toc.last].fd); + fseek(cdd.toc.tracks[cdd.toc.last].fd, 0, SEEK_SET); + + /* autodetect WAVE file header (16-bit stereo @44.1kHz only) */ + if (!memcmp(head, waveHeader, 32)) + { + /* adjust current track file read offset with WAVE header length */ + cdd.toc.tracks[cdd.toc.last].offset -= 44; + } + #ifdef USE_LIBTREMOR + else if (!ov_open(cdd.toc.tracks[cdd.toc.last].fd,&cdd.toc.tracks[cdd.toc.last].vf,0,0)) + { + /* retrieve stream infos */ + vorbis_info *info = ov_info(&cdd.toc.tracks[cdd.toc.last].vf,-1); + if (!info || (info->rate != 44100) || (info->channels != 2)) + { + /* unsupported VORBIS file format (stereo @44.1kHz only) */ + ov_clear(&cdd.toc.tracks[cdd.toc.last].vf); + cdd.toc.tracks[cdd.toc.last].fd = 0; + break; + } + } +#endif + else + { + /* unsupported audio file */ + fclose(cdd.toc.tracks[cdd.toc.last].fd); + cdd.toc.tracks[cdd.toc.last].fd = 0; + break; + } + } + } + + /* decode TRACK commands */ + else if ((sscanf(lptr, "TRACK %02d AUDIO", &bb)) || (sscanf(lptr, "TRACK %d AUDIO", &bb))) + { + /* check track number */ + if (bb != (cdd.toc.last + 1)) + { + /* close any opened file */ + if (cdd.toc.tracks[cdd.toc.last].fd) + { + fclose(cdd.toc.tracks[cdd.toc.last].fd); + cdd.toc.tracks[cdd.toc.last].fd = 0; + } + + /* missing tracks */ + break; + } + + /* check if a single file is used for all tracks */ + if (!cdd.toc.tracks[cdd.toc.last].fd) + { + /* clear previous track end time */ + cdd.toc.tracks[cdd.toc.last - 1].end = 0; + } + } + + /* decode PREGAP commands */ + else if (sscanf(lptr, "PREGAP %02d:%02d:%02d", &mm, &ss, &bb) == 3) + { + /* increment current file PREGAP length */ + pregap += bb + ss*75 + mm*60*75; + } + + /* decode INDEX commands */ + else if ((sscanf(lptr, "INDEX 00 %02d:%02d:%02d", &mm, &ss, &bb) == 3) || + (sscanf(lptr, "INDEX 0 %02d:%02d:%02d", &mm, &ss, &bb) == 3)) + { + /* check if a single file is used for all tracks */ + if (!cdd.toc.tracks[cdd.toc.last].fd) + { + /* set previous track end time */ + cdd.toc.tracks[cdd.toc.last - 1].end = bb + ss*75 + mm*60*75 + pregap; + } + } + else if ((sscanf(lptr, "INDEX 01 %02d:%02d:%02d", &mm, &ss, &bb) == 3) || + (sscanf(lptr, "INDEX 1 %02d:%02d:%02d", &mm, &ss, &bb) == 3)) + { + /* adjust file read offset for current track with current file PREGAP length */ + cdd.toc.tracks[cdd.toc.last].offset += pregap * 2352; + + /* check if a single file is used for all tracks */ + if (!cdd.toc.tracks[cdd.toc.last].fd) + { + /* use common file descriptor */ + cdd.toc.tracks[cdd.toc.last].fd = cdd.toc.tracks[0].fd; + + /* current track start time (based on current absolute time) */ + cdd.toc.tracks[cdd.toc.last].start = bb + ss*75 + mm*60*75 + pregap; + + /* check if previous track end time has not been already set (through INDEX00 command) */ + if (cdd.toc.tracks[cdd.toc.last - 1].end == 0) + { + /* set previous track end time (based on current absolute timee) */ + cdd.toc.tracks[cdd.toc.last - 1].end = bb + ss*75 + mm*60*75; + } + } + else + { + /* current track start time (based on previous track end time) */ + cdd.toc.tracks[cdd.toc.last].start = cdd.toc.end + bb + ss*75 + mm*60*75 + pregap; + + /* adjust file read offset with previous track end time */ + cdd.toc.tracks[cdd.toc.last].offset += cdd.toc.end * 2352; + + #ifdef USE_LIBTREMOR + if (cdd.toc.tracks[cdd.toc.last].vf.datasource) + { + /* convert read offset to PCM sample offset */ + cdd.toc.tracks[cdd.toc.last].offset = cdd.toc.tracks[cdd.toc.last].offset / 4; + + /* current track end time */ + cdd.toc.tracks[cdd.toc.last].end = cdd.toc.tracks[cdd.toc.last].start + ov_pcm_total(&cdd.toc.tracks[cdd.toc.last].vf,-1)/588; + if (cdd.toc.tracks[cdd.toc.last].end <= cdd.toc.tracks[cdd.toc.last].start) + { + /* invalid length */ + ov_clear(&cdd.toc.tracks[cdd.toc.last].vf); + cdd.toc.tracks[cdd.toc.last].fd = 0; + cdd.toc.tracks[cdd.toc.last].end = 0; + cdd.toc.tracks[cdd.toc.last].start = 0; + cdd.toc.tracks[cdd.toc.last].offset = 0; + break; + } + +#ifdef DISABLE_MANY_OGG_OPEN_FILES + /* close VORBIS file structure to save memory */ + ogg_free(cdd.toc.last); +#endif + } + else +#endif + { + /* current track end time */ + fseek(cdd.toc.tracks[cdd.toc.last].fd, 0, SEEK_END); + cdd.toc.tracks[cdd.toc.last].end = cdd.toc.tracks[cdd.toc.last].start + ((ftell(cdd.toc.tracks[cdd.toc.last].fd) + 2351) / 2352); + fseek(cdd.toc.tracks[cdd.toc.last].fd, 0, SEEK_SET); + } + + /* update TOC end */ + cdd.toc.end = cdd.toc.tracks[cdd.toc.last].end; + } + + /* increment track number */ + cdd.toc.last++; + } + } + + /* check if a single file is used for all tracks */ + if (cdd.toc.tracks[cdd.toc.last - 1].fd == cdd.toc.tracks[0].fd) + { + /* adjust TOC end */ + cdd.toc.end += pregap; + + /* last track end index */ + cdd.toc.tracks[cdd.toc.last - 1].end = cdd.toc.end; + } + + /* close .cue file */ + fclose(fd); + } + + /* .ISO audio tracks auto-detection */ + else if (cdd.sectorSize == 2048) + { + int i, offset; + + /* set pointer at the end of filename */ + ptr = fname + strlen(fname) - 4; + + /* auto-detect track file extensions */ + for (i=0; irate != 44100) || (info->channels != 2)) + { + /* unsupported OGG file */ + ov_clear(&cdd.toc.tracks[cdd.toc.last].vf); + break; + } + + /* initialize current track file descriptor */ + cdd.toc.tracks[cdd.toc.last].fd = fd; + + /* initialize current track start time (based on previous track end time) */ + cdd.toc.tracks[cdd.toc.last].start = cdd.toc.end; + + /* add default 2s PAUSE between tracks */ + cdd.toc.tracks[cdd.toc.last].start += 150; + + /* current track end time */ + cdd.toc.tracks[cdd.toc.last].end = cdd.toc.tracks[cdd.toc.last].start + ov_pcm_total(&cdd.toc.tracks[cdd.toc.last].vf,-1)/588; + if (cdd.toc.tracks[cdd.toc.last].end <= cdd.toc.tracks[cdd.toc.last].start) + { + /* invalid file length */ + ov_clear(&cdd.toc.tracks[cdd.toc.last].vf); + cdd.toc.tracks[cdd.toc.last].fd = 0; + cdd.toc.tracks[cdd.toc.last].end = 0; + cdd.toc.tracks[cdd.toc.last].start = 0; + break; + } + + /* auto-detect PAUSE within audio files */ + ov_pcm_seek(&cdd.toc.tracks[cdd.toc.last].vf, 100 * 588); + ov_read(&cdd.toc.tracks[cdd.toc.last].vf, (char *)head, 32, 0); + ov_pcm_seek(&cdd.toc.tracks[cdd.toc.last].vf, 0); + if (*(int32 *)head == 0) + { + /* assume 2s PAUSE is included at the beginning of the file */ + cdd.toc.tracks[cdd.toc.last].offset -= 150 * 588; + cdd.toc.tracks[cdd.toc.last].end -= 150; + } + +#ifdef DISABLE_MANY_OGG_OPEN_FILES + /* close VORBIS file structure to save memory */ + ogg_free(cdd.toc.last); +#endif + + /* update TOC end */ + cdd.toc.end = cdd.toc.tracks[cdd.toc.last].end; + + /* increment track number */ + cdd.toc.last++; + } +#endif + else + { + /* unsupported audio file format */ + fclose(fd); + break; + } + + /* try to open next audio track file */ + sprintf(ptr, extensions[i], cdd.toc.last + offset); + fd = fopen(fname, "rb"); + } + } + + /* Simulate audio tracks if none found */ + if (cdd.toc.last == 1) + { + /* Some games require exact TOC infos */ + if (strstr(header + 0x180,"T-95035") != NULL) + { + /* Snatcher */ + cdd.toc.last = cdd.toc.end = 0; + do + { + cdd.toc.tracks[cdd.toc.last].start = cdd.toc.end; + cdd.toc.tracks[cdd.toc.last].end = cdd.toc.tracks[cdd.toc.last].start + toc_snatcher[cdd.toc.last]; + cdd.toc.end = cdd.toc.tracks[cdd.toc.last].end; + cdd.toc.last++; + } + while (cdd.toc.last < 21); + } + else if (strstr(header + 0x180,"T-127015") != NULL) + { + /* Lunar - The Silver Star */ + cdd.toc.last = cdd.toc.end = 0; + do + { + cdd.toc.tracks[cdd.toc.last].start = cdd.toc.end; + cdd.toc.tracks[cdd.toc.last].end = cdd.toc.tracks[cdd.toc.last].start + toc_lunar[cdd.toc.last]; + cdd.toc.end = cdd.toc.tracks[cdd.toc.last].end; + cdd.toc.last++; + } + while (cdd.toc.last < 52); + } + else if (strstr(header + 0x180,"T-113045") != NULL) + { + /* Shadow of the Beast II */ + cdd.toc.last = cdd.toc.end = 0; + do + { + cdd.toc.tracks[cdd.toc.last].start = cdd.toc.end; + cdd.toc.tracks[cdd.toc.last].end = cdd.toc.tracks[cdd.toc.last].start + toc_shadow[cdd.toc.last]; + cdd.toc.end = cdd.toc.tracks[cdd.toc.last].end; + cdd.toc.last++; + } + while (cdd.toc.last < 15); + } + else if (strstr(header + 0x180,"T-143025") != NULL) + { + /* Dungeon Explorer */ + cdd.toc.last = cdd.toc.end = 0; + do + { + cdd.toc.tracks[cdd.toc.last].start = cdd.toc.end; + cdd.toc.tracks[cdd.toc.last].end = cdd.toc.tracks[cdd.toc.last].start + toc_dungeon[cdd.toc.last]; + cdd.toc.end = cdd.toc.tracks[cdd.toc.last].end; + cdd.toc.last++; + } + while (cdd.toc.last < 13); + } + else if (strstr(header + 0x180,"MK-4410") != NULL) + { + /* Final Fight CD (USA, Europe) */ + cdd.toc.last = cdd.toc.end = 0; + do + { + cdd.toc.tracks[cdd.toc.last].start = cdd.toc.end; + cdd.toc.tracks[cdd.toc.last].end = cdd.toc.tracks[cdd.toc.last].start + toc_ffight[cdd.toc.last]; + cdd.toc.end = cdd.toc.tracks[cdd.toc.last].end; + cdd.toc.last++; + } + while (cdd.toc.last < 26); + } + else if (strstr(header + 0x180,"G-6013") != NULL) + { + /* Final Fight CD (Japan) */ + cdd.toc.last = cdd.toc.end = 0; + do + { + cdd.toc.tracks[cdd.toc.last].start = cdd.toc.end; + cdd.toc.tracks[cdd.toc.last].end = cdd.toc.tracks[cdd.toc.last].start + toc_ffightj[cdd.toc.last]; + cdd.toc.end = cdd.toc.tracks[cdd.toc.last].end; + cdd.toc.last++; + } + while (cdd.toc.last < 29); + } + else + { + /* default TOC (99 tracks & 2s per audio tracks) */ + do + { + cdd.toc.tracks[cdd.toc.last].start = cdd.toc.end + 2*75; + cdd.toc.tracks[cdd.toc.last].end = cdd.toc.tracks[cdd.toc.last].start + 2*75; + cdd.toc.end = cdd.toc.tracks[cdd.toc.last].end; + cdd.toc.last++; + } + while ((cdd.toc.last < 99) && (cdd.toc.end < 56*60*75)); + } + } + + /* Lead-out */ + cdd.toc.tracks[cdd.toc.last].start = cdd.toc.end; + + /* CD loaded */ + cdd.loaded = 1; + return 1; +} + +void cdd_unload(void) +{ + if (cdd.loaded) + { + int i; + + /* close CD tracks */ + for (i=0; i= 0) && (cdd.lba < cdd.toc.tracks[0].end)) + { + /* BIN format ? */ + if (cdd.sectorSize == 2352) + { + /* skip 16-byte header */ + fseek(cdd.toc.tracks[0].fd, cdd.lba * 2352 + 16, SEEK_SET); + } + + /* read sector data (Mode 1 = 2048 bytes) */ + fread(dst, 2048, 1, cdd.toc.tracks[0].fd); + } +} + +void cdd_read_audio(unsigned int samples) +{ + /* previous audio outputs */ + int16 l = cdd.audio[0]; + int16 r = cdd.audio[1]; + + /* get number of internal clocks (samples) needed */ + samples = blip_clocks_needed(blip[0], samples); + + /* audio track playing ? */ + if (!scd.regs[0x36>>1].byte.h && cdd.toc.tracks[cdd.index].fd) + { + int i, mul, delta; + + /* current CD-DA fader volume */ + int curVol = cdd.volume; + + /* CD-DA fader volume setup (0-1024) */ + int endVol = scd.regs[0x34>>1].w >> 4; + + /* read samples from current block */ +#ifdef USE_LIBTREMOR + if (cdd.toc.tracks[cdd.index].vf.datasource) + { + int len, done = 0; + int16 *ptr = (int16 *) (cdc.ram); + samples = samples * 4; + while (done < samples) + { + len = ov_read(&cdd.toc.tracks[cdd.index].vf, (char *)(cdc.ram + done), samples - done, 0); + if (len <= 0) + { + done = samples; + break; + } + done += len; + } + samples = done / 4; + + /* process 16-bit (host-endian) stereo samples */ + for (i=0; i endVol) + { + /* fade-out */ + curVol--; + } + else if (!curVol) + { + /* audio will remain muted until next setup */ + break; + } + } + } + else +#endif + { +#ifdef LSB_FIRST + int16 *ptr = (int16 *) (cdc.ram); +#else + uint8 *ptr = cdc.ram; +#endif + fread(cdc.ram, 1, samples * 4, cdd.toc.tracks[cdd.index].fd); + + /* process 16-bit (little-endian) stereo samples */ + for (i=0; i endVol) + { + /* fade-out */ + curVol--; + } + else if (!curVol) + { + /* audio will remain muted until next setup */ + break; + } + } + } + + /* save current CD-DA fader volume */ + cdd.volume = curVol; + + /* save last audio output for next frame */ + cdd.audio[0] = l; + cdd.audio[1] = r; + } + else + { + /* no audio output */ + if (l) blip_add_delta_fast(blip[0], 0, -l); + if (r) blip_add_delta_fast(blip[1], 0, -r); + + /* save audio output for next frame */ + cdd.audio[0] = 0; + cdd.audio[1] = 0; + } + + /* end of Blip Buffer timeframe */ + blip_end_frame(blip[0], samples); + blip_end_frame(blip[1], samples); +} + + +void cdd_update(void) +{ +#ifdef LOG_CDD + error("LBA = %d (track n°%d)(latency=%d)\n", cdd.lba, cdd.index, cdd.latency); +#endif + + /* seeking disc */ + if (cdd.status == CD_SEEK) + { + /* drive latency */ + if (cdd.latency > 0) + { + cdd.latency--; + return; + } + + /* drive is ready */ + cdd.status = CD_READY; + } + + /* reading disc */ + else if (cdd.status == CD_PLAY) + { + /* drive latency */ + if (cdd.latency > 0) + { + cdd.latency--; + return; + } + + /* track type */ + if (!cdd.index) + { + /* DATA sector header (CD-ROM Mode 1) */ + uint8 header[4]; + uint32 msf = cdd.lba + 150; + header[0] = lut_BCD_8[(msf / 75) / 60]; + header[1] = lut_BCD_8[(msf / 75) % 60]; + header[2] = lut_BCD_8[(msf % 75)]; + header[3] = 0x01; + + /* data track sector read is controlled by CDC */ + cdd.lba += cdc_decoder_update(*(uint32 *)(header)); + } + else if (cdd.index < cdd.toc.last) + { + /* check against audio track start index */ + if (cdd.lba >= cdd.toc.tracks[cdd.index].start) + { + /* audio track playing */ + scd.regs[0x36>>1].byte.h = 0x00; + } + + /* audio blocks are still sent to CDC as well as CD DAC/Fader */ + cdc_decoder_update(0); + + /* next audio block is automatically read */ + cdd.lba++; + } + else + { + /* end of disc */ + cdd.status = CD_END; + return; + } + + /* check end of current track */ + if (cdd.lba >= cdd.toc.tracks[cdd.index].end) + { +#ifdef USE_LIBTREMOR +#ifdef DISABLE_MANY_OGG_OPEN_FILES + /* close previous track VORBIS file structure to save memory */ + if (cdd.toc.tracks[cdd.index].vf.datasource) + { + ogg_free(cdd.index); + } +#endif +#endif + /* play next track */ + cdd.index++; + + /* PAUSE between tracks */ + scd.regs[0x36>>1].byte.h = 0x01; + + /* seek to next audio track start */ +#ifdef USE_LIBTREMOR + if (cdd.toc.tracks[cdd.index].vf.seekable) + { +#ifdef DISABLE_MANY_OGG_OPEN_FILES + /* VORBIS file need to be opened first */ + ov_open(cdd.toc.tracks[cdd.index].fd,&cdd.toc.tracks[cdd.index].vf,0,0); +#endif + ov_pcm_seek(&cdd.toc.tracks[cdd.index].vf, -cdd.toc.tracks[cdd.index].offset); + } + else +#endif + if (cdd.toc.tracks[cdd.index].fd) + { + fseek(cdd.toc.tracks[cdd.index].fd, (cdd.toc.tracks[cdd.index].start * 2352) - cdd.toc.tracks[cdd.index].offset, SEEK_SET); + } + } + } + + /* scanning disc */ + else if (cdd.status == CD_SCAN) + { + /* fast-forward or fast-rewind */ + cdd.lba += cdd.scanOffset; + + /* check current track limits */ + if (cdd.lba >= cdd.toc.tracks[cdd.index].end) + { +#ifdef USE_LIBTREMOR +#ifdef DISABLE_MANY_OGG_OPEN_FILES + /* close previous track VORBIS file structure to save memory */ + if (cdd.toc.tracks[cdd.index].vf.datasource) + { + ogg_free(cdd.index); + } +#endif +#endif + /* next track */ + cdd.index++; + + /* skip directly to track start position */ + cdd.lba = cdd.toc.tracks[cdd.index].start; + + /* AUDIO track playing ? */ + if (cdd.status == CD_PLAY) + { + scd.regs[0x36>>1].byte.h = 0x00; + } + } + else if (cdd.lba < cdd.toc.tracks[cdd.index].start) + { +#ifdef USE_LIBTREMOR +#ifdef DISABLE_MANY_OGG_OPEN_FILES + /* close previous track VORBIS file structure to save memory */ + if (cdd.toc.tracks[cdd.index].vf.datasource) + { + ogg_free(cdd.index); + } +#endif +#endif + + /* previous track */ + cdd.index--; + + /* skip directly to track end position */ + cdd.lba = cdd.toc.tracks[cdd.index].end; + } + + /* check disc limits */ + if (cdd.index < 0) + { + cdd.index = 0; + cdd.lba = 0; + } + else if (cdd.index >= cdd.toc.last) + { + /* no AUDIO track playing */ + scd.regs[0x36>>1].byte.h = 0x01; + + /* end of disc */ + cdd.index = cdd.toc.last; + cdd.lba = cdd.toc.end; + cdd.status = CD_END; + return; + } + + /* seek to current block */ + if (!cdd.index) + { + /* no AUDIO track playing */ + scd.regs[0x36>>1].byte.h = 0x01; + + /* DATA track */ + fseek(cdd.toc.tracks[0].fd, cdd.lba * cdd.sectorSize, SEEK_SET); + } +#ifdef USE_LIBTREMOR + else if (cdd.toc.tracks[cdd.index].vf.seekable) + { +#ifdef DISABLE_MANY_OGG_OPEN_FILES + /* check if a new track is being played */ + if (!cdd.toc.tracks[cdd.index].vf.datasource) + { + /* VORBIS file need to be opened first */ + ov_open(cdd.toc.tracks[cdd.index].fd,&cdd.toc.tracks[cdd.index].vf,0,0); + } +#endif + /* VORBIS AUDIO track */ + ov_pcm_seek(&cdd.toc.tracks[cdd.index].vf, (cdd.lba - cdd.toc.tracks[cdd.index].start) * 588 - cdd.toc.tracks[cdd.index].offset); + } +#endif + else if (cdd.toc.tracks[cdd.index].fd) + { + /* PCM AUDIO track */ + fseek(cdd.toc.tracks[cdd.index].fd, (cdd.lba * 2352) - cdd.toc.tracks[cdd.index].offset, SEEK_SET); + } + } +} + +void cdd_process(void) +{ + /* Process CDD command */ + switch (scd.regs[0x42>>1].byte.h & 0x0f) + { + case 0x00: /* Drive Status */ + { + /* RS1-RS8 normally unchanged */ + scd.regs[0x38>>1].byte.h = cdd.status; + + /* unless RS1 indicated invalid track infos */ + if (scd.regs[0x38>>1].byte.l == 0x0f) + { + /* and SEEK has ended */ + if (cdd.status != CD_SEEK) + { + /* then return valid track infos, e.g current track number in RS2-RS3 (fixes Lunar - The Silver Star) */ + scd.regs[0x38>>1].byte.l = 0x02; + scd.regs[0x3a>>1].w = (cdd.index < cdd.toc.last) ? lut_BCD_16[cdd.index + 1] : 0x0A0A; + } + } + break; + } + + case 0x01: /* Stop Drive */ + { + /* update status */ + cdd.status = cdd.loaded ? CD_STOP : NO_DISC; + + /* no audio track playing */ + scd.regs[0x36>>1].byte.h = 0x01; + + /* RS1-RS8 ignored, expects 0x0 ("no disc" ?) in RS0 once */ + scd.regs[0x38>>1].w = 0x0000; + scd.regs[0x3a>>1].w = 0x0000; + scd.regs[0x3c>>1].w = 0x0000; + scd.regs[0x3e>>1].w = 0x0000; + scd.regs[0x40>>1].w = 0x000f; + return; + } + + case 0x02: /* Read TOC */ + { + /* Infos automatically retrieved by CDD processor from Q-Channel */ + /* commands 0x00-0x02 (current block) and 0x03-0x05 (Lead-In) */ + switch (scd.regs[0x44>>1].byte.l) + { + case 0x00: /* Current Absolute Time (MM:SS:FF) */ + { + int lba = cdd.lba + 150; + scd.regs[0x38>>1].w = cdd.status << 8; + scd.regs[0x3a>>1].w = lut_BCD_16[(lba/75)/60]; + scd.regs[0x3c>>1].w = lut_BCD_16[(lba/75)%60]; + scd.regs[0x3e>>1].w = lut_BCD_16[(lba%75)]; + scd.regs[0x40>>1].byte.h = cdd.index ? 0x00 : 0x04; /* Current block flags in RS8 (bit0 = mute status, bit1: pre-emphasis status, bit2: track type) */ + break; + } + + case 0x01: /* Current Track Relative Time (MM:SS:FF) */ + { + int lba = cdd.lba - cdd.toc.tracks[cdd.index].start; + scd.regs[0x38>>1].w = (cdd.status << 8) | 0x01; + scd.regs[0x3a>>1].w = lut_BCD_16[(lba/75)/60]; + scd.regs[0x3c>>1].w = lut_BCD_16[(lba/75)%60]; + scd.regs[0x3e>>1].w = lut_BCD_16[(lba%75)]; + scd.regs[0x40>>1].byte.h = cdd.index ? 0x00 : 0x04; /* Current block flags in RS8 (bit0 = mute status, bit1: pre-emphasis status, bit2: track type) */ + break; + } + + case 0x02: /* Current Track Number */ + { + scd.regs[0x38>>1].w = (cdd.status << 8) | 0x02; + scd.regs[0x3a>>1].w = (cdd.index < cdd.toc.last) ? lut_BCD_16[cdd.index + 1] : 0x0A0A; + scd.regs[0x3c>>1].w = 0x0000; + scd.regs[0x3e>>1].w = 0x0000; /* Disk Control Code (?) in RS6 */ + scd.regs[0x40>>1].byte.h = 0x00; + break; + } + + case 0x03: /* Total length (MM:SS:FF) */ + { + int lba = cdd.toc.end + 150; + scd.regs[0x38>>1].w = (cdd.status << 8) | 0x03; + scd.regs[0x3a>>1].w = lut_BCD_16[(lba/75)/60]; + scd.regs[0x3c>>1].w = lut_BCD_16[(lba/75)%60]; + scd.regs[0x3e>>1].w = lut_BCD_16[(lba%75)]; + scd.regs[0x40>>1].byte.h = 0x00; + break; + } + + case 0x04: /* First & Last Track Numbers */ + { + scd.regs[0x38>>1].w = (cdd.status << 8) | 0x04; + scd.regs[0x3a>>1].w = 0x0001; + scd.regs[0x3c>>1].w = lut_BCD_16[cdd.toc.last]; + scd.regs[0x3e>>1].w = 0x0000; /* Drive Version (?) in RS6-RS7 */ + scd.regs[0x40>>1].byte.h = 0x00; /* Lead-In flags in RS8 (bit0 = mute status, bit1: pre-emphasis status, bit2: track type) */ + break; + } + + case 0x05: /* Track Start Time (MM:SS:FF) */ + { + int track = scd.regs[0x46>>1].byte.h * 10 + scd.regs[0x46>>1].byte.l; + int lba = cdd.toc.tracks[track-1].start + 150; + scd.regs[0x38>>1].w = (cdd.status << 8) | 0x05; + scd.regs[0x3a>>1].w = lut_BCD_16[(lba/75)/60]; + scd.regs[0x3c>>1].w = lut_BCD_16[(lba/75)%60]; + scd.regs[0x3e>>1].w = lut_BCD_16[(lba%75)]; + scd.regs[0x40>>1].byte.h = track % 10; /* Track Number (low digit) */ + if (track == 1) + { + /* RS6 bit 3 is set for the first (DATA) track */ + scd.regs[0x3e>>1].byte.h |= 0x08; + } + break; + } + + default: + { +#ifdef LOG_ERROR + error("Unknown CDD Command %02X (%X)\n", scd.regs[0x44>>1].byte.l, s68k.pc); +#endif + return; + } + } + break; + } + + case 0x03: /* Play */ + { + /* reset track index */ + int index = 0; + + /* new LBA position */ + int lba = ((scd.regs[0x44>>1].byte.h * 10 + scd.regs[0x44>>1].byte.l) * 60 + + (scd.regs[0x46>>1].byte.h * 10 + scd.regs[0x46>>1].byte.l)) * 75 + + (scd.regs[0x48>>1].byte.h * 10 + scd.regs[0x48>>1].byte.l) - 150; + + /* CD drive latency */ + if (!cdd.latency) + { + /* Fixes a few games hanging during intro because they expect data to be read with some delay */ + /* Radical Rex needs at least one interrupt delay */ + /* Wolf Team games (Anet Futatabi, Cobra Command, Road Avenger & Time Gal) need at least 6 interrupts delay */ + /* Space Adventure Cobra (2nd morgue scene) needs at least 13 interrupts delay (incl. seek time, so 6 is OK) */ + /* Jeopardy & ESPN Sunday Night NFL are picky about this as well: 10 interrupts delay (+ seek time) seems OK */ + cdd.latency = 10; + } + + /* CD drive seek time */ + /* max. seek time = 1.5 s = 1.5 x 75 = 112.5 CDD interrupts (rounded to 120) for 270000 sectors max on disc. */ + /* Note: This is only a rough approximation since, on real hardware, seek time is much likely not linear and */ + /* latency much larger than above value, but this model works fine for Sonic CD (track 26 playback needs to */ + /* be enough delayed to start in sync with intro sequence, as compared with real hardware recording). */ + if (lba > cdd.lba) + { + cdd.latency += (((lba - cdd.lba) * 120) / 270000); + } + else + { + cdd.latency += (((cdd.lba - lba) * 120) / 270000); + } + + /* update current LBA */ + cdd.lba = lba; + + /* get track index */ + while ((cdd.toc.tracks[index].end <= lba) && (index < cdd.toc.last)) index++; + +#ifdef USE_LIBTREMOR +#ifdef DISABLE_MANY_OGG_OPEN_FILES + /* check if track index has changed */ + if (index != cdd.index) + { + /* close previous track VORBIS file structure to save memory */ + if (cdd.toc.tracks[cdd.index].vf.datasource) + { + ogg_free(cdd.index); + } + + /* open current track VORBIS file */ + if (cdd.toc.tracks[index].vf.seekable) + { + ov_open(cdd.toc.tracks[index].fd,&cdd.toc.tracks[index].vf,0,0); + } + } +#endif +#endif + + /* update current track index */ + cdd.index = index; + + /* stay within track limits when seeking files */ + if (lba < cdd.toc.tracks[index].start) + { + lba = cdd.toc.tracks[index].start; + } + + /* seek to current block */ + if (!index) + { + /* DATA track */ + fseek(cdd.toc.tracks[0].fd, lba * cdd.sectorSize, SEEK_SET); + } +#ifdef USE_LIBTREMOR + else if (cdd.toc.tracks[index].vf.seekable) + { + /* VORBIS AUDIO track */ + ov_pcm_seek(&cdd.toc.tracks[index].vf, (lba - cdd.toc.tracks[index].start) * 588 - cdd.toc.tracks[index].offset); + } +#endif + else if (cdd.toc.tracks[index].fd) + { + /* PCM AUDIO track */ + fseek(cdd.toc.tracks[index].fd, (lba * 2352) - cdd.toc.tracks[index].offset, SEEK_SET); + } + + /* no audio track playing (yet) */ + scd.regs[0x36>>1].byte.h = 0x01; + + /* update status */ + cdd.status = CD_PLAY; + + /* return track index in RS2-RS3 */ + scd.regs[0x38>>1].w = (CD_PLAY << 8) | 0x02; + scd.regs[0x3a>>1].w = (cdd.index < cdd.toc.last) ? lut_BCD_16[index + 1] : 0x0A0A; + scd.regs[0x3c>>1].w = 0x0000; + scd.regs[0x3e>>1].w = 0x0000; + scd.regs[0x40>>1].byte.h = 0x00; + break; + } + + case 0x04: /* Seek */ + { + /* reset track index */ + int index = 0; + + /* new LBA position */ + int lba = ((scd.regs[0x44>>1].byte.h * 10 + scd.regs[0x44>>1].byte.l) * 60 + + (scd.regs[0x46>>1].byte.h * 10 + scd.regs[0x46>>1].byte.l)) * 75 + + (scd.regs[0x48>>1].byte.h * 10 + scd.regs[0x48>>1].byte.l) - 150; + + /* CD drive seek time */ + /* We are using similar linear model as above, although still not exactly accurate, */ + /* it works fine for Switch/Panic! intro (Switch needs at least 30 interrupts while */ + /* seeking from 00:05:63 to 24:03:19, Panic! when seeking from 00:05:60 to 24:06:07) */ + if (lba > cdd.lba) + { + cdd.latency = ((lba - cdd.lba) * 120) / 270000; + } + else + { + cdd.latency = ((cdd.lba - lba) * 120) / 270000; + } + + /* update current LBA */ + cdd.lba = lba; + + /* get current track index */ + while ((cdd.toc.tracks[index].end <= lba) && (index < cdd.toc.last)) index++; + +#ifdef USE_LIBTREMOR +#ifdef DISABLE_MANY_OGG_OPEN_FILES + /* check if track index has changed */ + if (index != cdd.index) + { + /* close previous track VORBIS file structure to save memory */ + if (cdd.toc.tracks[cdd.index].vf.datasource) + { + ogg_free(cdd.index); + } + + /* open current track VORBIS file */ + if (cdd.toc.tracks[index].vf.seekable) + { + ov_open(cdd.toc.tracks[index].fd,&cdd.toc.tracks[index].vf,0,0); + } + } +#endif +#endif + + /* update current track index */ + cdd.index = index; + + /* stay within track limits */ + if (lba < cdd.toc.tracks[index].start) + { + lba = cdd.toc.tracks[index].start; + } + + /* seek to current block */ + if (!index) + { + /* DATA track */ + fseek(cdd.toc.tracks[0].fd, lba * cdd.sectorSize, SEEK_SET); + } +#ifdef USE_LIBTREMOR + else if (cdd.toc.tracks[index].vf.seekable) + { + /* VORBIS AUDIO track */ + ov_pcm_seek(&cdd.toc.tracks[index].vf, (lba - cdd.toc.tracks[index].start) * 588 - cdd.toc.tracks[index].offset); + } +#endif + else if (cdd.toc.tracks[index].fd) + { + /* PCM AUDIO track */ + fseek(cdd.toc.tracks[index].fd, (lba * 2352) - cdd.toc.tracks[index].offset, SEEK_SET); + } + + /* no audio track playing */ + scd.regs[0x36>>1].byte.h = 0x01; + + /* update status */ + cdd.status = CD_SEEK; + + /* unknown RS1-RS8 values (returning 0xF in RS1 invalidates track infos in RS2-RS8 and fixes Final Fight CD intro when seek time is emulated) */ + scd.regs[0x38>>1].w = (CD_SEEK << 8) | 0x0f; + scd.regs[0x3a>>1].w = 0x0000; + scd.regs[0x3c>>1].w = 0x0000; + scd.regs[0x3e>>1].w = 0x0000; + scd.regs[0x40>>1].w = ~(CD_SEEK + 0xf) & 0x0f; + return; + } + + case 0x06: /* Pause */ + { + /* no audio track playing */ + scd.regs[0x36>>1].byte.h = 0x01; + + /* update status (RS1-RS8 unchanged) */ + cdd.status = scd.regs[0x38>>1].byte.h = CD_READY; + break; + } + + case 0x07: /* Resume */ + { + /* update status (RS1-RS8 unchanged) */ + cdd.status = scd.regs[0x38>>1].byte.h = CD_PLAY; + break; + } + + case 0x08: /* Forward Scan */ + { + /* reset scanning direction / speed */ + cdd.scanOffset = CD_SCAN_SPEED; + + /* update status (RS1-RS8 unchanged) */ + cdd.status = scd.regs[0x38>>1].byte.h = CD_SCAN; + break; + } + + case 0x09: /* Rewind Scan */ + { + /* reset scanning direction / speed */ + cdd.scanOffset = -CD_SCAN_SPEED; + + /* update status (RS1-RS8 unchanged) */ + cdd.status = scd.regs[0x38>>1].byte.h = CD_SCAN; + break; + } + + + case 0x0a: /* N-Track Jump Control ? (usually sent before CD_SEEK or CD_PLAY commands) */ + { + /* TC3 corresponds to seek direction (00=forward, FF=reverse) */ + /* TC4-TC7 are related to seek length (4x4 bits i.e parameter values are between -65535 and +65535) */ + /* Maybe related to number of auto-sequenced track jumps/moves for CD DSP (cf. CXD2500BQ datasheet) */ + /* also see US Patent nr. 5222054 for a detailled description of seeking operation using Track Jump */ + + /* no audio track playing */ + scd.regs[0x36>>1].byte.h = 0x01; + + /* update status (RS1-RS8 unchanged) */ + cdd.status = scd.regs[0x38>>1].byte.h = CD_READY; + break; + } + + case 0x0c: /* Close Tray */ + { + /* no audio track playing */ + scd.regs[0x36>>1].byte.h = 0x01; + + /* update status */ + cdd.status = cdd.loaded ? CD_STOP : NO_DISC; + + /* RS1-RS8 ignored, expects 0x0 ("no disc" ?) in RS0 once */ + scd.regs[0x38>>1].w = 0x0000; + scd.regs[0x3a>>1].w = 0x0000; + scd.regs[0x3c>>1].w = 0x0000; + scd.regs[0x3e>>1].w = 0x0000; + scd.regs[0x40>>1].w = 0x000f; + +#ifdef CD_TRAY_CALLBACK + CD_TRAY_CALLBACK +#endif + return; + } + + case 0x0d: /* Open Tray */ + { + /* no audio track playing */ + scd.regs[0x36>>1].byte.h = 0x01; + + /* update status (RS1-RS8 ignored) */ + cdd.status = CD_OPEN; + scd.regs[0x38>>1].w = CD_OPEN << 8; + scd.regs[0x3a>>1].w = 0x0000; + scd.regs[0x3c>>1].w = 0x0000; + scd.regs[0x3e>>1].w = 0x0000; + scd.regs[0x40>>1].w = ~CD_OPEN & 0x0f; + +#ifdef CD_TRAY_CALLBACK + CD_TRAY_CALLBACK +#endif + return; + } + + default: /* Unknown command */ +#ifdef LOG_CDD + error("Unknown CDD Command !!!\n"); +#endif + scd.regs[0x38>>1].byte.h = cdd.status; + break; + } + + /* only compute checksum when necessary */ + scd.regs[0x40>>1].byte.l = ~(scd.regs[0x38>>1].byte.h + scd.regs[0x38>>1].byte.l + + scd.regs[0x3a>>1].byte.h + scd.regs[0x3a>>1].byte.l + + scd.regs[0x3c>>1].byte.h + scd.regs[0x3c>>1].byte.l + + scd.regs[0x3e>>1].byte.h + scd.regs[0x3e>>1].byte.l + + scd.regs[0x40>>1].byte.h) & 0x0f; +} diff --git a/genplus-gx/core/cd_hw/cdd.h b/genplus-gx/core/cd_hw/cdd.h new file mode 100644 index 0000000000..b3f53df5d9 --- /dev/null +++ b/genplus-gx/core/cd_hw/cdd.h @@ -0,0 +1,112 @@ +/*************************************************************************************** + * Genesis Plus + * CD drive processor & CD-DA fader + * + * Copyright (C) 2012-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ +#ifndef _HW_CDD_ +#define _HW_CDD_ + +#include "blip_buf.h" + +#ifdef USE_LIBTREMOR +#include "tremor/ivorbisfile.h" +#endif + +#define cdd scd.cdd_hw + +/* CDD status */ +#define NO_DISC 0x00 +#define CD_PLAY 0x01 +#define CD_SEEK 0x02 +#define CD_SCAN 0x03 +#define CD_READY 0x04 +#define CD_OPEN 0x05 /* similar to 0x0E ? */ +#define CD_STOP 0x09 +#define CD_END 0x0C + +/* CD blocks scanning speed */ +#define CD_SCAN_SPEED 30 + +#define CD_MAX_TRACKS 100 + +/* CD track */ +typedef struct +{ + FILE *fd; +#ifdef USE_LIBTREMOR + OggVorbis_File vf; +#endif + int offset; + int start; + int end; +} track_t; + +/* CD TOC */ +typedef struct +{ + int end; + int last; + track_t tracks[CD_MAX_TRACKS]; +} toc_t; + +/* CDD hardware */ +typedef struct +{ + uint32 cycles; + uint32 latency; + int loaded; + int index; + int lba; + int scanOffset; + int volume; + uint8 status; + uint16 sectorSize; + toc_t toc; + int16 audio[2]; +} cdd_t; + +/* Function prototypes */ +extern void cdd_init(blip_t* left, blip_t* right); +extern void cdd_reset(void); +extern int cdd_context_save(uint8 *state); +extern int cdd_context_load(uint8 *state); +extern int cdd_load(char *filename, char *header); +extern void cdd_unload(void); +extern void cdd_read_data(uint8 *dst); +extern void cdd_read_audio(unsigned int samples); +extern void cdd_update(void); +extern void cdd_process(void); + +#endif diff --git a/genplus-gx/core/cd_hw/gfx.c b/genplus-gx/core/cd_hw/gfx.c new file mode 100644 index 0000000000..ca43a6701d --- /dev/null +++ b/genplus-gx/core/cd_hw/gfx.c @@ -0,0 +1,729 @@ +/*************************************************************************************** + * Genesis Plus + * CD graphics processor + * + * Copyright (C) 2012 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ +#include "shared.h" + +/***************************************************************/ +/* WORD-RAM DMA interfaces (1M & 2M modes) */ +/***************************************************************/ + +void word_ram_0_dma_w(unsigned int words) +{ + uint16 data; + + /* CDC buffer source address */ + uint16 src_index = cdc.dac.w & 0x3ffe; + + /* WORD-RAM destination address*/ + uint32 dst_index = (scd.regs[0x0a>>1].w << 3) & 0x1fffe; + + /* update DMA destination address */ + scd.regs[0x0a>>1].w += (words >> 2); + + /* update DMA source address */ + cdc.dac.w += (words << 1); + + /* DMA transfer */ + while (words--) + { + /* read 16-bit word from CDC buffer */ + data = *(uint16 *)(cdc.ram + src_index); + +#ifdef LSB_FIRST + /* source data is stored in big endian format */ + data = ((data >> 8) | (data << 8)) & 0xffff; +#endif + + /* write 16-bit word to WORD-RAM */ + *(uint16 *)(scd.word_ram[0] + dst_index) = data ; + + /* increment CDC buffer source address */ + src_index = (src_index + 2) & 0x3ffe; + + /* increment WORD-RAM destination address */ + dst_index = (dst_index + 2) & 0x1fffe; + } +} + +void word_ram_1_dma_w(unsigned int words) +{ + uint16 data; + + /* CDC buffer source address */ + uint16 src_index = cdc.dac.w & 0x3ffe; + + /* WORD-RAM destination address*/ + uint32 dst_index = ((scd.regs[0x0a>>1].w << 3) & 0x1fffe); + + /* update DMA destination address */ + scd.regs[0x0a>>1].w += (words >> 2); + + /* update DMA source address */ + cdc.dac.w += (words << 1); + + /* DMA transfer */ + while (words--) + { + /* read 16-bit word from CDC buffer */ + data = *(uint16 *)(cdc.ram + src_index); + +#ifdef LSB_FIRST + /* source data is stored in big endian format */ + data = ((data >> 8) | (data << 8)) & 0xffff; +#endif + + /* write 16-bit word to WORD-RAM */ + *(uint16 *)(scd.word_ram[1] + dst_index) = data ; + + /* increment CDC buffer source address */ + src_index = (src_index + 2) & 0x3ffe; + + /* increment WORD-RAM destination address */ + dst_index = (dst_index + 2) & 0x1fffe; + } +} + +void word_ram_2M_dma_w(unsigned int words) +{ + uint16 data; + + /* CDC buffer source address */ + uint16 src_index = cdc.dac.w & 0x3ffe; + + /* WORD-RAM destination address*/ + uint32 dst_index = (scd.regs[0x0a>>1].w << 3) & 0x3fffe; + + /* update DMA destination address */ + scd.regs[0x0a>>1].w += (words >> 2); + + /* update DMA source address */ + cdc.dac.w += (words << 1); + + /* DMA transfer */ + while (words--) + { + /* read 16-bit word from CDC buffer */ + data = *(uint16 *)(cdc.ram + src_index); + +#ifdef LSB_FIRST + /* source data is stored in big endian format */ + data = ((data >> 8) | (data << 8)) & 0xffff; +#endif + + /* write 16-bit word to WORD-RAM */ + *(uint16 *)(scd.word_ram_2M + dst_index) = data ; + + /* increment CDC buffer source address */ + src_index = (src_index + 2) & 0x3ffe; + + /* increment WORD-RAM destination address */ + dst_index = (dst_index + 2) & 0x3fffe; + } +} + + +/***************************************************************/ +/* WORD-RAM 0 & 1 DOT image SUB-CPU interface (1M Mode) */ +/***************************************************************/ + +unsigned int dot_ram_0_read16(unsigned int address) +{ + uint8 data = READ_BYTE(scd.word_ram[0], (address >> 1) & 0x1ffff); + return ((data & 0x0f) | ((data << 4) & 0xf00)); +} + +unsigned int dot_ram_1_read16(unsigned int address) +{ + uint8 data = READ_BYTE(scd.word_ram[1], (address >> 1) & 0x1ffff); + return ((data & 0x0f) | ((data << 4) & 0xf00)); +} + +void dot_ram_0_write16(unsigned int address, unsigned int data) +{ + uint8 prev; + address = (address >> 1) & 0x1ffff; + prev = READ_BYTE(scd.word_ram[0], address); + data = (data & 0x0f) | ((data >> 4) & 0xf0); + data = gfx.lut_prio[(scd.regs[0x02>>1].w >> 3) & 0x03][prev][data]; + WRITE_BYTE(scd.word_ram[0], address, data); +} + +void dot_ram_1_write16(unsigned int address, unsigned int data) +{ + uint8 prev; + address = (address >> 1) & 0x1ffff; + prev = READ_BYTE(scd.word_ram[1], address); + data = (data & 0x0f) | ((data >> 4) & 0xf0); + data = gfx.lut_prio[(scd.regs[0x02>>1].w >> 3) & 0x03][prev][data]; + WRITE_BYTE(scd.word_ram[1], address, data); +} + +unsigned int dot_ram_0_read8(unsigned int address) +{ + uint8 data = READ_BYTE(scd.word_ram[0], (address >> 1) & 0x1ffff); + + if (address & 1) + { + return (data & 0x0f); + } + + return (data >> 4); +} + +unsigned int dot_ram_1_read8(unsigned int address) +{ + uint8 data = READ_BYTE(scd.word_ram[1], (address >> 1) & 0x1ffff); + + if (address & 1) + { + return (data & 0x0f); + } + + return (data >> 4); +} + +void dot_ram_0_write8(unsigned int address, unsigned int data) +{ + uint8 prev = READ_BYTE(scd.word_ram[0], (address >> 1) & 0x1ffff); + + if (address & 1) + { + data = (prev & 0xf0) | (data & 0x0f); + } + else + { + data = (prev & 0x0f) | (data << 4); + } + + data = gfx.lut_prio[(scd.regs[0x02>>1].w >> 3) & 0x03][prev][data]; + WRITE_BYTE(scd.word_ram[0], (address >> 1) & 0x1ffff, data); +} + +void dot_ram_1_write8(unsigned int address, unsigned int data) +{ + uint8 prev = READ_BYTE(scd.word_ram[1], (address >> 1) & 0x1ffff); + + if (address & 1) + { + data = (prev & 0xf0) | (data & 0x0f); + } + else + { + data = (prev & 0x0f) | (data << 4); + } + + data = gfx.lut_prio[(scd.regs[0x02>>1].w >> 3) & 0x03][prev][data]; + WRITE_BYTE(scd.word_ram[1], (address >> 1) & 0x1ffff, data); +} + + +/***************************************************************/ +/* WORD-RAM 0 & 1 CELL image MAIN-CPU interface (1M Mode) */ +/***************************************************************/ + +unsigned int cell_ram_0_read16(unsigned int address) +{ + address = gfx.lut_offset[(address >> 2) & 0x7fff] | (address & 0x10002); + return *(uint16 *)(scd.word_ram[0] + address); +} + +unsigned int cell_ram_1_read16(unsigned int address) +{ + address = gfx.lut_offset[(address >> 2) & 0x7fff] | (address & 0x10002); + return *(uint16 *)(scd.word_ram[1] + address); +} + +void cell_ram_0_write16(unsigned int address, unsigned int data) +{ + address = gfx.lut_offset[(address >> 2) & 0x7fff] | (address & 0x10002); + *(uint16 *)(scd.word_ram[0] + address) = data; +} + +void cell_ram_1_write16(unsigned int address, unsigned int data) +{ + address = gfx.lut_offset[(address >> 2) & 0x7fff] | (address & 0x10002); + *(uint16 *)(scd.word_ram[1] + address) = data; +} + +unsigned int cell_ram_0_read8(unsigned int address) +{ + address = gfx.lut_offset[(address >> 2) & 0x7fff] | (address & 0x10003); + return READ_BYTE(scd.word_ram[0], address); +} + +unsigned int cell_ram_1_read8(unsigned int address) +{ + address = gfx.lut_offset[(address >> 2) & 0x7fff] | (address & 0x10003); + return READ_BYTE(scd.word_ram[1], address); +} + +void cell_ram_0_write8(unsigned int address, unsigned int data) +{ + address = gfx.lut_offset[(address >> 2) & 0x7fff] | (address & 0x10003); + WRITE_BYTE(scd.word_ram[0], address, data); +} + +void cell_ram_1_write8(unsigned int address, unsigned int data) +{ + address = gfx.lut_offset[(address >> 2) & 0x7fff] | (address & 0x10003); + WRITE_BYTE(scd.word_ram[1], address, data); +} + + +/***************************************************************/ +/* Rotation / Scaling operation (2M Mode) */ +/***************************************************************/ + +void gfx_init(void) +{ + int i, j; + uint16 offset; + uint8 mask, row, col, temp; + + memset(&gfx, 0, sizeof(gfx_t)); + + /* Initialize cell image lookup table */ + /* $220000-$22FFFF corresponds to $200000-$20FFFF */ + for (i=0; i<0x4000; i++) + { + offset = (i & 0x07) << 8; /* cell vline (0-7) */ + offset = offset | (((i >> 8) & 0x3f) << 2); /* cell x offset (0-63) */ + offset = offset | (((i >> 3) & 0x1f) << 11); /* cell y offset (0-31) */ + gfx.lut_offset[i] = offset; + } + + /* $230000-$237FFF corresponds to $210000-$217FFF */ + for (i=0x4000; i<0x6000; i++) + { + offset = (i & 0x07) << 8; /* cell vline (0-7) */ + offset = offset | (((i >> 7) & 0x3f) << 2); /* cell x offset (0-63) */ + offset = offset | (((i >> 3) & 0x0f) << 11); /* cell y offset (0-15) */ + gfx.lut_offset[i] = offset; + } + + /* $238000-$23BFFF corresponds to $218000-$21BFFF */ + for (i=0x6000; i<0x7000; i++) + { + offset = (i & 0x07) << 8; /* cell vline (0-7) */ + offset = offset | (((i >> 6) & 0x3f) << 2); /* cell x offset (0-63) */ + offset = offset | (((i >> 3) & 0x07) << 11); /* cell y offset (0-7) */ + gfx.lut_offset[i] = offset | 0x8000; + } + + /* $23C000-$23DFFF corresponds to $21C000-$21DFFF */ + for (i=0x7000; i<0x7800; i++) + { + offset = (i & 0x07) << 8; /* cell vline (0-7) */ + offset = offset | (((i >> 5) & 0x3f) << 2); /* cell x offset (0-63) */ + offset = offset | (((i >> 3) & 0x03) << 11); /* cell y offset (0-3) */ + gfx.lut_offset[i] = offset | 0xc000; + } + + /* $23E000-$23FFFF corresponds to $21E000-$21FFFF */ + for (i=0x7800; i<0x8000; i++) + { + offset = (i & 0x07) << 8; /* cell vline (0-7) */ + offset = offset | (((i >> 5) & 0x3f) << 2); /* cell x offset (0-63) */ + offset = offset | (((i >> 3) & 0x03) << 11); /* cell y offset (0-3) */ + gfx.lut_offset[i] = offset | 0xe000; + } + + /* Initialize priority modes lookup table */ + for (i=0; i<0x100; i++) + { + for (j=0; j<0x100; j++) + { + /* normal */ + gfx.lut_prio[0][i][j] = j; + /* underwrite */ + gfx.lut_prio[1][i][j] = ((i & 0x0f) ? (i & 0x0f) : (j & 0x0f)) | ((i & 0xf0) ? (i & 0xf0) : (j & 0xf0)); + /* overwrite */ + gfx.lut_prio[2][i][j] = ((j & 0x0f) ? (j & 0x0f) : (i & 0x0f)) | ((j & 0xf0) ? (j & 0xf0) : (i & 0xf0)); + /* invalid */ + gfx.lut_prio[3][i][j] = i; + } + } + + /* Initialize cell lookup table */ + /* table entry = yyxxshrr (8 bits) */ + /* with: yy = cell row (0-3) */ + /* xx = cell column (0-3) */ + /* s = stamp size (0=16x16, 1=32x32) */ + /* hrr = HFLIP & ROTATION bits */ + for (i=0; i<0x100; i++) + { + /* one stamp = 2x2 cells (16x16) or 4x4 cells (32x32) */ + mask = (i & 8) ? 3 : 1; + row = (i >> 6) & mask; + col = (i >> 4) & mask; + + if (i & 4) { col = col ^ mask; } /* HFLIP (always first) */ + if (i & 2) { col = col ^ mask; row = row ^ mask; } /* ROLL1 */ + if (i & 1) { temp = col; col = row ^ mask; row = temp; } /* ROLL0 */ + + /* cell offset (0-3 or 0-15) */ + gfx.lut_cell[i] = row + col * (mask + 1); + } + + /* Initialize pixel lookup table */ + /* table entry = yyyxxxhrr (9 bits) */ + /* with: yyy = pixel row (0-7) */ + /* xxx = pixel column (0-7) */ + /* hrr = HFLIP & ROTATION bits */ + for (i=0; i<0x200; i++) + { + /* one cell = 8x8 pixels */ + row = (i >> 6) & 7; + col = (i >> 3) & 7; + + if (i & 4) { col = col ^ 7; } /* HFLIP (always first) */ + if (i & 2) { col = col ^ 7; row = row ^ 7; } /* ROLL1 */ + if (i & 1) { temp = col; col = row ^ 7; row = temp; } /* ROLL0 */ + + /* pixel offset (0-63) */ + gfx.lut_pixel[i] = col + row * 8; + } +} + +void gfx_reset(void) +{ + /* Reset cycle counter */ + gfx.cycles = 0; +} + +int gfx_context_save(uint8 *state) +{ + uint32 tmp32; + int bufferptr = 0; + + save_param(&gfx.cycles, sizeof(gfx.cycles)); + save_param(&gfx.cyclesPerLine, sizeof(gfx.cyclesPerLine)); + save_param(&gfx.dotMask, sizeof(gfx.dotMask)); + save_param(&gfx.stampShift, sizeof(gfx.stampShift)); + save_param(&gfx.mapShift, sizeof(gfx.mapShift)); + save_param(&gfx.bufferOffset, sizeof(gfx.bufferOffset)); + save_param(&gfx.bufferStart, sizeof(gfx.bufferStart)); + + tmp32 = (uint8 *)(gfx.tracePtr) - scd.word_ram_2M; + save_param(&tmp32, 4); + + tmp32 = (uint8 *)(gfx.mapPtr) - scd.word_ram_2M; + save_param(&tmp32, 4); + + return bufferptr; +} + +int gfx_context_load(uint8 *state) +{ + uint32 tmp32; + int bufferptr = 0; + + load_param(&gfx.cycles, sizeof(gfx.cycles)); + load_param(&gfx.cyclesPerLine, sizeof(gfx.cyclesPerLine)); + load_param(&gfx.dotMask, sizeof(gfx.dotMask)); + load_param(&gfx.stampShift, sizeof(gfx.stampShift)); + load_param(&gfx.mapShift, sizeof(gfx.mapShift)); + load_param(&gfx.bufferOffset, sizeof(gfx.bufferOffset)); + load_param(&gfx.bufferStart, sizeof(gfx.bufferStart)); + + load_param(&tmp32, 4); + gfx.tracePtr = (uint16 *)(scd.word_ram_2M + tmp32); + + load_param(&tmp32, 4); + gfx.mapPtr = (uint16 *)(scd.word_ram_2M + tmp32); + + return bufferptr; +} + +INLINE void gfx_render(uint32 bufferIndex, uint32 width) +{ + uint8 pixel_in, pixel_out; + uint16 stamp_data; + uint32 stamp_index; + + /* pixel map start position for current line (13.3 format converted to 13.11) */ + uint32 xpos = *gfx.tracePtr++ << 8; + uint32 ypos = *gfx.tracePtr++ << 8; + + /* pixel map offset values for current line (5.11 format) */ + uint32 xoffset = (int16) *gfx.tracePtr++; + uint32 yoffset = (int16) *gfx.tracePtr++; + + /* process all dots */ + while (width--) + { + /* check if stamp map is repeated */ + if (scd.regs[0x58>>1].byte.l & 0x01) + { + /* stamp map range */ + xpos &= gfx.dotMask; + ypos &= gfx.dotMask; + } + else + { + /* 24-bit range */ + xpos &= 0xffffff; + ypos &= 0xffffff; + } + + /* check if pixel is outside stamp map */ + if ((xpos | ypos) & ~gfx.dotMask) + { + /* force pixel output to 0 */ + pixel_out = 0x00; + } + else + { + /* read stamp map table data */ + stamp_data = gfx.mapPtr[(xpos >> gfx.stampShift) | ((ypos >> gfx.stampShift) << gfx.mapShift)]; + + /* stamp generator base index */ + /* sss ssssssss ccyyyxxx (16x16) or sss sssssscc ccyyyxxx (32x32) */ + /* with: s = stamp number (1 stamp = 16x16 or 32x32 pixels) */ + /* c = cell offset (0-3 for 16x16, 0-15 for 32x32) */ + /* yyy = line offset (0-7) */ + /* xxx = pixel offset (0-7) */ + stamp_index = (stamp_data & 0x7ff) << 8; + + if (stamp_index) + { + /* extract HFLIP & ROTATION bits */ + stamp_data = (stamp_data >> 13) & 7; + + /* cell offset (0-3 or 0-15) */ + /* table entry = yyxxshrr (8 bits) */ + /* with: yy = cell row (0-3) = (ypos >> (11 + 3)) & 3 */ + /* xx = cell column (0-3) = (xpos >> (11 + 3)) & 3 */ + /* s = stamp size (0=16x16, 1=32x32) */ + /* hrr = HFLIP & ROTATION bits */ + stamp_index |= gfx.lut_cell[stamp_data | ((scd.regs[0x58>>1].byte.l & 0x02) << 2 ) | ((ypos >> 8) & 0xc0) | ((xpos >> 10) & 0x30)] << 6; + + /* pixel offset (0-63) */ + /* table entry = yyyxxxhrr (9 bits) */ + /* with: yyy = pixel row (0-7) = (ypos >> 11) & 7 */ + /* xxx = pixel column (0-7) = (xpos >> 11) & 7 */ + /* hrr = HFLIP & ROTATION bits */ + stamp_index |= gfx.lut_pixel[stamp_data | ((xpos >> 8) & 0x38) | ((ypos >> 5) & 0x1c0)]; + + /* read pixel pair (2 pixels/byte) */ + pixel_out = READ_BYTE(scd.word_ram_2M, stamp_index >> 1); + + /* extract left or rigth pixel */ + if (stamp_index & 1) + { + pixel_out &= 0x0f; + } + else + { + pixel_out >>= 4; + } + } + else + { + /* stamp 0 is not used: force pixel output to 0 */ + pixel_out = 0x00; + } + } + + /* read out paired pixel data */ + pixel_in = READ_BYTE(scd.word_ram_2M, bufferIndex >> 1); + + /* update left or rigth pixel */ + if (bufferIndex & 1) + { + pixel_out |= (pixel_in & 0xf0); + } + else + { + pixel_out = (pixel_out << 4) | (pixel_in & 0x0f); + } + + /* priority mode write */ + pixel_out = gfx.lut_prio[(scd.regs[0x02>>1].w >> 3) & 0x03][pixel_in][pixel_out]; + + /* write data to image buffer */ + WRITE_BYTE(scd.word_ram_2M, bufferIndex >> 1, pixel_out); + + /* check current pixel position */ + if ((bufferIndex & 7) != 7) + { + /* next pixel */ + bufferIndex++; + } + else + { + /* next cell: increment image buffer offset by one column (minus 7 pixels) */ + bufferIndex += gfx.bufferOffset; + } + + /* increment pixel position */ + xpos += xoffset; + ypos += yoffset; + } +} + +void gfx_start(unsigned int base, int cycles) +{ + /* make sure 2M mode is enabled */ + if (!(scd.regs[0x02>>1].byte.l & 0x04)) + { + uint32 mask; + + /* trace vector pointer */ + gfx.tracePtr = (uint16 *)(scd.word_ram_2M + ((base << 2) & 0x3fff8)); + + /* stamps & stamp map size */ + switch ((scd.regs[0x58>>1].byte.l >> 1) & 0x03) + { + case 0: + gfx.dotMask = 0x07ffff; /* 256x256 dots/map */ + gfx.stampShift = 11 + 4; /* 16x16 dots/stamps */ + gfx.mapShift = 4; /* 16x16 stamps/map */ + mask = 0x3fe00; /* 512 bytes/table */ + break; + + case 1: + gfx.dotMask = 0x07ffff; /* 256x256 dots/map */ + gfx.stampShift = 11 + 5; /* 32x32 dots/stamps */ + gfx.mapShift = 3; /* 8x8 stamps/map */ + mask = 0x3ff80; /* 128 bytes/table */ + break; + + case 2: + gfx.dotMask = 0x7fffff; /* 4096*4096 dots/map */ + gfx.stampShift = 11 + 4; /* 16x16 dots/stamps */ + gfx.mapShift = 8; /* 256x256 stamps/map */ + mask = 0x20000; /* 131072 bytes/table */ + break; + + case 3: + gfx.dotMask = 0x7fffff; /* 4096*4096 dots/map */ + gfx.stampShift = 11 + 5; /* 32x32 dots/stamps */ + gfx.mapShift = 7; /* 128x128 stamps/map */ + mask = 0x38000; /* 32768 bytes/table */ + break; + } + + /* stamp map table base address */ + gfx.mapPtr = (uint16 *)(scd.word_ram_2M + ((scd.regs[0x5a>>1].w << 2) & mask)); + + /* image buffer column offset (64 pixels/cell, minus 7 pixels to restart at cell beginning) */ + gfx.bufferOffset = (((scd.regs[0x5c>>1].byte.l & 0x1f) + 1) << 6) - 7; + + /* image buffer start index in dot units (2 pixels/byte) */ + gfx.bufferStart = (scd.regs[0x5e>>1].w << 3) & 0x7ffc0; + + /* add image buffer horizontal dot offset */ + gfx.bufferStart += (scd.regs[0x60>>1].byte.l & 0x3f); + + /* reset GFX chip cycle counter */ + gfx.cycles = cycles; + + /* update GFX chip timings (see AC3:Thunderhawk / Thunderstrike) */ + gfx.cyclesPerLine = 4 * 5 * scd.regs[0x62>>1].w; + + /* start graphics operation */ + scd.regs[0x58>>1].byte.h = 0x80; + } +} + +void gfx_update(int cycles) +{ + /* synchronize GFX chip with SUB-CPU */ + cycles -= gfx.cycles; + + /* make sure SUB-CPU is ahead */ + if (cycles > 0) + { + /* number of lines to process */ + unsigned int lines = (cycles + gfx.cyclesPerLine - 1) / gfx.cyclesPerLine; + + /* check against remaining lines */ + if (lines < scd.regs[0x64>>1].byte.l) + { + /* update Vdot remaining size */ + scd.regs[0x64>>1].byte.l -= lines; + + /* increment cycle counter */ + gfx.cycles += lines * gfx.cyclesPerLine; + } + else + { + /* process remaining lines */ + lines = scd.regs[0x64>>1].byte.l; + + /* clear Vdot remaining size */ + scd.regs[0x64>>1].byte.l = 0; + + /* end of graphics operation */ + scd.regs[0x58>>1].byte.h = 0; + + /* SUB-CPU idle on register $58 polling ? */ + if (s68k.stopped & (1<<0x08)) + { + /* sync SUB-CPU with GFX chip */ + s68k.cycles = scd.cycles; + + /* restart SUB-CPU */ + s68k.stopped = 0; +#ifdef LOG_SCD + error("s68k started from %d cycles\n", s68k.cycles); +#endif + } + + /* level 1 interrupt enabled ? */ + if (scd.regs[0x32>>1].byte.l & 0x02) + { + /* trigger level 1 interrupt */ + scd.pending |= (1 << 1); + + /* update IRQ level */ + s68k_update_irq((scd.pending & scd.regs[0x32>>1].byte.l) >> 1); + } + } + + /* render lines */ + while (lines--) + { + /* process dots to image buffer */ + gfx_render(gfx.bufferStart, scd.regs[0x62>>1].w); + + /* increment image buffer start index for next line (8 pixels/line) */ + gfx.bufferStart += 8; + } + } +} diff --git a/genplus-gx/core/cd_hw/gfx.h b/genplus-gx/core/cd_hw/gfx.h new file mode 100644 index 0000000000..c1ca497efb --- /dev/null +++ b/genplus-gx/core/cd_hw/gfx.h @@ -0,0 +1,116 @@ +/*************************************************************************************** + * Genesis Plus + * CD graphics processor + * + * Copyright (C) 2012 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ +#ifndef _CD_GFX_ +#define _CD_GFX_ + +#define gfx scd.gfx_hw + +typedef struct +{ + uint32 cycles; /* current cycles count for graphics operation */ + uint32 cyclesPerLine; /* current graphics operation timings */ + uint32 dotMask; /* stamp map size mask */ + uint16 *tracePtr; /* trace vector pointer */ + uint16 *mapPtr; /* stamp map table base address */ + uint8 stampShift; /* stamp pixel shift value (related to stamp size) */ + uint8 mapShift; /* stamp map table shift value (related to stamp map size) */ + uint16 bufferOffset; /* image buffer column offset */ + uint32 bufferStart; /* image buffer start index */ + uint16 lut_offset[0x8000]; /* Cell Image -> WORD-RAM offset lookup table (1M Mode) */ + uint8 lut_prio[4][0x100][0x100]; /* WORD-RAM data writes priority lookup table */ + uint8 lut_pixel[0x200]; /* Graphics operation dot offset lookup table */ + uint8 lut_cell[0x100]; /* Graphics operation stamp offset lookup table */ +} gfx_t; + + +/***************************************************************/ +/* WORD-RAM DMA interfaces (1M & 2M modes) */ +/***************************************************************/ +extern void word_ram_0_dma_w(unsigned int words); +extern void word_ram_1_dma_w(unsigned int words); +extern void word_ram_2M_dma_w(unsigned int words); + +/***************************************************************/ +/* WORD-RAM 0 & 1 CPU interfaces (1M mode) */ +/***************************************************************/ +extern unsigned int word_ram_0_read16(unsigned int address); +extern unsigned int word_ram_1_read16(unsigned int address); +extern void word_ram_0_write16(unsigned int address, unsigned int data); +extern void word_ram_1_write16(unsigned int address, unsigned int data); +extern unsigned int word_ram_0_read8(unsigned int address); +extern unsigned int word_ram_1_read8(unsigned int address); +extern void word_ram_0_write8(unsigned int address, unsigned int data); +extern void word_ram_1_write8(unsigned int address, unsigned int data); + +/***************************************************************/ +/* WORD-RAM 0 & 1 DOT image SUB-CPU interface (1M mode) */ +/***************************************************************/ +extern unsigned int dot_ram_0_read16(unsigned int address); +extern unsigned int dot_ram_1_read16(unsigned int address); +extern void dot_ram_0_write16(unsigned int address, unsigned int data); +extern void dot_ram_1_write16(unsigned int address, unsigned int data); +extern unsigned int dot_ram_0_read8(unsigned int address); +extern unsigned int dot_ram_1_read8(unsigned int address); +extern void dot_ram_0_write8(unsigned int address, unsigned int data); +extern void dot_ram_1_write8(unsigned int address, unsigned int data); + + +/***************************************************************/ +/* WORD-RAM 0 & 1 CELL image MAIN-CPU interface (1M mode) */ +/***************************************************************/ +extern unsigned int cell_ram_0_read16(unsigned int address); +extern unsigned int cell_ram_1_read16(unsigned int address); +extern void cell_ram_0_write16(unsigned int address, unsigned int data); +extern void cell_ram_1_write16(unsigned int address, unsigned int data); +extern unsigned int cell_ram_0_read8(unsigned int address); +extern unsigned int cell_ram_1_read8(unsigned int address); +extern void cell_ram_0_write8(unsigned int address, unsigned int data); +extern void cell_ram_1_write8(unsigned int address, unsigned int data); + + +/***************************************************************/ +/* Rotation / Scaling operation (2M mode) */ +/***************************************************************/ +extern void gfx_init(void); +extern void gfx_reset(void); +extern int gfx_context_save(uint8 *state); +extern int gfx_context_load(uint8 *state); +extern void gfx_start(unsigned int base, int cycles); +extern void gfx_update(int cycles); + +#endif diff --git a/genplus-gx/core/cd_hw/pcm.c b/genplus-gx/core/cd_hw/pcm.c new file mode 100644 index 0000000000..05a2bf91cf --- /dev/null +++ b/genplus-gx/core/cd_hw/pcm.c @@ -0,0 +1,442 @@ +/*************************************************************************************** + * Genesis Plus + * PCM sound chip (315-5476A) (RF5C164 compatible) + * + * Copyright (C) 2012 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ +#include "shared.h" + +#define PCM_SCYCLES_RATIO (384 * 4) + +#define pcm scd.pcm_hw + +static blip_t* blip[2]; + +void pcm_init(blip_t* left, blip_t* right) +{ + /* number of SCD master clocks run per second */ + double mclk = snd.frame_rate ? (SCYCLES_PER_LINE * (vdp_pal ? 313 : 262) * snd.frame_rate) : SCD_CLOCK; + + /* PCM chips is running at original rate and is synchronized with SUB-CPU */ + /* Chip output is resampled to desired rate using Blip Buffer. */ + blip[0] = left; + blip[1] = right; + blip_set_rates(left, mclk / PCM_SCYCLES_RATIO, snd.sample_rate); + blip_set_rates(right, mclk / PCM_SCYCLES_RATIO, snd.sample_rate); +} + +void pcm_reset(void) +{ + /* reset chip & clear external RAM */ + memset(&pcm, 0, sizeof(pcm_t)); + + /* reset default bank */ + pcm.bank = pcm.ram; + + /* reset channels stereo panning */ + pcm.chan[0].pan = 0xff; + pcm.chan[1].pan = 0xff; + pcm.chan[2].pan = 0xff; + pcm.chan[3].pan = 0xff; + pcm.chan[4].pan = 0xff; + pcm.chan[5].pan = 0xff; + pcm.chan[6].pan = 0xff; + pcm.chan[7].pan = 0xff; + + /* reset master clocks counter */ + pcm.cycles = 0; + + /* clear blip buffers */ + blip_clear(blip[0]); + blip_clear(blip[1]); +} + +int pcm_context_save(uint8 *state) +{ + uint8 tmp8; + int bufferptr = 0; + + tmp8 = (pcm.bank - pcm.ram) >> 12; + + save_param(pcm.chan, sizeof(pcm.chan)); + save_param(pcm.out, sizeof(pcm.out)); + save_param(&tmp8, 1); + save_param(&pcm.enabled, sizeof(pcm.enabled)); + save_param(&pcm.status, sizeof(pcm.status)); + save_param(&pcm.index, sizeof(pcm.index)); + save_param(pcm.ram, sizeof(pcm.ram)); + + return bufferptr; +} + +int pcm_context_load(uint8 *state) +{ + uint8 tmp8; + int bufferptr = 0; + + load_param(pcm.chan, sizeof(pcm.chan)); + load_param(pcm.out, sizeof(pcm.out)); + + load_param(&tmp8, 1); + pcm.bank = &pcm.ram[(tmp8 & 0x0f) << 12]; + + load_param(&pcm.enabled, sizeof(pcm.enabled)); + load_param(&pcm.status, sizeof(pcm.status)); + load_param(&pcm.index, sizeof(pcm.index)); + load_param(pcm.ram, sizeof(pcm.ram)); + + return bufferptr; +} + +void pcm_run(unsigned int length) +{ +#ifdef LOG_PCM + error("[%d][%d]run %d PCM samples (from %d)\n", v_counter, s68k.cycles, length, pcm.cycles); +#endif + /* check if PCM chip is running */ + if (pcm.enabled) + { + int i, j, l, r; + + /* generate PCM samples */ + for (i=0; i> 11) & 0xffff]; + + /* loop data ? */ + if (data == 0xff) + { + /* reset WAVE RAM address */ + pcm.chan[j].addr = pcm.chan[j].ls.w << 11; + + /* read again from WAVE RAM address */ + data = pcm.ram[pcm.chan[j].ls.w]; + } + else + { + /* increment WAVE RAM address */ + pcm.chan[j].addr += pcm.chan[j].fd.w; + } + + /* infinite loop should not output any data */ + if (data != 0xff) + { + /* check sign bit (output centered around 0) */ + if (data & 0x80) + { + /* PCM data is positive */ + data = data & 0x7f; + } + else + { + /* PCM data is negative */ + data = -(data & 0x7f); + } + + /* multiply PCM data with ENV & stereo PAN data then add to L/R outputs (14.5 fixed point) */ + l += ((data * pcm.chan[j].env * (pcm.chan[j].pan & 0x0F)) >> 5); + r += ((data * pcm.chan[j].env * (pcm.chan[j].pan >> 4)) >> 5); + } + } + } + + /* limiter */ + if (l < -32768) l = -32768; + else if (l > 32767) l = 32767; + if (r < -32768) r = -32768; + else if (r > 32767) r = 32767; + + /* check if PCM left output changed */ + if (pcm.out[0] != l) + { + blip_add_delta_fast(blip[0], i, l-pcm.out[0]); + pcm.out[0] = l; + } + + /* check if PCM right output changed */ + if (pcm.out[1] != r) + { + blip_add_delta_fast(blip[1], i, r-pcm.out[1]); + pcm.out[1] = r; + } + } + } + else + { + /* check if PCM left output changed */ + if (pcm.out[0]) + { + blip_add_delta_fast(blip[0], 0, -pcm.out[0]); + pcm.out[0] = 0; + } + + /* check if PCM right output changed */ + if (pcm.out[1]) + { + blip_add_delta_fast(blip[1], 0, -pcm.out[1]); + pcm.out[1] = 0; + } + } + + /* end of blip buffer frame */ + blip_end_frame(blip[0], length); + blip_end_frame(blip[1], length); + + /* update PCM master clock counter */ + pcm.cycles += length * PCM_SCYCLES_RATIO; +} + +void pcm_update(unsigned int samples) +{ + /* get number of internal clocks (samples) needed */ + unsigned int clocks = blip_clocks_needed(blip[0], samples); + + /* run PCM chip */ + if (clocks > 0) + { + pcm_run(clocks); + } + + /* reset PCM master clocks counter */ + pcm.cycles = 0; +} + +void pcm_write(unsigned int address, unsigned char data) +{ + /* synchronize PCM chip with SUB-CPU */ + int clocks = s68k.cycles - pcm.cycles; + if (clocks > 0) + { + /* number of internal clocks (samples) to run */ + clocks = (clocks + PCM_SCYCLES_RATIO - 1) / PCM_SCYCLES_RATIO; + pcm_run(clocks); + } + +#ifdef LOG_PCM + error("[%d][%d]PCM write %x -> 0x%02x (%X)\n", v_counter, s68k.cycles, address, data, s68k.pc); +#endif + + /* external RAM is mapped to $1000-$1FFF */ + if (address >= 0x1000) + { + /* 4K bank access */ + pcm.bank[address & 0xfff] = data; + return; + } + + /* internal area si mapped to $0000-$0FFF */ + switch (address) + { + case 0x00: /* ENV register */ + { + /* update channel ENV multiplier */ + pcm.chan[pcm.index].env = data; + return; + } + + case 0x01: /* PAN register */ + { + /* update channel stereo panning value */ + pcm.chan[pcm.index].pan = data; + return; + } + + case 0x02: /* FD register (LSB) */ + { + /* update channel WAVE RAM address increment LSB */ + pcm.chan[pcm.index].fd.byte.l = data; + return; + } + + case 0x03: /* FD register (MSB) */ + { + /* update channel WAVE RAM address increment MSB */ + pcm.chan[pcm.index].fd.byte.h = data; + return; + } + + case 0x04: /* LS register (LSB) */ + { + /* update channel WAVE RAM loop address LSB */ + pcm.chan[pcm.index].ls.byte.l = data; + return; + } + + case 0x05: /* LS register (MSB) */ + { + /* update channel WAVE RAM loop address MSB */ + pcm.chan[pcm.index].ls.byte.h = data; + return; + } + + case 0x06: /* ST register */ + { + /* update channel WAVE RAM start address (16.11 fixed point) */ + pcm.chan[pcm.index].st = data << (8 + 11); + + /* reload WAVE RAM address if channel is OFF */ + if (!(pcm.status & (1 << pcm.index))) + { + pcm.chan[pcm.index].addr = pcm.chan[pcm.index].st; + } + return; + } + + case 0x07: /* CTRL register */ + { + if (data & 0x40) + { + /* channel selection (0-7) */ + pcm.index = data & 0x07; + } + else + { + /* external RAM bank selection (16 x 4K) */ + pcm.bank = &pcm.ram[(data & 0x0f) << 12]; + } + + /* update PCM chip status (bit 7) */ + pcm.enabled = data & 0x80; + return; + } + + case 0x08: /* ON/OFF register */ + { + /* update PCM channels status */ + pcm.status = ~data; + + /* reload WAVE RAM address pointers when channels are OFF */ + if (data & 0x01) pcm.chan[0].addr = pcm.chan[0].st; + if (data & 0x02) pcm.chan[1].addr = pcm.chan[1].st; + if (data & 0x04) pcm.chan[2].addr = pcm.chan[2].st; + if (data & 0x08) pcm.chan[3].addr = pcm.chan[3].st; + if (data & 0x10) pcm.chan[4].addr = pcm.chan[4].st; + if (data & 0x20) pcm.chan[5].addr = pcm.chan[5].st; + if (data & 0x40) pcm.chan[6].addr = pcm.chan[6].st; + if (data & 0x80) pcm.chan[7].addr = pcm.chan[7].st; + return; + } + + default: + { + /* illegal access */ + return; + } + } +} + +unsigned char pcm_read(unsigned int address) +{ + /* synchronize PCM chip with SUB-CPU */ + int clocks = s68k.cycles - pcm.cycles; + if (clocks > 0) + { + /* number of internal clocks (samples) to run */ + clocks = (clocks + PCM_SCYCLES_RATIO - 1) / PCM_SCYCLES_RATIO; + pcm_run(clocks); + } + +#ifdef LOG_PCM + error("[%d][%d]PCM read (%X)\n", v_counter, s68k.cycles, address, s68k.pc); +#endif + + /* external RAM (TODO: verify if possible to read, some docs claim it's not !) */ + if (address >= 0x1000) + { + /* 4K bank access */ + return pcm.bank[address & 0xfff]; + } + + /* read WAVE RAM address pointers */ + if ((address >= 0x10) && (address < 0x20)) + { + int index = (address >> 1) & 0x07; + + if (address & 1) + { + return (pcm.chan[index].addr >> (11 + 8)) & 0xff; + } + else + { + return (pcm.chan[index].addr >> 11) & 0xff; + } + } + + /* illegal access */ + return 0xff; +} + +void pcm_ram_dma_w(unsigned int words) +{ + uint16 data; + + /* CDC buffer source address */ + uint16 src_index = cdc.dac.w & 0x3ffe; + + /* PCM-RAM destination address*/ + uint16 dst_index = (scd.regs[0x0a>>1].w << 2) & 0xffe; + + /* update DMA destination address */ + scd.regs[0x0a>>1].w += (words >> 1); + + /* update DMA source address */ + cdc.dac.w += (words << 1); + + /* DMA transfer */ + while (words--) + { + /* read 16-bit word from CDC buffer */ + data = *(uint16 *)(cdc.ram + src_index); + + /* write 16-bit word to PCM RAM (endianness does not matter since PCM RAM is always accessed as byte)*/ + *(uint16 *)(pcm.bank + dst_index) = data ; + + /* increment CDC buffer source address */ + src_index = (src_index + 2) & 0x3ffe; + + /* increment PCM-RAM destination address */ + dst_index = (dst_index + 2) & 0xffe; + } +} + diff --git a/genplus-gx/core/cd_hw/pcm.h b/genplus-gx/core/cd_hw/pcm.h new file mode 100644 index 0000000000..d0fe47789b --- /dev/null +++ b/genplus-gx/core/cd_hw/pcm.h @@ -0,0 +1,77 @@ +/*************************************************************************************** + * Genesis Plus + * PCM sound chip (315-5476A) (RF5C164 compatible) + * + * Copyright (C) 2012 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ +#ifndef _CD_PCM_ +#define _CD_PCM_ + +#include "blip_buf.h" + +/* PCM channel */ +typedef struct +{ + uint32 addr; /* current Wave RAM address (16.11 fixed point) */ + uint32 st; /* Wave RAM start address (16.11 fixed point) */ + reg16_t ls; /* Wave RAM loop address ($0000-$ffff) */ + reg16_t fd; /* Wave RAM address increment (5.11 fixed point) */ + uint8 env; /* enveloppe multiplier */ + uint8 pan; /* stereo panning */ +} chan_t; + +/* PCM sound chip */ +typedef struct +{ + chan_t chan[8]; /* PCM channels 1-8 */ + int16 out[2]; /* previous PCM stereo output */ + uint8 *bank; /* external RAM bank pointer */ + uint8 enabled; /* PCM chip ON/OFF status */ + uint8 status; /* channels ON/OFF status */ + uint8 index; /* current channel index */ + uint8 ram[0x10000]; /* 64k external RAM */ + uint32 cycles; +} pcm_t; + +/* Function prototypes */ +extern void pcm_init(blip_t* left, blip_t* right); +extern void pcm_reset(void); +extern int pcm_context_save(uint8 *state); +extern int pcm_context_load(uint8 *state); +extern void pcm_update(unsigned int samples); +extern void pcm_write(unsigned int address, unsigned char data); +extern unsigned char pcm_read(unsigned int address); +extern void pcm_ram_dma_w(unsigned int words); + +#endif diff --git a/genplus-gx/core/cd_hw/scd.c b/genplus-gx/core/cd_hw/scd.c new file mode 100644 index 0000000000..378ac3f086 --- /dev/null +++ b/genplus-gx/core/cd_hw/scd.c @@ -0,0 +1,1673 @@ +/*************************************************************************************** + * Genesis Plus + * Mega CD / Sega CD hardware + * + * Copyright (C) 2012-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + +/*--------------------------------------------------------------------------*/ +/* Unused area (return open bus data, i.e prefetched instruction word) */ +/*--------------------------------------------------------------------------*/ +static unsigned int s68k_read_bus_8(unsigned int address) +{ +#ifdef LOGERROR + error("[SUB 68k] Unused read8 %08X (%08X)\n", address, s68k.pc); +#endif + address = s68k.pc | (address & 1); + return READ_BYTE(s68k.memory_map[((address)>>16)&0xff].base, (address) & 0xffff); +} + +static unsigned int s68k_read_bus_16(unsigned int address) +{ +#ifdef LOGERROR + error("[SUB 68k] Unused read16 %08X (%08X)\n", address, s68k.pc); +#endif + address = s68k.pc; + return *(uint16 *)(s68k.memory_map[((address)>>16)&0xff].base + ((address) & 0xffff)); +} + +static void s68k_unused_8_w(unsigned int address, unsigned int data) +{ +#ifdef LOGERROR + error("[SUB 68k] Unused write8 %08X = %02X (%08X)\n", address, data, s68k.pc); +#endif +} + +static void s68k_unused_16_w(unsigned int address, unsigned int data) +{ +#ifdef LOGERROR + error("[SUB 68k] Unused write16 %08X = %04X (%08X)\n", address, data, s68k.pc); +#endif +} + +/*--------------------------------------------------------------------------*/ +/* PRG-RAM DMA access */ +/*--------------------------------------------------------------------------*/ +void prg_ram_dma_w(unsigned int words) +{ + uint16 data; + + /* CDC buffer source address */ + uint16 src_index = cdc.dac.w & 0x3ffe; + + /* PRG-RAM destination address*/ + uint32 dst_index = (scd.regs[0x0a>>1].w << 3) & 0x7fffe; + + /* update DMA destination address */ + scd.regs[0x0a>>1].w += (words >> 2); + + /* update DMA source address */ + cdc.dac.w += (words << 1); + + /* check PRG-RAM write protected area */ + if (dst_index < (scd.regs[0x02>>1].byte.h << 9)) + { + return; + } + + /* DMA transfer */ + while (words--) + { + /* read 16-bit word from CDC buffer */ + data = *(uint16 *)(cdc.ram + src_index); + +#ifdef LSB_FIRST + /* source data is stored in big endian format */ + data = ((data >> 8) | (data << 8)) & 0xffff; +#endif + + /* write 16-bit word to PRG-RAM */ + *(uint16 *)(scd.prg_ram + dst_index) = data ; + + /* increment CDC buffer source address */ + src_index = (src_index + 2) & 0x3ffe; + + /* increment PRG-RAM destination address */ + dst_index = (dst_index + 2) & 0x7fffe; + } +} + +/*--------------------------------------------------------------------------*/ +/* PRG-RAM write protected area */ +/*--------------------------------------------------------------------------*/ +static void prg_ram_write_byte(unsigned int address, unsigned int data) +{ + address &= 0x7ffff; + if (address >= (scd.regs[0x02>>1].byte.h << 9)) + { + WRITE_BYTE(scd.prg_ram, address, data); + return; + } +#ifdef LOGERROR + error("[SUB 68k] PRG-RAM protected write8 %08X = %02X (%08X)\n", address, data, s68k.pc); +#endif +} + +static void prg_ram_write_word(unsigned int address, unsigned int data) +{ + address &= 0x7fffe; + if (address >= (scd.regs[0x02>>1].byte.h << 9)) + { + *(uint16 *)(scd.prg_ram + address) = data; + return; + } +#ifdef LOGERROR + error("[SUB 68k] PRG-RAM protected write16 %08X = %02X (%08X)\n", address, data, s68k.pc); +#endif +} + +/*--------------------------------------------------------------------------*/ +/* internal backup RAM (8KB) */ +/*--------------------------------------------------------------------------*/ +static unsigned int bram_read_byte(unsigned int address) +{ + /* LSB only */ + if (address & 1) + { + return scd.bram[(address >> 1) & 0x1fff]; + } + + return 0xff; +} + +static unsigned int bram_read_word(unsigned int address) +{ + return (scd.bram[(address >> 1) & 0x1fff] | 0xff00); +} + +static void bram_write_byte(unsigned int address, unsigned int data) +{ + /* LSB only */ + if (address & 1) + { + scd.bram[(address >> 1) & 0x1fff] = data; + } +} + +static void bram_write_word(unsigned int address, unsigned int data) +{ + scd.bram[(address >> 1) & 0x1fff] = data & 0xff; +} + +/*--------------------------------------------------------------------------*/ +/* PCM chip & Gate-Array area */ +/*--------------------------------------------------------------------------*/ + +static void s68k_poll_detect(unsigned int reg_mask) +{ + /* detect SUB-CPU register polling */ + if (s68k.poll.detected & reg_mask) + { + if (s68k.cycles <= s68k.poll.cycle) + { + if (s68k.pc == s68k.poll.pc) + { + /* SUB-CPU polling confirmed ? */ + if (s68k.poll.detected & 1) + { + /* idle SUB-CPU until register is modified */ + s68k.cycles = s68k.cycle_end; + s68k.stopped = reg_mask; +#ifdef LOG_SCD + error("s68k stopped from %d cycles\n", s68k.cycles); +#endif + } + else + { + /* confirm SUB-CPU polling */ + s68k.poll.detected |= 1; + s68k.poll.cycle = s68k.cycles + 392; + } + } + return; + } + } + else + { + /* set SUB-CPU register access flag */ + s68k.poll.detected = reg_mask; + } + + /* reset SUB-CPU polling detection */ + s68k.poll.cycle = s68k.cycles + 392; + s68k.poll.pc = s68k.pc; +} + +static void s68k_poll_sync(unsigned int reg_mask) +{ + /* relative MAIN-CPU cycle counter */ + unsigned int cycles = (s68k.cycles * MCYCLES_PER_LINE) / SCYCLES_PER_LINE; + + /* sync MAIN-CPU with SUB-CPU */ + if (!m68k.stopped) + { + m68k_run(cycles); + } + + /* MAIN-CPU idle on register polling ? */ + if (m68k.stopped & reg_mask) + { + /* sync MAIN-CPU with SUB-CPU */ + m68k.cycles = cycles; + + /* restart MAIN-CPU */ + m68k.stopped = 0; +#ifdef LOG_SCD + error("m68k started from %d cycles\n", cycles); +#endif + } + + /* clear CPU register access flags */ + s68k.poll.detected &= ~reg_mask; + m68k.poll.detected &= ~reg_mask; +} + +static unsigned int scd_read_byte(unsigned int address) +{ + /* PCM area (8K) is mirrored into $FF0000-$FF7FFF */ + if (address < 0xff8000) + { + /* get /LDS only */ + if (address & 1) + { + return pcm_read((address >> 1) & 0x1fff); + } + + return s68k_read_bus_8(address); + } + +#ifdef LOG_SCD + error("[%d][%d]read byte CD register %X (%X)\n", v_counter, s68k.cycles, address, s68k.pc); +#endif + + /* Memory Mode */ + if (address == 0xff8003) + { + s68k_poll_detect(1<<0x03); + return scd.regs[0x03>>1].byte.l; + } + + /* MAIN-CPU communication flags */ + if (address == 0xff800e) + { + s68k_poll_detect(1<<0x0e); + return scd.regs[0x0e>>1].byte.h; + } + + /* CDC transfer status */ + if (address == 0xff8004) + { + s68k_poll_detect(1<<0x04); + return scd.regs[0x04>>1].byte.h; + } + + /* GFX operation status */ + if (address == 0xff8058) + { + s68k_poll_detect(1<<0x08); + return scd.regs[0x58>>1].byte.h; + } + + /* CDC register data (controlled by BIOS, byte access only ?) */ + if (address == 0xff8007) + { + unsigned int data = cdc_reg_r(); +#ifdef LOG_CDC + error("CDC register %X read 0x%02X (%X)\n", scd.regs[0x04>>1].byte.l & 0x0F, data, s68k.pc); +#endif + return data; + } + + /* LED status */ + if (address == 0xff8000) + { + /* register $00 is reserved for MAIN-CPU, we use $06 instead */ + return scd.regs[0x06>>1].byte.h; + } + + /* RESET status */ + if (address == 0xff8001) + { + /* always return 1 */ + return 0x01; + } + + /* Font data */ + if ((address >= 0xff8050) && (address <= 0xff8056)) + { + /* shifted 4-bit input (xxxx00) */ + uint8 bits = (scd.regs[0x4e>>1].w >> (((address & 6) ^ 6) << 1)) << 2; + + /* color code */ + uint8 code = scd.regs[0x4c>>1].byte.l; + + /* 16-bit font data (4 pixels = 16 bits) */ + uint16 data = (code >> (bits & 4)) & 0x0f; + + bits = bits >> 1; + data = data | (((code >> (bits & 4)) << 4) & 0xf0); + + bits = bits >> 1; + data = data | (((code >> (bits & 4)) << 8) & 0xf00); + + bits = bits >> 1; + data = data | (((code >> (bits & 4)) << 12) & 0xf000); + + return (address & 1) ? (data & 0xff) : (data >> 8); + } + + /* MAIN-CPU communication words */ + if ((address & 0x1f0) == 0x10) + { + s68k_poll_detect(1 << (address & 0x1f)); + } + + /* default registers */ + if (address & 1) + { + /* register LSB */ + return scd.regs[(address >> 1) & 0xff].byte.l; + } + + /* register MSB */ + return scd.regs[(address >> 1) & 0xff].byte.h; +} + +static unsigned int scd_read_word(unsigned int address) +{ + /* PCM area (8K) is mirrored into $FF0000-$FF7FFF */ + if (address < 0xff8000) + { + /* get /LDS only */ + return pcm_read((address >> 1) & 0x1fff); + } + +#ifdef LOG_SCD + error("[%d][%d]read word CD register %X (%X)\n", v_counter, s68k.cycles, address, s68k.pc); +#endif + + /* Memory Mode */ + if (address == 0xff8002) + { + s68k_poll_detect(1<<0x03); + return scd.regs[0x03>>1].w; + } + + /* CDC host data (word access only ?) */ + if (address == 0xff8008) + { + return cdc_host_r(); + } + + /* LED & RESET status */ + if (address == 0xff8000) + { + /* register $00 is reserved for MAIN-CPU, we use $06 instead */ + return scd.regs[0x06>>1].w; + } + + /* Stopwatch counter (word access only ?) */ + if (address == 0xff800c) + { + /* cycle-accurate counter value */ + return (scd.regs[0x0c>>1].w + ((s68k.cycles - scd.stopwatch) / TIMERS_SCYCLES_RATIO)) & 0xfff; + } + + /* Font data */ + if ((address >= 0xff8050) && (address <= 0xff8056)) + { + /* shifted 4-bit input (xxxx00) */ + uint8 bits = (scd.regs[0x4e>>1].w >> (((address & 6) ^ 6) << 1)) << 2; + + /* color code */ + uint8 code = scd.regs[0x4c>>1].byte.l; + + /* 16-bit font data (4 pixels = 16 bits) */ + uint16 data = (code >> (bits & 4)) & 0x0f; + + bits = bits >> 1; + data = data | (((code >> (bits & 4)) << 4) & 0xf0); + + bits = bits >> 1; + data = data | (((code >> (bits & 4)) << 8) & 0xf00); + + bits = bits >> 1; + data = data | (((code >> (bits & 4)) << 12) & 0xf000); + + return data; + } + + /* MAIN-CPU communication words */ + if ((address & 0x1f0) == 0x10) + { + if (!m68k.stopped) + { + /* relative MAIN-CPU cycle counter */ + unsigned int cycles = (s68k.cycles * MCYCLES_PER_LINE) / SCYCLES_PER_LINE; + + /* sync MAIN-CPU with SUB-CPU (Mighty Morphin Power Rangers) */ + m68k_run(cycles); + } + + s68k_poll_detect(3 << (address & 0x1e)); + } + + /* default registers */ + return scd.regs[(address >> 1) & 0xff].w; +} + +INLINE void word_ram_switch(uint8 mode) +{ + int i; + uint16 *ptr1 = (uint16 *)(scd.word_ram_2M); + uint16 *ptr2 = (uint16 *)(scd.word_ram[0]); + uint16 *ptr3 = (uint16 *)(scd.word_ram[1]); + + if (mode & 0x04) + { + /* 2M -> 1M mode */ + for (i=0; i<0x10000; i++) + { + *ptr2++=*ptr1++; + *ptr3++=*ptr1++; + } + } + else + { + /* 1M -> 2M mode */ + for (i=0; i<0x10000; i++) + { + *ptr1++=*ptr2++; + *ptr1++=*ptr3++; + } + + /* allow Word-RAM access from both CPU in 2M mode (fixes sync issues in Mortal Kombat) */ + for (i=scd.cartridge.boot+0x20; i> 1) & 0x1fff, data); + return; + } + + s68k_unused_8_w(address, data); + return; + } + +#ifdef LOG_SCD + error("[%d][%d]write byte CD register %X -> 0x%02x (%X)\n", v_counter, s68k.cycles, address, data, s68k.pc); +#endif + + /* Gate-Array registers */ + switch (address & 0x1ff) + { + case 0x00: /* LED status */ + { + /* register $00 is reserved for MAIN-CPU, use $06 instead */ + scd.regs[0x06 >> 1].byte.h = data; + return; + } + + case 0x01: /* RESET status */ + { + /* RESET bit cleared ? */ + if (!(data & 0x01)) + { + /* reset CD hardware */ + scd_reset(0); + } + return; + } + + case 0x03: /* Memory Mode */ + { + s68k_poll_sync(1<<0x03); + + /* detect MODE & RET bits modifications */ + if ((data ^ scd.regs[0x03 >> 1].byte.l) & 0x05) + { + int i; + + /* MODE bit */ + if (data & 0x04) + { + /* 2M->1M mode switch */ + if (!(scd.regs[0x03 >> 1].byte.l & 0x04)) + { + /* re-arrange Word-RAM banks */ + word_ram_switch(0x04); + } + + /* RET bit in 1M Mode */ + if (data & 0x01) + { + /* Word-RAM 1 assigned to MAIN-CPU */ + for (i=scd.cartridge.boot+0x20; i> 1].byte.l = (scd.regs[0x02 >> 1].byte.l & ~0x1f) | (data & 0x1d); + return; + } + else + { + /* 1M->2M mode switch */ + if (scd.regs[0x02 >> 1].byte.l & 0x04) + { + /* re-arrange Word-RAM banks */ + word_ram_switch(0x00); + + /* RET bit set during 1M mode ? */ + data |= ~scd.dmna & 0x01; + + /* check if RET bit is cleared */ + if (!(data & 0x01)) + { + /* set DMNA bit */ + data |= 0x02; + + /* mask BK0-1 bits (MAIN-CPU side only) */ + scd.regs[0x02 >> 1].byte.l = (scd.regs[0x02 >> 1].byte.l & ~0x1f) | (data & 0x1f); + return; + } + } + + /* RET bit set in 2M mode */ + if (data & 0x01) + { + /* Word-RAM is returned to MAIN-CPU */ + scd.dmna = 0; + + /* clear DMNA bit */ + scd.regs[0x02 >> 1].byte.l = (scd.regs[0x02 >> 1].byte.l & ~0x1f) | (data & 0x1d); + return; + } + } + } + + /* update PM0-1 & MODE bits */ + scd.regs[0x02 >> 1].byte.l = (scd.regs[0x02 >> 1].byte.l & ~0x1c) | (data & 0x1c); + return; + } + + case 0x07: /* CDC register write */ + { + cdc_reg_w(data); + return; + } + + case 0x0e: /* SUB-CPU communication flags */ + case 0x0f: /* !LWR is ignored (Space Ace, Dragon's Lair) */ + { + s68k_poll_sync(1<<0x0f); + scd.regs[0x0f>>1].byte.l = data; + return; + } + + case 0x31: /* Timer */ + { + /* reload timer (one timer clock = 384 CPU cycles) */ + scd.timer = data * TIMERS_SCYCLES_RATIO; + + /* only non-zero data starts timer, writing zero stops it */ + if (data) + { + /* adjust regarding current CPU cycle */ + scd.timer += (s68k.cycles - scd.cycles); + } + + scd.regs[0x30>>1].byte.l = data; + return; + } + + case 0x33: /* Interrupts */ + { + /* update register value before updating interrupts */ + scd.regs[0x32>>1].byte.l = data; + + /* update IEN2 flag */ + scd.regs[0x00].byte.h = (scd.regs[0x00].byte.h & 0x7f) | ((data & 0x04) << 5); + + /* clear level 1 interrupt if disabled ("Batman Returns" option menu) */ + scd.pending &= ~(data & 0x02); + + /* update IRQ level */ + s68k_update_irq((scd.pending & data) >> 1); + return; + } + + case 0x37: /* CDD control (controlled by BIOS, byte access only ?) */ + { + /* CDD communication started ? */ + if ((data & 0x04) && !(scd.regs[0x37>>1].byte.l & 0x04)) + { + /* reset CDD cycle counter */ + cdd.cycles = (scd.cycles - s68k.cycles) * 3; + + /* set pending interrupt level 4 */ + scd.pending |= (1 << 4); + + /* update IRQ level if interrupt is enabled */ + if (scd.regs[0x32>>1].byte.l & 0x10) + { + s68k_update_irq((scd.pending & scd.regs[0x32>>1].byte.l) >> 1); + } + } + + scd.regs[0x37>>1].byte.l = data; + return; + } + + default: + { + /* SUB-CPU communication words */ + if ((address & 0xf0) == 0x20) + { + s68k_poll_sync(1 << ((address - 0x10) & 0x1f)); + } + + /* default registers */ + if (address & 1) + { + /* register LSB */ + scd.regs[(address >> 1) & 0xff].byte.l = data; + return; + } + + /* register MSB */ + scd.regs[(address >> 1) & 0xff].byte.h = data; + return; + } + } +} + +static void scd_write_word(unsigned int address, unsigned int data) +{ + /* PCM area (8K) is mirrored into $FF0000-$FF7FFF */ + if (address < 0xff8000) + { + /* get /LDS only */ + pcm_write((address >> 1) & 0x1fff, data); + return; + } + +#ifdef LOG_SCD + error("[%d][%d]write word CD register %X -> 0x%04x (%X)\n", v_counter, s68k.cycles, address, data, s68k.pc); +#endif + + /* Gate-Array registers */ + switch (address & 0x1fe) + { + case 0x00: /* LED status & RESET */ + { + /* only update LED status (register $00 is reserved for MAIN-CPU, use $06 instead) */ + scd.regs[0x06>>1].byte.h = data >> 8; + + /* RESET bit cleared ? */ + if (!(data & 0x01)) + { + /* reset CD hardware */ + scd_reset(0); + } + return; + } + + case 0x02: /* Memory Mode */ + { + s68k_poll_sync(1<<0x03); + + /* detect MODE & RET bits modifications */ + if ((data ^ scd.regs[0x03>>1].byte.l) & 0x05) + { + int i; + + /* MODE bit */ + if (data & 0x04) + { + /* 2M->1M mode switch */ + if (!(scd.regs[0x03 >> 1].byte.l & 0x04)) + { + /* re-arrange Word-RAM banks */ + word_ram_switch(0x04); + } + + /* RET bit in 1M Mode */ + if (data & 0x01) + { + /* Word-RAM 1 assigned to MAIN-CPU */ + for (i=scd.cartridge.boot+0x20; i>1].byte.l = (scd.regs[0x03>>1].byte.l & ~0x1f) | (data & 0x1d); + return; + } + else + { + /* 1M->2M mode switch */ + if (scd.regs[0x03>>1].byte.l & 0x04) + { + /* re-arrange Word-RAM banks */ + word_ram_switch(0x00); + + /* RET bit set during 1M mode ? */ + data |= ~scd.dmna & 0x01; + + /* check if RET bit is cleared */ + if (!(data & 0x01)) + { + /* set DMNA bit */ + data |= 0x02; + + /* mask BK0-1 bits (MAIN-CPU side only) */ + scd.regs[0x03>>1].byte.l = (scd.regs[0x03>>1].byte.l & ~0x1f) | (data & 0x1f); + return; + } + } + + /* RET bit set in 2M mode */ + if (data & 0x01) + { + /* Word-RAM is returned to MAIN-CPU */ + scd.dmna = 0; + + /* clear DMNA bit */ + scd.regs[0x03>>1].byte.l = (scd.regs[0x03>>1].byte.l & ~0x1f) | (data & 0x1d); + return; + } + } + } + + /* update PM0-1 & MODE bits */ + scd.regs[0x03>>1].byte.l = (scd.regs[0x03>>1].byte.l & ~0x1c) | (data & 0x1c); + return; + } + + case 0x06: /* CDC register write */ + { + cdc_reg_w(data); + return; + } + + case 0x0c: /* Stopwatch (word access only) */ + { + /* synchronize the counter with SUB-CPU */ + int ticks = (s68k.cycles - scd.stopwatch) / TIMERS_SCYCLES_RATIO; + scd.stopwatch += (ticks * TIMERS_SCYCLES_RATIO); + + /* any writes clear the counter */ + scd.regs[0x0c>>1].w = 0; + return; + } + + case 0x0e: /* CPU Communication flags */ + { + s68k_poll_sync(1<<0x0f); + + /* D8-D15 ignored -> only SUB-CPU flags are updated */ + scd.regs[0x0f>>1].byte.l = data & 0xff; + return; + } + + case 0x30: /* Timer */ + { + /* LSB only */ + data &= 0xff; + + /* reload timer (one timer clock = 384 CPU cycles) */ + scd.timer = data * TIMERS_SCYCLES_RATIO; + + /* only non-zero data starts timer, writing zero stops it */ + if (data) + { + /* adjust regarding current CPU cycle */ + scd.timer += (s68k.cycles - scd.cycles); + } + + scd.regs[0x30>>1].byte.l = data; + return; + } + + case 0x32: /* Interrupts */ + { + /* LSB only */ + data &= 0xff; + + /* update register value before updating interrupts */ + scd.regs[0x32>>1].byte.l = data; + + /* update IEN2 flag */ + scd.regs[0x00].byte.h = (scd.regs[0x00].byte.h & 0x7f) | ((data & 0x04) << 5); + + /* clear pending level 1 interrupt if disabled ("Batman Returns" option menu) */ + scd.pending &= ~(data & 0x02); + + /* update IRQ level */ + s68k_update_irq((scd.pending & data) >> 1); + return; + } + + case 0x4a: /* CDD command 9 (controlled by BIOS, word access only ?) */ + { + scd.regs[0x4a>>1].w = 0; + cdd_process(); +#ifdef LOG_CDD + error("CDD command: %02x %02x %02x %02x %02x %02x %02x %02x\n",scd.regs[0x42>>1].byte.h, scd.regs[0x42>>1].byte.l, scd.regs[0x44>>1].byte.h, scd.regs[0x44>>1].byte.l, scd.regs[0x46>>1].byte.h, scd.regs[0x46>>1].byte.l, scd.regs[0x48>>1].byte.h, scd.regs[0x48>>1].byte.l); + error("CDD status: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",scd.regs[0x38>>1].byte.h, scd.regs[0x38>>1].byte.l, scd.regs[0x3a>>1].byte.h, scd.regs[0x3a>>1].byte.l, scd.regs[0x3c>>1].byte.h, scd.regs[0x3c>>1].byte.l, scd.regs[0x3e>>1].byte.h, scd.regs[0x3e>>1].byte.l, scd.regs[0x40>>1].byte.h, scd.regs[0x40>>1].byte.l); +#endif + break; + } + + case 0x66: /* Trace vector base address */ + { + scd.regs[0x66>>1].w = data; + + /* start GFX operation */ + gfx_start(data, s68k.cycles); + return; + } + + default: + { + /* SUB-CPU communication words */ + if ((address & 0xf0) == 0x20) + { + s68k_poll_sync(3 << ((address - 0x10) & 0x1e)); + } + + /* default registers */ + scd.regs[(address >> 1) & 0xff].w = data; + return; + } + } +} + + +void scd_init(void) +{ + int i; + + /****************************************************************/ + /* MAIN-CPU low memory map ($000000-$7FFFFF) */ + /****************************************************************/ + + /* 0x00: boot from CD (Mode 2), 0x40: boot from cartridge (Mode 1) */ + uint8 base = scd.cartridge.boot; + + /* $400000-$7FFFFF (resp. $000000-$3FFFFF): cartridge area (4MB) */ + cd_cart_init(); + + /* $000000-$1FFFFF (resp. $400000-$5FFFFF): CD memory area */ + for (i=base; i>1].w = 0x0002; + scd.regs[0x02>>1].w = 0x0001; + + /* 2M mode */ + word_ram_switch(0); + + /* reset PRG-RAM banking on MAIN-CPU side */ + for (i=scd.cartridge.boot+0x02; i>1], 0, sizeof(scd.regs) - 4); + } + + /* SUB-CPU side default values */ + scd.regs[0x08>>1].w = 0xffff; + scd.regs[0x0a>>1].w = 0xffff; + scd.regs[0x36>>1].w = 0x0100; + scd.regs[0x40>>1].w = 0x000f; + scd.regs[0x42>>1].w = 0xffff; + scd.regs[0x44>>1].w = 0xffff; + scd.regs[0x46>>1].w = 0xffff; + scd.regs[0x48>>1].w = 0xffff; + scd.regs[0x4a>>1].w = 0xffff; + + /* RESET register always return 1 (register $06 is unused by both sides, it is used for SUB-CPU first register) */ + scd.regs[0x06>>1].byte.l = 0x01; + + /* Reset Timer & Stopwatch counters */ + scd.timer = 0; + scd.stopwatch = 0; + + /* Reset frame cycle counter */ + scd.cycles = 0; + + /* Clear pending interrupts */ + scd.pending = 0; + + /* Clear CPU polling detection */ + memset(&m68k.poll, 0, sizeof(m68k.poll)); + memset(&s68k.poll, 0, sizeof(s68k.poll)); + + /* Reset CD hardware */ + cdd_reset(); + cdc_reset(); + gfx_reset(); + pcm_reset(); +} + +void scd_update(unsigned int cycles) +{ + /* update CDC DMA transfer */ + if (cdc.dma_w) + { + cdc_dma_update(); + } + + /* run both CPU in sync until end of line */ + do + { + m68k_run(cycles); + s68k_run(scd.cycles + SCYCLES_PER_LINE); + } + while ((m68k.cycles < cycles) || (s68k.cycles < (scd.cycles + SCYCLES_PER_LINE))); + + /* increment CD hardware cycle counter */ + scd.cycles += SCYCLES_PER_LINE; + + /* CDD processing at 75Hz (one clock = 12500000/75 = 500000/3 CPU clocks) */ + cdd.cycles += (SCYCLES_PER_LINE * 3); + if (cdd.cycles >= (500000 * 4)) + { + /* reload CDD cycle counter */ + cdd.cycles -= (500000 * 4); + + /* update CDD sector */ + cdd_update(); + + /* check if a new CDD command has been processed */ + if (!(scd.regs[0x4a>>1].byte.l & 0xf0)) + { + /* reset CDD command wait flag */ + scd.regs[0x4a>>1].byte.l = 0xf0; + + /* pending level 4 interrupt */ + scd.pending |= (1 << 4); + + /* level 4 interrupt enabled */ + if (scd.regs[0x32>>1].byte.l & 0x10) + { + /* update IRQ level */ + s68k_update_irq((scd.pending & scd.regs[0x32>>1].byte.l) >> 1); + } + } + } + + /* Timer */ + if (scd.timer) + { + /* decrement timer */ + scd.timer -= SCYCLES_PER_LINE; + if (scd.timer <= 0) + { + /* reload timer (one timer clock = 384 CPU cycles) */ + scd.timer += (scd.regs[0x30>>1].byte.l * TIMERS_SCYCLES_RATIO); + + /* level 3 interrupt enabled ? */ + if (scd.regs[0x32>>1].byte.l & 0x08) + { + /* trigger level 3 interrupt */ + scd.pending |= (1 << 3); + + /* update IRQ level */ + s68k_update_irq((scd.pending & scd.regs[0x32>>1].byte.l) >> 1); + } + } + } + + /* GFX processing */ + if (scd.regs[0x58>>1].byte.h & 0x80) + { + /* update graphics operation if running */ + gfx_update(scd.cycles); + } +} + +void scd_end_frame(unsigned int cycles) +{ + /* run Stopwatch until end of frame */ + int ticks = (cycles - scd.stopwatch) / TIMERS_SCYCLES_RATIO; + scd.regs[0x0c>>1].w = (scd.regs[0x0c>>1].w + ticks) & 0xfff; + + /* adjust Stopwatch counter for next frame (can be negative) */ + scd.stopwatch += (ticks * TIMERS_SCYCLES_RATIO) - cycles; + + /* adjust SUB-CPU & GPU cycle counters for next frame */ + s68k.cycles -= cycles; + gfx.cycles -= cycles; + + /* reset CPU registers polling */ + m68k.poll.cycle = 0; + s68k.poll.cycle = 0; +} + +int scd_context_save(uint8 *state) +{ + uint16 tmp16; + uint32 tmp32; + int bufferptr = 0; + + /* internal harware */ + save_param(scd.regs, sizeof(scd.regs)); + save_param(&scd.cycles, sizeof(scd.cycles)); + save_param(&scd.timer, sizeof(scd.timer)); + save_param(&scd.pending, sizeof(scd.pending)); + save_param(&scd.dmna, sizeof(scd.dmna)); + + /* GFX processor */ + bufferptr += gfx_context_save(&state[bufferptr]); + + /* CD Data controller */ + bufferptr += cdc_context_save(&state[bufferptr]); + + /* CD Drive processor */ + bufferptr += cdd_context_save(&state[bufferptr]); + + /* PCM chip */ + bufferptr += pcm_context_save(&state[bufferptr]); + + /* PRG-RAM */ + save_param(scd.prg_ram, sizeof(scd.prg_ram)); + + /* Word-RAM */ + if (scd.regs[0x03>>1].byte.l & 0x04) + { + /* 1M mode */ + save_param(scd.word_ram, sizeof(scd.word_ram)); + } + else + { + /* 2M mode */ + save_param(scd.word_ram_2M, sizeof(scd.word_ram_2M)); + } + + /* MAIN-CPU & SUB-CPU polling */ + save_param(&m68k.poll, sizeof(m68k.poll)); + save_param(&s68k.poll, sizeof(s68k.poll)); + + /* H-INT default vector */ + tmp16 = *(uint16 *)(m68k.memory_map[0].base + 0x72); + save_param(&tmp16, 2); + + /* SUB-CPU internal state */ + save_param(&s68k.cycles, sizeof(s68k.cycles)); + save_param(&s68k.int_level, sizeof(s68k.int_level)); + save_param(&s68k.stopped, sizeof(s68k.stopped)); + + /* SUB-CPU registers */ + tmp32 = s68k_get_reg(M68K_REG_D0); save_param(&tmp32, 4); + tmp32 = s68k_get_reg(M68K_REG_D1); save_param(&tmp32, 4); + tmp32 = s68k_get_reg(M68K_REG_D2); save_param(&tmp32, 4); + tmp32 = s68k_get_reg(M68K_REG_D3); save_param(&tmp32, 4); + tmp32 = s68k_get_reg(M68K_REG_D4); save_param(&tmp32, 4); + tmp32 = s68k_get_reg(M68K_REG_D5); save_param(&tmp32, 4); + tmp32 = s68k_get_reg(M68K_REG_D6); save_param(&tmp32, 4); + tmp32 = s68k_get_reg(M68K_REG_D7); save_param(&tmp32, 4); + tmp32 = s68k_get_reg(M68K_REG_A0); save_param(&tmp32, 4); + tmp32 = s68k_get_reg(M68K_REG_A1); save_param(&tmp32, 4); + tmp32 = s68k_get_reg(M68K_REG_A2); save_param(&tmp32, 4); + tmp32 = s68k_get_reg(M68K_REG_A3); save_param(&tmp32, 4); + tmp32 = s68k_get_reg(M68K_REG_A4); save_param(&tmp32, 4); + tmp32 = s68k_get_reg(M68K_REG_A5); save_param(&tmp32, 4); + tmp32 = s68k_get_reg(M68K_REG_A6); save_param(&tmp32, 4); + tmp32 = s68k_get_reg(M68K_REG_A7); save_param(&tmp32, 4); + tmp32 = s68k_get_reg(M68K_REG_PC); save_param(&tmp32, 4); + tmp16 = s68k_get_reg(M68K_REG_SR); save_param(&tmp16, 2); + tmp32 = s68k_get_reg(M68K_REG_USP); save_param(&tmp32, 4); + tmp32 = s68k_get_reg(M68K_REG_ISP); save_param(&tmp32, 4); + + /* bootable MD cartridge */ + if (scd.cartridge.boot) + { + bufferptr += md_cart_context_save(&state[bufferptr]); + } + + return bufferptr; +} + +int scd_context_load(uint8 *state) +{ + int i; + uint16 tmp16; + uint32 tmp32; + int bufferptr = 0; + + /* internal harware */ + load_param(scd.regs, sizeof(scd.regs)); + load_param(&scd.cycles, sizeof(scd.cycles)); + load_param(&scd.timer, sizeof(scd.timer)); + load_param(&scd.pending, sizeof(scd.pending)); + load_param(&scd.dmna, sizeof(scd.dmna)); + + /* GFX processor */ + bufferptr += gfx_context_load(&state[bufferptr]); + + /* CD Data controller */ + bufferptr += cdc_context_load(&state[bufferptr]); + + /* CD Drive processor */ + bufferptr += cdd_context_load(&state[bufferptr]); + + /* PCM chip */ + bufferptr += pcm_context_load(&state[bufferptr]); + + /* PRG-RAM */ + load_param(scd.prg_ram, sizeof(scd.prg_ram)); + + /* PRG-RAM 128k bank mapped to $020000-$03FFFF (resp. $420000-$43FFFF) */ + m68k.memory_map[scd.cartridge.boot + 0x02].base = scd.prg_ram + ((scd.regs[0x03>>1].byte.l & 0xc0) << 11); + m68k.memory_map[scd.cartridge.boot + 0x03].base = m68k.memory_map[scd.cartridge.boot + 0x02].base + 0x10000; + + /* Word-RAM */ + if (scd.regs[0x03>>1].byte.l & 0x04) + { + /* 1M Mode */ + load_param(scd.word_ram, sizeof(scd.word_ram)); + + if (scd.regs[0x03>>1].byte.l & 0x01) + { + /* Word-RAM 1 assigned to MAIN-CPU */ + for (i=scd.cartridge.boot+0x20; i>1].byte.l) >> 1); + } + + return M68K_INT_ACK_AUTOVECTOR; +} diff --git a/genplus-gx/core/cd_hw/scd.h b/genplus-gx/core/cd_hw/scd.h new file mode 100644 index 0000000000..ba9a0a364d --- /dev/null +++ b/genplus-gx/core/cd_hw/scd.h @@ -0,0 +1,90 @@ +/*************************************************************************************** + * Genesis Plus + * Mega CD / Sega CD hardware + * + * Copyright (C) 2012-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ +#ifndef _HW_SCD_ +#define _HW_SCD_ + +#include "cdd.h" +#include "cdc.h" +#include "gfx.h" +#include "pcm.h" +#include "cd_cart.h" + +#define scd ext.cd_hw + +/* 5000000 SCD clocks/s = ~3184 clocks/line with a Master Clock of 53.693175 MHz */ +/* This would be slightly (~30 clocks) more on PAL systems because of the slower */ +/* Master Clock (53.203424 MHz) but not enough to really care about since clocks */ +/* are not running in sync anyway. */ +#define SCD_CLOCK 50000000 +#define SCYCLES_PER_LINE 3184 + +/* Timer & Stopwatch clocks divider */ +#define TIMERS_SCYCLES_RATIO (384 * 4) + +/* CD hardware */ +typedef struct +{ + cd_cart_t cartridge; /* ROM/RAM Cartridge */ + uint8 bootrom[0x20000]; /* 128K internal BOOT ROM */ + uint8 prg_ram[0x80000]; /* 512K PRG-RAM */ + uint8 word_ram[2][0x20000]; /* 2 x 128K Word RAM (1M mode) */ + uint8 word_ram_2M[0x40000]; /* 256K Word RAM (2M mode) */ + uint8 bram[0x2000]; /* 8K Backup RAM */ + reg16_t regs[0x100]; /* 256 x 16-bit ASIC registers */ + uint32 cycles; /* Master clock counter */ + int32 stopwatch; /* Stopwatch counter */ + int32 timer; /* Timer counter */ + uint8 pending; /* Pending interrupts */ + uint8 dmna; /* Pending DMNA write status */ + gfx_t gfx_hw; /* Graphics processor */ + cdc_t cdc_hw; /* CD data controller */ + cdd_t cdd_hw; /* CD drive processor */ + pcm_t pcm_hw; /* PCM chip */ +} cd_hw_t; + +/* Function prototypes */ +extern void scd_init(void); +extern void scd_reset(int hard); +extern void scd_update(unsigned int cycles); +extern void scd_end_frame(unsigned int cycles); +extern int scd_context_load(uint8 *state); +extern int scd_context_save(uint8 *state); +extern int scd_68k_irq_ack(int level); +extern void prg_ram_dma_w(unsigned int words); + +#endif diff --git a/genplus-gx/core/genesis.c b/genplus-gx/core/genesis.c new file mode 100644 index 0000000000..f15f2f7ff9 --- /dev/null +++ b/genplus-gx/core/genesis.c @@ -0,0 +1,540 @@ +/*************************************************************************************** + * Genesis Plus + * Internal Hardware & Bus controllers + * + * Support for SG-1000, Mark-III, Master System, Game Gear, Mega Drive & Mega CD hardware + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code) + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + +external_t ext; /* External Hardware (Cartridge, CD unit, ...) */ +uint8 boot_rom[0x800]; /* Genesis BOOT ROM */ +uint8 work_ram[0x10000]; /* 68K RAM */ +uint8 zram[0x2000]; /* Z80 RAM */ +uint32 zbank; /* Z80 bank window address */ +uint8 zstate; /* Z80 bus state (d0 = BUSACK, d1 = /RESET) */ +uint8 pico_current; /* PICO current page */ + +static uint8 tmss[4]; /* TMSS security register */ + +/*--------------------------------------------------------------------------*/ +/* Init, reset, shutdown functions */ +/*--------------------------------------------------------------------------*/ + +void gen_init(void) +{ + int i; + + /* initialize Z80 */ + z80_init(0,z80_irq_callback); + + /* 8-bit / 16-bit modes */ + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + /* initialize main 68k */ + m68k_init(); + m68k.aerr_enabled = config.addr_error; + + /* initialize main 68k memory map */ + + /* $800000-$DFFFFF : illegal access by default */ + for (i=0x80; i<0xe0; i++) + { + m68k.memory_map[i].base = work_ram; /* for VDP DMA */ + m68k.memory_map[i].read8 = m68k_lockup_r_8; + m68k.memory_map[i].read16 = m68k_lockup_r_16; + m68k.memory_map[i].write8 = m68k_lockup_w_8; + m68k.memory_map[i].write16 = m68k_lockup_w_16; + zbank_memory_map[i].read = zbank_lockup_r; + zbank_memory_map[i].write = zbank_lockup_w; + } + + /* $C0xxxx, $C8xxxx, $D0xxxx, $D8xxxx : VDP ports */ + for (i=0xc0; i<0xe0; i+=8) + { + m68k.memory_map[i].read8 = vdp_read_byte; + m68k.memory_map[i].read16 = vdp_read_word; + m68k.memory_map[i].write8 = vdp_write_byte; + m68k.memory_map[i].write16 = vdp_write_word; + zbank_memory_map[i].read = zbank_read_vdp; + zbank_memory_map[i].write = zbank_write_vdp; + } + + /* $E00000-$FFFFFF : Work RAM (64k) */ + for (i=0xe0; i<0x100; i++) + { + m68k.memory_map[i].base = work_ram; + m68k.memory_map[i].read8 = NULL; + m68k.memory_map[i].read16 = NULL; + m68k.memory_map[i].write8 = NULL; + m68k.memory_map[i].write16 = NULL; + + /* Z80 can ONLY write to 68k RAM, not read it */ + zbank_memory_map[i].read = zbank_unused_r; + zbank_memory_map[i].write = NULL; + } + + if (system_hw == SYSTEM_PICO) + { + /* additional registers mapped to $800000-$80FFFF */ + m68k.memory_map[0x80].read8 = pico_read_byte; + m68k.memory_map[0x80].read16 = pico_read_word; + m68k.memory_map[0x80].write8 = m68k_unused_8_w; + m68k.memory_map[0x80].write16 = m68k_unused_16_w; + + /* there is no I/O area (Notaz) */ + m68k.memory_map[0xa1].read8 = m68k_read_bus_8; + m68k.memory_map[0xa1].read16 = m68k_read_bus_16; + m68k.memory_map[0xa1].write8 = m68k_unused_8_w; + m68k.memory_map[0xa1].write16 = m68k_unused_16_w; + + /* initialize page index (closed) */ + pico_current = 0; + } + else + { + /* $A10000-$A1FFFF : I/O & Control registers */ + m68k.memory_map[0xa1].read8 = ctrl_io_read_byte; + m68k.memory_map[0xa1].read16 = ctrl_io_read_word; + m68k.memory_map[0xa1].write8 = ctrl_io_write_byte; + m68k.memory_map[0xa1].write16 = ctrl_io_write_word; + zbank_memory_map[0xa1].read = zbank_read_ctrl_io; + zbank_memory_map[0xa1].write = zbank_write_ctrl_io; + + /* initialize Z80 memory map */ + /* $0000-$3FFF is mapped to Z80 RAM (8K mirrored) */ + /* $4000-$FFFF is mapped to hardware but Z80 PC should never point there */ + for (i=0; i<64; i++) + { + z80_readmap[i] = &zram[(i & 7) << 10]; + } + + /* initialize Z80 memory handlers */ + z80_writemem = z80_memory_w; + z80_readmem = z80_memory_r; + + /* initialize Z80 port handlers */ + z80_writeport = z80_unused_port_w; + z80_readport = z80_unused_port_r; + } + + /* $000000-$7FFFFF : external hardware area */ + if (system_hw == SYSTEM_MCD) + { + /* initialize SUB-CPU */ + s68k_init(); + + /* initialize CD hardware */ + scd_init(); + } + else + { + /* Cartridge hardware */ + md_cart_init(); + } + } + else + { + /* initialize cartridge hardware & Z80 memory handlers */ + sms_cart_init(); + + /* initialize Z80 ports handlers */ + switch (system_hw) + { + /* Master System compatibility mode */ + case SYSTEM_PBC: + { + z80_writeport = z80_md_port_w; + z80_readport = z80_md_port_r; + break; + } + + /* Game Gear hardware */ + case SYSTEM_GG: + case SYSTEM_GGMS: + { + /* initialize cartridge hardware & Z80 memory handlers */ + sms_cart_init(); + + /* initialize Z80 ports handlers */ + z80_writeport = z80_gg_port_w; + z80_readport = z80_gg_port_r; + break; + } + + /* Master SYstem hardware */ + case SYSTEM_SMS: + case SYSTEM_SMS2: + { + z80_writeport = z80_ms_port_w; + z80_readport = z80_ms_port_r; + break; + } + + /* Mark-III hardware */ + case SYSTEM_MARKIII: + { + z80_writeport = z80_m3_port_w; + z80_readport = z80_m3_port_r; + break; + } + + /* SG-1000 hardware */ + case SYSTEM_SG: + { + z80_writeport = z80_sg_port_w; + z80_readport = z80_sg_port_r; + break; + } + } + } +} + +void gen_reset(int hard_reset) +{ + /* System Reset */ + if (hard_reset) + { + /* clear RAM (TODO: use random bit patterns for all systems, like on real hardware) */ + memset(work_ram, 0x00, sizeof (work_ram)); + memset(zram, 0x00, sizeof (zram)); + } + else + { + /* reset YM2612 (on hard reset, this is done by sound_reset) */ + fm_reset(0); + } + + /* 68k & Z80 could be anywhere in VDP frame (Bonkers, Eternal Champions, X-Men 2) */ + m68k.cycles = Z80.cycles = (uint32)((MCYCLES_PER_LINE * lines_per_frame) * ((double)rand() / (double)RAND_MAX)); + + /* 68k cycles should be a multiple of 7 */ + m68k.cycles = (m68k.cycles / 7) * 7; + + /* Z80 cycles should be a multiple of 15 */ + Z80.cycles = (Z80.cycles / 15) * 15; + + /* 8-bit / 16-bit modes */ + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + if (system_hw == SYSTEM_MCD) + { + /* FRES is only asserted on Power ON */ + if (hard_reset) + { + /* reset CD hardware */ + scd_reset(1); + } + } + + /* reset MD cartridge hardware */ + md_cart_reset(hard_reset); + + /* Z80 bus is released & Z80 is reseted */ + m68k.memory_map[0xa0].read8 = m68k_read_bus_8; + m68k.memory_map[0xa0].read16 = m68k_read_bus_16; + m68k.memory_map[0xa0].write8 = m68k_unused_8_w; + m68k.memory_map[0xa0].write16 = m68k_unused_16_w; + zstate = 0; + + /* assume default bank is $000000-$007FFF */ + zbank = 0; + + /* TMSS support */ + if ((config.bios & 1) && (system_hw == SYSTEM_MD) && hard_reset) + { + int i; + + /* clear TMSS register */ + memset(tmss, 0x00, sizeof(tmss)); + + /* VDP access is locked by default */ + for (i=0xc0; i<0xe0; i+=8) + { + m68k.memory_map[i].read8 = m68k_lockup_r_8; + m68k.memory_map[i].read16 = m68k_lockup_r_16; + m68k.memory_map[i].write8 = m68k_lockup_w_8; + m68k.memory_map[i].write16 = m68k_lockup_w_16; + zbank_memory_map[i].read = zbank_lockup_r; + zbank_memory_map[i].write = zbank_lockup_w; + } + + /* check if BOOT ROM is loaded */ + if (system_bios & SYSTEM_MD) + { + /* save default cartridge slot mapping */ + cart.base = m68k.memory_map[0].base; + + /* BOOT ROM is mapped at $000000-$0007FF */ + m68k.memory_map[0].base = boot_rom; + } + } + + /* reset MAIN-CPU */ + m68k_pulse_reset(); + } + else + { + /* RAM state at power-on is undefined on some systems */ + if ((system_hw == SYSTEM_MARKIII) || ((system_hw & SYSTEM_SMS) && (region_code == REGION_JAPAN_NTSC))) + { + /* some korean games rely on RAM to be initialized with values different from $00 or $ff */ + memset(work_ram, 0xf0, sizeof(work_ram)); + } + + /* reset cartridge hardware */ + sms_cart_reset(); + + /* halt 68k (/VRES is forced low) */ + m68k_pulse_halt(); + } + + /* reset Z80 */ + z80_reset(); + + /* some Z80 registers need to be initialized on Power ON */ + if (hard_reset) + { + /* Power Base Converter specific */ + if (system_hw == SYSTEM_PBC) + { + /* startup code logic (verified on real hardware): */ + /* 21 01 E1 : LD HL, $E101 + 25 -- -- : DEC H + F9 -- -- : LD SP,HL + C7 -- -- : RST $00 + 01 01 -- : LD BC, $xx01 + */ + Z80.hl.w.l = 0xE001; + Z80.sp.w.l = 0xDFFF; + Z80.r = 4; + } + + /* Master System specific (when BIOS is disabled) */ + else if ((system_hw & SYSTEM_SMS) && (!(config.bios & 1) || !(system_bios & SYSTEM_SMS))) + { + /* usually done by BIOS & required by some SMS games that don't initialize SP */ + Z80.sp.w.l = 0xDFFF; + } + } +} + +/*-----------------------------------------------------------------------*/ +/* OS ROM / TMSS register control functions (Genesis mode) */ +/*-----------------------------------------------------------------------*/ + +void gen_tmss_w(unsigned int offset, unsigned int data) +{ + int i; + + /* write TMSS register */ + WRITE_WORD(tmss, offset, data); + + /* VDP requires "SEGA" value to be written in TMSS register */ + if (memcmp((char *)tmss, "SEGA", 4) == 0) + { + for (i=0xc0; i<0xe0; i+=8) + { + m68k.memory_map[i].read8 = vdp_read_byte; + m68k.memory_map[i].read16 = vdp_read_word; + m68k.memory_map[i].write8 = vdp_write_byte; + m68k.memory_map[i].write16 = vdp_write_word; + zbank_memory_map[i].read = zbank_read_vdp; + zbank_memory_map[i].write = zbank_write_vdp; + } + } + else + { + for (i=0xc0; i<0xe0; i+=8) + { + m68k.memory_map[i].read8 = m68k_lockup_r_8; + m68k.memory_map[i].read16 = m68k_lockup_r_16; + m68k.memory_map[i].write8 = m68k_lockup_w_8; + m68k.memory_map[i].write16 = m68k_lockup_w_16; + zbank_memory_map[i].read = zbank_lockup_r; + zbank_memory_map[i].write = zbank_lockup_w; + } + } +} + +void gen_bankswitch_w(unsigned int data) +{ + /* check if BOOT ROM is loaded */ + if (system_bios & SYSTEM_MD) + { + if (data & 1) + { + /* enable cartridge ROM */ + m68k.memory_map[0].base = cart.base; + } + else + { + /* enable internal BOOT ROM */ + m68k.memory_map[0].base = boot_rom; + } + } +} + +unsigned int gen_bankswitch_r(void) +{ + /* check if BOOT ROM is loaded */ + if (system_bios & SYSTEM_MD) + { + return (m68k.memory_map[0].base == cart.base); + } + + return 0xff; +} + + +/*-----------------------------------------------------------------------*/ +/* Z80 Bus controller chip functions (Genesis mode) */ +/* ----------------------------------------------------------------------*/ + +void gen_zbusreq_w(unsigned int data, unsigned int cycles) +{ + if (data) /* !ZBUSREQ asserted */ + { + /* check if Z80 is going to be stopped */ + if (zstate == 1) + { + /* resynchronize with 68k */ + z80_run(cycles); + + /* enable 68k access to Z80 bus */ + m68k.memory_map[0xa0].read8 = z80_read_byte; + m68k.memory_map[0xa0].read16 = z80_read_word; + m68k.memory_map[0xa0].write8 = z80_write_byte; + m68k.memory_map[0xa0].write16 = z80_write_word; + } + + /* update Z80 bus status */ + zstate |= 2; + } + else /* !ZBUSREQ released */ + { + /* check if Z80 is going to be restarted */ + if (zstate == 3) + { + /* resynchronize with 68k */ + Z80.cycles = cycles; + + /* disable 68k access to Z80 bus */ + m68k.memory_map[0xa0].read8 = m68k_read_bus_8; + m68k.memory_map[0xa0].read16 = m68k_read_bus_16; + m68k.memory_map[0xa0].write8 = m68k_unused_8_w; + m68k.memory_map[0xa0].write16 = m68k_unused_16_w; + } + + /* update Z80 bus status */ + zstate &= 1; + } +} + +void gen_zreset_w(unsigned int data, unsigned int cycles) +{ + if (data) /* !ZRESET released */ + { + /* check if Z80 is going to be restarted */ + if (zstate == 0) + { + /* resynchronize with 68k */ + Z80.cycles = cycles; + + /* reset Z80 & YM2612 */ + z80_reset(); + fm_reset(cycles); + } + + /* check if 68k access to Z80 bus is granted */ + else if (zstate == 2) + { + /* enable 68k access to Z80 bus */ + m68k.memory_map[0xa0].read8 = z80_read_byte; + m68k.memory_map[0xa0].read16 = z80_read_word; + m68k.memory_map[0xa0].write8 = z80_write_byte; + m68k.memory_map[0xa0].write16 = z80_write_word; + + /* reset Z80 & YM2612 */ + z80_reset(); + fm_reset(cycles); + } + + /* update Z80 bus status */ + zstate |= 1; + } + else /* !ZRESET asserted */ + { + /* check if Z80 is going to be stopped */ + if (zstate == 1) + { + /* resynchronize with 68k */ + z80_run(cycles); + } + + /* check if 68k had access to Z80 bus */ + else if (zstate == 3) + { + /* disable 68k access to Z80 bus */ + m68k.memory_map[0xa0].read8 = m68k_read_bus_8; + m68k.memory_map[0xa0].read16 = m68k_read_bus_16; + m68k.memory_map[0xa0].write8 = m68k_unused_8_w; + m68k.memory_map[0xa0].write16 = m68k_unused_16_w; + } + + /* stop YM2612 */ + fm_reset(cycles); + + /* update Z80 bus status */ + zstate &= 2; + } +} + +void gen_zbank_w (unsigned int data) +{ + zbank = ((zbank >> 1) | ((data & 1) << 23)) & 0xFF8000; +} + + +/*-----------------------------------------------------------------------*/ +/* Z80 interrupt callback */ +/* ----------------------------------------------------------------------*/ + +int z80_irq_callback (int param) +{ + return -1; +} diff --git a/genplus-gx/core/genesis.h b/genplus-gx/core/genesis.h new file mode 100644 index 0000000000..a7b10a7300 --- /dev/null +++ b/genplus-gx/core/genesis.h @@ -0,0 +1,77 @@ +/*************************************************************************************** + * Genesis Plus + * Internal hardware & Bus controllers + * + * Support for SG-1000, Mark-III, Master System, Game Gear, Mega Drive & Mega CD hardware + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code) + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _GENESIS_H_ +#define _GENESIS_H_ + +#include "md_cart.h" +#include "sms_cart.h" +#include "scd.h" + +/* External Hardware */ +typedef union +{ + md_cart_t md_cart; + cd_hw_t cd_hw; +} external_t; + +/* Global variables */ +extern external_t ext; +extern uint8 boot_rom[0x800]; +extern uint8 work_ram[0x10000]; +extern uint8 zram[0x2000]; +extern uint32 zbank; +extern uint8 zstate; +extern uint8 pico_current; + +/* Function prototypes */ +extern void gen_init(void); +extern void gen_reset(int hard_reset); +extern void gen_tmss_w(unsigned int offset, unsigned int data); +extern void gen_bankswitch_w(unsigned int data); +extern unsigned int gen_bankswitch_r(void); +extern void gen_zbusreq_w(unsigned int state, unsigned int cycles); +extern void gen_zreset_w(unsigned int state, unsigned int cycles); +extern void gen_zbank_w(unsigned int state); +extern int z80_irq_callback(int param); + +#endif /* _GEN_H_ */ + diff --git a/genplus-gx/core/hvc.h b/genplus-gx/core/hvc.h new file mode 100644 index 0000000000..85e9d025c8 --- /dev/null +++ b/genplus-gx/core/hvc.h @@ -0,0 +1,652 @@ +/*************************************************************************************** + * Genesis Plus + * HV Counters + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +/* + NTSC, 256x192 + ------------- + + Lines Description + + 192 Active display + 24 Bottom border + 3 Bottom blanking + 3 Vertical blanking + 13 Top blanking + 27 Top border + + V counter values + 00-DA, D5-FF + + NTSC, 256x224 + ------------- + + Lines Description + + 224 Active display + 8 Bottom border + 3 Bottom blanking + 3 Vertical blanking + 13 Top blanking + 11 Top border + + V counter values + 00-EA, E5-FF + + NTSC, 256x240 + ------------- + + This mode does not work on NTSC machines. All 30 rows of the name table are + displayed, there is no border, blanking, or retrace period, and the next + frame starts after the 30th row. The display rolls continuously though it + can be stabilized by adjusting the vertical hold. + + V counter values + 00-FF, 00-06 + + PAL, 256x192 + ------------ + + Lines Description + + 192 Active display + 48 Bottom border + 3 Bottom blanking + 3 Vertical blanking + 13 Top blanking + 54 Top border + + V counter values + 00-F2, BA-FF + + PAL, 256x224 + ------------ + + Lines Description + + 224 Active display + 32 Bottom border + 3 Bottom blanking + 3 Vertical blanking + 13 Top blanking + 38 Top border + + V counter values + 00-FF, 00-02, CA-FF + + PAL, 256x240 + ------------ + + Lines Description + + 240 Active display + 24 Bottom border + 3 Bottom blanking + 3 Vertical blanking + 13 Top blanking + 30 Top border + + V counter values + 00-FF, 00-0A, D2-FF + + Here are some details about what the different screen areas look like, + useful if you are emulating overscan or if you want to have a 'virtual' + vertical hold control in your emulator. + + Active display - Where the display generated by the VDP goes. + Bottom border - Filled with border color from VDP register #7. + Bottom blanking - Filled with a light black color. (like display was blanked) + Vertical sync - Filled with a pure black color. (like display was turned off) + Top blanking - Filled with a light black color. (like display was blanked) + Top border - Filled with the border color from VDP register #7. + +*/ +#ifndef _HVC_H_ +#define _HVC_H_ + +/***************************************************************/ +/* */ +/* H-counter timings in H32 & H40 modes (starts from HINT) */ +/* */ +/* There are normally 3420 Master Clock counts per raster line */ +/* with 342 dots/line in H32 mode & 420 dots/line in H40 mode. */ +/* */ +/* in H32 mode, dot clock is divided from MCLK (MCLK/10) */ +/* in H40 mode, dot clock is divided from EDCLK (EDCLK/2) */ +/* */ +/* EDCLK (external dot clock ?) is generated outside the VDP: */ +/* When HSYNC is low, EDCLK varies between MCLK/10 and MCLK/8, */ +/* otherwise it is fixed to MCLK/8. */ +/* */ +/* Notes: */ +/* (1) VDP register 12 bit 7 enables use of EDCLK when set */ +/* (2) VDP register 12 bit 5 forces HSYNC high when set */ +/* (3) H32 or H40 mode is selected with VDP register $0C bit 0 */ +/* and can be set independently from above settings */ +/* */ +/* On real hardware, non-standard timings can be obtained by */ +/* modifying those settings (for example, dot clock can be set */ +/* to MCLK/8 in both modes if HSYNC output is disabled and if */ +/* EDCLK input is enabled in H32 mode / disabled in H40 mode), */ +/* resulting in slightly different H-counter and VDP timings. */ +/* */ +/* Genesis Plus GX timings always assume standard settings i.e */ +/* HSYNC output always enabled and EDCLK input enabled in H40 */ +/* mode / disabled in H32 mode. */ +/* */ +/***************************************************************/ + +static const uint8 cycle2hc32[3420] = +{ + /* end of active display (14 pixels -> 140 Mcycles) , H interrupt triggered, Vcounter increment */ + 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, 0x85, + 0x85, 0x85, 0x85, 0x85, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, + 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x86, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, + 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x87, 0x88, 0x88, 0x88, 0x88, + 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, 0x88, + 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, 0x89, + 0x89, 0x89, 0x89, 0x89, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, + 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8a, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, + 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, 0x8b, + + /* right border (14 pixels -> 140 Mcycles) */ + 0x8c, 0x8c, 0x8c, 0x8c, + 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, + 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, 0x8d, + 0x8d, 0x8d, 0x8d, 0x8d, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, + 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, + 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x90, 0x90, 0x90, 0x90, + 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, 0x90, + 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, + 0x91, 0x91, 0x91, 0x91, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, + 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, 0x92, + + /* right blanking (9 pixels -> 90 Mcycles), VDP status HBLANK flag set */ + 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, + 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, 0x93, + 0xe9, 0xe9, 0xe9, 0xe9, + 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, + 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, + 0xea, 0xea, 0xea, 0xea, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, + 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, + 0xec, 0xec, + + /* horizontal sync (26 pixels -> 260 Mcycles) */ + 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xed, 0xed, 0xed, 0xed, + 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, + 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, + 0xee, 0xee, 0xee, 0xee, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, + 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, + 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf1, 0xf1, 0xf1, 0xf1, + 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, + 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, + 0xf2, 0xf2, 0xf2, 0xf2, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, + 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, + 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf5, 0xf5, 0xf5, 0xf5, + 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, + 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, + 0xf6, 0xf6, 0xf6, 0xf6, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, + 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, + 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf9, 0xf9, 0xf9, 0xf9, + 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, + + /* left blanking (24 pixels -> 240 Mcycles) */ + 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, + 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, + 0xfa, 0xfa, 0xfa, 0xfa, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, + 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfd, 0xfd, 0xfd, 0xfd, + 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, + 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, + 0xfe, 0xfe, 0xfe, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, + /* V interrupt triggered (MD mode) */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, + 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, + 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, + 0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x05, 0x05, 0x05, 0x05, + 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, + + /* left border (13 pixels -> 130 Mcycles) , VDP status HBLANK flag cleared */ + 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, + 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, + 0x06, 0x06, 0x06, 0x06, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, + 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, + 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x09, 0x09, 0x09, 0x09, + 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, + 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, + 0x0a, 0x0a, 0x0a, 0x0a, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, + 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, + + /* remaining active display (252 pixels -> 2520 Mcycles) */ + + 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, + 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0d, 0x0d, 0x0d, 0x0d, + 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, + 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, + 0x0e, 0x0e, 0x0e, 0x0e, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, + 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, + 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x11, 0x11, 0x11, 0x11, + 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 0x11, 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0xac, 0xac, 0xac, 0xac, 0xac, 0xac, 0xac, 0xac, 0xac, 0xac, 0xac, 0xac, + + /* right border (14 pixels -> 112 Mcycles) */ + 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, 0xad, + 0xae, 0xae, 0xae, 0xae, 0xae, 0xae, 0xae, 0xae, 0xae, 0xae, 0xae, 0xae, 0xae, 0xae, 0xae, 0xae, + 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, 0xaf, + 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, 0xb0, + 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, 0xb1, + 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, 0xb2, + 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, 0xb3, + + /* right blanking (9 pixels -> 72 Mcycles) , VDP status HBLANK flag set */ + 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, 0xb4, + 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, 0xb5, + 0xb6, 0xb6, 0xb6, 0xb6, 0xb6, 0xb6, 0xb6, 0xb6, 0xe4, 0xe4, 0xe4, 0xe4, 0xe4, 0xe4, 0xe4, 0xe4, + 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, 0xe5, + 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, + + /* horizontal sync (32 pixels -> 313 Mcycles) */ + 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, 0xe6, + 0xe6, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, + 0xe7, 0xe7, 0xe7, 0xe7, 0xe7, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, + 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe8, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, + 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xe9, 0xea, 0xea, 0xea, + 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xea, 0xeb, + 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, 0xeb, + 0xeb, 0xeb, 0xeb, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, + 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xec, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, + 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xed, 0xee, 0xee, 0xee, 0xee, 0xee, + 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xef, 0xef, + 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, 0xef, + 0xef, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, + 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, + 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf1, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, + 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf2, 0xf3, 0xf3, 0xf3, + 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf3, 0xf4, + 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, 0xf4, + 0xf4, 0xf4, 0xf4, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, + 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf5, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, + 0xf6, + + /* left blanking (32 pixels -> 259 Mcycles) */ + 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf6, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, + 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf7, 0xf8, 0xf8, 0xf8, 0xf8, + 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf9, 0xf9, 0xf9, 0xf9, + 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xf9, 0xfa, 0xfa, 0xfa, 0xfa, + 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfa, 0xfb, 0xfb, 0xfb, 0xfb, + 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfb, 0xfc, 0xfc, 0xfc, 0xfc, + 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0xfd, 0xfd, 0xfd, 0xfd, + 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfd, 0xfe, 0xfe, 0xfe, 0xfe, + 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, + /* Vertical Interrupt triggered */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, + 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, 0x02, 0x02, 0x02, + 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x03, 0x03, + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x04, 0x04, 0x04, 0x04, + 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x05, 0x05, 0x05, 0x05, + 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x06, 0x06, 0x06, 0x06, + 0x06, 0x06, 0x06, 0x06, + + /* left border (13 pixels -> 104 Mcycles) , VDP status HBLANK flag cleared */ + 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x07, 0x07, 0x07, 0x07, + 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x08, 0x08, 0x08, 0x08, + 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x09, 0x09, 0x09, 0x09, + 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x0a, 0x0a, 0x0a, 0x0a, + 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0b, 0x0b, 0x0b, 0x0b, + 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0c, 0x0c, 0x0c, 0x0c, + 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, + + /* remaining active display (304 pixels -> 2432 Mcycles) */ + 0x0d, 0x0d, 0x0d, 0x0d, + 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0d, 0x0e, 0x0e, 0x0e, 0x0e, + 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0f, 0x0f, 0x0f, 0x0f, + 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0x9d, 0x9d, 0x9e, 0x9e, 0x9e, 0x9e, + 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9f, 0x9f, 0x9f, 0x9f, + 0x9f, 0x9f, 0x9f, 0x9f, 0x9f, 0x9f, 0x9f, 0x9f, 0x9f, 0x9f, 0x9f, 0x9f, 0xa0, 0xa0, 0xa0, 0xa0, + 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa1, 0xa1, 0xa1, 0xa1, + 0xa1, 0xa1, 0xa1, 0xa1, 0xa1, 0xa1, 0xa1, 0xa1, 0xa1, 0xa1, 0xa1, 0xa1, 0xa2, 0xa2, 0xa2, 0xa2, + 0xa2, 0xa2, 0xa2, 0xa2, 0xa2, 0xa2, 0xa2, 0xa2, 0xa2, 0xa2, 0xa2, 0xa2, 0xa3, 0xa3, 0xa3, 0xa3, + 0xa3, 0xa3, 0xa3, 0xa3, 0xa3, 0xa3, 0xa3, 0xa3, 0xa3, 0xa3, 0xa3, 0xa3, 0xa4, 0xa4, 0xa4, 0xa4, + 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4, 0xa4}; + +#endif /* _HVC_H_ */ + diff --git a/genplus-gx/core/input_hw/activator.c b/genplus-gx/core/input_hw/activator.c new file mode 100644 index 0000000000..e2566356b6 --- /dev/null +++ b/genplus-gx/core/input_hw/activator.c @@ -0,0 +1,134 @@ +/*************************************************************************************** + * Genesis Plus + * Sega Activator support + * + * Copyright (C) 2011-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + +static struct +{ + uint8 State; + uint8 Counter; +} activator[2]; + +void activator_reset(int index) +{ + + activator[index].State = 0x40; + activator[index].Counter = 0; +} + +INLINE unsigned char activator_read(int index) +{ + /* IR sensors 1-16 data (active low) */ + uint16 data = ~input.pad[index << 2]; + + /* D1 = D0 (data is ready) */ + uint8 temp = (activator[index].State & 0x01) << 1; + + switch (activator[index].Counter) + { + case 0: /* x x x x 0 1 0 0 */ + temp |= 0x04; + break; + + case 1: /* x x l1 l2 l3 l4 1 1 */ + temp |= ((data << 2) & 0x3C); + break; + + case 2: /* x x l5 l6 l7 l8 0 0 */ + temp |= ((data >> 2) & 0x3C); + break; + + case 3: /* x x h1 h2 h3 h4 1 1 */ + temp |= ((data >> 6) & 0x3C); + break; + + case 4: /* x x h5 h6 h7 h8 0 0 */ + temp |= ((data >> 10) & 0x3C); + break; + } + + return temp; +} + +INLINE void activator_write(int index, unsigned char data, unsigned char mask) +{ + /* update bits set as output only */ + data = (activator[index].State & ~mask) | (data & mask); + + /* TH transitions */ + if ((activator[index].State ^ data) & 0x40) + { + /* reset sequence cycle */ + activator[index].Counter = 0; + } + else + { + /* D0 transitions */ + if ((activator[index].State ^ data) & 0x01) + { + /* increment sequence cycle */ + if (activator[index].Counter < 4) + { + activator[index].Counter++; + } + } + } + + /* update internal state */ + activator[index].State = data; +} + +unsigned char activator_1_read(void) +{ + return activator_read(0); +} + +unsigned char activator_2_read(void) +{ + return activator_read(1); +} + +void activator_1_write(unsigned char data, unsigned char mask) +{ + activator_write(0, data, mask); +} + +void activator_2_write(unsigned char data, unsigned char mask) +{ + activator_write(1, data, mask); +} diff --git a/genplus-gx/core/input_hw/activator.h b/genplus-gx/core/input_hw/activator.h new file mode 100644 index 0000000000..18c18fee24 --- /dev/null +++ b/genplus-gx/core/input_hw/activator.h @@ -0,0 +1,49 @@ +/*************************************************************************************** + * Genesis Plus + * Sega Activator support + * + * Copyright (C) 2011-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _ACTIVATOR_H_ +#define _ACTIVATOR_H_ + +/* Function prototypes */ +extern void activator_reset(int index); +extern unsigned char activator_1_read(void); +extern unsigned char activator_2_read(void); +extern void activator_1_write(unsigned char data, unsigned char mask); +extern void activator_2_write(unsigned char data, unsigned char mask); + +#endif diff --git a/genplus-gx/core/input_hw/gamepad.c b/genplus-gx/core/input_hw/gamepad.c new file mode 100644 index 0000000000..a523b302d1 --- /dev/null +++ b/genplus-gx/core/input_hw/gamepad.c @@ -0,0 +1,241 @@ +/*************************************************************************************** + * Genesis Plus + * 3-Buttons & 6-Buttons pad support + * Support for J-CART & 4-Way Play adapters + * + * Copyright (C) 2007-2011 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "gamepad.h" + +static struct +{ + uint8 State; + uint8 Counter; + uint8 Timeout; +} gamepad[MAX_DEVICES]; + +static uint8 pad_index; + + +void gamepad_reset(int port) +{ + /* default state (Gouketsuji Ichizoku / Power Instinct, Samurai Spirits / Samurai Shodown) */ + gamepad[port].State = 0x40; + gamepad[port].Counter = 0; + gamepad[port].Timeout = 0; + + /* reset pad index (4-WayPlay) */ + pad_index = 0; +} + +void gamepad_refresh(int port) +{ + /* 6-buttons pad */ + if (gamepad[port].Timeout++ > 25) + { + gamepad[port].Counter = 0; + gamepad[port].Timeout = 0; + } +} + +INLINE unsigned char gamepad_read(int port) +{ + /* bit 7 is latched, returns current TH state */ + unsigned int data = (gamepad[port].State & 0x40) | 0x3F; + + /* pad value */ + unsigned int val = input.pad[port]; + + /* get current step (TH state) */ + unsigned int step = gamepad[port].Counter | ((data >> 6) & 1); + + switch (step) + { + case 1: /*** First High ***/ + case 3: /*** Second High ***/ + case 5: /*** Third High ***/ + { + /* TH = 1 : ?1CBRLDU */ + data &= ~(val & 0x3F); + break; + } + + case 0: /*** First low ***/ + case 2: /*** Second low ***/ + { + /* TH = 0 : ?0SA00DU */ + data &= ~(val & 0x03); + data &= ~((val >> 2) & 0x30); + data &= ~0x0C; + break; + } + + /* 6buttons specific (taken from gen-hw.txt) */ + /* A 6-button gamepad allows the extra buttons to be read based on how */ + /* many times TH is switched from 1 to 0 (and not 0 to 1). Observe the */ + /* following sequence */ + /* + TH = 1 : ?1CBRLDU 3-button pad return value + TH = 0 : ?0SA00DU 3-button pad return value + TH = 1 : ?1CBRLDU 3-button pad return value + TH = 0 : ?0SA0000 D3-0 are forced to '0' + TH = 1 : ?1CBMXYZ Extra buttons returned in D3-0 + TH = 0 : ?0SA1111 D3-0 are forced to '1' + */ + case 4: /*** Third Low ***/ + { + /* TH = 0 : ?0SA0000 D3-0 are forced to '0'*/ + data &= ~((val >> 2) & 0x30); + data &= ~0x0F; + break; + } + + case 6: /*** Fourth Low ***/ + { + /* TH = 0 : ?0SA1111 D3-0 are forced to '1'*/ + data &= ~((val >> 2) & 0x30); + break; + } + + case 7: /*** Fourth High ***/ + { + /* TH = 1 : ?1CBMXYZ Extra buttons returned in D3-0*/ + data &= ~(val & 0x30); + data &= ~((val >> 8) & 0x0F); + break; + } + } + + return data; +} + +INLINE void gamepad_write(int port, unsigned char data, unsigned char mask) +{ + /* update bits set as output only */ + data = (gamepad[port].State & ~mask) | (data & mask); + + if (input.dev[port] == DEVICE_PAD6B) + { + /* TH=0 to TH=1 transition */ + if (!(gamepad[port].State & 0x40) && (data & 0x40)) + { + gamepad[port].Counter = (gamepad[port].Counter + 2) & 6; + gamepad[port].Timeout = 0; + } + } + + /* update internal state */ + gamepad[port].State = data; +} + + +/*--------------------------------------------------------------------------*/ +/* Default ports handlers */ +/*--------------------------------------------------------------------------*/ + +unsigned char gamepad_1_read(void) +{ + return gamepad_read(0); +} + +unsigned char gamepad_2_read(void) +{ + return gamepad_read(4); +} + +void gamepad_1_write(unsigned char data, unsigned char mask) +{ + gamepad_write(0, data, mask); +} + +void gamepad_2_write(unsigned char data, unsigned char mask) +{ + gamepad_write(4, data, mask); +} + +/*--------------------------------------------------------------------------*/ +/* 4-WayPlay ports handler */ +/*--------------------------------------------------------------------------*/ + +unsigned char wayplay_1_read(void) +{ + if (pad_index < 4) + { + return gamepad_read(pad_index); + } + + /* multitap detection */ + return 0x70; +} + +unsigned char wayplay_2_read(void) +{ + return 0x7F; +} + +void wayplay_1_write(unsigned char data, unsigned char mask) +{ + if (pad_index < 4) + { + gamepad_write(pad_index, data, mask); + } +} + +void wayplay_2_write(unsigned char data, unsigned char mask) +{ + if ((mask & 0x70) == 0x70) + { + pad_index = (data & 0x70) >> 4; + } +} + + +/*--------------------------------------------------------------------------*/ +/* J-Cart memory handlers */ +/*--------------------------------------------------------------------------*/ + +unsigned int jcart_read(unsigned int address) +{ + /* TH2 output read is fixed to zero (fixes Micro Machines 2) */ + return ((gamepad_read(5) & 0x7F) | ((gamepad_read(6) & 0x3F) << 8)); +} + +void jcart_write(unsigned int address, unsigned int data) +{ + gamepad_write(5, (data & 1) << 6, 0x40); + gamepad_write(6, (data & 1) << 6, 0x40); + return; +} diff --git a/genplus-gx/core/input_hw/gamepad.h b/genplus-gx/core/input_hw/gamepad.h new file mode 100644 index 0000000000..5100e01fd4 --- /dev/null +++ b/genplus-gx/core/input_hw/gamepad.h @@ -0,0 +1,57 @@ +/*************************************************************************************** + * Genesis Plus + * 3-Buttons & 6-Buttons pad support + * Support for J-CART & 4-Way Play adapters + * + * Copyright (C) 2007-2011 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _GAMEPAD_H_ +#define _GAMEPAD_H_ + +/* Function prototypes */ +extern void gamepad_reset(int port); +extern void gamepad_refresh(int port); +extern unsigned char gamepad_1_read(void); +extern unsigned char gamepad_2_read(void); +extern void gamepad_1_write(unsigned char data, unsigned char mask); +extern void gamepad_2_write(unsigned char data, unsigned char mask); +extern unsigned char wayplay_1_read(void); +extern unsigned char wayplay_2_read(void); +extern void wayplay_1_write(unsigned char data, unsigned char mask); +extern void wayplay_2_write(unsigned char data, unsigned char mask); +extern unsigned int jcart_read(unsigned int address); +extern void jcart_write(unsigned int address, unsigned int data); + +#endif diff --git a/genplus-gx/core/input_hw/input.c b/genplus-gx/core/input_hw/input.c new file mode 100644 index 0000000000..ce82634dc7 --- /dev/null +++ b/genplus-gx/core/input_hw/input.c @@ -0,0 +1,374 @@ +/*************************************************************************************** + * Genesis Plus + * Input peripherals support + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code) + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "gamepad.h" +#include "lightgun.h" +#include "mouse.h" +#include "activator.h" +#include "xe_a1p.h" +#include "teamplayer.h" +#include "paddle.h" +#include "sportspad.h" +#include "terebi_oekaki.h" + +t_input input; +int old_system[2] = {-1,-1}; + + +void input_init(void) +{ + int i; + int player = 0; + + for (i=0; i> 2); + break; + } + + case DEVICE_XE_A1P: + { + xe_a1p_reset(i); + break; + } + + case DEVICE_PADDLE: + { + paddle_reset(i); + break; + } + + case DEVICE_SPORTSPAD: + { + sportspad_reset(i); + break; + } + + case DEVICE_TEREBI: + { + terebi_oekaki_reset(); + break; + } + + default: + { + break; + } + } + } + + /* Team Player */ + for (i=0; i<2; i++) + { + if (input.system[i] == SYSTEM_TEAMPLAYER) + { + teamplayer_reset(i); + } + } +} + +void input_refresh(void) +{ + int i; + for (i=0; i> 2) & 0x10); + + /* Check that TH is set as an input */ + if (io_reg[0x0F] & (0x02 << (port >> 1))) + { + /* Get current X position (phaser is only used in MS compatiblity mode) */ + int hcounter = hctab[(Z80.cycles + SMS_CYCLE_OFFSET) % MCYCLES_PER_LINE]; + + /* Compare with gun position */ + int dx = input.analog[port][0] - (hcounter << 1); + int dy = input.analog[port][1] - (v_counter); + + /* Check if current pixel is within lightgun spot ? */ + if ((abs(dy) <= 5) && (abs(dx) <= 60)) + { + /* set TH low */ + temp &= ~0x40; + + /* prevents multiple latch at each port read */ + if (lightgun.State) + { + /* latch estimated HC value */ + hvc_latch = 0x10000 | (input.x_offset + (input.analog[port][0] >> 1)); + lightgun.State = 0; + } + else + { + lightgun.State = 1; + } + } + } + + return temp & 0x7F; +} + +unsigned char phaser_1_read(void) +{ + return phaser_read(0); +} + +unsigned char phaser_2_read(void) +{ + return phaser_read(4); +} + + +/*--------------------------------------------------------------------------*/ +/* Sega Menacer */ +/*--------------------------------------------------------------------------*/ + +unsigned char menacer_read(void) +{ + /* D0=??? (INPUT_B), D1=TRIGGER (INPUT_A), D2=??? (INPUT_C), D3= START (INPUT_START) (active high) */ + /* TL & TR pins always return 0 (normally set as output) */ + /* TH always return 1 (0 on active pixel but button acquisition is always done during VBLANK) */ + unsigned data = input.pad[4] >> 4; + return ((data & 0x09) | ((data >> 1) & 0x02) | ((data << 1) & 0x04) | 0x40); +} + + +/*--------------------------------------------------------------------------*/ +/* Konami Justifiers */ +/*--------------------------------------------------------------------------*/ + +unsigned char justifier_read(void) +{ + /* Gun detection */ + if (lightgun.State & 0x40) + { + return 0x30; + } + + /* Return TRIGGER (INPUT_A) & START (INPUT_START) button status in D0-D1 (active low) */ + /* TL & TR pins should always return 1 (normally set as output) */ + /* LEFT & RIGHT pins should always return 0 */ + return (((~input.pad[lightgun.Port] >> 6) & 0x03) | 0x70); +} + +void justifier_write(unsigned char data, unsigned char mask) +{ + /* update bits set as output only, other bits are cleared (fixes Lethal Enforcers 2) */ + data &= mask; + + /* gun index */ + lightgun.Port = 4 + ((data >> 5) & 1); + + /* update internal state */ + lightgun.State = data; +} diff --git a/genplus-gx/core/input_hw/lightgun.h b/genplus-gx/core/input_hw/lightgun.h new file mode 100644 index 0000000000..0021297451 --- /dev/null +++ b/genplus-gx/core/input_hw/lightgun.h @@ -0,0 +1,51 @@ +/*************************************************************************************** + * Genesis Plus + * Sega Light Phaser, Menacer & Konami Justifiers support + * + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _LIGHTGUN_H_ +#define _LIGHTGUN_H_ + +/* Input devices port handlers */ +extern void lightgun_reset(int index); +extern void lightgun_refresh(int port); +extern unsigned char phaser_1_read(void); +extern unsigned char phaser_2_read(void); +extern unsigned char menacer_read(void); +extern unsigned char justifier_read(void); +extern void justifier_write(unsigned char data, unsigned char mask); + +#endif diff --git a/genplus-gx/core/input_hw/mouse.c b/genplus-gx/core/input_hw/mouse.c new file mode 100644 index 0000000000..c1db5d6fdb --- /dev/null +++ b/genplus-gx/core/input_hw/mouse.c @@ -0,0 +1,159 @@ +/*************************************************************************************** + * Genesis Plus + * Sega Mouse support + * + * Copyright (C) 2007-2011 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + +static struct +{ + uint8 State; + uint8 Counter; + uint8 Wait; + uint8 Port; +} mouse; + +void mouse_reset(int port) +{ + input.analog[port][0] = 0; + input.analog[port][1] = 0; + mouse.State = 0x60; + mouse.Counter = 0; + mouse.Wait = 0; + mouse.Port = port; +} + +unsigned char mouse_read() +{ + unsigned int temp = 0x00; + int x = input.analog[mouse.Port][0]; + int y = input.analog[mouse.Port][1]; + + switch (mouse.Counter) + { + case 0: /* initial */ + temp = 0x00; + break; + + case 1: /* xxxx1011 */ + temp = 0x0B; + break; + + case 2: /* xxxx1111 */ + temp = 0x0F; + break; + + case 3: /* xxxx1111 */ + temp = 0x0F; + break; + + case 4: /* Axis sign & overflow (not emulated) bits */ + temp |= (x < 0); + temp |= (y < 0) << 1; + /* + temp |= (abs(x) > 255) << 2; + temp |= (abs(y) > 255) << 3; + */ + break; + + case 5: /* START, A, B, C buttons state (active high) */ + temp = (input.pad[mouse.Port] >> 4) & 0x0F; + break; + + case 6: /* X Axis MSB */ + temp = (x >> 4) & 0x0F; + break; + + case 7: /* X Axis LSB */ + temp = (x & 0x0F); + break; + + case 8: /* Y Axis MSB */ + temp = (y >> 4) & 0x0F; + break; + + case 9: /* Y Axis LSB */ + temp = (y & 0x0F); + break; + } + + /* TL = busy status */ + if (mouse.Wait) + { + /* wait before ACK, fix some buggy mouse routine (Cannon Fodder, Shangai 2, Wack World,...) */ + mouse.Wait = 0; + + /* TL = !TR */ + temp |= (~mouse.State & 0x20) >> 1; + } + else + { + /* TL = TR (data is ready) */ + temp |= (mouse.State & 0x20) >> 1; + } + + return temp; +} + +void mouse_write(unsigned char data, unsigned char mask) +{ + /* update bits set as output only */ + data = (mouse.State & ~mask) | (data & mask); + + /* TH transition */ + if ((mouse.State ^ data) & 0x40) + { + /* start (TH=0) or stop (TH=1) acquisition */ + mouse.Counter = 1 - ((data & 0x40) >> 6); + } + + /* TR transition */ + if ((mouse.State ^ data) & 0x20) + { + /* acquisition in progress */ + if ((mouse.Counter > 0) && (mouse.Counter < 10)) + { + /* increment phase */ + mouse.Counter++; + } + + /* TL handshake latency */ + mouse.Wait = 1; + } + + /* update internal state */ + mouse.State = data; +} diff --git a/genplus-gx/core/input_hw/mouse.h b/genplus-gx/core/input_hw/mouse.h new file mode 100644 index 0000000000..6657d2a7f8 --- /dev/null +++ b/genplus-gx/core/input_hw/mouse.h @@ -0,0 +1,47 @@ +/*************************************************************************************** + * Genesis Plus + * Sega Mouse support + * + * Copyright (C) 2007-2011 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _MOUSE_H_ +#define _MOUSE_H_ + +/* Function prototypes */ +extern void mouse_reset(int port); +extern unsigned char mouse_read(void); +extern void mouse_write(unsigned char data, unsigned char mask); + +#endif diff --git a/genplus-gx/core/input_hw/paddle.c b/genplus-gx/core/input_hw/paddle.c new file mode 100644 index 0000000000..bf655c58c1 --- /dev/null +++ b/genplus-gx/core/input_hw/paddle.c @@ -0,0 +1,111 @@ +/*************************************************************************************** + * Genesis Plus + * Sega Paddle Control support + * + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + +static struct +{ + uint8 State; +} paddle[2]; + +void paddle_reset(int index) +{ + input.analog[index][0] = 128; + paddle[index>>2].State = 0x40; +} + +INLINE unsigned char paddle_read(int port) +{ + /* FIRE button status (active low) */ + unsigned char temp = ~(input.pad[port] & 0x10); + + /* Pad index */ + int index = port >> 2; + + /* Clear low bits */ + temp &= 0x70; + + /* Japanese model: automatic flip-flop */ + if (region_code < REGION_USA) + { + paddle[index].State ^= 0x40; + } + + if (paddle[index].State & 0x40) + { + /* return higher bits */ + temp |= (input.analog[port][0] >> 4) & 0x0F; + } + else + { + /* return lower bits */ + temp |= input.analog[port][0] & 0x0F; + + /* set TR low */ + temp &= ~0x20; + } + + return temp; +} + +INLINE void paddle_write(int index, unsigned char data, unsigned char mask) +{ + /* update bits set as output only */ + paddle[index].State = (paddle[index].State & ~mask) | (data & mask); +} + + +unsigned char paddle_1_read(void) +{ + return paddle_read(0); +} + +unsigned char paddle_2_read(void) +{ + return paddle_read(4); +} + +void paddle_1_write(unsigned char data, unsigned char mask) +{ + paddle_write(0, data, mask); +} + +void paddle_2_write(unsigned char data, unsigned char mask) +{ + paddle_write(1, data, mask); +} diff --git a/genplus-gx/core/input_hw/paddle.h b/genplus-gx/core/input_hw/paddle.h new file mode 100644 index 0000000000..6097a55ff6 --- /dev/null +++ b/genplus-gx/core/input_hw/paddle.h @@ -0,0 +1,49 @@ +/*************************************************************************************** + * Genesis Plus + * Sega Paddle Control support + * + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _PADDLE_H_ +#define _PADDLE_H_ + +/* Function prototypes */ +extern void paddle_reset(int index); +extern unsigned char paddle_1_read(void); +extern unsigned char paddle_2_read(void); +extern void paddle_1_write(unsigned char data, unsigned char mask); +extern void paddle_2_write(unsigned char data, unsigned char mask); + +#endif diff --git a/genplus-gx/core/input_hw/sportspad.c b/genplus-gx/core/input_hw/sportspad.c new file mode 100644 index 0000000000..8dab4cf000 --- /dev/null +++ b/genplus-gx/core/input_hw/sportspad.c @@ -0,0 +1,134 @@ +/*************************************************************************************** + * Genesis Plus + * Sega Sports Pad support + * + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + +static struct +{ + uint8 State; + uint8 Counter; +} sportspad[2]; + +void sportspad_reset(int index) +{ + input.analog[index][0] = 128; + input.analog[index][1] = 128; + sportspad[index>>2].State = 0x40; + sportspad[index>>2].Counter = 0; +} + +INLINE unsigned char sportspad_read(int port) +{ + /* Buttons 1(B) & 2(C) status (active low) */ + unsigned char temp = ~(input.pad[port] & 0x30); + + /* Pad index */ + int index = port >> 2; + + /* Clear low bits */ + temp &= 0x70; + + /* Detect current state */ + switch (sportspad[index].Counter & 3) + { + case 1: + { + /* X position high bits */ + temp |= (input.analog[port][0] >> 4) & 0x0F; + break; + } + + case 2: + { + /* X position low bits */ + temp |= input.analog[port][0] & 0x0F; + break; + } + + case 3: + { + /* Y position high bits */ + temp |= (input.analog[port][1] >> 4) & 0x0F; + break; + } + + default: + { + /* Y position low bits */ + temp |= input.analog[port][1] & 0x0F; + break; + } + } + + return temp; +} + +INLINE void sportspad_write(int index, unsigned char data, unsigned char mask) +{ + /* update bits set as output only */ + data = (sportspad[index].State & ~mask) | (data & mask); + + /* check TH transitions */ + if ((data ^ sportspad[index].State) & 0x40) + { + sportspad[index].Counter++; + } + + /* update internal state */ + sportspad[index].State = data; +} + +unsigned char sportspad_1_read(void) +{ + return sportspad_read(0); +} + +unsigned char sportspad_2_read(void) +{ + return sportspad_read(4); +} + +void sportspad_1_write(unsigned char data, unsigned char mask) +{ + sportspad_write(0, data, mask); +} + +void sportspad_2_write(unsigned char data, unsigned char mask) +{ + sportspad_write(1, data, mask); +} diff --git a/genplus-gx/core/input_hw/sportspad.h b/genplus-gx/core/input_hw/sportspad.h new file mode 100644 index 0000000000..d5ae383cb1 --- /dev/null +++ b/genplus-gx/core/input_hw/sportspad.h @@ -0,0 +1,49 @@ +/*************************************************************************************** + * Genesis Plus + * Sega Sports Pad support + * + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _SPORTSPAD_H_ +#define _SPORTSPAD_H_ + +/* Function prototypes */ +extern void sportspad_reset(int index); +extern unsigned char sportspad_1_read(void); +extern unsigned char sportspad_2_read(void); +extern void sportspad_1_write(unsigned char data, unsigned char mask); +extern void sportspad_2_write(unsigned char data, unsigned char mask); + +#endif diff --git a/genplus-gx/core/input_hw/teamplayer.c b/genplus-gx/core/input_hw/teamplayer.c new file mode 100644 index 0000000000..bca12a1239 --- /dev/null +++ b/genplus-gx/core/input_hw/teamplayer.c @@ -0,0 +1,176 @@ +/*************************************************************************************** + * Genesis Plus + * Team Player support + * + * Copyright (C) 2007-2011 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + +static struct +{ + uint8 State; + uint8 Counter; + uint8 Table[12]; +} teamplayer[2]; + + +void teamplayer_init(int port) +{ + int i,padnum; + int index = 0; + + /* this table determines which gamepad input should be returned during acquisition sequence + index = teamplayer read table index: 0=1st read, 1=2nd read, ... + table = high bits are pad index, low bits are pad input shift: 0=RLDU, 4=SABC, 8=MXYZ + */ + for (i=0; i<4; i++) + { + padnum = (4 * port) + i; + if (input.dev[padnum] == DEVICE_PAD3B) + { + padnum = padnum << 4; + teamplayer[port].Table[index++] = padnum; + teamplayer[port].Table[index++] = padnum | 4; + } + else + { + padnum = padnum << 4; + teamplayer[port].Table[index++] = padnum; + teamplayer[port].Table[index++] = padnum | 4; + teamplayer[port].Table[index++] = padnum | 8; + } + } +} + +void teamplayer_reset(int port) +{ + teamplayer[port].State = 0x60; /* TH = 1, TR = 1 */ + teamplayer[port].Counter = 0; +} + +INLINE unsigned int teamplayer_read(int port) +{ + unsigned int counter = teamplayer[port].Counter; + + /* acquisition sequence */ + switch (counter) + { + case 0: /* initial state: TH = 1, TR = 1 -> RLDU = 0011 */ + { + return 0x73; + } + + case 1: /* start request: TH = 0, TR = 1 -> RLDU = 1111 */ + { + return 0x3F; + } + + case 2: + case 3: /* ack request: TH=0, TR=0/1 -> RLDU = 0000 */ + { + /* TL should match TR */ + return ((teamplayer[port].State & 0x20) >> 1); + } + + case 4: + case 5: + case 6: + case 7: /* PAD type */ + { + unsigned int retval = input.dev[(port << 2) + (counter - 4)]; + + /* TL should match TR */ + return (((teamplayer[port].State & 0x20) >> 1) | retval); + } + + default: /* PAD status */ + { + unsigned int retval = 0x0F; + + /* SEGA teamplayer returns successively PAD1 -> PAD2 -> PAD3 -> PAD4 inputs */ + unsigned int padnum = teamplayer[port].Table[counter - 8] >> 4; + + /* Each PAD inputs is obtained through 2 or 3 sequential reads: RLDU -> SACB -> MXYZ */ + retval &= ~(input.pad[padnum] >> (teamplayer[port].Table[counter - 8] & 0x0F)); + + /* TL should match TR */ + return (((teamplayer[port].State & 0x20) >> 1) | retval); + } + } +} + +INLINE void teamplayer_write(int port, unsigned char data, unsigned char mask) +{ + /* update bits set as output only */ + unsigned int state = (teamplayer[port].State & ~mask) | (data & mask); + + /* TH & TR handshaking */ + if ((teamplayer[port].State ^ state) & 0x60) + { + if (state & 0x40) + { + /* TH high -> reset counter */ + teamplayer[port].Counter = 0; + } + else + { + /* increment counter */ + teamplayer[port].Counter++; + } + + /* update internal state */ + teamplayer[port].State = state; + } +} + +unsigned char teamplayer_1_read(void) +{ + return teamplayer_read(0); +} + +unsigned char teamplayer_2_read(void) +{ + return teamplayer_read(1); +} + +void teamplayer_1_write(unsigned char data, unsigned char mask) +{ + teamplayer_write(0, data, mask); +} + +void teamplayer_2_write(unsigned char data, unsigned char mask) +{ + teamplayer_write(1, data, mask); +} diff --git a/genplus-gx/core/input_hw/teamplayer.h b/genplus-gx/core/input_hw/teamplayer.h new file mode 100644 index 0000000000..6e53c317fa --- /dev/null +++ b/genplus-gx/core/input_hw/teamplayer.h @@ -0,0 +1,50 @@ +/*************************************************************************************** + * Genesis Plus + * Team Player support + * + * Copyright (C) 2007-2011 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _TEAMPLAYER_H_ +#define _TEAMPLAYER_H_ + +/* Function prototypes */ +extern void teamplayer_init(int port); +extern void teamplayer_reset(int port); +extern unsigned char teamplayer_1_read(void); +extern unsigned char teamplayer_2_read(void); +extern void teamplayer_1_write(unsigned char data, unsigned char mask); +extern void teamplayer_2_write(unsigned char data, unsigned char mask); + +#endif diff --git a/genplus-gx/core/input_hw/terebi_oekaki.c b/genplus-gx/core/input_hw/terebi_oekaki.c new file mode 100644 index 0000000000..94bb89d1ac --- /dev/null +++ b/genplus-gx/core/input_hw/terebi_oekaki.c @@ -0,0 +1,77 @@ +/*************************************************************************************** + * Genesis Plus + * Terebi Oekaki graphic board support + * + * Copyright (C) 2011 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + +static struct +{ + uint8 axis; + uint8 busy; +} tablet; + +void terebi_oekaki_reset(void) +{ + input.analog[0][0] = 128; + input.analog[0][1] = 128; + tablet.axis = 1; + tablet.busy = 1; +} + +unsigned short terebi_oekaki_read(void) +{ + uint16 data = (tablet.busy << 15) | input.analog[0][tablet.axis]; + + if (!(input.pad[0] & INPUT_B)) + { + data |= 0x100; + } + + /* clear BUSY flag */ + tablet.busy = 0; + + return data; +} + +void terebi_oekaki_write(unsigned char data) +{ + /* X (1) or Y (0) axis */ + tablet.axis = (data & 1) ^ 1; + + /* set BUSY flag */ + tablet.busy = 1; +} diff --git a/genplus-gx/core/input_hw/terebi_oekaki.h b/genplus-gx/core/input_hw/terebi_oekaki.h new file mode 100644 index 0000000000..7041c3179c --- /dev/null +++ b/genplus-gx/core/input_hw/terebi_oekaki.h @@ -0,0 +1,47 @@ +/*************************************************************************************** + * Genesis Plus + * Terebi Oekaki graphic board support + * + * Copyright (C) 2011 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _TEREBI_H_ +#define _TEREBI_H_ + +/* Function prototypes */ +extern void terebi_oekaki_reset(void); +extern unsigned short terebi_oekaki_read(void); +extern void terebi_oekaki_write(unsigned char data); + +#endif diff --git a/genplus-gx/core/input_hw/xe_a1p.c b/genplus-gx/core/input_hw/xe_a1p.c new file mode 100644 index 0000000000..1f02774aaa --- /dev/null +++ b/genplus-gx/core/input_hw/xe_a1p.c @@ -0,0 +1,182 @@ +/*************************************************************************************** + * Genesis Plus + * XE-A1P analog controller support + * + * Copyright (C) 2011-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + +static struct +{ + uint8 State; + uint8 Counter; + uint8 Latency; +} xe_a1p[2]; + +void xe_a1p_reset(int index) +{ + input.analog[index][0] = 128; + input.analog[index][1] = 128; + input.analog[index+1][0] = 128; + index >>= 2; + xe_a1p[index].State = 0x40; + xe_a1p[index].Counter = 0; + xe_a1p[index].Latency = 0; +} + +INLINE unsigned char xe_a1p_read(int index) +{ + unsigned int temp = 0x40; + unsigned int port = index << 2; + + /* Left Stick X & Y analog values (bidirectional) */ + int x = input.analog[port][0]; + int y = input.analog[port][1]; + + /* Right Stick X or Y value (unidirectional) */ + int z = input.analog[port+1][0]; + + /* Buttons status (active low) */ + uint16 pad = ~input.pad[port]; + + /* Current internal cycle (0-7) */ + unsigned int cycle = xe_a1p[index].Counter & 7; + + /* Current 4-bit data cycle */ + /* There are eight internal data cycle for each 5 acquisition sequence */ + /* First 4 return the same 4-bit data, next 4 return next 4-bit data */ + switch (xe_a1p[index].Counter >> 2) + { + case 0: + temp |= ((pad >> 8) & 0x0F); /* E1 E2 Start Select */ + break; + case 1: + temp |= ((pad >> 4) & 0x0F); /* A B C D */ + break; + case 2: + temp |= ((x >> 4) & 0x0F); + break; + case 3: + temp |= ((y >> 4) & 0x0F); + break; + case 4: + break; + case 5: + temp |= ((z >> 4) & 0x0F); + break; + case 6: + temp |= (x & 0x0F); + break; + case 7: + temp |= (y & 0x0F); + break; + case 8: + break; + case 9: + temp |= (z & 0x0F); + break; + } + + /* TL indicates which part of data is returned (0=1st part, 1=2nd part) */ + temp |= ((cycle & 4) << 2); + + /* TR indicates if data is ready (0=ready, 1=not ready) */ + /* Fastest One input routine actually expects this bit to switch between 0 & 1 */ + /* so we make the first read of a data cycle return 1 then 0 for remaining reads */ + temp |= (!(cycle & 3) << 5); + + /* Automatically increment data cycle on each read (within current acquisition sequence) */ + cycle = (cycle + 1) & 7; + + /* Update internal cycle counter */ + xe_a1p[index].Counter = (xe_a1p[index].Counter & ~7) | cycle; + + /* Update internal latency on each read */ + xe_a1p[index].Latency++; + + return temp; +} + +INLINE void xe_a1p_write(int index, unsigned char data, unsigned char mask) +{ + /* update bits set as output only */ + data = (xe_a1p[index].State & ~mask) | (data & mask); + + /* look for TH 1->0 transitions */ + if (!(data & 0x40) && (xe_a1p[index].State & 0x40)) + { + /* reset acquisition cycle */ + xe_a1p[index].Latency = xe_a1p[index].Counter = 0; + } + else + { + /* some games immediately write new data to TH */ + /* so we make sure first sequence has actually been handled */ + if (xe_a1p[index].Latency > 2) + { + /* next acquisition sequence */ + xe_a1p[index].Counter = (xe_a1p[index].Counter & ~7) + 8; + + /* 5 sequence max with 8 cycles each */ + if (xe_a1p[index].Counter > 32) + { + xe_a1p[index].Counter = 32; + } + } + } + + /* update internal state */ + xe_a1p[index].State = data; +} + +unsigned char xe_a1p_1_read(void) +{ + return xe_a1p_read(0); +} + +unsigned char xe_a1p_2_read(void) +{ + return xe_a1p_read(1); +} + +void xe_a1p_1_write(unsigned char data, unsigned char mask) +{ + xe_a1p_write(0, data, mask); +} + +void xe_a1p_2_write(unsigned char data, unsigned char mask) +{ + xe_a1p_write(1, data, mask); +} diff --git a/genplus-gx/core/input_hw/xe_a1p.h b/genplus-gx/core/input_hw/xe_a1p.h new file mode 100644 index 0000000000..fe5b6a13bc --- /dev/null +++ b/genplus-gx/core/input_hw/xe_a1p.h @@ -0,0 +1,49 @@ +/*************************************************************************************** + * Genesis Plus + * XE-A1P analog controller support + * + * Copyright (C) 2011-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _XE_A1PH_ +#define _XE_A1PH_ + +/* Function prototypes */ +extern void xe_a1p_reset(int index); +extern unsigned char xe_a1p_1_read(void); +extern unsigned char xe_a1p_2_read(void); +extern void xe_a1p_1_write(unsigned char data, unsigned char mask); +extern void xe_a1p_2_write(unsigned char data, unsigned char mask); + +#endif diff --git a/genplus-gx/core/io_ctrl.c b/genplus-gx/core/io_ctrl.c new file mode 100644 index 0000000000..f221bf5835 --- /dev/null +++ b/genplus-gx/core/io_ctrl.c @@ -0,0 +1,591 @@ +/*************************************************************************************** + * Genesis Plus + * I/O controller (Genesis & Master System modes) + * + * Support for Master System (315-5216, 315-5237 & 315-5297), Game Gear & Mega Drive I/O chips + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code) + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "gamepad.h" +#include "lightgun.h" +#include "mouse.h" +#include "activator.h" +#include "xe_a1p.h" +#include "teamplayer.h" +#include "paddle.h" +#include "sportspad.h" + +uint8 io_reg[0x10]; + +uint8 region_code = REGION_USA; + +static struct port_t +{ + void (*data_w)(unsigned char data, unsigned char mask); + unsigned char (*data_r)(void); +} port[3]; + +static void dummy_write(unsigned char data, unsigned char mask) +{ +} + +static unsigned char dummy_read(void) +{ + return 0x7F; +} + +/***************************************************************************** + * I/O chip initialization * + * * + *****************************************************************************/ +void io_init(void) +{ + /* Initialize connected peripherals */ + input_init(); + + /* Initialize IO Ports handlers & connected peripherals */ + switch (input.system[0]) + { + case SYSTEM_MS_GAMEPAD: + { + port[0].data_w = dummy_write; + port[0].data_r = gamepad_1_read; + break; + } + + case SYSTEM_MD_GAMEPAD: + { + port[0].data_w = gamepad_1_write; + port[0].data_r = gamepad_1_read; + break; + } + + case SYSTEM_MOUSE: + { + port[0].data_w = mouse_write; + port[0].data_r = mouse_read; + break; + } + + case SYSTEM_ACTIVATOR: + { + port[0].data_w = activator_1_write; + port[0].data_r = activator_1_read; + break; + } + + case SYSTEM_XE_A1P: + { + port[0].data_w = xe_a1p_1_write; + port[0].data_r = xe_a1p_1_read; + break; + } + + case SYSTEM_WAYPLAY: + { + port[0].data_w = wayplay_1_write; + port[0].data_r = wayplay_1_read; + break; + } + + case SYSTEM_TEAMPLAYER: + { + port[0].data_w = teamplayer_1_write; + port[0].data_r = teamplayer_1_read; + break; + } + + case SYSTEM_LIGHTPHASER: + { + port[0].data_w = dummy_write; + port[0].data_r = phaser_1_read; + break; + } + + case SYSTEM_PADDLE: + { + port[0].data_w = paddle_1_write; + port[0].data_r = paddle_1_read; + break; + } + + case SYSTEM_SPORTSPAD: + { + port[0].data_w = sportspad_1_write; + port[0].data_r = sportspad_1_read; + break; + } + + default: + { + port[0].data_w = dummy_write; + port[0].data_r = dummy_read; + break; + } + } + + switch (input.system[1]) + { + case SYSTEM_MS_GAMEPAD: + { + port[1].data_w = dummy_write; + port[1].data_r = gamepad_2_read; + break; + } + + case SYSTEM_MD_GAMEPAD: + { + port[1].data_w = gamepad_2_write; + port[1].data_r = gamepad_2_read; + break; + } + + case SYSTEM_MOUSE: + { + port[1].data_w = mouse_write; + port[1].data_r = mouse_read; + break; + } + + case SYSTEM_XE_A1P: + { + port[1].data_w = xe_a1p_2_write; + port[1].data_r = xe_a1p_2_read; + break; + } + + case SYSTEM_ACTIVATOR: + { + port[1].data_w = activator_2_write; + port[1].data_r = activator_2_read; + break; + } + + case SYSTEM_MENACER: + { + port[1].data_w = dummy_write; + port[1].data_r = menacer_read; + break; + } + + case SYSTEM_JUSTIFIER: + { + port[1].data_w = justifier_write; + port[1].data_r = justifier_read; + break; + } + + case SYSTEM_WAYPLAY: + { + port[1].data_w = wayplay_2_write; + port[1].data_r = wayplay_2_read; + break; + } + + case SYSTEM_TEAMPLAYER: + { + port[1].data_w = teamplayer_2_write; + port[1].data_r = teamplayer_2_read; + break; + } + + case SYSTEM_LIGHTPHASER: + { + port[1].data_w = dummy_write; + port[1].data_r = phaser_2_read; + break; + } + + case SYSTEM_PADDLE: + { + port[1].data_w = paddle_2_write; + port[1].data_r = paddle_2_read; + break; + } + + case SYSTEM_SPORTSPAD: + { + port[1].data_w = sportspad_2_write; + port[1].data_r = sportspad_2_read; + break; + } + + default: + { + port[1].data_w = dummy_write; + port[1].data_r = dummy_read; + break; + } + } + + /* External Port (unconnected) */ + port[2].data_w = dummy_write; + port[2].data_r = dummy_read; +} + + +void io_reset(void) +{ + /* Reset I/O registers */ + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + io_reg[0x00] = region_code | (config.bios & 1); + io_reg[0x01] = 0x00; + io_reg[0x02] = 0x00; + io_reg[0x03] = 0x00; + io_reg[0x04] = 0x00; + io_reg[0x05] = 0x00; + io_reg[0x06] = 0x00; + io_reg[0x07] = 0xFF; + io_reg[0x08] = 0x00; + io_reg[0x09] = 0x00; + io_reg[0x0A] = 0xFF; + io_reg[0x0B] = 0x00; + io_reg[0x0C] = 0x00; + io_reg[0x0D] = 0xFB; + io_reg[0x0E] = 0x00; + io_reg[0x0F] = 0x00; + + /* CD unit detection */ + if (system_hw != SYSTEM_MCD) + { + io_reg[0x00] |= 0x20; + } + } + else + { + /* Game Gear specific registers */ + io_reg[0x00] = 0x80 | (region_code >> 1); + io_reg[0x01] = 0x00; + io_reg[0x02] = 0xFF; + io_reg[0x03] = 0x00; + io_reg[0x04] = 0xFF; + io_reg[0x05] = 0x00; + io_reg[0x06] = 0xFF; + + /* initial !RESET input */ + io_reg[0x0D] = IO_RESET_HI; + + /* default !CONT input */ + if (system_hw != SYSTEM_PBC) + { + io_reg[0x0D] |= IO_CONT1_HI; + } + + /* Control registers */ + io_reg[0x0E] = 0x00; + io_reg[0x0F] = 0xFF; + } + + /* Reset connected peripherals */ + input_reset(); +} + + +/***************************************************************************** + * I/O ports access from 68k (Genesis mode) * + * * + *****************************************************************************/ + +void io_68k_write(unsigned int offset, unsigned int data) +{ + switch (offset) + { + case 0x01: /* Port A Data */ + case 0x02: /* Port B Data */ + case 0x03: /* Port C Data */ + { + io_reg[offset] = data; + port[offset-1].data_w(data, io_reg[offset + 3]); + return; + } + + case 0x04: /* Port A Ctrl */ + case 0x05: /* Port B Ctrl */ + case 0x06: /* Port C Ctrl */ + { + if (data != io_reg[offset]) + { + io_reg[offset] = data; + port[offset-4].data_w(io_reg[offset-3], data); + } + return; + } + + case 0x07: /* Port A TxData */ + case 0x0A: /* Port B TxData */ + case 0x0D: /* Port C TxData */ + { + io_reg[offset] = data; + return; + } + + case 0x09: /* Port A S-Ctrl */ + case 0x0C: /* Port B S-Ctrl */ + case 0x0F: /* Port C S-Ctrl */ + { + io_reg[offset] = data & 0xF8; + return; + } + + default: /* Read-only ports */ + { + return; + } + } +} + +unsigned int io_68k_read(unsigned int offset) +{ + switch(offset) + { + case 0x01: /* Port A Data */ + case 0x02: /* Port B Data */ + case 0x03: /* Port C Data */ + { + unsigned int mask = 0x80 | io_reg[offset + 3]; + unsigned int data = port[offset-1].data_r(); + return (io_reg[offset] & mask) | (data & ~mask); + } + + default: /* return register value */ + { + return io_reg[offset]; + } + } +} + + +/***************************************************************************** + * I/O ports access from Z80 * + * * + *****************************************************************************/ + +void io_z80_write(unsigned int offset, unsigned int data, unsigned int cycles) +{ + if (offset) + { + /* I/O Control register */ + if (region_code & REGION_USA) + { + /* + Bit Function + -------------- + D7 : Port B TH pin output level (1=high, 0=low) + D6 : Port B TR pin output level (1=high, 0=low) + D5 : Port A TH pin output level (1=high, 0=low) + D4 : Port A TR pin output level (1=high, 0=low) + D3 : Port B TH pin direction (1=input, 0=output) + D2 : Port B TR pin direction (1=input, 0=output) + D1 : Port A TH pin direction (1=input, 0=output) + D0 : Port A TR pin direction (1=input, 0=output) + */ + + /* Send TR/TH state to connected peripherals */ + port[0].data_w((data << 1) & 0x60, (~io_reg[0x0F] << 5) & 0x60); + port[1].data_w((data >> 1) & 0x60, (~io_reg[0x0F] << 3) & 0x60); + + + /* Check for TH low-to-high transitions on both ports */ + if ((!(io_reg[0x0F] & 0x80) && (data & 0x80)) || + (!(io_reg[0x0F] & 0x20) && (data & 0x20))) + { + /* Latch new HVC */ + hvc_latch = hctab[cycles % MCYCLES_PER_LINE] | 0x10000; + } + + /* Update I/O Control register */ + io_reg[0x0F] = data; + } + else + { + /* TH output is fixed to 0 & TR is always an input on japanese hardware */ + io_reg[0x0F] = (data | 0x05) & 0x5F; + + /* Port $DD bits D4-D5 return D0-D2 (cf. http://www2.odn.ne.jp/~haf09260/Sms/EnrSms.htm) */ + io_reg[0x0D] = ((data & 0x01) << 4) | ((data & 0x04) << 3); + } + } + else + { + /* Update Memory Control register */ + io_reg[0x0E] = data; + + /* Switch cartridge & BIOS ROM */ + sms_cart_switch(~data); + } +} + +unsigned int io_z80_read(unsigned int offset) +{ + /* Read port A & port B input data */ + unsigned int data = (port[0].data_r()) | (port[1].data_r() << 8); + + /* I/O control register value */ + unsigned int ctrl = io_reg[0x0F]; + + /* I/O ports */ + if (offset) + { + /* + Bit Function + -------------- + D7 : Port B TH pin input + D6 : Port A TH pin input + D5 : CONT input (0 on Mega Drive hardware, 1 otherwise) + D4 : RESET button (1: default, 0: pressed, only on Master System hardware) + D3 : Port B TR pin input + D2 : Port B TL pin input + D1 : Port B Right pin input + D0 : Port B Left pin input + */ + data = ((data >> 10) & 0x0F) | (data & 0x40) | ((data >> 7) & 0x80) | io_reg[0x0D]; + + /* clear !RESET input */ + io_reg[0x0D] |= IO_RESET_HI; + + /* Adjust port B TH state if configured as output */ + if (!(ctrl & 0x08)) + { + data &= ~0x80; + data |= (ctrl & 0x80); + } + + /* Adjust port A TH state if configured as output */ + if (!(ctrl & 0x02)) + { + data &= ~0x40; + data |= ((ctrl & 0x20) << 1); + } + + /* Adjust port B TR state if configured as output */ + if (!(ctrl & 0x04)) + { + data &= ~0x08; + data |= ((ctrl & 0x40) >> 3); + } + } + else + { + /* + Bit Function + -------------- + D7 : Port B Down pin input + D6 : Port B Up pin input + D5 : Port A TR pin input + D4 : Port A TL pin input + D3 : Port A Right pin input + D2 : Port A Left pin input + D1 : Port A Down pin input + D0 : Port A Up pin input + */ + data = (data & 0x3F) | ((data >> 2) & 0xC0); + + /* Adjust port A TR state if configured as output */ + if (!(ctrl & 0x01)) + { + data &= ~0x20; + data |= ((ctrl & 0x10) << 1); + } + } + + return data; +} + + +/***************************************************************************** + * Game Gear communication ports access * + * * + *****************************************************************************/ + +void io_gg_write(unsigned int offset, unsigned int data) +{ + switch (offset) + { + case 1: /* Parallel data register */ + io_reg[1] = data; + return; + + case 2: /* Data direction register and NMI enable */ + io_reg[2] = data; + return; + + case 3: /* Transmit data buffer */ + io_reg[3] = data; + return; + + case 5: /* Serial control (bits 0-2 are read-only) */ + io_reg[5] = data & 0xF8; + return; + + case 6: /* PSG Stereo output control */ + io_reg[6] = data; + SN76489_Config(Z80.cycles, config.psg_preamp, config.psgBoostNoise, data); + return; + + default: /* Read-only */ + return; + } +} + +unsigned int io_gg_read(unsigned int offset) +{ + switch (offset) + { + case 0: /* Mode Register */ + return (io_reg[0] & ~(input.pad[0] & INPUT_START)); + + case 1: /* Parallel data register (not connected) */ + return ((io_reg[1] & ~(io_reg[2] & 0x7F)) | (io_reg[2] & 0x7F)); + + case 2: /* Data direction register and NMI enable */ + return io_reg[2]; + + case 3: /* Transmit data buffer */ + return io_reg[3]; + + case 4: /* Receive data buffer */ + return io_reg[4]; + + case 5: /* Serial control */ + return io_reg[5]; + + default: /* Write-Only */ + return 0xFF; + } +} + diff --git a/genplus-gx/core/io_ctrl.h b/genplus-gx/core/io_ctrl.h new file mode 100644 index 0000000000..addc259725 --- /dev/null +++ b/genplus-gx/core/io_ctrl.h @@ -0,0 +1,68 @@ +/*************************************************************************************** + * Genesis Plus + * I/O controller + * + * Support for Master System (315-5216, 315-5237 & 315-5297), Game Gear & Mega Drive I/O chips + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code) + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _IO_CTRL_H_ +#define _IO_CTRL_H_ + +#define IO_RESET_HI 0x10 +#define IO_CONT1_HI 0x20 + +#define REGION_JAPAN_NTSC 0x00 +#define REGION_JAPAN_PAL 0x40 +#define REGION_USA 0x80 +#define REGION_EUROPE 0xC0 + +/* Global variables */ +extern uint8 io_reg[0x10]; +extern uint8 region_code; + +/* Function prototypes */ +extern void io_init(void); +extern void io_reset(void); +extern void io_68k_write(unsigned int offset, unsigned int data); +extern unsigned int io_68k_read(unsigned int offset); +extern void io_z80_write(unsigned int offset, unsigned int data, unsigned int cycles); +extern unsigned int io_z80_read(unsigned int offset); +extern void io_gg_write(unsigned int offset, unsigned int data); +extern unsigned int io_gg_read(unsigned int offset); + +#endif /* _IO_CTRL_H_ */ + diff --git a/genplus-gx/core/loadrom.c b/genplus-gx/core/loadrom.c new file mode 100644 index 0000000000..1cda87501e --- /dev/null +++ b/genplus-gx/core/loadrom.c @@ -0,0 +1,1136 @@ +/*************************************************************************************** + * Genesis Plus + * ROM Loading Support + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code) + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include +#include "shared.h" + +/*** ROM Information ***/ +#define ROMCONSOLE 256 +#define ROMCOPYRIGHT 272 +#define ROMDOMESTIC 288 +#define ROMWORLD 336 +#define ROMTYPE 384 +#define ROMPRODUCT 386 +#define ROMCHECKSUM 398 +#define ROMIOSUPPORT 400 +#define ROMROMSTART 416 +#define ROMROMEND 420 +#define ROMRAMINFO 424 +#define ROMRAMSTART 436 +#define ROMRAMEND 440 +#define ROMMODEMINFO 444 +#define ROMMEMO 456 +#define ROMCOUNTRY 496 + +#define P3BUTTONS 1 +#define P6BUTTONS 2 +#define PKEYBOARD 4 +#define PPRINTER 8 +#define PBALL 16 +#define PFLOPPY 32 +#define PACTIVATOR 64 +#define PTEAMPLAYER 128 +#define PMSYSTEMPAD 256 +#define PSERIAL 512 +#define PTABLET 1024 +#define PPADDLE 2048 +#define PCDROM 4096 +#define PMOUSE 8192 + +#define MAXCOMPANY 64 +#define MAXPERIPHERALS 15 + +typedef struct +{ + char companyid[6]; + char company[26]; +} COMPANYINFO; + +typedef struct +{ + char pID[2]; + char pName[14]; +} PERIPHERALINFO; + + +ROMINFO rominfo; +uint8 romtype; + +static uint8 rom_region; + +/*************************************************************************** + * Genesis ROM Manufacturers + * + * Based on the document provided at + * http://www.zophar.net/tech/files/Genesis_ROM_Format.txt + **************************************************************************/ +static const COMPANYINFO companyinfo[MAXCOMPANY] = +{ + {"ACLD", "Ballistic"}, + {"RSI", "Razorsoft"}, + {"SEGA", "SEGA"}, + {"TREC", "Treco"}, + {"VRGN", "Virgin Games"}, + {"WSTN", "Westone"}, + {"10", "Takara"}, + {"11", "Taito or Accolade"}, + {"12", "Capcom"}, + {"13", "Data East"}, + {"14", "Namco or Tengen"}, + {"15", "Sunsoft"}, + {"16", "Bandai"}, + {"17", "Dempa"}, + {"18", "Technosoft"}, + {"19", "Technosoft"}, + {"20", "Asmik"}, + {"22", "Micronet"}, + {"23", "Vic Tokai"}, + {"24", "American Sammy"}, + {"29", "Kyugo"}, + {"32", "Wolfteam"}, + {"33", "Kaneko"}, + {"35", "Toaplan"}, + {"36", "Tecmo"}, + {"40", "Toaplan"}, + {"42", "UFL Company Limited"}, + {"43", "Human"}, + {"45", "Game Arts"}, + {"47", "Sage's Creation"}, + {"48", "Tengen"}, + {"49", "Renovation or Telenet"}, + {"50", "Electronic Arts"}, + {"56", "Razorsoft"}, + {"58", "Mentrix"}, + {"60", "Victor Musical Ind."}, + {"69", "Arena"}, + {"70", "Virgin"}, + {"73", "Soft Vision"}, + {"74", "Palsoft"}, + {"76", "Koei"}, + {"79", "U.S. Gold"}, + {"81", "Acclaim/Flying Edge"}, + {"83", "Gametek"}, + {"86", "Absolute"}, + {"87", "Mindscape"}, + {"93", "Sony"}, + {"95", "Konami"}, + {"97", "Tradewest"}, + {"100", "T*HQ Software"}, + {"101", "Tecmagik"}, + {"112", "Designer Software"}, + {"113", "Psygnosis"}, + {"119", "Accolade"}, + {"120", "Code Masters"}, + {"125", "Interplay"}, + {"130", "Activision"}, + {"132", "Shiny & Playmates"}, + {"144", "Atlus"}, + {"151", "Infogrames"}, + {"161", "Fox Interactive"}, + {"177", "Ubisoft"}, + {"239", "Disney Interactive"}, + {"---", "Unknown"} +}; + +/*************************************************************************** + * Genesis Peripheral Information + * + * Based on the document provided at + * http://www.zophar.net/tech/files/Genesis_ROM_Format.txt + ***************************************************************************/ +static const PERIPHERALINFO peripheralinfo[MAXPERIPHERALS] = +{ + {"J", "3B Joypad"}, + {"6", "6B Joypad"}, + {"K", "Keyboard"}, + {"P", "Printer"}, + {"B", "Control Ball"}, + {"F", "Floppy Drive"}, + {"L", "Activator"}, + {"4", "Team Player"}, + {"0", "MS Joypad"}, + {"R", "RS232C Serial"}, + {"T", "Tablet"}, + {"V", "Paddle"}, + {"C", "CD-ROM"}, + {"M", "Mega Mouse"}, + {"G", "Menacer"}, +}; + +/*************************************************************************** + * + * Compute ROM real checksum. + ***************************************************************************/ +static uint16 getchecksum(uint8 *rom, int length) +{ + int i; + uint16 checksum = 0; + + for (i = 0; i < length; i += 2) + { + checksum += ((rom[i] << 8) + rom[i + 1]); + } + + return checksum; +} + + +/*************************************************************************** + * deinterleave_block + * + * Convert interleaved (.smd) ROM files. + ***************************************************************************/ +static void deinterleave_block(uint8 * src) +{ + int i; + uint8 block[0x4000]; + memcpy (block, src, 0x4000); + for (i = 0; i < 0x2000; i += 1) + { + src[i * 2 + 0] = block[0x2000 + (i)]; + src[i * 2 + 1] = block[0x0000 + (i)]; + } +} + +/*************************************************************************** + * + * Pass a pointer to the ROM base address. + ***************************************************************************/ +void getrominfo(char *romheader) +{ + /* Clear ROM info structure */ + memset (&rominfo, 0, sizeof (ROMINFO)); + + /* Genesis ROM header support */ + if (system_hw & SYSTEM_MD) + { + int i,j; + + memcpy (&rominfo.consoletype, romheader + ROMCONSOLE, 16); + memcpy (&rominfo.copyright, romheader + ROMCOPYRIGHT, 16); + + /* Domestic (japanese) name */ + rominfo.domestic[0] = romheader[ROMDOMESTIC]; + j = 1; + for (i=1; i<48; i++) + { + if ((rominfo.domestic[j-1] != 32) || (romheader[ROMDOMESTIC + i] != 32)) + { + rominfo.domestic[j] = romheader[ROMDOMESTIC + i]; + j++; + } + } + rominfo.domestic[j] = 0; + + /* International name */ + rominfo.international[0] = romheader[ROMWORLD]; + j=1; + for (i=1; i<48; i++) + { + if ((rominfo.international[j-1] != 32) || (romheader[ROMWORLD + i] != 32)) + { + rominfo.international[j] = romheader[ROMWORLD + i]; + j++; + } + } + rominfo.international[j] = 0; + + /* ROM informations */ + memcpy (&rominfo.ROMType, romheader + ROMTYPE, 2); + memcpy (&rominfo.product, romheader + ROMPRODUCT, 12); + memcpy (&rominfo.checksum, romheader + ROMCHECKSUM, 2); + memcpy (&rominfo.romstart, romheader + ROMROMSTART, 4); + memcpy (&rominfo.romend, romheader + ROMROMEND, 4); + memcpy (&rominfo.country, romheader + ROMCOUNTRY, 16); + + /* Checksums */ +#ifdef LSB_FIRST + rominfo.checksum = (rominfo.checksum >> 8) | ((rominfo.checksum & 0xff) << 8); +#endif + rominfo.realchecksum = getchecksum(((uint8 *) cart.rom) + 0x200, cart.romsize - 0x200); + + /* Supported peripherals */ + rominfo.peripherals = 0; + for (i = 0; i < 14; i++) + for (j=0; j < 14; j++) + if (romheader[ROMIOSUPPORT+i] == peripheralinfo[j].pID[0]) + rominfo.peripherals |= (1 << j); + } + else + { + uint16 offset = 0; + + /* detect Master System ROM header */ + if (!memcmp (&romheader[0x1ff0], "TMR SEGA", 8)) + { + offset = 0x1ff0; + } + else if (!memcmp (&romheader[0x3ff0], "TMR SEGA", 8)) + { + offset = 0x3ff0; + } + else if (!memcmp (&romheader[0x7ff0], "TMR SEGA", 8)) + { + offset = 0x7ff0; + } + + /* if found, get infos from header */ + if (offset) + { + /* checksum */ + rominfo.checksum = romheader[offset + 0x0a] | (romheader[offset + 0x0b] << 8); + + /* product code & version */ + sprintf(&rominfo.product[0], "%02d", romheader[offset + 0x0e] >> 4); + sprintf(&rominfo.product[2], "%02x", romheader[offset + 0x0d]); + sprintf(&rominfo.product[4], "%02x", romheader[offset + 0x0c]); + sprintf(&rominfo.product[6], "-%d", romheader[offset + 0x0e] & 0x0F); + + /* region code */ + switch (romheader[offset + 0x0f] >> 4) + { + case 3: + strcpy(rominfo.country,"SMS Japan"); + break; + case 4: + strcpy(rominfo.country,"SMS Export"); + break; + case 5: + strcpy(rominfo.country,"GG Japan"); + break; + case 6: + strcpy(rominfo.country,"GG Export"); + break; + case 7: + strcpy(rominfo.country,"GG International"); + break; + default: + sprintf(rominfo.country,"Unknown (%d)", romheader[offset + 0x0f] >> 4); + break; + } + + /* ROM size */ + rominfo.romstart = 0; + switch (romheader[offset + 0x0f] & 0x0F) + { + case 0x00: + rominfo.romend = 0x3FFFF; + break; + case 0x01: + rominfo.romend = 0x7FFFF; + break; + case 0x02: + rominfo.romend = 0xFFFFF; + break; + case 0x0a: + rominfo.romend = 0x1FFF; + break; + case 0x0b: + rominfo.romend = 0x3FFF; + break; + case 0x0c: + rominfo.romend = 0x7FFF; + break; + case 0x0d: + rominfo.romend = 0xBFFF; + break; + case 0x0e: + rominfo.romend = 0xFFFF; + break; + case 0x0f: + rominfo.romend = 0x1FFFF; + break; + } + } + } +} + +/*************************************************************************** + * load_bios + * + * Load current system BIOS file. + * + * Return loaded size (-1 if already loaded) + * + ***************************************************************************/ +int load_bios(void) +{ + int size = 0; + + switch (system_hw) + { + case SYSTEM_MCD: + { + /* check if CD BOOTROM is already loaded */ + if (!(system_bios & 0x10) || ((system_bios & 0x0c) != (region_code >> 4))) + { + /* load CD BOOTROM (fixed 128KB size) */ + switch (region_code) + { + case REGION_USA: + size = load_archive(CD_BIOS_US, scd.bootrom, sizeof(scd.bootrom), 0); + break; + case REGION_EUROPE: + size = load_archive(CD_BIOS_EU, scd.bootrom, sizeof(scd.bootrom), 0); + break; + default: + size = load_archive(CD_BIOS_JP, scd.bootrom, sizeof(scd.bootrom), 0); + break; + } + + /* CD BOOTROM loaded ? */ + if (size > 0) + { +#ifdef LSB_FIRST + /* Byteswap ROM to optimize 16-bit access */ + int i; + for (i = 0; i < size; i += 2) + { + uint8 temp = scd.bootrom[i]; + scd.bootrom[i] = scd.bootrom[i+1]; + scd.bootrom[i+1] = temp; + } +#endif + /* mark CD BIOS as being loaded */ + system_bios = system_bios | 0x10; + + /* loaded BIOS region */ + system_bios = (system_bios & 0xf0) | (region_code >> 4); + } + + return size; + } + + return -1; + } + + case SYSTEM_GG: + case SYSTEM_GGMS: + { + /* check if Game Gear BOOTROM is already loaded */ + if (!(system_bios & SYSTEM_GG)) + { + /* mark both Master System & Game Gear BOOTROM as unloaded */ + system_bios &= ~(SYSTEM_SMS | SYSTEM_GG); + + /* BOOTROM is stored above cartridge ROM area (max. 4MB) */ + if (cart.romsize <= 0x400000) + { + /* load Game Gear BOOTROM file */ + size = load_archive(GG_BIOS, cart.rom + 0x400000, 0x100000, 0); + + if (size > 0) + { + /* mark Game Gear BOOTROM as loaded */ + system_bios |= SYSTEM_GG; + } + } + + return size; + } + + return -1; + } + + case SYSTEM_SMS: + case SYSTEM_SMS2: + { + /* check if Master System BOOTROM is already loaded */ + if (!(system_bios & SYSTEM_SMS) || ((system_bios & 0x0c) != (region_code >> 4))) + { + /* mark both Master System & Game Gear BOOTROM as unloaded */ + system_bios &= ~(SYSTEM_SMS | SYSTEM_GG); + + /* BOOTROM is stored above cartridge ROM area (max. 4MB) */ + if (cart.romsize <= 0x400000) + { + /* load Master System BOOTROM file */ + switch (region_code) + { + case REGION_USA: + size = load_archive(MS_BIOS_US, cart.rom + 0x400000, 0x400000, 0); + break; + case REGION_EUROPE: + size = load_archive(MS_BIOS_EU, cart.rom + 0x400000, 0x400000, 0); + break; + default: + size = load_archive(MS_BIOS_JP, cart.rom + 0x400000, 0x400000, 0); + break; + } + + if (size > 0) + { + /* mark Master System BOOTROM as loaded */ + system_bios |= SYSTEM_SMS; + + /* loaded BOOTROM region */ + system_bios = (system_bios & 0xf0) | (region_code >> 4); + } + } + + return size; + } + + return -1; + } + + default: + { + return 0; + } + } +} + +/*************************************************************************** + * load_rom + * + * Load a new ROM file. + * + * Return 0 on error, 1 on success + * + ***************************************************************************/ +int load_rom(char *filename) +{ + int i, size; + + /* clear any existing patches */ + ggenie_shutdown(); + areplay_shutdown(); + + /* check previous loaded ROM size */ + if (cart.romsize > 0x800000) + { + /* assume no CD is currently loaded */ + cdd.loaded = 0; + } + + /* auto-detect CD image files */ + size = 0; //cdd_load(filename, (char *)(cart.rom)); + if (size < 0) + { + /* error opening file */ + return 0; + } + + if (size > 0) + { + /* CD image file loaded */ + system_hw = SYSTEM_MCD; + } + else + { + /* load file into ROM buffer */ + char extension[4]; + size = load_archive(filename, cart.rom, sizeof(cart.rom), extension); + if (!size) + { + /* mark all BOOTROM as unloaded since they could have been overwritten */ + system_bios &= ~(0x10 | SYSTEM_SMS | SYSTEM_GG); + return 0; + } + + /* mark BOOTROM as unloaded if they have been overwritten by cartridge ROM */ + if (size > 0x800000) + { + /* CD BIOS ROM are loaded at the start of CD area */ + system_bios &= ~0x10; + } + else if (size > 0x400000) + { + /* Master System or Game Gear BIOS ROM are loaded within $400000-$4FFFFF area */ + system_bios &= ~(SYSTEM_SMS | SYSTEM_GG); + } + + /* convert lower case to upper case */ + *(uint32 *)(extension) &= 0xdfdfdfdf; + + /* auto-detect system hardware from ROM file extension */ + if (!memcmp("SMS", &extension[0], 3)) + { + /* Master System II hardware */ + system_hw = SYSTEM_SMS2; + } + else if (!memcmp("GG", &extension[1], 2)) + { + /* Game Gear hardware (GG mode) */ + system_hw = SYSTEM_GG; + } + else if (!memcmp("SG", &extension[1], 2)) + { + /* SG-1000 hardware */ + system_hw = SYSTEM_SG; + } + else + { + /* Mega Drive hardware (Genesis mode) */ + system_hw = SYSTEM_MD; + + /* decode .MDX format */ + if (!memcmp("MDX", &extension[0], 3)) + { + for (i = 4; i < size - 1; i++) + { + cart.rom[i-4] = cart.rom[i] ^ 0x40; + } + size = size - 5; + } + + /* auto-detect byte-swapped dumps */ + if (!memcmp((char *)(cart.rom + 0x100),"ESAGM GE ARDVI E", 16) || + !memcmp((char *)(cart.rom + 0x100),"ESAGG NESESI", 12)) + { + for(i = 0; i < size; i += 2) + { + uint8 temp = cart.rom[i]; + cart.rom[i] = cart.rom[i+1]; + cart.rom[i+1] = temp; + } + } + } + + /* auto-detect 512 byte extra header */ + if (memcmp((char *)(cart.rom + 0x100), "SEGA", 4) && ((size / 512) & 1) && !(size % 512)) + { + /* remove header */ + size -= 512; + memcpy (cart.rom, cart.rom + 512, size); + + /* assume interleaved Genesis ROM format (.smd) */ + if (system_hw == SYSTEM_MD) + { + for (i = 0; i < (size / 0x4000); i++) + { + deinterleave_block (cart.rom + (i * 0x4000)); + } + } + } + } + + /* initialize ROM size */ + cart.romsize = size; + + /* get infos from ROM header */ + getrominfo((char *)(cart.rom)); + + /* set console region */ + get_region((char *)(cart.rom)); + + /* CD image file */ + if (system_hw == SYSTEM_MCD) + { + /* load CD BOOT ROM */ + if (!load_bios()) + { + /* unmount CD image */ + cdd_unload(); + + /* error loading CD BOOT ROM */ + return (0); + } + + /* boot from CD */ + scd.cartridge.boot = 0x00; + } + +#ifdef LSB_FIRST + /* 16-bit ROM specific */ + else if (system_hw == SYSTEM_MD) + { + /* Byteswap ROM to optimize 16-bit access */ + for (i = 0; i < cart.romsize; i += 2) + { + uint8 temp = cart.rom[i]; + cart.rom[i] = cart.rom[i+1]; + cart.rom[i+1] = temp; + } + } +#endif + + /* Save auto-detected system hardware */ + romtype = system_hw; + + /* PICO ROM */ + if (strstr(rominfo.consoletype, "SEGA PICO") != NULL) + { + /* PICO hardware */ + system_hw = SYSTEM_PICO; + } + + /* CD BOOTROM */ + else if (strstr(rominfo.ROMType, "BR") != NULL) + { + /* enable CD hardware */ + system_hw = SYSTEM_MCD; + + /* boot from CD */ + scd.cartridge.boot = 0x00; + + /* copy ROM to BOOTROM area */ + memcpy(scd.bootrom, cart.rom, sizeof(scd.bootrom)); + + /* mark CD BIOS as being loaded */ + system_bios = system_bios | 0x10; + + /* loaded CD BIOS region */ + system_bios = (system_bios & 0xf0) | (region_code >> 4); + } + + /* ROM cartridges with CD support */ + else if ((strstr(rominfo.domestic,"FLUX") != NULL) || + (strstr(rominfo.domestic,"WONDER LIBRARY") != NULL) || + (strstr(rominfo.product,"T-5740") != NULL)) + { + /* check if console hardware is set to AUTO */ + if (config.system == 0x00) + { + /* auto-enable CD hardware */ + system_hw = SYSTEM_MCD; + + /* try to load CD BOOTROM */ + if (load_bios()) + { + /* boot from cartridge */ + scd.cartridge.boot = 0x40; + + /* automatically load associated .iso image */ + strncpy(&filename[strlen(filename) - 4], ".iso", 4); + cdd_load(filename, (char *)cdc.ram); + } + else + { + /* if not found, disable CD hardware */ + system_hw = SYSTEM_MD; + } + } + } + + /* Force system hardware if requested */ + if (config.system == SYSTEM_MD) + { + if (!(system_hw & SYSTEM_MD)) + { + /* Mega Drive in MS compatibility mode */ + system_hw = SYSTEM_PBC; + } + } + else if (config.system == SYSTEM_GG) + { + if (system_hw != SYSTEM_GG) + { + /* Game Gear in MS compatibility mode */ + system_hw = SYSTEM_GGMS; + } + } + else if (config.system) + { + system_hw = config.system; + } + + /* restore previous input settings */ + if (old_system[0] != -1) + { + input.system[0] = old_system[0]; + } + if (old_system[1] != -1) + { + input.system[1] = old_system[1]; + } + + /* default gun settings */ + input.x_offset = (input.system[1] == SYSTEM_MENACER) ? 64 : 0; + input.y_offset = 0; + + /* autodetect gun support */ + if (strstr(rominfo.international,"MENACER") != NULL) + { + /* save current setting */ + if (old_system[0] == -1) + { + old_system[0] = input.system[0]; + } + if (old_system[1] == -1) + { + old_system[1] = input.system[1]; + } + + /* force MENACER configuration */ + input.system[0] = SYSTEM_MD_GAMEPAD; + input.system[1] = SYSTEM_MENACER; + input.x_offset = 82; + input.y_offset = 0; + } + else if (strstr(rominfo.international,"T2 ; THE ARCADE GAME") != NULL) + { + /* save current setting */ + if (old_system[0] == -1) + { + old_system[0] = input.system[0]; + } + if (old_system[1] == -1) + { + old_system[1] = input.system[1]; + } + + /* force MENACER configuration */ + input.system[0] = SYSTEM_MD_GAMEPAD; + input.system[1] = SYSTEM_MENACER; + input.x_offset = 133; + input.y_offset = -8; + } + else if (strstr(rominfo.international,"BODY COUNT") != NULL) + { + /* save current setting */ + if (old_system[0] == -1) + { + old_system[0] = input.system[0]; + } + if (old_system[1] == -1) + { + old_system[1] = input.system[1]; + } + + /* force MENACER configuration */ + input.system[0] = SYSTEM_MD_GAMEPAD; + input.system[1] = SYSTEM_MENACER; + input.x_offset = 68; + input.y_offset = -24; + } + else if (strstr(rominfo.international,"CORPSE KILLER") != NULL) + { + /* save current setting */ + if (old_system[0] == -1) + { + old_system[0] = input.system[0]; + } + if (old_system[1] == -1) + { + old_system[1] = input.system[1]; + } + + /* force MENACER configuration */ + input.system[0] = SYSTEM_MD_GAMEPAD; + input.system[1] = SYSTEM_MENACER; + input.x_offset = 64; + input.y_offset = -8; + } + else if (strstr(rominfo.international,"CRIME PATROL") != NULL) + { + /* save current setting */ + if (old_system[0] == -1) + { + old_system[0] = input.system[0]; + } + if (old_system[1] == -1) + { + old_system[1] = input.system[1]; + } + + /* force MENACER configuration */ + input.system[0] = SYSTEM_MD_GAMEPAD; + input.system[1] = SYSTEM_MENACER; + input.x_offset = 61; + input.y_offset = 0; + } + else if (strstr(rominfo.international,"MAD DOG II THE LOST GOLD") != NULL) + { + /* save current setting */ + if (old_system[0] == -1) + { + old_system[0] = input.system[0]; + } + if (old_system[1] == -1) + { + old_system[1] = input.system[1]; + } + + /* force MENACER configuration */ + input.system[0] = SYSTEM_MD_GAMEPAD; + input.system[1] = SYSTEM_MENACER; + input.x_offset = 70; + input.y_offset = 18; + } + else if (strstr(rominfo.international,"MAD DOG MCCREE") != NULL) + { + /* save current setting */ + if (old_system[0] == -1) + { + old_system[0] = input.system[0]; + } + if (old_system[1] == -1) + { + old_system[1] = input.system[1]; + } + + /* force MENACER configuration */ + input.system[0] = SYSTEM_MD_GAMEPAD; + input.system[1] = SYSTEM_MENACER; + input.x_offset = 49; + input.y_offset = 0; + } + else if (strstr(rominfo.international,"WHO SHOT JOHNNY ROCK?") != NULL) + { + /* save current setting */ + if (old_system[0] == -1) + { + old_system[0] = input.system[0]; + } + if (old_system[1] == -1) + { + old_system[1] = input.system[1]; + } + + /* force MENACER configuration */ + input.system[0] = SYSTEM_MD_GAMEPAD; + input.system[1] = SYSTEM_MENACER; + input.x_offset = 60; + input.y_offset = 30; + } + else if ((strstr(rominfo.international,"LETHAL ENFORCERS") != NULL) || + (strstr(rominfo.international,"SNATCHER") != NULL)) + { + /* save current setting */ + if (old_system[0] == -1) + { + old_system[0] = input.system[0]; + } + if (old_system[1] == -1) + { + old_system[1] = input.system[1]; + } + + /* force JUSTIFIER configuration */ + input.system[0] = SYSTEM_MD_GAMEPAD; + input.system[1] = SYSTEM_JUSTIFIER; + input.x_offset = (strstr(rominfo.international,"GUN FIGHTERS") != NULL) ? 24 : 0; + input.y_offset = 0; + } + + return(1); +} + +/**************************************************************************** + * get_region + * + * Set console region from ROM header passed as parameter or + * from previous auto-detection (if NULL) + * + ****************************************************************************/ +void get_region(char *romheader) +{ + /* region auto-detection ? */ + if (romheader) + { + /* Mega CD image */ + if (system_hw == SYSTEM_MCD) + { + /* security code */ + switch (romheader[0x20b]) + { + case 0x7a: + region_code = REGION_USA; + break; + + case 0x64: + region_code = REGION_EUROPE; + break; + + default: + region_code = REGION_JAPAN_NTSC; + break; + } + } + + /* 16-bit cartridge */ + else if (system_hw & SYSTEM_MD) + { + /* country codes used to differentiate region */ + /* 0001 = japan ntsc (1) */ + /* 0010 = japan pal (2) -> does not exist ? */ + /* 0100 = usa (4) */ + /* 1000 = europe (8) */ + int country = 0; + + /* from Gens */ + if (!memcmp(rominfo.country, "eur", 3)) country |= 8; + else if (!memcmp(rominfo.country, "EUR", 3)) country |= 8; + else if (!memcmp(rominfo.country, "jap", 3)) country |= 1; + else if (!memcmp(rominfo.country, "JAP", 3)) country |= 1; + else if (!memcmp(rominfo.country, "usa", 3)) country |= 4; + else if (!memcmp(rominfo.country, "USA", 3)) country |= 4; + else + { + int i; + char c; + + /* look for each characters */ + for(i = 0; i < 4; i++) + { + c = toupper((int)rominfo.country[i]); + + if (c == 'U') country |= 4; + else if (c == 'J') country |= 1; + else if (c == 'E') country |= 8; + else if (c == 'K') country |= 1; + else if (c < 16) country |= c; + else if ((c >= '0') && (c <= '9')) country |= c - '0'; + else if ((c >= 'A') && (c <= 'F')) country |= c - 'A' + 10; + } + } + + /* set default console region (USA > JAPAN > EUROPE) */ + if (country & 4) region_code = REGION_USA; + else if (country & 1) region_code = REGION_JAPAN_NTSC; + else if (country & 8) region_code = REGION_EUROPE; + else if (country & 2) region_code = REGION_JAPAN_PAL; + else region_code = REGION_USA; + + /* some games need specific region settings but have wrong header*/ + if (((strstr(rominfo.product,"T-45033") != NULL) && (rominfo.checksum == 0x0F81)) || /* Alisia Dragon (Europe) */ + (strstr(rominfo.product,"T-69046-50") != NULL) || /* Back to the Future III (Europe) */ + (strstr(rominfo.product,"T-120106-00") != NULL) || /* Brian Lara Cricket (Europe) */ + (strstr(rominfo.product,"T-70096 -00") != NULL)) /* Muhammad Ali Heavyweight Boxing (Europe) */ + { + /* need PAL settings */ + region_code = REGION_EUROPE; + } + else if ((rominfo.realchecksum == 0x532e) && (strstr(rominfo.product,"1011-00") != NULL)) + { + /* On Dal Jang Goon (Korea) needs JAPAN region code */ + region_code = REGION_JAPAN_NTSC; + } + } + + /* 8-bit cartridge */ + else + { + region_code = sms_cart_region_detect(); + } + + /* save auto-detected region */ + rom_region = region_code; + } + else + { + /* restore auto-detected region */ + region_code = rom_region; + } + + /* force console region if requested */ + if (config.region_detect == 1) region_code = REGION_USA; + else if (config.region_detect == 2) region_code = REGION_EUROPE; + else if (config.region_detect == 3) region_code = REGION_JAPAN_NTSC; + else if (config.region_detect == 4) region_code = REGION_JAPAN_PAL; + + /* autodetect PAL/NTSC timings */ + vdp_pal = (region_code >> 6) & 0x01; + + /* autodetect PAL/NTSC master clock */ + system_clock = vdp_pal ? MCLOCK_PAL : MCLOCK_NTSC; + + /* force PAL/NTSC timings if requested */ + if (config.vdp_mode == 1) vdp_pal = 0; + else if (config.vdp_mode == 2) vdp_pal = 1; + + /* force PAL/NTSC master clock if requested */ + if (config.master_clock == 1) system_clock = MCLOCK_NTSC; + else if (config.master_clock == 2) system_clock = MCLOCK_PAL; +} + + +/**************************************************************************** + * get_company (Softdev - 2006) + * + * Try to determine which company made this rom + * + * Ok, for some reason there's no standard for this. + * It seems that there can be pretty much anything you like following the + * copyright (C) symbol! + ****************************************************************************/ +char *get_company(void) +{ + char *s; + int i; + char company[10]; + + for (i = 3; i < 8; i++) + { + company[i - 3] = rominfo.copyright[i]; + } + company[5] = 0; + + /** OK, first look for a hyphen + * Capcom use T-12 for example + */ + s = strstr (company, "-"); + if (s != NULL) + { + s++; + strcpy (company, s); + } + + /** Strip any trailing spaces **/ + for (i = strlen (company) - 1; i >= 0; i--) + if (company[i] == 32) + company[i] = 0; + + if (strlen (company) == 0) + return (char *)companyinfo[MAXCOMPANY - 1].company; + + for (i = 0; i < MAXCOMPANY - 1; i++) + { + if (!(strncmp (company, companyinfo[i].companyid, strlen (company)))) + return (char *)companyinfo[i].company; + } + + return (char *)companyinfo[MAXCOMPANY - 1].company; +} + +/**************************************************************************** + * get_peripheral (Softdev - 2006) + * + * Return peripheral name based on header code + * + ****************************************************************************/ +char *get_peripheral(int index) +{ + if (index < MAXPERIPHERALS) + return (char *)peripheralinfo[index].pName; + return (char *)companyinfo[MAXCOMPANY - 1].company; +} + diff --git a/genplus-gx/core/loadrom.h b/genplus-gx/core/loadrom.h new file mode 100644 index 0000000000..5fad9f7584 --- /dev/null +++ b/genplus-gx/core/loadrom.h @@ -0,0 +1,75 @@ +/*************************************************************************************** + * Genesis Plus + * ROM Loading Support + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code) + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _LOADROM_H_ +#define _LOADROM_H_ + +#define MAXROMSIZE 10485760 + +typedef struct +{ + char consoletype[18]; /* Genesis or Mega Drive */ + char copyright[18]; /* Copyright message */ + char domestic[50]; /* Domestic name of ROM */ + char international[50]; /* International name of ROM */ + char ROMType[4]; /* Boot ROM (BR), Educational (AL) or Game (GM) program */ + char product[14]; /* Product serial number */ + unsigned short checksum; /* ROM Checksum (header) */ + unsigned short realchecksum; /* ROM Checksum (calculated) */ + unsigned int romstart; /* ROM start address */ + unsigned int romend; /* ROM end address */ + char country[18]; /* Country flag */ + uint16 peripherals; /* Supported peripherals */ +} ROMINFO; + + +/* Global variables */ +extern ROMINFO rominfo; +extern uint8 romtype; + +/* Function prototypes */ +extern int load_bios(void); +extern int load_rom(char *filename); +extern void get_region(char *romheader); +extern char *get_company(void); +extern char *get_peripheral(int index); +extern void getrominfo(char *romheader); + +#endif /* _LOADROM_H_ */ + diff --git a/genplus-gx/core/m68k/m68k.h b/genplus-gx/core/m68k/m68k.h new file mode 100644 index 0000000000..f93b3fc0e3 --- /dev/null +++ b/genplus-gx/core/m68k/m68k.h @@ -0,0 +1,389 @@ +#ifndef M68K__HEADER +#define M68K__HEADER + +/* ======================================================================== */ +/* ========================= LICENSING & COPYRIGHT ======================== */ +/* ======================================================================== */ +/* + * MUSASHI + * Version 3.32 + * + * A portable Motorola M680x0 processor emulation engine. + * Copyright Karl Stenerud. All rights reserved. + * + * This code may be freely used for non-commercial purposes as long as this + * copyright notice remains unaltered in the source code and any binary files + * containing this code in compiled form. + * + * All other licensing terms must be negotiated with the author + * (Karl Stenerud). + * + * The latest version of this code can be obtained at: + * http://kstenerud.cjb.net + */ + + /* Modified by Eke-Eke for Genesis Plus GX: + + - removed unused stuff to reduce memory usage / optimize execution (multiple CPU types support, NMI support, ...) + - moved stuff to compile statically in a single object file + - implemented support for global cycle count (shared by 68k & Z80 CPU) + - added support for interrupt latency (Sesame's Street Counting Cafe, Fatal Rewind) + - added proper cycle use on reset + - added cycle accurate timings for MUL/DIV instructions (thanks to Jorge Cwik !) + - fixed undocumented flags for DIV instructions (Blood Shot) + - added MAIN-CPU & SUB-CPU support for Mega CD emulation + + */ + +/* ======================================================================== */ +/* ================================ INCLUDES ============================== */ +/* ======================================================================== */ + +#include +#include "macros.h" + +/* ======================================================================== */ +/* ==================== ARCHITECTURE-DEPENDANT DEFINES ==================== */ +/* ======================================================================== */ + +/* Check for > 32bit sizes */ +#if UINT_MAX > 0xffffffff + #define M68K_INT_GT_32_BIT 1 +#else + #define M68K_INT_GT_32_BIT 0 +#endif + +/* Data types used in this emulation core */ +#undef sint8 +#undef sint16 +#undef sint32 +#undef sint64 +#undef uint8 +#undef uint16 +#undef uint32 +#undef uint64 +#undef sint +#undef uint + +#define sint8 signed char /* ASG: changed from char to signed char */ +#define sint16 signed short +#define sint32 signed int /* AWJ: changed from long to int */ +#define uint8 unsigned char +#define uint16 unsigned short +#define uint32 unsigned int /* AWJ: changed from long to int */ + +/* signed and unsigned int must be at least 32 bits wide */ +#define sint signed int +#define uint unsigned int + + +#if M68K_USE_64_BIT +#define sint64 signed long long +#define uint64 unsigned long long +#else +#define sint64 sint32 +#define uint64 uint32 +#endif /* M68K_USE_64_BIT */ + + + +/* Allow for architectures that don't have 8-bit sizes */ +/*#if UCHAR_MAX == 0xff*/ + #define MAKE_INT_8(A) (sint8)(A) +/*#else + #undef sint8 + #define sint8 signed int + #undef uint8 + #define uint8 unsigned int + INLINE sint MAKE_INT_8(uint value) + { + return (value & 0x80) ? value | ~0xff : value & 0xff; + }*/ +/*#endif *//* UCHAR_MAX == 0xff */ + + +/* Allow for architectures that don't have 16-bit sizes */ +/*#if USHRT_MAX == 0xffff*/ + #define MAKE_INT_16(A) (sint16)(A) +/*#else + #undef sint16 + #define sint16 signed int + #undef uint16 + #define uint16 unsigned int + INLINE sint MAKE_INT_16(uint value) + { + return (value & 0x8000) ? value | ~0xffff : value & 0xffff; + }*/ +/*#endif *//* USHRT_MAX == 0xffff */ + + +/* Allow for architectures that don't have 32-bit sizes */ +/*#if UINT_MAX == 0xffffffff*/ + #define MAKE_INT_32(A) (sint32)(A) +/*#else + #undef sint32 + #define sint32 signed int + #undef uint32 + #define uint32 unsigned int + INLINE sint MAKE_INT_32(uint value) + { + return (value & 0x80000000) ? value | ~0xffffffff : value & 0xffffffff; + }*/ +/*#endif *//* UINT_MAX == 0xffffffff */ + + + +/* ======================================================================== */ +/* ============================ GENERAL DEFINES =========================== */ + +/* ======================================================================== */ + +/* There are 7 levels of interrupt to the 68K. + * A transition from < 7 to 7 will cause a non-maskable interrupt (NMI). + */ +#define M68K_IRQ_NONE 0 +#define M68K_IRQ_1 1 +#define M68K_IRQ_2 2 +#define M68K_IRQ_3 3 +#define M68K_IRQ_4 4 +#define M68K_IRQ_5 5 +#define M68K_IRQ_6 6 +#define M68K_IRQ_7 7 + + +/* Special interrupt acknowledge values. + * Use these as special returns from the interrupt acknowledge callback + * (specified later in this header). + */ + +/* Causes an interrupt autovector (0x18 + interrupt level) to be taken. + * This happens in a real 68K if VPA or AVEC is asserted during an interrupt + * acknowledge cycle instead of DTACK. + */ +#define M68K_INT_ACK_AUTOVECTOR 0xffffffff + +/* Causes the spurious interrupt vector (0x18) to be taken + * This happens in a real 68K if BERR is asserted during the interrupt + * acknowledge cycle (i.e. no devices responded to the acknowledge). + */ +#define M68K_INT_ACK_SPURIOUS 0xfffffffe + + +/* Registers used by m68k_get_reg() and m68k_set_reg() */ +typedef enum +{ + /* Real registers */ + M68K_REG_D0, /* Data registers */ + M68K_REG_D1, + M68K_REG_D2, + M68K_REG_D3, + M68K_REG_D4, + M68K_REG_D5, + M68K_REG_D6, + M68K_REG_D7, + M68K_REG_A0, /* Address registers */ + M68K_REG_A1, + M68K_REG_A2, + M68K_REG_A3, + M68K_REG_A4, + M68K_REG_A5, + M68K_REG_A6, + M68K_REG_A7, + M68K_REG_PC, /* Program Counter */ + M68K_REG_SR, /* Status Register */ + M68K_REG_SP, /* The current Stack Pointer (located in A7) */ + M68K_REG_USP, /* User Stack Pointer */ + M68K_REG_ISP, /* Interrupt Stack Pointer */ + +#if M68K_EMULATE_PREFETCH + /* Assumed registers */ + /* These are cheat registers which emulate the 1-longword prefetch + * present in the 68000 and 68010. + */ + M68K_REG_PREF_ADDR, /* Last prefetch address */ + M68K_REG_PREF_DATA, /* Last prefetch data */ +#endif + + /* Convenience registers */ + M68K_REG_IR /* Instruction register */ +} m68k_register_t; + + +/* 68k memory map structure */ +typedef struct +{ + unsigned char *base; /* memory-based access (ROM, RAM) */ + unsigned int (*read8)(unsigned int address); /* I/O byte read access */ + unsigned int (*read16)(unsigned int address); /* I/O word read access */ + void (*write8)(unsigned int address, unsigned int data); /* I/O byte write access */ + void (*write16)(unsigned int address, unsigned int data); /* I/O word write access */ +} cpu_memory_map; + +/* 68k idle loop detection */ +typedef struct +{ + uint pc; + uint cycle; + uint detected; +} cpu_idle_t; + +typedef struct +{ + cpu_memory_map memory_map[256]; /* memory mapping */ + + cpu_idle_t poll; /* polling detection */ + + uint cycles; /* current master cycle count */ + uint cycle_end; /* aimed master cycle count for current execution frame */ + + uint dar[16]; /* Data and Address Registers */ + uint pc; /* Program Counter */ + uint sp[5]; /* User and Interrupt Stack Pointers */ + uint ir; /* Instruction Register */ + uint t1_flag; /* Trace 1 */ + uint s_flag; /* Supervisor */ + uint x_flag; /* Extend */ + uint n_flag; /* Negative */ + uint not_z_flag; /* Zero, inverted for speedups */ + uint v_flag; /* Overflow */ + uint c_flag; /* Carry */ + uint int_mask; /* I0-I2 */ + uint int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */ + uint stopped; /* Stopped state */ + + uint pref_addr; /* Last prefetch address */ + uint pref_data; /* Data in the prefetch queue */ + + uint instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */ + uint run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */ + uint aerr_enabled; /* Enables/deisables address error checks at runtime */ + jmp_buf aerr_trap; /* Address error jump */ + uint aerr_address; /* Address error location */ + uint aerr_write_mode; /* Address error write mode */ + uint aerr_fc; /* Address error FC code */ + + uint tracing; /* Tracing enable flag */ + + uint address_space; /* Current FC code */ + + /* Callbacks to host */ + int (*int_ack_callback)(int int_line); /* Interrupt Acknowledge */ + void (*reset_instr_callback)(void); /* Called when a RESET instruction is encountered */ + int (*tas_instr_callback)(void); /* Called when a TAS instruction is encountered, allows / disallows writeback */ + void (*set_fc_callback)(unsigned int new_fc); /* Called when the CPU function code changes */ +} m68ki_cpu_core; + +/* CPU cores */ +extern m68ki_cpu_core m68k; +extern m68ki_cpu_core s68k; + + +/* ======================================================================== */ +/* ============================== CALLBACKS =============================== */ +/* ======================================================================== */ + +/* These functions allow you to set callbacks to the host when specific events + * occur. Note that you must enable the corresponding value in m68kconf.h + * in order for these to do anything useful. + * Note: I have defined default callbacks which are used if you have enabled + * the corresponding #define in m68kconf.h but either haven't assigned a + * callback or have assigned a callback of NULL. + */ + +#if M68K_EMULATE_INT_ACK == OPT_ON +/* Set the callback for an interrupt acknowledge. + * You must enable M68K_EMULATE_INT_ACK in m68kconf.h. + * The CPU will call the callback with the interrupt level being acknowledged. + * The host program must return either a vector from 0x02-0xff, or one of the + * special interrupt acknowledge values specified earlier in this header. + * If this is not implemented, the CPU will always assume an autovectored + * interrupt, and will automatically clear the interrupt request when it + * services the interrupt. + * Default behavior: return M68K_INT_ACK_AUTOVECTOR. + */ +void m68k_set_int_ack_callback(int (*callback)(int int_level)); +#endif + +#if M68K_EMULATE_RESET == OPT_ON +/* Set the callback for the RESET instruction. + * You must enable M68K_EMULATE_RESET in m68kconf.h. + * The CPU calls this callback every time it encounters a RESET instruction. + * Default behavior: do nothing. + */ +void m68k_set_reset_instr_callback(void (*callback)(void)); +#endif + +#if M68K_TAS_HAS_CALLBACK == OPT_ON +/* Set the callback for the TAS instruction. + * You must enable M68K_TAS_HAS_CALLBACK in m68kconf.h. + * The CPU calls this callback every time it encounters a TAS instruction. + * Default behavior: return 1, allow writeback. + */ +void m68k_set_tas_instr_callback(int (*callback)(void)); +#endif + +#if M68K_EMULATE_FC == OPT_ON +/* Set the callback for CPU function code changes. + * You must enable M68K_EMULATE_FC in m68kconf.h. + * The CPU calls this callback with the function code before every memory + * access to set the CPU's function code according to what kind of memory + * access it is (supervisor/user, program/data and such). + * Default behavior: do nothing. + */ +void m68k_set_fc_callback(void (*callback)(unsigned int new_fc)); +#endif + + +/* ======================================================================== */ +/* ====================== FUNCTIONS TO ACCESS THE CPU ===================== */ +/* ======================================================================== */ + +/* Do whatever initialisations the core requires. Should be called + * at least once at init time. + */ +extern void m68k_init(void); +extern void s68k_init(void); + +/* Pulse the RESET pin on the CPU. + * You *MUST* reset the CPU at least once to initialize the emulation + */ +extern void m68k_pulse_reset(void); +extern void s68k_pulse_reset(void); + +/* Run until given cycle count is reached */ +extern void m68k_run(unsigned int cycles); +extern void s68k_run(unsigned int cycles); + +/* Set the IPL0-IPL2 pins on the CPU (IRQ). + * A transition from < 7 to 7 will cause a non-maskable interrupt (NMI). + * Setting IRQ to 0 will clear an interrupt request. + */ +extern void m68k_set_irq(unsigned int int_level); +extern void m68k_set_irq_delay(unsigned int int_level); +extern void m68k_update_irq(unsigned int mask); +extern void s68k_update_irq(unsigned int mask); + +/* Halt the CPU as if you pulsed the HALT pin. */ +extern void m68k_pulse_halt(void); +extern void m68k_clear_halt(void); +extern void s68k_pulse_halt(void); +extern void s68k_clear_halt(void); + + +/* Peek at the internals of a CPU context. This can either be a context + * retrieved using m68k_get_context() or the currently running context. + * If context is NULL, the currently running CPU context will be used. + */ +extern unsigned int m68k_get_reg(m68k_register_t reg); +extern unsigned int s68k_get_reg(m68k_register_t reg); + +/* Poke values into the internals of the currently running CPU context */ +extern void m68k_set_reg(m68k_register_t reg, unsigned int value); +extern void s68k_set_reg(m68k_register_t reg, unsigned int value); + + +/* ======================================================================== */ +/* ============================== END OF FILE ============================= */ +/* ======================================================================== */ + +#endif /* M68K__HEADER */ diff --git a/genplus-gx/core/m68k/m68kconf.h b/genplus-gx/core/m68k/m68kconf.h new file mode 100644 index 0000000000..dd59133ddb --- /dev/null +++ b/genplus-gx/core/m68k/m68kconf.h @@ -0,0 +1,93 @@ +#ifndef M68KCONF__HEADER +#define M68KCONF__HEADER + +/* ======================================================================== */ +/* ======================== MAIN 68K CONFIGURATION ======================== */ +/* ======================================================================== */ + +/* Configuration switches. + * Use OPT_SPECIFY_HANDLER for configuration options that allow callbacks. + * OPT_SPECIFY_HANDLER causes the core to link directly to the function + * or macro you specify, rather than using callback functions whose pointer + * must be passed in using m68k_set_xxx_callback(). + */ +#define OPT_OFF 0 +#define OPT_ON 1 +#define OPT_SPECIFY_HANDLER 2 + +/* If ON, the CPU will call m68k_write_32_pd() when it executes move.l with a + * predecrement destination EA mode instead of m68k_write_32(). + * To simulate real 68k behavior, m68k_write_32_pd() must first write the high + * word to [address+2], and then write the low word to [address]. + */ +#define M68K_SIMULATE_PD_WRITES OPT_OFF + +/* If ON, CPU will call the interrupt acknowledge callback when it services an + * interrupt. + * If off, all interrupts will be autovectored and all interrupt requests will + * auto-clear when the interrupt is serviced. + */ +#define M68K_EMULATE_INT_ACK OPT_SPECIFY_HANDLER +#define M68K_INT_ACK_CALLBACK(A) vdp_68k_irq_ack(A) + +/* If ON, CPU will call the output reset callback when it encounters a reset + * instruction. + */ +#define M68K_EMULATE_RESET OPT_OFF +#define M68K_RESET_CALLBACK() your_reset_handler_function() + +/* If ON, CPU will call the callback when it encounters a tas + * instruction. + */ +#define M68K_TAS_HAS_CALLBACK OPT_OFF +#define M68K_TAS_CALLBACK() your_tas_handler_function() + +/* If ON, CPU will call the set fc callback on every memory access to + * differentiate between user/supervisor, program/data access like a real + * 68000 would. This should be enabled and the callback should be set if you + * want to properly emulate the m68010 or higher. (moves uses function codes + * to read/write data from different address spaces) + */ +#define M68K_EMULATE_FC OPT_OFF +#define M68K_SET_FC_CALLBACK(A) your_set_fc_handler_function(A) + +/* If ON, the CPU will monitor the trace flags and take trace exceptions + */ +#define M68K_EMULATE_TRACE OPT_OFF + +/* If ON, the CPU will emulate the 4-byte prefetch queue of a real 68000 */ +#define M68K_EMULATE_PREFETCH OPT_OFF + +/* If ON, the CPU will generate address error exceptions if it tries to + * access a word or longword at an odd address. + * NOTE: This is only emulated properly for 68000 mode. + */ +#define M68K_EMULATE_ADDRESS_ERROR OPT_ON + +/* If ON and previous option is also ON, address error exceptions will + also be checked when fetching instructions. Disabling this can help + speeding up emulation while still emulating address error exceptions + on other memory access if needed. + * NOTE: This is only emulated properly for 68000 mode. + */ +#define M68K_CHECK_PC_ADDRESS_ERROR OPT_OFF + + +/* ----------------------------- COMPATIBILITY ---------------------------- */ + +/* The following options set optimizations that violate the current ANSI + * standard, but will be compliant under the forthcoming C9X standard. + */ + + +/* If ON, the enulation core will use 64-bit integers to speed up some + * operations. +*/ +#define M68K_USE_64_BIT OPT_OFF + + +/* ======================================================================== */ +/* ============================== END OF FILE ============================= */ +/* ======================================================================== */ + +#endif /* M68KCONF__HEADER */ diff --git a/genplus-gx/core/m68k/m68kcpu.c b/genplus-gx/core/m68k/m68kcpu.c new file mode 100644 index 0000000000..1b67409feb --- /dev/null +++ b/genplus-gx/core/m68k/m68kcpu.c @@ -0,0 +1,385 @@ +/* ======================================================================== */ +/* MAIN 68K CORE */ +/* ======================================================================== */ + +extern int vdp_68k_irq_ack(int int_level); + +#define m68ki_cpu m68k +#define MUL (7) + +/* ======================================================================== */ +/* ================================ INCLUDES ============================== */ +/* ======================================================================== */ + +#ifndef BUILD_TABLES +#include "m68ki_cycles.h" +#endif + +#include "m68kconf.h" +#include "m68kcpu.h" +#include "m68kops.h" + +/* ======================================================================== */ +/* ================================= DATA ================================= */ +/* ======================================================================== */ + +#ifdef BUILD_TABLES +static unsigned char m68ki_cycles[0x10000]; +#endif + +static int irq_latency; + +m68ki_cpu_core m68k; + + +/* ======================================================================== */ +/* =============================== CALLBACKS ============================== */ +/* ======================================================================== */ + +/* Default callbacks used if the callback hasn't been set yet, or if the + * callback is set to NULL + */ + +#if M68K_EMULATE_INT_ACK == OPT_ON +/* Interrupt acknowledge */ +static int default_int_ack_callback(int int_level) +{ + CPU_INT_LEVEL = 0; + return M68K_INT_ACK_AUTOVECTOR; +} +#endif + +#if M68K_EMULATE_RESET == OPT_ON +/* Called when a reset instruction is executed */ +static void default_reset_instr_callback(void) +{ +} +#endif + +#if M68K_TAS_HAS_CALLBACK == OPT_ON +/* Called when a tas instruction is executed */ +static int default_tas_instr_callback(void) +{ + return 1; // allow writeback +} +#endif + +#if M68K_EMULATE_FC == OPT_ON +/* Called every time there's bus activity (read/write to/from memory */ +static void default_set_fc_callback(unsigned int new_fc) +{ +} +#endif + + +/* ======================================================================== */ +/* ================================= API ================================== */ +/* ======================================================================== */ + +/* Access the internals of the CPU */ +unsigned int m68k_get_reg(m68k_register_t regnum) +{ + switch(regnum) + { + case M68K_REG_D0: return m68ki_cpu.dar[0]; + case M68K_REG_D1: return m68ki_cpu.dar[1]; + case M68K_REG_D2: return m68ki_cpu.dar[2]; + case M68K_REG_D3: return m68ki_cpu.dar[3]; + case M68K_REG_D4: return m68ki_cpu.dar[4]; + case M68K_REG_D5: return m68ki_cpu.dar[5]; + case M68K_REG_D6: return m68ki_cpu.dar[6]; + case M68K_REG_D7: return m68ki_cpu.dar[7]; + case M68K_REG_A0: return m68ki_cpu.dar[8]; + case M68K_REG_A1: return m68ki_cpu.dar[9]; + case M68K_REG_A2: return m68ki_cpu.dar[10]; + case M68K_REG_A3: return m68ki_cpu.dar[11]; + case M68K_REG_A4: return m68ki_cpu.dar[12]; + case M68K_REG_A5: return m68ki_cpu.dar[13]; + case M68K_REG_A6: return m68ki_cpu.dar[14]; + case M68K_REG_A7: return m68ki_cpu.dar[15]; + case M68K_REG_PC: return MASK_OUT_ABOVE_32(m68ki_cpu.pc); + case M68K_REG_SR: return m68ki_cpu.t1_flag | + (m68ki_cpu.s_flag << 11) | + m68ki_cpu.int_mask | + ((m68ki_cpu.x_flag & XFLAG_SET) >> 4) | + ((m68ki_cpu.n_flag & NFLAG_SET) >> 4) | + ((!m68ki_cpu.not_z_flag) << 2) | + ((m68ki_cpu.v_flag & VFLAG_SET) >> 6) | + ((m68ki_cpu.c_flag & CFLAG_SET) >> 8); + case M68K_REG_SP: return m68ki_cpu.dar[15]; + case M68K_REG_USP: return m68ki_cpu.s_flag ? m68ki_cpu.sp[0] : m68ki_cpu.dar[15]; + case M68K_REG_ISP: return m68ki_cpu.s_flag ? m68ki_cpu.dar[15] : m68ki_cpu.sp[4]; +#if M68K_EMULATE_PREFETCH + case M68K_REG_PREF_ADDR: return m68ki_cpu.pref_addr; + case M68K_REG_PREF_DATA: return m68ki_cpu.pref_data; +#endif + case M68K_REG_IR: return m68ki_cpu.ir; + default: return 0; + } +} + +void m68k_set_reg(m68k_register_t regnum, unsigned int value) +{ + switch(regnum) + { + case M68K_REG_D0: REG_D[0] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D1: REG_D[1] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D2: REG_D[2] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D3: REG_D[3] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D4: REG_D[4] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D5: REG_D[5] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D6: REG_D[6] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D7: REG_D[7] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A0: REG_A[0] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A1: REG_A[1] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A2: REG_A[2] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A3: REG_A[3] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A4: REG_A[4] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A5: REG_A[5] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A6: REG_A[6] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A7: REG_A[7] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_PC: m68ki_jump(MASK_OUT_ABOVE_32(value)); return; + case M68K_REG_SR: m68ki_set_sr(value); return; + case M68K_REG_SP: REG_SP = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_USP: if(FLAG_S) + REG_USP = MASK_OUT_ABOVE_32(value); + else + REG_SP = MASK_OUT_ABOVE_32(value); + return; + case M68K_REG_ISP: if(FLAG_S) + REG_SP = MASK_OUT_ABOVE_32(value); + else + REG_ISP = MASK_OUT_ABOVE_32(value); + return; + case M68K_REG_IR: REG_IR = MASK_OUT_ABOVE_16(value); return; +#if M68K_EMULATE_PREFETCH + case M68K_REG_PREF_ADDR: CPU_PREF_ADDR = MASK_OUT_ABOVE_32(value); return; +#endif + default: return; + } +} + +/* Set the callbacks */ +#if M68K_EMULATE_INT_ACK == OPT_ON +void m68k_set_int_ack_callback(int (*callback)(int int_level)) +{ + CALLBACK_INT_ACK = callback ? callback : default_int_ack_callback; +} +#endif + +#if M68K_EMULATE_RESET == OPT_ON +void m68k_set_reset_instr_callback(void (*callback)(void)) +{ + CALLBACK_RESET_INSTR = callback ? callback : default_reset_instr_callback; +} +#endif + +#if M68K_TAS_HAS_CALLBACK == OPT_ON +void m68k_set_tas_instr_callback(int (*callback)(void)) +{ + CALLBACK_TAS_INSTR = callback ? callback : default_tas_instr_callback; +} +#endif + +#if M68K_EMULATE_FC == OPT_ON +void m68k_set_fc_callback(void (*callback)(unsigned int new_fc)) +{ + CALLBACK_SET_FC = callback ? callback : default_set_fc_callback; +} +#endif + +#ifdef LOGVDP +extern void error(char *format, ...); +extern uint16 v_counter; +#endif + +/* ASG: rewrote so that the int_level is a mask of the IPL0/IPL1/IPL2 bits */ +/* KS: Modified so that IPL* bits match with mask positions in the SR + * and cleaned out remenants of the interrupt controller. + */ +void m68k_update_irq(unsigned int mask) +{ + /* Update IRQ level */ + CPU_INT_LEVEL |= (mask << 8); + +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] IRQ Level = %d(0x%02x) (%x)\n", v_counter, m68k.cycles/3420, m68k.cycles, m68k.cycles%3420,CPU_INT_LEVEL>>8,FLAG_INT_MASK,m68k_get_reg(M68K_REG_PC)); +#endif +} + +void m68k_set_irq(unsigned int int_level) +{ + /* Set IRQ level */ + CPU_INT_LEVEL = int_level << 8; + +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] IRQ Level = %d(0x%02x) (%x)\n", v_counter, m68k.cycles/3420, m68k.cycles, m68k.cycles%3420,CPU_INT_LEVEL>>8,FLAG_INT_MASK,m68k_get_reg(M68K_REG_PC)); +#endif +} + +/* IRQ latency (Fatal Rewind, Sesame's Street Counting Cafe)*/ +void m68k_set_irq_delay(unsigned int int_level) +{ + /* Prevent reentrance */ + if (!irq_latency) + { + /* This is always triggered from MOVE instructions (VDP CTRL port write) */ + /* We just make sure this is not a MOVE.L instruction as we could be in */ + /* the middle of its execution (first memory write). */ + if ((REG_IR & 0xF000) != 0x2000) + { + /* Finish executing current instruction */ + USE_CYCLES(CYC_INSTRUCTION[REG_IR]); + + /* One instruction delay before interrupt */ + irq_latency = 1; + m68ki_trace_t1() /* auto-disable (see m68kcpu.h) */ + m68ki_use_data_space() /* auto-disable (see m68kcpu.h) */ + REG_IR = m68ki_read_imm_16(); + m68ki_instruction_jump_table[REG_IR](); + m68ki_exception_if_trace() /* auto-disable (see m68kcpu.h) */ + irq_latency = 0; + } + + /* Set IRQ level */ + CPU_INT_LEVEL = int_level << 8; + } + +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] IRQ Level = %d(0x%02x) (%x)\n", v_counter, m68k.cycles/3420, m68k.cycles, m68k.cycles%3420,CPU_INT_LEVEL>>8,FLAG_INT_MASK,m68k_get_reg(M68K_REG_PC)); +#endif + + /* Check interrupt mask to process IRQ */ + m68ki_check_interrupts(); /* Level triggered (IRQ) */ +} + +void m68k_run(unsigned int cycles) +{ + /* Make sure CPU is not already ahead */ + if (m68k.cycles >= cycles) + { + return; + } + + /* Check interrupt mask to process IRQ if needed */ + m68ki_check_interrupts(); + + /* Make sure we're not stopped */ + if (CPU_STOPPED) + { + m68k.cycles = cycles; + return; + } + + /* Save end cycles count for when CPU is stopped */ + m68k.cycle_end = cycles; + + /* Return point for when we have an address error (TODO: use goto) */ + m68ki_set_address_error_trap() /* auto-disable (see m68kcpu.h) */ + +#ifdef LOGVDP + error("[%d][%d] m68k run to %d cycles (%x), irq mask = %x (%x)\n", v_counter, m68k.cycles, cycles, m68k.pc,FLAG_INT_MASK, CPU_INT_LEVEL); +#endif + + while (m68k.cycles < cycles) + { + /* Set tracing accodring to T1. */ + m68ki_trace_t1() /* auto-disable (see m68kcpu.h) */ + + /* Set the address space for reads */ + m68ki_use_data_space() /* auto-disable (see m68kcpu.h) */ + + /* Decode next instruction */ + REG_IR = m68ki_read_imm_16(); + + /* Execute instruction */ + m68ki_instruction_jump_table[REG_IR](); + USE_CYCLES(CYC_INSTRUCTION[REG_IR]); + + /* Trace m68k_exception, if necessary */ + m68ki_exception_if_trace(); /* auto-disable (see m68kcpu.h) */ + } +} + +void m68k_init(void) +{ +#ifdef BUILD_TABLES + static uint emulation_initialized = 0; + + /* The first call to this function initializes the opcode handler jump table */ + if(!emulation_initialized) + { + m68ki_build_opcode_table(); + emulation_initialized = 1; + } +#endif + +#if M68K_EMULATE_INT_ACK == OPT_ON + m68k_set_int_ack_callback(NULL); +#endif +#if M68K_EMULATE_RESET == OPT_ON + m68k_set_reset_instr_callback(NULL); +#endif +#if M68K_TAS_HAS_CALLBACK == OPT_ON + m68k_set_tas_instr_callback(NULL); +#endif +#if M68K_EMULATE_FC == OPT_ON + m68k_set_fc_callback(NULL); +#endif +} + +/* Pulse the RESET line on the CPU */ +void m68k_pulse_reset(void) +{ + /* Clear all stop levels */ + CPU_STOPPED = 0; +#if M68K_EMULATE_ADDRESS_ERROR + CPU_RUN_MODE = RUN_MODE_BERR_AERR_RESET; +#endif + + /* Turn off tracing */ + FLAG_T1 = 0; + m68ki_clear_trace() + + /* Interrupt mask to level 7 */ + FLAG_INT_MASK = 0x0700; + CPU_INT_LEVEL = 0; + irq_latency = 0; + + /* Go to supervisor mode */ + m68ki_set_s_flag(SFLAG_SET); + + /* Invalidate the prefetch queue */ +#if M68K_EMULATE_PREFETCH + /* Set to arbitrary number since our first fetch is from 0 */ + CPU_PREF_ADDR = 0x1000; +#endif /* M68K_EMULATE_PREFETCH */ + + /* Read the initial stack pointer and program counter */ + m68ki_jump(0); + REG_SP = m68ki_read_imm_32(); + REG_PC = m68ki_read_imm_32(); + m68ki_jump(REG_PC); + +#if M68K_EMULATE_ADDRESS_ERROR + CPU_RUN_MODE = RUN_MODE_NORMAL; +#endif + + USE_CYCLES(CYC_EXCEPTION[EXCEPTION_RESET]); +} + +void m68k_pulse_halt(void) +{ + /* Pulse the HALT line on the CPU */ + CPU_STOPPED |= STOP_LEVEL_HALT; +} + +void m68k_clear_halt(void) +{ + /* Clear the HALT line on the CPU */ + CPU_STOPPED &= ~STOP_LEVEL_HALT; +} + +/* ======================================================================== */ +/* ============================== END OF FILE ============================= */ +/* ======================================================================== */ diff --git a/genplus-gx/core/m68k/m68kcpu.h b/genplus-gx/core/m68k/m68kcpu.h new file mode 100644 index 0000000000..317f2cdd12 --- /dev/null +++ b/genplus-gx/core/m68k/m68kcpu.h @@ -0,0 +1,1415 @@ +#ifndef M68KCPU__HEADER +#define M68KCPU__HEADER + +/* ======================================================================== */ +/* GENERIC 68K CORE */ +/* ======================================================================== */ + +#include +#include +#include + +#if M68K_EMULATE_ADDRESS_ERROR +#include +#endif /* M68K_EMULATE_ADDRESS_ERROR */ + +#include "m68k.h" + + +/* ======================================================================== */ +/* ============================ GENERAL DEFINES =========================== */ +/* ======================================================================== */ + +/* Exception Vectors handled by emulation */ +#define EXCEPTION_RESET 0 +#define EXCEPTION_BUS_ERROR 2 /* This one is not emulated! */ +#define EXCEPTION_ADDRESS_ERROR 3 /* This one is partially emulated (doesn't stack a proper frame yet) */ +#define EXCEPTION_ILLEGAL_INSTRUCTION 4 +#define EXCEPTION_ZERO_DIVIDE 5 +#define EXCEPTION_CHK 6 +#define EXCEPTION_TRAPV 7 +#define EXCEPTION_PRIVILEGE_VIOLATION 8 +#define EXCEPTION_TRACE 9 +#define EXCEPTION_1010 10 +#define EXCEPTION_1111 11 +#define EXCEPTION_FORMAT_ERROR 14 +#define EXCEPTION_UNINITIALIZED_INTERRUPT 15 +#define EXCEPTION_SPURIOUS_INTERRUPT 24 +#define EXCEPTION_INTERRUPT_AUTOVECTOR 24 +#define EXCEPTION_TRAP_BASE 32 + +/* Function codes set by CPU during data/address bus activity */ +#define FUNCTION_CODE_USER_DATA 1 +#define FUNCTION_CODE_USER_PROGRAM 2 +#define FUNCTION_CODE_SUPERVISOR_DATA 5 +#define FUNCTION_CODE_SUPERVISOR_PROGRAM 6 +#define FUNCTION_CODE_CPU_SPACE 7 + +/* Different ways to stop the CPU */ +#define STOP_LEVEL_STOP 1 +#define STOP_LEVEL_HALT 2 + +/* Used for 68000 address error processing */ +#if M68K_EMULATE_ADDRESS_ERROR +#define INSTRUCTION_YES 0 +#define INSTRUCTION_NO 0x08 +#define MODE_READ 0x10 +#define MODE_WRITE 0 + +#define RUN_MODE_NORMAL 0 +#define RUN_MODE_BERR_AERR_RESET 1 +#endif + +#ifndef NULL +#define NULL ((void*)0) +#endif + +/* ======================================================================== */ +/* ================================ MACROS ================================ */ +/* ======================================================================== */ + + +/* ---------------------------- General Macros ---------------------------- */ + +/* Bit Isolation Macros */ +#define BIT_0(A) ((A) & 0x00000001) +#define BIT_1(A) ((A) & 0x00000002) +#define BIT_2(A) ((A) & 0x00000004) +#define BIT_3(A) ((A) & 0x00000008) +#define BIT_4(A) ((A) & 0x00000010) +#define BIT_5(A) ((A) & 0x00000020) +#define BIT_6(A) ((A) & 0x00000040) +#define BIT_7(A) ((A) & 0x00000080) +#define BIT_8(A) ((A) & 0x00000100) +#define BIT_9(A) ((A) & 0x00000200) +#define BIT_A(A) ((A) & 0x00000400) +#define BIT_B(A) ((A) & 0x00000800) +#define BIT_C(A) ((A) & 0x00001000) +#define BIT_D(A) ((A) & 0x00002000) +#define BIT_E(A) ((A) & 0x00004000) +#define BIT_F(A) ((A) & 0x00008000) +#define BIT_10(A) ((A) & 0x00010000) +#define BIT_11(A) ((A) & 0x00020000) +#define BIT_12(A) ((A) & 0x00040000) +#define BIT_13(A) ((A) & 0x00080000) +#define BIT_14(A) ((A) & 0x00100000) +#define BIT_15(A) ((A) & 0x00200000) +#define BIT_16(A) ((A) & 0x00400000) +#define BIT_17(A) ((A) & 0x00800000) +#define BIT_18(A) ((A) & 0x01000000) +#define BIT_19(A) ((A) & 0x02000000) +#define BIT_1A(A) ((A) & 0x04000000) +#define BIT_1B(A) ((A) & 0x08000000) +#define BIT_1C(A) ((A) & 0x10000000) +#define BIT_1D(A) ((A) & 0x20000000) +#define BIT_1E(A) ((A) & 0x40000000) +#define BIT_1F(A) ((A) & 0x80000000) + +/* Get the most significant bit for specific sizes */ +#define GET_MSB_8(A) ((A) & 0x80) +#define GET_MSB_9(A) ((A) & 0x100) +#define GET_MSB_16(A) ((A) & 0x8000) +#define GET_MSB_17(A) ((A) & 0x10000) +#define GET_MSB_32(A) ((A) & 0x80000000) +#if M68K_USE_64_BIT +#define GET_MSB_33(A) ((A) & 0x100000000) +#endif /* M68K_USE_64_BIT */ + +/* Isolate nibbles */ +#define LOW_NIBBLE(A) ((A) & 0x0f) +#define HIGH_NIBBLE(A) ((A) & 0xf0) + +/* These are used to isolate 8, 16, and 32 bit sizes */ +#define MASK_OUT_ABOVE_2(A) ((A) & 3) +#define MASK_OUT_ABOVE_8(A) ((A) & 0xff) +#define MASK_OUT_ABOVE_16(A) ((A) & 0xffff) +#define MASK_OUT_BELOW_2(A) ((A) & ~3) +#define MASK_OUT_BELOW_8(A) ((A) & ~0xff) +#define MASK_OUT_BELOW_16(A) ((A) & ~0xffff) + +/* No need to mask if we are 32 bit */ +#if M68K_INT_GT_32_BIT || M68K_USE_64_BIT + #define MASK_OUT_ABOVE_32(A) ((A) & 0xffffffff) + #define MASK_OUT_BELOW_32(A) ((A) & ~0xffffffff) +#else + #define MASK_OUT_ABOVE_32(A) (A) + #define MASK_OUT_BELOW_32(A) 0 +#endif /* M68K_INT_GT_32_BIT || M68K_USE_64_BIT */ + +/* Simulate address lines of 68k family */ +#define ADDRESS_68K(A) ((A)&CPU_ADDRESS_MASK) + + +/* Shift & Rotate Macros. */ +#define LSL(A, C) ((A) << (C)) +#define LSR(A, C) ((A) >> (C)) + +/* Some > 32-bit optimizations */ +#if M68K_INT_GT_32_BIT + /* Shift left and right */ + #define LSR_32(A, C) ((A) >> (C)) + #define LSL_32(A, C) ((A) << (C)) +#else + /* We have to do this because the morons at ANSI decided that shifts + * by >= data size are undefined. + */ + #define LSR_32(A, C) ((C) < 32 ? (A) >> (C) : 0) + #define LSL_32(A, C) ((C) < 32 ? (A) << (C) : 0) +#endif /* M68K_INT_GT_32_BIT */ + +#if M68K_USE_64_BIT + #define LSL_32_64(A, C) ((A) << (C)) + #define LSR_32_64(A, C) ((A) >> (C)) + #define ROL_33_64(A, C) (LSL_32_64(A, C) | LSR_32_64(A, 33-(C))) + #define ROR_33_64(A, C) (LSR_32_64(A, C) | LSL_32_64(A, 33-(C))) +#endif /* M68K_USE_64_BIT */ + +#define ROL_8(A, C) MASK_OUT_ABOVE_8(LSL(A, C) | LSR(A, 8-(C))) +#define ROL_9(A, C) (LSL(A, C) | LSR(A, 9-(C))) +#define ROL_16(A, C) MASK_OUT_ABOVE_16(LSL(A, C) | LSR(A, 16-(C))) +#define ROL_17(A, C) (LSL(A, C) | LSR(A, 17-(C))) +#define ROL_32(A, C) MASK_OUT_ABOVE_32(LSL_32(A, C) | LSR_32(A, 32-(C))) +#define ROL_33(A, C) (LSL_32(A, C) | LSR_32(A, 33-(C))) + +#define ROR_8(A, C) MASK_OUT_ABOVE_8(LSR(A, C) | LSL(A, 8-(C))) +#define ROR_9(A, C) (LSR(A, C) | LSL(A, 9-(C))) +#define ROR_16(A, C) MASK_OUT_ABOVE_16(LSR(A, C) | LSL(A, 16-(C))) +#define ROR_17(A, C) (LSR(A, C) | LSL(A, 17-(C))) +#define ROR_32(A, C) MASK_OUT_ABOVE_32(LSR_32(A, C) | LSL_32(A, 32-(C))) +#define ROR_33(A, C) (LSR_32(A, C) | LSL_32(A, 33-(C))) + + + +/* ------------------------------ CPU Access ------------------------------ */ + +/* Access the CPU registers */ +#define REG_DA m68ki_cpu.dar /* easy access to data and address regs */ +#define REG_D m68ki_cpu.dar +#define REG_A (m68ki_cpu.dar+8) +#define REG_PC m68ki_cpu.pc +#define REG_SP_BASE m68ki_cpu.sp +#define REG_USP m68ki_cpu.sp[0] +#define REG_ISP m68ki_cpu.sp[4] +#define REG_SP m68ki_cpu.dar[15] +#define REG_IR m68ki_cpu.ir + +#define FLAG_T1 m68ki_cpu.t1_flag +#define FLAG_S m68ki_cpu.s_flag +#define FLAG_X m68ki_cpu.x_flag +#define FLAG_N m68ki_cpu.n_flag +#define FLAG_Z m68ki_cpu.not_z_flag +#define FLAG_V m68ki_cpu.v_flag +#define FLAG_C m68ki_cpu.c_flag +#define FLAG_INT_MASK m68ki_cpu.int_mask + +#define CPU_INT_LEVEL m68ki_cpu.int_level /* ASG: changed from CPU_INTS_PENDING */ +#define CPU_STOPPED m68ki_cpu.stopped +#if M68K_EMULATE_PREFETCH +#define CPU_PREF_ADDR m68ki_cpu.pref_addr +#define CPU_PREF_DATA m68ki_cpu.pref_data +#endif +#define CPU_ADDRESS_MASK 0x00ffffff +#if M68K_EMULATE_ADDRESS_ERROR +#define CPU_INSTR_MODE m68ki_cpu.instr_mode +#define CPU_RUN_MODE m68ki_cpu.run_mode +#endif + +#define CYC_INSTRUCTION m68ki_cycles +#define CYC_EXCEPTION m68ki_exception_cycle_table +#define CYC_BCC_NOTAKE_B ( -2 * MUL) +#define CYC_BCC_NOTAKE_W ( 2 * MUL) +#define CYC_DBCC_F_NOEXP ( -2 * MUL) +#define CYC_DBCC_F_EXP ( 2 * MUL) +#define CYC_SCC_R_TRUE ( 2 * MUL) +#define CYC_MOVEM_W ( 4 * MUL) +#define CYC_MOVEM_L ( 8 * MUL) +#define CYC_SHIFT ( 2 * MUL) +#define CYC_RESET (132 * MUL) + +#if M68K_EMULATE_INT_ACK == OPT_ON +#define CALLBACK_INT_ACK m68ki_cpu.int_ack_callback +#endif +#if M68K_EMULATE_RESET == OPT_ON +#define CALLBACK_RESET_INSTR m68ki_cpu.reset_instr_callback +#endif +#if M68K_TAS_HAS_CALLBACK == OPT_ON +#define CALLBACK_TAS_INSTR m68ki_cpu.tas_instr_callback +#endif +#if M68K_EMULATE_FC == OPT_ON +#define CALLBACK_SET_FC m68ki_cpu.set_fc_callback +#endif + + +/* ----------------------------- Configuration ---------------------------- */ + +/* These defines are dependant on the configuration defines in m68kconf.h */ + +/* Enable or disable callback functions */ +#if M68K_EMULATE_INT_ACK + #if M68K_EMULATE_INT_ACK == OPT_SPECIFY_HANDLER + #define m68ki_int_ack(A) M68K_INT_ACK_CALLBACK(A); + #else + #define m68ki_int_ack(A) CALLBACK_INT_ACK(A); + #endif +#else + /* Default action is to used autovector mode, which is most common */ + #define m68ki_int_ack(A) M68K_INT_ACK_AUTOVECTOR +#endif /* M68K_EMULATE_INT_ACK */ + +#if M68K_EMULATE_RESET + #if M68K_EMULATE_RESET == OPT_SPECIFY_HANDLER + #define m68ki_output_reset() M68K_RESET_CALLBACK(); + #else + #define m68ki_output_reset() CALLBACK_RESET_INSTR(); + #endif +#else + #define m68ki_output_reset() +#endif /* M68K_EMULATE_RESET */ + +#if M68K_TAS_HAS_CALLBACK + #if M68K_TAS_HAS_CALLBACK == OPT_SPECIFY_HANDLER + #define m68ki_tas_callback() M68K_TAS_CALLBACK() + #else + #define m68ki_tas_callback() CALLBACK_TAS_INSTR() + #endif +#else + #define m68ki_tas_callback() 0 +#endif /* M68K_TAS_HAS_CALLBACK */ + + +/* Enable or disable function code emulation */ +#if M68K_EMULATE_FC + #if M68K_EMULATE_FC == OPT_SPECIFY_HANDLER + #define m68ki_set_fc(A) M68K_SET_FC_CALLBACK(A); + #else + #define m68ki_set_fc(A) CALLBACK_SET_FC(A); + #endif + #define m68ki_use_data_space() m68ki_cpu.address_space = FUNCTION_CODE_USER_DATA; + #define m68ki_use_program_space() m68ki_cpu.address_space = FUNCTION_CODE_USER_PROGRAM; + #define m68ki_get_address_space() m68ki_cpu.address_space +#else + #define m68ki_set_fc(A) + #define m68ki_use_data_space() + #define m68ki_use_program_space() + #define m68ki_get_address_space() FUNCTION_CODE_USER_DATA +#endif /* M68K_EMULATE_FC */ + + +/* Enable or disable trace emulation */ +#if M68K_EMULATE_TRACE + /* Initiates trace checking before each instruction (t1) */ + #define m68ki_trace_t1() m68ki_cpu.tracing = FLAG_T1; + /* Clear all tracing */ + #define m68ki_clear_trace() m68ki_cpu.tracing = 0; + /* Cause a trace exception if we are tracing */ + #define m68ki_exception_if_trace() if(m68ki_cpu.tracing) m68ki_exception_trace(); +#else + #define m68ki_trace_t1() + #define m68ki_clear_trace() + #define m68ki_exception_if_trace() +#endif /* M68K_EMULATE_TRACE */ + + +/* Enable or disable Address error emulation */ +#if M68K_EMULATE_ADDRESS_ERROR + #define m68ki_set_address_error_trap() \ + if(setjmp(m68ki_cpu.aerr_trap) != 0) \ + { \ + m68ki_exception_address_error(); \ + } + + #define m68ki_check_address_error(ADDR, WRITE_MODE, FC) \ + if((ADDR)&1) \ + { \ + if (m68ki_cpu.aerr_enabled) \ + { \ + m68ki_cpu.aerr_address = ADDR; \ + m68ki_cpu.aerr_write_mode = WRITE_MODE; \ + m68ki_cpu.aerr_fc = FC; \ + longjmp(m68ki_cpu.aerr_trap, 1); \ + } \ + } +#else + #define m68ki_set_address_error_trap() + #define m68ki_check_address_error(ADDR, WRITE_MODE, FC) +#endif /* M68K_ADDRESS_ERROR */ + + +/* -------------------------- EA / Operand Access ------------------------- */ + +/* + * The general instruction format follows this pattern: + * .... XXX. .... .YYY + * where XXX is register X and YYY is register Y + */ + +/* Data Register Isolation */ +#define DX (REG_D[(REG_IR >> 9) & 7]) +#define DY (REG_D[REG_IR & 7]) + +/* Address Register Isolation */ +#define AX (REG_A[(REG_IR >> 9) & 7]) +#define AY (REG_A[REG_IR & 7]) + +/* Effective Address Calculations */ +#define EA_AY_AI_8() AY /* address register indirect */ +#define EA_AY_AI_16() EA_AY_AI_8() +#define EA_AY_AI_32() EA_AY_AI_8() +#define EA_AY_PI_8() (AY++) /* postincrement (size = byte) */ +#define EA_AY_PI_16() ((AY+=2)-2) /* postincrement (size = word) */ +#define EA_AY_PI_32() ((AY+=4)-4) /* postincrement (size = long) */ +#define EA_AY_PD_8() (--AY) /* predecrement (size = byte) */ +#define EA_AY_PD_16() (AY-=2) /* predecrement (size = word) */ +#define EA_AY_PD_32() (AY-=4) /* predecrement (size = long) */ +#define EA_AY_DI_8() (AY+MAKE_INT_16(m68ki_read_imm_16())) /* displacement */ +#define EA_AY_DI_16() EA_AY_DI_8() +#define EA_AY_DI_32() EA_AY_DI_8() +#define EA_AY_IX_8() m68ki_get_ea_ix(AY) /* indirect + index */ +#define EA_AY_IX_16() EA_AY_IX_8() +#define EA_AY_IX_32() EA_AY_IX_8() + +#define EA_AX_AI_8() AX +#define EA_AX_AI_16() EA_AX_AI_8() +#define EA_AX_AI_32() EA_AX_AI_8() +#define EA_AX_PI_8() (AX++) +#define EA_AX_PI_16() ((AX+=2)-2) +#define EA_AX_PI_32() ((AX+=4)-4) +#define EA_AX_PD_8() (--AX) +#define EA_AX_PD_16() (AX-=2) +#define EA_AX_PD_32() (AX-=4) +#define EA_AX_DI_8() (AX+MAKE_INT_16(m68ki_read_imm_16())) +#define EA_AX_DI_16() EA_AX_DI_8() +#define EA_AX_DI_32() EA_AX_DI_8() +#define EA_AX_IX_8() m68ki_get_ea_ix(AX) +#define EA_AX_IX_16() EA_AX_IX_8() +#define EA_AX_IX_32() EA_AX_IX_8() + +#define EA_A7_PI_8() ((REG_A[7]+=2)-2) +#define EA_A7_PD_8() (REG_A[7]-=2) + +#define EA_AW_8() MAKE_INT_16(m68ki_read_imm_16()) /* absolute word */ +#define EA_AW_16() EA_AW_8() +#define EA_AW_32() EA_AW_8() +#define EA_AL_8() m68ki_read_imm_32() /* absolute long */ +#define EA_AL_16() EA_AL_8() +#define EA_AL_32() EA_AL_8() +#define EA_PCDI_8() m68ki_get_ea_pcdi() /* pc indirect + displacement */ +#define EA_PCDI_16() EA_PCDI_8() +#define EA_PCDI_32() EA_PCDI_8() +#define EA_PCIX_8() m68ki_get_ea_pcix() /* pc indirect + index */ +#define EA_PCIX_16() EA_PCIX_8() +#define EA_PCIX_32() EA_PCIX_8() + + +#define OPER_I_8() m68ki_read_imm_8() +#define OPER_I_16() m68ki_read_imm_16() +#define OPER_I_32() m68ki_read_imm_32() + + +/* --------------------------- Status Register ---------------------------- */ + +/* Flag Calculation Macros */ +#define CFLAG_8(A) (A) +#define CFLAG_16(A) ((A)>>8) + +#if M68K_INT_GT_32_BIT + #define CFLAG_ADD_32(S, D, R) ((R)>>24) + #define CFLAG_SUB_32(S, D, R) ((R)>>24) +#else + #define CFLAG_ADD_32(S, D, R) (((S & D) | (~R & (S | D)))>>23) + #define CFLAG_SUB_32(S, D, R) (((S & R) | (~D & (S | R)))>>23) +#endif /* M68K_INT_GT_32_BIT */ + +#define VFLAG_ADD_8(S, D, R) ((S^R) & (D^R)) +#define VFLAG_ADD_16(S, D, R) (((S^R) & (D^R))>>8) +#define VFLAG_ADD_32(S, D, R) (((S^R) & (D^R))>>24) + +#define VFLAG_SUB_8(S, D, R) ((S^D) & (R^D)) +#define VFLAG_SUB_16(S, D, R) (((S^D) & (R^D))>>8) +#define VFLAG_SUB_32(S, D, R) (((S^D) & (R^D))>>24) + +#define NFLAG_8(A) (A) +#define NFLAG_16(A) ((A)>>8) +#define NFLAG_32(A) ((A)>>24) +#define NFLAG_64(A) ((A)>>56) + +#define ZFLAG_8(A) MASK_OUT_ABOVE_8(A) +#define ZFLAG_16(A) MASK_OUT_ABOVE_16(A) +#define ZFLAG_32(A) MASK_OUT_ABOVE_32(A) + + +/* Flag values */ +#define NFLAG_SET 0x80 +#define NFLAG_CLEAR 0 +#define CFLAG_SET 0x100 +#define CFLAG_CLEAR 0 +#define XFLAG_SET 0x100 +#define XFLAG_CLEAR 0 +#define VFLAG_SET 0x80 +#define VFLAG_CLEAR 0 +#define ZFLAG_SET 0 +#define ZFLAG_CLEAR 0xffffffff +#define SFLAG_SET 4 +#define SFLAG_CLEAR 0 + +/* Turn flag values into 1 or 0 */ +#define XFLAG_AS_1() ((FLAG_X>>8)&1) +#define NFLAG_AS_1() ((FLAG_N>>7)&1) +#define VFLAG_AS_1() ((FLAG_V>>7)&1) +#define ZFLAG_AS_1() (!FLAG_Z) +#define CFLAG_AS_1() ((FLAG_C>>8)&1) + + +/* Conditions */ +#define COND_CS() (FLAG_C&0x100) +#define COND_CC() (!COND_CS()) +#define COND_VS() (FLAG_V&0x80) +#define COND_VC() (!COND_VS()) +#define COND_NE() FLAG_Z +#define COND_EQ() (!COND_NE()) +#define COND_MI() (FLAG_N&0x80) +#define COND_PL() (!COND_MI()) +#define COND_LT() ((FLAG_N^FLAG_V)&0x80) +#define COND_GE() (!COND_LT()) +#define COND_HI() (COND_CC() && COND_NE()) +#define COND_LS() (COND_CS() || COND_EQ()) +#define COND_GT() (COND_GE() && COND_NE()) +#define COND_LE() (COND_LT() || COND_EQ()) + +/* Reversed conditions */ +#define COND_NOT_CS() COND_CC() +#define COND_NOT_CC() COND_CS() +#define COND_NOT_VS() COND_VC() +#define COND_NOT_VC() COND_VS() +#define COND_NOT_NE() COND_EQ() +#define COND_NOT_EQ() COND_NE() +#define COND_NOT_MI() COND_PL() +#define COND_NOT_PL() COND_MI() +#define COND_NOT_LT() COND_GE() +#define COND_NOT_GE() COND_LT() +#define COND_NOT_HI() COND_LS() +#define COND_NOT_LS() COND_HI() +#define COND_NOT_GT() COND_LE() +#define COND_NOT_LE() COND_GT() + +/* Not real conditions, but here for convenience */ +#define COND_XS() (FLAG_X&0x100) +#define COND_XC() (!COND_XS) + + +/* Get the condition code register */ +#define m68ki_get_ccr() ((COND_XS() >> 4) | \ + (COND_MI() >> 4) | \ + (COND_EQ() << 2) | \ + (COND_VS() >> 6) | \ + (COND_CS() >> 8)) + +/* Get the status register */ +#define m68ki_get_sr() ( FLAG_T1 | \ + (FLAG_S << 11) | \ + FLAG_INT_MASK | \ + m68ki_get_ccr()) + + + +/* ---------------------------- Cycle Counting ---------------------------- */ + +#define USE_CYCLES(A) m68ki_cpu.cycles += (A) +#define SET_CYCLES(A) m68ki_cpu.cycles = (A) + + +/* ----------------------------- Read / Write ----------------------------- */ + +/* Read data immediately following the PC */ +#define m68k_read_immediate_16(address) *(uint16 *)(m68ki_cpu.memory_map[((address)>>16)&0xff].base + ((address) & 0xffff)) +#define m68k_read_immediate_32(address) (m68k_read_immediate_16(address) << 16) | (m68k_read_immediate_16(address+2)) + +/* Read data relative to the PC */ +#define m68k_read_pcrelative_8(address) READ_BYTE(m68ki_cpu.memory_map[((address)>>16)&0xff].base, (address) & 0xffff) +#define m68k_read_pcrelative_16(address) m68k_read_immediate_16(address) +#define m68k_read_pcrelative_32(address) m68k_read_immediate_32(address) + +/* Read from the current address space */ +#define m68ki_read_8(A) m68ki_read_8_fc (A, FLAG_S | m68ki_get_address_space()) +#define m68ki_read_16(A) m68ki_read_16_fc(A, FLAG_S | m68ki_get_address_space()) +#define m68ki_read_32(A) m68ki_read_32_fc(A, FLAG_S | m68ki_get_address_space()) + +/* Write to the current data space */ +#define m68ki_write_8(A, V) m68ki_write_8_fc (A, FLAG_S | FUNCTION_CODE_USER_DATA, V) +#define m68ki_write_16(A, V) m68ki_write_16_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V) +#define m68ki_write_32(A, V) m68ki_write_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V) + +/* map read immediate 8 to read immediate 16 */ +#define m68ki_read_imm_8() MASK_OUT_ABOVE_8(m68ki_read_imm_16()) + +/* Map PC-relative reads */ +#define m68ki_read_pcrel_8(A) m68k_read_pcrelative_8(A) +#define m68ki_read_pcrel_16(A) m68k_read_pcrelative_16(A) +#define m68ki_read_pcrel_32(A) m68k_read_pcrelative_32(A) + +/* Read from the program space */ +#define m68ki_read_program_8(A) m68ki_read_8_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM) +#define m68ki_read_program_16(A) m68ki_read_16_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM) +#define m68ki_read_program_32(A) m68ki_read_32_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM) + +/* Read from the data space */ +#define m68ki_read_data_8(A) m68ki_read_8_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA) +#define m68ki_read_data_16(A) m68ki_read_16_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA) +#define m68ki_read_data_32(A) m68ki_read_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA) + + + +/* ======================================================================== */ +/* =============================== PROTOTYPES ============================= */ +/* ======================================================================== */ + +/* Used by shift & rotate instructions */ +static const uint8 m68ki_shift_8_table[65] = +{ + 0x00, 0x80, 0xc0, 0xe0, 0xf0, 0xf8, 0xfc, 0xfe, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff +}; + +static const uint16 m68ki_shift_16_table[65] = +{ + 0x0000, 0x8000, 0xc000, 0xe000, 0xf000, 0xf800, 0xfc00, 0xfe00, 0xff00, + 0xff80, 0xffc0, 0xffe0, 0xfff0, 0xfff8, 0xfffc, 0xfffe, 0xffff, 0xffff, + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, + 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, + 0xffff, 0xffff +}; + +static const uint m68ki_shift_32_table[65] = +{ + 0x00000000, 0x80000000, 0xc0000000, 0xe0000000, 0xf0000000, 0xf8000000, + 0xfc000000, 0xfe000000, 0xff000000, 0xff800000, 0xffc00000, 0xffe00000, + 0xfff00000, 0xfff80000, 0xfffc0000, 0xfffe0000, 0xffff0000, 0xffff8000, + 0xffffc000, 0xffffe000, 0xfffff000, 0xfffff800, 0xfffffc00, 0xfffffe00, + 0xffffff00, 0xffffff80, 0xffffffc0, 0xffffffe0, 0xfffffff0, 0xfffffff8, + 0xfffffffc, 0xfffffffe, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff +}; + + +/* Number of clock cycles to use for exception processing. + * I used 4 for any vectors that are undocumented for processing times. + */ +static const uint16 m68ki_exception_cycle_table[256] = +{ + 40*MUL, /* 0: Reset - Initial Stack Pointer */ + 4*MUL, /* 1: Reset - Initial Program Counter */ + 50*MUL, /* 2: Bus Error (unemulated) */ + 50*MUL, /* 3: Address Error (unemulated) */ + 34*MUL, /* 4: Illegal Instruction */ + 38*MUL, /* 5: Divide by Zero -- ASG: changed from 42 */ + 40*MUL, /* 6: CHK -- ASG: chanaged from 44 */ + 34*MUL, /* 7: TRAPV */ + 34*MUL, /* 8: Privilege Violation */ + 34*MUL, /* 9: Trace */ + 4*MUL, /* 10: 1010 */ + 4*MUL, /* 11: 1111 */ + 4*MUL, /* 12: RESERVED */ + 4*MUL, /* 13: Coprocessor Protocol Violation (unemulated) */ + 4*MUL, /* 14: Format Error */ + 44*MUL, /* 15: Uninitialized Interrupt */ + 4*MUL, /* 16: RESERVED */ + 4*MUL, /* 17: RESERVED */ + 4*MUL, /* 18: RESERVED */ + 4*MUL, /* 19: RESERVED */ + 4*MUL, /* 20: RESERVED */ + 4*MUL, /* 21: RESERVED */ + 4*MUL, /* 22: RESERVED */ + 4*MUL, /* 23: RESERVED */ + 44*MUL, /* 24: Spurious Interrupt */ + 44*MUL, /* 25: Level 1 Interrupt Autovector */ + 44*MUL, /* 26: Level 2 Interrupt Autovector */ + 44*MUL, /* 27: Level 3 Interrupt Autovector */ + 44*MUL, /* 28: Level 4 Interrupt Autovector */ + 44*MUL, /* 29: Level 5 Interrupt Autovector */ + 44*MUL, /* 30: Level 6 Interrupt Autovector */ + 44*MUL, /* 31: Level 7 Interrupt Autovector */ + 34*MUL, /* 32: TRAP #0 -- ASG: chanaged from 38 */ + 34*MUL, /* 33: TRAP #1 */ + 34*MUL, /* 34: TRAP #2 */ + 34*MUL, /* 35: TRAP #3 */ + 34*MUL, /* 36: TRAP #4 */ + 34*MUL, /* 37: TRAP #5 */ + 34*MUL, /* 38: TRAP #6 */ + 34*MUL, /* 39: TRAP #7 */ + 34*MUL, /* 40: TRAP #8 */ + 34*MUL, /* 41: TRAP #9 */ + 34*MUL, /* 42: TRAP #10 */ + 34*MUL, /* 43: TRAP #11 */ + 34*MUL, /* 44: TRAP #12 */ + 34*MUL, /* 45: TRAP #13 */ + 34*MUL, /* 46: TRAP #14 */ + 34*MUL, /* 47: TRAP #15 */ + 4*MUL, /* 48: FP Branch or Set on Unknown Condition (unemulated) */ + 4*MUL, /* 49: FP Inexact Result (unemulated) */ + 4*MUL, /* 50: FP Divide by Zero (unemulated) */ + 4*MUL, /* 51: FP Underflow (unemulated) */ + 4*MUL, /* 52: FP Operand Error (unemulated) */ + 4*MUL, /* 53: FP Overflow (unemulated) */ + 4*MUL, /* 54: FP Signaling NAN (unemulated) */ + 4*MUL, /* 55: FP Unimplemented Data Type (unemulated) */ + 4*MUL, /* 56: MMU Configuration Error (unemulated) */ + 4*MUL, /* 57: MMU Illegal Operation Error (unemulated) */ + 4*MUL, /* 58: MMU Access Level Violation Error (unemulated) */ + 4*MUL, /* 59: RESERVED */ + 4*MUL, /* 60: RESERVED */ + 4*MUL, /* 61: RESERVED */ + 4*MUL, /* 62: RESERVED */ + 4*MUL, /* 63: RESERVED */ + /* 64-255: User Defined */ + 4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL, + 4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL, + 4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL, + 4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL, + 4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL, + 4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL,4*MUL +}; + +/* Read data immediately after the program counter */ +INLINE uint m68ki_read_imm_16(void); +INLINE uint m68ki_read_imm_32(void); + +/* Read data with specific function code */ +INLINE uint m68ki_read_8_fc (uint address, uint fc); +INLINE uint m68ki_read_16_fc (uint address, uint fc); +INLINE uint m68ki_read_32_fc (uint address, uint fc); + +/* Write data with specific function code */ +INLINE void m68ki_write_8_fc (uint address, uint fc, uint value); +INLINE void m68ki_write_16_fc(uint address, uint fc, uint value); +INLINE void m68ki_write_32_fc(uint address, uint fc, uint value); + +/* Indexed and PC-relative ea fetching */ +INLINE uint m68ki_get_ea_pcdi(void); +INLINE uint m68ki_get_ea_pcix(void); +INLINE uint m68ki_get_ea_ix(uint An); + +/* Operand fetching */ +INLINE uint OPER_AY_AI_8(void); +INLINE uint OPER_AY_AI_16(void); +INLINE uint OPER_AY_AI_32(void); +INLINE uint OPER_AY_PI_8(void); +INLINE uint OPER_AY_PI_16(void); +INLINE uint OPER_AY_PI_32(void); +INLINE uint OPER_AY_PD_8(void); +INLINE uint OPER_AY_PD_16(void); +INLINE uint OPER_AY_PD_32(void); +INLINE uint OPER_AY_DI_8(void); +INLINE uint OPER_AY_DI_16(void); +INLINE uint OPER_AY_DI_32(void); +INLINE uint OPER_AY_IX_8(void); +INLINE uint OPER_AY_IX_16(void); +INLINE uint OPER_AY_IX_32(void); + +INLINE uint OPER_AX_AI_8(void); +INLINE uint OPER_AX_AI_16(void); +INLINE uint OPER_AX_AI_32(void); +INLINE uint OPER_AX_PI_8(void); +INLINE uint OPER_AX_PI_16(void); +INLINE uint OPER_AX_PI_32(void); +INLINE uint OPER_AX_PD_8(void); +INLINE uint OPER_AX_PD_16(void); +INLINE uint OPER_AX_PD_32(void); +INLINE uint OPER_AX_DI_8(void); +INLINE uint OPER_AX_DI_16(void); +INLINE uint OPER_AX_DI_32(void); +INLINE uint OPER_AX_IX_8(void); +INLINE uint OPER_AX_IX_16(void); +INLINE uint OPER_AX_IX_32(void); + +INLINE uint OPER_A7_PI_8(void); +INLINE uint OPER_A7_PD_8(void); + +INLINE uint OPER_AW_8(void); +INLINE uint OPER_AW_16(void); +INLINE uint OPER_AW_32(void); +INLINE uint OPER_AL_8(void); +INLINE uint OPER_AL_16(void); +INLINE uint OPER_AL_32(void); +INLINE uint OPER_PCDI_8(void); +INLINE uint OPER_PCDI_16(void); +INLINE uint OPER_PCDI_32(void); +INLINE uint OPER_PCIX_8(void); +INLINE uint OPER_PCIX_16(void); +INLINE uint OPER_PCIX_32(void); + +/* Stack operations */ +INLINE void m68ki_push_16(uint value); +INLINE void m68ki_push_32(uint value); +INLINE uint m68ki_pull_16(void); +INLINE uint m68ki_pull_32(void); + +/* Program flow operations */ +INLINE void m68ki_jump(uint new_pc); +INLINE void m68ki_jump_vector(uint vector); +INLINE void m68ki_branch_8(uint offset); +INLINE void m68ki_branch_16(uint offset); +INLINE void m68ki_branch_32(uint offset); + +/* Status register operations. */ +INLINE void m68ki_set_s_flag(uint value); /* Only bit 2 of value should be set (i.e. 4 or 0) */ +INLINE void m68ki_set_ccr(uint value); /* set the condition code register */ +INLINE void m68ki_set_sr(uint value); /* set the status register */ + +/* Exception processing */ +INLINE uint m68ki_init_exception(void); /* Initial exception processing */ +INLINE void m68ki_stack_frame_3word(uint pc, uint sr); /* Stack various frame types */ +#if M68K_EMULATE_ADDRESS_ERROR +INLINE void m68ki_stack_frame_buserr(uint sr); +#endif +INLINE void m68ki_exception_trap(uint vector); +INLINE void m68ki_exception_trapN(uint vector); +#if M68K_EMULATE_TRACE +INLINE void m68ki_exception_trace(void); +#endif +static void m68ki_exception_privilege_violation(void); /* do not inline in order to reduce function size and allow inlining of read/write functions by the compile */ +INLINE void m68ki_exception_1010(void); +INLINE void m68ki_exception_1111(void); +INLINE void m68ki_exception_illegal(void); +#if M68K_EMULATE_ADDRESS_ERROR +INLINE void m68ki_exception_address_error(void); +#endif +INLINE void m68ki_exception_interrupt(uint int_level); +INLINE void m68ki_check_interrupts(void); /* ASG: check for interrupts */ + +/* ======================================================================== */ +/* =========================== UTILITY FUNCTIONS ========================== */ +/* ======================================================================== */ + + +/* ---------------------------- Read Immediate ---------------------------- */ + +/* Handles all immediate reads, does address error check, function code setting, + * and prefetching if they are enabled in m68kconf.h + */ +INLINE uint m68ki_read_imm_16(void) +{ + m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM) /* auto-disable (see m68kcpu.h) */ +#if M68K_CHECK_PC_ADDRESS_ERROR + m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM) /* auto-disable (see m68kcpu.h) */ +#endif +#if M68K_EMULATE_PREFETCH + if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR) + { + CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC); + CPU_PREF_DATA = m68k_read_immediate_32(CPU_PREF_ADDR); + } + REG_PC += 2; + return MASK_OUT_ABOVE_16(CPU_PREF_DATA >> ((2-((REG_PC-2)&2))<<3)); +#else + uint pc = REG_PC; + REG_PC += 2; + return m68k_read_immediate_16(pc); +#endif /* M68K_EMULATE_PREFETCH */ +} + +INLINE uint m68ki_read_imm_32(void) +{ +#if M68K_EMULATE_PREFETCH + uint temp_val; + + m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM) /* auto-disable (see m68kcpu.h) */ +#if M68K_CHECK_PC_ADDRESS_ERROR + m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM) /* auto-disable (see m68kcpu.h) */ +#endif + if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR) + { + CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC); + CPU_PREF_DATA = m68k_read_immediate_32(CPU_PREF_ADDR); + } + temp_val = CPU_PREF_DATA; + REG_PC += 2; + if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR) + { + CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC); + CPU_PREF_DATA = m68k_read_immediate_32(CPU_PREF_ADDR); + temp_val = MASK_OUT_ABOVE_32((temp_val << 16) | (CPU_PREF_DATA >> 16)); + } + REG_PC += 2; + + return temp_val; +#else + m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM) /* auto-disable (see m68kcpu.h) */ +#if M68K_CHECK_PC_ADDRESS_ERROR + m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM) /* auto-disable (see m68kcpu.h) */ +#endif + uint pc = REG_PC; + REG_PC += 4; + return m68k_read_immediate_32(pc); +#endif /* M68K_EMULATE_PREFETCH */ +} + + + +/* ------------------------- Top level read/write ------------------------- */ + +/* Handles all memory accesses (except for immediate reads if they are + * configured to use separate functions in m68kconf.h). + * All memory accesses must go through these top level functions. + * These functions will also check for address error and set the function + * code if they are enabled in m68kconf.h. + */ +INLINE uint m68ki_read_8_fc(uint address, uint fc) +{ + cpu_memory_map *temp = &m68ki_cpu.memory_map[((address)>>16)&0xff];; + + m68ki_set_fc(fc) /* auto-disable (see m68kcpu.h) */ + + if (temp->read8) return (*temp->read8)(ADDRESS_68K(address)); + else return READ_BYTE(temp->base, (address) & 0xffff); +} + +INLINE uint m68ki_read_16_fc(uint address, uint fc) +{ + cpu_memory_map *temp; + + m68ki_set_fc(fc) /* auto-disable (see m68kcpu.h) */ + m68ki_check_address_error(address, MODE_READ, fc) /* auto-disable (see m68kcpu.h) */ + + temp = &m68ki_cpu.memory_map[((address)>>16)&0xff]; + if (temp->read16) return (*temp->read16)(ADDRESS_68K(address)); + else return *(uint16 *)(temp->base + ((address) & 0xffff)); +} + +INLINE uint m68ki_read_32_fc(uint address, uint fc) +{ + cpu_memory_map *temp; + + m68ki_set_fc(fc) /* auto-disable (see m68kcpu.h) */ + m68ki_check_address_error(address, MODE_READ, fc) /* auto-disable (see m68kcpu.h) */ + + temp = &m68ki_cpu.memory_map[((address)>>16)&0xff]; + if (temp->read16) return ((*temp->read16)(ADDRESS_68K(address)) << 16) | ((*temp->read16)(ADDRESS_68K(address + 2))); + else return m68k_read_immediate_32(address); +} + +INLINE void m68ki_write_8_fc(uint address, uint fc, uint value) +{ + cpu_memory_map *temp; + + m68ki_set_fc(fc) /* auto-disable (see m68kcpu.h) */ + + temp = &m68ki_cpu.memory_map[((address)>>16)&0xff]; + if (temp->write8) (*temp->write8)(ADDRESS_68K(address),value); + else WRITE_BYTE(temp->base, (address) & 0xffff, value); +} + +INLINE void m68ki_write_16_fc(uint address, uint fc, uint value) +{ + cpu_memory_map *temp; + + m68ki_set_fc(fc) /* auto-disable (see m68kcpu.h) */ + m68ki_check_address_error(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */ + + temp = &m68ki_cpu.memory_map[((address)>>16)&0xff]; + if (temp->write16) (*temp->write16)(ADDRESS_68K(address),value); + else *(uint16 *)(temp->base + ((address) & 0xffff)) = value; +} + +INLINE void m68ki_write_32_fc(uint address, uint fc, uint value) +{ + cpu_memory_map *temp; + + m68ki_set_fc(fc) /* auto-disable (see m68kcpu.h) */ + m68ki_check_address_error(address, MODE_WRITE, fc) /* auto-disable (see m68kcpu.h) */ + + temp = &m68ki_cpu.memory_map[((address)>>16)&0xff]; + if (temp->write16) (*temp->write16)(ADDRESS_68K(address),value>>16); + else *(uint16 *)(temp->base + ((address) & 0xffff)) = value >> 16; + + temp = &m68ki_cpu.memory_map[((address + 2)>>16)&0xff]; + if (temp->write16) (*temp->write16)(ADDRESS_68K(address+2),value&0xffff); + else *(uint16 *)(temp->base + ((address + 2) & 0xffff)) = value; +} + + +/* --------------------- Effective Address Calculation -------------------- */ + +/* The program counter relative addressing modes cause operands to be + * retrieved from program space, not data space. + */ +INLINE uint m68ki_get_ea_pcdi(void) +{ + uint old_pc = REG_PC; + m68ki_use_program_space() /* auto-disable */ + return old_pc + MAKE_INT_16(m68ki_read_imm_16()); +} + + +INLINE uint m68ki_get_ea_pcix(void) +{ + m68ki_use_program_space() /* auto-disable */ + return m68ki_get_ea_ix(REG_PC); +} + +/* Indexed addressing modes are encoded as follows: + * + * Base instruction format: + * F E D C B A 9 8 7 6 | 5 4 3 | 2 1 0 + * x x x x x x x x x x | 1 1 0 | BASE REGISTER (An) + * + * Base instruction format for destination EA in move instructions: + * F E D C | B A 9 | 8 7 6 | 5 4 3 2 1 0 + * x x x x | BASE REG | 1 1 0 | X X X X X X (An) + * + * Brief extension format: + * F | E D C | B | A 9 | 8 | 7 6 5 4 3 2 1 0 + * D/A | REGISTER | W/L | SCALE | 0 | DISPLACEMENT + * + * Full extension format: + * F E D C B A 9 8 7 6 5 4 3 2 1 0 + * D/A | REGISTER | W/L | SCALE | 1 | BS | IS | BD SIZE | 0 | I/IS + * BASE DISPLACEMENT (0, 16, 32 bit) (bd) + * OUTER DISPLACEMENT (0, 16, 32 bit) (od) + * + * D/A: 0 = Dn, 1 = An (Xn) + * W/L: 0 = W (sign extend), 1 = L (.SIZE) + * SCALE: 00=1, 01=2, 10=4, 11=8 (*SCALE) + * BS: 0=add base reg, 1=suppress base reg (An suppressed) + * IS: 0=add index, 1=suppress index (Xn suppressed) + * BD SIZE: 00=reserved, 01=NULL, 10=Word, 11=Long (size of bd) + * + * IS I/IS Operation + * 0 000 No Memory Indirect + * 0 001 indir prex with null outer + * 0 010 indir prex with word outer + * 0 011 indir prex with long outer + * 0 100 reserved + * 0 101 indir postx with null outer + * 0 110 indir postx with word outer + * 0 111 indir postx with long outer + * 1 000 no memory indirect + * 1 001 mem indir with null outer + * 1 010 mem indir with word outer + * 1 011 mem indir with long outer + * 1 100-111 reserved + */ +INLINE uint m68ki_get_ea_ix(uint An) +{ + /* An = base register */ + uint extension = m68ki_read_imm_16(); + + uint Xn = 0; /* Index register */ + + /* Calculate index */ + Xn = REG_DA[extension>>12]; /* Xn */ + if(!BIT_B(extension)) /* W/L */ + Xn = MAKE_INT_16(Xn); + + /* Add base register and displacement and return */ + return An + Xn + MAKE_INT_8(extension); +} + + +/* Fetch operands */ +INLINE uint OPER_AY_AI_8(void) {uint ea = EA_AY_AI_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AY_AI_16(void) {uint ea = EA_AY_AI_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AY_AI_32(void) {uint ea = EA_AY_AI_32(); return m68ki_read_32(ea);} +INLINE uint OPER_AY_PI_8(void) {uint ea = EA_AY_PI_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AY_PI_16(void) {uint ea = EA_AY_PI_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AY_PI_32(void) {uint ea = EA_AY_PI_32(); return m68ki_read_32(ea);} +INLINE uint OPER_AY_PD_8(void) {uint ea = EA_AY_PD_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AY_PD_16(void) {uint ea = EA_AY_PD_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AY_PD_32(void) {uint ea = EA_AY_PD_32(); return m68ki_read_32(ea);} +INLINE uint OPER_AY_DI_8(void) {uint ea = EA_AY_DI_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AY_DI_16(void) {uint ea = EA_AY_DI_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AY_DI_32(void) {uint ea = EA_AY_DI_32(); return m68ki_read_32(ea);} +INLINE uint OPER_AY_IX_8(void) {uint ea = EA_AY_IX_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AY_IX_16(void) {uint ea = EA_AY_IX_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AY_IX_32(void) {uint ea = EA_AY_IX_32(); return m68ki_read_32(ea);} + +INLINE uint OPER_AX_AI_8(void) {uint ea = EA_AX_AI_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AX_AI_16(void) {uint ea = EA_AX_AI_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AX_AI_32(void) {uint ea = EA_AX_AI_32(); return m68ki_read_32(ea);} +INLINE uint OPER_AX_PI_8(void) {uint ea = EA_AX_PI_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AX_PI_16(void) {uint ea = EA_AX_PI_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AX_PI_32(void) {uint ea = EA_AX_PI_32(); return m68ki_read_32(ea);} +INLINE uint OPER_AX_PD_8(void) {uint ea = EA_AX_PD_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AX_PD_16(void) {uint ea = EA_AX_PD_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AX_PD_32(void) {uint ea = EA_AX_PD_32(); return m68ki_read_32(ea);} +INLINE uint OPER_AX_DI_8(void) {uint ea = EA_AX_DI_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AX_DI_16(void) {uint ea = EA_AX_DI_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AX_DI_32(void) {uint ea = EA_AX_DI_32(); return m68ki_read_32(ea);} +INLINE uint OPER_AX_IX_8(void) {uint ea = EA_AX_IX_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AX_IX_16(void) {uint ea = EA_AX_IX_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AX_IX_32(void) {uint ea = EA_AX_IX_32(); return m68ki_read_32(ea);} + +INLINE uint OPER_A7_PI_8(void) {uint ea = EA_A7_PI_8(); return m68ki_read_8(ea); } +INLINE uint OPER_A7_PD_8(void) {uint ea = EA_A7_PD_8(); return m68ki_read_8(ea); } + +INLINE uint OPER_AW_8(void) {uint ea = EA_AW_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AW_16(void) {uint ea = EA_AW_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AW_32(void) {uint ea = EA_AW_32(); return m68ki_read_32(ea);} +INLINE uint OPER_AL_8(void) {uint ea = EA_AL_8(); return m68ki_read_8(ea); } +INLINE uint OPER_AL_16(void) {uint ea = EA_AL_16(); return m68ki_read_16(ea);} +INLINE uint OPER_AL_32(void) {uint ea = EA_AL_32(); return m68ki_read_32(ea);} +INLINE uint OPER_PCDI_8(void) {uint ea = EA_PCDI_8(); return m68ki_read_pcrel_8(ea); } +INLINE uint OPER_PCDI_16(void) {uint ea = EA_PCDI_16(); return m68ki_read_pcrel_16(ea);} +INLINE uint OPER_PCDI_32(void) {uint ea = EA_PCDI_32(); return m68ki_read_pcrel_32(ea);} +INLINE uint OPER_PCIX_8(void) {uint ea = EA_PCIX_8(); return m68ki_read_pcrel_8(ea); } +INLINE uint OPER_PCIX_16(void) {uint ea = EA_PCIX_16(); return m68ki_read_pcrel_16(ea);} +INLINE uint OPER_PCIX_32(void) {uint ea = EA_PCIX_32(); return m68ki_read_pcrel_32(ea);} + + + +/* ---------------------------- Stack Functions --------------------------- */ + +/* Push/pull data from the stack */ +/* Optimized access assuming stack is always located in ROM/RAM [EkeEke] */ +INLINE void m68ki_push_16(uint value) +{ + REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2); + /*m68ki_write_16(REG_SP, value);*/ + *(uint16 *)(m68ki_cpu.memory_map[(REG_SP>>16)&0xff].base + (REG_SP & 0xffff)) = value; +} + +INLINE void m68ki_push_32(uint value) +{ + REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4); + /*m68ki_write_32(REG_SP, value);*/ + *(uint16 *)(m68ki_cpu.memory_map[(REG_SP>>16)&0xff].base + (REG_SP & 0xffff)) = value >> 16; + *(uint16 *)(m68ki_cpu.memory_map[((REG_SP + 2)>>16)&0xff].base + ((REG_SP + 2) & 0xffff)) = value & 0xffff; +} + +INLINE uint m68ki_pull_16(void) +{ + uint sp = REG_SP; + REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2); + return m68k_read_immediate_16(sp); + /*return m68ki_read_16(sp);*/ +} + +INLINE uint m68ki_pull_32(void) +{ + uint sp = REG_SP; + REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4); + return m68k_read_immediate_32(sp); + /*return m68ki_read_32(sp);*/ +} + + + +/* ----------------------------- Program Flow ----------------------------- */ + +/* Jump to a new program location or vector. + * These functions will also call the pc_changed callback if it was enabled + * in m68kconf.h. + */ +INLINE void m68ki_jump(uint new_pc) +{ + REG_PC = new_pc; +} + +INLINE void m68ki_jump_vector(uint vector) +{ + REG_PC = m68ki_read_data_32(vector<<2); +} + + +/* Branch to a new memory location. + * The 32-bit branch will call pc_changed if it was enabled in m68kconf.h. + * So far I've found no problems with not calling pc_changed for 8 or 16 + * bit branches. + */ +INLINE void m68ki_branch_8(uint offset) +{ + REG_PC += MAKE_INT_8(offset); +} + +INLINE void m68ki_branch_16(uint offset) +{ + REG_PC += MAKE_INT_16(offset); +} + +INLINE void m68ki_branch_32(uint offset) +{ + REG_PC += offset; +} + + + +/* ---------------------------- Status Register --------------------------- */ + +/* Set the S flag and change the active stack pointer. + * Note that value MUST be 4 or 0. + */ +INLINE void m68ki_set_s_flag(uint value) +{ + /* Backup the old stack pointer */ + REG_SP_BASE[FLAG_S] = REG_SP; + /* Set the S flag */ + FLAG_S = value; + /* Set the new stack pointer */ + REG_SP = REG_SP_BASE[FLAG_S]; +} + + +/* Set the condition code register */ +INLINE void m68ki_set_ccr(uint value) +{ + FLAG_X = BIT_4(value) << 4; + FLAG_N = BIT_3(value) << 4; + FLAG_Z = !BIT_2(value); + FLAG_V = BIT_1(value) << 6; + FLAG_C = BIT_0(value) << 8; +} + + +/* Set the status register and check for interrupts */ +INLINE void m68ki_set_sr(uint value) +{ + /* Set the status register */ + FLAG_T1 = BIT_F(value); + FLAG_INT_MASK = value & 0x0700; + m68ki_set_ccr(value); + m68ki_set_s_flag((value >> 11) & 4); + + /* Check current IRQ status */ + m68ki_check_interrupts(); +} + + +/* ------------------------- Exception Processing ------------------------- */ + +/* Initiate exception processing */ +INLINE uint m68ki_init_exception(void) +{ + /* Save the old status register */ + uint sr = m68ki_get_sr(); + + /* Turn off trace flag, clear pending traces */ + FLAG_T1 = 0; + m68ki_clear_trace() + + /* Enter supervisor mode */ + m68ki_set_s_flag(SFLAG_SET); + + return sr; +} + +/* 3 word stack frame (68000 only) */ +INLINE void m68ki_stack_frame_3word(uint pc, uint sr) +{ + m68ki_push_32(pc); + m68ki_push_16(sr); +} + +#if M68K_EMULATE_ADDRESS_ERROR +/* Bus error stack frame (68000 only). + */ +INLINE void m68ki_stack_frame_buserr(uint sr) +{ + m68ki_push_32(REG_PC); + m68ki_push_16(sr); + m68ki_push_16(REG_IR); + m68ki_push_32(m68ki_cpu.aerr_address); /* access address */ + /* 0 0 0 0 0 0 0 0 0 0 0 R/W I/N FC + * R/W 0 = write, 1 = read + * I/N 0 = instruction, 1 = not + * FC 3-bit function code + */ + m68ki_push_16(m68ki_cpu.aerr_write_mode | CPU_INSTR_MODE | m68ki_cpu.aerr_fc); +} +#endif + +/* Used for Group 2 exceptions. + */ +INLINE void m68ki_exception_trap(uint vector) +{ + uint sr = m68ki_init_exception(); + + m68ki_stack_frame_3word(REG_PC, sr); + + m68ki_jump_vector(vector); + + /* Use up some clock cycles */ + USE_CYCLES(CYC_EXCEPTION[vector]); +} + +/* Trap#n stacks a 0 frame but behaves like group2 otherwise */ +INLINE void m68ki_exception_trapN(uint vector) +{ + uint sr = m68ki_init_exception(); + m68ki_stack_frame_3word(REG_PC, sr); + m68ki_jump_vector(vector); + + /* Use up some clock cycles */ + USE_CYCLES(CYC_EXCEPTION[vector]); +} + +#if M68K_EMULATE_TRACE +/* Exception for trace mode */ +INLINE void m68ki_exception_trace(void) +{ + uint sr = m68ki_init_exception(); + + #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON + CPU_INSTR_MODE = INSTRUCTION_NO; + #endif /* M68K_EMULATE_ADDRESS_ERROR */ + + m68ki_stack_frame_3word(REG_PC, sr); + m68ki_jump_vector(EXCEPTION_TRACE); + + /* Trace nullifies a STOP instruction */ + CPU_STOPPED &= ~STOP_LEVEL_STOP; + + /* Use up some clock cycles */ + USE_CYCLES(CYC_EXCEPTION[EXCEPTION_TRACE]); +} +#endif + +/* Exception for privilege violation */ +static void m68ki_exception_privilege_violation(void) +{ + uint sr = m68ki_init_exception(); + + #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON + CPU_INSTR_MODE = INSTRUCTION_NO; + #endif /* M68K_EMULATE_ADDRESS_ERROR */ + + m68ki_stack_frame_3word(REG_PC-2, sr); + m68ki_jump_vector(EXCEPTION_PRIVILEGE_VIOLATION); + + /* Use up some clock cycles and undo the instruction's cycles */ + USE_CYCLES(CYC_EXCEPTION[EXCEPTION_PRIVILEGE_VIOLATION] - CYC_INSTRUCTION[REG_IR]); +} + +/* Exception for A-Line instructions */ +INLINE void m68ki_exception_1010(void) +{ + uint sr = m68ki_init_exception(); + m68ki_stack_frame_3word(REG_PC-2, sr); + m68ki_jump_vector(EXCEPTION_1010); + + /* Use up some clock cycles and undo the instruction's cycles */ + USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1010] - CYC_INSTRUCTION[REG_IR]); +} + +/* Exception for F-Line instructions */ +INLINE void m68ki_exception_1111(void) +{ + uint sr = m68ki_init_exception(); + m68ki_stack_frame_3word(REG_PC-2, sr); + m68ki_jump_vector(EXCEPTION_1111); + + /* Use up some clock cycles and undo the instruction's cycles */ + USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1111] - CYC_INSTRUCTION[REG_IR]); +} + +/* Exception for illegal instructions */ +INLINE void m68ki_exception_illegal(void) +{ + uint sr = m68ki_init_exception(); + + #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON + CPU_INSTR_MODE = INSTRUCTION_NO; + #endif /* M68K_EMULATE_ADDRESS_ERROR */ + + m68ki_stack_frame_3word(REG_PC-2, sr); + m68ki_jump_vector(EXCEPTION_ILLEGAL_INSTRUCTION); + + /* Use up some clock cycles and undo the instruction's cycles */ + USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ILLEGAL_INSTRUCTION] - CYC_INSTRUCTION[REG_IR]); +} + + +#if M68K_EMULATE_ADDRESS_ERROR +/* Exception for address error */ +INLINE void m68ki_exception_address_error(void) +{ + uint sr = m68ki_init_exception(); + + /* If we were processing a bus error, address error, or reset, + * this is a catastrophic failure. + * Halt the CPU + */ + if(CPU_RUN_MODE == RUN_MODE_BERR_AERR_RESET) + { + CPU_STOPPED = STOP_LEVEL_HALT; + SET_CYCLES(m68ki_cpu.cycle_end - CYC_INSTRUCTION[REG_IR]); + return; + } + CPU_RUN_MODE = RUN_MODE_BERR_AERR_RESET; + + /* Note: This is implemented for 68000 only! */ + m68ki_stack_frame_buserr(sr); + + m68ki_jump_vector(EXCEPTION_ADDRESS_ERROR); + + /* Use up some clock cycles and undo the instruction's cycles */ + USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ADDRESS_ERROR] - CYC_INSTRUCTION[REG_IR]); +} +#endif + +/* Service an interrupt request and start exception processing */ +INLINE void m68ki_exception_interrupt(uint int_level) +{ + uint vector, sr, new_pc; + + #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON + CPU_INSTR_MODE = INSTRUCTION_NO; + #endif /* M68K_EMULATE_ADDRESS_ERROR */ + + /* Turn off the stopped state */ + CPU_STOPPED &= STOP_LEVEL_HALT; + + /* If we are halted, don't do anything */ + if(CPU_STOPPED) + return; + + /* Always use the autovectors. */ + vector = EXCEPTION_INTERRUPT_AUTOVECTOR+int_level; + + /* Start exception processing */ + sr = m68ki_init_exception(); + + /* Set the interrupt mask to the level of the one being serviced */ + FLAG_INT_MASK = int_level<<8; + + /* Acknowledge the interrupt */ + m68ki_int_ack(int_level); + + /* Get the new PC */ + new_pc = m68ki_read_data_32(vector<<2); + + /* If vector is uninitialized, call the uninitialized interrupt vector */ + if(new_pc == 0) + new_pc = m68ki_read_data_32((EXCEPTION_UNINITIALIZED_INTERRUPT<<2)); + + /* Generate a stack frame */ + m68ki_stack_frame_3word(REG_PC, sr); + + m68ki_jump(new_pc); + + /* Update cycle count now */ + USE_CYCLES(CYC_EXCEPTION[vector]); +} + +/* ASG: Check for interrupts */ +INLINE void m68ki_check_interrupts(void) +{ + if(CPU_INT_LEVEL > FLAG_INT_MASK) + m68ki_exception_interrupt(CPU_INT_LEVEL>>8); +} + + +/* ======================================================================== */ +/* ============================== END OF FILE ============================= */ +/* ======================================================================== */ + +#endif /* M68KCPU__HEADER */ diff --git a/genplus-gx/core/m68k/m68ki_cycles.h b/genplus-gx/core/m68k/m68ki_cycles.h new file mode 100644 index 0000000000..7120652553 --- /dev/null +++ b/genplus-gx/core/m68k/m68ki_cycles.h @@ -0,0 +1,4099 @@ +static const unsigned char m68ki_cycles[0x10000] = +{ + 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, + 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 20*7, 20*7, 20*7, 20*7, 20*7, 20*7, 20*7, 20*7, + 22*7, 22*7, 22*7, 22*7, 22*7, 22*7, 22*7, 22*7, 20*7, 24*7, 0*7, 0*7, 20*7, 0*7, 0*7, 0*7, + 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, + 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 20*7, 20*7, 20*7, 20*7, 20*7, 20*7, 20*7, 20*7, + 22*7, 22*7, 22*7, 22*7, 22*7, 22*7, 22*7, 22*7, 20*7, 24*7, 0*7, 0*7, 20*7, 0*7, 0*7, 0*7, + 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, + 30*7, 30*7, 30*7, 30*7, 30*7, 30*7, 30*7, 30*7, 32*7, 32*7, 32*7, 32*7, 32*7, 32*7, 32*7, 32*7, + 34*7, 34*7, 34*7, 34*7, 34*7, 34*7, 34*7, 34*7, 32*7, 36*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 6*7, 6*7, 6*7, 6*7, 6*7, 6*7, 6*7, 6*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, + 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, + 10*7, 10*7, 10*7, 10*7, 10*7, 10*7, 10*7, 10*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, + 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 12*7, 16*7, 12*7, 14*7, 8*7, 0*7, 0*7, 0*7, + 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 24*7, 24*7, 24*7, 24*7, 24*7, 24*7, 24*7, 24*7, + 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, + 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, + 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 16*7, 20*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 10*7, 10*7, 10*7, 10*7, 10*7, 10*7, 10*7, 10*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, + 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, + 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, + 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 16*7, 20*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 24*7, 24*7, 24*7, 24*7, 24*7, 24*7, 24*7, 24*7, + 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, + 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, + 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 16*7, 20*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, + 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 20*7, 20*7, 20*7, 20*7, 20*7, 20*7, 20*7, 20*7, + 22*7, 22*7, 22*7, 22*7, 22*7, 22*7, 22*7, 22*7, 20*7, 24*7, 0*7, 0*7, 20*7, 0*7, 0*7, 0*7, + 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, + 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 20*7, 20*7, 20*7, 20*7, 20*7, 20*7, 20*7, 20*7, + 22*7, 22*7, 22*7, 22*7, 22*7, 22*7, 22*7, 22*7, 20*7, 24*7, 0*7, 0*7, 20*7, 0*7, 0*7, 0*7, + 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, + 30*7, 30*7, 30*7, 30*7, 30*7, 30*7, 30*7, 30*7, 32*7, 32*7, 32*7, 32*7, 32*7, 32*7, 32*7, 32*7, + 34*7, 34*7, 34*7, 34*7, 34*7, 34*7, 34*7, 34*7, 32*7, 36*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 6*7, 6*7, 6*7, 6*7, 6*7, 6*7, 6*7, 6*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, + 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, + 10*7, 10*7, 10*7, 10*7, 10*7, 10*7, 10*7, 10*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, + 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 12*7, 16*7, 12*7, 14*7, 8*7, 0*7, 0*7, 0*7, + 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 24*7, 24*7, 24*7, 24*7, 24*7, 24*7, 24*7, 24*7, + 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, + 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, + 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 16*7, 20*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 10*7, 10*7, 10*7, 10*7, 10*7, 10*7, 10*7, 10*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, + 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, + 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, + 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 16*7, 20*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 24*7, 24*7, 24*7, 24*7, 24*7, 24*7, 24*7, 24*7, + 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, 12*7, + 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 14*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, + 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 16*7, 20*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, + 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 20*7, 20*7, 20*7, 20*7, 20*7, 20*7, 20*7, 20*7, + 22*7, 22*7, 22*7, 22*7, 22*7, 22*7, 22*7, 22*7, 20*7, 24*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 8*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, + 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 18*7, 20*7, 20*7, 20*7, 20*7, 20*7, 20*7, 20*7, 20*7, + 22*7, 22*7, 22*7, 22*7, 22*7, 22*7, 22*7, 22*7, 20*7, 24*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 16*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, 28*7, + 30*7, 30*7, 30*7, 30*7, 30*7, 30*7, 30*7, 30*7, 32*7, 32*7, 32*7, 32*7, 32*7, 32*7, 32*7, 32*7, + 34*7, 34*7, 34*7, 34*7, 34*7, 34*7, 34*7, 34*7, 32*7, 36*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, 0*7, + 0*7, 0*7, 0*7, 0*7, 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4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, + 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, + 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, + 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, + 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, + 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, + 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, + 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, + 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, + 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, + 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, 4*7, +}; diff --git a/genplus-gx/core/m68k/m68ki_instruction_jump_table.h b/genplus-gx/core/m68k/m68ki_instruction_jump_table.h new file mode 100644 index 0000000000..a3dbc50ee5 --- /dev/null +++ b/genplus-gx/core/m68k/m68ki_instruction_jump_table.h @@ -0,0 +1,8195 @@ +static void (* const m68ki_instruction_jump_table[0x10000])(void) = +{ + m68k_op_ori_8_d, m68k_op_ori_8_d, m68k_op_ori_8_d, m68k_op_ori_8_d, m68k_op_ori_8_d, m68k_op_ori_8_d, m68k_op_ori_8_d, m68k_op_ori_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_ori_8_ai, m68k_op_ori_8_ai, m68k_op_ori_8_ai, m68k_op_ori_8_ai, m68k_op_ori_8_ai, m68k_op_ori_8_ai, m68k_op_ori_8_ai, m68k_op_ori_8_ai, + m68k_op_ori_8_pi, m68k_op_ori_8_pi, m68k_op_ori_8_pi, m68k_op_ori_8_pi, m68k_op_ori_8_pi, m68k_op_ori_8_pi, m68k_op_ori_8_pi, m68k_op_ori_8_pi7, + m68k_op_ori_8_pd, m68k_op_ori_8_pd, m68k_op_ori_8_pd, m68k_op_ori_8_pd, m68k_op_ori_8_pd, m68k_op_ori_8_pd, m68k_op_ori_8_pd, m68k_op_ori_8_pd7, + m68k_op_ori_8_di, m68k_op_ori_8_di, m68k_op_ori_8_di, m68k_op_ori_8_di, m68k_op_ori_8_di, m68k_op_ori_8_di, m68k_op_ori_8_di, m68k_op_ori_8_di, + m68k_op_ori_8_ix, m68k_op_ori_8_ix, m68k_op_ori_8_ix, m68k_op_ori_8_ix, m68k_op_ori_8_ix, m68k_op_ori_8_ix, m68k_op_ori_8_ix, m68k_op_ori_8_ix, + m68k_op_ori_8_aw, m68k_op_ori_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_ori_16_toc, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_ori_16_d, m68k_op_ori_16_d, m68k_op_ori_16_d, m68k_op_ori_16_d, m68k_op_ori_16_d, m68k_op_ori_16_d, m68k_op_ori_16_d, m68k_op_ori_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_ori_16_ai, m68k_op_ori_16_ai, m68k_op_ori_16_ai, m68k_op_ori_16_ai, m68k_op_ori_16_ai, m68k_op_ori_16_ai, m68k_op_ori_16_ai, m68k_op_ori_16_ai, + m68k_op_ori_16_pi, m68k_op_ori_16_pi, m68k_op_ori_16_pi, m68k_op_ori_16_pi, m68k_op_ori_16_pi, m68k_op_ori_16_pi, m68k_op_ori_16_pi, m68k_op_ori_16_pi, + m68k_op_ori_16_pd, m68k_op_ori_16_pd, m68k_op_ori_16_pd, m68k_op_ori_16_pd, m68k_op_ori_16_pd, m68k_op_ori_16_pd, m68k_op_ori_16_pd, m68k_op_ori_16_pd, + m68k_op_ori_16_di, m68k_op_ori_16_di, m68k_op_ori_16_di, m68k_op_ori_16_di, m68k_op_ori_16_di, m68k_op_ori_16_di, m68k_op_ori_16_di, m68k_op_ori_16_di, + m68k_op_ori_16_ix, m68k_op_ori_16_ix, m68k_op_ori_16_ix, m68k_op_ori_16_ix, m68k_op_ori_16_ix, m68k_op_ori_16_ix, m68k_op_ori_16_ix, m68k_op_ori_16_ix, + m68k_op_ori_16_aw, m68k_op_ori_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_ori_16_tos, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_ori_32_d, m68k_op_ori_32_d, m68k_op_ori_32_d, m68k_op_ori_32_d, m68k_op_ori_32_d, m68k_op_ori_32_d, m68k_op_ori_32_d, m68k_op_ori_32_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_ori_32_ai, m68k_op_ori_32_ai, m68k_op_ori_32_ai, m68k_op_ori_32_ai, m68k_op_ori_32_ai, m68k_op_ori_32_ai, m68k_op_ori_32_ai, m68k_op_ori_32_ai, + m68k_op_ori_32_pi, m68k_op_ori_32_pi, m68k_op_ori_32_pi, m68k_op_ori_32_pi, m68k_op_ori_32_pi, m68k_op_ori_32_pi, m68k_op_ori_32_pi, m68k_op_ori_32_pi, + m68k_op_ori_32_pd, m68k_op_ori_32_pd, m68k_op_ori_32_pd, m68k_op_ori_32_pd, m68k_op_ori_32_pd, m68k_op_ori_32_pd, m68k_op_ori_32_pd, m68k_op_ori_32_pd, + m68k_op_ori_32_di, m68k_op_ori_32_di, m68k_op_ori_32_di, m68k_op_ori_32_di, m68k_op_ori_32_di, m68k_op_ori_32_di, m68k_op_ori_32_di, m68k_op_ori_32_di, + m68k_op_ori_32_ix, m68k_op_ori_32_ix, m68k_op_ori_32_ix, m68k_op_ori_32_ix, m68k_op_ori_32_ix, m68k_op_ori_32_ix, m68k_op_ori_32_ix, m68k_op_ori_32_ix, + m68k_op_ori_32_aw, m68k_op_ori_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, + m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, + m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, + m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi7, + m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd7, + m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, + m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, + m68k_op_btst_8_r_aw, m68k_op_btst_8_r_al, m68k_op_btst_8_r_pcdi, m68k_op_btst_8_r_pcix, m68k_op_btst_8_r_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, + m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, + m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, + m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi7, + m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd7, + m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, + m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, + m68k_op_bchg_8_r_aw, m68k_op_bchg_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, + m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, + m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, + m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi7, + m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd7, + m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, + m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, + m68k_op_bclr_8_r_aw, m68k_op_bclr_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, + m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, + m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, + m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi7, + m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd7, + m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, + m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, + m68k_op_bset_8_r_aw, m68k_op_bset_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_andi_8_d, m68k_op_andi_8_d, m68k_op_andi_8_d, m68k_op_andi_8_d, m68k_op_andi_8_d, m68k_op_andi_8_d, m68k_op_andi_8_d, m68k_op_andi_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_andi_8_ai, m68k_op_andi_8_ai, m68k_op_andi_8_ai, m68k_op_andi_8_ai, m68k_op_andi_8_ai, m68k_op_andi_8_ai, m68k_op_andi_8_ai, m68k_op_andi_8_ai, + m68k_op_andi_8_pi, m68k_op_andi_8_pi, m68k_op_andi_8_pi, m68k_op_andi_8_pi, m68k_op_andi_8_pi, m68k_op_andi_8_pi, m68k_op_andi_8_pi, m68k_op_andi_8_pi7, + m68k_op_andi_8_pd, m68k_op_andi_8_pd, m68k_op_andi_8_pd, m68k_op_andi_8_pd, m68k_op_andi_8_pd, m68k_op_andi_8_pd, m68k_op_andi_8_pd, m68k_op_andi_8_pd7, + m68k_op_andi_8_di, m68k_op_andi_8_di, m68k_op_andi_8_di, m68k_op_andi_8_di, m68k_op_andi_8_di, m68k_op_andi_8_di, m68k_op_andi_8_di, m68k_op_andi_8_di, + m68k_op_andi_8_ix, m68k_op_andi_8_ix, m68k_op_andi_8_ix, m68k_op_andi_8_ix, m68k_op_andi_8_ix, m68k_op_andi_8_ix, m68k_op_andi_8_ix, m68k_op_andi_8_ix, + m68k_op_andi_8_aw, m68k_op_andi_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_andi_16_toc, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_andi_16_d, m68k_op_andi_16_d, m68k_op_andi_16_d, m68k_op_andi_16_d, m68k_op_andi_16_d, m68k_op_andi_16_d, m68k_op_andi_16_d, m68k_op_andi_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_andi_16_ai, m68k_op_andi_16_ai, m68k_op_andi_16_ai, m68k_op_andi_16_ai, m68k_op_andi_16_ai, m68k_op_andi_16_ai, m68k_op_andi_16_ai, m68k_op_andi_16_ai, + m68k_op_andi_16_pi, m68k_op_andi_16_pi, m68k_op_andi_16_pi, m68k_op_andi_16_pi, m68k_op_andi_16_pi, m68k_op_andi_16_pi, m68k_op_andi_16_pi, m68k_op_andi_16_pi, + m68k_op_andi_16_pd, m68k_op_andi_16_pd, m68k_op_andi_16_pd, m68k_op_andi_16_pd, m68k_op_andi_16_pd, m68k_op_andi_16_pd, m68k_op_andi_16_pd, m68k_op_andi_16_pd, + m68k_op_andi_16_di, m68k_op_andi_16_di, m68k_op_andi_16_di, m68k_op_andi_16_di, m68k_op_andi_16_di, m68k_op_andi_16_di, m68k_op_andi_16_di, m68k_op_andi_16_di, + m68k_op_andi_16_ix, m68k_op_andi_16_ix, m68k_op_andi_16_ix, m68k_op_andi_16_ix, m68k_op_andi_16_ix, m68k_op_andi_16_ix, m68k_op_andi_16_ix, m68k_op_andi_16_ix, + m68k_op_andi_16_aw, m68k_op_andi_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_andi_16_tos, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_andi_32_d, m68k_op_andi_32_d, m68k_op_andi_32_d, m68k_op_andi_32_d, m68k_op_andi_32_d, m68k_op_andi_32_d, m68k_op_andi_32_d, m68k_op_andi_32_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_andi_32_ai, m68k_op_andi_32_ai, m68k_op_andi_32_ai, m68k_op_andi_32_ai, m68k_op_andi_32_ai, m68k_op_andi_32_ai, m68k_op_andi_32_ai, m68k_op_andi_32_ai, + m68k_op_andi_32_pi, m68k_op_andi_32_pi, m68k_op_andi_32_pi, m68k_op_andi_32_pi, m68k_op_andi_32_pi, m68k_op_andi_32_pi, m68k_op_andi_32_pi, m68k_op_andi_32_pi, + m68k_op_andi_32_pd, m68k_op_andi_32_pd, m68k_op_andi_32_pd, m68k_op_andi_32_pd, m68k_op_andi_32_pd, m68k_op_andi_32_pd, m68k_op_andi_32_pd, m68k_op_andi_32_pd, + m68k_op_andi_32_di, m68k_op_andi_32_di, m68k_op_andi_32_di, m68k_op_andi_32_di, m68k_op_andi_32_di, m68k_op_andi_32_di, m68k_op_andi_32_di, m68k_op_andi_32_di, + m68k_op_andi_32_ix, m68k_op_andi_32_ix, m68k_op_andi_32_ix, m68k_op_andi_32_ix, m68k_op_andi_32_ix, m68k_op_andi_32_ix, m68k_op_andi_32_ix, m68k_op_andi_32_ix, + m68k_op_andi_32_aw, m68k_op_andi_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, + m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, + m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, + m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi7, + m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd7, + m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, + m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, + m68k_op_btst_8_r_aw, m68k_op_btst_8_r_al, m68k_op_btst_8_r_pcdi, m68k_op_btst_8_r_pcix, m68k_op_btst_8_r_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, + m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, + m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, + m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi7, + m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd7, + m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, + m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, + m68k_op_bchg_8_r_aw, m68k_op_bchg_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, + m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, + m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, + m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi7, + m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd7, + m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, + m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, + m68k_op_bclr_8_r_aw, m68k_op_bclr_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, + m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, + m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, + m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi7, + m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd7, + m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, + m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, + m68k_op_bset_8_r_aw, m68k_op_bset_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subi_8_d, m68k_op_subi_8_d, m68k_op_subi_8_d, m68k_op_subi_8_d, m68k_op_subi_8_d, m68k_op_subi_8_d, m68k_op_subi_8_d, m68k_op_subi_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subi_8_ai, m68k_op_subi_8_ai, m68k_op_subi_8_ai, m68k_op_subi_8_ai, m68k_op_subi_8_ai, m68k_op_subi_8_ai, m68k_op_subi_8_ai, m68k_op_subi_8_ai, + m68k_op_subi_8_pi, m68k_op_subi_8_pi, m68k_op_subi_8_pi, m68k_op_subi_8_pi, m68k_op_subi_8_pi, m68k_op_subi_8_pi, m68k_op_subi_8_pi, m68k_op_subi_8_pi7, + m68k_op_subi_8_pd, m68k_op_subi_8_pd, m68k_op_subi_8_pd, m68k_op_subi_8_pd, m68k_op_subi_8_pd, m68k_op_subi_8_pd, m68k_op_subi_8_pd, m68k_op_subi_8_pd7, + m68k_op_subi_8_di, m68k_op_subi_8_di, m68k_op_subi_8_di, m68k_op_subi_8_di, m68k_op_subi_8_di, m68k_op_subi_8_di, m68k_op_subi_8_di, m68k_op_subi_8_di, + m68k_op_subi_8_ix, m68k_op_subi_8_ix, m68k_op_subi_8_ix, m68k_op_subi_8_ix, m68k_op_subi_8_ix, m68k_op_subi_8_ix, m68k_op_subi_8_ix, m68k_op_subi_8_ix, + m68k_op_subi_8_aw, m68k_op_subi_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subi_16_d, m68k_op_subi_16_d, m68k_op_subi_16_d, m68k_op_subi_16_d, m68k_op_subi_16_d, m68k_op_subi_16_d, m68k_op_subi_16_d, m68k_op_subi_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subi_16_ai, m68k_op_subi_16_ai, m68k_op_subi_16_ai, m68k_op_subi_16_ai, m68k_op_subi_16_ai, m68k_op_subi_16_ai, m68k_op_subi_16_ai, m68k_op_subi_16_ai, + m68k_op_subi_16_pi, m68k_op_subi_16_pi, m68k_op_subi_16_pi, m68k_op_subi_16_pi, m68k_op_subi_16_pi, m68k_op_subi_16_pi, m68k_op_subi_16_pi, m68k_op_subi_16_pi, + m68k_op_subi_16_pd, m68k_op_subi_16_pd, m68k_op_subi_16_pd, m68k_op_subi_16_pd, m68k_op_subi_16_pd, m68k_op_subi_16_pd, m68k_op_subi_16_pd, m68k_op_subi_16_pd, + m68k_op_subi_16_di, m68k_op_subi_16_di, m68k_op_subi_16_di, m68k_op_subi_16_di, m68k_op_subi_16_di, m68k_op_subi_16_di, m68k_op_subi_16_di, m68k_op_subi_16_di, + m68k_op_subi_16_ix, m68k_op_subi_16_ix, m68k_op_subi_16_ix, m68k_op_subi_16_ix, m68k_op_subi_16_ix, m68k_op_subi_16_ix, m68k_op_subi_16_ix, m68k_op_subi_16_ix, + m68k_op_subi_16_aw, m68k_op_subi_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subi_32_d, m68k_op_subi_32_d, m68k_op_subi_32_d, m68k_op_subi_32_d, m68k_op_subi_32_d, m68k_op_subi_32_d, m68k_op_subi_32_d, m68k_op_subi_32_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subi_32_ai, m68k_op_subi_32_ai, m68k_op_subi_32_ai, m68k_op_subi_32_ai, m68k_op_subi_32_ai, m68k_op_subi_32_ai, m68k_op_subi_32_ai, m68k_op_subi_32_ai, + m68k_op_subi_32_pi, m68k_op_subi_32_pi, m68k_op_subi_32_pi, m68k_op_subi_32_pi, m68k_op_subi_32_pi, m68k_op_subi_32_pi, m68k_op_subi_32_pi, m68k_op_subi_32_pi, + m68k_op_subi_32_pd, m68k_op_subi_32_pd, m68k_op_subi_32_pd, m68k_op_subi_32_pd, m68k_op_subi_32_pd, m68k_op_subi_32_pd, m68k_op_subi_32_pd, m68k_op_subi_32_pd, + m68k_op_subi_32_di, m68k_op_subi_32_di, m68k_op_subi_32_di, m68k_op_subi_32_di, m68k_op_subi_32_di, m68k_op_subi_32_di, m68k_op_subi_32_di, m68k_op_subi_32_di, + m68k_op_subi_32_ix, m68k_op_subi_32_ix, m68k_op_subi_32_ix, m68k_op_subi_32_ix, m68k_op_subi_32_ix, m68k_op_subi_32_ix, m68k_op_subi_32_ix, m68k_op_subi_32_ix, + m68k_op_subi_32_aw, m68k_op_subi_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, + m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, + m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, + m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi7, + m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd7, + m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, + m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, + m68k_op_btst_8_r_aw, m68k_op_btst_8_r_al, m68k_op_btst_8_r_pcdi, m68k_op_btst_8_r_pcix, m68k_op_btst_8_r_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, + m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, + m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, + m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi7, + m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd7, + m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, + m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, + m68k_op_bchg_8_r_aw, m68k_op_bchg_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, + m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, + m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, + m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi7, + m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd7, + m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, + m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, + m68k_op_bclr_8_r_aw, m68k_op_bclr_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, + m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, + m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, + m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi7, + m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd7, + m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, + m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, + m68k_op_bset_8_r_aw, m68k_op_bset_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addi_8_d, m68k_op_addi_8_d, m68k_op_addi_8_d, m68k_op_addi_8_d, m68k_op_addi_8_d, m68k_op_addi_8_d, m68k_op_addi_8_d, m68k_op_addi_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addi_8_ai, m68k_op_addi_8_ai, m68k_op_addi_8_ai, m68k_op_addi_8_ai, m68k_op_addi_8_ai, m68k_op_addi_8_ai, m68k_op_addi_8_ai, m68k_op_addi_8_ai, + m68k_op_addi_8_pi, m68k_op_addi_8_pi, m68k_op_addi_8_pi, m68k_op_addi_8_pi, m68k_op_addi_8_pi, m68k_op_addi_8_pi, m68k_op_addi_8_pi, m68k_op_addi_8_pi7, + m68k_op_addi_8_pd, m68k_op_addi_8_pd, m68k_op_addi_8_pd, m68k_op_addi_8_pd, m68k_op_addi_8_pd, m68k_op_addi_8_pd, m68k_op_addi_8_pd, m68k_op_addi_8_pd7, + m68k_op_addi_8_di, m68k_op_addi_8_di, m68k_op_addi_8_di, m68k_op_addi_8_di, m68k_op_addi_8_di, m68k_op_addi_8_di, m68k_op_addi_8_di, m68k_op_addi_8_di, + m68k_op_addi_8_ix, m68k_op_addi_8_ix, m68k_op_addi_8_ix, m68k_op_addi_8_ix, m68k_op_addi_8_ix, m68k_op_addi_8_ix, m68k_op_addi_8_ix, m68k_op_addi_8_ix, + m68k_op_addi_8_aw, m68k_op_addi_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addi_16_d, m68k_op_addi_16_d, m68k_op_addi_16_d, m68k_op_addi_16_d, m68k_op_addi_16_d, m68k_op_addi_16_d, m68k_op_addi_16_d, m68k_op_addi_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addi_16_ai, m68k_op_addi_16_ai, m68k_op_addi_16_ai, m68k_op_addi_16_ai, m68k_op_addi_16_ai, m68k_op_addi_16_ai, m68k_op_addi_16_ai, m68k_op_addi_16_ai, + m68k_op_addi_16_pi, m68k_op_addi_16_pi, m68k_op_addi_16_pi, m68k_op_addi_16_pi, m68k_op_addi_16_pi, m68k_op_addi_16_pi, m68k_op_addi_16_pi, m68k_op_addi_16_pi, + m68k_op_addi_16_pd, m68k_op_addi_16_pd, m68k_op_addi_16_pd, m68k_op_addi_16_pd, m68k_op_addi_16_pd, m68k_op_addi_16_pd, m68k_op_addi_16_pd, m68k_op_addi_16_pd, + m68k_op_addi_16_di, m68k_op_addi_16_di, m68k_op_addi_16_di, m68k_op_addi_16_di, m68k_op_addi_16_di, m68k_op_addi_16_di, m68k_op_addi_16_di, m68k_op_addi_16_di, + m68k_op_addi_16_ix, m68k_op_addi_16_ix, m68k_op_addi_16_ix, m68k_op_addi_16_ix, m68k_op_addi_16_ix, m68k_op_addi_16_ix, m68k_op_addi_16_ix, m68k_op_addi_16_ix, + m68k_op_addi_16_aw, m68k_op_addi_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addi_32_d, m68k_op_addi_32_d, m68k_op_addi_32_d, m68k_op_addi_32_d, m68k_op_addi_32_d, m68k_op_addi_32_d, m68k_op_addi_32_d, m68k_op_addi_32_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addi_32_ai, m68k_op_addi_32_ai, m68k_op_addi_32_ai, m68k_op_addi_32_ai, m68k_op_addi_32_ai, m68k_op_addi_32_ai, m68k_op_addi_32_ai, m68k_op_addi_32_ai, + m68k_op_addi_32_pi, m68k_op_addi_32_pi, m68k_op_addi_32_pi, m68k_op_addi_32_pi, m68k_op_addi_32_pi, m68k_op_addi_32_pi, m68k_op_addi_32_pi, m68k_op_addi_32_pi, + m68k_op_addi_32_pd, m68k_op_addi_32_pd, m68k_op_addi_32_pd, m68k_op_addi_32_pd, m68k_op_addi_32_pd, m68k_op_addi_32_pd, m68k_op_addi_32_pd, m68k_op_addi_32_pd, + m68k_op_addi_32_di, m68k_op_addi_32_di, m68k_op_addi_32_di, m68k_op_addi_32_di, m68k_op_addi_32_di, m68k_op_addi_32_di, m68k_op_addi_32_di, m68k_op_addi_32_di, + m68k_op_addi_32_ix, m68k_op_addi_32_ix, m68k_op_addi_32_ix, m68k_op_addi_32_ix, m68k_op_addi_32_ix, m68k_op_addi_32_ix, m68k_op_addi_32_ix, m68k_op_addi_32_ix, + m68k_op_addi_32_aw, m68k_op_addi_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, + m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, + m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, + m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi7, + m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd7, + m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, + m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, + m68k_op_btst_8_r_aw, m68k_op_btst_8_r_al, m68k_op_btst_8_r_pcdi, m68k_op_btst_8_r_pcix, m68k_op_btst_8_r_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, + m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, + m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, + m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi7, + m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd7, + m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, + m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, + m68k_op_bchg_8_r_aw, m68k_op_bchg_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, + m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, + m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, + m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi7, + m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd7, + m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, + m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, + m68k_op_bclr_8_r_aw, m68k_op_bclr_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, + m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, + m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, + m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi7, + m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd7, + m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, + m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, + m68k_op_bset_8_r_aw, m68k_op_bset_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_btst_32_s_d, m68k_op_btst_32_s_d, m68k_op_btst_32_s_d, m68k_op_btst_32_s_d, m68k_op_btst_32_s_d, m68k_op_btst_32_s_d, m68k_op_btst_32_s_d, m68k_op_btst_32_s_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_btst_8_s_ai, m68k_op_btst_8_s_ai, m68k_op_btst_8_s_ai, m68k_op_btst_8_s_ai, m68k_op_btst_8_s_ai, m68k_op_btst_8_s_ai, m68k_op_btst_8_s_ai, m68k_op_btst_8_s_ai, + m68k_op_btst_8_s_pi, m68k_op_btst_8_s_pi, m68k_op_btst_8_s_pi, m68k_op_btst_8_s_pi, m68k_op_btst_8_s_pi, m68k_op_btst_8_s_pi, m68k_op_btst_8_s_pi, m68k_op_btst_8_s_pi7, + m68k_op_btst_8_s_pd, m68k_op_btst_8_s_pd, m68k_op_btst_8_s_pd, m68k_op_btst_8_s_pd, m68k_op_btst_8_s_pd, m68k_op_btst_8_s_pd, m68k_op_btst_8_s_pd, m68k_op_btst_8_s_pd7, + m68k_op_btst_8_s_di, m68k_op_btst_8_s_di, m68k_op_btst_8_s_di, m68k_op_btst_8_s_di, m68k_op_btst_8_s_di, m68k_op_btst_8_s_di, m68k_op_btst_8_s_di, m68k_op_btst_8_s_di, + m68k_op_btst_8_s_ix, m68k_op_btst_8_s_ix, m68k_op_btst_8_s_ix, m68k_op_btst_8_s_ix, m68k_op_btst_8_s_ix, m68k_op_btst_8_s_ix, m68k_op_btst_8_s_ix, m68k_op_btst_8_s_ix, + m68k_op_btst_8_s_aw, m68k_op_btst_8_s_al, m68k_op_btst_8_s_pcdi, m68k_op_btst_8_s_pcix, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bchg_32_s_d, m68k_op_bchg_32_s_d, m68k_op_bchg_32_s_d, m68k_op_bchg_32_s_d, m68k_op_bchg_32_s_d, m68k_op_bchg_32_s_d, m68k_op_bchg_32_s_d, m68k_op_bchg_32_s_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bchg_8_s_ai, m68k_op_bchg_8_s_ai, m68k_op_bchg_8_s_ai, m68k_op_bchg_8_s_ai, m68k_op_bchg_8_s_ai, m68k_op_bchg_8_s_ai, m68k_op_bchg_8_s_ai, m68k_op_bchg_8_s_ai, + m68k_op_bchg_8_s_pi, m68k_op_bchg_8_s_pi, m68k_op_bchg_8_s_pi, m68k_op_bchg_8_s_pi, m68k_op_bchg_8_s_pi, m68k_op_bchg_8_s_pi, m68k_op_bchg_8_s_pi, m68k_op_bchg_8_s_pi7, + m68k_op_bchg_8_s_pd, m68k_op_bchg_8_s_pd, m68k_op_bchg_8_s_pd, m68k_op_bchg_8_s_pd, m68k_op_bchg_8_s_pd, m68k_op_bchg_8_s_pd, m68k_op_bchg_8_s_pd, m68k_op_bchg_8_s_pd7, + m68k_op_bchg_8_s_di, m68k_op_bchg_8_s_di, m68k_op_bchg_8_s_di, m68k_op_bchg_8_s_di, m68k_op_bchg_8_s_di, m68k_op_bchg_8_s_di, m68k_op_bchg_8_s_di, m68k_op_bchg_8_s_di, + m68k_op_bchg_8_s_ix, m68k_op_bchg_8_s_ix, m68k_op_bchg_8_s_ix, m68k_op_bchg_8_s_ix, m68k_op_bchg_8_s_ix, m68k_op_bchg_8_s_ix, m68k_op_bchg_8_s_ix, m68k_op_bchg_8_s_ix, + m68k_op_bchg_8_s_aw, m68k_op_bchg_8_s_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bclr_32_s_d, m68k_op_bclr_32_s_d, m68k_op_bclr_32_s_d, m68k_op_bclr_32_s_d, m68k_op_bclr_32_s_d, m68k_op_bclr_32_s_d, m68k_op_bclr_32_s_d, m68k_op_bclr_32_s_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bclr_8_s_ai, m68k_op_bclr_8_s_ai, m68k_op_bclr_8_s_ai, m68k_op_bclr_8_s_ai, m68k_op_bclr_8_s_ai, m68k_op_bclr_8_s_ai, m68k_op_bclr_8_s_ai, m68k_op_bclr_8_s_ai, + m68k_op_bclr_8_s_pi, m68k_op_bclr_8_s_pi, m68k_op_bclr_8_s_pi, m68k_op_bclr_8_s_pi, m68k_op_bclr_8_s_pi, m68k_op_bclr_8_s_pi, m68k_op_bclr_8_s_pi, m68k_op_bclr_8_s_pi7, + m68k_op_bclr_8_s_pd, m68k_op_bclr_8_s_pd, m68k_op_bclr_8_s_pd, m68k_op_bclr_8_s_pd, m68k_op_bclr_8_s_pd, m68k_op_bclr_8_s_pd, m68k_op_bclr_8_s_pd, m68k_op_bclr_8_s_pd7, + m68k_op_bclr_8_s_di, m68k_op_bclr_8_s_di, m68k_op_bclr_8_s_di, m68k_op_bclr_8_s_di, m68k_op_bclr_8_s_di, m68k_op_bclr_8_s_di, m68k_op_bclr_8_s_di, m68k_op_bclr_8_s_di, + m68k_op_bclr_8_s_ix, m68k_op_bclr_8_s_ix, m68k_op_bclr_8_s_ix, m68k_op_bclr_8_s_ix, m68k_op_bclr_8_s_ix, m68k_op_bclr_8_s_ix, m68k_op_bclr_8_s_ix, m68k_op_bclr_8_s_ix, + m68k_op_bclr_8_s_aw, m68k_op_bclr_8_s_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bset_32_s_d, m68k_op_bset_32_s_d, m68k_op_bset_32_s_d, m68k_op_bset_32_s_d, m68k_op_bset_32_s_d, m68k_op_bset_32_s_d, m68k_op_bset_32_s_d, m68k_op_bset_32_s_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bset_8_s_ai, m68k_op_bset_8_s_ai, m68k_op_bset_8_s_ai, m68k_op_bset_8_s_ai, m68k_op_bset_8_s_ai, m68k_op_bset_8_s_ai, m68k_op_bset_8_s_ai, m68k_op_bset_8_s_ai, + m68k_op_bset_8_s_pi, m68k_op_bset_8_s_pi, m68k_op_bset_8_s_pi, m68k_op_bset_8_s_pi, m68k_op_bset_8_s_pi, m68k_op_bset_8_s_pi, m68k_op_bset_8_s_pi, m68k_op_bset_8_s_pi7, + m68k_op_bset_8_s_pd, m68k_op_bset_8_s_pd, m68k_op_bset_8_s_pd, m68k_op_bset_8_s_pd, m68k_op_bset_8_s_pd, m68k_op_bset_8_s_pd, m68k_op_bset_8_s_pd, m68k_op_bset_8_s_pd7, + m68k_op_bset_8_s_di, m68k_op_bset_8_s_di, m68k_op_bset_8_s_di, m68k_op_bset_8_s_di, m68k_op_bset_8_s_di, m68k_op_bset_8_s_di, m68k_op_bset_8_s_di, m68k_op_bset_8_s_di, + m68k_op_bset_8_s_ix, m68k_op_bset_8_s_ix, m68k_op_bset_8_s_ix, m68k_op_bset_8_s_ix, m68k_op_bset_8_s_ix, m68k_op_bset_8_s_ix, m68k_op_bset_8_s_ix, m68k_op_bset_8_s_ix, + m68k_op_bset_8_s_aw, m68k_op_bset_8_s_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, + m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, + m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, + m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi7, + m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd7, + m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, + m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, + m68k_op_btst_8_r_aw, m68k_op_btst_8_r_al, m68k_op_btst_8_r_pcdi, m68k_op_btst_8_r_pcix, m68k_op_btst_8_r_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, + m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, + m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, + m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi7, + m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd7, + m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, + m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, + m68k_op_bchg_8_r_aw, m68k_op_bchg_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, + m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, + m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, + m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi7, + m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd7, + m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, + m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, + m68k_op_bclr_8_r_aw, m68k_op_bclr_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, + m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, + m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, + m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi7, + m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd7, + m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, + m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, + m68k_op_bset_8_r_aw, m68k_op_bset_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eori_8_d, m68k_op_eori_8_d, m68k_op_eori_8_d, m68k_op_eori_8_d, m68k_op_eori_8_d, m68k_op_eori_8_d, m68k_op_eori_8_d, m68k_op_eori_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eori_8_ai, m68k_op_eori_8_ai, m68k_op_eori_8_ai, m68k_op_eori_8_ai, m68k_op_eori_8_ai, m68k_op_eori_8_ai, m68k_op_eori_8_ai, m68k_op_eori_8_ai, + m68k_op_eori_8_pi, m68k_op_eori_8_pi, m68k_op_eori_8_pi, m68k_op_eori_8_pi, m68k_op_eori_8_pi, m68k_op_eori_8_pi, m68k_op_eori_8_pi, m68k_op_eori_8_pi7, + m68k_op_eori_8_pd, m68k_op_eori_8_pd, m68k_op_eori_8_pd, m68k_op_eori_8_pd, m68k_op_eori_8_pd, m68k_op_eori_8_pd, m68k_op_eori_8_pd, m68k_op_eori_8_pd7, + m68k_op_eori_8_di, m68k_op_eori_8_di, m68k_op_eori_8_di, m68k_op_eori_8_di, m68k_op_eori_8_di, m68k_op_eori_8_di, m68k_op_eori_8_di, m68k_op_eori_8_di, + m68k_op_eori_8_ix, m68k_op_eori_8_ix, m68k_op_eori_8_ix, m68k_op_eori_8_ix, m68k_op_eori_8_ix, m68k_op_eori_8_ix, m68k_op_eori_8_ix, m68k_op_eori_8_ix, + m68k_op_eori_8_aw, m68k_op_eori_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_eori_16_toc, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eori_16_d, m68k_op_eori_16_d, m68k_op_eori_16_d, m68k_op_eori_16_d, m68k_op_eori_16_d, m68k_op_eori_16_d, m68k_op_eori_16_d, m68k_op_eori_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eori_16_ai, m68k_op_eori_16_ai, m68k_op_eori_16_ai, m68k_op_eori_16_ai, m68k_op_eori_16_ai, m68k_op_eori_16_ai, m68k_op_eori_16_ai, m68k_op_eori_16_ai, + m68k_op_eori_16_pi, m68k_op_eori_16_pi, m68k_op_eori_16_pi, m68k_op_eori_16_pi, m68k_op_eori_16_pi, m68k_op_eori_16_pi, m68k_op_eori_16_pi, m68k_op_eori_16_pi, + m68k_op_eori_16_pd, m68k_op_eori_16_pd, m68k_op_eori_16_pd, m68k_op_eori_16_pd, m68k_op_eori_16_pd, m68k_op_eori_16_pd, m68k_op_eori_16_pd, m68k_op_eori_16_pd, + m68k_op_eori_16_di, m68k_op_eori_16_di, m68k_op_eori_16_di, m68k_op_eori_16_di, m68k_op_eori_16_di, m68k_op_eori_16_di, m68k_op_eori_16_di, m68k_op_eori_16_di, + m68k_op_eori_16_ix, m68k_op_eori_16_ix, m68k_op_eori_16_ix, m68k_op_eori_16_ix, m68k_op_eori_16_ix, m68k_op_eori_16_ix, m68k_op_eori_16_ix, m68k_op_eori_16_ix, + m68k_op_eori_16_aw, m68k_op_eori_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_eori_16_tos, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eori_32_d, m68k_op_eori_32_d, m68k_op_eori_32_d, m68k_op_eori_32_d, m68k_op_eori_32_d, m68k_op_eori_32_d, m68k_op_eori_32_d, m68k_op_eori_32_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eori_32_ai, m68k_op_eori_32_ai, m68k_op_eori_32_ai, m68k_op_eori_32_ai, m68k_op_eori_32_ai, m68k_op_eori_32_ai, m68k_op_eori_32_ai, m68k_op_eori_32_ai, + m68k_op_eori_32_pi, m68k_op_eori_32_pi, m68k_op_eori_32_pi, m68k_op_eori_32_pi, m68k_op_eori_32_pi, m68k_op_eori_32_pi, m68k_op_eori_32_pi, m68k_op_eori_32_pi, + m68k_op_eori_32_pd, m68k_op_eori_32_pd, m68k_op_eori_32_pd, m68k_op_eori_32_pd, m68k_op_eori_32_pd, m68k_op_eori_32_pd, m68k_op_eori_32_pd, m68k_op_eori_32_pd, + m68k_op_eori_32_di, m68k_op_eori_32_di, m68k_op_eori_32_di, m68k_op_eori_32_di, m68k_op_eori_32_di, m68k_op_eori_32_di, m68k_op_eori_32_di, m68k_op_eori_32_di, + m68k_op_eori_32_ix, m68k_op_eori_32_ix, m68k_op_eori_32_ix, m68k_op_eori_32_ix, m68k_op_eori_32_ix, m68k_op_eori_32_ix, m68k_op_eori_32_ix, m68k_op_eori_32_ix, + m68k_op_eori_32_aw, m68k_op_eori_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, + m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, + m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, + m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi7, + m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd7, + m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, + m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, + m68k_op_btst_8_r_aw, m68k_op_btst_8_r_al, m68k_op_btst_8_r_pcdi, m68k_op_btst_8_r_pcix, m68k_op_btst_8_r_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, + m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, + m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, + m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi7, + m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd7, + m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, + m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, + m68k_op_bchg_8_r_aw, m68k_op_bchg_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, + m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, + m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, + m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi7, + m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd7, + m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, + m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, + m68k_op_bclr_8_r_aw, m68k_op_bclr_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, + m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, + m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, + m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi7, + m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd7, + m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, + m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, + m68k_op_bset_8_r_aw, m68k_op_bset_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpi_8_d, m68k_op_cmpi_8_d, m68k_op_cmpi_8_d, m68k_op_cmpi_8_d, m68k_op_cmpi_8_d, m68k_op_cmpi_8_d, m68k_op_cmpi_8_d, m68k_op_cmpi_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpi_8_ai, m68k_op_cmpi_8_ai, m68k_op_cmpi_8_ai, m68k_op_cmpi_8_ai, m68k_op_cmpi_8_ai, m68k_op_cmpi_8_ai, m68k_op_cmpi_8_ai, m68k_op_cmpi_8_ai, + m68k_op_cmpi_8_pi, m68k_op_cmpi_8_pi, m68k_op_cmpi_8_pi, m68k_op_cmpi_8_pi, m68k_op_cmpi_8_pi, m68k_op_cmpi_8_pi, m68k_op_cmpi_8_pi, m68k_op_cmpi_8_pi7, + m68k_op_cmpi_8_pd, m68k_op_cmpi_8_pd, m68k_op_cmpi_8_pd, m68k_op_cmpi_8_pd, m68k_op_cmpi_8_pd, m68k_op_cmpi_8_pd, m68k_op_cmpi_8_pd, m68k_op_cmpi_8_pd7, + m68k_op_cmpi_8_di, m68k_op_cmpi_8_di, m68k_op_cmpi_8_di, m68k_op_cmpi_8_di, m68k_op_cmpi_8_di, m68k_op_cmpi_8_di, m68k_op_cmpi_8_di, m68k_op_cmpi_8_di, + m68k_op_cmpi_8_ix, m68k_op_cmpi_8_ix, m68k_op_cmpi_8_ix, m68k_op_cmpi_8_ix, m68k_op_cmpi_8_ix, m68k_op_cmpi_8_ix, m68k_op_cmpi_8_ix, m68k_op_cmpi_8_ix, + m68k_op_cmpi_8_aw, m68k_op_cmpi_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpi_16_d, m68k_op_cmpi_16_d, m68k_op_cmpi_16_d, m68k_op_cmpi_16_d, m68k_op_cmpi_16_d, m68k_op_cmpi_16_d, m68k_op_cmpi_16_d, m68k_op_cmpi_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpi_16_ai, m68k_op_cmpi_16_ai, m68k_op_cmpi_16_ai, m68k_op_cmpi_16_ai, m68k_op_cmpi_16_ai, m68k_op_cmpi_16_ai, m68k_op_cmpi_16_ai, m68k_op_cmpi_16_ai, + m68k_op_cmpi_16_pi, m68k_op_cmpi_16_pi, m68k_op_cmpi_16_pi, m68k_op_cmpi_16_pi, m68k_op_cmpi_16_pi, m68k_op_cmpi_16_pi, m68k_op_cmpi_16_pi, m68k_op_cmpi_16_pi, + m68k_op_cmpi_16_pd, m68k_op_cmpi_16_pd, m68k_op_cmpi_16_pd, m68k_op_cmpi_16_pd, m68k_op_cmpi_16_pd, m68k_op_cmpi_16_pd, m68k_op_cmpi_16_pd, m68k_op_cmpi_16_pd, + m68k_op_cmpi_16_di, m68k_op_cmpi_16_di, m68k_op_cmpi_16_di, m68k_op_cmpi_16_di, m68k_op_cmpi_16_di, m68k_op_cmpi_16_di, m68k_op_cmpi_16_di, m68k_op_cmpi_16_di, + m68k_op_cmpi_16_ix, m68k_op_cmpi_16_ix, m68k_op_cmpi_16_ix, m68k_op_cmpi_16_ix, m68k_op_cmpi_16_ix, m68k_op_cmpi_16_ix, m68k_op_cmpi_16_ix, m68k_op_cmpi_16_ix, + m68k_op_cmpi_16_aw, m68k_op_cmpi_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpi_32_d, m68k_op_cmpi_32_d, m68k_op_cmpi_32_d, m68k_op_cmpi_32_d, m68k_op_cmpi_32_d, m68k_op_cmpi_32_d, m68k_op_cmpi_32_d, m68k_op_cmpi_32_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpi_32_ai, m68k_op_cmpi_32_ai, m68k_op_cmpi_32_ai, m68k_op_cmpi_32_ai, m68k_op_cmpi_32_ai, m68k_op_cmpi_32_ai, m68k_op_cmpi_32_ai, m68k_op_cmpi_32_ai, + m68k_op_cmpi_32_pi, m68k_op_cmpi_32_pi, m68k_op_cmpi_32_pi, m68k_op_cmpi_32_pi, m68k_op_cmpi_32_pi, m68k_op_cmpi_32_pi, m68k_op_cmpi_32_pi, m68k_op_cmpi_32_pi, + m68k_op_cmpi_32_pd, m68k_op_cmpi_32_pd, m68k_op_cmpi_32_pd, m68k_op_cmpi_32_pd, m68k_op_cmpi_32_pd, m68k_op_cmpi_32_pd, m68k_op_cmpi_32_pd, m68k_op_cmpi_32_pd, + m68k_op_cmpi_32_di, m68k_op_cmpi_32_di, m68k_op_cmpi_32_di, m68k_op_cmpi_32_di, m68k_op_cmpi_32_di, m68k_op_cmpi_32_di, m68k_op_cmpi_32_di, m68k_op_cmpi_32_di, + m68k_op_cmpi_32_ix, m68k_op_cmpi_32_ix, m68k_op_cmpi_32_ix, m68k_op_cmpi_32_ix, m68k_op_cmpi_32_ix, m68k_op_cmpi_32_ix, m68k_op_cmpi_32_ix, m68k_op_cmpi_32_ix, + m68k_op_cmpi_32_aw, m68k_op_cmpi_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, + m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, + m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, + m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi7, + m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd7, + m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, + m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, + m68k_op_btst_8_r_aw, m68k_op_btst_8_r_al, m68k_op_btst_8_r_pcdi, m68k_op_btst_8_r_pcix, m68k_op_btst_8_r_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, + m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, + m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, + m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi7, + m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd7, + m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, + m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, + m68k_op_bchg_8_r_aw, m68k_op_bchg_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, + m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, + m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, + m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi7, + m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd7, + m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, + m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, + m68k_op_bclr_8_r_aw, m68k_op_bclr_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, + m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, + m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, + m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi7, + m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd7, + m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, + m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, + m68k_op_bset_8_r_aw, m68k_op_bset_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, m68k_op_btst_32_r_d, + m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, m68k_op_movep_16_er, + m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, m68k_op_btst_8_r_ai, + m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi, m68k_op_btst_8_r_pi7, + m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd, m68k_op_btst_8_r_pd7, + m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, m68k_op_btst_8_r_di, + m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, m68k_op_btst_8_r_ix, + m68k_op_btst_8_r_aw, m68k_op_btst_8_r_al, m68k_op_btst_8_r_pcdi, m68k_op_btst_8_r_pcix, m68k_op_btst_8_r_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, m68k_op_bchg_32_r_d, + m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, m68k_op_movep_32_er, + m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, m68k_op_bchg_8_r_ai, + m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi, m68k_op_bchg_8_r_pi7, + m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd, m68k_op_bchg_8_r_pd7, + m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, m68k_op_bchg_8_r_di, + m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, m68k_op_bchg_8_r_ix, + m68k_op_bchg_8_r_aw, m68k_op_bchg_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, m68k_op_bclr_32_r_d, + m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, m68k_op_movep_16_re, + m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, m68k_op_bclr_8_r_ai, + m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi, m68k_op_bclr_8_r_pi7, + m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd, m68k_op_bclr_8_r_pd7, + m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, m68k_op_bclr_8_r_di, + m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, m68k_op_bclr_8_r_ix, + m68k_op_bclr_8_r_aw, m68k_op_bclr_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, m68k_op_bset_32_r_d, + m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, m68k_op_movep_32_re, + m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, m68k_op_bset_8_r_ai, + m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi, m68k_op_bset_8_r_pi7, + m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd, m68k_op_bset_8_r_pd7, + m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, m68k_op_bset_8_r_di, + m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, m68k_op_bset_8_r_ix, + m68k_op_bset_8_r_aw, m68k_op_bset_8_r_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, + m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi7, + m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd7, + m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, + m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, + m68k_op_move_8_d_aw, m68k_op_move_8_d_al, m68k_op_move_8_d_pcdi, m68k_op_move_8_d_pcix, m68k_op_move_8_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, + m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi7, + m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd7, + m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, + m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, + m68k_op_move_8_ai_aw, m68k_op_move_8_ai_al, m68k_op_move_8_ai_pcdi, m68k_op_move_8_ai_pcix, m68k_op_move_8_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, + m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi7, + m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd7, + m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, + m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, + m68k_op_move_8_pi_aw, m68k_op_move_8_pi_al, m68k_op_move_8_pi_pcdi, m68k_op_move_8_pi_pcix, m68k_op_move_8_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, + m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi7, + m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd7, + m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, + m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, + m68k_op_move_8_pd_aw, m68k_op_move_8_pd_al, m68k_op_move_8_pd_pcdi, m68k_op_move_8_pd_pcix, m68k_op_move_8_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, + m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi7, + m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd7, + m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, + m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, + m68k_op_move_8_di_aw, m68k_op_move_8_di_al, m68k_op_move_8_di_pcdi, m68k_op_move_8_di_pcix, m68k_op_move_8_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, + m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi7, + m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd7, + m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, + m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, + m68k_op_move_8_ix_aw, m68k_op_move_8_ix_al, m68k_op_move_8_ix_pcdi, m68k_op_move_8_ix_pcix, m68k_op_move_8_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_aw_d, m68k_op_move_8_aw_d, m68k_op_move_8_aw_d, m68k_op_move_8_aw_d, m68k_op_move_8_aw_d, m68k_op_move_8_aw_d, m68k_op_move_8_aw_d, m68k_op_move_8_aw_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_aw_ai, m68k_op_move_8_aw_ai, m68k_op_move_8_aw_ai, m68k_op_move_8_aw_ai, m68k_op_move_8_aw_ai, m68k_op_move_8_aw_ai, m68k_op_move_8_aw_ai, m68k_op_move_8_aw_ai, + m68k_op_move_8_aw_pi, m68k_op_move_8_aw_pi, m68k_op_move_8_aw_pi, m68k_op_move_8_aw_pi, m68k_op_move_8_aw_pi, m68k_op_move_8_aw_pi, m68k_op_move_8_aw_pi, m68k_op_move_8_aw_pi7, + m68k_op_move_8_aw_pd, m68k_op_move_8_aw_pd, m68k_op_move_8_aw_pd, m68k_op_move_8_aw_pd, m68k_op_move_8_aw_pd, m68k_op_move_8_aw_pd, m68k_op_move_8_aw_pd, m68k_op_move_8_aw_pd7, + m68k_op_move_8_aw_di, m68k_op_move_8_aw_di, m68k_op_move_8_aw_di, m68k_op_move_8_aw_di, m68k_op_move_8_aw_di, m68k_op_move_8_aw_di, m68k_op_move_8_aw_di, m68k_op_move_8_aw_di, + m68k_op_move_8_aw_ix, m68k_op_move_8_aw_ix, m68k_op_move_8_aw_ix, m68k_op_move_8_aw_ix, m68k_op_move_8_aw_ix, m68k_op_move_8_aw_ix, m68k_op_move_8_aw_ix, m68k_op_move_8_aw_ix, + m68k_op_move_8_aw_aw, m68k_op_move_8_aw_al, m68k_op_move_8_aw_pcdi, m68k_op_move_8_aw_pcix, m68k_op_move_8_aw_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, + m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi7, + m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd7, + m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, + m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, + m68k_op_move_8_d_aw, m68k_op_move_8_d_al, m68k_op_move_8_d_pcdi, m68k_op_move_8_d_pcix, m68k_op_move_8_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, + m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi7, + m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd7, + m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, + m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, + m68k_op_move_8_ai_aw, m68k_op_move_8_ai_al, m68k_op_move_8_ai_pcdi, m68k_op_move_8_ai_pcix, m68k_op_move_8_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, + m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi7, + m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd7, + m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, + m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, + m68k_op_move_8_pi_aw, m68k_op_move_8_pi_al, m68k_op_move_8_pi_pcdi, m68k_op_move_8_pi_pcix, m68k_op_move_8_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, + m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi7, + m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd7, + m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, + m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, + m68k_op_move_8_pd_aw, m68k_op_move_8_pd_al, m68k_op_move_8_pd_pcdi, m68k_op_move_8_pd_pcix, m68k_op_move_8_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, + m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi7, + m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd7, + m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, + m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, + m68k_op_move_8_di_aw, m68k_op_move_8_di_al, m68k_op_move_8_di_pcdi, m68k_op_move_8_di_pcix, m68k_op_move_8_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, + m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi7, + m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd7, + m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, + m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, + m68k_op_move_8_ix_aw, m68k_op_move_8_ix_al, m68k_op_move_8_ix_pcdi, m68k_op_move_8_ix_pcix, m68k_op_move_8_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_al_d, m68k_op_move_8_al_d, m68k_op_move_8_al_d, m68k_op_move_8_al_d, m68k_op_move_8_al_d, m68k_op_move_8_al_d, m68k_op_move_8_al_d, m68k_op_move_8_al_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_al_ai, m68k_op_move_8_al_ai, m68k_op_move_8_al_ai, m68k_op_move_8_al_ai, m68k_op_move_8_al_ai, m68k_op_move_8_al_ai, m68k_op_move_8_al_ai, m68k_op_move_8_al_ai, + m68k_op_move_8_al_pi, m68k_op_move_8_al_pi, m68k_op_move_8_al_pi, m68k_op_move_8_al_pi, m68k_op_move_8_al_pi, m68k_op_move_8_al_pi, m68k_op_move_8_al_pi, m68k_op_move_8_al_pi7, + m68k_op_move_8_al_pd, m68k_op_move_8_al_pd, m68k_op_move_8_al_pd, m68k_op_move_8_al_pd, m68k_op_move_8_al_pd, m68k_op_move_8_al_pd, m68k_op_move_8_al_pd, m68k_op_move_8_al_pd7, + m68k_op_move_8_al_di, m68k_op_move_8_al_di, m68k_op_move_8_al_di, m68k_op_move_8_al_di, m68k_op_move_8_al_di, m68k_op_move_8_al_di, m68k_op_move_8_al_di, m68k_op_move_8_al_di, + m68k_op_move_8_al_ix, m68k_op_move_8_al_ix, m68k_op_move_8_al_ix, m68k_op_move_8_al_ix, m68k_op_move_8_al_ix, m68k_op_move_8_al_ix, m68k_op_move_8_al_ix, m68k_op_move_8_al_ix, + m68k_op_move_8_al_aw, m68k_op_move_8_al_al, m68k_op_move_8_al_pcdi, m68k_op_move_8_al_pcix, m68k_op_move_8_al_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, + m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi7, + m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd7, + m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, + m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, + m68k_op_move_8_d_aw, m68k_op_move_8_d_al, m68k_op_move_8_d_pcdi, m68k_op_move_8_d_pcix, m68k_op_move_8_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, + m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi7, + m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd7, + m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, + m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, + m68k_op_move_8_ai_aw, m68k_op_move_8_ai_al, m68k_op_move_8_ai_pcdi, m68k_op_move_8_ai_pcix, m68k_op_move_8_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, + m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi7, + m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd7, + m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, + m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, + m68k_op_move_8_pi_aw, m68k_op_move_8_pi_al, m68k_op_move_8_pi_pcdi, m68k_op_move_8_pi_pcix, m68k_op_move_8_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, + m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi7, + m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd7, + m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, + m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, + m68k_op_move_8_pd_aw, m68k_op_move_8_pd_al, m68k_op_move_8_pd_pcdi, m68k_op_move_8_pd_pcix, m68k_op_move_8_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, + m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi7, + m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd7, + m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, + m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, + m68k_op_move_8_di_aw, m68k_op_move_8_di_al, m68k_op_move_8_di_pcdi, m68k_op_move_8_di_pcix, m68k_op_move_8_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, + m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi7, + m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd7, + m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, + m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, + m68k_op_move_8_ix_aw, m68k_op_move_8_ix_al, m68k_op_move_8_ix_pcdi, m68k_op_move_8_ix_pcix, m68k_op_move_8_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, + m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi7, + m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd7, + m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, + m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, + m68k_op_move_8_d_aw, m68k_op_move_8_d_al, m68k_op_move_8_d_pcdi, m68k_op_move_8_d_pcix, m68k_op_move_8_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, + m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi7, + m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd7, + m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, + m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, + m68k_op_move_8_ai_aw, m68k_op_move_8_ai_al, m68k_op_move_8_ai_pcdi, m68k_op_move_8_ai_pcix, m68k_op_move_8_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, + m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi7, + m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd7, + m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, + m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, + m68k_op_move_8_pi_aw, m68k_op_move_8_pi_al, m68k_op_move_8_pi_pcdi, m68k_op_move_8_pi_pcix, m68k_op_move_8_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, + m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi7, + m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd7, + m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, + m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, + m68k_op_move_8_pd_aw, m68k_op_move_8_pd_al, m68k_op_move_8_pd_pcdi, m68k_op_move_8_pd_pcix, m68k_op_move_8_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, + m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi7, + m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd7, + m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, + m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, + m68k_op_move_8_di_aw, m68k_op_move_8_di_al, m68k_op_move_8_di_pcdi, m68k_op_move_8_di_pcix, m68k_op_move_8_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, + m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi7, + m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd7, + m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, + m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, + m68k_op_move_8_ix_aw, m68k_op_move_8_ix_al, m68k_op_move_8_ix_pcdi, m68k_op_move_8_ix_pcix, m68k_op_move_8_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, + m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi7, + m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd7, + m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, + m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, + m68k_op_move_8_d_aw, m68k_op_move_8_d_al, m68k_op_move_8_d_pcdi, m68k_op_move_8_d_pcix, m68k_op_move_8_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, + m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi7, + m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd7, + m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, + m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, + m68k_op_move_8_ai_aw, m68k_op_move_8_ai_al, m68k_op_move_8_ai_pcdi, m68k_op_move_8_ai_pcix, m68k_op_move_8_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, + m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi7, + m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd7, + m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, + m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, + m68k_op_move_8_pi_aw, m68k_op_move_8_pi_al, m68k_op_move_8_pi_pcdi, m68k_op_move_8_pi_pcix, m68k_op_move_8_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, + m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi7, + m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd7, + m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, + m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, + m68k_op_move_8_pd_aw, m68k_op_move_8_pd_al, m68k_op_move_8_pd_pcdi, m68k_op_move_8_pd_pcix, m68k_op_move_8_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, + m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi7, + m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd7, + m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, + m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, + m68k_op_move_8_di_aw, m68k_op_move_8_di_al, m68k_op_move_8_di_pcdi, m68k_op_move_8_di_pcix, m68k_op_move_8_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, + m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi7, + m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd7, + m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, + m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, + m68k_op_move_8_ix_aw, m68k_op_move_8_ix_al, m68k_op_move_8_ix_pcdi, m68k_op_move_8_ix_pcix, m68k_op_move_8_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, + m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi7, + m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd7, + m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, + m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, + m68k_op_move_8_d_aw, m68k_op_move_8_d_al, m68k_op_move_8_d_pcdi, m68k_op_move_8_d_pcix, m68k_op_move_8_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, + m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi7, + m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd7, + m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, + m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, + m68k_op_move_8_ai_aw, m68k_op_move_8_ai_al, m68k_op_move_8_ai_pcdi, m68k_op_move_8_ai_pcix, m68k_op_move_8_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, + m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi7, + m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd7, + m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, + m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, + m68k_op_move_8_pi_aw, m68k_op_move_8_pi_al, m68k_op_move_8_pi_pcdi, m68k_op_move_8_pi_pcix, m68k_op_move_8_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, + m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi7, + m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd7, + m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, + m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, + m68k_op_move_8_pd_aw, m68k_op_move_8_pd_al, m68k_op_move_8_pd_pcdi, m68k_op_move_8_pd_pcix, m68k_op_move_8_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, + m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi7, + m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd7, + m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, + m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, + m68k_op_move_8_di_aw, m68k_op_move_8_di_al, m68k_op_move_8_di_pcdi, m68k_op_move_8_di_pcix, m68k_op_move_8_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, + m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi7, + m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd7, + m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, + m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, + m68k_op_move_8_ix_aw, m68k_op_move_8_ix_al, m68k_op_move_8_ix_pcdi, m68k_op_move_8_ix_pcix, m68k_op_move_8_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, + m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi7, + m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd7, + m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, + m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, + m68k_op_move_8_d_aw, m68k_op_move_8_d_al, m68k_op_move_8_d_pcdi, m68k_op_move_8_d_pcix, m68k_op_move_8_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, + m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi7, + m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd7, + m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, + m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, + m68k_op_move_8_ai_aw, m68k_op_move_8_ai_al, m68k_op_move_8_ai_pcdi, m68k_op_move_8_ai_pcix, m68k_op_move_8_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, m68k_op_move_8_pi_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, m68k_op_move_8_pi_ai, + m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi, m68k_op_move_8_pi_pi7, + m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd, m68k_op_move_8_pi_pd7, + m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, m68k_op_move_8_pi_di, + m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, m68k_op_move_8_pi_ix, + m68k_op_move_8_pi_aw, m68k_op_move_8_pi_al, m68k_op_move_8_pi_pcdi, m68k_op_move_8_pi_pcix, m68k_op_move_8_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, m68k_op_move_8_pd_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, m68k_op_move_8_pd_ai, + m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi, m68k_op_move_8_pd_pi7, + m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd, m68k_op_move_8_pd_pd7, + m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, m68k_op_move_8_pd_di, + m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, m68k_op_move_8_pd_ix, + m68k_op_move_8_pd_aw, m68k_op_move_8_pd_al, m68k_op_move_8_pd_pcdi, m68k_op_move_8_pd_pcix, m68k_op_move_8_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, + m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi7, + m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd7, + m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, + m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, + m68k_op_move_8_di_aw, m68k_op_move_8_di_al, m68k_op_move_8_di_pcdi, m68k_op_move_8_di_pcix, m68k_op_move_8_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, + m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi7, + m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd7, + m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, + m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, + m68k_op_move_8_ix_aw, m68k_op_move_8_ix_al, m68k_op_move_8_ix_pcdi, m68k_op_move_8_ix_pcix, m68k_op_move_8_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, m68k_op_move_8_d_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, m68k_op_move_8_d_ai, + m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi, m68k_op_move_8_d_pi7, + m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd, m68k_op_move_8_d_pd7, + m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, m68k_op_move_8_d_di, + m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, m68k_op_move_8_d_ix, + m68k_op_move_8_d_aw, m68k_op_move_8_d_al, m68k_op_move_8_d_pcdi, m68k_op_move_8_d_pcix, m68k_op_move_8_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, m68k_op_move_8_ai_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, m68k_op_move_8_ai_ai, + m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi, m68k_op_move_8_ai_pi7, + m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd, m68k_op_move_8_ai_pd7, + m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, m68k_op_move_8_ai_di, + m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, m68k_op_move_8_ai_ix, + m68k_op_move_8_ai_aw, m68k_op_move_8_ai_al, m68k_op_move_8_ai_pcdi, m68k_op_move_8_ai_pcix, m68k_op_move_8_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pi7_d, m68k_op_move_8_pi7_d, m68k_op_move_8_pi7_d, m68k_op_move_8_pi7_d, m68k_op_move_8_pi7_d, m68k_op_move_8_pi7_d, m68k_op_move_8_pi7_d, m68k_op_move_8_pi7_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pi7_ai, m68k_op_move_8_pi7_ai, m68k_op_move_8_pi7_ai, m68k_op_move_8_pi7_ai, m68k_op_move_8_pi7_ai, m68k_op_move_8_pi7_ai, m68k_op_move_8_pi7_ai, m68k_op_move_8_pi7_ai, + m68k_op_move_8_pi7_pi, m68k_op_move_8_pi7_pi, m68k_op_move_8_pi7_pi, m68k_op_move_8_pi7_pi, m68k_op_move_8_pi7_pi, m68k_op_move_8_pi7_pi, m68k_op_move_8_pi7_pi, m68k_op_move_8_pi7_pi7, + m68k_op_move_8_pi7_pd, m68k_op_move_8_pi7_pd, m68k_op_move_8_pi7_pd, m68k_op_move_8_pi7_pd, m68k_op_move_8_pi7_pd, m68k_op_move_8_pi7_pd, m68k_op_move_8_pi7_pd, m68k_op_move_8_pi7_pd7, + m68k_op_move_8_pi7_di, m68k_op_move_8_pi7_di, m68k_op_move_8_pi7_di, m68k_op_move_8_pi7_di, m68k_op_move_8_pi7_di, m68k_op_move_8_pi7_di, m68k_op_move_8_pi7_di, m68k_op_move_8_pi7_di, + m68k_op_move_8_pi7_ix, m68k_op_move_8_pi7_ix, m68k_op_move_8_pi7_ix, m68k_op_move_8_pi7_ix, m68k_op_move_8_pi7_ix, m68k_op_move_8_pi7_ix, m68k_op_move_8_pi7_ix, m68k_op_move_8_pi7_ix, + m68k_op_move_8_pi7_aw, m68k_op_move_8_pi7_al, m68k_op_move_8_pi7_pcdi, m68k_op_move_8_pi7_pcix, m68k_op_move_8_pi7_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pd7_d, m68k_op_move_8_pd7_d, m68k_op_move_8_pd7_d, m68k_op_move_8_pd7_d, m68k_op_move_8_pd7_d, m68k_op_move_8_pd7_d, m68k_op_move_8_pd7_d, m68k_op_move_8_pd7_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_pd7_ai, m68k_op_move_8_pd7_ai, m68k_op_move_8_pd7_ai, m68k_op_move_8_pd7_ai, m68k_op_move_8_pd7_ai, m68k_op_move_8_pd7_ai, m68k_op_move_8_pd7_ai, m68k_op_move_8_pd7_ai, + m68k_op_move_8_pd7_pi, m68k_op_move_8_pd7_pi, m68k_op_move_8_pd7_pi, m68k_op_move_8_pd7_pi, m68k_op_move_8_pd7_pi, m68k_op_move_8_pd7_pi, m68k_op_move_8_pd7_pi, m68k_op_move_8_pd7_pi7, + m68k_op_move_8_pd7_pd, m68k_op_move_8_pd7_pd, m68k_op_move_8_pd7_pd, m68k_op_move_8_pd7_pd, m68k_op_move_8_pd7_pd, m68k_op_move_8_pd7_pd, m68k_op_move_8_pd7_pd, m68k_op_move_8_pd7_pd7, + m68k_op_move_8_pd7_di, m68k_op_move_8_pd7_di, m68k_op_move_8_pd7_di, m68k_op_move_8_pd7_di, m68k_op_move_8_pd7_di, m68k_op_move_8_pd7_di, m68k_op_move_8_pd7_di, m68k_op_move_8_pd7_di, + m68k_op_move_8_pd7_ix, m68k_op_move_8_pd7_ix, m68k_op_move_8_pd7_ix, m68k_op_move_8_pd7_ix, m68k_op_move_8_pd7_ix, m68k_op_move_8_pd7_ix, m68k_op_move_8_pd7_ix, m68k_op_move_8_pd7_ix, + m68k_op_move_8_pd7_aw, m68k_op_move_8_pd7_al, m68k_op_move_8_pd7_pcdi, m68k_op_move_8_pd7_pcix, m68k_op_move_8_pd7_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, m68k_op_move_8_di_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, m68k_op_move_8_di_ai, + m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi, m68k_op_move_8_di_pi7, + m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd, m68k_op_move_8_di_pd7, + m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, m68k_op_move_8_di_di, + m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, m68k_op_move_8_di_ix, + m68k_op_move_8_di_aw, m68k_op_move_8_di_al, m68k_op_move_8_di_pcdi, m68k_op_move_8_di_pcix, m68k_op_move_8_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, m68k_op_move_8_ix_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, m68k_op_move_8_ix_ai, + m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi, m68k_op_move_8_ix_pi7, + m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd, m68k_op_move_8_ix_pd7, + m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, m68k_op_move_8_ix_di, + m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, m68k_op_move_8_ix_ix, + m68k_op_move_8_ix_aw, m68k_op_move_8_ix_al, m68k_op_move_8_ix_pcdi, m68k_op_move_8_ix_pcix, m68k_op_move_8_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, + m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, + m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, + m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, + m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, + m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, + m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, + m68k_op_move_32_d_aw, m68k_op_move_32_d_al, m68k_op_move_32_d_pcdi, m68k_op_move_32_d_pcix, m68k_op_move_32_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, + m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, + m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, + m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, + m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, + m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, + m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, + m68k_op_movea_32_aw, m68k_op_movea_32_al, m68k_op_movea_32_pcdi, m68k_op_movea_32_pcix, m68k_op_movea_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, + m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, + m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, + m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, + m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, + m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, + m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, + m68k_op_move_32_ai_aw, m68k_op_move_32_ai_al, m68k_op_move_32_ai_pcdi, m68k_op_move_32_ai_pcix, m68k_op_move_32_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, + m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, + m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, + m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, + m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, + m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, + m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, + m68k_op_move_32_pi_aw, m68k_op_move_32_pi_al, m68k_op_move_32_pi_pcdi, m68k_op_move_32_pi_pcix, m68k_op_move_32_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, + m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, + m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, + m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, + m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, + m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, + m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, + m68k_op_move_32_pd_aw, m68k_op_move_32_pd_al, m68k_op_move_32_pd_pcdi, m68k_op_move_32_pd_pcix, m68k_op_move_32_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, + m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, + m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, + m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, + m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, + m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, + m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, + m68k_op_move_32_di_aw, m68k_op_move_32_di_al, m68k_op_move_32_di_pcdi, m68k_op_move_32_di_pcix, m68k_op_move_32_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, + m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, + m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, + m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, + m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, + m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, + m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, + m68k_op_move_32_ix_aw, m68k_op_move_32_ix_al, m68k_op_move_32_ix_pcdi, m68k_op_move_32_ix_pcix, m68k_op_move_32_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_aw_d, m68k_op_move_32_aw_d, m68k_op_move_32_aw_d, m68k_op_move_32_aw_d, m68k_op_move_32_aw_d, m68k_op_move_32_aw_d, m68k_op_move_32_aw_d, m68k_op_move_32_aw_d, + m68k_op_move_32_aw_a, m68k_op_move_32_aw_a, m68k_op_move_32_aw_a, m68k_op_move_32_aw_a, m68k_op_move_32_aw_a, m68k_op_move_32_aw_a, m68k_op_move_32_aw_a, m68k_op_move_32_aw_a, + m68k_op_move_32_aw_ai, m68k_op_move_32_aw_ai, m68k_op_move_32_aw_ai, m68k_op_move_32_aw_ai, m68k_op_move_32_aw_ai, m68k_op_move_32_aw_ai, m68k_op_move_32_aw_ai, m68k_op_move_32_aw_ai, + m68k_op_move_32_aw_pi, m68k_op_move_32_aw_pi, m68k_op_move_32_aw_pi, m68k_op_move_32_aw_pi, m68k_op_move_32_aw_pi, m68k_op_move_32_aw_pi, m68k_op_move_32_aw_pi, m68k_op_move_32_aw_pi, + m68k_op_move_32_aw_pd, m68k_op_move_32_aw_pd, m68k_op_move_32_aw_pd, m68k_op_move_32_aw_pd, m68k_op_move_32_aw_pd, m68k_op_move_32_aw_pd, m68k_op_move_32_aw_pd, m68k_op_move_32_aw_pd, + m68k_op_move_32_aw_di, m68k_op_move_32_aw_di, m68k_op_move_32_aw_di, m68k_op_move_32_aw_di, m68k_op_move_32_aw_di, m68k_op_move_32_aw_di, m68k_op_move_32_aw_di, m68k_op_move_32_aw_di, + m68k_op_move_32_aw_ix, m68k_op_move_32_aw_ix, m68k_op_move_32_aw_ix, m68k_op_move_32_aw_ix, m68k_op_move_32_aw_ix, m68k_op_move_32_aw_ix, m68k_op_move_32_aw_ix, m68k_op_move_32_aw_ix, + m68k_op_move_32_aw_aw, m68k_op_move_32_aw_al, m68k_op_move_32_aw_pcdi, m68k_op_move_32_aw_pcix, m68k_op_move_32_aw_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, + m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, + m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, + m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, + m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, + m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, + m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, + m68k_op_move_32_d_aw, m68k_op_move_32_d_al, m68k_op_move_32_d_pcdi, m68k_op_move_32_d_pcix, m68k_op_move_32_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, + m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, + m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, + m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, + m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, + m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, + m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, + m68k_op_movea_32_aw, m68k_op_movea_32_al, m68k_op_movea_32_pcdi, m68k_op_movea_32_pcix, m68k_op_movea_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, + m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, + m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, + m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, + m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, + m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, + m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, + m68k_op_move_32_ai_aw, m68k_op_move_32_ai_al, m68k_op_move_32_ai_pcdi, m68k_op_move_32_ai_pcix, m68k_op_move_32_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, + m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, + m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, + m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, + m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, + m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, + m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, + m68k_op_move_32_pi_aw, m68k_op_move_32_pi_al, m68k_op_move_32_pi_pcdi, m68k_op_move_32_pi_pcix, m68k_op_move_32_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, + m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, + m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, + m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, + m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, + m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, + m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, + m68k_op_move_32_pd_aw, m68k_op_move_32_pd_al, m68k_op_move_32_pd_pcdi, m68k_op_move_32_pd_pcix, m68k_op_move_32_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, + m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, + m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, + m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, + m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, + m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, + m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, + m68k_op_move_32_di_aw, m68k_op_move_32_di_al, m68k_op_move_32_di_pcdi, m68k_op_move_32_di_pcix, m68k_op_move_32_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, + m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, + m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, + m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, + m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, + m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, + m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, + m68k_op_move_32_ix_aw, m68k_op_move_32_ix_al, m68k_op_move_32_ix_pcdi, m68k_op_move_32_ix_pcix, m68k_op_move_32_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_al_d, m68k_op_move_32_al_d, m68k_op_move_32_al_d, m68k_op_move_32_al_d, m68k_op_move_32_al_d, m68k_op_move_32_al_d, m68k_op_move_32_al_d, m68k_op_move_32_al_d, + m68k_op_move_32_al_a, m68k_op_move_32_al_a, m68k_op_move_32_al_a, m68k_op_move_32_al_a, m68k_op_move_32_al_a, m68k_op_move_32_al_a, m68k_op_move_32_al_a, m68k_op_move_32_al_a, + m68k_op_move_32_al_ai, m68k_op_move_32_al_ai, m68k_op_move_32_al_ai, m68k_op_move_32_al_ai, m68k_op_move_32_al_ai, m68k_op_move_32_al_ai, m68k_op_move_32_al_ai, m68k_op_move_32_al_ai, + m68k_op_move_32_al_pi, m68k_op_move_32_al_pi, m68k_op_move_32_al_pi, m68k_op_move_32_al_pi, m68k_op_move_32_al_pi, m68k_op_move_32_al_pi, m68k_op_move_32_al_pi, m68k_op_move_32_al_pi, + m68k_op_move_32_al_pd, m68k_op_move_32_al_pd, m68k_op_move_32_al_pd, m68k_op_move_32_al_pd, m68k_op_move_32_al_pd, m68k_op_move_32_al_pd, m68k_op_move_32_al_pd, m68k_op_move_32_al_pd, + m68k_op_move_32_al_di, m68k_op_move_32_al_di, m68k_op_move_32_al_di, m68k_op_move_32_al_di, m68k_op_move_32_al_di, m68k_op_move_32_al_di, m68k_op_move_32_al_di, m68k_op_move_32_al_di, + m68k_op_move_32_al_ix, m68k_op_move_32_al_ix, m68k_op_move_32_al_ix, m68k_op_move_32_al_ix, m68k_op_move_32_al_ix, m68k_op_move_32_al_ix, m68k_op_move_32_al_ix, m68k_op_move_32_al_ix, + m68k_op_move_32_al_aw, m68k_op_move_32_al_al, m68k_op_move_32_al_pcdi, m68k_op_move_32_al_pcix, m68k_op_move_32_al_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, + m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, + m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, + m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, + m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, + m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, + m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, + m68k_op_move_32_d_aw, m68k_op_move_32_d_al, m68k_op_move_32_d_pcdi, m68k_op_move_32_d_pcix, m68k_op_move_32_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, + m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, + m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, + m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, + m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, + m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, + m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, + m68k_op_movea_32_aw, m68k_op_movea_32_al, m68k_op_movea_32_pcdi, m68k_op_movea_32_pcix, m68k_op_movea_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, + m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, + m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, + m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, + m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, + m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, + m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, + m68k_op_move_32_ai_aw, m68k_op_move_32_ai_al, m68k_op_move_32_ai_pcdi, m68k_op_move_32_ai_pcix, m68k_op_move_32_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, + m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, + m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, + m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, + m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, + m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, + m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, + m68k_op_move_32_pi_aw, m68k_op_move_32_pi_al, m68k_op_move_32_pi_pcdi, m68k_op_move_32_pi_pcix, m68k_op_move_32_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, + m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, + m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, + m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, + m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, + m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, + m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, + m68k_op_move_32_pd_aw, m68k_op_move_32_pd_al, m68k_op_move_32_pd_pcdi, m68k_op_move_32_pd_pcix, m68k_op_move_32_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, + m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, + m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, + m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, + m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, + m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, + m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, + m68k_op_move_32_di_aw, m68k_op_move_32_di_al, m68k_op_move_32_di_pcdi, m68k_op_move_32_di_pcix, m68k_op_move_32_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, + m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, + m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, + m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, + m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, + m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, + m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, + m68k_op_move_32_ix_aw, m68k_op_move_32_ix_al, m68k_op_move_32_ix_pcdi, m68k_op_move_32_ix_pcix, m68k_op_move_32_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, + m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, + m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, + m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, + m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, + m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, + m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, + m68k_op_move_32_d_aw, m68k_op_move_32_d_al, m68k_op_move_32_d_pcdi, m68k_op_move_32_d_pcix, m68k_op_move_32_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, + m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, + m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, + m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, + m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, + m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, + m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, + m68k_op_movea_32_aw, m68k_op_movea_32_al, m68k_op_movea_32_pcdi, m68k_op_movea_32_pcix, m68k_op_movea_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, + m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, + m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, + m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, + m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, + m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, + m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, + m68k_op_move_32_ai_aw, m68k_op_move_32_ai_al, m68k_op_move_32_ai_pcdi, m68k_op_move_32_ai_pcix, m68k_op_move_32_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, + m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, + m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, + m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, + m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, + m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, + m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, + m68k_op_move_32_pi_aw, m68k_op_move_32_pi_al, m68k_op_move_32_pi_pcdi, m68k_op_move_32_pi_pcix, m68k_op_move_32_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, + m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, + m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, + m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, + m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, + m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, + m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, + m68k_op_move_32_pd_aw, m68k_op_move_32_pd_al, m68k_op_move_32_pd_pcdi, m68k_op_move_32_pd_pcix, m68k_op_move_32_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, + m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, + m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, + m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, + m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, + m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, + m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, + m68k_op_move_32_di_aw, m68k_op_move_32_di_al, m68k_op_move_32_di_pcdi, m68k_op_move_32_di_pcix, m68k_op_move_32_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, + m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, + m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, + m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, + m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, + m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, + m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, + m68k_op_move_32_ix_aw, m68k_op_move_32_ix_al, m68k_op_move_32_ix_pcdi, m68k_op_move_32_ix_pcix, m68k_op_move_32_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, + m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, + m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, + m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, + m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, + m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, + m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, + m68k_op_move_32_d_aw, m68k_op_move_32_d_al, m68k_op_move_32_d_pcdi, m68k_op_move_32_d_pcix, m68k_op_move_32_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, + m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, + m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, + m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, + m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, + m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, + m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, + m68k_op_movea_32_aw, m68k_op_movea_32_al, m68k_op_movea_32_pcdi, m68k_op_movea_32_pcix, m68k_op_movea_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, + m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, + m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, + m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, + m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, + m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, + m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, + m68k_op_move_32_ai_aw, m68k_op_move_32_ai_al, m68k_op_move_32_ai_pcdi, m68k_op_move_32_ai_pcix, m68k_op_move_32_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, + m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, + m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, + m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, + m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, + m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, + m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, + m68k_op_move_32_pi_aw, m68k_op_move_32_pi_al, m68k_op_move_32_pi_pcdi, m68k_op_move_32_pi_pcix, m68k_op_move_32_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, + m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, + m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, + m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, + m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, + m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, + m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, + m68k_op_move_32_pd_aw, m68k_op_move_32_pd_al, m68k_op_move_32_pd_pcdi, m68k_op_move_32_pd_pcix, m68k_op_move_32_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, + m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, + m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, + m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, + m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, + m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, + m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, + m68k_op_move_32_di_aw, m68k_op_move_32_di_al, m68k_op_move_32_di_pcdi, m68k_op_move_32_di_pcix, m68k_op_move_32_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, + m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, + m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, + m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, + m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, + m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, + m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, + m68k_op_move_32_ix_aw, m68k_op_move_32_ix_al, m68k_op_move_32_ix_pcdi, m68k_op_move_32_ix_pcix, m68k_op_move_32_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, + m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, + m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, + m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, + m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, + m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, + m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, + m68k_op_move_32_d_aw, m68k_op_move_32_d_al, m68k_op_move_32_d_pcdi, m68k_op_move_32_d_pcix, m68k_op_move_32_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, + m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, + m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, + m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, + m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, + m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, + m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, + m68k_op_movea_32_aw, m68k_op_movea_32_al, m68k_op_movea_32_pcdi, m68k_op_movea_32_pcix, m68k_op_movea_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, + m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, + m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, + m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, + m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, + m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, + m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, + m68k_op_move_32_ai_aw, m68k_op_move_32_ai_al, m68k_op_move_32_ai_pcdi, m68k_op_move_32_ai_pcix, m68k_op_move_32_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, + m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, + m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, + m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, + m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, + m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, + m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, + m68k_op_move_32_pi_aw, m68k_op_move_32_pi_al, m68k_op_move_32_pi_pcdi, m68k_op_move_32_pi_pcix, m68k_op_move_32_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, + m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, + m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, + m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, + m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, + m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, + m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, + m68k_op_move_32_pd_aw, m68k_op_move_32_pd_al, m68k_op_move_32_pd_pcdi, m68k_op_move_32_pd_pcix, m68k_op_move_32_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, + m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, + m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, + m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, + m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, + m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, + m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, + m68k_op_move_32_di_aw, m68k_op_move_32_di_al, m68k_op_move_32_di_pcdi, m68k_op_move_32_di_pcix, m68k_op_move_32_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, + m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, + m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, + m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, + m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, + m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, + m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, + m68k_op_move_32_ix_aw, m68k_op_move_32_ix_al, m68k_op_move_32_ix_pcdi, m68k_op_move_32_ix_pcix, m68k_op_move_32_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, + m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, + m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, + m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, + m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, + m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, + m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, + m68k_op_move_32_d_aw, m68k_op_move_32_d_al, m68k_op_move_32_d_pcdi, m68k_op_move_32_d_pcix, m68k_op_move_32_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, + m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, + m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, + m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, + m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, + m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, + m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, + m68k_op_movea_32_aw, m68k_op_movea_32_al, m68k_op_movea_32_pcdi, m68k_op_movea_32_pcix, m68k_op_movea_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, + m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, + m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, + m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, + m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, + m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, + m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, + m68k_op_move_32_ai_aw, m68k_op_move_32_ai_al, m68k_op_move_32_ai_pcdi, m68k_op_move_32_ai_pcix, m68k_op_move_32_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, + m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, + m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, + m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, + m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, + m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, + m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, + m68k_op_move_32_pi_aw, m68k_op_move_32_pi_al, m68k_op_move_32_pi_pcdi, m68k_op_move_32_pi_pcix, m68k_op_move_32_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, + m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, + m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, + m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, + m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, + m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, + m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, + m68k_op_move_32_pd_aw, m68k_op_move_32_pd_al, m68k_op_move_32_pd_pcdi, m68k_op_move_32_pd_pcix, m68k_op_move_32_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, + m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, + m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, + m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, + m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, + m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, + m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, + m68k_op_move_32_di_aw, m68k_op_move_32_di_al, m68k_op_move_32_di_pcdi, m68k_op_move_32_di_pcix, m68k_op_move_32_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, + m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, + m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, + m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, + m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, + m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, + m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, + m68k_op_move_32_ix_aw, m68k_op_move_32_ix_al, m68k_op_move_32_ix_pcdi, m68k_op_move_32_ix_pcix, m68k_op_move_32_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, m68k_op_move_32_d_d, + m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, m68k_op_move_32_d_a, + m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, m68k_op_move_32_d_ai, + m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, m68k_op_move_32_d_pi, + m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, m68k_op_move_32_d_pd, + m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, m68k_op_move_32_d_di, + m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, m68k_op_move_32_d_ix, + m68k_op_move_32_d_aw, m68k_op_move_32_d_al, m68k_op_move_32_d_pcdi, m68k_op_move_32_d_pcix, m68k_op_move_32_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, m68k_op_movea_32_d, + m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, m68k_op_movea_32_a, + m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, m68k_op_movea_32_ai, + m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, m68k_op_movea_32_pi, + m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, m68k_op_movea_32_pd, + m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, m68k_op_movea_32_di, + m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, m68k_op_movea_32_ix, + m68k_op_movea_32_aw, m68k_op_movea_32_al, m68k_op_movea_32_pcdi, m68k_op_movea_32_pcix, m68k_op_movea_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, m68k_op_move_32_ai_d, + m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, m68k_op_move_32_ai_a, + m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, m68k_op_move_32_ai_ai, + m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, m68k_op_move_32_ai_pi, + m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, m68k_op_move_32_ai_pd, + m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, m68k_op_move_32_ai_di, + m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, m68k_op_move_32_ai_ix, + m68k_op_move_32_ai_aw, m68k_op_move_32_ai_al, m68k_op_move_32_ai_pcdi, m68k_op_move_32_ai_pcix, m68k_op_move_32_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, m68k_op_move_32_pi_d, + m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, m68k_op_move_32_pi_a, + m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, m68k_op_move_32_pi_ai, + m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, m68k_op_move_32_pi_pi, + m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, m68k_op_move_32_pi_pd, + m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, m68k_op_move_32_pi_di, + m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, m68k_op_move_32_pi_ix, + m68k_op_move_32_pi_aw, m68k_op_move_32_pi_al, m68k_op_move_32_pi_pcdi, m68k_op_move_32_pi_pcix, m68k_op_move_32_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, m68k_op_move_32_pd_d, + m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, m68k_op_move_32_pd_a, + m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, m68k_op_move_32_pd_ai, + m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, m68k_op_move_32_pd_pi, + m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, m68k_op_move_32_pd_pd, + m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, m68k_op_move_32_pd_di, + m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, m68k_op_move_32_pd_ix, + m68k_op_move_32_pd_aw, m68k_op_move_32_pd_al, m68k_op_move_32_pd_pcdi, m68k_op_move_32_pd_pcix, m68k_op_move_32_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, m68k_op_move_32_di_d, + m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, m68k_op_move_32_di_a, + m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, m68k_op_move_32_di_ai, + m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, m68k_op_move_32_di_pi, + m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, m68k_op_move_32_di_pd, + m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, m68k_op_move_32_di_di, + m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, m68k_op_move_32_di_ix, + m68k_op_move_32_di_aw, m68k_op_move_32_di_al, m68k_op_move_32_di_pcdi, m68k_op_move_32_di_pcix, m68k_op_move_32_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, m68k_op_move_32_ix_d, + m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, m68k_op_move_32_ix_a, + m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, m68k_op_move_32_ix_ai, + m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, m68k_op_move_32_ix_pi, + m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, m68k_op_move_32_ix_pd, + m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, m68k_op_move_32_ix_di, + m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, m68k_op_move_32_ix_ix, + m68k_op_move_32_ix_aw, m68k_op_move_32_ix_al, m68k_op_move_32_ix_pcdi, m68k_op_move_32_ix_pcix, m68k_op_move_32_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, + m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, + m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, + m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, + m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, + m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, + m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, + m68k_op_move_16_d_aw, m68k_op_move_16_d_al, m68k_op_move_16_d_pcdi, m68k_op_move_16_d_pcix, m68k_op_move_16_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, + m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, + m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, + m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, + m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, + m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, + m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, + m68k_op_movea_16_aw, m68k_op_movea_16_al, m68k_op_movea_16_pcdi, m68k_op_movea_16_pcix, m68k_op_movea_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, + m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, + m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, + m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, + m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, + m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, + m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, + m68k_op_move_16_ai_aw, m68k_op_move_16_ai_al, m68k_op_move_16_ai_pcdi, m68k_op_move_16_ai_pcix, m68k_op_move_16_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, + m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, + m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, + m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, + m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, + m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, + m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, + m68k_op_move_16_pi_aw, m68k_op_move_16_pi_al, m68k_op_move_16_pi_pcdi, m68k_op_move_16_pi_pcix, m68k_op_move_16_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, + m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, + m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, + m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, + m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, + m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, + m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, + m68k_op_move_16_pd_aw, m68k_op_move_16_pd_al, m68k_op_move_16_pd_pcdi, m68k_op_move_16_pd_pcix, m68k_op_move_16_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, + m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, + m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, + m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, + m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, + m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, + m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, + m68k_op_move_16_di_aw, m68k_op_move_16_di_al, m68k_op_move_16_di_pcdi, m68k_op_move_16_di_pcix, m68k_op_move_16_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, + m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, + m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, + m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, + m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, + m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, + m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, + m68k_op_move_16_ix_aw, m68k_op_move_16_ix_al, m68k_op_move_16_ix_pcdi, m68k_op_move_16_ix_pcix, m68k_op_move_16_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_aw_d, m68k_op_move_16_aw_d, m68k_op_move_16_aw_d, m68k_op_move_16_aw_d, m68k_op_move_16_aw_d, m68k_op_move_16_aw_d, m68k_op_move_16_aw_d, m68k_op_move_16_aw_d, + m68k_op_move_16_aw_a, m68k_op_move_16_aw_a, m68k_op_move_16_aw_a, m68k_op_move_16_aw_a, m68k_op_move_16_aw_a, m68k_op_move_16_aw_a, m68k_op_move_16_aw_a, m68k_op_move_16_aw_a, + m68k_op_move_16_aw_ai, m68k_op_move_16_aw_ai, m68k_op_move_16_aw_ai, m68k_op_move_16_aw_ai, m68k_op_move_16_aw_ai, m68k_op_move_16_aw_ai, m68k_op_move_16_aw_ai, m68k_op_move_16_aw_ai, + m68k_op_move_16_aw_pi, m68k_op_move_16_aw_pi, m68k_op_move_16_aw_pi, m68k_op_move_16_aw_pi, m68k_op_move_16_aw_pi, m68k_op_move_16_aw_pi, m68k_op_move_16_aw_pi, m68k_op_move_16_aw_pi, + m68k_op_move_16_aw_pd, m68k_op_move_16_aw_pd, m68k_op_move_16_aw_pd, m68k_op_move_16_aw_pd, m68k_op_move_16_aw_pd, m68k_op_move_16_aw_pd, m68k_op_move_16_aw_pd, m68k_op_move_16_aw_pd, + m68k_op_move_16_aw_di, m68k_op_move_16_aw_di, m68k_op_move_16_aw_di, m68k_op_move_16_aw_di, m68k_op_move_16_aw_di, m68k_op_move_16_aw_di, m68k_op_move_16_aw_di, m68k_op_move_16_aw_di, + m68k_op_move_16_aw_ix, m68k_op_move_16_aw_ix, m68k_op_move_16_aw_ix, m68k_op_move_16_aw_ix, m68k_op_move_16_aw_ix, m68k_op_move_16_aw_ix, m68k_op_move_16_aw_ix, m68k_op_move_16_aw_ix, + m68k_op_move_16_aw_aw, m68k_op_move_16_aw_al, m68k_op_move_16_aw_pcdi, m68k_op_move_16_aw_pcix, m68k_op_move_16_aw_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, + m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, + m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, + m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, + m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, + m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, + m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, + m68k_op_move_16_d_aw, m68k_op_move_16_d_al, m68k_op_move_16_d_pcdi, m68k_op_move_16_d_pcix, m68k_op_move_16_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, + m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, + m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, + m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, + m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, + m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, + m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, + m68k_op_movea_16_aw, m68k_op_movea_16_al, m68k_op_movea_16_pcdi, m68k_op_movea_16_pcix, m68k_op_movea_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, + m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, + m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, + m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, + m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, + m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, + m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, + m68k_op_move_16_ai_aw, m68k_op_move_16_ai_al, m68k_op_move_16_ai_pcdi, m68k_op_move_16_ai_pcix, m68k_op_move_16_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, + m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, + m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, + m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, + m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, + m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, + m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, + m68k_op_move_16_pi_aw, m68k_op_move_16_pi_al, m68k_op_move_16_pi_pcdi, m68k_op_move_16_pi_pcix, m68k_op_move_16_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, + m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, + m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, + m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, + m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, + m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, + m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, + m68k_op_move_16_pd_aw, m68k_op_move_16_pd_al, m68k_op_move_16_pd_pcdi, m68k_op_move_16_pd_pcix, m68k_op_move_16_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, + m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, + m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, + m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, + m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, + m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, + m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, + m68k_op_move_16_di_aw, m68k_op_move_16_di_al, m68k_op_move_16_di_pcdi, m68k_op_move_16_di_pcix, m68k_op_move_16_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, + m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, + m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, + m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, + m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, + m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, + m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, + m68k_op_move_16_ix_aw, m68k_op_move_16_ix_al, m68k_op_move_16_ix_pcdi, m68k_op_move_16_ix_pcix, m68k_op_move_16_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_al_d, m68k_op_move_16_al_d, m68k_op_move_16_al_d, m68k_op_move_16_al_d, m68k_op_move_16_al_d, m68k_op_move_16_al_d, m68k_op_move_16_al_d, m68k_op_move_16_al_d, + m68k_op_move_16_al_a, m68k_op_move_16_al_a, m68k_op_move_16_al_a, m68k_op_move_16_al_a, m68k_op_move_16_al_a, m68k_op_move_16_al_a, m68k_op_move_16_al_a, m68k_op_move_16_al_a, + m68k_op_move_16_al_ai, m68k_op_move_16_al_ai, m68k_op_move_16_al_ai, m68k_op_move_16_al_ai, m68k_op_move_16_al_ai, m68k_op_move_16_al_ai, m68k_op_move_16_al_ai, m68k_op_move_16_al_ai, + m68k_op_move_16_al_pi, m68k_op_move_16_al_pi, m68k_op_move_16_al_pi, m68k_op_move_16_al_pi, m68k_op_move_16_al_pi, m68k_op_move_16_al_pi, m68k_op_move_16_al_pi, m68k_op_move_16_al_pi, + m68k_op_move_16_al_pd, m68k_op_move_16_al_pd, m68k_op_move_16_al_pd, m68k_op_move_16_al_pd, m68k_op_move_16_al_pd, m68k_op_move_16_al_pd, m68k_op_move_16_al_pd, m68k_op_move_16_al_pd, + m68k_op_move_16_al_di, m68k_op_move_16_al_di, m68k_op_move_16_al_di, m68k_op_move_16_al_di, m68k_op_move_16_al_di, m68k_op_move_16_al_di, m68k_op_move_16_al_di, m68k_op_move_16_al_di, + m68k_op_move_16_al_ix, m68k_op_move_16_al_ix, m68k_op_move_16_al_ix, m68k_op_move_16_al_ix, m68k_op_move_16_al_ix, m68k_op_move_16_al_ix, m68k_op_move_16_al_ix, m68k_op_move_16_al_ix, + m68k_op_move_16_al_aw, m68k_op_move_16_al_al, m68k_op_move_16_al_pcdi, m68k_op_move_16_al_pcix, m68k_op_move_16_al_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, + m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, + m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, + m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, + m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, + m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, + m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, + m68k_op_move_16_d_aw, m68k_op_move_16_d_al, m68k_op_move_16_d_pcdi, m68k_op_move_16_d_pcix, m68k_op_move_16_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, + m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, + m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, + m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, + m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, + m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, + m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, + m68k_op_movea_16_aw, m68k_op_movea_16_al, m68k_op_movea_16_pcdi, m68k_op_movea_16_pcix, m68k_op_movea_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, + m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, + m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, + m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, + m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, + m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, + m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, + m68k_op_move_16_ai_aw, m68k_op_move_16_ai_al, m68k_op_move_16_ai_pcdi, m68k_op_move_16_ai_pcix, m68k_op_move_16_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, + m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, + m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, + m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, + m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, + m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, + m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, + m68k_op_move_16_pi_aw, m68k_op_move_16_pi_al, m68k_op_move_16_pi_pcdi, m68k_op_move_16_pi_pcix, m68k_op_move_16_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, + m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, + m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, + m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, + m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, + m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, + m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, + m68k_op_move_16_pd_aw, m68k_op_move_16_pd_al, m68k_op_move_16_pd_pcdi, m68k_op_move_16_pd_pcix, m68k_op_move_16_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, + m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, + m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, + m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, + m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, + m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, + m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, + m68k_op_move_16_di_aw, m68k_op_move_16_di_al, m68k_op_move_16_di_pcdi, m68k_op_move_16_di_pcix, m68k_op_move_16_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, + m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, + m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, + m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, + m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, + m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, + m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, + m68k_op_move_16_ix_aw, m68k_op_move_16_ix_al, m68k_op_move_16_ix_pcdi, m68k_op_move_16_ix_pcix, m68k_op_move_16_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, + m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, + m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, + m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, + m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, + m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, + m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, + m68k_op_move_16_d_aw, m68k_op_move_16_d_al, m68k_op_move_16_d_pcdi, m68k_op_move_16_d_pcix, m68k_op_move_16_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, + m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, + m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, + m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, + m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, + m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, + m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, + m68k_op_movea_16_aw, m68k_op_movea_16_al, m68k_op_movea_16_pcdi, m68k_op_movea_16_pcix, m68k_op_movea_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, + m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, + m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, + m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, + m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, + m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, + m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, + m68k_op_move_16_ai_aw, m68k_op_move_16_ai_al, m68k_op_move_16_ai_pcdi, m68k_op_move_16_ai_pcix, m68k_op_move_16_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, + m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, + m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, + m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, + m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, + m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, + m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, + m68k_op_move_16_pi_aw, m68k_op_move_16_pi_al, m68k_op_move_16_pi_pcdi, m68k_op_move_16_pi_pcix, m68k_op_move_16_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, + m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, + m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, + m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, + m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, + m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, + m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, + m68k_op_move_16_pd_aw, m68k_op_move_16_pd_al, m68k_op_move_16_pd_pcdi, m68k_op_move_16_pd_pcix, m68k_op_move_16_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, + m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, + m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, + m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, + m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, + m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, + m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, + m68k_op_move_16_di_aw, m68k_op_move_16_di_al, m68k_op_move_16_di_pcdi, m68k_op_move_16_di_pcix, m68k_op_move_16_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, + m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, + m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, + m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, + m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, + m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, + m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, + m68k_op_move_16_ix_aw, m68k_op_move_16_ix_al, m68k_op_move_16_ix_pcdi, m68k_op_move_16_ix_pcix, m68k_op_move_16_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, + m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, + m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, + m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, + m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, + m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, + m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, + m68k_op_move_16_d_aw, m68k_op_move_16_d_al, m68k_op_move_16_d_pcdi, m68k_op_move_16_d_pcix, m68k_op_move_16_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, + m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, + m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, + m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, + m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, + m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, + m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, + m68k_op_movea_16_aw, m68k_op_movea_16_al, m68k_op_movea_16_pcdi, m68k_op_movea_16_pcix, m68k_op_movea_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, + m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, + m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, + m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, + m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, + m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, + m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, + m68k_op_move_16_ai_aw, m68k_op_move_16_ai_al, m68k_op_move_16_ai_pcdi, m68k_op_move_16_ai_pcix, m68k_op_move_16_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, + m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, + m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, + m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, + m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, + m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, + m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, + m68k_op_move_16_pi_aw, m68k_op_move_16_pi_al, m68k_op_move_16_pi_pcdi, m68k_op_move_16_pi_pcix, m68k_op_move_16_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, + m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, + m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, + m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, + m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, + m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, + m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, + m68k_op_move_16_pd_aw, m68k_op_move_16_pd_al, m68k_op_move_16_pd_pcdi, m68k_op_move_16_pd_pcix, m68k_op_move_16_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, + m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, + m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, + m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, + m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, + m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, + m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, + m68k_op_move_16_di_aw, m68k_op_move_16_di_al, m68k_op_move_16_di_pcdi, m68k_op_move_16_di_pcix, m68k_op_move_16_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, + m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, + m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, + m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, + m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, + m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, + m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, + m68k_op_move_16_ix_aw, m68k_op_move_16_ix_al, m68k_op_move_16_ix_pcdi, m68k_op_move_16_ix_pcix, m68k_op_move_16_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, + m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, + m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, + m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, + m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, + m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, + m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, + m68k_op_move_16_d_aw, m68k_op_move_16_d_al, m68k_op_move_16_d_pcdi, m68k_op_move_16_d_pcix, m68k_op_move_16_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, + m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, + m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, + m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, + m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, + m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, + m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, + m68k_op_movea_16_aw, m68k_op_movea_16_al, m68k_op_movea_16_pcdi, m68k_op_movea_16_pcix, m68k_op_movea_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, + m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, + m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, + m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, + m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, + m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, + m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, + m68k_op_move_16_ai_aw, m68k_op_move_16_ai_al, m68k_op_move_16_ai_pcdi, m68k_op_move_16_ai_pcix, m68k_op_move_16_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, + m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, + m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, + m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, + m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, + m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, + m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, + m68k_op_move_16_pi_aw, m68k_op_move_16_pi_al, m68k_op_move_16_pi_pcdi, m68k_op_move_16_pi_pcix, m68k_op_move_16_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, + m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, + m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, + m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, + m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, + m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, + m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, + m68k_op_move_16_pd_aw, m68k_op_move_16_pd_al, m68k_op_move_16_pd_pcdi, m68k_op_move_16_pd_pcix, m68k_op_move_16_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, + m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, + m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, + m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, + m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, + m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, + m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, + m68k_op_move_16_di_aw, m68k_op_move_16_di_al, m68k_op_move_16_di_pcdi, m68k_op_move_16_di_pcix, m68k_op_move_16_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, + m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, + m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, + m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, + m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, + m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, + m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, + m68k_op_move_16_ix_aw, m68k_op_move_16_ix_al, m68k_op_move_16_ix_pcdi, m68k_op_move_16_ix_pcix, m68k_op_move_16_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, + m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, + m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, + m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, + m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, + m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, + m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, + m68k_op_move_16_d_aw, m68k_op_move_16_d_al, m68k_op_move_16_d_pcdi, m68k_op_move_16_d_pcix, m68k_op_move_16_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, + m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, + m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, + m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, + m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, + m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, + m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, + m68k_op_movea_16_aw, m68k_op_movea_16_al, m68k_op_movea_16_pcdi, m68k_op_movea_16_pcix, m68k_op_movea_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, + m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, + m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, + m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, + m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, + m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, + m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, + m68k_op_move_16_ai_aw, m68k_op_move_16_ai_al, m68k_op_move_16_ai_pcdi, m68k_op_move_16_ai_pcix, m68k_op_move_16_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, + m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, + m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, + m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, + m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, + m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, + m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, + m68k_op_move_16_pi_aw, m68k_op_move_16_pi_al, m68k_op_move_16_pi_pcdi, m68k_op_move_16_pi_pcix, m68k_op_move_16_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, + m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, + m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, + m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, + m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, + m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, + m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, + m68k_op_move_16_pd_aw, m68k_op_move_16_pd_al, m68k_op_move_16_pd_pcdi, m68k_op_move_16_pd_pcix, m68k_op_move_16_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, + m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, + m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, + m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, + m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, + m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, + m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, + m68k_op_move_16_di_aw, m68k_op_move_16_di_al, m68k_op_move_16_di_pcdi, m68k_op_move_16_di_pcix, m68k_op_move_16_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, + m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, + m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, + m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, + m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, + m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, + m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, + m68k_op_move_16_ix_aw, m68k_op_move_16_ix_al, m68k_op_move_16_ix_pcdi, m68k_op_move_16_ix_pcix, m68k_op_move_16_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, m68k_op_move_16_d_d, + m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, m68k_op_move_16_d_a, + m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, m68k_op_move_16_d_ai, + m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, m68k_op_move_16_d_pi, + m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, m68k_op_move_16_d_pd, + m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, m68k_op_move_16_d_di, + m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, m68k_op_move_16_d_ix, + m68k_op_move_16_d_aw, m68k_op_move_16_d_al, m68k_op_move_16_d_pcdi, m68k_op_move_16_d_pcix, m68k_op_move_16_d_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, m68k_op_movea_16_d, + m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, m68k_op_movea_16_a, + m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, m68k_op_movea_16_ai, + m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, m68k_op_movea_16_pi, + m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, m68k_op_movea_16_pd, + m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, m68k_op_movea_16_di, + m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, m68k_op_movea_16_ix, + m68k_op_movea_16_aw, m68k_op_movea_16_al, m68k_op_movea_16_pcdi, m68k_op_movea_16_pcix, m68k_op_movea_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, m68k_op_move_16_ai_d, + m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, m68k_op_move_16_ai_a, + m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, m68k_op_move_16_ai_ai, + m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, m68k_op_move_16_ai_pi, + m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, m68k_op_move_16_ai_pd, + m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, m68k_op_move_16_ai_di, + m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, m68k_op_move_16_ai_ix, + m68k_op_move_16_ai_aw, m68k_op_move_16_ai_al, m68k_op_move_16_ai_pcdi, m68k_op_move_16_ai_pcix, m68k_op_move_16_ai_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, m68k_op_move_16_pi_d, + m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, m68k_op_move_16_pi_a, + m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, m68k_op_move_16_pi_ai, + m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, m68k_op_move_16_pi_pi, + m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, m68k_op_move_16_pi_pd, + m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, m68k_op_move_16_pi_di, + m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, m68k_op_move_16_pi_ix, + m68k_op_move_16_pi_aw, m68k_op_move_16_pi_al, m68k_op_move_16_pi_pcdi, m68k_op_move_16_pi_pcix, m68k_op_move_16_pi_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, m68k_op_move_16_pd_d, + m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, m68k_op_move_16_pd_a, + m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, m68k_op_move_16_pd_ai, + m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, m68k_op_move_16_pd_pi, + m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, m68k_op_move_16_pd_pd, + m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, m68k_op_move_16_pd_di, + m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, m68k_op_move_16_pd_ix, + m68k_op_move_16_pd_aw, m68k_op_move_16_pd_al, m68k_op_move_16_pd_pcdi, m68k_op_move_16_pd_pcix, m68k_op_move_16_pd_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, m68k_op_move_16_di_d, + m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, m68k_op_move_16_di_a, + m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, m68k_op_move_16_di_ai, + m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, m68k_op_move_16_di_pi, + m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, m68k_op_move_16_di_pd, + m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, m68k_op_move_16_di_di, + m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, m68k_op_move_16_di_ix, + m68k_op_move_16_di_aw, m68k_op_move_16_di_al, m68k_op_move_16_di_pcdi, m68k_op_move_16_di_pcix, m68k_op_move_16_di_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, m68k_op_move_16_ix_d, + m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, m68k_op_move_16_ix_a, + m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, m68k_op_move_16_ix_ai, + m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, m68k_op_move_16_ix_pi, + m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, m68k_op_move_16_ix_pd, + m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, m68k_op_move_16_ix_di, + m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, m68k_op_move_16_ix_ix, + m68k_op_move_16_ix_aw, m68k_op_move_16_ix_al, m68k_op_move_16_ix_pcdi, m68k_op_move_16_ix_pcix, m68k_op_move_16_ix_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_negx_8_d, m68k_op_negx_8_d, m68k_op_negx_8_d, m68k_op_negx_8_d, m68k_op_negx_8_d, m68k_op_negx_8_d, m68k_op_negx_8_d, m68k_op_negx_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_negx_8_ai, m68k_op_negx_8_ai, m68k_op_negx_8_ai, m68k_op_negx_8_ai, m68k_op_negx_8_ai, m68k_op_negx_8_ai, m68k_op_negx_8_ai, m68k_op_negx_8_ai, + m68k_op_negx_8_pi, m68k_op_negx_8_pi, m68k_op_negx_8_pi, m68k_op_negx_8_pi, m68k_op_negx_8_pi, m68k_op_negx_8_pi, m68k_op_negx_8_pi, m68k_op_negx_8_pi7, + m68k_op_negx_8_pd, m68k_op_negx_8_pd, m68k_op_negx_8_pd, m68k_op_negx_8_pd, m68k_op_negx_8_pd, m68k_op_negx_8_pd, m68k_op_negx_8_pd, m68k_op_negx_8_pd7, + m68k_op_negx_8_di, m68k_op_negx_8_di, m68k_op_negx_8_di, m68k_op_negx_8_di, m68k_op_negx_8_di, m68k_op_negx_8_di, m68k_op_negx_8_di, m68k_op_negx_8_di, + m68k_op_negx_8_ix, m68k_op_negx_8_ix, m68k_op_negx_8_ix, m68k_op_negx_8_ix, m68k_op_negx_8_ix, m68k_op_negx_8_ix, m68k_op_negx_8_ix, m68k_op_negx_8_ix, + m68k_op_negx_8_aw, m68k_op_negx_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_negx_16_d, m68k_op_negx_16_d, m68k_op_negx_16_d, m68k_op_negx_16_d, m68k_op_negx_16_d, m68k_op_negx_16_d, m68k_op_negx_16_d, m68k_op_negx_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_negx_16_ai, m68k_op_negx_16_ai, m68k_op_negx_16_ai, m68k_op_negx_16_ai, m68k_op_negx_16_ai, m68k_op_negx_16_ai, m68k_op_negx_16_ai, m68k_op_negx_16_ai, + m68k_op_negx_16_pi, m68k_op_negx_16_pi, m68k_op_negx_16_pi, m68k_op_negx_16_pi, m68k_op_negx_16_pi, m68k_op_negx_16_pi, m68k_op_negx_16_pi, m68k_op_negx_16_pi, + m68k_op_negx_16_pd, m68k_op_negx_16_pd, m68k_op_negx_16_pd, m68k_op_negx_16_pd, m68k_op_negx_16_pd, m68k_op_negx_16_pd, m68k_op_negx_16_pd, m68k_op_negx_16_pd, + m68k_op_negx_16_di, m68k_op_negx_16_di, m68k_op_negx_16_di, m68k_op_negx_16_di, m68k_op_negx_16_di, m68k_op_negx_16_di, m68k_op_negx_16_di, m68k_op_negx_16_di, + m68k_op_negx_16_ix, m68k_op_negx_16_ix, m68k_op_negx_16_ix, m68k_op_negx_16_ix, m68k_op_negx_16_ix, m68k_op_negx_16_ix, m68k_op_negx_16_ix, m68k_op_negx_16_ix, + m68k_op_negx_16_aw, m68k_op_negx_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_negx_32_d, m68k_op_negx_32_d, m68k_op_negx_32_d, m68k_op_negx_32_d, m68k_op_negx_32_d, m68k_op_negx_32_d, m68k_op_negx_32_d, m68k_op_negx_32_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_negx_32_ai, m68k_op_negx_32_ai, m68k_op_negx_32_ai, m68k_op_negx_32_ai, m68k_op_negx_32_ai, m68k_op_negx_32_ai, m68k_op_negx_32_ai, m68k_op_negx_32_ai, + m68k_op_negx_32_pi, m68k_op_negx_32_pi, m68k_op_negx_32_pi, m68k_op_negx_32_pi, m68k_op_negx_32_pi, m68k_op_negx_32_pi, m68k_op_negx_32_pi, m68k_op_negx_32_pi, + m68k_op_negx_32_pd, m68k_op_negx_32_pd, m68k_op_negx_32_pd, m68k_op_negx_32_pd, m68k_op_negx_32_pd, m68k_op_negx_32_pd, m68k_op_negx_32_pd, m68k_op_negx_32_pd, + m68k_op_negx_32_di, m68k_op_negx_32_di, m68k_op_negx_32_di, m68k_op_negx_32_di, m68k_op_negx_32_di, m68k_op_negx_32_di, m68k_op_negx_32_di, m68k_op_negx_32_di, + m68k_op_negx_32_ix, m68k_op_negx_32_ix, m68k_op_negx_32_ix, m68k_op_negx_32_ix, m68k_op_negx_32_ix, m68k_op_negx_32_ix, m68k_op_negx_32_ix, m68k_op_negx_32_ix, + m68k_op_negx_32_aw, m68k_op_negx_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_frs_d, m68k_op_move_16_frs_d, m68k_op_move_16_frs_d, m68k_op_move_16_frs_d, m68k_op_move_16_frs_d, m68k_op_move_16_frs_d, m68k_op_move_16_frs_d, m68k_op_move_16_frs_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_frs_ai, m68k_op_move_16_frs_ai, m68k_op_move_16_frs_ai, m68k_op_move_16_frs_ai, m68k_op_move_16_frs_ai, m68k_op_move_16_frs_ai, m68k_op_move_16_frs_ai, m68k_op_move_16_frs_ai, + m68k_op_move_16_frs_pi, m68k_op_move_16_frs_pi, m68k_op_move_16_frs_pi, m68k_op_move_16_frs_pi, m68k_op_move_16_frs_pi, m68k_op_move_16_frs_pi, m68k_op_move_16_frs_pi, m68k_op_move_16_frs_pi, + m68k_op_move_16_frs_pd, m68k_op_move_16_frs_pd, m68k_op_move_16_frs_pd, m68k_op_move_16_frs_pd, m68k_op_move_16_frs_pd, m68k_op_move_16_frs_pd, m68k_op_move_16_frs_pd, m68k_op_move_16_frs_pd, + m68k_op_move_16_frs_di, m68k_op_move_16_frs_di, m68k_op_move_16_frs_di, m68k_op_move_16_frs_di, m68k_op_move_16_frs_di, m68k_op_move_16_frs_di, m68k_op_move_16_frs_di, m68k_op_move_16_frs_di, + m68k_op_move_16_frs_ix, m68k_op_move_16_frs_ix, m68k_op_move_16_frs_ix, m68k_op_move_16_frs_ix, m68k_op_move_16_frs_ix, m68k_op_move_16_frs_ix, m68k_op_move_16_frs_ix, m68k_op_move_16_frs_ix, + m68k_op_move_16_frs_aw, m68k_op_move_16_frs_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, + m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, + m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, + m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, + m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, + m68k_op_chk_16_aw, m68k_op_chk_16_al, m68k_op_chk_16_pcdi, m68k_op_chk_16_pcix, m68k_op_chk_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, + m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, + m68k_op_lea_32_aw, m68k_op_lea_32_al, m68k_op_lea_32_pcdi, m68k_op_lea_32_pcix, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_clr_8_d, m68k_op_clr_8_d, m68k_op_clr_8_d, m68k_op_clr_8_d, m68k_op_clr_8_d, m68k_op_clr_8_d, m68k_op_clr_8_d, m68k_op_clr_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_clr_8_ai, m68k_op_clr_8_ai, m68k_op_clr_8_ai, m68k_op_clr_8_ai, m68k_op_clr_8_ai, m68k_op_clr_8_ai, m68k_op_clr_8_ai, m68k_op_clr_8_ai, + m68k_op_clr_8_pi, m68k_op_clr_8_pi, m68k_op_clr_8_pi, m68k_op_clr_8_pi, m68k_op_clr_8_pi, m68k_op_clr_8_pi, m68k_op_clr_8_pi, m68k_op_clr_8_pi7, + m68k_op_clr_8_pd, m68k_op_clr_8_pd, m68k_op_clr_8_pd, m68k_op_clr_8_pd, m68k_op_clr_8_pd, m68k_op_clr_8_pd, m68k_op_clr_8_pd, m68k_op_clr_8_pd7, + m68k_op_clr_8_di, m68k_op_clr_8_di, m68k_op_clr_8_di, m68k_op_clr_8_di, m68k_op_clr_8_di, m68k_op_clr_8_di, m68k_op_clr_8_di, m68k_op_clr_8_di, + m68k_op_clr_8_ix, m68k_op_clr_8_ix, m68k_op_clr_8_ix, m68k_op_clr_8_ix, m68k_op_clr_8_ix, m68k_op_clr_8_ix, m68k_op_clr_8_ix, m68k_op_clr_8_ix, + m68k_op_clr_8_aw, m68k_op_clr_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_clr_16_d, m68k_op_clr_16_d, m68k_op_clr_16_d, m68k_op_clr_16_d, m68k_op_clr_16_d, m68k_op_clr_16_d, m68k_op_clr_16_d, m68k_op_clr_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_clr_16_ai, m68k_op_clr_16_ai, m68k_op_clr_16_ai, m68k_op_clr_16_ai, m68k_op_clr_16_ai, m68k_op_clr_16_ai, m68k_op_clr_16_ai, m68k_op_clr_16_ai, + m68k_op_clr_16_pi, m68k_op_clr_16_pi, m68k_op_clr_16_pi, m68k_op_clr_16_pi, m68k_op_clr_16_pi, m68k_op_clr_16_pi, m68k_op_clr_16_pi, m68k_op_clr_16_pi, + m68k_op_clr_16_pd, m68k_op_clr_16_pd, m68k_op_clr_16_pd, m68k_op_clr_16_pd, m68k_op_clr_16_pd, m68k_op_clr_16_pd, m68k_op_clr_16_pd, m68k_op_clr_16_pd, + m68k_op_clr_16_di, m68k_op_clr_16_di, m68k_op_clr_16_di, m68k_op_clr_16_di, m68k_op_clr_16_di, m68k_op_clr_16_di, m68k_op_clr_16_di, m68k_op_clr_16_di, + m68k_op_clr_16_ix, m68k_op_clr_16_ix, m68k_op_clr_16_ix, m68k_op_clr_16_ix, m68k_op_clr_16_ix, m68k_op_clr_16_ix, m68k_op_clr_16_ix, m68k_op_clr_16_ix, + m68k_op_clr_16_aw, m68k_op_clr_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_clr_32_d, m68k_op_clr_32_d, m68k_op_clr_32_d, m68k_op_clr_32_d, m68k_op_clr_32_d, m68k_op_clr_32_d, m68k_op_clr_32_d, m68k_op_clr_32_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_clr_32_ai, m68k_op_clr_32_ai, m68k_op_clr_32_ai, m68k_op_clr_32_ai, m68k_op_clr_32_ai, m68k_op_clr_32_ai, m68k_op_clr_32_ai, m68k_op_clr_32_ai, + m68k_op_clr_32_pi, m68k_op_clr_32_pi, m68k_op_clr_32_pi, m68k_op_clr_32_pi, m68k_op_clr_32_pi, m68k_op_clr_32_pi, m68k_op_clr_32_pi, m68k_op_clr_32_pi, + m68k_op_clr_32_pd, m68k_op_clr_32_pd, m68k_op_clr_32_pd, m68k_op_clr_32_pd, m68k_op_clr_32_pd, m68k_op_clr_32_pd, m68k_op_clr_32_pd, m68k_op_clr_32_pd, + m68k_op_clr_32_di, m68k_op_clr_32_di, m68k_op_clr_32_di, m68k_op_clr_32_di, m68k_op_clr_32_di, m68k_op_clr_32_di, m68k_op_clr_32_di, m68k_op_clr_32_di, + m68k_op_clr_32_ix, m68k_op_clr_32_ix, m68k_op_clr_32_ix, m68k_op_clr_32_ix, m68k_op_clr_32_ix, m68k_op_clr_32_ix, m68k_op_clr_32_ix, m68k_op_clr_32_ix, + m68k_op_clr_32_aw, m68k_op_clr_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, + m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, + m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, + m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, + m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, + m68k_op_chk_16_aw, m68k_op_chk_16_al, m68k_op_chk_16_pcdi, m68k_op_chk_16_pcix, m68k_op_chk_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, + m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, + m68k_op_lea_32_aw, m68k_op_lea_32_al, m68k_op_lea_32_pcdi, m68k_op_lea_32_pcix, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_neg_8_d, m68k_op_neg_8_d, m68k_op_neg_8_d, m68k_op_neg_8_d, m68k_op_neg_8_d, m68k_op_neg_8_d, m68k_op_neg_8_d, m68k_op_neg_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_neg_8_ai, m68k_op_neg_8_ai, m68k_op_neg_8_ai, m68k_op_neg_8_ai, m68k_op_neg_8_ai, m68k_op_neg_8_ai, m68k_op_neg_8_ai, m68k_op_neg_8_ai, + m68k_op_neg_8_pi, m68k_op_neg_8_pi, m68k_op_neg_8_pi, m68k_op_neg_8_pi, m68k_op_neg_8_pi, m68k_op_neg_8_pi, m68k_op_neg_8_pi, m68k_op_neg_8_pi7, + m68k_op_neg_8_pd, m68k_op_neg_8_pd, m68k_op_neg_8_pd, m68k_op_neg_8_pd, m68k_op_neg_8_pd, m68k_op_neg_8_pd, m68k_op_neg_8_pd, m68k_op_neg_8_pd7, + m68k_op_neg_8_di, m68k_op_neg_8_di, m68k_op_neg_8_di, m68k_op_neg_8_di, m68k_op_neg_8_di, m68k_op_neg_8_di, m68k_op_neg_8_di, m68k_op_neg_8_di, + m68k_op_neg_8_ix, m68k_op_neg_8_ix, m68k_op_neg_8_ix, m68k_op_neg_8_ix, m68k_op_neg_8_ix, m68k_op_neg_8_ix, m68k_op_neg_8_ix, m68k_op_neg_8_ix, + m68k_op_neg_8_aw, m68k_op_neg_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_neg_16_d, m68k_op_neg_16_d, m68k_op_neg_16_d, m68k_op_neg_16_d, m68k_op_neg_16_d, m68k_op_neg_16_d, m68k_op_neg_16_d, m68k_op_neg_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_neg_16_ai, m68k_op_neg_16_ai, m68k_op_neg_16_ai, m68k_op_neg_16_ai, m68k_op_neg_16_ai, m68k_op_neg_16_ai, m68k_op_neg_16_ai, m68k_op_neg_16_ai, + m68k_op_neg_16_pi, m68k_op_neg_16_pi, m68k_op_neg_16_pi, m68k_op_neg_16_pi, m68k_op_neg_16_pi, m68k_op_neg_16_pi, m68k_op_neg_16_pi, m68k_op_neg_16_pi, + m68k_op_neg_16_pd, m68k_op_neg_16_pd, m68k_op_neg_16_pd, m68k_op_neg_16_pd, m68k_op_neg_16_pd, m68k_op_neg_16_pd, m68k_op_neg_16_pd, m68k_op_neg_16_pd, + m68k_op_neg_16_di, m68k_op_neg_16_di, m68k_op_neg_16_di, m68k_op_neg_16_di, m68k_op_neg_16_di, m68k_op_neg_16_di, m68k_op_neg_16_di, m68k_op_neg_16_di, + m68k_op_neg_16_ix, m68k_op_neg_16_ix, m68k_op_neg_16_ix, m68k_op_neg_16_ix, m68k_op_neg_16_ix, m68k_op_neg_16_ix, m68k_op_neg_16_ix, m68k_op_neg_16_ix, + m68k_op_neg_16_aw, m68k_op_neg_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_neg_32_d, m68k_op_neg_32_d, m68k_op_neg_32_d, m68k_op_neg_32_d, m68k_op_neg_32_d, m68k_op_neg_32_d, m68k_op_neg_32_d, m68k_op_neg_32_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_neg_32_ai, m68k_op_neg_32_ai, m68k_op_neg_32_ai, m68k_op_neg_32_ai, m68k_op_neg_32_ai, m68k_op_neg_32_ai, m68k_op_neg_32_ai, m68k_op_neg_32_ai, + m68k_op_neg_32_pi, m68k_op_neg_32_pi, m68k_op_neg_32_pi, m68k_op_neg_32_pi, m68k_op_neg_32_pi, m68k_op_neg_32_pi, m68k_op_neg_32_pi, m68k_op_neg_32_pi, + m68k_op_neg_32_pd, m68k_op_neg_32_pd, m68k_op_neg_32_pd, m68k_op_neg_32_pd, m68k_op_neg_32_pd, m68k_op_neg_32_pd, m68k_op_neg_32_pd, m68k_op_neg_32_pd, + m68k_op_neg_32_di, m68k_op_neg_32_di, m68k_op_neg_32_di, m68k_op_neg_32_di, m68k_op_neg_32_di, m68k_op_neg_32_di, m68k_op_neg_32_di, m68k_op_neg_32_di, + m68k_op_neg_32_ix, m68k_op_neg_32_ix, m68k_op_neg_32_ix, m68k_op_neg_32_ix, m68k_op_neg_32_ix, m68k_op_neg_32_ix, m68k_op_neg_32_ix, m68k_op_neg_32_ix, + m68k_op_neg_32_aw, m68k_op_neg_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_toc_d, m68k_op_move_16_toc_d, m68k_op_move_16_toc_d, m68k_op_move_16_toc_d, m68k_op_move_16_toc_d, m68k_op_move_16_toc_d, m68k_op_move_16_toc_d, m68k_op_move_16_toc_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_toc_ai, m68k_op_move_16_toc_ai, m68k_op_move_16_toc_ai, m68k_op_move_16_toc_ai, m68k_op_move_16_toc_ai, m68k_op_move_16_toc_ai, m68k_op_move_16_toc_ai, m68k_op_move_16_toc_ai, + m68k_op_move_16_toc_pi, m68k_op_move_16_toc_pi, m68k_op_move_16_toc_pi, m68k_op_move_16_toc_pi, m68k_op_move_16_toc_pi, m68k_op_move_16_toc_pi, m68k_op_move_16_toc_pi, m68k_op_move_16_toc_pi, + m68k_op_move_16_toc_pd, m68k_op_move_16_toc_pd, m68k_op_move_16_toc_pd, m68k_op_move_16_toc_pd, m68k_op_move_16_toc_pd, m68k_op_move_16_toc_pd, m68k_op_move_16_toc_pd, m68k_op_move_16_toc_pd, + m68k_op_move_16_toc_di, m68k_op_move_16_toc_di, m68k_op_move_16_toc_di, m68k_op_move_16_toc_di, m68k_op_move_16_toc_di, m68k_op_move_16_toc_di, m68k_op_move_16_toc_di, m68k_op_move_16_toc_di, + m68k_op_move_16_toc_ix, m68k_op_move_16_toc_ix, m68k_op_move_16_toc_ix, m68k_op_move_16_toc_ix, m68k_op_move_16_toc_ix, m68k_op_move_16_toc_ix, m68k_op_move_16_toc_ix, m68k_op_move_16_toc_ix, + m68k_op_move_16_toc_aw, m68k_op_move_16_toc_al, m68k_op_move_16_toc_pcdi, m68k_op_move_16_toc_pcix, m68k_op_move_16_toc_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, + m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, + m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, + m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, + m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, + m68k_op_chk_16_aw, m68k_op_chk_16_al, m68k_op_chk_16_pcdi, m68k_op_chk_16_pcix, m68k_op_chk_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, + m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, + m68k_op_lea_32_aw, m68k_op_lea_32_al, m68k_op_lea_32_pcdi, m68k_op_lea_32_pcix, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_not_8_d, m68k_op_not_8_d, m68k_op_not_8_d, m68k_op_not_8_d, m68k_op_not_8_d, m68k_op_not_8_d, m68k_op_not_8_d, m68k_op_not_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_not_8_ai, m68k_op_not_8_ai, m68k_op_not_8_ai, m68k_op_not_8_ai, m68k_op_not_8_ai, m68k_op_not_8_ai, m68k_op_not_8_ai, m68k_op_not_8_ai, + m68k_op_not_8_pi, m68k_op_not_8_pi, m68k_op_not_8_pi, m68k_op_not_8_pi, m68k_op_not_8_pi, m68k_op_not_8_pi, m68k_op_not_8_pi, m68k_op_not_8_pi7, + m68k_op_not_8_pd, m68k_op_not_8_pd, m68k_op_not_8_pd, m68k_op_not_8_pd, m68k_op_not_8_pd, m68k_op_not_8_pd, m68k_op_not_8_pd, m68k_op_not_8_pd7, + m68k_op_not_8_di, m68k_op_not_8_di, m68k_op_not_8_di, m68k_op_not_8_di, m68k_op_not_8_di, m68k_op_not_8_di, m68k_op_not_8_di, m68k_op_not_8_di, + m68k_op_not_8_ix, m68k_op_not_8_ix, m68k_op_not_8_ix, m68k_op_not_8_ix, m68k_op_not_8_ix, m68k_op_not_8_ix, m68k_op_not_8_ix, m68k_op_not_8_ix, + m68k_op_not_8_aw, m68k_op_not_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_not_16_d, m68k_op_not_16_d, m68k_op_not_16_d, m68k_op_not_16_d, m68k_op_not_16_d, m68k_op_not_16_d, m68k_op_not_16_d, m68k_op_not_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_not_16_ai, m68k_op_not_16_ai, m68k_op_not_16_ai, m68k_op_not_16_ai, m68k_op_not_16_ai, m68k_op_not_16_ai, m68k_op_not_16_ai, m68k_op_not_16_ai, + m68k_op_not_16_pi, m68k_op_not_16_pi, m68k_op_not_16_pi, m68k_op_not_16_pi, m68k_op_not_16_pi, m68k_op_not_16_pi, m68k_op_not_16_pi, m68k_op_not_16_pi, + m68k_op_not_16_pd, m68k_op_not_16_pd, m68k_op_not_16_pd, m68k_op_not_16_pd, m68k_op_not_16_pd, m68k_op_not_16_pd, m68k_op_not_16_pd, m68k_op_not_16_pd, + m68k_op_not_16_di, m68k_op_not_16_di, m68k_op_not_16_di, m68k_op_not_16_di, m68k_op_not_16_di, m68k_op_not_16_di, m68k_op_not_16_di, m68k_op_not_16_di, + m68k_op_not_16_ix, m68k_op_not_16_ix, m68k_op_not_16_ix, m68k_op_not_16_ix, m68k_op_not_16_ix, m68k_op_not_16_ix, m68k_op_not_16_ix, m68k_op_not_16_ix, + m68k_op_not_16_aw, m68k_op_not_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_not_32_d, m68k_op_not_32_d, m68k_op_not_32_d, m68k_op_not_32_d, m68k_op_not_32_d, m68k_op_not_32_d, m68k_op_not_32_d, m68k_op_not_32_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_not_32_ai, m68k_op_not_32_ai, m68k_op_not_32_ai, m68k_op_not_32_ai, m68k_op_not_32_ai, m68k_op_not_32_ai, m68k_op_not_32_ai, m68k_op_not_32_ai, + m68k_op_not_32_pi, m68k_op_not_32_pi, m68k_op_not_32_pi, m68k_op_not_32_pi, m68k_op_not_32_pi, m68k_op_not_32_pi, m68k_op_not_32_pi, m68k_op_not_32_pi, + m68k_op_not_32_pd, m68k_op_not_32_pd, m68k_op_not_32_pd, m68k_op_not_32_pd, m68k_op_not_32_pd, m68k_op_not_32_pd, m68k_op_not_32_pd, m68k_op_not_32_pd, + m68k_op_not_32_di, m68k_op_not_32_di, m68k_op_not_32_di, m68k_op_not_32_di, m68k_op_not_32_di, m68k_op_not_32_di, m68k_op_not_32_di, m68k_op_not_32_di, + m68k_op_not_32_ix, m68k_op_not_32_ix, m68k_op_not_32_ix, m68k_op_not_32_ix, m68k_op_not_32_ix, m68k_op_not_32_ix, m68k_op_not_32_ix, m68k_op_not_32_ix, + m68k_op_not_32_aw, m68k_op_not_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_tos_d, m68k_op_move_16_tos_d, m68k_op_move_16_tos_d, m68k_op_move_16_tos_d, m68k_op_move_16_tos_d, m68k_op_move_16_tos_d, m68k_op_move_16_tos_d, m68k_op_move_16_tos_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_move_16_tos_ai, m68k_op_move_16_tos_ai, m68k_op_move_16_tos_ai, m68k_op_move_16_tos_ai, m68k_op_move_16_tos_ai, m68k_op_move_16_tos_ai, m68k_op_move_16_tos_ai, m68k_op_move_16_tos_ai, + m68k_op_move_16_tos_pi, m68k_op_move_16_tos_pi, m68k_op_move_16_tos_pi, m68k_op_move_16_tos_pi, m68k_op_move_16_tos_pi, m68k_op_move_16_tos_pi, m68k_op_move_16_tos_pi, m68k_op_move_16_tos_pi, + m68k_op_move_16_tos_pd, m68k_op_move_16_tos_pd, m68k_op_move_16_tos_pd, m68k_op_move_16_tos_pd, m68k_op_move_16_tos_pd, m68k_op_move_16_tos_pd, m68k_op_move_16_tos_pd, m68k_op_move_16_tos_pd, + m68k_op_move_16_tos_di, m68k_op_move_16_tos_di, m68k_op_move_16_tos_di, m68k_op_move_16_tos_di, m68k_op_move_16_tos_di, m68k_op_move_16_tos_di, m68k_op_move_16_tos_di, m68k_op_move_16_tos_di, + m68k_op_move_16_tos_ix, m68k_op_move_16_tos_ix, m68k_op_move_16_tos_ix, m68k_op_move_16_tos_ix, m68k_op_move_16_tos_ix, m68k_op_move_16_tos_ix, m68k_op_move_16_tos_ix, m68k_op_move_16_tos_ix, + m68k_op_move_16_tos_aw, m68k_op_move_16_tos_al, m68k_op_move_16_tos_pcdi, m68k_op_move_16_tos_pcix, m68k_op_move_16_tos_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, + m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, + m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, + m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, + m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, + m68k_op_chk_16_aw, m68k_op_chk_16_al, m68k_op_chk_16_pcdi, m68k_op_chk_16_pcix, m68k_op_chk_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, + m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, + m68k_op_lea_32_aw, m68k_op_lea_32_al, m68k_op_lea_32_pcdi, m68k_op_lea_32_pcix, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_nbcd_8_d, m68k_op_nbcd_8_d, m68k_op_nbcd_8_d, m68k_op_nbcd_8_d, m68k_op_nbcd_8_d, m68k_op_nbcd_8_d, m68k_op_nbcd_8_d, m68k_op_nbcd_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_nbcd_8_ai, m68k_op_nbcd_8_ai, m68k_op_nbcd_8_ai, m68k_op_nbcd_8_ai, m68k_op_nbcd_8_ai, m68k_op_nbcd_8_ai, m68k_op_nbcd_8_ai, m68k_op_nbcd_8_ai, + m68k_op_nbcd_8_pi, m68k_op_nbcd_8_pi, m68k_op_nbcd_8_pi, m68k_op_nbcd_8_pi, m68k_op_nbcd_8_pi, m68k_op_nbcd_8_pi, m68k_op_nbcd_8_pi, m68k_op_nbcd_8_pi7, + m68k_op_nbcd_8_pd, m68k_op_nbcd_8_pd, m68k_op_nbcd_8_pd, m68k_op_nbcd_8_pd, m68k_op_nbcd_8_pd, m68k_op_nbcd_8_pd, m68k_op_nbcd_8_pd, m68k_op_nbcd_8_pd7, + m68k_op_nbcd_8_di, m68k_op_nbcd_8_di, m68k_op_nbcd_8_di, m68k_op_nbcd_8_di, m68k_op_nbcd_8_di, m68k_op_nbcd_8_di, m68k_op_nbcd_8_di, m68k_op_nbcd_8_di, + m68k_op_nbcd_8_ix, m68k_op_nbcd_8_ix, m68k_op_nbcd_8_ix, m68k_op_nbcd_8_ix, m68k_op_nbcd_8_ix, m68k_op_nbcd_8_ix, m68k_op_nbcd_8_ix, m68k_op_nbcd_8_ix, + m68k_op_nbcd_8_aw, m68k_op_nbcd_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_swap_32, m68k_op_swap_32, m68k_op_swap_32, m68k_op_swap_32, m68k_op_swap_32, m68k_op_swap_32, m68k_op_swap_32, m68k_op_swap_32, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_pea_32_ai, m68k_op_pea_32_ai, m68k_op_pea_32_ai, m68k_op_pea_32_ai, m68k_op_pea_32_ai, m68k_op_pea_32_ai, m68k_op_pea_32_ai, m68k_op_pea_32_ai, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_pea_32_di, m68k_op_pea_32_di, m68k_op_pea_32_di, m68k_op_pea_32_di, m68k_op_pea_32_di, m68k_op_pea_32_di, m68k_op_pea_32_di, m68k_op_pea_32_di, + m68k_op_pea_32_ix, m68k_op_pea_32_ix, m68k_op_pea_32_ix, m68k_op_pea_32_ix, m68k_op_pea_32_ix, m68k_op_pea_32_ix, m68k_op_pea_32_ix, m68k_op_pea_32_ix, + m68k_op_pea_32_aw, m68k_op_pea_32_al, m68k_op_pea_32_pcdi, m68k_op_pea_32_pcix, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_ext_16, m68k_op_ext_16, m68k_op_ext_16, m68k_op_ext_16, m68k_op_ext_16, m68k_op_ext_16, m68k_op_ext_16, m68k_op_ext_16, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movem_16_re_ai, m68k_op_movem_16_re_ai, m68k_op_movem_16_re_ai, m68k_op_movem_16_re_ai, m68k_op_movem_16_re_ai, m68k_op_movem_16_re_ai, m68k_op_movem_16_re_ai, m68k_op_movem_16_re_ai, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movem_16_re_pd, m68k_op_movem_16_re_pd, m68k_op_movem_16_re_pd, m68k_op_movem_16_re_pd, m68k_op_movem_16_re_pd, m68k_op_movem_16_re_pd, m68k_op_movem_16_re_pd, m68k_op_movem_16_re_pd, + m68k_op_movem_16_re_di, m68k_op_movem_16_re_di, m68k_op_movem_16_re_di, m68k_op_movem_16_re_di, m68k_op_movem_16_re_di, m68k_op_movem_16_re_di, m68k_op_movem_16_re_di, m68k_op_movem_16_re_di, + m68k_op_movem_16_re_ix, m68k_op_movem_16_re_ix, m68k_op_movem_16_re_ix, m68k_op_movem_16_re_ix, m68k_op_movem_16_re_ix, m68k_op_movem_16_re_ix, m68k_op_movem_16_re_ix, m68k_op_movem_16_re_ix, + m68k_op_movem_16_re_aw, m68k_op_movem_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_ext_32, m68k_op_ext_32, m68k_op_ext_32, m68k_op_ext_32, m68k_op_ext_32, m68k_op_ext_32, m68k_op_ext_32, m68k_op_ext_32, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movem_32_re_ai, m68k_op_movem_32_re_ai, m68k_op_movem_32_re_ai, m68k_op_movem_32_re_ai, m68k_op_movem_32_re_ai, m68k_op_movem_32_re_ai, m68k_op_movem_32_re_ai, m68k_op_movem_32_re_ai, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movem_32_re_pd, m68k_op_movem_32_re_pd, m68k_op_movem_32_re_pd, m68k_op_movem_32_re_pd, m68k_op_movem_32_re_pd, m68k_op_movem_32_re_pd, m68k_op_movem_32_re_pd, m68k_op_movem_32_re_pd, + m68k_op_movem_32_re_di, m68k_op_movem_32_re_di, m68k_op_movem_32_re_di, m68k_op_movem_32_re_di, m68k_op_movem_32_re_di, m68k_op_movem_32_re_di, m68k_op_movem_32_re_di, m68k_op_movem_32_re_di, + m68k_op_movem_32_re_ix, m68k_op_movem_32_re_ix, m68k_op_movem_32_re_ix, m68k_op_movem_32_re_ix, m68k_op_movem_32_re_ix, m68k_op_movem_32_re_ix, m68k_op_movem_32_re_ix, m68k_op_movem_32_re_ix, + m68k_op_movem_32_re_aw, m68k_op_movem_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, + m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, + m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, + m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, + m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, + m68k_op_chk_16_aw, m68k_op_chk_16_al, m68k_op_chk_16_pcdi, m68k_op_chk_16_pcix, m68k_op_chk_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, + m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, + m68k_op_lea_32_aw, m68k_op_lea_32_al, m68k_op_lea_32_pcdi, m68k_op_lea_32_pcix, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_tst_8_d, m68k_op_tst_8_d, m68k_op_tst_8_d, m68k_op_tst_8_d, m68k_op_tst_8_d, m68k_op_tst_8_d, m68k_op_tst_8_d, m68k_op_tst_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_tst_8_ai, m68k_op_tst_8_ai, m68k_op_tst_8_ai, m68k_op_tst_8_ai, m68k_op_tst_8_ai, m68k_op_tst_8_ai, m68k_op_tst_8_ai, m68k_op_tst_8_ai, + m68k_op_tst_8_pi, m68k_op_tst_8_pi, m68k_op_tst_8_pi, m68k_op_tst_8_pi, m68k_op_tst_8_pi, m68k_op_tst_8_pi, m68k_op_tst_8_pi, m68k_op_tst_8_pi7, + m68k_op_tst_8_pd, m68k_op_tst_8_pd, m68k_op_tst_8_pd, m68k_op_tst_8_pd, m68k_op_tst_8_pd, m68k_op_tst_8_pd, m68k_op_tst_8_pd, m68k_op_tst_8_pd7, + m68k_op_tst_8_di, m68k_op_tst_8_di, m68k_op_tst_8_di, m68k_op_tst_8_di, m68k_op_tst_8_di, m68k_op_tst_8_di, m68k_op_tst_8_di, m68k_op_tst_8_di, + m68k_op_tst_8_ix, m68k_op_tst_8_ix, m68k_op_tst_8_ix, m68k_op_tst_8_ix, m68k_op_tst_8_ix, m68k_op_tst_8_ix, m68k_op_tst_8_ix, m68k_op_tst_8_ix, + m68k_op_tst_8_aw, m68k_op_tst_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_tst_16_d, m68k_op_tst_16_d, m68k_op_tst_16_d, m68k_op_tst_16_d, m68k_op_tst_16_d, m68k_op_tst_16_d, m68k_op_tst_16_d, m68k_op_tst_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_tst_16_ai, m68k_op_tst_16_ai, m68k_op_tst_16_ai, m68k_op_tst_16_ai, m68k_op_tst_16_ai, m68k_op_tst_16_ai, m68k_op_tst_16_ai, m68k_op_tst_16_ai, + m68k_op_tst_16_pi, m68k_op_tst_16_pi, m68k_op_tst_16_pi, m68k_op_tst_16_pi, m68k_op_tst_16_pi, m68k_op_tst_16_pi, m68k_op_tst_16_pi, m68k_op_tst_16_pi, + m68k_op_tst_16_pd, m68k_op_tst_16_pd, m68k_op_tst_16_pd, m68k_op_tst_16_pd, m68k_op_tst_16_pd, m68k_op_tst_16_pd, m68k_op_tst_16_pd, m68k_op_tst_16_pd, + m68k_op_tst_16_di, m68k_op_tst_16_di, m68k_op_tst_16_di, m68k_op_tst_16_di, m68k_op_tst_16_di, m68k_op_tst_16_di, m68k_op_tst_16_di, m68k_op_tst_16_di, + m68k_op_tst_16_ix, m68k_op_tst_16_ix, m68k_op_tst_16_ix, m68k_op_tst_16_ix, m68k_op_tst_16_ix, m68k_op_tst_16_ix, m68k_op_tst_16_ix, m68k_op_tst_16_ix, + m68k_op_tst_16_aw, m68k_op_tst_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_tst_32_d, m68k_op_tst_32_d, m68k_op_tst_32_d, m68k_op_tst_32_d, m68k_op_tst_32_d, m68k_op_tst_32_d, m68k_op_tst_32_d, m68k_op_tst_32_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_tst_32_ai, m68k_op_tst_32_ai, m68k_op_tst_32_ai, m68k_op_tst_32_ai, m68k_op_tst_32_ai, m68k_op_tst_32_ai, m68k_op_tst_32_ai, m68k_op_tst_32_ai, + m68k_op_tst_32_pi, m68k_op_tst_32_pi, m68k_op_tst_32_pi, m68k_op_tst_32_pi, m68k_op_tst_32_pi, m68k_op_tst_32_pi, m68k_op_tst_32_pi, m68k_op_tst_32_pi, + m68k_op_tst_32_pd, m68k_op_tst_32_pd, m68k_op_tst_32_pd, m68k_op_tst_32_pd, m68k_op_tst_32_pd, m68k_op_tst_32_pd, m68k_op_tst_32_pd, m68k_op_tst_32_pd, + m68k_op_tst_32_di, m68k_op_tst_32_di, m68k_op_tst_32_di, m68k_op_tst_32_di, m68k_op_tst_32_di, m68k_op_tst_32_di, m68k_op_tst_32_di, m68k_op_tst_32_di, + m68k_op_tst_32_ix, m68k_op_tst_32_ix, m68k_op_tst_32_ix, m68k_op_tst_32_ix, m68k_op_tst_32_ix, m68k_op_tst_32_ix, m68k_op_tst_32_ix, m68k_op_tst_32_ix, + m68k_op_tst_32_aw, m68k_op_tst_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_tas_8_d, m68k_op_tas_8_d, m68k_op_tas_8_d, m68k_op_tas_8_d, m68k_op_tas_8_d, m68k_op_tas_8_d, m68k_op_tas_8_d, m68k_op_tas_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_tas_8_ai, m68k_op_tas_8_ai, m68k_op_tas_8_ai, m68k_op_tas_8_ai, m68k_op_tas_8_ai, m68k_op_tas_8_ai, m68k_op_tas_8_ai, m68k_op_tas_8_ai, + m68k_op_tas_8_pi, m68k_op_tas_8_pi, m68k_op_tas_8_pi, m68k_op_tas_8_pi, m68k_op_tas_8_pi, m68k_op_tas_8_pi, m68k_op_tas_8_pi, m68k_op_tas_8_pi7, + m68k_op_tas_8_pd, m68k_op_tas_8_pd, m68k_op_tas_8_pd, m68k_op_tas_8_pd, m68k_op_tas_8_pd, m68k_op_tas_8_pd, m68k_op_tas_8_pd, m68k_op_tas_8_pd7, + m68k_op_tas_8_di, m68k_op_tas_8_di, m68k_op_tas_8_di, m68k_op_tas_8_di, m68k_op_tas_8_di, m68k_op_tas_8_di, m68k_op_tas_8_di, m68k_op_tas_8_di, + m68k_op_tas_8_ix, m68k_op_tas_8_ix, m68k_op_tas_8_ix, m68k_op_tas_8_ix, m68k_op_tas_8_ix, m68k_op_tas_8_ix, m68k_op_tas_8_ix, m68k_op_tas_8_ix, + m68k_op_tas_8_aw, m68k_op_tas_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, + m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, + m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, + m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, + m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, + m68k_op_chk_16_aw, m68k_op_chk_16_al, m68k_op_chk_16_pcdi, m68k_op_chk_16_pcix, m68k_op_chk_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, + m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, + m68k_op_lea_32_aw, m68k_op_lea_32_al, m68k_op_lea_32_pcdi, m68k_op_lea_32_pcix, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movem_16_er_ai, m68k_op_movem_16_er_ai, m68k_op_movem_16_er_ai, m68k_op_movem_16_er_ai, m68k_op_movem_16_er_ai, m68k_op_movem_16_er_ai, m68k_op_movem_16_er_ai, m68k_op_movem_16_er_ai, + m68k_op_movem_16_er_pi, m68k_op_movem_16_er_pi, m68k_op_movem_16_er_pi, m68k_op_movem_16_er_pi, m68k_op_movem_16_er_pi, m68k_op_movem_16_er_pi, m68k_op_movem_16_er_pi, m68k_op_movem_16_er_pi, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movem_16_er_di, m68k_op_movem_16_er_di, m68k_op_movem_16_er_di, m68k_op_movem_16_er_di, m68k_op_movem_16_er_di, m68k_op_movem_16_er_di, m68k_op_movem_16_er_di, m68k_op_movem_16_er_di, + m68k_op_movem_16_er_ix, m68k_op_movem_16_er_ix, m68k_op_movem_16_er_ix, m68k_op_movem_16_er_ix, m68k_op_movem_16_er_ix, m68k_op_movem_16_er_ix, m68k_op_movem_16_er_ix, m68k_op_movem_16_er_ix, + m68k_op_movem_16_er_aw, m68k_op_movem_16_er_al, m68k_op_movem_16_er_pcdi, m68k_op_movem_16_er_pcix, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movem_32_er_ai, m68k_op_movem_32_er_ai, m68k_op_movem_32_er_ai, m68k_op_movem_32_er_ai, m68k_op_movem_32_er_ai, m68k_op_movem_32_er_ai, m68k_op_movem_32_er_ai, m68k_op_movem_32_er_ai, + m68k_op_movem_32_er_pi, m68k_op_movem_32_er_pi, m68k_op_movem_32_er_pi, m68k_op_movem_32_er_pi, m68k_op_movem_32_er_pi, m68k_op_movem_32_er_pi, m68k_op_movem_32_er_pi, m68k_op_movem_32_er_pi, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_movem_32_er_di, m68k_op_movem_32_er_di, m68k_op_movem_32_er_di, m68k_op_movem_32_er_di, m68k_op_movem_32_er_di, m68k_op_movem_32_er_di, m68k_op_movem_32_er_di, m68k_op_movem_32_er_di, + m68k_op_movem_32_er_ix, m68k_op_movem_32_er_ix, m68k_op_movem_32_er_ix, m68k_op_movem_32_er_ix, m68k_op_movem_32_er_ix, m68k_op_movem_32_er_ix, m68k_op_movem_32_er_ix, m68k_op_movem_32_er_ix, + m68k_op_movem_32_er_aw, m68k_op_movem_32_er_al, m68k_op_movem_32_er_pcdi, m68k_op_movem_32_er_pcix, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, + m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, + m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, + m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, + m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, + m68k_op_chk_16_aw, m68k_op_chk_16_al, m68k_op_chk_16_pcdi, m68k_op_chk_16_pcix, m68k_op_chk_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, + m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, + m68k_op_lea_32_aw, m68k_op_lea_32_al, m68k_op_lea_32_pcdi, m68k_op_lea_32_pcix, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_trap, m68k_op_trap, m68k_op_trap, m68k_op_trap, m68k_op_trap, m68k_op_trap, m68k_op_trap, m68k_op_trap, + m68k_op_trap, m68k_op_trap, m68k_op_trap, m68k_op_trap, m68k_op_trap, m68k_op_trap, m68k_op_trap, m68k_op_trap, + m68k_op_link_16, m68k_op_link_16, m68k_op_link_16, m68k_op_link_16, m68k_op_link_16, m68k_op_link_16, m68k_op_link_16, m68k_op_link_16_a7, + m68k_op_unlk_32, m68k_op_unlk_32, m68k_op_unlk_32, m68k_op_unlk_32, m68k_op_unlk_32, m68k_op_unlk_32, m68k_op_unlk_32, m68k_op_unlk_32_a7, + m68k_op_move_32_tou, m68k_op_move_32_tou, m68k_op_move_32_tou, m68k_op_move_32_tou, m68k_op_move_32_tou, m68k_op_move_32_tou, m68k_op_move_32_tou, m68k_op_move_32_tou, + m68k_op_move_32_fru, m68k_op_move_32_fru, m68k_op_move_32_fru, m68k_op_move_32_fru, m68k_op_move_32_fru, m68k_op_move_32_fru, m68k_op_move_32_fru, m68k_op_move_32_fru, + m68k_op_reset, m68k_op_nop, m68k_op_stop, m68k_op_rte_32, m68k_op_illegal, m68k_op_rts_32, m68k_op_trapv, m68k_op_rtr_32, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_jsr_32_ai, m68k_op_jsr_32_ai, m68k_op_jsr_32_ai, m68k_op_jsr_32_ai, m68k_op_jsr_32_ai, m68k_op_jsr_32_ai, m68k_op_jsr_32_ai, m68k_op_jsr_32_ai, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_jsr_32_di, m68k_op_jsr_32_di, m68k_op_jsr_32_di, m68k_op_jsr_32_di, m68k_op_jsr_32_di, m68k_op_jsr_32_di, m68k_op_jsr_32_di, m68k_op_jsr_32_di, + m68k_op_jsr_32_ix, m68k_op_jsr_32_ix, m68k_op_jsr_32_ix, m68k_op_jsr_32_ix, m68k_op_jsr_32_ix, m68k_op_jsr_32_ix, m68k_op_jsr_32_ix, m68k_op_jsr_32_ix, + m68k_op_jsr_32_aw, m68k_op_jsr_32_al, m68k_op_jsr_32_pcdi, m68k_op_jsr_32_pcix, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_jmp_32_ai, m68k_op_jmp_32_ai, m68k_op_jmp_32_ai, m68k_op_jmp_32_ai, m68k_op_jmp_32_ai, m68k_op_jmp_32_ai, m68k_op_jmp_32_ai, m68k_op_jmp_32_ai, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_jmp_32_di, m68k_op_jmp_32_di, m68k_op_jmp_32_di, m68k_op_jmp_32_di, m68k_op_jmp_32_di, m68k_op_jmp_32_di, m68k_op_jmp_32_di, m68k_op_jmp_32_di, + m68k_op_jmp_32_ix, m68k_op_jmp_32_ix, m68k_op_jmp_32_ix, m68k_op_jmp_32_ix, m68k_op_jmp_32_ix, m68k_op_jmp_32_ix, m68k_op_jmp_32_ix, m68k_op_jmp_32_ix, + m68k_op_jmp_32_aw, m68k_op_jmp_32_al, m68k_op_jmp_32_pcdi, m68k_op_jmp_32_pcix, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, m68k_op_chk_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, m68k_op_chk_16_ai, + m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, m68k_op_chk_16_pi, + m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, m68k_op_chk_16_pd, + m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, m68k_op_chk_16_di, + m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, m68k_op_chk_16_ix, + m68k_op_chk_16_aw, m68k_op_chk_16_al, m68k_op_chk_16_pcdi, m68k_op_chk_16_pcix, m68k_op_chk_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, m68k_op_lea_32_ai, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, m68k_op_lea_32_di, + m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, m68k_op_lea_32_ix, + m68k_op_lea_32_aw, m68k_op_lea_32_al, m68k_op_lea_32_pcdi, m68k_op_lea_32_pcix, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, + m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi7, + m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd7, + m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, + m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, + m68k_op_addq_8_aw, m68k_op_addq_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, + m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, + m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, + m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, + m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, + m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, + m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, + m68k_op_addq_16_aw, m68k_op_addq_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, + m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, + m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, + m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, + m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, + m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, + m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, + m68k_op_addq_32_aw, m68k_op_addq_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_st_8_d, m68k_op_st_8_d, m68k_op_st_8_d, m68k_op_st_8_d, m68k_op_st_8_d, m68k_op_st_8_d, m68k_op_st_8_d, m68k_op_st_8_d, + m68k_op_dbt_16, m68k_op_dbt_16, m68k_op_dbt_16, m68k_op_dbt_16, m68k_op_dbt_16, m68k_op_dbt_16, m68k_op_dbt_16, m68k_op_dbt_16, + m68k_op_st_8_ai, m68k_op_st_8_ai, m68k_op_st_8_ai, m68k_op_st_8_ai, m68k_op_st_8_ai, m68k_op_st_8_ai, m68k_op_st_8_ai, m68k_op_st_8_ai, + m68k_op_st_8_pi, m68k_op_st_8_pi, m68k_op_st_8_pi, m68k_op_st_8_pi, m68k_op_st_8_pi, m68k_op_st_8_pi, m68k_op_st_8_pi, m68k_op_st_8_pi7, + m68k_op_st_8_pd, m68k_op_st_8_pd, m68k_op_st_8_pd, m68k_op_st_8_pd, m68k_op_st_8_pd, m68k_op_st_8_pd, m68k_op_st_8_pd, m68k_op_st_8_pd7, + m68k_op_st_8_di, m68k_op_st_8_di, m68k_op_st_8_di, m68k_op_st_8_di, m68k_op_st_8_di, m68k_op_st_8_di, m68k_op_st_8_di, m68k_op_st_8_di, + m68k_op_st_8_ix, m68k_op_st_8_ix, m68k_op_st_8_ix, m68k_op_st_8_ix, m68k_op_st_8_ix, m68k_op_st_8_ix, m68k_op_st_8_ix, m68k_op_st_8_ix, + m68k_op_st_8_aw, m68k_op_st_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, + m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi7, + m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd7, + m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, + m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, + m68k_op_subq_8_aw, m68k_op_subq_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, + m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, + m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, + m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, + m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, + m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, + m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, + m68k_op_subq_16_aw, m68k_op_subq_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, + m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, + m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, + m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, + m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, + m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, + m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, + m68k_op_subq_32_aw, m68k_op_subq_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sf_8_d, m68k_op_sf_8_d, m68k_op_sf_8_d, m68k_op_sf_8_d, m68k_op_sf_8_d, m68k_op_sf_8_d, m68k_op_sf_8_d, m68k_op_sf_8_d, + m68k_op_dbf_16, m68k_op_dbf_16, m68k_op_dbf_16, m68k_op_dbf_16, m68k_op_dbf_16, m68k_op_dbf_16, m68k_op_dbf_16, m68k_op_dbf_16, + m68k_op_sf_8_ai, m68k_op_sf_8_ai, m68k_op_sf_8_ai, m68k_op_sf_8_ai, m68k_op_sf_8_ai, m68k_op_sf_8_ai, m68k_op_sf_8_ai, m68k_op_sf_8_ai, + m68k_op_sf_8_pi, m68k_op_sf_8_pi, m68k_op_sf_8_pi, m68k_op_sf_8_pi, m68k_op_sf_8_pi, m68k_op_sf_8_pi, m68k_op_sf_8_pi, m68k_op_sf_8_pi7, + m68k_op_sf_8_pd, m68k_op_sf_8_pd, m68k_op_sf_8_pd, m68k_op_sf_8_pd, m68k_op_sf_8_pd, m68k_op_sf_8_pd, m68k_op_sf_8_pd, m68k_op_sf_8_pd7, + m68k_op_sf_8_di, m68k_op_sf_8_di, m68k_op_sf_8_di, m68k_op_sf_8_di, m68k_op_sf_8_di, m68k_op_sf_8_di, m68k_op_sf_8_di, m68k_op_sf_8_di, + m68k_op_sf_8_ix, m68k_op_sf_8_ix, m68k_op_sf_8_ix, m68k_op_sf_8_ix, m68k_op_sf_8_ix, m68k_op_sf_8_ix, m68k_op_sf_8_ix, m68k_op_sf_8_ix, + m68k_op_sf_8_aw, m68k_op_sf_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, + m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi7, + m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd7, + m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, + m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, + m68k_op_addq_8_aw, m68k_op_addq_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, + m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, + m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, + m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, + m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, + m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, + m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, + m68k_op_addq_16_aw, m68k_op_addq_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, + m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, + m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, + m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, + m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, + m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, + m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, + m68k_op_addq_32_aw, m68k_op_addq_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_shi_8_d, m68k_op_shi_8_d, m68k_op_shi_8_d, m68k_op_shi_8_d, m68k_op_shi_8_d, m68k_op_shi_8_d, m68k_op_shi_8_d, m68k_op_shi_8_d, + m68k_op_dbhi_16, m68k_op_dbhi_16, m68k_op_dbhi_16, m68k_op_dbhi_16, m68k_op_dbhi_16, m68k_op_dbhi_16, m68k_op_dbhi_16, m68k_op_dbhi_16, + m68k_op_shi_8_ai, m68k_op_shi_8_ai, m68k_op_shi_8_ai, m68k_op_shi_8_ai, m68k_op_shi_8_ai, m68k_op_shi_8_ai, m68k_op_shi_8_ai, m68k_op_shi_8_ai, + m68k_op_shi_8_pi, m68k_op_shi_8_pi, m68k_op_shi_8_pi, m68k_op_shi_8_pi, m68k_op_shi_8_pi, m68k_op_shi_8_pi, m68k_op_shi_8_pi, m68k_op_shi_8_pi7, + m68k_op_shi_8_pd, m68k_op_shi_8_pd, m68k_op_shi_8_pd, m68k_op_shi_8_pd, m68k_op_shi_8_pd, m68k_op_shi_8_pd, m68k_op_shi_8_pd, m68k_op_shi_8_pd7, + m68k_op_shi_8_di, m68k_op_shi_8_di, m68k_op_shi_8_di, m68k_op_shi_8_di, m68k_op_shi_8_di, m68k_op_shi_8_di, m68k_op_shi_8_di, m68k_op_shi_8_di, + m68k_op_shi_8_ix, m68k_op_shi_8_ix, m68k_op_shi_8_ix, m68k_op_shi_8_ix, m68k_op_shi_8_ix, m68k_op_shi_8_ix, m68k_op_shi_8_ix, m68k_op_shi_8_ix, + m68k_op_shi_8_aw, m68k_op_shi_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, + m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi7, + m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd7, + m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, + m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, + m68k_op_subq_8_aw, m68k_op_subq_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, + m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, + m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, + m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, + m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, + m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, + m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, + m68k_op_subq_16_aw, m68k_op_subq_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, + m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, + m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, + m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, + m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, + m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, + m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, + m68k_op_subq_32_aw, m68k_op_subq_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sls_8_d, m68k_op_sls_8_d, m68k_op_sls_8_d, m68k_op_sls_8_d, m68k_op_sls_8_d, m68k_op_sls_8_d, m68k_op_sls_8_d, m68k_op_sls_8_d, + m68k_op_dbls_16, m68k_op_dbls_16, m68k_op_dbls_16, m68k_op_dbls_16, m68k_op_dbls_16, m68k_op_dbls_16, m68k_op_dbls_16, m68k_op_dbls_16, + m68k_op_sls_8_ai, m68k_op_sls_8_ai, m68k_op_sls_8_ai, m68k_op_sls_8_ai, m68k_op_sls_8_ai, m68k_op_sls_8_ai, m68k_op_sls_8_ai, m68k_op_sls_8_ai, + m68k_op_sls_8_pi, m68k_op_sls_8_pi, m68k_op_sls_8_pi, m68k_op_sls_8_pi, m68k_op_sls_8_pi, m68k_op_sls_8_pi, m68k_op_sls_8_pi, m68k_op_sls_8_pi7, + m68k_op_sls_8_pd, m68k_op_sls_8_pd, m68k_op_sls_8_pd, m68k_op_sls_8_pd, m68k_op_sls_8_pd, m68k_op_sls_8_pd, m68k_op_sls_8_pd, m68k_op_sls_8_pd7, + m68k_op_sls_8_di, m68k_op_sls_8_di, m68k_op_sls_8_di, m68k_op_sls_8_di, m68k_op_sls_8_di, m68k_op_sls_8_di, m68k_op_sls_8_di, m68k_op_sls_8_di, + m68k_op_sls_8_ix, m68k_op_sls_8_ix, m68k_op_sls_8_ix, m68k_op_sls_8_ix, m68k_op_sls_8_ix, m68k_op_sls_8_ix, m68k_op_sls_8_ix, m68k_op_sls_8_ix, + m68k_op_sls_8_aw, m68k_op_sls_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, + m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi7, + m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd7, + m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, + m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, + m68k_op_addq_8_aw, m68k_op_addq_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, + m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, + m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, + m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, + m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, + m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, + m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, + m68k_op_addq_16_aw, m68k_op_addq_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, + m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, + m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, + m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, + m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, + m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, + m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, + m68k_op_addq_32_aw, m68k_op_addq_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_scc_8_d, m68k_op_scc_8_d, m68k_op_scc_8_d, m68k_op_scc_8_d, m68k_op_scc_8_d, m68k_op_scc_8_d, m68k_op_scc_8_d, m68k_op_scc_8_d, + m68k_op_dbcc_16, m68k_op_dbcc_16, m68k_op_dbcc_16, m68k_op_dbcc_16, m68k_op_dbcc_16, m68k_op_dbcc_16, m68k_op_dbcc_16, m68k_op_dbcc_16, + m68k_op_scc_8_ai, m68k_op_scc_8_ai, m68k_op_scc_8_ai, m68k_op_scc_8_ai, m68k_op_scc_8_ai, m68k_op_scc_8_ai, m68k_op_scc_8_ai, m68k_op_scc_8_ai, + m68k_op_scc_8_pi, m68k_op_scc_8_pi, m68k_op_scc_8_pi, m68k_op_scc_8_pi, m68k_op_scc_8_pi, m68k_op_scc_8_pi, m68k_op_scc_8_pi, m68k_op_scc_8_pi7, + m68k_op_scc_8_pd, m68k_op_scc_8_pd, m68k_op_scc_8_pd, m68k_op_scc_8_pd, m68k_op_scc_8_pd, m68k_op_scc_8_pd, m68k_op_scc_8_pd, m68k_op_scc_8_pd7, + m68k_op_scc_8_di, m68k_op_scc_8_di, m68k_op_scc_8_di, m68k_op_scc_8_di, m68k_op_scc_8_di, m68k_op_scc_8_di, m68k_op_scc_8_di, m68k_op_scc_8_di, + m68k_op_scc_8_ix, m68k_op_scc_8_ix, m68k_op_scc_8_ix, m68k_op_scc_8_ix, m68k_op_scc_8_ix, m68k_op_scc_8_ix, m68k_op_scc_8_ix, m68k_op_scc_8_ix, + m68k_op_scc_8_aw, m68k_op_scc_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, + m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi7, + m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd7, + m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, + m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, + m68k_op_subq_8_aw, m68k_op_subq_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, + m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, + m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, + m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, + m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, + m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, + m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, + m68k_op_subq_16_aw, m68k_op_subq_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, + m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, + m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, + m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, + m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, + m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, + m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, + m68k_op_subq_32_aw, m68k_op_subq_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_scs_8_d, m68k_op_scs_8_d, m68k_op_scs_8_d, m68k_op_scs_8_d, m68k_op_scs_8_d, m68k_op_scs_8_d, m68k_op_scs_8_d, m68k_op_scs_8_d, + m68k_op_dbcs_16, m68k_op_dbcs_16, m68k_op_dbcs_16, m68k_op_dbcs_16, m68k_op_dbcs_16, m68k_op_dbcs_16, m68k_op_dbcs_16, m68k_op_dbcs_16, + m68k_op_scs_8_ai, m68k_op_scs_8_ai, m68k_op_scs_8_ai, m68k_op_scs_8_ai, m68k_op_scs_8_ai, m68k_op_scs_8_ai, m68k_op_scs_8_ai, m68k_op_scs_8_ai, + m68k_op_scs_8_pi, m68k_op_scs_8_pi, m68k_op_scs_8_pi, m68k_op_scs_8_pi, m68k_op_scs_8_pi, m68k_op_scs_8_pi, m68k_op_scs_8_pi, m68k_op_scs_8_pi7, + m68k_op_scs_8_pd, m68k_op_scs_8_pd, m68k_op_scs_8_pd, m68k_op_scs_8_pd, m68k_op_scs_8_pd, m68k_op_scs_8_pd, m68k_op_scs_8_pd, m68k_op_scs_8_pd7, + m68k_op_scs_8_di, m68k_op_scs_8_di, m68k_op_scs_8_di, m68k_op_scs_8_di, m68k_op_scs_8_di, m68k_op_scs_8_di, m68k_op_scs_8_di, m68k_op_scs_8_di, + m68k_op_scs_8_ix, m68k_op_scs_8_ix, m68k_op_scs_8_ix, m68k_op_scs_8_ix, m68k_op_scs_8_ix, m68k_op_scs_8_ix, m68k_op_scs_8_ix, m68k_op_scs_8_ix, + m68k_op_scs_8_aw, m68k_op_scs_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, + m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi7, + m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd7, + m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, + m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, + m68k_op_addq_8_aw, m68k_op_addq_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, + m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, + m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, + m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, + m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, + m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, + m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, + m68k_op_addq_16_aw, m68k_op_addq_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, + m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, + m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, + m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, + m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, + m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, + m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, + m68k_op_addq_32_aw, m68k_op_addq_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sne_8_d, m68k_op_sne_8_d, m68k_op_sne_8_d, m68k_op_sne_8_d, m68k_op_sne_8_d, m68k_op_sne_8_d, m68k_op_sne_8_d, m68k_op_sne_8_d, + m68k_op_dbne_16, m68k_op_dbne_16, m68k_op_dbne_16, m68k_op_dbne_16, m68k_op_dbne_16, m68k_op_dbne_16, m68k_op_dbne_16, m68k_op_dbne_16, + m68k_op_sne_8_ai, m68k_op_sne_8_ai, m68k_op_sne_8_ai, m68k_op_sne_8_ai, m68k_op_sne_8_ai, m68k_op_sne_8_ai, m68k_op_sne_8_ai, m68k_op_sne_8_ai, + m68k_op_sne_8_pi, m68k_op_sne_8_pi, m68k_op_sne_8_pi, m68k_op_sne_8_pi, m68k_op_sne_8_pi, m68k_op_sne_8_pi, m68k_op_sne_8_pi, m68k_op_sne_8_pi7, + m68k_op_sne_8_pd, m68k_op_sne_8_pd, m68k_op_sne_8_pd, m68k_op_sne_8_pd, m68k_op_sne_8_pd, m68k_op_sne_8_pd, m68k_op_sne_8_pd, m68k_op_sne_8_pd7, + m68k_op_sne_8_di, m68k_op_sne_8_di, m68k_op_sne_8_di, m68k_op_sne_8_di, m68k_op_sne_8_di, m68k_op_sne_8_di, m68k_op_sne_8_di, m68k_op_sne_8_di, + m68k_op_sne_8_ix, m68k_op_sne_8_ix, m68k_op_sne_8_ix, m68k_op_sne_8_ix, m68k_op_sne_8_ix, m68k_op_sne_8_ix, m68k_op_sne_8_ix, m68k_op_sne_8_ix, + m68k_op_sne_8_aw, m68k_op_sne_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, + m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi7, + m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd7, + m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, + m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, + m68k_op_subq_8_aw, m68k_op_subq_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, + m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, + m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, + m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, + m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, + m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, + m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, + m68k_op_subq_16_aw, m68k_op_subq_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, + m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, + m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, + m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, + m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, + m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, + m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, + m68k_op_subq_32_aw, m68k_op_subq_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_seq_8_d, m68k_op_seq_8_d, m68k_op_seq_8_d, m68k_op_seq_8_d, m68k_op_seq_8_d, m68k_op_seq_8_d, m68k_op_seq_8_d, m68k_op_seq_8_d, + m68k_op_dbeq_16, m68k_op_dbeq_16, m68k_op_dbeq_16, m68k_op_dbeq_16, m68k_op_dbeq_16, m68k_op_dbeq_16, m68k_op_dbeq_16, m68k_op_dbeq_16, + m68k_op_seq_8_ai, m68k_op_seq_8_ai, m68k_op_seq_8_ai, m68k_op_seq_8_ai, m68k_op_seq_8_ai, m68k_op_seq_8_ai, m68k_op_seq_8_ai, m68k_op_seq_8_ai, + m68k_op_seq_8_pi, m68k_op_seq_8_pi, m68k_op_seq_8_pi, m68k_op_seq_8_pi, m68k_op_seq_8_pi, m68k_op_seq_8_pi, m68k_op_seq_8_pi, m68k_op_seq_8_pi7, + m68k_op_seq_8_pd, m68k_op_seq_8_pd, m68k_op_seq_8_pd, m68k_op_seq_8_pd, m68k_op_seq_8_pd, m68k_op_seq_8_pd, m68k_op_seq_8_pd, m68k_op_seq_8_pd7, + m68k_op_seq_8_di, m68k_op_seq_8_di, m68k_op_seq_8_di, m68k_op_seq_8_di, m68k_op_seq_8_di, m68k_op_seq_8_di, m68k_op_seq_8_di, m68k_op_seq_8_di, + m68k_op_seq_8_ix, m68k_op_seq_8_ix, m68k_op_seq_8_ix, m68k_op_seq_8_ix, m68k_op_seq_8_ix, m68k_op_seq_8_ix, m68k_op_seq_8_ix, m68k_op_seq_8_ix, + m68k_op_seq_8_aw, m68k_op_seq_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, + m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi7, + m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd7, + m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, + m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, + m68k_op_addq_8_aw, m68k_op_addq_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, + m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, + m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, + m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, + m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, + m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, + m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, + m68k_op_addq_16_aw, m68k_op_addq_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, + m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, + m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, + m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, + m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, + m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, + m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, + m68k_op_addq_32_aw, m68k_op_addq_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_svc_8_d, m68k_op_svc_8_d, m68k_op_svc_8_d, m68k_op_svc_8_d, m68k_op_svc_8_d, m68k_op_svc_8_d, m68k_op_svc_8_d, m68k_op_svc_8_d, + m68k_op_dbvc_16, m68k_op_dbvc_16, m68k_op_dbvc_16, m68k_op_dbvc_16, m68k_op_dbvc_16, m68k_op_dbvc_16, m68k_op_dbvc_16, m68k_op_dbvc_16, + m68k_op_svc_8_ai, m68k_op_svc_8_ai, m68k_op_svc_8_ai, m68k_op_svc_8_ai, m68k_op_svc_8_ai, m68k_op_svc_8_ai, m68k_op_svc_8_ai, m68k_op_svc_8_ai, + m68k_op_svc_8_pi, m68k_op_svc_8_pi, m68k_op_svc_8_pi, m68k_op_svc_8_pi, m68k_op_svc_8_pi, m68k_op_svc_8_pi, m68k_op_svc_8_pi, m68k_op_svc_8_pi7, + m68k_op_svc_8_pd, m68k_op_svc_8_pd, m68k_op_svc_8_pd, m68k_op_svc_8_pd, m68k_op_svc_8_pd, m68k_op_svc_8_pd, m68k_op_svc_8_pd, m68k_op_svc_8_pd7, + m68k_op_svc_8_di, m68k_op_svc_8_di, m68k_op_svc_8_di, m68k_op_svc_8_di, m68k_op_svc_8_di, m68k_op_svc_8_di, m68k_op_svc_8_di, m68k_op_svc_8_di, + m68k_op_svc_8_ix, m68k_op_svc_8_ix, m68k_op_svc_8_ix, m68k_op_svc_8_ix, m68k_op_svc_8_ix, m68k_op_svc_8_ix, m68k_op_svc_8_ix, m68k_op_svc_8_ix, + m68k_op_svc_8_aw, m68k_op_svc_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, + m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi7, + m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd7, + m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, + m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, + m68k_op_subq_8_aw, m68k_op_subq_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, + m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, + m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, + m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, + m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, + m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, + m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, + m68k_op_subq_16_aw, m68k_op_subq_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, + m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, + m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, + m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, + m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, + m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, + m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, + m68k_op_subq_32_aw, m68k_op_subq_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_svs_8_d, m68k_op_svs_8_d, m68k_op_svs_8_d, m68k_op_svs_8_d, m68k_op_svs_8_d, m68k_op_svs_8_d, m68k_op_svs_8_d, m68k_op_svs_8_d, + m68k_op_dbvs_16, m68k_op_dbvs_16, m68k_op_dbvs_16, m68k_op_dbvs_16, m68k_op_dbvs_16, m68k_op_dbvs_16, m68k_op_dbvs_16, m68k_op_dbvs_16, + m68k_op_svs_8_ai, m68k_op_svs_8_ai, m68k_op_svs_8_ai, m68k_op_svs_8_ai, m68k_op_svs_8_ai, m68k_op_svs_8_ai, m68k_op_svs_8_ai, m68k_op_svs_8_ai, + m68k_op_svs_8_pi, m68k_op_svs_8_pi, m68k_op_svs_8_pi, m68k_op_svs_8_pi, m68k_op_svs_8_pi, m68k_op_svs_8_pi, m68k_op_svs_8_pi, m68k_op_svs_8_pi7, + m68k_op_svs_8_pd, m68k_op_svs_8_pd, m68k_op_svs_8_pd, m68k_op_svs_8_pd, m68k_op_svs_8_pd, m68k_op_svs_8_pd, m68k_op_svs_8_pd, m68k_op_svs_8_pd7, + m68k_op_svs_8_di, m68k_op_svs_8_di, m68k_op_svs_8_di, m68k_op_svs_8_di, m68k_op_svs_8_di, m68k_op_svs_8_di, m68k_op_svs_8_di, m68k_op_svs_8_di, + m68k_op_svs_8_ix, m68k_op_svs_8_ix, m68k_op_svs_8_ix, m68k_op_svs_8_ix, m68k_op_svs_8_ix, m68k_op_svs_8_ix, m68k_op_svs_8_ix, m68k_op_svs_8_ix, + m68k_op_svs_8_aw, m68k_op_svs_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, + m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi7, + m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd7, + m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, + m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, + m68k_op_addq_8_aw, m68k_op_addq_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, + m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, + m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, + m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, + m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, + m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, + m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, + m68k_op_addq_16_aw, m68k_op_addq_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, + m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, + m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, + m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, + m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, + m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, + m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, + m68k_op_addq_32_aw, m68k_op_addq_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_spl_8_d, m68k_op_spl_8_d, m68k_op_spl_8_d, m68k_op_spl_8_d, m68k_op_spl_8_d, m68k_op_spl_8_d, m68k_op_spl_8_d, m68k_op_spl_8_d, + m68k_op_dbpl_16, m68k_op_dbpl_16, m68k_op_dbpl_16, m68k_op_dbpl_16, m68k_op_dbpl_16, m68k_op_dbpl_16, m68k_op_dbpl_16, m68k_op_dbpl_16, + m68k_op_spl_8_ai, m68k_op_spl_8_ai, m68k_op_spl_8_ai, m68k_op_spl_8_ai, m68k_op_spl_8_ai, m68k_op_spl_8_ai, m68k_op_spl_8_ai, m68k_op_spl_8_ai, + m68k_op_spl_8_pi, m68k_op_spl_8_pi, m68k_op_spl_8_pi, m68k_op_spl_8_pi, m68k_op_spl_8_pi, m68k_op_spl_8_pi, m68k_op_spl_8_pi, m68k_op_spl_8_pi7, + m68k_op_spl_8_pd, m68k_op_spl_8_pd, m68k_op_spl_8_pd, m68k_op_spl_8_pd, m68k_op_spl_8_pd, m68k_op_spl_8_pd, m68k_op_spl_8_pd, m68k_op_spl_8_pd7, + m68k_op_spl_8_di, m68k_op_spl_8_di, m68k_op_spl_8_di, m68k_op_spl_8_di, m68k_op_spl_8_di, m68k_op_spl_8_di, m68k_op_spl_8_di, m68k_op_spl_8_di, + m68k_op_spl_8_ix, m68k_op_spl_8_ix, m68k_op_spl_8_ix, m68k_op_spl_8_ix, m68k_op_spl_8_ix, m68k_op_spl_8_ix, m68k_op_spl_8_ix, m68k_op_spl_8_ix, + m68k_op_spl_8_aw, m68k_op_spl_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, + m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi7, + m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd7, + m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, + m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, + m68k_op_subq_8_aw, m68k_op_subq_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, + m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, + m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, + m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, + m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, + m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, + m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, + m68k_op_subq_16_aw, m68k_op_subq_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, + m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, + m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, + m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, + m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, + m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, + m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, + m68k_op_subq_32_aw, m68k_op_subq_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_smi_8_d, m68k_op_smi_8_d, m68k_op_smi_8_d, m68k_op_smi_8_d, m68k_op_smi_8_d, m68k_op_smi_8_d, m68k_op_smi_8_d, m68k_op_smi_8_d, + m68k_op_dbmi_16, m68k_op_dbmi_16, m68k_op_dbmi_16, m68k_op_dbmi_16, m68k_op_dbmi_16, m68k_op_dbmi_16, m68k_op_dbmi_16, m68k_op_dbmi_16, + m68k_op_smi_8_ai, m68k_op_smi_8_ai, m68k_op_smi_8_ai, m68k_op_smi_8_ai, m68k_op_smi_8_ai, m68k_op_smi_8_ai, m68k_op_smi_8_ai, m68k_op_smi_8_ai, + m68k_op_smi_8_pi, m68k_op_smi_8_pi, m68k_op_smi_8_pi, m68k_op_smi_8_pi, m68k_op_smi_8_pi, m68k_op_smi_8_pi, m68k_op_smi_8_pi, m68k_op_smi_8_pi7, + m68k_op_smi_8_pd, m68k_op_smi_8_pd, m68k_op_smi_8_pd, m68k_op_smi_8_pd, m68k_op_smi_8_pd, m68k_op_smi_8_pd, m68k_op_smi_8_pd, m68k_op_smi_8_pd7, + m68k_op_smi_8_di, m68k_op_smi_8_di, m68k_op_smi_8_di, m68k_op_smi_8_di, m68k_op_smi_8_di, m68k_op_smi_8_di, m68k_op_smi_8_di, m68k_op_smi_8_di, + m68k_op_smi_8_ix, m68k_op_smi_8_ix, m68k_op_smi_8_ix, m68k_op_smi_8_ix, m68k_op_smi_8_ix, m68k_op_smi_8_ix, m68k_op_smi_8_ix, m68k_op_smi_8_ix, + m68k_op_smi_8_aw, m68k_op_smi_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, + m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi7, + m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd7, + m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, + m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, + m68k_op_addq_8_aw, m68k_op_addq_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, + m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, + m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, + m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, + m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, + m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, + m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, + m68k_op_addq_16_aw, m68k_op_addq_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, + m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, + m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, + m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, + m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, + m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, + m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, + m68k_op_addq_32_aw, m68k_op_addq_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sge_8_d, m68k_op_sge_8_d, m68k_op_sge_8_d, m68k_op_sge_8_d, m68k_op_sge_8_d, m68k_op_sge_8_d, m68k_op_sge_8_d, m68k_op_sge_8_d, + m68k_op_dbge_16, m68k_op_dbge_16, m68k_op_dbge_16, m68k_op_dbge_16, m68k_op_dbge_16, m68k_op_dbge_16, m68k_op_dbge_16, m68k_op_dbge_16, + m68k_op_sge_8_ai, m68k_op_sge_8_ai, m68k_op_sge_8_ai, m68k_op_sge_8_ai, m68k_op_sge_8_ai, m68k_op_sge_8_ai, m68k_op_sge_8_ai, m68k_op_sge_8_ai, + m68k_op_sge_8_pi, m68k_op_sge_8_pi, m68k_op_sge_8_pi, m68k_op_sge_8_pi, m68k_op_sge_8_pi, m68k_op_sge_8_pi, m68k_op_sge_8_pi, m68k_op_sge_8_pi7, + m68k_op_sge_8_pd, m68k_op_sge_8_pd, m68k_op_sge_8_pd, m68k_op_sge_8_pd, m68k_op_sge_8_pd, m68k_op_sge_8_pd, m68k_op_sge_8_pd, m68k_op_sge_8_pd7, + m68k_op_sge_8_di, m68k_op_sge_8_di, m68k_op_sge_8_di, m68k_op_sge_8_di, m68k_op_sge_8_di, m68k_op_sge_8_di, m68k_op_sge_8_di, m68k_op_sge_8_di, + m68k_op_sge_8_ix, m68k_op_sge_8_ix, m68k_op_sge_8_ix, m68k_op_sge_8_ix, m68k_op_sge_8_ix, m68k_op_sge_8_ix, m68k_op_sge_8_ix, m68k_op_sge_8_ix, + m68k_op_sge_8_aw, m68k_op_sge_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, + m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi7, + m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd7, + m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, + m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, + m68k_op_subq_8_aw, m68k_op_subq_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, + m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, + m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, + m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, + m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, + m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, + m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, + m68k_op_subq_16_aw, m68k_op_subq_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, + m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, + m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, + m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, + m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, + m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, + m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, + m68k_op_subq_32_aw, m68k_op_subq_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_slt_8_d, m68k_op_slt_8_d, m68k_op_slt_8_d, m68k_op_slt_8_d, m68k_op_slt_8_d, m68k_op_slt_8_d, m68k_op_slt_8_d, m68k_op_slt_8_d, + m68k_op_dblt_16, m68k_op_dblt_16, m68k_op_dblt_16, m68k_op_dblt_16, m68k_op_dblt_16, m68k_op_dblt_16, m68k_op_dblt_16, m68k_op_dblt_16, + m68k_op_slt_8_ai, m68k_op_slt_8_ai, m68k_op_slt_8_ai, m68k_op_slt_8_ai, m68k_op_slt_8_ai, m68k_op_slt_8_ai, m68k_op_slt_8_ai, m68k_op_slt_8_ai, + m68k_op_slt_8_pi, m68k_op_slt_8_pi, m68k_op_slt_8_pi, m68k_op_slt_8_pi, m68k_op_slt_8_pi, m68k_op_slt_8_pi, m68k_op_slt_8_pi, m68k_op_slt_8_pi7, + m68k_op_slt_8_pd, m68k_op_slt_8_pd, m68k_op_slt_8_pd, m68k_op_slt_8_pd, m68k_op_slt_8_pd, m68k_op_slt_8_pd, m68k_op_slt_8_pd, m68k_op_slt_8_pd7, + m68k_op_slt_8_di, m68k_op_slt_8_di, m68k_op_slt_8_di, m68k_op_slt_8_di, m68k_op_slt_8_di, m68k_op_slt_8_di, m68k_op_slt_8_di, m68k_op_slt_8_di, + m68k_op_slt_8_ix, m68k_op_slt_8_ix, m68k_op_slt_8_ix, m68k_op_slt_8_ix, m68k_op_slt_8_ix, m68k_op_slt_8_ix, m68k_op_slt_8_ix, m68k_op_slt_8_ix, + m68k_op_slt_8_aw, m68k_op_slt_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, m68k_op_addq_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, m68k_op_addq_8_ai, + m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi, m68k_op_addq_8_pi7, + m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd, m68k_op_addq_8_pd7, + m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, m68k_op_addq_8_di, + m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, m68k_op_addq_8_ix, + m68k_op_addq_8_aw, m68k_op_addq_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, m68k_op_addq_16_d, + m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, m68k_op_addq_16_a, + m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, m68k_op_addq_16_ai, + m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, m68k_op_addq_16_pi, + m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, m68k_op_addq_16_pd, + m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, m68k_op_addq_16_di, + m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, m68k_op_addq_16_ix, + m68k_op_addq_16_aw, m68k_op_addq_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, m68k_op_addq_32_d, + m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, m68k_op_addq_32_a, + m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, m68k_op_addq_32_ai, + m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, m68k_op_addq_32_pi, + m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, m68k_op_addq_32_pd, + m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, m68k_op_addq_32_di, + m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, m68k_op_addq_32_ix, + m68k_op_addq_32_aw, m68k_op_addq_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sgt_8_d, m68k_op_sgt_8_d, m68k_op_sgt_8_d, m68k_op_sgt_8_d, m68k_op_sgt_8_d, m68k_op_sgt_8_d, m68k_op_sgt_8_d, m68k_op_sgt_8_d, + m68k_op_dbgt_16, m68k_op_dbgt_16, m68k_op_dbgt_16, m68k_op_dbgt_16, m68k_op_dbgt_16, m68k_op_dbgt_16, m68k_op_dbgt_16, m68k_op_dbgt_16, + m68k_op_sgt_8_ai, m68k_op_sgt_8_ai, m68k_op_sgt_8_ai, m68k_op_sgt_8_ai, m68k_op_sgt_8_ai, m68k_op_sgt_8_ai, m68k_op_sgt_8_ai, m68k_op_sgt_8_ai, + m68k_op_sgt_8_pi, m68k_op_sgt_8_pi, m68k_op_sgt_8_pi, m68k_op_sgt_8_pi, m68k_op_sgt_8_pi, m68k_op_sgt_8_pi, m68k_op_sgt_8_pi, m68k_op_sgt_8_pi7, + m68k_op_sgt_8_pd, m68k_op_sgt_8_pd, m68k_op_sgt_8_pd, m68k_op_sgt_8_pd, m68k_op_sgt_8_pd, m68k_op_sgt_8_pd, m68k_op_sgt_8_pd, m68k_op_sgt_8_pd7, + m68k_op_sgt_8_di, m68k_op_sgt_8_di, m68k_op_sgt_8_di, m68k_op_sgt_8_di, m68k_op_sgt_8_di, m68k_op_sgt_8_di, m68k_op_sgt_8_di, m68k_op_sgt_8_di, + m68k_op_sgt_8_ix, m68k_op_sgt_8_ix, m68k_op_sgt_8_ix, m68k_op_sgt_8_ix, m68k_op_sgt_8_ix, m68k_op_sgt_8_ix, m68k_op_sgt_8_ix, m68k_op_sgt_8_ix, + m68k_op_sgt_8_aw, m68k_op_sgt_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, m68k_op_subq_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, m68k_op_subq_8_ai, + m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi, m68k_op_subq_8_pi7, + m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd, m68k_op_subq_8_pd7, + m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, m68k_op_subq_8_di, + m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, m68k_op_subq_8_ix, + m68k_op_subq_8_aw, m68k_op_subq_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, m68k_op_subq_16_d, + m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, m68k_op_subq_16_a, + m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, m68k_op_subq_16_ai, + m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, m68k_op_subq_16_pi, + m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, m68k_op_subq_16_pd, + m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, m68k_op_subq_16_di, + m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, m68k_op_subq_16_ix, + m68k_op_subq_16_aw, m68k_op_subq_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, m68k_op_subq_32_d, + m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, m68k_op_subq_32_a, + m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, m68k_op_subq_32_ai, + m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, m68k_op_subq_32_pi, + m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, m68k_op_subq_32_pd, + m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, m68k_op_subq_32_di, + m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, m68k_op_subq_32_ix, + m68k_op_subq_32_aw, m68k_op_subq_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sle_8_d, m68k_op_sle_8_d, m68k_op_sle_8_d, m68k_op_sle_8_d, m68k_op_sle_8_d, m68k_op_sle_8_d, m68k_op_sle_8_d, m68k_op_sle_8_d, + m68k_op_dble_16, m68k_op_dble_16, m68k_op_dble_16, m68k_op_dble_16, m68k_op_dble_16, m68k_op_dble_16, m68k_op_dble_16, m68k_op_dble_16, + m68k_op_sle_8_ai, m68k_op_sle_8_ai, m68k_op_sle_8_ai, m68k_op_sle_8_ai, m68k_op_sle_8_ai, m68k_op_sle_8_ai, m68k_op_sle_8_ai, m68k_op_sle_8_ai, + m68k_op_sle_8_pi, m68k_op_sle_8_pi, m68k_op_sle_8_pi, m68k_op_sle_8_pi, m68k_op_sle_8_pi, m68k_op_sle_8_pi, m68k_op_sle_8_pi, m68k_op_sle_8_pi7, + m68k_op_sle_8_pd, m68k_op_sle_8_pd, m68k_op_sle_8_pd, m68k_op_sle_8_pd, m68k_op_sle_8_pd, m68k_op_sle_8_pd, m68k_op_sle_8_pd, m68k_op_sle_8_pd7, + m68k_op_sle_8_di, m68k_op_sle_8_di, m68k_op_sle_8_di, m68k_op_sle_8_di, m68k_op_sle_8_di, m68k_op_sle_8_di, m68k_op_sle_8_di, m68k_op_sle_8_di, + m68k_op_sle_8_ix, m68k_op_sle_8_ix, m68k_op_sle_8_ix, m68k_op_sle_8_ix, m68k_op_sle_8_ix, m68k_op_sle_8_ix, m68k_op_sle_8_ix, m68k_op_sle_8_ix, + m68k_op_sle_8_aw, m68k_op_sle_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_bra_16, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, + m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_8, m68k_op_bra_32, + m68k_op_bsr_16, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, + m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_8, m68k_op_bsr_32, + m68k_op_bhi_16, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, + m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_8, m68k_op_bhi_32, + m68k_op_bls_16, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, + m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_8, m68k_op_bls_32, + m68k_op_bcc_16, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, + m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_8, m68k_op_bcc_32, + m68k_op_bcs_16, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, + m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_8, m68k_op_bcs_32, + m68k_op_bne_16, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, + m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_8, m68k_op_bne_32, + m68k_op_beq_16, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, + m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_8, m68k_op_beq_32, + m68k_op_bvc_16, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, + m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_8, m68k_op_bvc_32, + m68k_op_bvs_16, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, + m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_8, m68k_op_bvs_32, + m68k_op_bpl_16, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, + m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_8, m68k_op_bpl_32, + m68k_op_bmi_16, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, + m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_8, m68k_op_bmi_32, + m68k_op_bge_16, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, + m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_8, m68k_op_bge_32, + m68k_op_blt_16, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, + m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_8, m68k_op_blt_32, + m68k_op_bgt_16, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, + m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_8, m68k_op_bgt_32, + m68k_op_ble_16, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, + m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_8, m68k_op_ble_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, m68k_op_moveq_32, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, + m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi7, + m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd7, + m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, + m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, + m68k_op_or_8_er_aw, m68k_op_or_8_er_al, m68k_op_or_8_er_pcdi, m68k_op_or_8_er_pcix, m68k_op_or_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, + m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, + m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, + m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, + m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, + m68k_op_or_16_er_aw, m68k_op_or_16_er_al, m68k_op_or_16_er_pcdi, m68k_op_or_16_er_pcix, m68k_op_or_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, + m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, + m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, + m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, + m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, + m68k_op_or_32_er_aw, m68k_op_or_32_er_al, m68k_op_or_32_er_pcdi, m68k_op_or_32_er_pcix, m68k_op_or_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, + m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, + m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, + m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, + m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, + m68k_op_divu_16_aw, m68k_op_divu_16_al, m68k_op_divu_16_pcdi, m68k_op_divu_16_pcix, m68k_op_divu_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, + m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm_ay7, + m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, + m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi7, + m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd7, + m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, + m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, + m68k_op_or_8_re_aw, m68k_op_or_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, + m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, + m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, + m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, + m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, + m68k_op_or_16_re_aw, m68k_op_or_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, + m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, + m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, + m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, + m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, + m68k_op_or_32_re_aw, m68k_op_or_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, + m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, + m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, + m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, + m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, + m68k_op_divs_16_aw, m68k_op_divs_16_al, m68k_op_divs_16_pcdi, m68k_op_divs_16_pcix, m68k_op_divs_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, + m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi7, + m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd7, + m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, + m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, + m68k_op_or_8_er_aw, m68k_op_or_8_er_al, m68k_op_or_8_er_pcdi, m68k_op_or_8_er_pcix, m68k_op_or_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, + m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, + m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, + m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, + m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, + m68k_op_or_16_er_aw, m68k_op_or_16_er_al, m68k_op_or_16_er_pcdi, m68k_op_or_16_er_pcix, m68k_op_or_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, + m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, + m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, + m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, + m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, + m68k_op_or_32_er_aw, m68k_op_or_32_er_al, m68k_op_or_32_er_pcdi, m68k_op_or_32_er_pcix, m68k_op_or_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, + m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, + m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, + m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, + m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, + m68k_op_divu_16_aw, m68k_op_divu_16_al, m68k_op_divu_16_pcdi, m68k_op_divu_16_pcix, m68k_op_divu_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, + m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm_ay7, + m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, + m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi7, + m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd7, + m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, + m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, + m68k_op_or_8_re_aw, m68k_op_or_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, + m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, + m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, + m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, + m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, + m68k_op_or_16_re_aw, m68k_op_or_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, + m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, + m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, + m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, + m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, + m68k_op_or_32_re_aw, m68k_op_or_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, + m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, + m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, + m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, + m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, + m68k_op_divs_16_aw, m68k_op_divs_16_al, m68k_op_divs_16_pcdi, m68k_op_divs_16_pcix, m68k_op_divs_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, + m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi7, + m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd7, + m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, + m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, + m68k_op_or_8_er_aw, m68k_op_or_8_er_al, m68k_op_or_8_er_pcdi, m68k_op_or_8_er_pcix, m68k_op_or_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, + m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, + m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, + m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, + m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, + m68k_op_or_16_er_aw, m68k_op_or_16_er_al, m68k_op_or_16_er_pcdi, m68k_op_or_16_er_pcix, m68k_op_or_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, + m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, + m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, + m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, + m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, + m68k_op_or_32_er_aw, m68k_op_or_32_er_al, m68k_op_or_32_er_pcdi, m68k_op_or_32_er_pcix, m68k_op_or_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, + m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, + m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, + m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, + m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, + m68k_op_divu_16_aw, m68k_op_divu_16_al, m68k_op_divu_16_pcdi, m68k_op_divu_16_pcix, m68k_op_divu_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, + m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm_ay7, + m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, + m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi7, + m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd7, + m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, + m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, + m68k_op_or_8_re_aw, m68k_op_or_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, + m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, + m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, + m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, + m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, + m68k_op_or_16_re_aw, m68k_op_or_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, + m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, + m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, + m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, + m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, + m68k_op_or_32_re_aw, m68k_op_or_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, + m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, + m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, + m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, + m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, + m68k_op_divs_16_aw, m68k_op_divs_16_al, m68k_op_divs_16_pcdi, m68k_op_divs_16_pcix, m68k_op_divs_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, + m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi7, + m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd7, + m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, + m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, + m68k_op_or_8_er_aw, m68k_op_or_8_er_al, m68k_op_or_8_er_pcdi, m68k_op_or_8_er_pcix, m68k_op_or_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, + m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, + m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, + m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, + m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, + m68k_op_or_16_er_aw, m68k_op_or_16_er_al, m68k_op_or_16_er_pcdi, m68k_op_or_16_er_pcix, m68k_op_or_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, + m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, + m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, + m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, + m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, + m68k_op_or_32_er_aw, m68k_op_or_32_er_al, m68k_op_or_32_er_pcdi, m68k_op_or_32_er_pcix, m68k_op_or_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, + m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, + m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, + m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, + m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, + m68k_op_divu_16_aw, m68k_op_divu_16_al, m68k_op_divu_16_pcdi, m68k_op_divu_16_pcix, m68k_op_divu_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, + m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm_ay7, + m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, + m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi7, + m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd7, + m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, + m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, + m68k_op_or_8_re_aw, m68k_op_or_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, + m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, + m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, + m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, + m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, + m68k_op_or_16_re_aw, m68k_op_or_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, + m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, + m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, + m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, + m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, + m68k_op_or_32_re_aw, m68k_op_or_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, + m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, + m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, + m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, + m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, + m68k_op_divs_16_aw, m68k_op_divs_16_al, m68k_op_divs_16_pcdi, m68k_op_divs_16_pcix, m68k_op_divs_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, + m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi7, + m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd7, + m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, + m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, + m68k_op_or_8_er_aw, m68k_op_or_8_er_al, m68k_op_or_8_er_pcdi, m68k_op_or_8_er_pcix, m68k_op_or_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, + m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, + m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, + m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, + m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, + m68k_op_or_16_er_aw, m68k_op_or_16_er_al, m68k_op_or_16_er_pcdi, m68k_op_or_16_er_pcix, m68k_op_or_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, + m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, + m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, + m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, + m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, + m68k_op_or_32_er_aw, m68k_op_or_32_er_al, m68k_op_or_32_er_pcdi, m68k_op_or_32_er_pcix, m68k_op_or_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, + m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, + m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, + m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, + m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, + m68k_op_divu_16_aw, m68k_op_divu_16_al, m68k_op_divu_16_pcdi, m68k_op_divu_16_pcix, m68k_op_divu_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, + m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm_ay7, + m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, + m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi7, + m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd7, + m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, + m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, + m68k_op_or_8_re_aw, m68k_op_or_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, + m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, + m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, + m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, + m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, + m68k_op_or_16_re_aw, m68k_op_or_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, + m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, + m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, + m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, + m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, + m68k_op_or_32_re_aw, m68k_op_or_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, + m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, + m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, + m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, + m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, + m68k_op_divs_16_aw, m68k_op_divs_16_al, m68k_op_divs_16_pcdi, m68k_op_divs_16_pcix, m68k_op_divs_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, + m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi7, + m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd7, + m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, + m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, + m68k_op_or_8_er_aw, m68k_op_or_8_er_al, m68k_op_or_8_er_pcdi, m68k_op_or_8_er_pcix, m68k_op_or_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, + m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, + m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, + m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, + m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, + m68k_op_or_16_er_aw, m68k_op_or_16_er_al, m68k_op_or_16_er_pcdi, m68k_op_or_16_er_pcix, m68k_op_or_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, + m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, + m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, + m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, + m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, + m68k_op_or_32_er_aw, m68k_op_or_32_er_al, m68k_op_or_32_er_pcdi, m68k_op_or_32_er_pcix, m68k_op_or_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, + m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, + m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, + m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, + m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, + m68k_op_divu_16_aw, m68k_op_divu_16_al, m68k_op_divu_16_pcdi, m68k_op_divu_16_pcix, m68k_op_divu_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, + m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm_ay7, + m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, + m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi7, + m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd7, + m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, + m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, + m68k_op_or_8_re_aw, m68k_op_or_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, + m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, + m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, + m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, + m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, + m68k_op_or_16_re_aw, m68k_op_or_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, + m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, + m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, + m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, + m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, + m68k_op_or_32_re_aw, m68k_op_or_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, + m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, + m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, + m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, + m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, + m68k_op_divs_16_aw, m68k_op_divs_16_al, m68k_op_divs_16_pcdi, m68k_op_divs_16_pcix, m68k_op_divs_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, + m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi7, + m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd7, + m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, + m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, + m68k_op_or_8_er_aw, m68k_op_or_8_er_al, m68k_op_or_8_er_pcdi, m68k_op_or_8_er_pcix, m68k_op_or_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, + m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, + m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, + m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, + m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, + m68k_op_or_16_er_aw, m68k_op_or_16_er_al, m68k_op_or_16_er_pcdi, m68k_op_or_16_er_pcix, m68k_op_or_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, + m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, + m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, + m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, + m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, + m68k_op_or_32_er_aw, m68k_op_or_32_er_al, m68k_op_or_32_er_pcdi, m68k_op_or_32_er_pcix, m68k_op_or_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, + m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, + m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, + m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, + m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, + m68k_op_divu_16_aw, m68k_op_divu_16_al, m68k_op_divu_16_pcdi, m68k_op_divu_16_pcix, m68k_op_divu_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, + m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm, m68k_op_sbcd_8_mm_ay7, + m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, + m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi7, + m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd7, + m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, + m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, + m68k_op_or_8_re_aw, m68k_op_or_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, + m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, + m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, + m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, + m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, + m68k_op_or_16_re_aw, m68k_op_or_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, + m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, + m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, + m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, + m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, + m68k_op_or_32_re_aw, m68k_op_or_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, + m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, + m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, + m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, + m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, + m68k_op_divs_16_aw, m68k_op_divs_16_al, m68k_op_divs_16_pcdi, m68k_op_divs_16_pcix, m68k_op_divs_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, m68k_op_or_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, m68k_op_or_8_er_ai, + m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi, m68k_op_or_8_er_pi7, + m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd, m68k_op_or_8_er_pd7, + m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, m68k_op_or_8_er_di, + m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, m68k_op_or_8_er_ix, + m68k_op_or_8_er_aw, m68k_op_or_8_er_al, m68k_op_or_8_er_pcdi, m68k_op_or_8_er_pcix, m68k_op_or_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, m68k_op_or_16_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, m68k_op_or_16_er_ai, + m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, m68k_op_or_16_er_pi, + m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, m68k_op_or_16_er_pd, + m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, m68k_op_or_16_er_di, + m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, m68k_op_or_16_er_ix, + m68k_op_or_16_er_aw, m68k_op_or_16_er_al, m68k_op_or_16_er_pcdi, m68k_op_or_16_er_pcix, m68k_op_or_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, m68k_op_or_32_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, m68k_op_or_32_er_ai, + m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, m68k_op_or_32_er_pi, + m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, m68k_op_or_32_er_pd, + m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, m68k_op_or_32_er_di, + m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, m68k_op_or_32_er_ix, + m68k_op_or_32_er_aw, m68k_op_or_32_er_al, m68k_op_or_32_er_pcdi, m68k_op_or_32_er_pcix, m68k_op_or_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, m68k_op_divu_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, m68k_op_divu_16_ai, + m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, m68k_op_divu_16_pi, + m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, m68k_op_divu_16_pd, + m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, m68k_op_divu_16_di, + m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, m68k_op_divu_16_ix, + m68k_op_divu_16_aw, m68k_op_divu_16_al, m68k_op_divu_16_pcdi, m68k_op_divu_16_pcix, m68k_op_divu_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, m68k_op_sbcd_8_rr, + m68k_op_sbcd_8_mm_ax7, m68k_op_sbcd_8_mm_ax7, m68k_op_sbcd_8_mm_ax7, m68k_op_sbcd_8_mm_ax7, m68k_op_sbcd_8_mm_ax7, m68k_op_sbcd_8_mm_ax7, m68k_op_sbcd_8_mm_ax7, m68k_op_sbcd_8_mm_axy7, + m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, m68k_op_or_8_re_ai, + m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi, m68k_op_or_8_re_pi7, + m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd, m68k_op_or_8_re_pd7, + m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, m68k_op_or_8_re_di, + m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, m68k_op_or_8_re_ix, + m68k_op_or_8_re_aw, m68k_op_or_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, m68k_op_or_16_re_ai, + m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, m68k_op_or_16_re_pi, + m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, m68k_op_or_16_re_pd, + m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, m68k_op_or_16_re_di, + m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, m68k_op_or_16_re_ix, + m68k_op_or_16_re_aw, m68k_op_or_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, m68k_op_or_32_re_ai, + m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, m68k_op_or_32_re_pi, + m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, m68k_op_or_32_re_pd, + m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, m68k_op_or_32_re_di, + m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, m68k_op_or_32_re_ix, + m68k_op_or_32_re_aw, m68k_op_or_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, m68k_op_divs_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, m68k_op_divs_16_ai, + m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, m68k_op_divs_16_pi, + m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, m68k_op_divs_16_pd, + m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, m68k_op_divs_16_di, + m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, m68k_op_divs_16_ix, + m68k_op_divs_16_aw, m68k_op_divs_16_al, m68k_op_divs_16_pcdi, m68k_op_divs_16_pcix, m68k_op_divs_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, + m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi7, + m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd7, + m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, + m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, + m68k_op_sub_8_er_aw, m68k_op_sub_8_er_al, m68k_op_sub_8_er_pcdi, m68k_op_sub_8_er_pcix, m68k_op_sub_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, + m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, + m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, + m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, + m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, + m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, + m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, + m68k_op_sub_16_er_aw, m68k_op_sub_16_er_al, m68k_op_sub_16_er_pcdi, m68k_op_sub_16_er_pcix, m68k_op_sub_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, + m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, + m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, + m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, + m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, + m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, + m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, + m68k_op_sub_32_er_aw, m68k_op_sub_32_er_al, m68k_op_sub_32_er_pcdi, m68k_op_sub_32_er_pcix, m68k_op_sub_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, + m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, + m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, + m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, + m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, + m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, + m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, + m68k_op_suba_16_aw, m68k_op_suba_16_al, m68k_op_suba_16_pcdi, m68k_op_suba_16_pcix, m68k_op_suba_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, + m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm_ay7, + m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, + m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi7, + m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd7, + m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, + m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, + m68k_op_sub_8_re_aw, m68k_op_sub_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, + m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, + m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, + m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, + m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, + m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, + m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, + m68k_op_sub_16_re_aw, m68k_op_sub_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, + m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, + m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, + m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, + m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, + m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, + m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, + m68k_op_sub_32_re_aw, m68k_op_sub_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, + m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, + m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, + m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, + m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, + m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, + m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, + m68k_op_suba_32_aw, m68k_op_suba_32_al, m68k_op_suba_32_pcdi, m68k_op_suba_32_pcix, m68k_op_suba_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, + m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi7, + m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd7, + m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, + m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, + m68k_op_sub_8_er_aw, m68k_op_sub_8_er_al, m68k_op_sub_8_er_pcdi, m68k_op_sub_8_er_pcix, m68k_op_sub_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, + m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, + m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, + m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, + m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, + m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, + m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, + m68k_op_sub_16_er_aw, m68k_op_sub_16_er_al, m68k_op_sub_16_er_pcdi, m68k_op_sub_16_er_pcix, m68k_op_sub_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, + m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, + m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, + m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, + m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, + m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, + m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, + m68k_op_sub_32_er_aw, m68k_op_sub_32_er_al, m68k_op_sub_32_er_pcdi, m68k_op_sub_32_er_pcix, m68k_op_sub_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, + m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, + m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, + m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, + m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, + m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, + m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, + m68k_op_suba_16_aw, m68k_op_suba_16_al, m68k_op_suba_16_pcdi, m68k_op_suba_16_pcix, m68k_op_suba_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, + m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm_ay7, + m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, + m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi7, + m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd7, + m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, + m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, + m68k_op_sub_8_re_aw, m68k_op_sub_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, + m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, + m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, + m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, + m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, + m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, + m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, + m68k_op_sub_16_re_aw, m68k_op_sub_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, + m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, + m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, + m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, + m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, + m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, + m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, + m68k_op_sub_32_re_aw, m68k_op_sub_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, + m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, + m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, + m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, + m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, + m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, + m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, + m68k_op_suba_32_aw, m68k_op_suba_32_al, m68k_op_suba_32_pcdi, m68k_op_suba_32_pcix, m68k_op_suba_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, + m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi7, + m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd7, + m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, + m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, + m68k_op_sub_8_er_aw, m68k_op_sub_8_er_al, m68k_op_sub_8_er_pcdi, m68k_op_sub_8_er_pcix, m68k_op_sub_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, + m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, + m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, + m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, + m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, + m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, + m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, + m68k_op_sub_16_er_aw, m68k_op_sub_16_er_al, m68k_op_sub_16_er_pcdi, m68k_op_sub_16_er_pcix, m68k_op_sub_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, + m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, + m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, + m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, + m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, + m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, + m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, + m68k_op_sub_32_er_aw, m68k_op_sub_32_er_al, m68k_op_sub_32_er_pcdi, m68k_op_sub_32_er_pcix, m68k_op_sub_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, + m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, + m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, + m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, + m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, + m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, + m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, + m68k_op_suba_16_aw, m68k_op_suba_16_al, m68k_op_suba_16_pcdi, m68k_op_suba_16_pcix, m68k_op_suba_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, + m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm_ay7, + m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, + m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi7, + m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd7, + m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, + m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, + m68k_op_sub_8_re_aw, m68k_op_sub_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, + m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, + m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, + m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, + m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, + m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, + m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, + m68k_op_sub_16_re_aw, m68k_op_sub_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, + m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, + m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, + m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, + m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, + m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, + m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, + m68k_op_sub_32_re_aw, m68k_op_sub_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, + m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, + m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, + m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, + m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, + m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, + m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, + m68k_op_suba_32_aw, m68k_op_suba_32_al, m68k_op_suba_32_pcdi, m68k_op_suba_32_pcix, m68k_op_suba_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, + m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi7, + m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd7, + m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, + m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, + m68k_op_sub_8_er_aw, m68k_op_sub_8_er_al, m68k_op_sub_8_er_pcdi, m68k_op_sub_8_er_pcix, m68k_op_sub_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, + m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, + m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, + m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, + m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, + m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, + m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, + m68k_op_sub_16_er_aw, m68k_op_sub_16_er_al, m68k_op_sub_16_er_pcdi, m68k_op_sub_16_er_pcix, m68k_op_sub_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, + m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, + m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, + m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, + m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, + m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, + m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, + m68k_op_sub_32_er_aw, m68k_op_sub_32_er_al, m68k_op_sub_32_er_pcdi, m68k_op_sub_32_er_pcix, m68k_op_sub_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, + m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, + m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, + m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, + m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, + m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, + m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, + m68k_op_suba_16_aw, m68k_op_suba_16_al, m68k_op_suba_16_pcdi, m68k_op_suba_16_pcix, m68k_op_suba_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, + m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm_ay7, + m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, + m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi7, + m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd7, + m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, + m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, + m68k_op_sub_8_re_aw, m68k_op_sub_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, + m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, + m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, + m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, + m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, + m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, + m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, + m68k_op_sub_16_re_aw, m68k_op_sub_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, + m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, + m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, + m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, + m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, + m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, + m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, + m68k_op_sub_32_re_aw, m68k_op_sub_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, + m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, + m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, + m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, + m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, + m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, + m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, + m68k_op_suba_32_aw, m68k_op_suba_32_al, m68k_op_suba_32_pcdi, m68k_op_suba_32_pcix, m68k_op_suba_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, + m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi7, + m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd7, + m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, + m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, + m68k_op_sub_8_er_aw, m68k_op_sub_8_er_al, m68k_op_sub_8_er_pcdi, m68k_op_sub_8_er_pcix, m68k_op_sub_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, + m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, + m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, + m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, + m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, + m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, + m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, + m68k_op_sub_16_er_aw, m68k_op_sub_16_er_al, m68k_op_sub_16_er_pcdi, m68k_op_sub_16_er_pcix, m68k_op_sub_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, + m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, + m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, + m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, + m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, + m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, + m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, + m68k_op_sub_32_er_aw, m68k_op_sub_32_er_al, m68k_op_sub_32_er_pcdi, m68k_op_sub_32_er_pcix, m68k_op_sub_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, + m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, + m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, + m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, + m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, + m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, + m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, + m68k_op_suba_16_aw, m68k_op_suba_16_al, m68k_op_suba_16_pcdi, m68k_op_suba_16_pcix, m68k_op_suba_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, + m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm_ay7, + m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, + m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi7, + m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd7, + m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, + m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, + m68k_op_sub_8_re_aw, m68k_op_sub_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, + m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, + m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, + m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, + m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, + m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, + m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, + m68k_op_sub_16_re_aw, m68k_op_sub_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, + m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, + m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, + m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, + m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, + m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, + m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, + m68k_op_sub_32_re_aw, m68k_op_sub_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, + m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, + m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, + m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, + m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, + m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, + m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, + m68k_op_suba_32_aw, m68k_op_suba_32_al, m68k_op_suba_32_pcdi, m68k_op_suba_32_pcix, m68k_op_suba_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, + m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi7, + m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd7, + m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, + m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, + m68k_op_sub_8_er_aw, m68k_op_sub_8_er_al, m68k_op_sub_8_er_pcdi, m68k_op_sub_8_er_pcix, m68k_op_sub_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, + m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, + m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, + m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, + m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, + m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, + m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, + m68k_op_sub_16_er_aw, m68k_op_sub_16_er_al, m68k_op_sub_16_er_pcdi, m68k_op_sub_16_er_pcix, m68k_op_sub_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, + m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, + m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, + m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, + m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, + m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, + m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, + m68k_op_sub_32_er_aw, m68k_op_sub_32_er_al, m68k_op_sub_32_er_pcdi, m68k_op_sub_32_er_pcix, m68k_op_sub_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, + m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, + m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, + m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, + m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, + m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, + m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, + m68k_op_suba_16_aw, m68k_op_suba_16_al, m68k_op_suba_16_pcdi, m68k_op_suba_16_pcix, m68k_op_suba_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, + m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm_ay7, + m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, + m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi7, + m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd7, + m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, + m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, + m68k_op_sub_8_re_aw, m68k_op_sub_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, + m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, + m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, + m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, + m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, + m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, + m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, + m68k_op_sub_16_re_aw, m68k_op_sub_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, + m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, + m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, + m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, + m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, + m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, + m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, + m68k_op_sub_32_re_aw, m68k_op_sub_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, + m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, + m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, + m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, + m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, + m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, + m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, + m68k_op_suba_32_aw, m68k_op_suba_32_al, m68k_op_suba_32_pcdi, m68k_op_suba_32_pcix, m68k_op_suba_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, + m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi7, + m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd7, + m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, + m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, + m68k_op_sub_8_er_aw, m68k_op_sub_8_er_al, m68k_op_sub_8_er_pcdi, m68k_op_sub_8_er_pcix, m68k_op_sub_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, + m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, + m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, + m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, + m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, + m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, + m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, + m68k_op_sub_16_er_aw, m68k_op_sub_16_er_al, m68k_op_sub_16_er_pcdi, m68k_op_sub_16_er_pcix, m68k_op_sub_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, + m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, + m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, + m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, + m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, + m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, + m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, + m68k_op_sub_32_er_aw, m68k_op_sub_32_er_al, m68k_op_sub_32_er_pcdi, m68k_op_sub_32_er_pcix, m68k_op_sub_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, + m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, + m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, + m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, + m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, + m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, + m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, + m68k_op_suba_16_aw, m68k_op_suba_16_al, m68k_op_suba_16_pcdi, m68k_op_suba_16_pcix, m68k_op_suba_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, + m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm, m68k_op_subx_8_mm_ay7, + m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, + m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi7, + m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd7, + m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, + m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, + m68k_op_sub_8_re_aw, m68k_op_sub_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, + m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, + m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, + m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, + m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, + m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, + m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, + m68k_op_sub_16_re_aw, m68k_op_sub_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, + m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, + m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, + m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, + m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, + m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, + m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, + m68k_op_sub_32_re_aw, m68k_op_sub_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, + m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, + m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, + m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, + m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, + m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, + m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, + m68k_op_suba_32_aw, m68k_op_suba_32_al, m68k_op_suba_32_pcdi, m68k_op_suba_32_pcix, m68k_op_suba_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, m68k_op_sub_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, m68k_op_sub_8_er_ai, + m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi, m68k_op_sub_8_er_pi7, + m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd, m68k_op_sub_8_er_pd7, + m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, m68k_op_sub_8_er_di, + m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, m68k_op_sub_8_er_ix, + m68k_op_sub_8_er_aw, m68k_op_sub_8_er_al, m68k_op_sub_8_er_pcdi, m68k_op_sub_8_er_pcix, m68k_op_sub_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, m68k_op_sub_16_er_d, + m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, m68k_op_sub_16_er_a, + m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, m68k_op_sub_16_er_ai, + m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, m68k_op_sub_16_er_pi, + m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, m68k_op_sub_16_er_pd, + m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, m68k_op_sub_16_er_di, + m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, m68k_op_sub_16_er_ix, + m68k_op_sub_16_er_aw, m68k_op_sub_16_er_al, m68k_op_sub_16_er_pcdi, m68k_op_sub_16_er_pcix, m68k_op_sub_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, m68k_op_sub_32_er_d, + m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, m68k_op_sub_32_er_a, + m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, m68k_op_sub_32_er_ai, + m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, m68k_op_sub_32_er_pi, + m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, m68k_op_sub_32_er_pd, + m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, m68k_op_sub_32_er_di, + m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, m68k_op_sub_32_er_ix, + m68k_op_sub_32_er_aw, m68k_op_sub_32_er_al, m68k_op_sub_32_er_pcdi, m68k_op_sub_32_er_pcix, m68k_op_sub_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, m68k_op_suba_16_d, + m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, m68k_op_suba_16_a, + m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, m68k_op_suba_16_ai, + m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, m68k_op_suba_16_pi, + m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, m68k_op_suba_16_pd, + m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, m68k_op_suba_16_di, + m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, m68k_op_suba_16_ix, + m68k_op_suba_16_aw, m68k_op_suba_16_al, m68k_op_suba_16_pcdi, m68k_op_suba_16_pcix, m68k_op_suba_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, m68k_op_subx_8_rr, + m68k_op_subx_8_mm_ax7, m68k_op_subx_8_mm_ax7, m68k_op_subx_8_mm_ax7, m68k_op_subx_8_mm_ax7, m68k_op_subx_8_mm_ax7, m68k_op_subx_8_mm_ax7, m68k_op_subx_8_mm_ax7, m68k_op_subx_8_mm_axy7, + m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, m68k_op_sub_8_re_ai, + m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi, m68k_op_sub_8_re_pi7, + m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd, m68k_op_sub_8_re_pd7, + m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, m68k_op_sub_8_re_di, + m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, m68k_op_sub_8_re_ix, + m68k_op_sub_8_re_aw, m68k_op_sub_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, m68k_op_subx_16_rr, + m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, m68k_op_subx_16_mm, + m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, m68k_op_sub_16_re_ai, + m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, m68k_op_sub_16_re_pi, + m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, m68k_op_sub_16_re_pd, + m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, m68k_op_sub_16_re_di, + m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, m68k_op_sub_16_re_ix, + m68k_op_sub_16_re_aw, m68k_op_sub_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, m68k_op_subx_32_rr, + m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, m68k_op_subx_32_mm, + m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, m68k_op_sub_32_re_ai, + m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, m68k_op_sub_32_re_pi, + m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, m68k_op_sub_32_re_pd, + m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, m68k_op_sub_32_re_di, + m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, m68k_op_sub_32_re_ix, + m68k_op_sub_32_re_aw, m68k_op_sub_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, m68k_op_suba_32_d, + m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, m68k_op_suba_32_a, + m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, m68k_op_suba_32_ai, + m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, m68k_op_suba_32_pi, + m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, m68k_op_suba_32_pd, + m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, m68k_op_suba_32_di, + m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, m68k_op_suba_32_ix, + m68k_op_suba_32_aw, m68k_op_suba_32_al, m68k_op_suba_32_pcdi, m68k_op_suba_32_pcix, m68k_op_suba_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, m68k_op_1010, + m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, + m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi7, + m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd7, + m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, + m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, + m68k_op_cmp_8_aw, m68k_op_cmp_8_al, m68k_op_cmp_8_pcdi, m68k_op_cmp_8_pcix, m68k_op_cmp_8_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, + m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, + m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, + m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, + m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, + m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, + m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, + m68k_op_cmp_16_aw, m68k_op_cmp_16_al, m68k_op_cmp_16_pcdi, m68k_op_cmp_16_pcix, m68k_op_cmp_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, + m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, + m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, + m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, + m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, + m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, + m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, + m68k_op_cmp_32_aw, m68k_op_cmp_32_al, m68k_op_cmp_32_pcdi, m68k_op_cmp_32_pcix, m68k_op_cmp_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, + m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, + m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, + m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, + m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, + m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, + m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, + m68k_op_cmpa_16_aw, m68k_op_cmpa_16_al, m68k_op_cmpa_16_pcdi, m68k_op_cmpa_16_pcix, m68k_op_cmpa_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, + m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8_ay7, + m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, + m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi7, + m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd7, + m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, + m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, + m68k_op_eor_8_aw, m68k_op_eor_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, + m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, + m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, + m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, + m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, + m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, + m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, + m68k_op_eor_16_aw, m68k_op_eor_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, + m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, + m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, + m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, + m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, + m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, + m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, + m68k_op_eor_32_aw, m68k_op_eor_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, + m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, + m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, + m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, + m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, + m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, + m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, + m68k_op_cmpa_32_aw, m68k_op_cmpa_32_al, m68k_op_cmpa_32_pcdi, m68k_op_cmpa_32_pcix, m68k_op_cmpa_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, + m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi7, + m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd7, + m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, + m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, + m68k_op_cmp_8_aw, m68k_op_cmp_8_al, m68k_op_cmp_8_pcdi, m68k_op_cmp_8_pcix, m68k_op_cmp_8_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, + m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, + m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, + m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, + m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, + m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, + m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, + m68k_op_cmp_16_aw, m68k_op_cmp_16_al, m68k_op_cmp_16_pcdi, m68k_op_cmp_16_pcix, m68k_op_cmp_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, + m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, + m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, + m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, + m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, + m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, + m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, + m68k_op_cmp_32_aw, m68k_op_cmp_32_al, m68k_op_cmp_32_pcdi, m68k_op_cmp_32_pcix, m68k_op_cmp_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, + m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, + m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, + m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, + m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, + m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, + m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, + m68k_op_cmpa_16_aw, m68k_op_cmpa_16_al, m68k_op_cmpa_16_pcdi, m68k_op_cmpa_16_pcix, m68k_op_cmpa_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, + m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8_ay7, + m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, + m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi7, + m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd7, + m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, + m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, + m68k_op_eor_8_aw, m68k_op_eor_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, + m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, + m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, + m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, + m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, + m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, + m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, + m68k_op_eor_16_aw, m68k_op_eor_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, + m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, + m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, + m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, + m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, + m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, + m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, + m68k_op_eor_32_aw, m68k_op_eor_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, + m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, + m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, + m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, + m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, + m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, + m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, + m68k_op_cmpa_32_aw, m68k_op_cmpa_32_al, m68k_op_cmpa_32_pcdi, m68k_op_cmpa_32_pcix, m68k_op_cmpa_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, + m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi7, + m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd7, + m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, + m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, + m68k_op_cmp_8_aw, m68k_op_cmp_8_al, m68k_op_cmp_8_pcdi, m68k_op_cmp_8_pcix, m68k_op_cmp_8_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, + m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, + m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, + m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, + m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, + m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, + m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, + m68k_op_cmp_16_aw, m68k_op_cmp_16_al, m68k_op_cmp_16_pcdi, m68k_op_cmp_16_pcix, m68k_op_cmp_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, + m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, + m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, + m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, + m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, + m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, + m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, + m68k_op_cmp_32_aw, m68k_op_cmp_32_al, m68k_op_cmp_32_pcdi, m68k_op_cmp_32_pcix, m68k_op_cmp_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, + m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, + m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, + m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, + m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, + m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, + m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, + m68k_op_cmpa_16_aw, m68k_op_cmpa_16_al, m68k_op_cmpa_16_pcdi, m68k_op_cmpa_16_pcix, m68k_op_cmpa_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, + m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8_ay7, + m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, + m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi7, + m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd7, + m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, + m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, + m68k_op_eor_8_aw, m68k_op_eor_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, + m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, + m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, + m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, + m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, + m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, + m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, + m68k_op_eor_16_aw, m68k_op_eor_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, + m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, + m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, + m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, + m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, + m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, + m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, + m68k_op_eor_32_aw, m68k_op_eor_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, + m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, + m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, + m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, + m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, + m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, + m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, + m68k_op_cmpa_32_aw, m68k_op_cmpa_32_al, m68k_op_cmpa_32_pcdi, m68k_op_cmpa_32_pcix, m68k_op_cmpa_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, + m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi7, + m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd7, + m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, + m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, + m68k_op_cmp_8_aw, m68k_op_cmp_8_al, m68k_op_cmp_8_pcdi, m68k_op_cmp_8_pcix, m68k_op_cmp_8_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, + m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, + m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, + m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, + m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, + m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, + m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, + m68k_op_cmp_16_aw, m68k_op_cmp_16_al, m68k_op_cmp_16_pcdi, m68k_op_cmp_16_pcix, m68k_op_cmp_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, + m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, + m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, + m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, + m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, + m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, + m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, + m68k_op_cmp_32_aw, m68k_op_cmp_32_al, m68k_op_cmp_32_pcdi, m68k_op_cmp_32_pcix, m68k_op_cmp_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, + m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, + m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, + m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, + m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, + m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, + m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, + m68k_op_cmpa_16_aw, m68k_op_cmpa_16_al, m68k_op_cmpa_16_pcdi, m68k_op_cmpa_16_pcix, m68k_op_cmpa_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, + m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8_ay7, + m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, + m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi7, + m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd7, + m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, + m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, + m68k_op_eor_8_aw, m68k_op_eor_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, + m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, + m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, + m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, + m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, + m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, + m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, + m68k_op_eor_16_aw, m68k_op_eor_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, + m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, + m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, + m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, + m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, + m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, + m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, + m68k_op_eor_32_aw, m68k_op_eor_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, + m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, + m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, + m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, + m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, + m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, + m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, + m68k_op_cmpa_32_aw, m68k_op_cmpa_32_al, m68k_op_cmpa_32_pcdi, m68k_op_cmpa_32_pcix, m68k_op_cmpa_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, + m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi7, + m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd7, + m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, + m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, + m68k_op_cmp_8_aw, m68k_op_cmp_8_al, m68k_op_cmp_8_pcdi, m68k_op_cmp_8_pcix, m68k_op_cmp_8_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, + m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, + m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, + m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, + m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, + m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, + m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, + m68k_op_cmp_16_aw, m68k_op_cmp_16_al, m68k_op_cmp_16_pcdi, m68k_op_cmp_16_pcix, m68k_op_cmp_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, + m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, + m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, + m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, + m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, + m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, + m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, + m68k_op_cmp_32_aw, m68k_op_cmp_32_al, m68k_op_cmp_32_pcdi, m68k_op_cmp_32_pcix, m68k_op_cmp_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, + m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, + m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, + m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, + m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, + m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, + m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, + m68k_op_cmpa_16_aw, m68k_op_cmpa_16_al, m68k_op_cmpa_16_pcdi, m68k_op_cmpa_16_pcix, m68k_op_cmpa_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, + m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8_ay7, + m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, + m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi7, + m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd7, + m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, + m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, + m68k_op_eor_8_aw, m68k_op_eor_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, + m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, + m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, + m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, + m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, + m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, + m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, + m68k_op_eor_16_aw, m68k_op_eor_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, + m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, + m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, + m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, + m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, + m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, + m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, + m68k_op_eor_32_aw, m68k_op_eor_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, + m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, + m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, + m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, + m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, + m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, + m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, + m68k_op_cmpa_32_aw, m68k_op_cmpa_32_al, m68k_op_cmpa_32_pcdi, m68k_op_cmpa_32_pcix, m68k_op_cmpa_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, + m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi7, + m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd7, + m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, + m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, + m68k_op_cmp_8_aw, m68k_op_cmp_8_al, m68k_op_cmp_8_pcdi, m68k_op_cmp_8_pcix, m68k_op_cmp_8_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, + m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, + m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, + m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, + m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, + m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, + m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, + m68k_op_cmp_16_aw, m68k_op_cmp_16_al, m68k_op_cmp_16_pcdi, m68k_op_cmp_16_pcix, m68k_op_cmp_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, + m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, + m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, + m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, + m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, + m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, + m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, + m68k_op_cmp_32_aw, m68k_op_cmp_32_al, m68k_op_cmp_32_pcdi, m68k_op_cmp_32_pcix, m68k_op_cmp_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, + m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, + m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, + m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, + m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, + m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, + m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, + m68k_op_cmpa_16_aw, m68k_op_cmpa_16_al, m68k_op_cmpa_16_pcdi, m68k_op_cmpa_16_pcix, m68k_op_cmpa_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, + m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8_ay7, + m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, + m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi7, + m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd7, + m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, + m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, + m68k_op_eor_8_aw, m68k_op_eor_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, + m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, + m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, + m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, + m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, + m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, + m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, + m68k_op_eor_16_aw, m68k_op_eor_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, + m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, + m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, + m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, + m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, + m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, + m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, + m68k_op_eor_32_aw, m68k_op_eor_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, + m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, + m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, + m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, + m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, + m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, + m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, + m68k_op_cmpa_32_aw, m68k_op_cmpa_32_al, m68k_op_cmpa_32_pcdi, m68k_op_cmpa_32_pcix, m68k_op_cmpa_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, + m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi7, + m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd7, + m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, + m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, + m68k_op_cmp_8_aw, m68k_op_cmp_8_al, m68k_op_cmp_8_pcdi, m68k_op_cmp_8_pcix, m68k_op_cmp_8_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, + m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, + m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, + m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, + m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, + m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, + m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, + m68k_op_cmp_16_aw, m68k_op_cmp_16_al, m68k_op_cmp_16_pcdi, m68k_op_cmp_16_pcix, m68k_op_cmp_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, + m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, + m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, + m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, + m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, + m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, + m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, + m68k_op_cmp_32_aw, m68k_op_cmp_32_al, m68k_op_cmp_32_pcdi, m68k_op_cmp_32_pcix, m68k_op_cmp_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, + m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, + m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, + m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, + m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, + m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, + m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, + m68k_op_cmpa_16_aw, m68k_op_cmpa_16_al, m68k_op_cmpa_16_pcdi, m68k_op_cmpa_16_pcix, m68k_op_cmpa_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, + m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8, m68k_op_cmpm_8_ay7, + m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, + m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi7, + m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd7, + m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, + m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, + m68k_op_eor_8_aw, m68k_op_eor_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, + m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, + m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, + m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, + m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, + m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, + m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, + m68k_op_eor_16_aw, m68k_op_eor_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, + m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, + m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, + m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, + m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, + m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, + m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, + m68k_op_eor_32_aw, m68k_op_eor_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, + m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, + m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, + m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, + m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, + m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, + m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, + m68k_op_cmpa_32_aw, m68k_op_cmpa_32_al, m68k_op_cmpa_32_pcdi, m68k_op_cmpa_32_pcix, m68k_op_cmpa_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, m68k_op_cmp_8_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, m68k_op_cmp_8_ai, + m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi, m68k_op_cmp_8_pi7, + m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd, m68k_op_cmp_8_pd7, + m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, m68k_op_cmp_8_di, + m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, m68k_op_cmp_8_ix, + m68k_op_cmp_8_aw, m68k_op_cmp_8_al, m68k_op_cmp_8_pcdi, m68k_op_cmp_8_pcix, m68k_op_cmp_8_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, m68k_op_cmp_16_d, + m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, m68k_op_cmp_16_a, + m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, m68k_op_cmp_16_ai, + m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, m68k_op_cmp_16_pi, + m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, m68k_op_cmp_16_pd, + m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, m68k_op_cmp_16_di, + m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, m68k_op_cmp_16_ix, + m68k_op_cmp_16_aw, m68k_op_cmp_16_al, m68k_op_cmp_16_pcdi, m68k_op_cmp_16_pcix, m68k_op_cmp_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, m68k_op_cmp_32_d, + m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, m68k_op_cmp_32_a, + m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, m68k_op_cmp_32_ai, + m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, m68k_op_cmp_32_pi, + m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, m68k_op_cmp_32_pd, + m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, m68k_op_cmp_32_di, + m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, m68k_op_cmp_32_ix, + m68k_op_cmp_32_aw, m68k_op_cmp_32_al, m68k_op_cmp_32_pcdi, m68k_op_cmp_32_pcix, m68k_op_cmp_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, m68k_op_cmpa_16_d, + m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, m68k_op_cmpa_16_a, + m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, m68k_op_cmpa_16_ai, + m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, m68k_op_cmpa_16_pi, + m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, m68k_op_cmpa_16_pd, + m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, m68k_op_cmpa_16_di, + m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, m68k_op_cmpa_16_ix, + m68k_op_cmpa_16_aw, m68k_op_cmpa_16_al, m68k_op_cmpa_16_pcdi, m68k_op_cmpa_16_pcix, m68k_op_cmpa_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, m68k_op_eor_8_d, + m68k_op_cmpm_8_ax7, m68k_op_cmpm_8_ax7, m68k_op_cmpm_8_ax7, m68k_op_cmpm_8_ax7, m68k_op_cmpm_8_ax7, m68k_op_cmpm_8_ax7, m68k_op_cmpm_8_ax7, m68k_op_cmpm_8_axy7, + m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, m68k_op_eor_8_ai, + m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi, m68k_op_eor_8_pi7, + m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd, m68k_op_eor_8_pd7, + m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, m68k_op_eor_8_di, + m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, m68k_op_eor_8_ix, + m68k_op_eor_8_aw, m68k_op_eor_8_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, m68k_op_eor_16_d, + m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, m68k_op_cmpm_16, + m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, m68k_op_eor_16_ai, + m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, m68k_op_eor_16_pi, + m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, m68k_op_eor_16_pd, + m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, m68k_op_eor_16_di, + m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, m68k_op_eor_16_ix, + m68k_op_eor_16_aw, m68k_op_eor_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, m68k_op_eor_32_d, + m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, m68k_op_cmpm_32, + m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, m68k_op_eor_32_ai, + m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, m68k_op_eor_32_pi, + m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, m68k_op_eor_32_pd, + m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, m68k_op_eor_32_di, + m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, m68k_op_eor_32_ix, + m68k_op_eor_32_aw, m68k_op_eor_32_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, m68k_op_cmpa_32_d, + m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, m68k_op_cmpa_32_a, + m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, m68k_op_cmpa_32_ai, + m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, m68k_op_cmpa_32_pi, + m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, m68k_op_cmpa_32_pd, + m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, m68k_op_cmpa_32_di, + m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, m68k_op_cmpa_32_ix, + m68k_op_cmpa_32_aw, m68k_op_cmpa_32_al, m68k_op_cmpa_32_pcdi, m68k_op_cmpa_32_pcix, m68k_op_cmpa_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, + m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi7, + m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd7, + m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, + m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, + m68k_op_and_8_er_aw, m68k_op_and_8_er_al, m68k_op_and_8_er_pcdi, m68k_op_and_8_er_pcix, m68k_op_and_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, + m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, + m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, + m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, + m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, + m68k_op_and_16_er_aw, m68k_op_and_16_er_al, m68k_op_and_16_er_pcdi, m68k_op_and_16_er_pcix, m68k_op_and_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, + m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, + m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, + m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, + m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, + m68k_op_and_32_er_aw, m68k_op_and_32_er_al, m68k_op_and_32_er_pcdi, m68k_op_and_32_er_pcix, m68k_op_and_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, + m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, + m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, + m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, + m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, + m68k_op_mulu_16_aw, m68k_op_mulu_16_al, m68k_op_mulu_16_pcdi, m68k_op_mulu_16_pcix, m68k_op_mulu_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, + m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm_ay7, + m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, + m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi7, + m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd7, + m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, + m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, + m68k_op_and_8_re_aw, m68k_op_and_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, + m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, + m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, + m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, + m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, + m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, + m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, + m68k_op_and_16_re_aw, m68k_op_and_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, + m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, + m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, + m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, + m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, + m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, + m68k_op_and_32_re_aw, m68k_op_and_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, + m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, + m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, + m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, + m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, + m68k_op_muls_16_aw, m68k_op_muls_16_al, m68k_op_muls_16_pcdi, m68k_op_muls_16_pcix, m68k_op_muls_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, + m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi7, + m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd7, + m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, + m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, + m68k_op_and_8_er_aw, m68k_op_and_8_er_al, m68k_op_and_8_er_pcdi, m68k_op_and_8_er_pcix, m68k_op_and_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, + m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, + m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, + m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, + m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, + m68k_op_and_16_er_aw, m68k_op_and_16_er_al, m68k_op_and_16_er_pcdi, m68k_op_and_16_er_pcix, m68k_op_and_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, + m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, + m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, + m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, + m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, + m68k_op_and_32_er_aw, m68k_op_and_32_er_al, m68k_op_and_32_er_pcdi, m68k_op_and_32_er_pcix, m68k_op_and_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, + m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, + m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, + m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, + m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, + m68k_op_mulu_16_aw, m68k_op_mulu_16_al, m68k_op_mulu_16_pcdi, m68k_op_mulu_16_pcix, m68k_op_mulu_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, + m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm_ay7, + m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, + m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi7, + m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd7, + m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, + m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, + m68k_op_and_8_re_aw, m68k_op_and_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, + m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, + m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, + m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, + m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, + m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, + m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, + m68k_op_and_16_re_aw, m68k_op_and_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, + m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, + m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, + m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, + m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, + m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, + m68k_op_and_32_re_aw, m68k_op_and_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, + m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, + m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, + m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, + m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, + m68k_op_muls_16_aw, m68k_op_muls_16_al, m68k_op_muls_16_pcdi, m68k_op_muls_16_pcix, m68k_op_muls_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, + m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi7, + m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd7, + m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, + m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, + m68k_op_and_8_er_aw, m68k_op_and_8_er_al, m68k_op_and_8_er_pcdi, m68k_op_and_8_er_pcix, m68k_op_and_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, + m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, + m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, + m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, + m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, + m68k_op_and_16_er_aw, m68k_op_and_16_er_al, m68k_op_and_16_er_pcdi, m68k_op_and_16_er_pcix, m68k_op_and_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, + m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, + m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, + m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, + m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, + m68k_op_and_32_er_aw, m68k_op_and_32_er_al, m68k_op_and_32_er_pcdi, m68k_op_and_32_er_pcix, m68k_op_and_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, + m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, + m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, + m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, + m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, + m68k_op_mulu_16_aw, m68k_op_mulu_16_al, m68k_op_mulu_16_pcdi, m68k_op_mulu_16_pcix, m68k_op_mulu_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, + m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm_ay7, + m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, + m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi7, + m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd7, + m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, + m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, + m68k_op_and_8_re_aw, m68k_op_and_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, + m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, + m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, + m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, + m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, + m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, + m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, + m68k_op_and_16_re_aw, m68k_op_and_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, + m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, + m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, + m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, + m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, + m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, + m68k_op_and_32_re_aw, m68k_op_and_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, + m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, + m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, + m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, + m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, + m68k_op_muls_16_aw, m68k_op_muls_16_al, m68k_op_muls_16_pcdi, m68k_op_muls_16_pcix, m68k_op_muls_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, + m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi7, + m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd7, + m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, + m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, + m68k_op_and_8_er_aw, m68k_op_and_8_er_al, m68k_op_and_8_er_pcdi, m68k_op_and_8_er_pcix, m68k_op_and_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, + m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, + m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, + m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, + m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, + m68k_op_and_16_er_aw, m68k_op_and_16_er_al, m68k_op_and_16_er_pcdi, m68k_op_and_16_er_pcix, m68k_op_and_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, + m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, + m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, + m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, + m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, + m68k_op_and_32_er_aw, m68k_op_and_32_er_al, m68k_op_and_32_er_pcdi, m68k_op_and_32_er_pcix, m68k_op_and_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, + m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, + m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, + m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, + m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, + m68k_op_mulu_16_aw, m68k_op_mulu_16_al, m68k_op_mulu_16_pcdi, m68k_op_mulu_16_pcix, m68k_op_mulu_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, + m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm_ay7, + m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, + m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi7, + m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd7, + m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, + m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, + m68k_op_and_8_re_aw, m68k_op_and_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, + m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, + m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, + m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, + m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, + m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, + m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, + m68k_op_and_16_re_aw, m68k_op_and_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, + m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, + m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, + m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, + m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, + m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, + m68k_op_and_32_re_aw, m68k_op_and_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, + m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, + m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, + m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, + m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, + m68k_op_muls_16_aw, m68k_op_muls_16_al, m68k_op_muls_16_pcdi, m68k_op_muls_16_pcix, m68k_op_muls_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, + m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi7, + m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd7, + m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, + m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, + m68k_op_and_8_er_aw, m68k_op_and_8_er_al, m68k_op_and_8_er_pcdi, m68k_op_and_8_er_pcix, m68k_op_and_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, + m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, + m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, + m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, + m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, + m68k_op_and_16_er_aw, m68k_op_and_16_er_al, m68k_op_and_16_er_pcdi, m68k_op_and_16_er_pcix, m68k_op_and_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, + m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, + m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, + m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, + m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, + m68k_op_and_32_er_aw, m68k_op_and_32_er_al, m68k_op_and_32_er_pcdi, m68k_op_and_32_er_pcix, m68k_op_and_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, + m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, + m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, + m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, + m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, + m68k_op_mulu_16_aw, m68k_op_mulu_16_al, m68k_op_mulu_16_pcdi, m68k_op_mulu_16_pcix, m68k_op_mulu_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, + m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm_ay7, + m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, + m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi7, + m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd7, + m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, + m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, + m68k_op_and_8_re_aw, m68k_op_and_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, + m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, + m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, + m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, + m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, + m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, + m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, + m68k_op_and_16_re_aw, m68k_op_and_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, + m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, + m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, + m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, + m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, + m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, + m68k_op_and_32_re_aw, m68k_op_and_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, + m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, + m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, + m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, + m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, + m68k_op_muls_16_aw, m68k_op_muls_16_al, m68k_op_muls_16_pcdi, m68k_op_muls_16_pcix, m68k_op_muls_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, + m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi7, + m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd7, + m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, + m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, + m68k_op_and_8_er_aw, m68k_op_and_8_er_al, m68k_op_and_8_er_pcdi, m68k_op_and_8_er_pcix, m68k_op_and_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, + m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, + m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, + m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, + m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, + m68k_op_and_16_er_aw, m68k_op_and_16_er_al, m68k_op_and_16_er_pcdi, m68k_op_and_16_er_pcix, m68k_op_and_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, + m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, + m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, + m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, + m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, + m68k_op_and_32_er_aw, m68k_op_and_32_er_al, m68k_op_and_32_er_pcdi, m68k_op_and_32_er_pcix, m68k_op_and_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, + m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, + m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, + m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, + m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, + m68k_op_mulu_16_aw, m68k_op_mulu_16_al, m68k_op_mulu_16_pcdi, m68k_op_mulu_16_pcix, m68k_op_mulu_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, + m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm_ay7, + m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, + m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi7, + m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd7, + m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, + m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, + m68k_op_and_8_re_aw, m68k_op_and_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, + m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, + m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, + m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, + m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, + m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, + m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, + m68k_op_and_16_re_aw, m68k_op_and_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, + m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, + m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, + m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, + m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, + m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, + m68k_op_and_32_re_aw, m68k_op_and_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, + m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, + m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, + m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, + m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, + m68k_op_muls_16_aw, m68k_op_muls_16_al, m68k_op_muls_16_pcdi, m68k_op_muls_16_pcix, m68k_op_muls_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, + m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi7, + m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd7, + m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, + m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, + m68k_op_and_8_er_aw, m68k_op_and_8_er_al, m68k_op_and_8_er_pcdi, m68k_op_and_8_er_pcix, m68k_op_and_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, + m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, + m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, + m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, + m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, + m68k_op_and_16_er_aw, m68k_op_and_16_er_al, m68k_op_and_16_er_pcdi, m68k_op_and_16_er_pcix, m68k_op_and_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, + m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, + m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, + m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, + m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, + m68k_op_and_32_er_aw, m68k_op_and_32_er_al, m68k_op_and_32_er_pcdi, m68k_op_and_32_er_pcix, m68k_op_and_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, + m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, + m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, + m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, + m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, + m68k_op_mulu_16_aw, m68k_op_mulu_16_al, m68k_op_mulu_16_pcdi, m68k_op_mulu_16_pcix, m68k_op_mulu_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, + m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm, m68k_op_abcd_8_mm_ay7, + m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, + m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi7, + m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd7, + m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, + m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, + m68k_op_and_8_re_aw, m68k_op_and_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, + m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, + m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, + m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, + m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, + m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, + m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, + m68k_op_and_16_re_aw, m68k_op_and_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, + m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, + m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, + m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, + m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, + m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, + m68k_op_and_32_re_aw, m68k_op_and_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, + m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, + m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, + m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, + m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, + m68k_op_muls_16_aw, m68k_op_muls_16_al, m68k_op_muls_16_pcdi, m68k_op_muls_16_pcix, m68k_op_muls_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, m68k_op_and_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, m68k_op_and_8_er_ai, + m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi, m68k_op_and_8_er_pi7, + m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd, m68k_op_and_8_er_pd7, + m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, m68k_op_and_8_er_di, + m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, m68k_op_and_8_er_ix, + m68k_op_and_8_er_aw, m68k_op_and_8_er_al, m68k_op_and_8_er_pcdi, m68k_op_and_8_er_pcix, m68k_op_and_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, m68k_op_and_16_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, m68k_op_and_16_er_ai, + m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, m68k_op_and_16_er_pi, + m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, m68k_op_and_16_er_pd, + m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, m68k_op_and_16_er_di, + m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, m68k_op_and_16_er_ix, + m68k_op_and_16_er_aw, m68k_op_and_16_er_al, m68k_op_and_16_er_pcdi, m68k_op_and_16_er_pcix, m68k_op_and_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, m68k_op_and_32_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, m68k_op_and_32_er_ai, + m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, m68k_op_and_32_er_pi, + m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, m68k_op_and_32_er_pd, + m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, m68k_op_and_32_er_di, + m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, m68k_op_and_32_er_ix, + m68k_op_and_32_er_aw, m68k_op_and_32_er_al, m68k_op_and_32_er_pcdi, m68k_op_and_32_er_pcix, m68k_op_and_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, m68k_op_mulu_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, m68k_op_mulu_16_ai, + m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, m68k_op_mulu_16_pi, + m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, m68k_op_mulu_16_pd, + m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, m68k_op_mulu_16_di, + m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, m68k_op_mulu_16_ix, + m68k_op_mulu_16_aw, m68k_op_mulu_16_al, m68k_op_mulu_16_pcdi, m68k_op_mulu_16_pcix, m68k_op_mulu_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, m68k_op_abcd_8_rr, + m68k_op_abcd_8_mm_ax7, m68k_op_abcd_8_mm_ax7, m68k_op_abcd_8_mm_ax7, m68k_op_abcd_8_mm_ax7, m68k_op_abcd_8_mm_ax7, m68k_op_abcd_8_mm_ax7, m68k_op_abcd_8_mm_ax7, m68k_op_abcd_8_mm_axy7, + m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, m68k_op_and_8_re_ai, + m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi, m68k_op_and_8_re_pi7, + m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd, m68k_op_and_8_re_pd7, + m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, m68k_op_and_8_re_di, + m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, m68k_op_and_8_re_ix, + m68k_op_and_8_re_aw, m68k_op_and_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, m68k_op_exg_32_dd, + m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, m68k_op_exg_32_aa, + m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, m68k_op_and_16_re_ai, + m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, m68k_op_and_16_re_pi, + m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, m68k_op_and_16_re_pd, + m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, m68k_op_and_16_re_di, + m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, m68k_op_and_16_re_ix, + m68k_op_and_16_re_aw, m68k_op_and_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, m68k_op_exg_32_da, + m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, m68k_op_and_32_re_ai, + m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, m68k_op_and_32_re_pi, + m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, m68k_op_and_32_re_pd, + m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, m68k_op_and_32_re_di, + m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, m68k_op_and_32_re_ix, + m68k_op_and_32_re_aw, m68k_op_and_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, m68k_op_muls_16_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, m68k_op_muls_16_ai, + m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, m68k_op_muls_16_pi, + m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, m68k_op_muls_16_pd, + m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, m68k_op_muls_16_di, + m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, m68k_op_muls_16_ix, + m68k_op_muls_16_aw, m68k_op_muls_16_al, m68k_op_muls_16_pcdi, m68k_op_muls_16_pcix, m68k_op_muls_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, + m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi7, + m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd7, + m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, + m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, + m68k_op_add_8_er_aw, m68k_op_add_8_er_al, m68k_op_add_8_er_pcdi, m68k_op_add_8_er_pcix, m68k_op_add_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, + m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, + m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, + m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, + m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, + m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, + m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, + m68k_op_add_16_er_aw, m68k_op_add_16_er_al, m68k_op_add_16_er_pcdi, m68k_op_add_16_er_pcix, m68k_op_add_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, + m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, + m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, + m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, + m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, + m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, + m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, + m68k_op_add_32_er_aw, m68k_op_add_32_er_al, m68k_op_add_32_er_pcdi, m68k_op_add_32_er_pcix, m68k_op_add_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, + m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, + m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, + m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, + m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, + m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, + m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, + m68k_op_adda_16_aw, m68k_op_adda_16_al, m68k_op_adda_16_pcdi, m68k_op_adda_16_pcix, m68k_op_adda_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, + m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm_ay7, + m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, + m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi7, + m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd7, + m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, + m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, + m68k_op_add_8_re_aw, m68k_op_add_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, + m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, + m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, + m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, + m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, + m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, + m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, + m68k_op_add_16_re_aw, m68k_op_add_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, + m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, + m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, + m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, + m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, + m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, + m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, + m68k_op_add_32_re_aw, m68k_op_add_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, + m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, + m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, + m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, + m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, + m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, + m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, + m68k_op_adda_32_aw, m68k_op_adda_32_al, m68k_op_adda_32_pcdi, m68k_op_adda_32_pcix, m68k_op_adda_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, + m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi7, + m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd7, + m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, + m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, + m68k_op_add_8_er_aw, m68k_op_add_8_er_al, m68k_op_add_8_er_pcdi, m68k_op_add_8_er_pcix, m68k_op_add_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, + m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, + m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, + m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, + m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, + m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, + m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, + m68k_op_add_16_er_aw, m68k_op_add_16_er_al, m68k_op_add_16_er_pcdi, m68k_op_add_16_er_pcix, m68k_op_add_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, + m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, + m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, + m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, + m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, + m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, + m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, + m68k_op_add_32_er_aw, m68k_op_add_32_er_al, m68k_op_add_32_er_pcdi, m68k_op_add_32_er_pcix, m68k_op_add_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, + m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, + m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, + m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, + m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, + m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, + m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, + m68k_op_adda_16_aw, m68k_op_adda_16_al, m68k_op_adda_16_pcdi, m68k_op_adda_16_pcix, m68k_op_adda_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, + m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm_ay7, + m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, + m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi7, + m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd7, + m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, + m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, + m68k_op_add_8_re_aw, m68k_op_add_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, + m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, + m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, + m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, + m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, + m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, + m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, + m68k_op_add_16_re_aw, m68k_op_add_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, + m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, + m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, + m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, + m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, + m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, + m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, + m68k_op_add_32_re_aw, m68k_op_add_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, + m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, + m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, + m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, + m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, + m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, + m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, + m68k_op_adda_32_aw, m68k_op_adda_32_al, m68k_op_adda_32_pcdi, m68k_op_adda_32_pcix, m68k_op_adda_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, + m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi7, + m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd7, + m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, + m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, + m68k_op_add_8_er_aw, m68k_op_add_8_er_al, m68k_op_add_8_er_pcdi, m68k_op_add_8_er_pcix, m68k_op_add_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, + m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, + m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, + m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, + m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, + m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, + m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, + m68k_op_add_16_er_aw, m68k_op_add_16_er_al, m68k_op_add_16_er_pcdi, m68k_op_add_16_er_pcix, m68k_op_add_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, + m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, + m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, + m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, + m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, + m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, + m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, + m68k_op_add_32_er_aw, m68k_op_add_32_er_al, m68k_op_add_32_er_pcdi, m68k_op_add_32_er_pcix, m68k_op_add_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, + m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, + m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, + m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, + m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, + m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, + m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, + m68k_op_adda_16_aw, m68k_op_adda_16_al, m68k_op_adda_16_pcdi, m68k_op_adda_16_pcix, m68k_op_adda_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, + m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm_ay7, + m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, + m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi7, + m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd7, + m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, + m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, + m68k_op_add_8_re_aw, m68k_op_add_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, + m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, + m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, + m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, + m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, + m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, + m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, + m68k_op_add_16_re_aw, m68k_op_add_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, + m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, + m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, + m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, + m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, + m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, + m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, + m68k_op_add_32_re_aw, m68k_op_add_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, + m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, + m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, + m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, + m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, + m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, + m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, + m68k_op_adda_32_aw, m68k_op_adda_32_al, m68k_op_adda_32_pcdi, m68k_op_adda_32_pcix, m68k_op_adda_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, + m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi7, + m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd7, + m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, + m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, + m68k_op_add_8_er_aw, m68k_op_add_8_er_al, m68k_op_add_8_er_pcdi, m68k_op_add_8_er_pcix, m68k_op_add_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, + m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, + m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, + m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, + m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, + m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, + m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, + m68k_op_add_16_er_aw, m68k_op_add_16_er_al, m68k_op_add_16_er_pcdi, m68k_op_add_16_er_pcix, m68k_op_add_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, + m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, + m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, + m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, + m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, + m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, + m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, + m68k_op_add_32_er_aw, m68k_op_add_32_er_al, m68k_op_add_32_er_pcdi, m68k_op_add_32_er_pcix, m68k_op_add_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, + m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, + m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, + m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, + m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, + m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, + m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, + m68k_op_adda_16_aw, m68k_op_adda_16_al, m68k_op_adda_16_pcdi, m68k_op_adda_16_pcix, m68k_op_adda_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, + m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm_ay7, + m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, + m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi7, + m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd7, + m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, + m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, + m68k_op_add_8_re_aw, m68k_op_add_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, + m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, + m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, + m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, + m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, + m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, + m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, + m68k_op_add_16_re_aw, m68k_op_add_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, + m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, + m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, + m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, + m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, + m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, + m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, + m68k_op_add_32_re_aw, m68k_op_add_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, + m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, + m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, + m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, + m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, + m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, + m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, + m68k_op_adda_32_aw, m68k_op_adda_32_al, m68k_op_adda_32_pcdi, m68k_op_adda_32_pcix, m68k_op_adda_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, + m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi7, + m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd7, + m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, + m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, + m68k_op_add_8_er_aw, m68k_op_add_8_er_al, m68k_op_add_8_er_pcdi, m68k_op_add_8_er_pcix, m68k_op_add_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, + m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, + m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, + m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, + m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, + m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, + m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, + m68k_op_add_16_er_aw, m68k_op_add_16_er_al, m68k_op_add_16_er_pcdi, m68k_op_add_16_er_pcix, m68k_op_add_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, + m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, + m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, + m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, + m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, + m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, + m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, + m68k_op_add_32_er_aw, m68k_op_add_32_er_al, m68k_op_add_32_er_pcdi, m68k_op_add_32_er_pcix, m68k_op_add_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, + m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, + m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, + m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, + m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, + m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, + m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, + m68k_op_adda_16_aw, m68k_op_adda_16_al, m68k_op_adda_16_pcdi, m68k_op_adda_16_pcix, m68k_op_adda_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, + m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm_ay7, + m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, + m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi7, + m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd7, + m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, + m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, + m68k_op_add_8_re_aw, m68k_op_add_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, + m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, + m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, + m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, + m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, + m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, + m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, + m68k_op_add_16_re_aw, m68k_op_add_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, + m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, + m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, + m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, + m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, + m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, + m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, + m68k_op_add_32_re_aw, m68k_op_add_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, + m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, + m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, + m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, + m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, + m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, + m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, + m68k_op_adda_32_aw, m68k_op_adda_32_al, m68k_op_adda_32_pcdi, m68k_op_adda_32_pcix, m68k_op_adda_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, + m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi7, + m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd7, + m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, + m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, + m68k_op_add_8_er_aw, m68k_op_add_8_er_al, m68k_op_add_8_er_pcdi, m68k_op_add_8_er_pcix, m68k_op_add_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, + m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, + m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, + m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, + m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, + m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, + m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, + m68k_op_add_16_er_aw, m68k_op_add_16_er_al, m68k_op_add_16_er_pcdi, m68k_op_add_16_er_pcix, m68k_op_add_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, + m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, + m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, + m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, + m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, + m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, + m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, + m68k_op_add_32_er_aw, m68k_op_add_32_er_al, m68k_op_add_32_er_pcdi, m68k_op_add_32_er_pcix, m68k_op_add_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, + m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, + m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, + m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, + m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, + m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, + m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, + m68k_op_adda_16_aw, m68k_op_adda_16_al, m68k_op_adda_16_pcdi, m68k_op_adda_16_pcix, m68k_op_adda_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, + m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm_ay7, + m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, + m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi7, + m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd7, + m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, + m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, + m68k_op_add_8_re_aw, m68k_op_add_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, + m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, + m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, + m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, + m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, + m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, + m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, + m68k_op_add_16_re_aw, m68k_op_add_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, + m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, + m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, + m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, + m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, + m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, + m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, + m68k_op_add_32_re_aw, m68k_op_add_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, + m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, + m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, + m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, + m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, + m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, + m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, + m68k_op_adda_32_aw, m68k_op_adda_32_al, m68k_op_adda_32_pcdi, m68k_op_adda_32_pcix, m68k_op_adda_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, + m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi7, + m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd7, + m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, + m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, + m68k_op_add_8_er_aw, m68k_op_add_8_er_al, m68k_op_add_8_er_pcdi, m68k_op_add_8_er_pcix, m68k_op_add_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, + m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, + m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, + m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, + m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, + m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, + m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, + m68k_op_add_16_er_aw, m68k_op_add_16_er_al, m68k_op_add_16_er_pcdi, m68k_op_add_16_er_pcix, m68k_op_add_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, + m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, + m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, + m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, + m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, + m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, + m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, + m68k_op_add_32_er_aw, m68k_op_add_32_er_al, m68k_op_add_32_er_pcdi, m68k_op_add_32_er_pcix, m68k_op_add_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, + m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, + m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, + m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, + m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, + m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, + m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, + m68k_op_adda_16_aw, m68k_op_adda_16_al, m68k_op_adda_16_pcdi, m68k_op_adda_16_pcix, m68k_op_adda_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, + m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm, m68k_op_addx_8_mm_ay7, + m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, + m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi7, + m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd7, + m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, + m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, + m68k_op_add_8_re_aw, m68k_op_add_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, + m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, + m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, + m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, + m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, + m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, + m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, + m68k_op_add_16_re_aw, m68k_op_add_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, + m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, + m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, + m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, + m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, + m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, + m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, + m68k_op_add_32_re_aw, m68k_op_add_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, + m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, + m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, + m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, + m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, + m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, + m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, + m68k_op_adda_32_aw, m68k_op_adda_32_al, m68k_op_adda_32_pcdi, m68k_op_adda_32_pcix, m68k_op_adda_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, m68k_op_add_8_er_d, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, m68k_op_add_8_er_ai, + m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi, m68k_op_add_8_er_pi7, + m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd, m68k_op_add_8_er_pd7, + m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, m68k_op_add_8_er_di, + m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, m68k_op_add_8_er_ix, + m68k_op_add_8_er_aw, m68k_op_add_8_er_al, m68k_op_add_8_er_pcdi, m68k_op_add_8_er_pcix, m68k_op_add_8_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, m68k_op_add_16_er_d, + m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, m68k_op_add_16_er_a, + m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, m68k_op_add_16_er_ai, + m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, m68k_op_add_16_er_pi, + m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, m68k_op_add_16_er_pd, + m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, m68k_op_add_16_er_di, + m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, m68k_op_add_16_er_ix, + m68k_op_add_16_er_aw, m68k_op_add_16_er_al, m68k_op_add_16_er_pcdi, m68k_op_add_16_er_pcix, m68k_op_add_16_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, m68k_op_add_32_er_d, + m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, m68k_op_add_32_er_a, + m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, m68k_op_add_32_er_ai, + m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, m68k_op_add_32_er_pi, + m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, m68k_op_add_32_er_pd, + m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, m68k_op_add_32_er_di, + m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, m68k_op_add_32_er_ix, + m68k_op_add_32_er_aw, m68k_op_add_32_er_al, m68k_op_add_32_er_pcdi, m68k_op_add_32_er_pcix, m68k_op_add_32_er_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, m68k_op_adda_16_d, + m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, m68k_op_adda_16_a, + m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, m68k_op_adda_16_ai, + m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, m68k_op_adda_16_pi, + m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, m68k_op_adda_16_pd, + m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, m68k_op_adda_16_di, + m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, m68k_op_adda_16_ix, + m68k_op_adda_16_aw, m68k_op_adda_16_al, m68k_op_adda_16_pcdi, m68k_op_adda_16_pcix, m68k_op_adda_16_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, m68k_op_addx_8_rr, + m68k_op_addx_8_mm_ax7, m68k_op_addx_8_mm_ax7, m68k_op_addx_8_mm_ax7, m68k_op_addx_8_mm_ax7, m68k_op_addx_8_mm_ax7, m68k_op_addx_8_mm_ax7, m68k_op_addx_8_mm_ax7, m68k_op_addx_8_mm_axy7, + m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, m68k_op_add_8_re_ai, + m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi, m68k_op_add_8_re_pi7, + m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd, m68k_op_add_8_re_pd7, + m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, m68k_op_add_8_re_di, + m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, m68k_op_add_8_re_ix, + m68k_op_add_8_re_aw, m68k_op_add_8_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, m68k_op_addx_16_rr, + m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, m68k_op_addx_16_mm, + m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, m68k_op_add_16_re_ai, + m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, m68k_op_add_16_re_pi, + m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, m68k_op_add_16_re_pd, + m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, m68k_op_add_16_re_di, + m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, m68k_op_add_16_re_ix, + m68k_op_add_16_re_aw, m68k_op_add_16_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, m68k_op_addx_32_rr, + m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, m68k_op_addx_32_mm, + m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, m68k_op_add_32_re_ai, + m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, m68k_op_add_32_re_pi, + m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, m68k_op_add_32_re_pd, + m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, m68k_op_add_32_re_di, + m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, m68k_op_add_32_re_ix, + m68k_op_add_32_re_aw, m68k_op_add_32_re_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, m68k_op_adda_32_d, + m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, m68k_op_adda_32_a, + m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, m68k_op_adda_32_ai, + m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, m68k_op_adda_32_pi, + m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, m68k_op_adda_32_pd, + m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, m68k_op_adda_32_di, + m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, m68k_op_adda_32_ix, + m68k_op_adda_32_aw, m68k_op_adda_32_al, m68k_op_adda_32_pcdi, m68k_op_adda_32_pcix, m68k_op_adda_32_i, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, + m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, + m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, + m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, + m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, + m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, + m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, + m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, + m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, + m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, + m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, + m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, + m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, + m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, + m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, + m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, + m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, + m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, + m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, + m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, + m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, + m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, + m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, + m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_asr_16_ai, m68k_op_asr_16_ai, m68k_op_asr_16_ai, m68k_op_asr_16_ai, m68k_op_asr_16_ai, m68k_op_asr_16_ai, m68k_op_asr_16_ai, m68k_op_asr_16_ai, + m68k_op_asr_16_pi, m68k_op_asr_16_pi, m68k_op_asr_16_pi, m68k_op_asr_16_pi, m68k_op_asr_16_pi, m68k_op_asr_16_pi, m68k_op_asr_16_pi, m68k_op_asr_16_pi, + m68k_op_asr_16_pd, m68k_op_asr_16_pd, m68k_op_asr_16_pd, m68k_op_asr_16_pd, m68k_op_asr_16_pd, m68k_op_asr_16_pd, m68k_op_asr_16_pd, m68k_op_asr_16_pd, + m68k_op_asr_16_di, m68k_op_asr_16_di, m68k_op_asr_16_di, m68k_op_asr_16_di, m68k_op_asr_16_di, m68k_op_asr_16_di, m68k_op_asr_16_di, m68k_op_asr_16_di, + m68k_op_asr_16_ix, m68k_op_asr_16_ix, m68k_op_asr_16_ix, m68k_op_asr_16_ix, m68k_op_asr_16_ix, m68k_op_asr_16_ix, m68k_op_asr_16_ix, m68k_op_asr_16_ix, + m68k_op_asr_16_aw, m68k_op_asr_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, + m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, + m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, + m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, + m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, + m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, + m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, + m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, + m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, + m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, + m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, + m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, + m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, + m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, + m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, + m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, + m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, + m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, + m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, + m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, + m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, + m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, + m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, + m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_asl_16_ai, m68k_op_asl_16_ai, m68k_op_asl_16_ai, m68k_op_asl_16_ai, m68k_op_asl_16_ai, m68k_op_asl_16_ai, m68k_op_asl_16_ai, m68k_op_asl_16_ai, + m68k_op_asl_16_pi, m68k_op_asl_16_pi, m68k_op_asl_16_pi, m68k_op_asl_16_pi, m68k_op_asl_16_pi, m68k_op_asl_16_pi, m68k_op_asl_16_pi, m68k_op_asl_16_pi, + m68k_op_asl_16_pd, m68k_op_asl_16_pd, m68k_op_asl_16_pd, m68k_op_asl_16_pd, m68k_op_asl_16_pd, m68k_op_asl_16_pd, m68k_op_asl_16_pd, m68k_op_asl_16_pd, + m68k_op_asl_16_di, m68k_op_asl_16_di, m68k_op_asl_16_di, m68k_op_asl_16_di, m68k_op_asl_16_di, m68k_op_asl_16_di, m68k_op_asl_16_di, m68k_op_asl_16_di, + m68k_op_asl_16_ix, m68k_op_asl_16_ix, m68k_op_asl_16_ix, m68k_op_asl_16_ix, m68k_op_asl_16_ix, m68k_op_asl_16_ix, m68k_op_asl_16_ix, m68k_op_asl_16_ix, + m68k_op_asl_16_aw, m68k_op_asl_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, + m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, + m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, + m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, + m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, + m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, + m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, + m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, + m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, + m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, + m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, + m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, + m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, + m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, + m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, + m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, + m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, + m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, + m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, + m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, + m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, + m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, + m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, + m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_lsr_16_ai, m68k_op_lsr_16_ai, m68k_op_lsr_16_ai, m68k_op_lsr_16_ai, m68k_op_lsr_16_ai, m68k_op_lsr_16_ai, m68k_op_lsr_16_ai, m68k_op_lsr_16_ai, + m68k_op_lsr_16_pi, m68k_op_lsr_16_pi, m68k_op_lsr_16_pi, m68k_op_lsr_16_pi, m68k_op_lsr_16_pi, m68k_op_lsr_16_pi, m68k_op_lsr_16_pi, m68k_op_lsr_16_pi, + m68k_op_lsr_16_pd, m68k_op_lsr_16_pd, m68k_op_lsr_16_pd, m68k_op_lsr_16_pd, m68k_op_lsr_16_pd, m68k_op_lsr_16_pd, m68k_op_lsr_16_pd, m68k_op_lsr_16_pd, + m68k_op_lsr_16_di, m68k_op_lsr_16_di, m68k_op_lsr_16_di, m68k_op_lsr_16_di, m68k_op_lsr_16_di, m68k_op_lsr_16_di, m68k_op_lsr_16_di, m68k_op_lsr_16_di, + m68k_op_lsr_16_ix, m68k_op_lsr_16_ix, m68k_op_lsr_16_ix, m68k_op_lsr_16_ix, m68k_op_lsr_16_ix, m68k_op_lsr_16_ix, m68k_op_lsr_16_ix, m68k_op_lsr_16_ix, + m68k_op_lsr_16_aw, m68k_op_lsr_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, + m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, + m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, + m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, + m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, + m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, + m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, + m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, + m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, + m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, + m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, + m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, + m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, + m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, + m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, + m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, + m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, + m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, + m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, + m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, + m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, + m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, + m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, + m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_lsl_16_ai, m68k_op_lsl_16_ai, m68k_op_lsl_16_ai, m68k_op_lsl_16_ai, m68k_op_lsl_16_ai, m68k_op_lsl_16_ai, m68k_op_lsl_16_ai, m68k_op_lsl_16_ai, + m68k_op_lsl_16_pi, m68k_op_lsl_16_pi, m68k_op_lsl_16_pi, m68k_op_lsl_16_pi, m68k_op_lsl_16_pi, m68k_op_lsl_16_pi, m68k_op_lsl_16_pi, m68k_op_lsl_16_pi, + m68k_op_lsl_16_pd, m68k_op_lsl_16_pd, m68k_op_lsl_16_pd, m68k_op_lsl_16_pd, m68k_op_lsl_16_pd, m68k_op_lsl_16_pd, m68k_op_lsl_16_pd, m68k_op_lsl_16_pd, + m68k_op_lsl_16_di, m68k_op_lsl_16_di, m68k_op_lsl_16_di, m68k_op_lsl_16_di, m68k_op_lsl_16_di, m68k_op_lsl_16_di, m68k_op_lsl_16_di, m68k_op_lsl_16_di, + m68k_op_lsl_16_ix, m68k_op_lsl_16_ix, m68k_op_lsl_16_ix, m68k_op_lsl_16_ix, m68k_op_lsl_16_ix, m68k_op_lsl_16_ix, m68k_op_lsl_16_ix, m68k_op_lsl_16_ix, + m68k_op_lsl_16_aw, m68k_op_lsl_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, + m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, + m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, + m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, + m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, + m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, + m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, + m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, + m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, + m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, + m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, + m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, + m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, + m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, + m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, + m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, + m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, + m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, + m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, + m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, + m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, + m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, + m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, + m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_roxr_16_ai, m68k_op_roxr_16_ai, m68k_op_roxr_16_ai, m68k_op_roxr_16_ai, m68k_op_roxr_16_ai, m68k_op_roxr_16_ai, m68k_op_roxr_16_ai, m68k_op_roxr_16_ai, + m68k_op_roxr_16_pi, m68k_op_roxr_16_pi, m68k_op_roxr_16_pi, m68k_op_roxr_16_pi, m68k_op_roxr_16_pi, m68k_op_roxr_16_pi, m68k_op_roxr_16_pi, m68k_op_roxr_16_pi, + m68k_op_roxr_16_pd, m68k_op_roxr_16_pd, m68k_op_roxr_16_pd, m68k_op_roxr_16_pd, m68k_op_roxr_16_pd, m68k_op_roxr_16_pd, m68k_op_roxr_16_pd, m68k_op_roxr_16_pd, + m68k_op_roxr_16_di, m68k_op_roxr_16_di, m68k_op_roxr_16_di, m68k_op_roxr_16_di, m68k_op_roxr_16_di, m68k_op_roxr_16_di, m68k_op_roxr_16_di, m68k_op_roxr_16_di, + m68k_op_roxr_16_ix, m68k_op_roxr_16_ix, m68k_op_roxr_16_ix, m68k_op_roxr_16_ix, m68k_op_roxr_16_ix, m68k_op_roxr_16_ix, m68k_op_roxr_16_ix, m68k_op_roxr_16_ix, + m68k_op_roxr_16_aw, m68k_op_roxr_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, + m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, + m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, + m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, + m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, + m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, + m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, + m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, + m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, + m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, + m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, + m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, + m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, + m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, + m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, + m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, + m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, + m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, + m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, + m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, + m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, + m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, + m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, + m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_roxl_16_ai, m68k_op_roxl_16_ai, m68k_op_roxl_16_ai, m68k_op_roxl_16_ai, m68k_op_roxl_16_ai, m68k_op_roxl_16_ai, m68k_op_roxl_16_ai, m68k_op_roxl_16_ai, + m68k_op_roxl_16_pi, m68k_op_roxl_16_pi, m68k_op_roxl_16_pi, m68k_op_roxl_16_pi, m68k_op_roxl_16_pi, m68k_op_roxl_16_pi, m68k_op_roxl_16_pi, m68k_op_roxl_16_pi, + m68k_op_roxl_16_pd, m68k_op_roxl_16_pd, m68k_op_roxl_16_pd, m68k_op_roxl_16_pd, m68k_op_roxl_16_pd, m68k_op_roxl_16_pd, m68k_op_roxl_16_pd, m68k_op_roxl_16_pd, + m68k_op_roxl_16_di, m68k_op_roxl_16_di, m68k_op_roxl_16_di, m68k_op_roxl_16_di, m68k_op_roxl_16_di, m68k_op_roxl_16_di, m68k_op_roxl_16_di, m68k_op_roxl_16_di, + m68k_op_roxl_16_ix, m68k_op_roxl_16_ix, m68k_op_roxl_16_ix, m68k_op_roxl_16_ix, m68k_op_roxl_16_ix, m68k_op_roxl_16_ix, m68k_op_roxl_16_ix, m68k_op_roxl_16_ix, + m68k_op_roxl_16_aw, m68k_op_roxl_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, + m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, + m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, + m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, + m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, + m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, + m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, + m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, + m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, + m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, + m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, + m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, + m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, + m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, + m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, + m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, + m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, + m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, + m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, + m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, + m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, + m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, + m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, + m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_ror_16_ai, m68k_op_ror_16_ai, m68k_op_ror_16_ai, m68k_op_ror_16_ai, m68k_op_ror_16_ai, m68k_op_ror_16_ai, m68k_op_ror_16_ai, m68k_op_ror_16_ai, + m68k_op_ror_16_pi, m68k_op_ror_16_pi, m68k_op_ror_16_pi, m68k_op_ror_16_pi, m68k_op_ror_16_pi, m68k_op_ror_16_pi, m68k_op_ror_16_pi, m68k_op_ror_16_pi, + m68k_op_ror_16_pd, m68k_op_ror_16_pd, m68k_op_ror_16_pd, m68k_op_ror_16_pd, m68k_op_ror_16_pd, m68k_op_ror_16_pd, m68k_op_ror_16_pd, m68k_op_ror_16_pd, + m68k_op_ror_16_di, m68k_op_ror_16_di, m68k_op_ror_16_di, m68k_op_ror_16_di, m68k_op_ror_16_di, m68k_op_ror_16_di, m68k_op_ror_16_di, m68k_op_ror_16_di, + m68k_op_ror_16_ix, m68k_op_ror_16_ix, m68k_op_ror_16_ix, m68k_op_ror_16_ix, m68k_op_ror_16_ix, m68k_op_ror_16_ix, m68k_op_ror_16_ix, m68k_op_ror_16_ix, + m68k_op_ror_16_aw, m68k_op_ror_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, + m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, + m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, + m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, + m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, + m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, + m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, + m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, + m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, + m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, + m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, + m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, + m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, + m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, + m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, + m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, + m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, + m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, + m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, + m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, + m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, + m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, + m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, + m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_rol_16_ai, m68k_op_rol_16_ai, m68k_op_rol_16_ai, m68k_op_rol_16_ai, m68k_op_rol_16_ai, m68k_op_rol_16_ai, m68k_op_rol_16_ai, m68k_op_rol_16_ai, + m68k_op_rol_16_pi, m68k_op_rol_16_pi, m68k_op_rol_16_pi, m68k_op_rol_16_pi, m68k_op_rol_16_pi, m68k_op_rol_16_pi, m68k_op_rol_16_pi, m68k_op_rol_16_pi, + m68k_op_rol_16_pd, m68k_op_rol_16_pd, m68k_op_rol_16_pd, m68k_op_rol_16_pd, m68k_op_rol_16_pd, m68k_op_rol_16_pd, m68k_op_rol_16_pd, m68k_op_rol_16_pd, + m68k_op_rol_16_di, m68k_op_rol_16_di, m68k_op_rol_16_di, m68k_op_rol_16_di, m68k_op_rol_16_di, m68k_op_rol_16_di, m68k_op_rol_16_di, m68k_op_rol_16_di, + m68k_op_rol_16_ix, m68k_op_rol_16_ix, m68k_op_rol_16_ix, m68k_op_rol_16_ix, m68k_op_rol_16_ix, m68k_op_rol_16_ix, m68k_op_rol_16_ix, m68k_op_rol_16_ix, + m68k_op_rol_16_aw, m68k_op_rol_16_al, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, + m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, + m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, + m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, + m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, + m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, + m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, + m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, + m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, + m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, + m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, + m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, + m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, + m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, + m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, + m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, + m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, + m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, + m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, + m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, + m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, + m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, + m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, + m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, + m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, + m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, + m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, + m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, + m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, + m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, + m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, + m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, + m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, + m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, + m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, + m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, + m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, + m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, + m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, + m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, + m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, + m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, + m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, + m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, + m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, + m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, + m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, + m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, + m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, + m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, + m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, + m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, + m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, + m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, + m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, + m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, + m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, + m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, + m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, + m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, + m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, + m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, + m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, + m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, + m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, + m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, + m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, + m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, + m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, + m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, + m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, + m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, + m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, + m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, + m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, + m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, + m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, + m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, + m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, + m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, + m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, + m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, + m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, + m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, + m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, + m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, + m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, + m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, + m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, + m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, + m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, + m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, + m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, + m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, + m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, + m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, + m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, + m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, + m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, + m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, + m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, + m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, + m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, + m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, + m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, + m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, + m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, + m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, + m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, + m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, + m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, + m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, + m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, + m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, + m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, + m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, + m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, + m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, + m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, + m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, + m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, + m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, + m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, + m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, + m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, + m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, + m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, + m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, + m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, + m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, + m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, + m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, + m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, + m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, + m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, + m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, + m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, + m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, + m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, m68k_op_asr_8_s, + m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, m68k_op_lsr_8_s, + m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, m68k_op_roxr_8_s, + m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, m68k_op_ror_8_s, + m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, m68k_op_asr_8_r, + m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, m68k_op_lsr_8_r, + m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, m68k_op_roxr_8_r, + m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, m68k_op_ror_8_r, + m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, m68k_op_asr_16_s, + m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, m68k_op_lsr_16_s, + m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, m68k_op_roxr_16_s, + m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, m68k_op_ror_16_s, + m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, m68k_op_asr_16_r, + m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, m68k_op_lsr_16_r, + m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, m68k_op_roxr_16_r, + m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, m68k_op_ror_16_r, + m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, m68k_op_asr_32_s, + m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, m68k_op_lsr_32_s, + m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, m68k_op_roxr_32_s, + m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, m68k_op_ror_32_s, + m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, m68k_op_asr_32_r, + m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, m68k_op_lsr_32_r, + m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, m68k_op_roxr_32_r, + m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, m68k_op_ror_32_r, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, m68k_op_asl_8_s, + m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, m68k_op_lsl_8_s, + m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, m68k_op_roxl_8_s, + m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, m68k_op_rol_8_s, + m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, m68k_op_asl_8_r, + m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, m68k_op_lsl_8_r, + m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, m68k_op_roxl_8_r, + m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, m68k_op_rol_8_r, + m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, m68k_op_asl_16_s, + m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, m68k_op_lsl_16_s, + m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, m68k_op_roxl_16_s, + m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, m68k_op_rol_16_s, + m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, m68k_op_asl_16_r, + m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, m68k_op_lsl_16_r, + m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, m68k_op_roxl_16_r, + m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, m68k_op_rol_16_r, + m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, m68k_op_asl_32_s, + m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, m68k_op_lsl_32_s, + m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, m68k_op_roxl_32_s, + m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, m68k_op_rol_32_s, + m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, m68k_op_asl_32_r, + m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, m68k_op_lsl_32_r, + m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, m68k_op_roxl_32_r, + m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, m68k_op_rol_32_r, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, m68k_op_illegal, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, + m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, m68k_op_1111, +}; diff --git a/genplus-gx/core/m68k/m68kops.h b/genplus-gx/core/m68k/m68kops.h new file mode 100644 index 0000000000..fd5110e771 --- /dev/null +++ b/genplus-gx/core/m68k/m68kops.h @@ -0,0 +1,25461 @@ + +/* ======================================================================== */ +/* ============== CYCLE-ACCURATE DIV/MUL EXECUTION ======================== */ +/* ======================================================================== */ + +INLINE void UseDivuCycles(uint32 dst, uint32 src) +{ + int i; + + /* minimum cycle time */ + uint mcycles = 38 * MUL; + + /* 16-bit divisor */ + src <<= 16; + + /* 16-bit dividend */ + for (i=0; i<15; i++) + { + /* check if carry bit set */ + if ((sint32) dst < 0) + { + /* shift dividend and apply divisor */ + dst <<= 1; + dst -= src; + } + else + { + /* shift dividend and add two cycles */ + dst <<= 1; + mcycles += (2 * MUL); + + if (dst >= src) + { + /* apply divisor and remove one cycle */ + dst -= src; + mcycles -= 1 * MUL; + } + } + } + + USE_CYCLES(mcycles << 1); +} + +INLINE void UseDivsCycles(sint32 dst, sint16 src) +{ + /* minimum cycle time */ + uint mcycles = 6 * MUL; + + /* negative dividend */ + if (dst < 0) mcycles += 1 * MUL; + + if ((abs(dst) >> 16) < abs(src)) + { + int i; + + /* absolute quotient */ + uint32 quotient = abs(dst) / abs(src); + + /* add default cycle time */ + mcycles += (55 * MUL); + + /* positive divisor */ + if (src >= 0) + { + /* check dividend sign */ + if (dst >= 0) mcycles -= 1 * MUL; + else mcycles += 1 * MUL; + } + + /* check higher 15-bits of quotient */ + for (i=0; i<15; i++) + { + quotient >>= 1; + if (!(quotient & 1)) mcycles += 1 * MUL; + } + } + else + { + /* absolute overflow */ + mcycles += (2 * MUL); + } + + USE_CYCLES(mcycles << 1); +} + +INLINE void UseMuluCycles(uint16 src) +{ + /* minimum cycle time */ + uint mcycles = 38 * MUL; + + /* count number of bits set to 1 */ + while (src) + { + if (src & 1) mcycles += (2 * MUL); + src >>= 1; + } + + /* 38 + 2*N */ + USE_CYCLES(mcycles); +} + +INLINE void UseMulsCycles(sint16 src) +{ + /* minimum cycle time */ + uint mcycles = 38 * MUL; + + /* detect 01 or 10 patterns */ + sint32 tmp = src << 1; + tmp = (tmp ^ src) & 0xFFFF; + + /* count number of bits set to 1 */ + while (tmp) + { + if (tmp & 1) mcycles += (2 * MUL); + tmp >>= 1; + } + + /* 38 + 2*N */ + USE_CYCLES(mcycles); +} + + +/* ======================================================================== */ +/* ========================= INSTRUCTION HANDLERS ========================= */ +/* ======================================================================== */ + + +static void m68k_op_1010(void) +{ + m68ki_exception_1010(); +} + + +static void m68k_op_1111(void) +{ + m68ki_exception_1111(); +} + + +static void m68k_op_abcd_8_rr(void) +{ + uint* r_dst = &DX; + uint src = DY; + uint dst = *r_dst; + uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(); + + FLAG_V = ~res; /* Undefined V behavior */ + + if(res > 9) + res += 6; + res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst); + FLAG_X = FLAG_C = (res > 0x99) << 8; + if(FLAG_C) + res -= 0xa0; + + FLAG_V &= res; /* Undefined V behavior part II */ + FLAG_N = NFLAG_8(res); /* Undefined N behavior */ + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; +} + + +static void m68k_op_abcd_8_mm_ax7(void) +{ + uint src = OPER_AY_PD_8(); + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(); + + FLAG_V = ~res; /* Undefined V behavior */ + + if(res > 9) + res += 6; + res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst); + FLAG_X = FLAG_C = (res > 0x99) << 8; + if(FLAG_C) + res -= 0xa0; + + FLAG_V &= res; /* Undefined V behavior part II */ + FLAG_N = NFLAG_8(res); /* Undefined N behavior */ + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_abcd_8_mm_ay7(void) +{ + uint src = OPER_A7_PD_8(); + uint ea = EA_AX_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(); + + FLAG_V = ~res; /* Undefined V behavior */ + + if(res > 9) + res += 6; + res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst); + FLAG_X = FLAG_C = (res > 0x99) << 8; + if(FLAG_C) + res -= 0xa0; + + FLAG_V &= res; /* Undefined V behavior part II */ + FLAG_N = NFLAG_8(res); /* Undefined N behavior */ + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_abcd_8_mm_axy7(void) +{ + uint src = OPER_A7_PD_8(); + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(); + + FLAG_V = ~res; /* Undefined V behavior */ + + if(res > 9) + res += 6; + res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst); + FLAG_X = FLAG_C = (res > 0x99) << 8; + if(FLAG_C) + res -= 0xa0; + + FLAG_V &= res; /* Undefined V behavior part II */ + FLAG_N = NFLAG_8(res); /* Undefined N behavior */ + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_abcd_8_mm(void) +{ + uint src = OPER_AY_PD_8(); + uint ea = EA_AX_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1(); + + FLAG_V = ~res; /* Undefined V behavior */ + + if(res > 9) + res += 6; + res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst); + FLAG_X = FLAG_C = (res > 0x99) << 8; + if(FLAG_C) + res -= 0xa0; + + FLAG_V &= res; /* Undefined V behavior part II */ + FLAG_N = NFLAG_8(res); /* Undefined N behavior */ + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_add_8_er_d(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_8(DY); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_8_er_ai(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_AI_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_8_er_pi(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PI_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_8_er_pi7(void) +{ + uint* r_dst = &DX; + uint src = OPER_A7_PI_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_8_er_pd(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PD_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_8_er_pd7(void) +{ + uint* r_dst = &DX; + uint src = OPER_A7_PD_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_8_er_di(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_DI_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_8_er_ix(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_IX_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_8_er_aw(void) +{ + uint* r_dst = &DX; + uint src = OPER_AW_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_8_er_al(void) +{ + uint* r_dst = &DX; + uint src = OPER_AL_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_8_er_pcdi(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCDI_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_8_er_pcix(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCIX_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_8_er_i(void) +{ + uint* r_dst = &DX; + uint src = OPER_I_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_16_er_d(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_16(DY); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_16_er_a(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_16(AY); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_16_er_ai(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_AI_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_16_er_pi(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PI_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_16_er_pd(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PD_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_16_er_di(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_DI_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_16_er_ix(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_IX_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_16_er_aw(void) +{ + uint* r_dst = &DX; + uint src = OPER_AW_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_16_er_al(void) +{ + uint* r_dst = &DX; + uint src = OPER_AL_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_16_er_pcdi(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCDI_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_16_er_pcix(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCIX_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_16_er_i(void) +{ + uint* r_dst = &DX; + uint src = OPER_I_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_add_32_er_d(void) +{ + uint* r_dst = &DX; + uint src = DY; + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_add_32_er_a(void) +{ + uint* r_dst = &DX; + uint src = AY; + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_add_32_er_ai(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_AI_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_add_32_er_pi(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PI_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_add_32_er_pd(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PD_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_add_32_er_di(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_DI_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_add_32_er_ix(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_IX_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_add_32_er_aw(void) +{ + uint* r_dst = &DX; + uint src = OPER_AW_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_add_32_er_al(void) +{ + uint* r_dst = &DX; + uint src = OPER_AL_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_add_32_er_pcdi(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCDI_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_add_32_er_pcix(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCIX_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_add_32_er_i(void) +{ + uint* r_dst = &DX; + uint src = OPER_I_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_add_8_re_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_add_8_re_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_add_8_re_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_add_8_re_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_add_8_re_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_add_8_re_di(void) +{ + uint ea = EA_AY_DI_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_add_8_re_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_add_8_re_aw(void) +{ + uint ea = EA_AW_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_add_8_re_al(void) +{ + uint ea = EA_AL_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_add_16_re_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_add_16_re_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_add_16_re_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_add_16_re_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_add_16_re_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_add_16_re_aw(void) +{ + uint ea = EA_AW_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_add_16_re_al(void) +{ + uint ea = EA_AL_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_add_32_re_ai(void) +{ + uint ea = EA_AY_AI_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_add_32_re_pi(void) +{ + uint ea = EA_AY_PI_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_add_32_re_pd(void) +{ + uint ea = EA_AY_PD_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_add_32_re_di(void) +{ + uint ea = EA_AY_DI_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_add_32_re_ix(void) +{ + uint ea = EA_AY_IX_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_add_32_re_aw(void) +{ + uint ea = EA_AW_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_add_32_re_al(void) +{ + uint ea = EA_AL_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_adda_16_d(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(DY)); +} + + +static void m68k_op_adda_16_a(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(AY)); +} + + +static void m68k_op_adda_16_ai(void) +{ + uint* r_dst = &AX; + uint src = MAKE_INT_16(OPER_AY_AI_16()); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + src); +} + + +static void m68k_op_adda_16_pi(void) +{ + uint* r_dst = &AX; + uint src = MAKE_INT_16(OPER_AY_PI_16()); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + src); +} + + +static void m68k_op_adda_16_pd(void) +{ + uint* r_dst = &AX; + uint src = MAKE_INT_16(OPER_AY_PD_16()); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + src); +} + + +static void m68k_op_adda_16_di(void) +{ + uint* r_dst = &AX; + uint src = MAKE_INT_16(OPER_AY_DI_16()); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + src); +} + + +static void m68k_op_adda_16_ix(void) +{ + uint* r_dst = &AX; + uint src = MAKE_INT_16(OPER_AY_IX_16()); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + src); +} + + +static void m68k_op_adda_16_aw(void) +{ + uint* r_dst = &AX; + uint src = MAKE_INT_16(OPER_AW_16()); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + src); +} + + +static void m68k_op_adda_16_al(void) +{ + uint* r_dst = &AX; + uint src = MAKE_INT_16(OPER_AL_16()); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + src); +} + + +static void m68k_op_adda_16_pcdi(void) +{ + uint* r_dst = &AX; + uint src = MAKE_INT_16(OPER_PCDI_16()); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + src); +} + + +static void m68k_op_adda_16_pcix(void) +{ + uint* r_dst = &AX; + uint src = MAKE_INT_16(OPER_PCIX_16()); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + src); +} + + +static void m68k_op_adda_16_i(void) +{ + uint* r_dst = &AX; + uint src = MAKE_INT_16(OPER_I_16()); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + src); +} + + +static void m68k_op_adda_32_d(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + DY); +} + + +static void m68k_op_adda_32_a(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + AY); +} + + +static void m68k_op_adda_32_ai(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(OPER_AY_AI_32() + *r_dst); +} + + +static void m68k_op_adda_32_pi(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(OPER_AY_PI_32() + *r_dst); +} + + +static void m68k_op_adda_32_pd(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(OPER_AY_PD_32() + *r_dst); +} + + +static void m68k_op_adda_32_di(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(OPER_AY_DI_32() + *r_dst); +} + + +static void m68k_op_adda_32_ix(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(OPER_AY_IX_32() + *r_dst); +} + + +static void m68k_op_adda_32_aw(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(OPER_AW_32() + *r_dst); +} + + +static void m68k_op_adda_32_al(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(OPER_AL_32() + *r_dst); +} + + +static void m68k_op_adda_32_pcdi(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(OPER_PCDI_32() + *r_dst); +} + + +static void m68k_op_adda_32_pcix(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(OPER_PCIX_32() + *r_dst); +} + + +static void m68k_op_adda_32_i(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(OPER_I_32() + *r_dst); +} + + +static void m68k_op_addi_8_d(void) +{ + uint* r_dst = &DY; + uint src = OPER_I_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_addi_8_ai(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_AI_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_addi_8_pi(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_PI_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_addi_8_pi7(void) +{ + uint src = OPER_I_8(); + uint ea = EA_A7_PI_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_addi_8_pd(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_addi_8_pd7(void) +{ + uint src = OPER_I_8(); + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_addi_8_di(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_DI_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_addi_8_ix(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_IX_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_addi_8_aw(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AW_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_addi_8_al(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AL_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_addi_16_d(void) +{ + uint* r_dst = &DY; + uint src = OPER_I_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_addi_16_ai(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_AI_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_addi_16_pi(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_PI_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_addi_16_pd(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_PD_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_addi_16_di(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_DI_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_addi_16_ix(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_IX_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_addi_16_aw(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AW_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_addi_16_al(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AL_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_addi_32_d(void) +{ + uint* r_dst = &DY; + uint src = OPER_I_32(); + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_addi_32_ai(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_AI_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_addi_32_pi(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_PI_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_addi_32_pd(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_PD_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_addi_32_di(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_DI_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_addi_32_ix(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_IX_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_addi_32_aw(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AW_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_addi_32_al(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AL_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_addq_8_d(void) +{ + uint* r_dst = &DY; + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_addq_8_ai(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_AI_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_addq_8_pi(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PI_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_addq_8_pi7(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_A7_PI_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_addq_8_pd(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_addq_8_pd7(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_addq_8_di(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_DI_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_addq_8_ix(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_IX_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_addq_8_aw(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AW_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_addq_8_al(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AL_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst; + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_addq_16_d(void) +{ + uint* r_dst = &DY; + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_addq_16_a(void) +{ + uint* r_dst = &AY; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + (((REG_IR >> 9) - 1) & 7) + 1); +} + + +static void m68k_op_addq_16_ai(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_AI_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_addq_16_pi(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PI_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_addq_16_pd(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PD_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_addq_16_di(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_DI_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_addq_16_ix(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_IX_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_addq_16_aw(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AW_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_addq_16_al(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AL_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst; + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_addq_32_d(void) +{ + uint* r_dst = &DY; + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint dst = *r_dst; + uint res = src + dst; + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_addq_32_a(void) +{ + uint* r_dst = &AY; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst + (((REG_IR >> 9) - 1) & 7) + 1); +} + + +static void m68k_op_addq_32_ai(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_AI_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_addq_32_pi(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PI_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_addq_32_pd(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PD_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_addq_32_di(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_DI_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_addq_32_ix(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_IX_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_addq_32_aw(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AW_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_addq_32_al(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AL_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst; + + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_addx_8_rr(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_8(DY); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = src + dst + XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; +} + + +static void m68k_op_addx_16_rr(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_16(DY); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = src + dst + XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; +} + + +static void m68k_op_addx_32_rr(void) +{ + uint* r_dst = &DX; + uint src = DY; + uint dst = *r_dst; + uint res = src + dst + XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + *r_dst = res; +} + + +static void m68k_op_addx_8_mm_ax7(void) +{ + uint src = OPER_AY_PD_8(); + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst + XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_addx_8_mm_ay7(void) +{ + uint src = OPER_A7_PD_8(); + uint ea = EA_AX_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst + XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_addx_8_mm_axy7(void) +{ + uint src = OPER_A7_PD_8(); + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst + XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_addx_8_mm(void) +{ + uint src = OPER_AY_PD_8(); + uint ea = EA_AX_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = src + dst + XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_V = VFLAG_ADD_8(src, dst, res); + FLAG_X = FLAG_C = CFLAG_8(res); + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_addx_16_mm(void) +{ + uint src = OPER_AY_PD_16(); + uint ea = EA_AX_PD_16(); + uint dst = m68ki_read_16(ea); + uint res = src + dst + XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_V = VFLAG_ADD_16(src, dst, res); + FLAG_X = FLAG_C = CFLAG_16(res); + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_addx_32_mm(void) +{ + uint src = OPER_AY_PD_32(); + uint ea = EA_AX_PD_32(); + uint dst = m68ki_read_32(ea); + uint res = src + dst + XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_ADD_32(src, dst, res); + FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res); + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_and_8_er_d(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (DY | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_8_er_ai(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AY_AI_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_8_er_pi(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AY_PI_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_8_er_pi7(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_A7_PI_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_8_er_pd(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AY_PD_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_8_er_pd7(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_A7_PD_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_8_er_di(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AY_DI_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_8_er_ix(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AY_IX_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_8_er_aw(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AW_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_8_er_al(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_AL_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_8_er_pcdi(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_PCDI_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_8_er_pcix(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_PCIX_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_8_er_i(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DX &= (OPER_I_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_16_er_d(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (DY | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_16_er_ai(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AY_AI_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_16_er_pi(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AY_PI_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_16_er_pd(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AY_PD_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_16_er_di(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AY_DI_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_16_er_ix(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AY_IX_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_16_er_aw(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AW_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_16_er_al(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_AL_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_16_er_pcdi(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_PCDI_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_16_er_pcix(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_PCIX_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_16_er_i(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DX &= (OPER_I_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_32_er_d(void) +{ + FLAG_Z = DX &= DY; + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_32_er_ai(void) +{ + FLAG_Z = DX &= OPER_AY_AI_32(); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_32_er_pi(void) +{ + FLAG_Z = DX &= OPER_AY_PI_32(); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_32_er_pd(void) +{ + FLAG_Z = DX &= OPER_AY_PD_32(); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_32_er_di(void) +{ + FLAG_Z = DX &= OPER_AY_DI_32(); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_32_er_ix(void) +{ + FLAG_Z = DX &= OPER_AY_IX_32(); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_32_er_aw(void) +{ + FLAG_Z = DX &= OPER_AW_32(); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_32_er_al(void) +{ + FLAG_Z = DX &= OPER_AL_32(); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_32_er_pcdi(void) +{ + FLAG_Z = DX &= OPER_PCDI_32(); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_32_er_pcix(void) +{ + FLAG_Z = DX &= OPER_PCIX_32(); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_32_er_i(void) +{ + FLAG_Z = DX &= OPER_I_32(); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_and_8_re_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint res = DX & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_and_8_re_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint res = DX & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_and_8_re_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint res = DX & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_and_8_re_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint res = DX & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_and_8_re_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint res = DX & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_and_8_re_di(void) +{ + uint ea = EA_AY_DI_8(); + uint res = DX & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_and_8_re_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint res = DX & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_and_8_re_aw(void) +{ + uint ea = EA_AW_8(); + uint res = DX & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_and_8_re_al(void) +{ + uint ea = EA_AL_8(); + uint res = DX & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_and_16_re_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint res = DX & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_and_16_re_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint res = DX & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_and_16_re_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint res = DX & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_and_16_re_di(void) +{ + uint ea = EA_AY_DI_16(); + uint res = DX & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_and_16_re_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint res = DX & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_and_16_re_aw(void) +{ + uint ea = EA_AW_16(); + uint res = DX & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_and_16_re_al(void) +{ + uint ea = EA_AL_16(); + uint res = DX & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_and_32_re_ai(void) +{ + uint ea = EA_AY_AI_32(); + uint res = DX & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_and_32_re_pi(void) +{ + uint ea = EA_AY_PI_32(); + uint res = DX & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_and_32_re_pd(void) +{ + uint ea = EA_AY_PD_32(); + uint res = DX & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_and_32_re_di(void) +{ + uint ea = EA_AY_DI_32(); + uint res = DX & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_and_32_re_ix(void) +{ + uint ea = EA_AY_IX_32(); + uint res = DX & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_and_32_re_aw(void) +{ + uint ea = EA_AW_32(); + uint res = DX & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_and_32_re_al(void) +{ + uint ea = EA_AL_32(); + uint res = DX & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_andi_8_d(void) +{ + FLAG_Z = MASK_OUT_ABOVE_8(DY &= (OPER_I_8() | 0xffffff00)); + + FLAG_N = NFLAG_8(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_andi_8_ai(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_AI_8(); + uint res = src & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_andi_8_pi(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_PI_8(); + uint res = src & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_andi_8_pi7(void) +{ + uint src = OPER_I_8(); + uint ea = EA_A7_PI_8(); + uint res = src & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_andi_8_pd(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_PD_8(); + uint res = src & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_andi_8_pd7(void) +{ + uint src = OPER_I_8(); + uint ea = EA_A7_PD_8(); + uint res = src & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_andi_8_di(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_DI_8(); + uint res = src & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_andi_8_ix(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_IX_8(); + uint res = src & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_andi_8_aw(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AW_8(); + uint res = src & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_andi_8_al(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AL_8(); + uint res = src & m68ki_read_8(ea); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_andi_16_d(void) +{ + FLAG_Z = MASK_OUT_ABOVE_16(DY &= (OPER_I_16() | 0xffff0000)); + + FLAG_N = NFLAG_16(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_andi_16_ai(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_AI_16(); + uint res = src & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_andi_16_pi(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_PI_16(); + uint res = src & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_andi_16_pd(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_PD_16(); + uint res = src & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_andi_16_di(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_DI_16(); + uint res = src & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_andi_16_ix(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_IX_16(); + uint res = src & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_andi_16_aw(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AW_16(); + uint res = src & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_andi_16_al(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AL_16(); + uint res = src & m68ki_read_16(ea); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_andi_32_d(void) +{ + FLAG_Z = DY &= (OPER_I_32()); + + FLAG_N = NFLAG_32(FLAG_Z); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_andi_32_ai(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_AI_32(); + uint res = src & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_andi_32_pi(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_PI_32(); + uint res = src & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_andi_32_pd(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_PD_32(); + uint res = src & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_andi_32_di(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_DI_32(); + uint res = src & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_andi_32_ix(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_IX_32(); + uint res = src & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_andi_32_aw(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AW_32(); + uint res = src & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_andi_32_al(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AL_32(); + uint res = src & m68ki_read_32(ea); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_andi_16_toc(void) +{ + m68ki_set_ccr(m68ki_get_ccr() & OPER_I_16()); +} + + +static void m68k_op_andi_16_tos(void) +{ + if(FLAG_S) + { + uint src = OPER_I_16(); + m68ki_set_sr(m68ki_get_sr() & src); + return; + } + m68ki_exception_privilege_violation(); +} + + +static void m68k_op_asr_8_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = src >> shift; + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + if(GET_MSB_8(src)) + res |= m68ki_shift_8_table[shift]; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_X = FLAG_C = src << (9-shift); +} + + +static void m68k_op_asr_16_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = src >> shift; + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + if(GET_MSB_16(src)) + res |= m68ki_shift_16_table[shift]; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_X = FLAG_C = src << (9-shift); +} + + +static void m68k_op_asr_32_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = *r_dst; + uint res = src >> shift; + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + if(GET_MSB_32(src)) + res |= m68ki_shift_32_table[shift]; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_X = FLAG_C = src << (9-shift); +} + + +static void m68k_op_asr_8_r(void) +{ + uint* r_dst = &DY; + uint shift = DX & 0x3f; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = src >> shift; + + if(shift != 0) + { + USE_CYCLES(shift * CYC_SHIFT); + + if(shift < 8) + { + if(GET_MSB_8(src)) + res |= m68ki_shift_8_table[shift]; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_X = FLAG_C = src << (9-shift); + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + if(GET_MSB_8(src)) + { + *r_dst |= 0xff; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + return; + } + + *r_dst &= 0xffffff00; + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_8(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_asr_16_r(void) +{ + uint* r_dst = &DY; + uint shift = DX & 0x3f; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = src >> shift; + + if(shift != 0) + { + USE_CYCLES(shift * CYC_SHIFT); + + if(shift < 16) + { + if(GET_MSB_16(src)) + res |= m68ki_shift_16_table[shift]; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_C = FLAG_X = (src >> (shift - 1))<<8; + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + if(GET_MSB_16(src)) + { + *r_dst |= 0xffff; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + return; + } + + *r_dst &= 0xffff0000; + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_16(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_asr_32_r(void) +{ + uint* r_dst = &DY; + uint shift = DX & 0x3f; + uint src = *r_dst; + uint res = src >> shift; + + if(shift != 0) + { + USE_CYCLES(shift * CYC_SHIFT); + + if(shift < 32) + { + if(GET_MSB_32(src)) + res |= m68ki_shift_32_table[shift]; + + *r_dst = res; + + FLAG_C = FLAG_X = (src >> (shift - 1))<<8; + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + if(GET_MSB_32(src)) + { + *r_dst = 0xffffffff; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + FLAG_N = NFLAG_SET; + FLAG_Z = ZFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + return; + } + + *r_dst = 0; + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_32(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_asr_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + if(GET_MSB_16(src)) + res |= 0x8000; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = FLAG_X = src << 8; +} + + +static void m68k_op_asr_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + if(GET_MSB_16(src)) + res |= 0x8000; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = FLAG_X = src << 8; +} + + +static void m68k_op_asr_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + if(GET_MSB_16(src)) + res |= 0x8000; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = FLAG_X = src << 8; +} + + +static void m68k_op_asr_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + if(GET_MSB_16(src)) + res |= 0x8000; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = FLAG_X = src << 8; +} + + +static void m68k_op_asr_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + if(GET_MSB_16(src)) + res |= 0x8000; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = FLAG_X = src << 8; +} + + +static void m68k_op_asr_16_aw(void) +{ + uint ea = EA_AW_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + if(GET_MSB_16(src)) + res |= 0x8000; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = FLAG_X = src << 8; +} + + +static void m68k_op_asr_16_al(void) +{ + uint ea = EA_AL_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + if(GET_MSB_16(src)) + res |= 0x8000; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = FLAG_X = src << 8; +} + + +static void m68k_op_asl_8_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = MASK_OUT_ABOVE_8(src << shift); + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_X = FLAG_C = src << shift; + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + src &= m68ki_shift_8_table[shift + 1]; + FLAG_V = (!(src == 0 || (src == m68ki_shift_8_table[shift + 1] && shift < 8)))<<7; +} + + +static void m68k_op_asl_16_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = MASK_OUT_ABOVE_16(src << shift); + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> (8-shift); + src &= m68ki_shift_16_table[shift + 1]; + FLAG_V = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7; +} + + +static void m68k_op_asl_32_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = *r_dst; + uint res = MASK_OUT_ABOVE_32(src << shift); + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> (24-shift); + src &= m68ki_shift_32_table[shift + 1]; + FLAG_V = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7; +} + + +static void m68k_op_asl_8_r(void) +{ + uint* r_dst = &DY; + uint shift = DX & 0x3f; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = MASK_OUT_ABOVE_8(src << shift); + + if(shift != 0) + { + USE_CYCLES(shift * CYC_SHIFT); + + if(shift < 8) + { + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + FLAG_X = FLAG_C = src << shift; + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + src &= m68ki_shift_8_table[shift + 1]; + FLAG_V = (!(src == 0 || src == m68ki_shift_8_table[shift + 1]))<<7; + return; + } + + *r_dst &= 0xffffff00; + FLAG_X = FLAG_C = ((shift == 8 ? src & 1 : 0))<<8; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; + FLAG_V = (!(src == 0))<<7; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_8(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_asl_16_r(void) +{ + uint* r_dst = &DY; + uint shift = DX & 0x3f; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = MASK_OUT_ABOVE_16(src << shift); + + if(shift != 0) + { + USE_CYCLES(shift * CYC_SHIFT); + + if(shift < 16) + { + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + FLAG_X = FLAG_C = (src << shift) >> 8; + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + src &= m68ki_shift_16_table[shift + 1]; + FLAG_V = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7; + return; + } + + *r_dst &= 0xffff0000; + FLAG_X = FLAG_C = ((shift == 16 ? src & 1 : 0))<<8; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; + FLAG_V = (!(src == 0))<<7; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_16(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_asl_32_r(void) +{ + uint* r_dst = &DY; + uint shift = DX & 0x3f; + uint src = *r_dst; + uint res = MASK_OUT_ABOVE_32(src << shift); + + if(shift != 0) + { + USE_CYCLES(shift * CYC_SHIFT); + + if(shift < 32) + { + *r_dst = res; + FLAG_X = FLAG_C = (src >> (32 - shift)) << 8; + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + src &= m68ki_shift_32_table[shift + 1]; + FLAG_V = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7; + return; + } + + *r_dst = 0; + FLAG_X = FLAG_C = ((shift == 32 ? src & 1 : 0))<<8; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; + FLAG_V = (!(src == 0))<<7; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_32(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_asl_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + src &= 0xc000; + FLAG_V = (!(src == 0 || src == 0xc000))<<7; +} + + +static void m68k_op_asl_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + src &= 0xc000; + FLAG_V = (!(src == 0 || src == 0xc000))<<7; +} + + +static void m68k_op_asl_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + src &= 0xc000; + FLAG_V = (!(src == 0 || src == 0xc000))<<7; +} + + +static void m68k_op_asl_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + src &= 0xc000; + FLAG_V = (!(src == 0 || src == 0xc000))<<7; +} + + +static void m68k_op_asl_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + src &= 0xc000; + FLAG_V = (!(src == 0 || src == 0xc000))<<7; +} + + +static void m68k_op_asl_16_aw(void) +{ + uint ea = EA_AW_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + src &= 0xc000; + FLAG_V = (!(src == 0 || src == 0xc000))<<7; +} + + +static void m68k_op_asl_16_al(void) +{ + uint ea = EA_AL_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + src &= 0xc000; + FLAG_V = (!(src == 0 || src == 0xc000))<<7; +} + + +static void m68k_op_bhi_8(void) +{ + if(COND_HI()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bls_8(void) +{ + if(COND_LS()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bcc_8(void) +{ + if(COND_CC()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bcs_8(void) +{ + if(COND_CS()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bne_8(void) +{ + if(COND_NE()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_beq_8(void) +{ + if(COND_EQ()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bvc_8(void) +{ + if(COND_VC()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bvs_8(void) +{ + if(COND_VS()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bpl_8(void) +{ + if(COND_PL()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bmi_8(void) +{ + if(COND_MI()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bge_8(void) +{ + if(COND_GE()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_blt_8(void) +{ + if(COND_LT()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bgt_8(void) +{ + if(COND_GT()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_ble_8(void) +{ + if(COND_LE()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bhi_16(void) +{ + if(COND_HI()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +static void m68k_op_bls_16(void) +{ + if(COND_LS()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +static void m68k_op_bcc_16(void) +{ + if(COND_CC()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +static void m68k_op_bcs_16(void) +{ + if(COND_CS()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +static void m68k_op_bne_16(void) +{ + if(COND_NE()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +static void m68k_op_beq_16(void) +{ + if(COND_EQ()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +static void m68k_op_bvc_16(void) +{ + if(COND_VC()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +static void m68k_op_bvs_16(void) +{ + if(COND_VS()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +static void m68k_op_bpl_16(void) +{ + if(COND_PL()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +static void m68k_op_bmi_16(void) +{ + if(COND_MI()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +static void m68k_op_bge_16(void) +{ + if(COND_GE()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +static void m68k_op_blt_16(void) +{ + if(COND_LT()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +static void m68k_op_bgt_16(void) +{ + if(COND_GT()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +static void m68k_op_ble_16(void) +{ + if(COND_LE()) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + return; + } + REG_PC += 2; + USE_CYCLES(CYC_BCC_NOTAKE_W); +} + + +static void m68k_op_bhi_32(void) +{ + if(COND_HI()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bls_32(void) +{ + if(COND_LS()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bcc_32(void) +{ + if(COND_CC()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bcs_32(void) +{ + if(COND_CS()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bne_32(void) +{ + if(COND_NE()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_beq_32(void) +{ + if(COND_EQ()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bvc_32(void) +{ + if(COND_VC()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bvs_32(void) +{ + if(COND_VS()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bpl_32(void) +{ + if(COND_PL()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bmi_32(void) +{ + if(COND_MI()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bge_32(void) +{ + if(COND_GE()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_blt_32(void) +{ + if(COND_LT()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bgt_32(void) +{ + if(COND_GT()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_ble_32(void) +{ + if(COND_LE()) + { + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); + return; + } + USE_CYCLES(CYC_BCC_NOTAKE_B); +} + + +static void m68k_op_bchg_32_r_d(void) +{ + uint* r_dst = &DY; + uint mask = 1 << (DX & 0x1f); + + FLAG_Z = *r_dst & mask; + *r_dst ^= mask; +} + + +static void m68k_op_bchg_8_r_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +static void m68k_op_bchg_8_r_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +static void m68k_op_bchg_8_r_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +static void m68k_op_bchg_8_r_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +static void m68k_op_bchg_8_r_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +static void m68k_op_bchg_8_r_di(void) +{ + uint ea = EA_AY_DI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +static void m68k_op_bchg_8_r_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +static void m68k_op_bchg_8_r_aw(void) +{ + uint ea = EA_AW_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +static void m68k_op_bchg_8_r_al(void) +{ + uint ea = EA_AL_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +static void m68k_op_bchg_32_s_d(void) +{ + uint* r_dst = &DY; + uint mask = 1 << (OPER_I_8() & 0x1f); + + FLAG_Z = *r_dst & mask; + *r_dst ^= mask; +} + + +static void m68k_op_bchg_8_s_ai(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_AI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +static void m68k_op_bchg_8_s_pi(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_PI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +static void m68k_op_bchg_8_s_pi7(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_A7_PI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +static void m68k_op_bchg_8_s_pd(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_PD_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +static void m68k_op_bchg_8_s_pd7(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_A7_PD_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +static void m68k_op_bchg_8_s_di(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_DI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +static void m68k_op_bchg_8_s_ix(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_IX_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +static void m68k_op_bchg_8_s_aw(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AW_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +static void m68k_op_bchg_8_s_al(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AL_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src ^ mask); +} + + +static void m68k_op_bclr_32_r_d(void) +{ + uint* r_dst = &DY; + uint mask = 1 << (DX & 0x1f); + + FLAG_Z = *r_dst & mask; + *r_dst &= ~mask; +} + + +static void m68k_op_bclr_8_r_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +static void m68k_op_bclr_8_r_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +static void m68k_op_bclr_8_r_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +static void m68k_op_bclr_8_r_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +static void m68k_op_bclr_8_r_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +static void m68k_op_bclr_8_r_di(void) +{ + uint ea = EA_AY_DI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +static void m68k_op_bclr_8_r_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +static void m68k_op_bclr_8_r_aw(void) +{ + uint ea = EA_AW_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +static void m68k_op_bclr_8_r_al(void) +{ + uint ea = EA_AL_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +static void m68k_op_bclr_32_s_d(void) +{ + uint* r_dst = &DY; + uint mask = 1 << (OPER_I_8() & 0x1f); + + FLAG_Z = *r_dst & mask; + *r_dst &= ~mask; +} + + +static void m68k_op_bclr_8_s_ai(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_AI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +static void m68k_op_bclr_8_s_pi(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_PI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +static void m68k_op_bclr_8_s_pi7(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_A7_PI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +static void m68k_op_bclr_8_s_pd(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_PD_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +static void m68k_op_bclr_8_s_pd7(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_A7_PD_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +static void m68k_op_bclr_8_s_di(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_DI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +static void m68k_op_bclr_8_s_ix(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_IX_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +static void m68k_op_bclr_8_s_aw(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AW_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +static void m68k_op_bclr_8_s_al(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AL_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src & ~mask); +} + + +static void m68k_op_bra_8(void) +{ + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); +} + + +static void m68k_op_bra_16(void) +{ + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); +} + + +static void m68k_op_bra_32(void) +{ + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); +} + + +static void m68k_op_bset_32_r_d(void) +{ + uint* r_dst = &DY; + uint mask = 1 << (DX & 0x1f); + + FLAG_Z = *r_dst & mask; + *r_dst |= mask; +} + + +static void m68k_op_bset_8_r_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +static void m68k_op_bset_8_r_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +static void m68k_op_bset_8_r_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +static void m68k_op_bset_8_r_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +static void m68k_op_bset_8_r_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +static void m68k_op_bset_8_r_di(void) +{ + uint ea = EA_AY_DI_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +static void m68k_op_bset_8_r_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +static void m68k_op_bset_8_r_aw(void) +{ + uint ea = EA_AW_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +static void m68k_op_bset_8_r_al(void) +{ + uint ea = EA_AL_8(); + uint src = m68ki_read_8(ea); + uint mask = 1 << (DX & 7); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +static void m68k_op_bset_32_s_d(void) +{ + uint* r_dst = &DY; + uint mask = 1 << (OPER_I_8() & 0x1f); + + FLAG_Z = *r_dst & mask; + *r_dst |= mask; +} + + +static void m68k_op_bset_8_s_ai(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_AI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +static void m68k_op_bset_8_s_pi(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_PI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +static void m68k_op_bset_8_s_pi7(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_A7_PI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +static void m68k_op_bset_8_s_pd(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_PD_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +static void m68k_op_bset_8_s_pd7(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_A7_PD_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +static void m68k_op_bset_8_s_di(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_DI_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +static void m68k_op_bset_8_s_ix(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AY_IX_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +static void m68k_op_bset_8_s_aw(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AW_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +static void m68k_op_bset_8_s_al(void) +{ + uint mask = 1 << (OPER_I_8() & 7); + uint ea = EA_AL_8(); + uint src = m68ki_read_8(ea); + + FLAG_Z = src & mask; + m68ki_write_8(ea, src | mask); +} + + +static void m68k_op_bsr_8(void) +{ + m68ki_push_32(REG_PC); + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); +} + + +static void m68k_op_bsr_16(void) +{ + uint offset = OPER_I_16(); + m68ki_push_32(REG_PC); + REG_PC -= 2; + m68ki_branch_16(offset); +} + + +static void m68k_op_bsr_32(void) +{ + m68ki_push_32(REG_PC); + m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR)); +} + + +static void m68k_op_btst_32_r_d(void) +{ + FLAG_Z = DY & (1 << (DX & 0x1f)); +} + + +static void m68k_op_btst_8_r_ai(void) +{ + FLAG_Z = OPER_AY_AI_8() & (1 << (DX & 7)); +} + + +static void m68k_op_btst_8_r_pi(void) +{ + FLAG_Z = OPER_AY_PI_8() & (1 << (DX & 7)); +} + + +static void m68k_op_btst_8_r_pi7(void) +{ + FLAG_Z = OPER_A7_PI_8() & (1 << (DX & 7)); +} + + +static void m68k_op_btst_8_r_pd(void) +{ + FLAG_Z = OPER_AY_PD_8() & (1 << (DX & 7)); +} + + +static void m68k_op_btst_8_r_pd7(void) +{ + FLAG_Z = OPER_A7_PD_8() & (1 << (DX & 7)); +} + + +static void m68k_op_btst_8_r_di(void) +{ + FLAG_Z = OPER_AY_DI_8() & (1 << (DX & 7)); +} + + +static void m68k_op_btst_8_r_ix(void) +{ + FLAG_Z = OPER_AY_IX_8() & (1 << (DX & 7)); +} + + +static void m68k_op_btst_8_r_aw(void) +{ + FLAG_Z = OPER_AW_8() & (1 << (DX & 7)); +} + + +static void m68k_op_btst_8_r_al(void) +{ + FLAG_Z = OPER_AL_8() & (1 << (DX & 7)); +} + + +static void m68k_op_btst_8_r_pcdi(void) +{ + FLAG_Z = OPER_PCDI_8() & (1 << (DX & 7)); +} + + +static void m68k_op_btst_8_r_pcix(void) +{ + FLAG_Z = OPER_PCIX_8() & (1 << (DX & 7)); +} + + +static void m68k_op_btst_8_r_i(void) +{ + FLAG_Z = OPER_I_8() & (1 << (DX & 7)); +} + + +static void m68k_op_btst_32_s_d(void) +{ + FLAG_Z = DY & (1 << (OPER_I_8() & 0x1f)); +} + + +static void m68k_op_btst_8_s_ai(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_AY_AI_8() & (1 << bit); +} + + +static void m68k_op_btst_8_s_pi(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_AY_PI_8() & (1 << bit); +} + + +static void m68k_op_btst_8_s_pi7(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_A7_PI_8() & (1 << bit); +} + + +static void m68k_op_btst_8_s_pd(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_AY_PD_8() & (1 << bit); +} + + +static void m68k_op_btst_8_s_pd7(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_A7_PD_8() & (1 << bit); +} + + +static void m68k_op_btst_8_s_di(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_AY_DI_8() & (1 << bit); +} + + +static void m68k_op_btst_8_s_ix(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_AY_IX_8() & (1 << bit); +} + + +static void m68k_op_btst_8_s_aw(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_AW_8() & (1 << bit); +} + + +static void m68k_op_btst_8_s_al(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_AL_8() & (1 << bit); +} + + +static void m68k_op_btst_8_s_pcdi(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_PCDI_8() & (1 << bit); +} + + +static void m68k_op_btst_8_s_pcix(void) +{ + uint bit = OPER_I_8() & 7; + + FLAG_Z = OPER_PCIX_8() & (1 << bit); +} + + +static void m68k_op_chk_16_d(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(DY); + + FLAG_Z = ZFLAG_16(src); /* Undocumented */ + FLAG_V = VFLAG_CLEAR; /* Undocumented */ + FLAG_C = CFLAG_CLEAR; /* Undocumented */ + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +static void m68k_op_chk_16_ai(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(OPER_AY_AI_16()); + + FLAG_Z = ZFLAG_16(src); /* Undocumented */ + FLAG_V = VFLAG_CLEAR; /* Undocumented */ + FLAG_C = CFLAG_CLEAR; /* Undocumented */ + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +static void m68k_op_chk_16_pi(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(OPER_AY_PI_16()); + + FLAG_Z = ZFLAG_16(src); /* Undocumented */ + FLAG_V = VFLAG_CLEAR; /* Undocumented */ + FLAG_C = CFLAG_CLEAR; /* Undocumented */ + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +static void m68k_op_chk_16_pd(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(OPER_AY_PD_16()); + + FLAG_Z = ZFLAG_16(src); /* Undocumented */ + FLAG_V = VFLAG_CLEAR; /* Undocumented */ + FLAG_C = CFLAG_CLEAR; /* Undocumented */ + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +static void m68k_op_chk_16_di(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(OPER_AY_DI_16()); + + FLAG_Z = ZFLAG_16(src); /* Undocumented */ + FLAG_V = VFLAG_CLEAR; /* Undocumented */ + FLAG_C = CFLAG_CLEAR; /* Undocumented */ + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +static void m68k_op_chk_16_ix(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(OPER_AY_IX_16()); + + FLAG_Z = ZFLAG_16(src); /* Undocumented */ + FLAG_V = VFLAG_CLEAR; /* Undocumented */ + FLAG_C = CFLAG_CLEAR; /* Undocumented */ + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +static void m68k_op_chk_16_aw(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(OPER_AW_16()); + + FLAG_Z = ZFLAG_16(src); /* Undocumented */ + FLAG_V = VFLAG_CLEAR; /* Undocumented */ + FLAG_C = CFLAG_CLEAR; /* Undocumented */ + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +static void m68k_op_chk_16_al(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(OPER_AL_16()); + + FLAG_Z = ZFLAG_16(src); /* Undocumented */ + FLAG_V = VFLAG_CLEAR; /* Undocumented */ + FLAG_C = CFLAG_CLEAR; /* Undocumented */ + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +static void m68k_op_chk_16_pcdi(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(OPER_PCDI_16()); + + FLAG_Z = ZFLAG_16(src); /* Undocumented */ + FLAG_V = VFLAG_CLEAR; /* Undocumented */ + FLAG_C = CFLAG_CLEAR; /* Undocumented */ + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +static void m68k_op_chk_16_pcix(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(OPER_PCIX_16()); + + FLAG_Z = ZFLAG_16(src); /* Undocumented */ + FLAG_V = VFLAG_CLEAR; /* Undocumented */ + FLAG_C = CFLAG_CLEAR; /* Undocumented */ + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +static void m68k_op_chk_16_i(void) +{ + sint src = MAKE_INT_16(DX); + sint bound = MAKE_INT_16(OPER_I_16()); + + FLAG_Z = ZFLAG_16(src); /* Undocumented */ + FLAG_V = VFLAG_CLEAR; /* Undocumented */ + FLAG_C = CFLAG_CLEAR; /* Undocumented */ + + if(src >= 0 && src <= bound) + { + return; + } + FLAG_N = (src < 0)<<7; + m68ki_exception_trap(EXCEPTION_CHK); +} + + +static void m68k_op_clr_8_d(void) +{ + DY &= 0xffffff00; + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_8_al(void) +{ + m68ki_write_8(EA_AL_8(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_16_d(void) +{ + DY &= 0xffff0000; + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_16_ai(void) +{ + m68ki_write_16(EA_AY_AI_16(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_16_pi(void) +{ + m68ki_write_16(EA_AY_PI_16(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_16_pd(void) +{ + m68ki_write_16(EA_AY_PD_16(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_16_di(void) +{ + m68ki_write_16(EA_AY_DI_16(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_16_ix(void) +{ + m68ki_write_16(EA_AY_IX_16(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_16_aw(void) +{ + m68ki_write_16(EA_AW_16(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_16_al(void) +{ + m68ki_write_16(EA_AL_16(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_32_d(void) +{ + DY = 0; + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_32_ai(void) +{ + m68ki_write_32(EA_AY_AI_32(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_32_pi(void) +{ + m68ki_write_32(EA_AY_PI_32(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_32_pd(void) +{ + m68ki_write_32(EA_AY_PD_32(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_32_di(void) +{ + m68ki_write_32(EA_AY_DI_32(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_32_ix(void) +{ + m68ki_write_32(EA_AY_IX_32(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_32_aw(void) +{ + m68ki_write_32(EA_AW_32(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_clr_32_al(void) +{ + m68ki_write_32(EA_AL_32(), 0); + + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; +} + + +static void m68k_op_cmp_8_d(void) +{ + uint src = MASK_OUT_ABOVE_8(DY); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmp_8_ai(void) +{ + uint src = OPER_AY_AI_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmp_8_pi(void) +{ + uint src = OPER_AY_PI_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmp_8_pi7(void) +{ + uint src = OPER_A7_PI_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmp_8_pd(void) +{ + uint src = OPER_AY_PD_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmp_8_pd7(void) +{ + uint src = OPER_A7_PD_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmp_8_di(void) +{ + uint src = OPER_AY_DI_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmp_8_ix(void) +{ + uint src = OPER_AY_IX_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmp_8_aw(void) +{ + uint src = OPER_AW_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmp_8_al(void) +{ + uint src = OPER_AL_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmp_8_pcdi(void) +{ + uint src = OPER_PCDI_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmp_8_pcix(void) +{ + uint src = OPER_PCIX_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmp_8_i(void) +{ + uint src = OPER_I_8(); + uint dst = MASK_OUT_ABOVE_8(DX); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmp_16_d(void) +{ + uint src = MASK_OUT_ABOVE_16(DY); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmp_16_a(void) +{ + uint src = MASK_OUT_ABOVE_16(AY); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmp_16_ai(void) +{ + uint src = OPER_AY_AI_16(); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmp_16_pi(void) +{ + uint src = OPER_AY_PI_16(); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmp_16_pd(void) +{ + uint src = OPER_AY_PD_16(); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmp_16_di(void) +{ + uint src = OPER_AY_DI_16(); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmp_16_ix(void) +{ + uint src = OPER_AY_IX_16(); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmp_16_aw(void) +{ + uint src = OPER_AW_16(); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmp_16_al(void) +{ + uint src = OPER_AL_16(); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmp_16_pcdi(void) +{ + uint src = OPER_PCDI_16(); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmp_16_pcix(void) +{ + uint src = OPER_PCIX_16(); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmp_16_i(void) +{ + uint src = OPER_I_16(); + uint dst = MASK_OUT_ABOVE_16(DX); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmp_32_d(void) +{ + uint src = DY; + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmp_32_a(void) +{ + uint src = AY; + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmp_32_ai(void) +{ + uint src = OPER_AY_AI_32(); + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmp_32_pi(void) +{ + uint src = OPER_AY_PI_32(); + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmp_32_pd(void) +{ + uint src = OPER_AY_PD_32(); + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmp_32_di(void) +{ + uint src = OPER_AY_DI_32(); + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmp_32_ix(void) +{ + uint src = OPER_AY_IX_32(); + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmp_32_aw(void) +{ + uint src = OPER_AW_32(); + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmp_32_al(void) +{ + uint src = OPER_AL_32(); + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmp_32_pcdi(void) +{ + uint src = OPER_PCDI_32(); + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmp_32_pcix(void) +{ + uint src = OPER_PCIX_32(); + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmp_32_i(void) +{ + uint src = OPER_I_32(); + uint dst = DX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_16_d(void) +{ + uint src = MAKE_INT_16(DY); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_16_a(void) +{ + uint src = MAKE_INT_16(AY); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_16_ai(void) +{ + uint src = MAKE_INT_16(OPER_AY_AI_16()); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_16_pi(void) +{ + uint src = MAKE_INT_16(OPER_AY_PI_16()); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_16_pd(void) +{ + uint src = MAKE_INT_16(OPER_AY_PD_16()); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_16_di(void) +{ + uint src = MAKE_INT_16(OPER_AY_DI_16()); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_16_ix(void) +{ + uint src = MAKE_INT_16(OPER_AY_IX_16()); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_16_aw(void) +{ + uint src = MAKE_INT_16(OPER_AW_16()); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_16_al(void) +{ + uint src = MAKE_INT_16(OPER_AL_16()); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_16_pcdi(void) +{ + uint src = MAKE_INT_16(OPER_PCDI_16()); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_16_pcix(void) +{ + uint src = MAKE_INT_16(OPER_PCIX_16()); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_16_i(void) +{ + uint src = MAKE_INT_16(OPER_I_16()); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_32_d(void) +{ + uint src = DY; + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_32_a(void) +{ + uint src = AY; + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_32_ai(void) +{ + uint src = OPER_AY_AI_32(); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_32_pi(void) +{ + uint src = OPER_AY_PI_32(); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_32_pd(void) +{ + uint src = OPER_AY_PD_32(); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_32_di(void) +{ + uint src = OPER_AY_DI_32(); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_32_ix(void) +{ + uint src = OPER_AY_IX_32(); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_32_aw(void) +{ + uint src = OPER_AW_32(); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_32_al(void) +{ + uint src = OPER_AL_32(); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_32_pcdi(void) +{ + uint src = OPER_PCDI_32(); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_32_pcix(void) +{ + uint src = OPER_PCIX_32(); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpa_32_i(void) +{ + uint src = OPER_I_32(); + uint dst = AX; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpi_8_d(void) +{ + uint src = OPER_I_8(); + uint dst = MASK_OUT_ABOVE_8(DY); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmpi_8_ai(void) +{ + uint src = OPER_I_8(); + uint dst = OPER_AY_AI_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmpi_8_pi(void) +{ + uint src = OPER_I_8(); + uint dst = OPER_AY_PI_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmpi_8_pi7(void) +{ + uint src = OPER_I_8(); + uint dst = OPER_A7_PI_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmpi_8_pd(void) +{ + uint src = OPER_I_8(); + uint dst = OPER_AY_PD_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmpi_8_pd7(void) +{ + uint src = OPER_I_8(); + uint dst = OPER_A7_PD_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmpi_8_di(void) +{ + uint src = OPER_I_8(); + uint dst = OPER_AY_DI_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmpi_8_ix(void) +{ + uint src = OPER_I_8(); + uint dst = OPER_AY_IX_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmpi_8_aw(void) +{ + uint src = OPER_I_8(); + uint dst = OPER_AW_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmpi_8_al(void) +{ + uint src = OPER_I_8(); + uint dst = OPER_AL_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmpi_16_d(void) +{ + uint src = OPER_I_16(); + uint dst = MASK_OUT_ABOVE_16(DY); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmpi_16_ai(void) +{ + uint src = OPER_I_16(); + uint dst = OPER_AY_AI_16(); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmpi_16_pi(void) +{ + uint src = OPER_I_16(); + uint dst = OPER_AY_PI_16(); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmpi_16_pd(void) +{ + uint src = OPER_I_16(); + uint dst = OPER_AY_PD_16(); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmpi_16_di(void) +{ + uint src = OPER_I_16(); + uint dst = OPER_AY_DI_16(); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmpi_16_ix(void) +{ + uint src = OPER_I_16(); + uint dst = OPER_AY_IX_16(); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmpi_16_aw(void) +{ + uint src = OPER_I_16(); + uint dst = OPER_AW_16(); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmpi_16_al(void) +{ + uint src = OPER_I_16(); + uint dst = OPER_AL_16(); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmpi_32_d(void) +{ + uint src = OPER_I_32(); + uint dst = DY; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpi_32_ai(void) +{ + uint src = OPER_I_32(); + uint dst = OPER_AY_AI_32(); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpi_32_pi(void) +{ + uint src = OPER_I_32(); + uint dst = OPER_AY_PI_32(); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpi_32_pd(void) +{ + uint src = OPER_I_32(); + uint dst = OPER_AY_PD_32(); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpi_32_di(void) +{ + uint src = OPER_I_32(); + uint dst = OPER_AY_DI_32(); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpi_32_ix(void) +{ + uint src = OPER_I_32(); + uint dst = OPER_AY_IX_32(); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpi_32_aw(void) +{ + uint src = OPER_I_32(); + uint dst = OPER_AW_32(); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpi_32_al(void) +{ + uint src = OPER_I_32(); + uint dst = OPER_AL_32(); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_cmpm_8_ax7(void) +{ + uint src = OPER_AY_PI_8(); + uint dst = OPER_A7_PI_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmpm_8_ay7(void) +{ + uint src = OPER_A7_PI_8(); + uint dst = OPER_AX_PI_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmpm_8_axy7(void) +{ + uint src = OPER_A7_PI_8(); + uint dst = OPER_A7_PI_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmpm_8(void) +{ + uint src = OPER_AY_PI_8(); + uint dst = OPER_AX_PI_8(); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_C = CFLAG_8(res); +} + + +static void m68k_op_cmpm_16(void) +{ + uint src = OPER_AY_PI_16(); + uint dst = OPER_AX_PI_16(); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_C = CFLAG_16(res); +} + + +static void m68k_op_cmpm_32(void) +{ + uint src = OPER_AY_PI_32(); + uint dst = OPER_AX_PI_32(); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_C = CFLAG_SUB_32(src, dst, res); +} + + +static void m68k_op_dbt_16(void) +{ + REG_PC += 2; +} + + +static void m68k_op_dbf_16(void) +{ + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + + /* reset idle loop detection */ + m68ki_cpu.poll.detected = 0; + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); +} + + +static void m68k_op_dbhi_16(void) +{ + if(COND_NOT_HI()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + + /* reset idle loop detection */ + m68ki_cpu.poll.detected = 0; + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +static void m68k_op_dbls_16(void) +{ + if(COND_NOT_LS()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + + /* reset idle loop detection */ + m68ki_cpu.poll.detected = 0; + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +static void m68k_op_dbcc_16(void) +{ + if(COND_NOT_CC()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + + /* reset idle loop detection */ + m68ki_cpu.poll.detected = 0; + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +static void m68k_op_dbcs_16(void) +{ + if(COND_NOT_CS()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + + /* reset idle loop detection */ + m68ki_cpu.poll.detected = 0; + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +static void m68k_op_dbne_16(void) +{ + if(COND_NOT_NE()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + + /* reset idle loop detection */ + m68ki_cpu.poll.detected = 0; + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +static void m68k_op_dbeq_16(void) +{ + if(COND_NOT_EQ()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + + /* reset idle loop detection */ + m68ki_cpu.poll.detected = 0; + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +static void m68k_op_dbvc_16(void) +{ + if(COND_NOT_VC()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + + /* reset idle loop detection */ + m68ki_cpu.poll.detected = 0; + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +static void m68k_op_dbvs_16(void) +{ + if(COND_NOT_VS()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + + /* reset idle loop detection */ + m68ki_cpu.poll.detected = 0; + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +static void m68k_op_dbpl_16(void) +{ + if(COND_NOT_PL()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + + /* reset idle loop detection */ + m68ki_cpu.poll.detected = 0; + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +static void m68k_op_dbmi_16(void) +{ + if(COND_NOT_MI()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + + /* reset idle loop detection */ + m68ki_cpu.poll.detected = 0; + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +static void m68k_op_dbge_16(void) +{ + if(COND_NOT_GE()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + + /* reset idle loop detection */ + m68ki_cpu.poll.detected = 0; + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +static void m68k_op_dblt_16(void) +{ + if(COND_NOT_LT()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + + /* reset idle loop detection */ + m68ki_cpu.poll.detected = 0; + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +static void m68k_op_dbgt_16(void) +{ + if(COND_NOT_GT()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + + /* reset idle loop detection */ + m68ki_cpu.poll.detected = 0; + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +static void m68k_op_dble_16(void) +{ + if(COND_NOT_LE()) + { + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(*r_dst - 1); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + if(res != 0xffff) + { + uint offset = OPER_I_16(); + REG_PC -= 2; + m68ki_branch_16(offset); + USE_CYCLES(CYC_DBCC_F_NOEXP); + + /* reset idle loop detection */ + m68ki_cpu.poll.detected = 0; + return; + } + REG_PC += 2; + USE_CYCLES(CYC_DBCC_F_EXP); + return; + } + REG_PC += 2; +} + + +static void m68k_op_divs_16_d(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(DY); + sint quotient; + sint remainder; + + if(src != 0) + { + UseDivsCycles(*r_dst,src); + + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divs_16_ai(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AY_AI_16()); + sint quotient; + sint remainder; + + if(src != 0) + { + UseDivsCycles(*r_dst,src); + + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divs_16_pi(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AY_PI_16()); + sint quotient; + sint remainder; + + if(src != 0) + { + UseDivsCycles(*r_dst,src); + + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divs_16_pd(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AY_PD_16()); + sint quotient; + sint remainder; + + if(src != 0) + { + UseDivsCycles(*r_dst,src); + + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divs_16_di(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AY_DI_16()); + sint quotient; + sint remainder; + + if(src != 0) + { + UseDivsCycles(*r_dst,src); + + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divs_16_ix(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AY_IX_16()); + sint quotient; + sint remainder; + + if(src != 0) + { + UseDivsCycles(*r_dst,src); + + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divs_16_aw(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AW_16()); + sint quotient; + sint remainder; + + if(src != 0) + { + UseDivsCycles(*r_dst,src); + + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divs_16_al(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AL_16()); + sint quotient; + sint remainder; + + if(src != 0) + { + UseDivsCycles(*r_dst,src); + + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divs_16_pcdi(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_PCDI_16()); + sint quotient; + sint remainder; + + if(src != 0) + { + UseDivsCycles(*r_dst,src); + + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divs_16_pcix(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_PCIX_16()); + sint quotient; + sint remainder; + + if(src != 0) + { + UseDivsCycles(*r_dst,src); + + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divs_16_i(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_I_16()); + sint quotient; + sint remainder; + + if(src != 0) + { + UseDivsCycles(*r_dst,src); + + if((uint32)*r_dst == 0x80000000 && src == -1) + { + FLAG_Z = 0; + FLAG_N = NFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = 0; + return; + } + + quotient = MAKE_INT_32(*r_dst) / src; + remainder = MAKE_INT_32(*r_dst) % src; + + if(quotient == MAKE_INT_16(quotient)) + { + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divu_16_d(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_16(DY); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + UseDivuCycles(*r_dst,src); + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + USE_CYCLES(7 * 10); + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divu_16_ai(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_AI_16(); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + UseDivuCycles(*r_dst,src); + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + USE_CYCLES(7 * 10); + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divu_16_pi(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PI_16(); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + UseDivuCycles(*r_dst,src); + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + USE_CYCLES(7 *10); + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divu_16_pd(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PD_16(); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + UseDivuCycles(*r_dst,src); + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + USE_CYCLES(7 * 10); + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divu_16_di(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_DI_16(); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + UseDivuCycles(*r_dst,src); + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + USE_CYCLES(7 * 10); + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divu_16_ix(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_IX_16(); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + UseDivuCycles(*r_dst,src); + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + USE_CYCLES(7 * 10); + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divu_16_aw(void) +{ + uint* r_dst = &DX; + uint src = OPER_AW_16(); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + UseDivuCycles(*r_dst,src); + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + USE_CYCLES(7 * 10); + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divu_16_al(void) +{ + uint* r_dst = &DX; + uint src = OPER_AL_16(); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + UseDivuCycles(*r_dst,src); + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + USE_CYCLES(7 * 10); + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divu_16_pcdi(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCDI_16(); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + UseDivuCycles(*r_dst,src); + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + USE_CYCLES(7 * 10); + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divu_16_pcix(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCIX_16(); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + UseDivuCycles(*r_dst,src); + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + USE_CYCLES(7 * 10); + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_divu_16_i(void) +{ + uint* r_dst = &DX; + uint src = OPER_I_16(); + + if(src != 0) + { + uint quotient = *r_dst / src; + uint remainder = *r_dst % src; + + if(quotient < 0x10000) + { + UseDivuCycles(*r_dst,src); + FLAG_Z = quotient; + FLAG_N = NFLAG_16(quotient); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16)); + return; + } + USE_CYCLES(7 * 10); + FLAG_V = VFLAG_SET; + FLAG_N = NFLAG_SET; /* undocumented behavior (fixes Blood Shot on Genesis) */ + FLAG_C = CFLAG_CLEAR; + return; + } + FLAG_C = CFLAG_CLEAR; + m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE); +} + + +static void m68k_op_eor_8_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY ^= MASK_OUT_ABOVE_8(DX)); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_8_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_8_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_8_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_8_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_8_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_8_di(void) +{ + uint ea = EA_AY_DI_8(); + uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_8_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_8_aw(void) +{ + uint ea = EA_AW_8(); + uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_8_al(void) +{ + uint ea = EA_AL_8(); + uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_16_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY ^= MASK_OUT_ABOVE_16(DX)); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_16_aw(void) +{ + uint ea = EA_AW_16(); + uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_16_al(void) +{ + uint ea = EA_AL_16(); + uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_32_d(void) +{ + uint res = DY ^= DX; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_32_ai(void) +{ + uint ea = EA_AY_AI_32(); + uint res = DX ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_32_pi(void) +{ + uint ea = EA_AY_PI_32(); + uint res = DX ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_32_pd(void) +{ + uint ea = EA_AY_PD_32(); + uint res = DX ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_32_di(void) +{ + uint ea = EA_AY_DI_32(); + uint res = DX ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_32_ix(void) +{ + uint ea = EA_AY_IX_32(); + uint res = DX ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_32_aw(void) +{ + uint ea = EA_AW_32(); + uint res = DX ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eor_32_al(void) +{ + uint ea = EA_AL_32(); + uint res = DX ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_8_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY ^= OPER_I_8()); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_8_ai(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_AI_8(); + uint res = src ^ m68ki_read_8(ea); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_8_pi(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_PI_8(); + uint res = src ^ m68ki_read_8(ea); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_8_pi7(void) +{ + uint src = OPER_I_8(); + uint ea = EA_A7_PI_8(); + uint res = src ^ m68ki_read_8(ea); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_8_pd(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_PD_8(); + uint res = src ^ m68ki_read_8(ea); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_8_pd7(void) +{ + uint src = OPER_I_8(); + uint ea = EA_A7_PD_8(); + uint res = src ^ m68ki_read_8(ea); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_8_di(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_DI_8(); + uint res = src ^ m68ki_read_8(ea); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_8_ix(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_IX_8(); + uint res = src ^ m68ki_read_8(ea); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_8_aw(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AW_8(); + uint res = src ^ m68ki_read_8(ea); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_8_al(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AL_8(); + uint res = src ^ m68ki_read_8(ea); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_16_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY ^= OPER_I_16()); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_16_ai(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_AI_16(); + uint res = src ^ m68ki_read_16(ea); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_16_pi(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_PI_16(); + uint res = src ^ m68ki_read_16(ea); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_16_pd(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_PD_16(); + uint res = src ^ m68ki_read_16(ea); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_16_di(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_DI_16(); + uint res = src ^ m68ki_read_16(ea); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_16_ix(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_IX_16(); + uint res = src ^ m68ki_read_16(ea); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_16_aw(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AW_16(); + uint res = src ^ m68ki_read_16(ea); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_16_al(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AL_16(); + uint res = src ^ m68ki_read_16(ea); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_32_d(void) +{ + uint res = DY ^= OPER_I_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_32_ai(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_AI_32(); + uint res = src ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_32_pi(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_PI_32(); + uint res = src ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_32_pd(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_PD_32(); + uint res = src ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_32_di(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_DI_32(); + uint res = src ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_32_ix(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_IX_32(); + uint res = src ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_32_aw(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AW_32(); + uint res = src ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_32_al(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AL_32(); + uint res = src ^ m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_eori_16_toc(void) +{ + m68ki_set_ccr(m68ki_get_ccr() ^ OPER_I_16()); +} + + +static void m68k_op_eori_16_tos(void) +{ + if(FLAG_S) + { + uint src = OPER_I_16(); + m68ki_set_sr(m68ki_get_sr() ^ src); + return; + } + m68ki_exception_privilege_violation(); +} + + +static void m68k_op_exg_32_dd(void) +{ + uint* reg_a = &DX; + uint* reg_b = &DY; + uint tmp = *reg_a; + *reg_a = *reg_b; + *reg_b = tmp; +} + + +static void m68k_op_exg_32_aa(void) +{ + uint* reg_a = &AX; + uint* reg_b = &AY; + uint tmp = *reg_a; + *reg_a = *reg_b; + *reg_b = tmp; +} + + +static void m68k_op_exg_32_da(void) +{ + uint* reg_a = &DX; + uint* reg_b = &AY; + uint tmp = *reg_a; + *reg_a = *reg_b; + *reg_b = tmp; +} + + +static void m68k_op_ext_16(void) +{ + uint* r_dst = &DY; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xff00 : 0); + + FLAG_N = NFLAG_16(*r_dst); + FLAG_Z = MASK_OUT_ABOVE_16(*r_dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_ext_32(void) +{ + uint* r_dst = &DY; + + *r_dst = MASK_OUT_ABOVE_16(*r_dst) | (GET_MSB_16(*r_dst) ? 0xffff0000 : 0); + + FLAG_N = NFLAG_32(*r_dst); + FLAG_Z = *r_dst; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_illegal(void) +{ + m68ki_exception_illegal(); +} + + +static void m68k_op_jmp_32_ai(void) +{ + m68ki_jump(EA_AY_AI_32()); +} + + +static void m68k_op_jmp_32_di(void) +{ + m68ki_jump(EA_AY_DI_32()); +} + + +static void m68k_op_jmp_32_ix(void) +{ + m68ki_jump(EA_AY_IX_32()); +} + + +static void m68k_op_jmp_32_aw(void) +{ + m68ki_jump(EA_AW_32()); +} + + +static void m68k_op_jmp_32_al(void) +{ + m68ki_jump(EA_AL_32()); +} + + +static void m68k_op_jmp_32_pcdi(void) +{ + m68ki_jump(EA_PCDI_32()); +} + + +static void m68k_op_jmp_32_pcix(void) +{ + m68ki_jump(EA_PCIX_32()); +} + + +static void m68k_op_jsr_32_ai(void) +{ + uint ea = EA_AY_AI_32(); + m68ki_push_32(REG_PC); + m68ki_jump(ea); +} + + +static void m68k_op_jsr_32_di(void) +{ + uint ea = EA_AY_DI_32(); + m68ki_push_32(REG_PC); + m68ki_jump(ea); +} + + +static void m68k_op_jsr_32_ix(void) +{ + uint ea = EA_AY_IX_32(); + m68ki_push_32(REG_PC); + m68ki_jump(ea); +} + + +static void m68k_op_jsr_32_aw(void) +{ + uint ea = EA_AW_32(); + m68ki_push_32(REG_PC); + m68ki_jump(ea); +} + + +static void m68k_op_jsr_32_al(void) +{ + uint ea = EA_AL_32(); + m68ki_push_32(REG_PC); + m68ki_jump(ea); +} + + +static void m68k_op_jsr_32_pcdi(void) +{ + uint ea = EA_PCDI_32(); + m68ki_push_32(REG_PC); + m68ki_jump(ea); +} + + +static void m68k_op_jsr_32_pcix(void) +{ + uint ea = EA_PCIX_32(); + m68ki_push_32(REG_PC); + m68ki_jump(ea); +} + + +static void m68k_op_lea_32_ai(void) +{ + AX = EA_AY_AI_32(); +} + + +static void m68k_op_lea_32_di(void) +{ + AX = EA_AY_DI_32(); +} + + +static void m68k_op_lea_32_ix(void) +{ + AX = EA_AY_IX_32(); +} + + +static void m68k_op_lea_32_aw(void) +{ + AX = EA_AW_32(); +} + + +static void m68k_op_lea_32_al(void) +{ + AX = EA_AL_32(); +} + + +static void m68k_op_lea_32_pcdi(void) +{ + AX = EA_PCDI_32(); +} + + +static void m68k_op_lea_32_pcix(void) +{ + AX = EA_PCIX_32(); +} + + +static void m68k_op_link_16_a7(void) +{ + REG_A[7] -= 4; + m68ki_write_32(REG_A[7], REG_A[7]); + REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16())); +} + + +static void m68k_op_link_16(void) +{ + uint* r_dst = &AY; + + m68ki_push_32(*r_dst); + *r_dst = REG_A[7]; + REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16())); +} + + +static void m68k_op_lsr_8_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = src >> shift; + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_X = FLAG_C = src << (9-shift); + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsr_16_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = src >> shift; + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_X = FLAG_C = src << (9-shift); + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsr_32_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = *r_dst; + uint res = src >> shift; + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + *r_dst = res; + + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_X = FLAG_C = src << (9-shift); + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsr_8_r(void) +{ + uint* r_dst = &DY; + uint shift = DX & 0x3f; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = src >> shift; + + if(shift != 0) + { + USE_CYCLES(shift * CYC_SHIFT); + + if(shift <= 8) + { + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + FLAG_X = FLAG_C = src << (9-shift); + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + *r_dst &= 0xffffff00; + FLAG_X = XFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_8(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsr_16_r(void) +{ + uint* r_dst = &DY; + uint shift = DX & 0x3f; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = src >> shift; + + if(shift != 0) + { + USE_CYCLES(shift * CYC_SHIFT); + + if(shift <= 16) + { + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + FLAG_C = FLAG_X = (src >> (shift - 1))<<8; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + *r_dst &= 0xffff0000; + FLAG_X = XFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_16(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsr_32_r(void) +{ + uint* r_dst = &DY; + uint shift = DX & 0x3f; + uint src = *r_dst; + uint res = src >> shift; + + if(shift != 0) + { + USE_CYCLES(shift * CYC_SHIFT); + + if(shift < 32) + { + *r_dst = res; + FLAG_C = FLAG_X = (src >> (shift - 1))<<8; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + *r_dst = 0; + FLAG_X = FLAG_C = (shift == 32 ? GET_MSB_32(src)>>23 : 0); + FLAG_N = NFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_32(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsr_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_C = FLAG_X = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsr_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_C = FLAG_X = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsr_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_C = FLAG_X = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsr_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_C = FLAG_X = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsr_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_C = FLAG_X = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsr_16_aw(void) +{ + uint ea = EA_AW_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_C = FLAG_X = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsr_16_al(void) +{ + uint ea = EA_AL_16(); + uint src = m68ki_read_16(ea); + uint res = src >> 1; + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_CLEAR; + FLAG_Z = res; + FLAG_C = FLAG_X = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsl_8_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = MASK_OUT_ABOVE_8(src << shift); + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src << shift; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsl_16_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = MASK_OUT_ABOVE_16(src << shift); + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> (8-shift); + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsl_32_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = *r_dst; + uint res = MASK_OUT_ABOVE_32(src << shift); + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> (24-shift); + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsl_8_r(void) +{ + uint* r_dst = &DY; + uint shift = DX & 0x3f; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = MASK_OUT_ABOVE_8(src << shift); + + if(shift != 0) + { + USE_CYCLES(shift * CYC_SHIFT); + + if(shift <= 8) + { + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + FLAG_X = FLAG_C = src << shift; + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + *r_dst &= 0xffffff00; + FLAG_X = XFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_8(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsl_16_r(void) +{ + uint* r_dst = &DY; + uint shift = DX & 0x3f; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = MASK_OUT_ABOVE_16(src << shift); + + if(shift != 0) + { + USE_CYCLES(shift * CYC_SHIFT); + + if(shift <= 16) + { + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + FLAG_X = FLAG_C = (src << shift) >> 8; + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + *r_dst &= 0xffff0000; + FLAG_X = XFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_16(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsl_32_r(void) +{ + uint* r_dst = &DY; + uint shift = DX & 0x3f; + uint src = *r_dst; + uint res = MASK_OUT_ABOVE_32(src << shift); + + if(shift != 0) + { + USE_CYCLES(shift * CYC_SHIFT); + + if(shift < 32) + { + *r_dst = res; + FLAG_X = FLAG_C = (src >> (32 - shift)) << 8; + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + *r_dst = 0; + FLAG_X = FLAG_C = ((shift == 32 ? src & 1 : 0))<<8; + FLAG_N = NFLAG_CLEAR; + FLAG_Z = ZFLAG_SET; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_32(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsl_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsl_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsl_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsl_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsl_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsl_16_aw(void) +{ + uint ea = EA_AW_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_lsl_16_al(void) +{ + uint ea = EA_AL_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(src << 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_X = FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_move_8_d_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_8_d_ai(void) +{ + uint res = OPER_AY_AI_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_8_d_pi(void) +{ + uint res = OPER_AY_PI_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_8_d_pi7(void) +{ + uint res = OPER_A7_PI_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_8_d_pd(void) +{ + uint res = OPER_AY_PD_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_8_d_pd7(void) +{ + uint res = OPER_A7_PD_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_8_d_di(void) +{ + uint res = OPER_AY_DI_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_8_d_ix(void) +{ + uint res = OPER_AY_IX_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_8_d_aw(void) +{ + uint res = OPER_AW_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_8_d_al(void) +{ + uint res = OPER_AL_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_8_d_pcdi(void) +{ + uint res = OPER_PCDI_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_8_d_pcix(void) +{ + uint res = OPER_PCIX_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_8_d_i(void) +{ + uint res = OPER_I_8(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_8_ai_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + uint ea = EA_AX_AI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ai_ai(void) +{ + uint res = OPER_AY_AI_8(); + uint ea = EA_AX_AI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ai_pi(void) +{ + uint res = OPER_AY_PI_8(); + uint ea = EA_AX_AI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ai_pi7(void) +{ + uint res = OPER_A7_PI_8(); + uint ea = EA_AX_AI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ai_pd(void) +{ + uint res = OPER_AY_PD_8(); + uint ea = EA_AX_AI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ai_pd7(void) +{ + uint res = OPER_A7_PD_8(); + uint ea = EA_AX_AI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ai_di(void) +{ + uint res = OPER_AY_DI_8(); + uint ea = EA_AX_AI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ai_ix(void) +{ + uint res = OPER_AY_IX_8(); + uint ea = EA_AX_AI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ai_aw(void) +{ + uint res = OPER_AW_8(); + uint ea = EA_AX_AI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ai_al(void) +{ + uint res = OPER_AL_8(); + uint ea = EA_AX_AI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ai_pcdi(void) +{ + uint res = OPER_PCDI_8(); + uint ea = EA_AX_AI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ai_pcix(void) +{ + uint res = OPER_PCIX_8(); + uint ea = EA_AX_AI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ai_i(void) +{ + uint res = OPER_I_8(); + uint ea = EA_AX_AI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi7_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + uint ea = EA_A7_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + uint ea = EA_AX_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi7_ai(void) +{ + uint res = OPER_AY_AI_8(); + uint ea = EA_A7_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi7_pi(void) +{ + uint res = OPER_AY_PI_8(); + uint ea = EA_A7_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi7_pi7(void) +{ + uint res = OPER_A7_PI_8(); + uint ea = EA_A7_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi7_pd(void) +{ + uint res = OPER_AY_PD_8(); + uint ea = EA_A7_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi7_pd7(void) +{ + uint res = OPER_A7_PD_8(); + uint ea = EA_A7_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi7_di(void) +{ + uint res = OPER_AY_DI_8(); + uint ea = EA_A7_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi7_ix(void) +{ + uint res = OPER_AY_IX_8(); + uint ea = EA_A7_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi7_aw(void) +{ + uint res = OPER_AW_8(); + uint ea = EA_A7_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi7_al(void) +{ + uint res = OPER_AL_8(); + uint ea = EA_A7_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi7_pcdi(void) +{ + uint res = OPER_PCDI_8(); + uint ea = EA_A7_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi7_pcix(void) +{ + uint res = OPER_PCIX_8(); + uint ea = EA_A7_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi7_i(void) +{ + uint res = OPER_I_8(); + uint ea = EA_A7_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi_ai(void) +{ + uint res = OPER_AY_AI_8(); + uint ea = EA_AX_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi_pi(void) +{ + uint res = OPER_AY_PI_8(); + uint ea = EA_AX_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi_pi7(void) +{ + uint res = OPER_A7_PI_8(); + uint ea = EA_AX_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi_pd(void) +{ + uint res = OPER_AY_PD_8(); + uint ea = EA_AX_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi_pd7(void) +{ + uint res = OPER_A7_PD_8(); + uint ea = EA_AX_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi_di(void) +{ + uint res = OPER_AY_DI_8(); + uint ea = EA_AX_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi_ix(void) +{ + uint res = OPER_AY_IX_8(); + uint ea = EA_AX_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi_aw(void) +{ + uint res = OPER_AW_8(); + uint ea = EA_AX_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi_al(void) +{ + uint res = OPER_AL_8(); + uint ea = EA_AX_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi_pcdi(void) +{ + uint res = OPER_PCDI_8(); + uint ea = EA_AX_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi_pcix(void) +{ + uint res = OPER_PCIX_8(); + uint ea = EA_AX_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pi_i(void) +{ + uint res = OPER_I_8(); + uint ea = EA_AX_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd7_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + uint ea = EA_A7_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + uint ea = EA_AX_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd7_ai(void) +{ + uint res = OPER_AY_AI_8(); + uint ea = EA_A7_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd7_pi(void) +{ + uint res = OPER_AY_PI_8(); + uint ea = EA_A7_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd7_pi7(void) +{ + uint res = OPER_A7_PI_8(); + uint ea = EA_A7_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd7_pd(void) +{ + uint res = OPER_AY_PD_8(); + uint ea = EA_A7_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd7_pd7(void) +{ + uint res = OPER_A7_PD_8(); + uint ea = EA_A7_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd7_di(void) +{ + uint res = OPER_AY_DI_8(); + uint ea = EA_A7_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd7_ix(void) +{ + uint res = OPER_AY_IX_8(); + uint ea = EA_A7_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd7_aw(void) +{ + uint res = OPER_AW_8(); + uint ea = EA_A7_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd7_al(void) +{ + uint res = OPER_AL_8(); + uint ea = EA_A7_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd7_pcdi(void) +{ + uint res = OPER_PCDI_8(); + uint ea = EA_A7_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd7_pcix(void) +{ + uint res = OPER_PCIX_8(); + uint ea = EA_A7_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd7_i(void) +{ + uint res = OPER_I_8(); + uint ea = EA_A7_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd_ai(void) +{ + uint res = OPER_AY_AI_8(); + uint ea = EA_AX_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd_pi(void) +{ + uint res = OPER_AY_PI_8(); + uint ea = EA_AX_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd_pi7(void) +{ + uint res = OPER_A7_PI_8(); + uint ea = EA_AX_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd_pd(void) +{ + uint res = OPER_AY_PD_8(); + uint ea = EA_AX_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd_pd7(void) +{ + uint res = OPER_A7_PD_8(); + uint ea = EA_AX_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd_di(void) +{ + uint res = OPER_AY_DI_8(); + uint ea = EA_AX_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd_ix(void) +{ + uint res = OPER_AY_IX_8(); + uint ea = EA_AX_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd_aw(void) +{ + uint res = OPER_AW_8(); + uint ea = EA_AX_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd_al(void) +{ + uint res = OPER_AL_8(); + uint ea = EA_AX_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd_pcdi(void) +{ + uint res = OPER_PCDI_8(); + uint ea = EA_AX_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd_pcix(void) +{ + uint res = OPER_PCIX_8(); + uint ea = EA_AX_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_pd_i(void) +{ + uint res = OPER_I_8(); + uint ea = EA_AX_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_di_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + uint ea = EA_AX_DI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_di_ai(void) +{ + uint res = OPER_AY_AI_8(); + uint ea = EA_AX_DI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_di_pi(void) +{ + uint res = OPER_AY_PI_8(); + uint ea = EA_AX_DI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_di_pi7(void) +{ + uint res = OPER_A7_PI_8(); + uint ea = EA_AX_DI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_di_pd(void) +{ + uint res = OPER_AY_PD_8(); + uint ea = EA_AX_DI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_di_pd7(void) +{ + uint res = OPER_A7_PD_8(); + uint ea = EA_AX_DI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_di_di(void) +{ + uint res = OPER_AY_DI_8(); + uint ea = EA_AX_DI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_di_ix(void) +{ + uint res = OPER_AY_IX_8(); + uint ea = EA_AX_DI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_di_aw(void) +{ + uint res = OPER_AW_8(); + uint ea = EA_AX_DI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_di_al(void) +{ + uint res = OPER_AL_8(); + uint ea = EA_AX_DI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_di_pcdi(void) +{ + uint res = OPER_PCDI_8(); + uint ea = EA_AX_DI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_di_pcix(void) +{ + uint res = OPER_PCIX_8(); + uint ea = EA_AX_DI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_di_i(void) +{ + uint res = OPER_I_8(); + uint ea = EA_AX_DI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ix_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + uint ea = EA_AX_IX_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ix_ai(void) +{ + uint res = OPER_AY_AI_8(); + uint ea = EA_AX_IX_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ix_pi(void) +{ + uint res = OPER_AY_PI_8(); + uint ea = EA_AX_IX_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ix_pi7(void) +{ + uint res = OPER_A7_PI_8(); + uint ea = EA_AX_IX_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ix_pd(void) +{ + uint res = OPER_AY_PD_8(); + uint ea = EA_AX_IX_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ix_pd7(void) +{ + uint res = OPER_A7_PD_8(); + uint ea = EA_AX_IX_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ix_di(void) +{ + uint res = OPER_AY_DI_8(); + uint ea = EA_AX_IX_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ix_ix(void) +{ + uint res = OPER_AY_IX_8(); + uint ea = EA_AX_IX_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ix_aw(void) +{ + uint res = OPER_AW_8(); + uint ea = EA_AX_IX_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ix_al(void) +{ + uint res = OPER_AL_8(); + uint ea = EA_AX_IX_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ix_pcdi(void) +{ + uint res = OPER_PCDI_8(); + uint ea = EA_AX_IX_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ix_pcix(void) +{ + uint res = OPER_PCIX_8(); + uint ea = EA_AX_IX_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_ix_i(void) +{ + uint res = OPER_I_8(); + uint ea = EA_AX_IX_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_aw_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + uint ea = EA_AW_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_aw_ai(void) +{ + uint res = OPER_AY_AI_8(); + uint ea = EA_AW_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_aw_pi(void) +{ + uint res = OPER_AY_PI_8(); + uint ea = EA_AW_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_aw_pi7(void) +{ + uint res = OPER_A7_PI_8(); + uint ea = EA_AW_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_aw_pd(void) +{ + uint res = OPER_AY_PD_8(); + uint ea = EA_AW_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_aw_pd7(void) +{ + uint res = OPER_A7_PD_8(); + uint ea = EA_AW_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_aw_di(void) +{ + uint res = OPER_AY_DI_8(); + uint ea = EA_AW_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_aw_ix(void) +{ + uint res = OPER_AY_IX_8(); + uint ea = EA_AW_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_aw_aw(void) +{ + uint res = OPER_AW_8(); + uint ea = EA_AW_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_aw_al(void) +{ + uint res = OPER_AL_8(); + uint ea = EA_AW_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_aw_pcdi(void) +{ + uint res = OPER_PCDI_8(); + uint ea = EA_AW_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_aw_pcix(void) +{ + uint res = OPER_PCIX_8(); + uint ea = EA_AW_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_aw_i(void) +{ + uint res = OPER_I_8(); + uint ea = EA_AW_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_al_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + uint ea = EA_AL_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_al_ai(void) +{ + uint res = OPER_AY_AI_8(); + uint ea = EA_AL_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_al_pi(void) +{ + uint res = OPER_AY_PI_8(); + uint ea = EA_AL_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_al_pi7(void) +{ + uint res = OPER_A7_PI_8(); + uint ea = EA_AL_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_al_pd(void) +{ + uint res = OPER_AY_PD_8(); + uint ea = EA_AL_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_al_pd7(void) +{ + uint res = OPER_A7_PD_8(); + uint ea = EA_AL_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_al_di(void) +{ + uint res = OPER_AY_DI_8(); + uint ea = EA_AL_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_al_ix(void) +{ + uint res = OPER_AY_IX_8(); + uint ea = EA_AL_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_al_aw(void) +{ + uint res = OPER_AW_8(); + uint ea = EA_AL_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_al_al(void) +{ + uint res = OPER_AL_8(); + uint ea = EA_AL_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_al_pcdi(void) +{ + uint res = OPER_PCDI_8(); + uint ea = EA_AL_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_al_pcix(void) +{ + uint res = OPER_PCIX_8(); + uint ea = EA_AL_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_8_al_i(void) +{ + uint res = OPER_I_8(); + uint ea = EA_AL_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_move_16_d_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_16_d_a(void) +{ + uint res = MASK_OUT_ABOVE_16(AY); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_16_d_ai(void) +{ + uint res = OPER_AY_AI_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_16_d_pi(void) +{ + uint res = OPER_AY_PI_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_16_d_pd(void) +{ + uint res = OPER_AY_PD_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_16_d_di(void) +{ + uint res = OPER_AY_DI_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_16_d_ix(void) +{ + uint res = OPER_AY_IX_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_16_d_aw(void) +{ + uint res = OPER_AW_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_16_d_al(void) +{ + uint res = OPER_AL_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_16_d_pcdi(void) +{ + uint res = OPER_PCDI_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_16_d_pcix(void) +{ + uint res = OPER_PCIX_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_16_d_i(void) +{ + uint res = OPER_I_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_16_ai_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY); + uint ea = EA_AX_AI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ai_a(void) +{ + uint res = MASK_OUT_ABOVE_16(AY); + uint ea = EA_AX_AI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ai_ai(void) +{ + uint res = OPER_AY_AI_16(); + uint ea = EA_AX_AI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ai_pi(void) +{ + uint res = OPER_AY_PI_16(); + uint ea = EA_AX_AI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ai_pd(void) +{ + uint res = OPER_AY_PD_16(); + uint ea = EA_AX_AI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ai_di(void) +{ + uint res = OPER_AY_DI_16(); + uint ea = EA_AX_AI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ai_ix(void) +{ + uint res = OPER_AY_IX_16(); + uint ea = EA_AX_AI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ai_aw(void) +{ + uint res = OPER_AW_16(); + uint ea = EA_AX_AI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ai_al(void) +{ + uint res = OPER_AL_16(); + uint ea = EA_AX_AI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ai_pcdi(void) +{ + uint res = OPER_PCDI_16(); + uint ea = EA_AX_AI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ai_pcix(void) +{ + uint res = OPER_PCIX_16(); + uint ea = EA_AX_AI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ai_i(void) +{ + uint res = OPER_I_16(); + uint ea = EA_AX_AI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pi_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY); + uint ea = EA_AX_PI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pi_a(void) +{ + uint res = MASK_OUT_ABOVE_16(AY); + uint ea = EA_AX_PI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pi_ai(void) +{ + uint res = OPER_AY_AI_16(); + uint ea = EA_AX_PI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pi_pi(void) +{ + uint res = OPER_AY_PI_16(); + uint ea = EA_AX_PI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pi_pd(void) +{ + uint res = OPER_AY_PD_16(); + uint ea = EA_AX_PI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pi_di(void) +{ + uint res = OPER_AY_DI_16(); + uint ea = EA_AX_PI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pi_ix(void) +{ + uint res = OPER_AY_IX_16(); + uint ea = EA_AX_PI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pi_aw(void) +{ + uint res = OPER_AW_16(); + uint ea = EA_AX_PI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pi_al(void) +{ + uint res = OPER_AL_16(); + uint ea = EA_AX_PI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pi_pcdi(void) +{ + uint res = OPER_PCDI_16(); + uint ea = EA_AX_PI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pi_pcix(void) +{ + uint res = OPER_PCIX_16(); + uint ea = EA_AX_PI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pi_i(void) +{ + uint res = OPER_I_16(); + uint ea = EA_AX_PI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pd_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY); + uint ea = EA_AX_PD_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pd_a(void) +{ + uint res = MASK_OUT_ABOVE_16(AY); + uint ea = EA_AX_PD_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pd_ai(void) +{ + uint res = OPER_AY_AI_16(); + uint ea = EA_AX_PD_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pd_pi(void) +{ + uint res = OPER_AY_PI_16(); + uint ea = EA_AX_PD_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pd_pd(void) +{ + uint res = OPER_AY_PD_16(); + uint ea = EA_AX_PD_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pd_di(void) +{ + uint res = OPER_AY_DI_16(); + uint ea = EA_AX_PD_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pd_ix(void) +{ + uint res = OPER_AY_IX_16(); + uint ea = EA_AX_PD_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pd_aw(void) +{ + uint res = OPER_AW_16(); + uint ea = EA_AX_PD_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pd_al(void) +{ + uint res = OPER_AL_16(); + uint ea = EA_AX_PD_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pd_pcdi(void) +{ + uint res = OPER_PCDI_16(); + uint ea = EA_AX_PD_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pd_pcix(void) +{ + uint res = OPER_PCIX_16(); + uint ea = EA_AX_PD_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_pd_i(void) +{ + uint res = OPER_I_16(); + uint ea = EA_AX_PD_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_di_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY); + uint ea = EA_AX_DI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_di_a(void) +{ + uint res = MASK_OUT_ABOVE_16(AY); + uint ea = EA_AX_DI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_di_ai(void) +{ + uint res = OPER_AY_AI_16(); + uint ea = EA_AX_DI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_di_pi(void) +{ + uint res = OPER_AY_PI_16(); + uint ea = EA_AX_DI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_di_pd(void) +{ + uint res = OPER_AY_PD_16(); + uint ea = EA_AX_DI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_di_di(void) +{ + uint res = OPER_AY_DI_16(); + uint ea = EA_AX_DI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_di_ix(void) +{ + uint res = OPER_AY_IX_16(); + uint ea = EA_AX_DI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_di_aw(void) +{ + uint res = OPER_AW_16(); + uint ea = EA_AX_DI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_di_al(void) +{ + uint res = OPER_AL_16(); + uint ea = EA_AX_DI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_di_pcdi(void) +{ + uint res = OPER_PCDI_16(); + uint ea = EA_AX_DI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_di_pcix(void) +{ + uint res = OPER_PCIX_16(); + uint ea = EA_AX_DI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_di_i(void) +{ + uint res = OPER_I_16(); + uint ea = EA_AX_DI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ix_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY); + uint ea = EA_AX_IX_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ix_a(void) +{ + uint res = MASK_OUT_ABOVE_16(AY); + uint ea = EA_AX_IX_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ix_ai(void) +{ + uint res = OPER_AY_AI_16(); + uint ea = EA_AX_IX_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ix_pi(void) +{ + uint res = OPER_AY_PI_16(); + uint ea = EA_AX_IX_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ix_pd(void) +{ + uint res = OPER_AY_PD_16(); + uint ea = EA_AX_IX_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ix_di(void) +{ + uint res = OPER_AY_DI_16(); + uint ea = EA_AX_IX_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ix_ix(void) +{ + uint res = OPER_AY_IX_16(); + uint ea = EA_AX_IX_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ix_aw(void) +{ + uint res = OPER_AW_16(); + uint ea = EA_AX_IX_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ix_al(void) +{ + uint res = OPER_AL_16(); + uint ea = EA_AX_IX_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ix_pcdi(void) +{ + uint res = OPER_PCDI_16(); + uint ea = EA_AX_IX_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ix_pcix(void) +{ + uint res = OPER_PCIX_16(); + uint ea = EA_AX_IX_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_ix_i(void) +{ + uint res = OPER_I_16(); + uint ea = EA_AX_IX_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_aw_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY); + uint ea = EA_AW_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_aw_a(void) +{ + uint res = MASK_OUT_ABOVE_16(AY); + uint ea = EA_AW_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_aw_ai(void) +{ + uint res = OPER_AY_AI_16(); + uint ea = EA_AW_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_aw_pi(void) +{ + uint res = OPER_AY_PI_16(); + uint ea = EA_AW_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_aw_pd(void) +{ + uint res = OPER_AY_PD_16(); + uint ea = EA_AW_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_aw_di(void) +{ + uint res = OPER_AY_DI_16(); + uint ea = EA_AW_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_aw_ix(void) +{ + uint res = OPER_AY_IX_16(); + uint ea = EA_AW_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_aw_aw(void) +{ + uint res = OPER_AW_16(); + uint ea = EA_AW_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_aw_al(void) +{ + uint res = OPER_AL_16(); + uint ea = EA_AW_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_aw_pcdi(void) +{ + uint res = OPER_PCDI_16(); + uint ea = EA_AW_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_aw_pcix(void) +{ + uint res = OPER_PCIX_16(); + uint ea = EA_AW_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_aw_i(void) +{ + uint res = OPER_I_16(); + uint ea = EA_AW_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_al_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY); + uint ea = EA_AL_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_al_a(void) +{ + uint res = MASK_OUT_ABOVE_16(AY); + uint ea = EA_AL_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_al_ai(void) +{ + uint res = OPER_AY_AI_16(); + uint ea = EA_AL_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_al_pi(void) +{ + uint res = OPER_AY_PI_16(); + uint ea = EA_AL_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_al_pd(void) +{ + uint res = OPER_AY_PD_16(); + uint ea = EA_AL_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_al_di(void) +{ + uint res = OPER_AY_DI_16(); + uint ea = EA_AL_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_al_ix(void) +{ + uint res = OPER_AY_IX_16(); + uint ea = EA_AL_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_al_aw(void) +{ + uint res = OPER_AW_16(); + uint ea = EA_AL_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_al_al(void) +{ + uint res = OPER_AL_16(); + uint ea = EA_AL_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_al_pcdi(void) +{ + uint res = OPER_PCDI_16(); + uint ea = EA_AL_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_al_pcix(void) +{ + uint res = OPER_PCIX_16(); + uint ea = EA_AL_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_16_al_i(void) +{ + uint res = OPER_I_16(); + uint ea = EA_AL_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_move_32_d_d(void) +{ + uint res = DY; + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_32_d_a(void) +{ + uint res = AY; + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_32_d_ai(void) +{ + uint res = OPER_AY_AI_32(); + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_32_d_pi(void) +{ + uint res = OPER_AY_PI_32(); + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_32_d_pd(void) +{ + uint res = OPER_AY_PD_32(); + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_32_d_di(void) +{ + uint res = OPER_AY_DI_32(); + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_32_d_ix(void) +{ + uint res = OPER_AY_IX_32(); + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_32_d_aw(void) +{ + uint res = OPER_AW_32(); + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_32_d_al(void) +{ + uint res = OPER_AL_32(); + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_32_d_pcdi(void) +{ + uint res = OPER_PCDI_32(); + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_32_d_pcix(void) +{ + uint res = OPER_PCIX_32(); + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_32_d_i(void) +{ + uint res = OPER_I_32(); + uint* r_dst = &DX; + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_move_32_ai_d(void) +{ + uint res = DY; + uint ea = EA_AX_AI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ai_a(void) +{ + uint res = AY; + uint ea = EA_AX_AI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ai_ai(void) +{ + uint res = OPER_AY_AI_32(); + uint ea = EA_AX_AI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ai_pi(void) +{ + uint res = OPER_AY_PI_32(); + uint ea = EA_AX_AI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ai_pd(void) +{ + uint res = OPER_AY_PD_32(); + uint ea = EA_AX_AI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ai_di(void) +{ + uint res = OPER_AY_DI_32(); + uint ea = EA_AX_AI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ai_ix(void) +{ + uint res = OPER_AY_IX_32(); + uint ea = EA_AX_AI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ai_aw(void) +{ + uint res = OPER_AW_32(); + uint ea = EA_AX_AI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ai_al(void) +{ + uint res = OPER_AL_32(); + uint ea = EA_AX_AI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ai_pcdi(void) +{ + uint res = OPER_PCDI_32(); + uint ea = EA_AX_AI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ai_pcix(void) +{ + uint res = OPER_PCIX_32(); + uint ea = EA_AX_AI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ai_i(void) +{ + uint res = OPER_I_32(); + uint ea = EA_AX_AI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_pi_d(void) +{ + uint res = DY; + uint ea = EA_AX_PI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_pi_a(void) +{ + uint res = AY; + uint ea = EA_AX_PI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_pi_ai(void) +{ + uint res = OPER_AY_AI_32(); + uint ea = EA_AX_PI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_pi_pi(void) +{ + uint res = OPER_AY_PI_32(); + uint ea = EA_AX_PI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_pi_pd(void) +{ + uint res = OPER_AY_PD_32(); + uint ea = EA_AX_PI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_pi_di(void) +{ + uint res = OPER_AY_DI_32(); + uint ea = EA_AX_PI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_pi_ix(void) +{ + uint res = OPER_AY_IX_32(); + uint ea = EA_AX_PI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_pi_aw(void) +{ + uint res = OPER_AW_32(); + uint ea = EA_AX_PI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_pi_al(void) +{ + uint res = OPER_AL_32(); + uint ea = EA_AX_PI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_pi_pcdi(void) +{ + uint res = OPER_PCDI_32(); + uint ea = EA_AX_PI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_pi_pcix(void) +{ + uint res = OPER_PCIX_32(); + uint ea = EA_AX_PI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_pi_i(void) +{ + uint res = OPER_I_32(); + uint ea = EA_AX_PI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_pd_d(void) +{ + uint res = DY; + uint ea = EA_AX_PD_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea+2, res & 0xFFFF ); + m68ki_write_16(ea, (res >> 16) & 0xFFFF ); +} + + +static void m68k_op_move_32_pd_a(void) +{ + uint res = AY; + uint ea = EA_AX_PD_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea+2, res & 0xFFFF ); + m68ki_write_16(ea, (res >> 16) & 0xFFFF ); +} + + +static void m68k_op_move_32_pd_ai(void) +{ + uint res = OPER_AY_AI_32(); + uint ea = EA_AX_PD_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea+2, res & 0xFFFF ); + m68ki_write_16(ea, (res >> 16) & 0xFFFF ); +} + + +static void m68k_op_move_32_pd_pi(void) +{ + uint res = OPER_AY_PI_32(); + uint ea = EA_AX_PD_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea+2, res & 0xFFFF ); + m68ki_write_16(ea, (res >> 16) & 0xFFFF ); +} + + +static void m68k_op_move_32_pd_pd(void) +{ + uint res = OPER_AY_PD_32(); + uint ea = EA_AX_PD_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea+2, res & 0xFFFF ); + m68ki_write_16(ea, (res >> 16) & 0xFFFF ); +} + + +static void m68k_op_move_32_pd_di(void) +{ + uint res = OPER_AY_DI_32(); + uint ea = EA_AX_PD_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea+2, res & 0xFFFF ); + m68ki_write_16(ea, (res >> 16) & 0xFFFF ); +} + + +static void m68k_op_move_32_pd_ix(void) +{ + uint res = OPER_AY_IX_32(); + uint ea = EA_AX_PD_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea+2, res & 0xFFFF ); + m68ki_write_16(ea, (res >> 16) & 0xFFFF ); +} + + +static void m68k_op_move_32_pd_aw(void) +{ + uint res = OPER_AW_32(); + uint ea = EA_AX_PD_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea+2, res & 0xFFFF ); + m68ki_write_16(ea, (res >> 16) & 0xFFFF ); +} + + +static void m68k_op_move_32_pd_al(void) +{ + uint res = OPER_AL_32(); + uint ea = EA_AX_PD_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea+2, res & 0xFFFF ); + m68ki_write_16(ea, (res >> 16) & 0xFFFF ); +} + + +static void m68k_op_move_32_pd_pcdi(void) +{ + uint res = OPER_PCDI_32(); + uint ea = EA_AX_PD_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea+2, res & 0xFFFF ); + m68ki_write_16(ea, (res >> 16) & 0xFFFF ); +} + + +static void m68k_op_move_32_pd_pcix(void) +{ + uint res = OPER_PCIX_32(); + uint ea = EA_AX_PD_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea+2, res & 0xFFFF ); + m68ki_write_16(ea, (res >> 16) & 0xFFFF ); +} + + +static void m68k_op_move_32_pd_i(void) +{ + uint res = OPER_I_32(); + uint ea = EA_AX_PD_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_16(ea+2, res & 0xFFFF ); + m68ki_write_16(ea, (res >> 16) & 0xFFFF ); +} + + +static void m68k_op_move_32_di_d(void) +{ + uint res = DY; + uint ea = EA_AX_DI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_di_a(void) +{ + uint res = AY; + uint ea = EA_AX_DI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_di_ai(void) +{ + uint res = OPER_AY_AI_32(); + uint ea = EA_AX_DI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_di_pi(void) +{ + uint res = OPER_AY_PI_32(); + uint ea = EA_AX_DI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_di_pd(void) +{ + uint res = OPER_AY_PD_32(); + uint ea = EA_AX_DI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_di_di(void) +{ + uint res = OPER_AY_DI_32(); + uint ea = EA_AX_DI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_di_ix(void) +{ + uint res = OPER_AY_IX_32(); + uint ea = EA_AX_DI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_di_aw(void) +{ + uint res = OPER_AW_32(); + uint ea = EA_AX_DI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_di_al(void) +{ + uint res = OPER_AL_32(); + uint ea = EA_AX_DI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_di_pcdi(void) +{ + uint res = OPER_PCDI_32(); + uint ea = EA_AX_DI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_di_pcix(void) +{ + uint res = OPER_PCIX_32(); + uint ea = EA_AX_DI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_di_i(void) +{ + uint res = OPER_I_32(); + uint ea = EA_AX_DI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ix_d(void) +{ + uint res = DY; + uint ea = EA_AX_IX_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ix_a(void) +{ + uint res = AY; + uint ea = EA_AX_IX_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ix_ai(void) +{ + uint res = OPER_AY_AI_32(); + uint ea = EA_AX_IX_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ix_pi(void) +{ + uint res = OPER_AY_PI_32(); + uint ea = EA_AX_IX_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ix_pd(void) +{ + uint res = OPER_AY_PD_32(); + uint ea = EA_AX_IX_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ix_di(void) +{ + uint res = OPER_AY_DI_32(); + uint ea = EA_AX_IX_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ix_ix(void) +{ + uint res = OPER_AY_IX_32(); + uint ea = EA_AX_IX_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ix_aw(void) +{ + uint res = OPER_AW_32(); + uint ea = EA_AX_IX_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ix_al(void) +{ + uint res = OPER_AL_32(); + uint ea = EA_AX_IX_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ix_pcdi(void) +{ + uint res = OPER_PCDI_32(); + uint ea = EA_AX_IX_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ix_pcix(void) +{ + uint res = OPER_PCIX_32(); + uint ea = EA_AX_IX_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_ix_i(void) +{ + uint res = OPER_I_32(); + uint ea = EA_AX_IX_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_aw_d(void) +{ + uint res = DY; + uint ea = EA_AW_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_aw_a(void) +{ + uint res = AY; + uint ea = EA_AW_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_aw_ai(void) +{ + uint res = OPER_AY_AI_32(); + uint ea = EA_AW_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_aw_pi(void) +{ + uint res = OPER_AY_PI_32(); + uint ea = EA_AW_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_aw_pd(void) +{ + uint res = OPER_AY_PD_32(); + uint ea = EA_AW_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_aw_di(void) +{ + uint res = OPER_AY_DI_32(); + uint ea = EA_AW_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_aw_ix(void) +{ + uint res = OPER_AY_IX_32(); + uint ea = EA_AW_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_aw_aw(void) +{ + uint res = OPER_AW_32(); + uint ea = EA_AW_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_aw_al(void) +{ + uint res = OPER_AL_32(); + uint ea = EA_AW_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_aw_pcdi(void) +{ + uint res = OPER_PCDI_32(); + uint ea = EA_AW_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_aw_pcix(void) +{ + uint res = OPER_PCIX_32(); + uint ea = EA_AW_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_aw_i(void) +{ + uint res = OPER_I_32(); + uint ea = EA_AW_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_al_d(void) +{ + uint res = DY; + uint ea = EA_AL_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_al_a(void) +{ + uint res = AY; + uint ea = EA_AL_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_al_ai(void) +{ + uint res = OPER_AY_AI_32(); + uint ea = EA_AL_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_al_pi(void) +{ + uint res = OPER_AY_PI_32(); + uint ea = EA_AL_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_al_pd(void) +{ + uint res = OPER_AY_PD_32(); + uint ea = EA_AL_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_al_di(void) +{ + uint res = OPER_AY_DI_32(); + uint ea = EA_AL_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_al_ix(void) +{ + uint res = OPER_AY_IX_32(); + uint ea = EA_AL_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_al_aw(void) +{ + uint res = OPER_AW_32(); + uint ea = EA_AL_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_al_al(void) +{ + uint res = OPER_AL_32(); + uint ea = EA_AL_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_al_pcdi(void) +{ + uint res = OPER_PCDI_32(); + uint ea = EA_AL_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_al_pcix(void) +{ + uint res = OPER_PCIX_32(); + uint ea = EA_AL_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_move_32_al_i(void) +{ + uint res = OPER_I_32(); + uint ea = EA_AL_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_movea_16_d(void) +{ + AX = MAKE_INT_16(DY); +} + + +static void m68k_op_movea_16_a(void) +{ + AX = MAKE_INT_16(AY); +} + + +static void m68k_op_movea_16_ai(void) +{ + AX = MAKE_INT_16(OPER_AY_AI_16()); +} + + +static void m68k_op_movea_16_pi(void) +{ + AX = MAKE_INT_16(OPER_AY_PI_16()); +} + + +static void m68k_op_movea_16_pd(void) +{ + AX = MAKE_INT_16(OPER_AY_PD_16()); +} + + +static void m68k_op_movea_16_di(void) +{ + AX = MAKE_INT_16(OPER_AY_DI_16()); +} + + +static void m68k_op_movea_16_ix(void) +{ + AX = MAKE_INT_16(OPER_AY_IX_16()); +} + + +static void m68k_op_movea_16_aw(void) +{ + AX = MAKE_INT_16(OPER_AW_16()); +} + + +static void m68k_op_movea_16_al(void) +{ + AX = MAKE_INT_16(OPER_AL_16()); +} + + +static void m68k_op_movea_16_pcdi(void) +{ + AX = MAKE_INT_16(OPER_PCDI_16()); +} + + +static void m68k_op_movea_16_pcix(void) +{ + AX = MAKE_INT_16(OPER_PCIX_16()); +} + + +static void m68k_op_movea_16_i(void) +{ + AX = MAKE_INT_16(OPER_I_16()); +} + + +static void m68k_op_movea_32_d(void) +{ + AX = DY; +} + + +static void m68k_op_movea_32_a(void) +{ + AX = AY; +} + + +static void m68k_op_movea_32_ai(void) +{ + AX = OPER_AY_AI_32(); +} + + +static void m68k_op_movea_32_pi(void) +{ + AX = OPER_AY_PI_32(); +} + + +static void m68k_op_movea_32_pd(void) +{ + AX = OPER_AY_PD_32(); +} + + +static void m68k_op_movea_32_di(void) +{ + AX = OPER_AY_DI_32(); +} + + +static void m68k_op_movea_32_ix(void) +{ + AX = OPER_AY_IX_32(); +} + + +static void m68k_op_movea_32_aw(void) +{ + AX = OPER_AW_32(); +} + + +static void m68k_op_movea_32_al(void) +{ + AX = OPER_AL_32(); +} + + +static void m68k_op_movea_32_pcdi(void) +{ + AX = OPER_PCDI_32(); +} + + +static void m68k_op_movea_32_pcix(void) +{ + AX = OPER_PCIX_32(); +} + + +static void m68k_op_movea_32_i(void) +{ + AX = OPER_I_32(); +} + +static void m68k_op_move_16_toc_d(void) +{ + m68ki_set_ccr(DY); +} + + +static void m68k_op_move_16_toc_ai(void) +{ + m68ki_set_ccr(OPER_AY_AI_16()); +} + + +static void m68k_op_move_16_toc_pi(void) +{ + m68ki_set_ccr(OPER_AY_PI_16()); +} + + +static void m68k_op_move_16_toc_pd(void) +{ + m68ki_set_ccr(OPER_AY_PD_16()); +} + + +static void m68k_op_move_16_toc_di(void) +{ + m68ki_set_ccr(OPER_AY_DI_16()); +} + + +static void m68k_op_move_16_toc_ix(void) +{ + m68ki_set_ccr(OPER_AY_IX_16()); +} + + +static void m68k_op_move_16_toc_aw(void) +{ + m68ki_set_ccr(OPER_AW_16()); +} + + +static void m68k_op_move_16_toc_al(void) +{ + m68ki_set_ccr(OPER_AL_16()); +} + + +static void m68k_op_move_16_toc_pcdi(void) +{ + m68ki_set_ccr(OPER_PCDI_16()); +} + + +static void m68k_op_move_16_toc_pcix(void) +{ + m68ki_set_ccr(OPER_PCIX_16()); +} + + +static void m68k_op_move_16_toc_i(void) +{ + m68ki_set_ccr(OPER_I_16()); +} + + +static void m68k_op_move_16_frs_d(void) +{ + DY = MASK_OUT_BELOW_16(DY) | m68ki_get_sr(); +} + + +static void m68k_op_move_16_frs_ai(void) +{ + uint ea = EA_AY_AI_16(); + m68ki_write_16(ea, m68ki_get_sr()); +} + + +static void m68k_op_move_16_frs_pi(void) +{ + uint ea = EA_AY_PI_16(); + m68ki_write_16(ea, m68ki_get_sr()); +} + + +static void m68k_op_move_16_frs_pd(void) +{ + uint ea = EA_AY_PD_16(); + m68ki_write_16(ea, m68ki_get_sr()); +} + + +static void m68k_op_move_16_frs_di(void) +{ + uint ea = EA_AY_DI_16(); + m68ki_write_16(ea, m68ki_get_sr()); +} + + +static void m68k_op_move_16_frs_ix(void) +{ + uint ea = EA_AY_IX_16(); + m68ki_write_16(ea, m68ki_get_sr()); +} + + +static void m68k_op_move_16_frs_aw(void) +{ + uint ea = EA_AW_16(); + m68ki_write_16(ea, m68ki_get_sr()); +} + + +static void m68k_op_move_16_frs_al(void) +{ + uint ea = EA_AL_16(); + m68ki_write_16(ea, m68ki_get_sr()); +} + + +static void m68k_op_move_16_tos_d(void) +{ + if(FLAG_S) + { + m68ki_set_sr(DY); + return; + } + m68ki_exception_privilege_violation(); +} + + +static void m68k_op_move_16_tos_ai(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_AY_AI_16(); + m68ki_set_sr(new_sr); + return; + } + m68ki_exception_privilege_violation(); +} + + +static void m68k_op_move_16_tos_pi(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_AY_PI_16(); + m68ki_set_sr(new_sr); + return; + } + m68ki_exception_privilege_violation(); +} + + +static void m68k_op_move_16_tos_pd(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_AY_PD_16(); + m68ki_set_sr(new_sr); + return; + } + m68ki_exception_privilege_violation(); +} + + +static void m68k_op_move_16_tos_di(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_AY_DI_16(); + m68ki_set_sr(new_sr); + return; + } + m68ki_exception_privilege_violation(); +} + + +static void m68k_op_move_16_tos_ix(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_AY_IX_16(); + m68ki_set_sr(new_sr); + return; + } + m68ki_exception_privilege_violation(); +} + + +static void m68k_op_move_16_tos_aw(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_AW_16(); + m68ki_set_sr(new_sr); + return; + } + m68ki_exception_privilege_violation(); +} + + +static void m68k_op_move_16_tos_al(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_AL_16(); + m68ki_set_sr(new_sr); + return; + } + m68ki_exception_privilege_violation(); +} + + +static void m68k_op_move_16_tos_pcdi(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_PCDI_16(); + m68ki_set_sr(new_sr); + return; + } + m68ki_exception_privilege_violation(); +} + + +static void m68k_op_move_16_tos_pcix(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_PCIX_16(); + m68ki_set_sr(new_sr); + return; + } + m68ki_exception_privilege_violation(); +} + + +static void m68k_op_move_16_tos_i(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_I_16(); + m68ki_set_sr(new_sr); + return; + } + m68ki_exception_privilege_violation(); +} + + +static void m68k_op_move_32_fru(void) +{ + if(FLAG_S) + { + AY = REG_USP; + return; + } + m68ki_exception_privilege_violation(); +} + + +static void m68k_op_move_32_tou(void) +{ + if(FLAG_S) + { + REG_USP = AY; + return; + } + m68ki_exception_privilege_violation(); +} + + +static void m68k_op_movem_16_re_pd(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = AY; + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + ea -= 2; + m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[15-i])); + count++; + } + AY = ea; + + USE_CYCLES(count * CYC_MOVEM_W); +} + + +static void m68k_op_movem_16_re_ai(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_AY_AI_16(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[i])); + ea += 2; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_W); +} + + +static void m68k_op_movem_16_re_di(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_AY_DI_16(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[i])); + ea += 2; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_W); +} + + +static void m68k_op_movem_16_re_ix(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_AY_IX_16(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[i])); + ea += 2; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_W); +} + + +static void m68k_op_movem_16_re_aw(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_AW_16(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[i])); + ea += 2; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_W); +} + + +static void m68k_op_movem_16_re_al(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_AL_16(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[i])); + ea += 2; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_W); +} + + +static void m68k_op_movem_32_re_pd(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = AY; + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + ea -= 4; + m68ki_write_16(ea+2, REG_DA[15-i] & 0xFFFF ); + m68ki_write_16(ea, (REG_DA[15-i] >> 16) & 0xFFFF ); + count++; + } + AY = ea; + + USE_CYCLES(count * CYC_MOVEM_L); +} + + +static void m68k_op_movem_32_re_ai(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_AY_AI_32(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + m68ki_write_32(ea, REG_DA[i]); + ea += 4; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_L); +} + + +static void m68k_op_movem_32_re_di(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_AY_DI_32(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + m68ki_write_32(ea, REG_DA[i]); + ea += 4; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_L); +} + + +static void m68k_op_movem_32_re_ix(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_AY_IX_32(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + m68ki_write_32(ea, REG_DA[i]); + ea += 4; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_L); +} + + +static void m68k_op_movem_32_re_aw(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_AW_32(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + m68ki_write_32(ea, REG_DA[i]); + ea += 4; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_L); +} + + +static void m68k_op_movem_32_re_al(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_AL_32(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + m68ki_write_32(ea, REG_DA[i]); + ea += 4; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_L); +} + + +static void m68k_op_movem_16_er_pi(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = AY; + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea))); + ea += 2; + count++; + } + AY = ea; + + USE_CYCLES(count * CYC_MOVEM_W); +} + + +static void m68k_op_movem_16_er_pcdi(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_PCDI_16(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_pcrel_16(ea))); + ea += 2; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_W); +} + + +static void m68k_op_movem_16_er_pcix(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_PCIX_16(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_pcrel_16(ea))); + ea += 2; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_W); +} + + +static void m68k_op_movem_16_er_ai(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_AY_AI_16(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea))); + ea += 2; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_W); +} + + +static void m68k_op_movem_16_er_di(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_AY_DI_16(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea))); + ea += 2; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_W); +} + + +static void m68k_op_movem_16_er_ix(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_AY_IX_16(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea))); + ea += 2; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_W); +} + + +static void m68k_op_movem_16_er_aw(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_AW_16(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea))); + ea += 2; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_W); +} + + +static void m68k_op_movem_16_er_al(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_AL_16(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea))); + ea += 2; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_W); +} + + +static void m68k_op_movem_32_er_pi(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = AY; + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + REG_DA[i] = m68ki_read_32(ea); + ea += 4; + count++; + } + AY = ea; + + USE_CYCLES(count * CYC_MOVEM_L); +} + + +static void m68k_op_movem_32_er_pcdi(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_PCDI_32(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + REG_DA[i] = m68ki_read_pcrel_32(ea); + ea += 4; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_L); +} + + +static void m68k_op_movem_32_er_pcix(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_PCIX_32(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + REG_DA[i] = m68ki_read_pcrel_32(ea); + ea += 4; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_L); +} + + +static void m68k_op_movem_32_er_ai(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_AY_AI_32(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + REG_DA[i] = m68ki_read_32(ea); + ea += 4; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_L); +} + + +static void m68k_op_movem_32_er_di(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_AY_DI_32(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + REG_DA[i] = m68ki_read_32(ea); + ea += 4; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_L); +} + + +static void m68k_op_movem_32_er_ix(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_AY_IX_32(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + REG_DA[i] = m68ki_read_32(ea); + ea += 4; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_L); +} + + +static void m68k_op_movem_32_er_aw(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_AW_32(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + REG_DA[i] = m68ki_read_32(ea); + ea += 4; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_L); +} + + +static void m68k_op_movem_32_er_al(void) +{ + uint i = 0; + uint register_list = OPER_I_16(); + uint ea = EA_AL_32(); + uint count = 0; + + for(; i < 16; i++) + if(register_list & (1 << i)) + { + REG_DA[i] = m68ki_read_32(ea); + ea += 4; + count++; + } + + USE_CYCLES(count * CYC_MOVEM_L); +} + + +static void m68k_op_movep_16_re(void) +{ + uint ea = EA_AY_DI_16(); + uint src = DX; + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(src >> 8)); + m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src)); +} + + +static void m68k_op_movep_32_re(void) +{ + uint ea = EA_AY_DI_32(); + uint src = DX; + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(src >> 24)); + m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 16)); + m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 8)); + m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src)); +} + + +static void m68k_op_movep_16_er(void) +{ + uint ea = EA_AY_DI_16(); + uint* r_dst = &DX; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | ((m68ki_read_8(ea) << 8) + m68ki_read_8(ea + 2)); +} + + +static void m68k_op_movep_32_er(void) +{ + uint ea = EA_AY_DI_32(); + + DX = (m68ki_read_8(ea) << 24) + (m68ki_read_8(ea + 2) << 16) + + (m68ki_read_8(ea + 4) << 8) + m68ki_read_8(ea + 6); +} + + +static void m68k_op_moveq_32(void) +{ + uint res = DX = MAKE_INT_8(MASK_OUT_ABOVE_8(REG_IR)); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_muls_16_d(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(DY); + uint res = MASK_OUT_ABOVE_32( src * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + UseMulsCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_muls_16_ai(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AY_AI_16()); + uint res = MASK_OUT_ABOVE_32( src * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + UseMulsCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_muls_16_pi(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AY_PI_16()); + uint res = MASK_OUT_ABOVE_32( src * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + UseMulsCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_muls_16_pd(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AY_PD_16()); + uint res = MASK_OUT_ABOVE_32( src * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + UseMulsCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_muls_16_di(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AY_DI_16()); + uint res = MASK_OUT_ABOVE_32( src * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + UseMulsCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_muls_16_ix(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AY_IX_16()); + uint res = MASK_OUT_ABOVE_32( src * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + UseMulsCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_muls_16_aw(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AW_16()); + uint res = MASK_OUT_ABOVE_32( src * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + UseMulsCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_muls_16_al(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_AL_16()); + uint res = MASK_OUT_ABOVE_32( src * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + UseMulsCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_muls_16_pcdi(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_PCDI_16()); + uint res = MASK_OUT_ABOVE_32( src * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + UseMulsCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_muls_16_pcix(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_PCIX_16()); + uint res = MASK_OUT_ABOVE_32( src * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + UseMulsCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_muls_16_i(void) +{ + uint* r_dst = &DX; + sint src = MAKE_INT_16(OPER_I_16()); + uint res = MASK_OUT_ABOVE_32( src * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst))); + + UseMulsCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_mulu_16_d(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_16(DY); + uint res = src * MASK_OUT_ABOVE_16(*r_dst); + + UseMuluCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_mulu_16_ai(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_AI_16(); + uint res = src * MASK_OUT_ABOVE_16(*r_dst); + + UseMuluCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_mulu_16_pi(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PI_16(); + uint res = src * MASK_OUT_ABOVE_16(*r_dst); + + UseMuluCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_mulu_16_pd(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PD_16(); + uint res = src * MASK_OUT_ABOVE_16(*r_dst); + + UseMuluCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_mulu_16_di(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_DI_16(); + uint res = src * MASK_OUT_ABOVE_16(*r_dst); + + UseMuluCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_mulu_16_ix(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_IX_16(); + uint res = src * MASK_OUT_ABOVE_16(*r_dst); + + UseMuluCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_mulu_16_aw(void) +{ + uint* r_dst = &DX; + uint src = OPER_AW_16(); + uint res = src * MASK_OUT_ABOVE_16(*r_dst); + + UseMuluCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_mulu_16_al(void) +{ + uint* r_dst = &DX; + uint src = OPER_AL_16(); + uint res = src * MASK_OUT_ABOVE_16(*r_dst); + + UseMuluCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_mulu_16_pcdi(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCDI_16(); + uint res = src * MASK_OUT_ABOVE_16(*r_dst); + + UseMuluCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_mulu_16_pcix(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCIX_16(); + uint res = src * MASK_OUT_ABOVE_16(*r_dst); + + UseMuluCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_mulu_16_i(void) +{ + uint* r_dst = &DX; + uint src = OPER_I_16(); + uint res = src * MASK_OUT_ABOVE_16(*r_dst); + + UseMuluCycles(src); + + *r_dst = res; + + FLAG_Z = res; + FLAG_N = NFLAG_32(res); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_nbcd_8_d(void) +{ + uint* r_dst = &DY; + uint dst = *r_dst; + uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1()); + + if(res != 0x9a) + { + FLAG_V = ~res; /* Undefined V behavior */ + + if((res & 0x0f) == 0xa) + res = (res & 0xf0) + 0x10; + + res = MASK_OUT_ABOVE_8(res); + + FLAG_V &= res; /* Undefined V behavior part II */ + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_Z |= res; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + } + else + { + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + } + FLAG_N = NFLAG_8(res); /* Undefined N behavior */ +} + + +static void m68k_op_nbcd_8_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint dst = m68ki_read_8(ea); + uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1()); + + if(res != 0x9a) + { + FLAG_V = ~res; /* Undefined V behavior */ + + if((res & 0x0f) == 0xa) + res = (res & 0xf0) + 0x10; + + res = MASK_OUT_ABOVE_8(res); + + FLAG_V &= res; /* Undefined V behavior part II */ + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(res)); + + FLAG_Z |= res; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + } + else + { + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + } + FLAG_N = NFLAG_8(res); /* Undefined N behavior */ +} + + +static void m68k_op_nbcd_8_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint dst = m68ki_read_8(ea); + uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1()); + + if(res != 0x9a) + { + FLAG_V = ~res; /* Undefined V behavior */ + + if((res & 0x0f) == 0xa) + res = (res & 0xf0) + 0x10; + + res = MASK_OUT_ABOVE_8(res); + + FLAG_V &= res; /* Undefined V behavior part II */ + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(res)); + + FLAG_Z |= res; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + } + else + { + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + } + FLAG_N = NFLAG_8(res); /* Undefined N behavior */ +} + + +static void m68k_op_nbcd_8_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint dst = m68ki_read_8(ea); + uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1()); + + if(res != 0x9a) + { + FLAG_V = ~res; /* Undefined V behavior */ + + if((res & 0x0f) == 0xa) + res = (res & 0xf0) + 0x10; + + res = MASK_OUT_ABOVE_8(res); + + FLAG_V &= res; /* Undefined V behavior part II */ + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(res)); + + FLAG_Z |= res; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + } + else + { + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + } + FLAG_N = NFLAG_8(res); /* Undefined N behavior */ +} + + +static void m68k_op_nbcd_8_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1()); + + if(res != 0x9a) + { + FLAG_V = ~res; /* Undefined V behavior */ + + if((res & 0x0f) == 0xa) + res = (res & 0xf0) + 0x10; + + res = MASK_OUT_ABOVE_8(res); + + FLAG_V &= res; /* Undefined V behavior part II */ + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(res)); + + FLAG_Z |= res; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + } + else + { + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + } + FLAG_N = NFLAG_8(res); /* Undefined N behavior */ +} + + +static void m68k_op_nbcd_8_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1()); + + if(res != 0x9a) + { + FLAG_V = ~res; /* Undefined V behavior */ + + if((res & 0x0f) == 0xa) + res = (res & 0xf0) + 0x10; + + res = MASK_OUT_ABOVE_8(res); + + FLAG_V &= res; /* Undefined V behavior part II */ + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(res)); + + FLAG_Z |= res; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + } + else + { + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + } + FLAG_N = NFLAG_8(res); /* Undefined N behavior */ +} + + +static void m68k_op_nbcd_8_di(void) +{ + uint ea = EA_AY_DI_8(); + uint dst = m68ki_read_8(ea); + uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1()); + + if(res != 0x9a) + { + FLAG_V = ~res; /* Undefined V behavior */ + + if((res & 0x0f) == 0xa) + res = (res & 0xf0) + 0x10; + + res = MASK_OUT_ABOVE_8(res); + + FLAG_V &= res; /* Undefined V behavior part II */ + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(res)); + + FLAG_Z |= res; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + } + else + { + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + } + FLAG_N = NFLAG_8(res); /* Undefined N behavior */ +} + + +static void m68k_op_nbcd_8_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint dst = m68ki_read_8(ea); + uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1()); + + if(res != 0x9a) + { + FLAG_V = ~res; /* Undefined V behavior */ + + if((res & 0x0f) == 0xa) + res = (res & 0xf0) + 0x10; + + res = MASK_OUT_ABOVE_8(res); + + FLAG_V &= res; /* Undefined V behavior part II */ + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(res)); + + FLAG_Z |= res; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + } + else + { + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + } + FLAG_N = NFLAG_8(res); /* Undefined N behavior */ +} + + +static void m68k_op_nbcd_8_aw(void) +{ + uint ea = EA_AW_8(); + uint dst = m68ki_read_8(ea); + uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1()); + + if(res != 0x9a) + { + FLAG_V = ~res; /* Undefined V behavior */ + + if((res & 0x0f) == 0xa) + res = (res & 0xf0) + 0x10; + + res = MASK_OUT_ABOVE_8(res); + + FLAG_V &= res; /* Undefined V behavior part II */ + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(res)); + + FLAG_Z |= res; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + } + else + { + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + } + FLAG_N = NFLAG_8(res); /* Undefined N behavior */ +} + + +static void m68k_op_nbcd_8_al(void) +{ + uint ea = EA_AL_8(); + uint dst = m68ki_read_8(ea); + uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1()); + + if(res != 0x9a) + { + FLAG_V = ~res; /* Undefined V behavior */ + + if((res & 0x0f) == 0xa) + res = (res & 0xf0) + 0x10; + + res = MASK_OUT_ABOVE_8(res); + + FLAG_V &= res; /* Undefined V behavior part II */ + + m68ki_write_8(ea, MASK_OUT_ABOVE_8(res)); + + FLAG_Z |= res; + FLAG_C = CFLAG_SET; + FLAG_X = XFLAG_SET; + } + else + { + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + FLAG_X = XFLAG_CLEAR; + } + FLAG_N = NFLAG_8(res); /* Undefined N behavior */ +} + + +static void m68k_op_neg_8_d(void) +{ + uint* r_dst = &DY; + uint res = 0 - MASK_OUT_ABOVE_8(*r_dst); + + FLAG_N = NFLAG_8(res); + FLAG_C = FLAG_X = CFLAG_8(res); + FLAG_V = *r_dst & res; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_neg_8_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_8(res); + FLAG_C = FLAG_X = CFLAG_8(res); + FLAG_V = src & res; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_neg_8_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_8(res); + FLAG_C = FLAG_X = CFLAG_8(res); + FLAG_V = src & res; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_neg_8_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_8(res); + FLAG_C = FLAG_X = CFLAG_8(res); + FLAG_V = src & res; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_neg_8_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_8(res); + FLAG_C = FLAG_X = CFLAG_8(res); + FLAG_V = src & res; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_neg_8_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_8(res); + FLAG_C = FLAG_X = CFLAG_8(res); + FLAG_V = src & res; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_neg_8_di(void) +{ + uint ea = EA_AY_DI_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_8(res); + FLAG_C = FLAG_X = CFLAG_8(res); + FLAG_V = src & res; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_neg_8_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_8(res); + FLAG_C = FLAG_X = CFLAG_8(res); + FLAG_V = src & res; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_neg_8_aw(void) +{ + uint ea = EA_AW_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_8(res); + FLAG_C = FLAG_X = CFLAG_8(res); + FLAG_V = src & res; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_neg_8_al(void) +{ + uint ea = EA_AL_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_8(res); + FLAG_C = FLAG_X = CFLAG_8(res); + FLAG_V = src & res; + FLAG_Z = MASK_OUT_ABOVE_8(res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_neg_16_d(void) +{ + uint* r_dst = &DY; + uint res = 0 - MASK_OUT_ABOVE_16(*r_dst); + + FLAG_N = NFLAG_16(res); + FLAG_C = FLAG_X = CFLAG_16(res); + FLAG_V = (*r_dst & res)>>8; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_neg_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_16(res); + FLAG_C = FLAG_X = CFLAG_16(res); + FLAG_V = (src & res)>>8; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_neg_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_16(res); + FLAG_C = FLAG_X = CFLAG_16(res); + FLAG_V = (src & res)>>8; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_neg_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_16(res); + FLAG_C = FLAG_X = CFLAG_16(res); + FLAG_V = (src & res)>>8; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_neg_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_16(res); + FLAG_C = FLAG_X = CFLAG_16(res); + FLAG_V = (src & res)>>8; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_neg_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_16(res); + FLAG_C = FLAG_X = CFLAG_16(res); + FLAG_V = (src & res)>>8; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_neg_16_aw(void) +{ + uint ea = EA_AW_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_16(res); + FLAG_C = FLAG_X = CFLAG_16(res); + FLAG_V = (src & res)>>8; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_neg_16_al(void) +{ + uint ea = EA_AL_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_16(res); + FLAG_C = FLAG_X = CFLAG_16(res); + FLAG_V = (src & res)>>8; + FLAG_Z = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_neg_32_d(void) +{ + uint* r_dst = &DY; + uint res = 0 - *r_dst; + + FLAG_N = NFLAG_32(res); + FLAG_C = FLAG_X = CFLAG_SUB_32(*r_dst, 0, res); + FLAG_V = (*r_dst & res)>>24; + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_neg_32_ai(void) +{ + uint ea = EA_AY_AI_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_32(res); + FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_neg_32_pi(void) +{ + uint ea = EA_AY_PI_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_32(res); + FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_neg_32_pd(void) +{ + uint ea = EA_AY_PD_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_32(res); + FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_neg_32_di(void) +{ + uint ea = EA_AY_DI_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_32(res); + FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_neg_32_ix(void) +{ + uint ea = EA_AY_IX_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_32(res); + FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_neg_32_aw(void) +{ + uint ea = EA_AW_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_32(res); + FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_neg_32_al(void) +{ + uint ea = EA_AL_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - src; + + FLAG_N = NFLAG_32(res); + FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + FLAG_Z = MASK_OUT_ABOVE_32(res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_negx_8_d(void) +{ + uint* r_dst = &DY; + uint res = 0 - MASK_OUT_ABOVE_8(*r_dst) - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = *r_dst & res; + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; +} + + +static void m68k_op_negx_8_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = src & res; + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_negx_8_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = src & res; + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_negx_8_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = src & res; + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_negx_8_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = src & res; + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_negx_8_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = src & res; + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_negx_8_di(void) +{ + uint ea = EA_AY_DI_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = src & res; + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_negx_8_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = src & res; + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_negx_8_aw(void) +{ + uint ea = EA_AW_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = src & res; + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_negx_8_al(void) +{ + uint ea = EA_AL_8(); + uint src = m68ki_read_8(ea); + uint res = 0 - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = src & res; + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_negx_16_d(void) +{ + uint* r_dst = &DY; + uint res = 0 - MASK_OUT_ABOVE_16(*r_dst) - XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = (*r_dst & res)>>8; + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; +} + + +static void m68k_op_negx_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = (src & res)>>8; + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_negx_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = (src & res)>>8; + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_negx_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = (src & res)>>8; + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_negx_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = (src & res)>>8; + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_negx_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = (src & res)>>8; + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_negx_16_aw(void) +{ + uint ea = EA_AW_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = (src & res)>>8; + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_negx_16_al(void) +{ + uint ea = EA_AL_16(); + uint src = m68ki_read_16(ea); + uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = (src & res)>>8; + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_negx_32_d(void) +{ + uint* r_dst = &DY; + uint res = 0 - MASK_OUT_ABOVE_32(*r_dst) - XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(*r_dst, 0, res); + FLAG_V = (*r_dst & res)>>24; + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + *r_dst = res; +} + + +static void m68k_op_negx_32_ai(void) +{ + uint ea = EA_AY_AI_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_negx_32_pi(void) +{ + uint ea = EA_AY_PI_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_negx_32_pd(void) +{ + uint ea = EA_AY_PD_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_negx_32_di(void) +{ + uint ea = EA_AY_DI_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_negx_32_ix(void) +{ + uint ea = EA_AY_IX_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_negx_32_aw(void) +{ + uint ea = EA_AW_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_negx_32_al(void) +{ + uint ea = EA_AL_32(); + uint src = m68ki_read_32(ea); + uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res); + FLAG_V = (src & res)>>24; + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_nop(void) +{ +} + + +static void m68k_op_not_8_d(void) +{ + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_8(~*r_dst); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_8_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_8_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_8_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_8_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_8_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_8_di(void) +{ + uint ea = EA_AY_DI_8(); + uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_8_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_8_aw(void) +{ + uint ea = EA_AW_8(); + uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_8_al(void) +{ + uint ea = EA_AL_8(); + uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_16_d(void) +{ + uint* r_dst = &DY; + uint res = MASK_OUT_ABOVE_16(~*r_dst); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_16_aw(void) +{ + uint ea = EA_AW_16(); + uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_16_al(void) +{ + uint ea = EA_AL_16(); + uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_32_d(void) +{ + uint* r_dst = &DY; + uint res = *r_dst = MASK_OUT_ABOVE_32(~*r_dst); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_32_ai(void) +{ + uint ea = EA_AY_AI_32(); + uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea)); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_32_pi(void) +{ + uint ea = EA_AY_PI_32(); + uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea)); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_32_pd(void) +{ + uint ea = EA_AY_PD_32(); + uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea)); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_32_di(void) +{ + uint ea = EA_AY_DI_32(); + uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea)); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_32_ix(void) +{ + uint ea = EA_AY_IX_32(); + uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea)); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_32_aw(void) +{ + uint ea = EA_AW_32(); + uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea)); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_not_32_al(void) +{ + uint ea = EA_AL_32(); + uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea)); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_er_d(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= MASK_OUT_ABOVE_8(DY))); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_er_ai(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_AY_AI_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_er_pi(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_AY_PI_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_er_pi7(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_A7_PI_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_er_pd(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_AY_PD_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_er_pd7(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_A7_PD_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_er_di(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_AY_DI_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_er_ix(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_AY_IX_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_er_aw(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_AW_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_er_al(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_AL_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_er_pcdi(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_PCDI_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_er_pcix(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_PCIX_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_er_i(void) +{ + uint res = MASK_OUT_ABOVE_8((DX |= OPER_I_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_16_er_d(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= MASK_OUT_ABOVE_16(DY))); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_16_er_ai(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= OPER_AY_AI_16())); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_16_er_pi(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= OPER_AY_PI_16())); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_16_er_pd(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= OPER_AY_PD_16())); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_16_er_di(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= OPER_AY_DI_16())); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_16_er_ix(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= OPER_AY_IX_16())); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_16_er_aw(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= OPER_AW_16())); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_16_er_al(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= OPER_AL_16())); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_16_er_pcdi(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= OPER_PCDI_16())); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_16_er_pcix(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= OPER_PCIX_16())); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_16_er_i(void) +{ + uint res = MASK_OUT_ABOVE_16((DX |= OPER_I_16())); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_32_er_d(void) +{ + uint res = DX |= DY; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_32_er_ai(void) +{ + uint res = DX |= OPER_AY_AI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_32_er_pi(void) +{ + uint res = DX |= OPER_AY_PI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_32_er_pd(void) +{ + uint res = DX |= OPER_AY_PD_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_32_er_di(void) +{ + uint res = DX |= OPER_AY_DI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_32_er_ix(void) +{ + uint res = DX |= OPER_AY_IX_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_32_er_aw(void) +{ + uint res = DX |= OPER_AW_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_32_er_al(void) +{ + uint res = DX |= OPER_AL_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_32_er_pcdi(void) +{ + uint res = DX |= OPER_PCDI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_32_er_pcix(void) +{ + uint res = DX |= OPER_PCIX_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_32_er_i(void) +{ + uint res = DX |= OPER_I_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_re_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_re_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_re_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_re_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_re_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_re_di(void) +{ + uint ea = EA_AY_DI_8(); + uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_re_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_re_aw(void) +{ + uint ea = EA_AW_8(); + uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_8_re_al(void) +{ + uint ea = EA_AL_8(); + uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_16_re_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_16_re_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_16_re_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_16_re_di(void) +{ + uint ea = EA_AY_DI_16(); + uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_16_re_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_16_re_aw(void) +{ + uint ea = EA_AW_16(); + uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_16_re_al(void) +{ + uint ea = EA_AL_16(); + uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_32_re_ai(void) +{ + uint ea = EA_AY_AI_32(); + uint res = DX | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_32_re_pi(void) +{ + uint ea = EA_AY_PI_32(); + uint res = DX | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_32_re_pd(void) +{ + uint ea = EA_AY_PD_32(); + uint res = DX | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_32_re_di(void) +{ + uint ea = EA_AY_DI_32(); + uint res = DX | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_32_re_ix(void) +{ + uint ea = EA_AY_IX_32(); + uint res = DX | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_32_re_aw(void) +{ + uint ea = EA_AW_32(); + uint res = DX | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_or_32_re_al(void) +{ + uint ea = EA_AL_32(); + uint res = DX | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_8_d(void) +{ + uint res = MASK_OUT_ABOVE_8((DY |= OPER_I_8())); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_8_ai(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_AI_8(); + uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_8_pi(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_PI_8(); + uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_8_pi7(void) +{ + uint src = OPER_I_8(); + uint ea = EA_A7_PI_8(); + uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_8_pd(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_PD_8(); + uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_8_pd7(void) +{ + uint src = OPER_I_8(); + uint ea = EA_A7_PD_8(); + uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_8_di(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_DI_8(); + uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_8_ix(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_IX_8(); + uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_8_aw(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AW_8(); + uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_8_al(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AL_8(); + uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea)); + + m68ki_write_8(ea, res); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_16_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY |= OPER_I_16()); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_16_ai(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_AI_16(); + uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_16_pi(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_PI_16(); + uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_16_pd(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_PD_16(); + uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_16_di(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_DI_16(); + uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_16_ix(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_IX_16(); + uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_16_aw(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AW_16(); + uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_16_al(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AL_16(); + uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_32_d(void) +{ + uint res = DY |= OPER_I_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_32_ai(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_AI_32(); + uint res = src | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_32_pi(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_PI_32(); + uint res = src | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_32_pd(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_PD_32(); + uint res = src | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_32_di(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_DI_32(); + uint res = src | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_32_ix(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_IX_32(); + uint res = src | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_32_aw(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AW_32(); + uint res = src | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_32_al(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AL_32(); + uint res = src | m68ki_read_32(ea); + + m68ki_write_32(ea, res); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ori_16_toc(void) +{ + m68ki_set_ccr(m68ki_get_ccr() | OPER_I_16()); +} + + +static void m68k_op_ori_16_tos(void) +{ + if(FLAG_S) + { + uint src = OPER_I_16(); + m68ki_set_sr(m68ki_get_sr() | src); + return; + } + m68ki_exception_privilege_violation(); +} + + +static void m68k_op_pea_32_ai(void) +{ + uint ea = EA_AY_AI_32(); + + m68ki_push_32(ea); +} + + +static void m68k_op_pea_32_di(void) +{ + uint ea = EA_AY_DI_32(); + + m68ki_push_32(ea); +} + + +static void m68k_op_pea_32_ix(void) +{ + uint ea = EA_AY_IX_32(); + + m68ki_push_32(ea); +} + + +static void m68k_op_pea_32_aw(void) +{ + uint ea = EA_AW_32(); + + m68ki_push_32(ea); +} + + +static void m68k_op_pea_32_al(void) +{ + uint ea = EA_AL_32(); + + m68ki_push_32(ea); +} + + +static void m68k_op_pea_32_pcdi(void) +{ + uint ea = EA_PCDI_32(); + + m68ki_push_32(ea); +} + + +static void m68k_op_pea_32_pcix(void) +{ + uint ea = EA_PCIX_32(); + + m68ki_push_32(ea); +} + + +static void m68k_op_reset(void) +{ + if(FLAG_S) + { + m68ki_output_reset() /* auto-disable (see m68kcpu.h) */ + USE_CYCLES(CYC_RESET); + return; + } + m68ki_exception_privilege_violation(); +} + + +static void m68k_op_ror_8_s(void) +{ + uint* r_dst = &DY; + uint orig_shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint shift = orig_shift & 7; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = ROR_8(src, shift); + + if(orig_shift != 0) + USE_CYCLES(orig_shift * CYC_SHIFT); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = src << (9-orig_shift); + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ror_16_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = ROR_16(src, shift); + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src << (9-shift); + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ror_32_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint64 src = *r_dst; + uint res = ROR_32(src, shift); + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = src << (9-shift); + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ror_8_r(void) +{ + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + uint shift = orig_shift & 7; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = ROR_8(src, shift); + + if(orig_shift != 0) + { + USE_CYCLES(orig_shift * CYC_SHIFT); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + FLAG_C = src << (8-((shift-1)&7)); + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_8(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ror_16_r(void) +{ + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + uint shift = orig_shift & 15; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = ROR_16(src, shift); + + if(orig_shift != 0) + { + USE_CYCLES(orig_shift * CYC_SHIFT); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + FLAG_C = (src >> ((shift - 1) & 15)) << 8; + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_16(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ror_32_r(void) +{ + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + uint shift = orig_shift & 31; + uint64 src = *r_dst; + uint res = ROR_32(src, shift); + + if(orig_shift != 0) + { + USE_CYCLES(orig_shift * CYC_SHIFT); + + *r_dst = res; + FLAG_C = (src >> ((shift - 1) & 31)) << 8; + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_32(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ror_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_16(src, 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ror_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_16(src, 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ror_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_16(src, 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ror_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_16(src, 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ror_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_16(src, 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ror_16_aw(void) +{ + uint ea = EA_AW_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_16(src, 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_ror_16_al(void) +{ + uint ea = EA_AL_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_16(src, 1); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src << 8; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_rol_8_s(void) +{ + uint* r_dst = &DY; + uint orig_shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint shift = orig_shift & 7; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = ROL_8(src, shift); + + if(orig_shift != 0) + USE_CYCLES(orig_shift * CYC_SHIFT); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_C = src << orig_shift; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_rol_16_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = ROL_16(src, shift); + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src >> (8-shift); + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_rol_32_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint64 src = *r_dst; + uint res = ROL_32(src, shift); + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_C = src >> (24-shift); + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_rol_8_r(void) +{ + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + uint shift = orig_shift & 7; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = ROL_8(src, shift); + + if(orig_shift != 0) + { + USE_CYCLES(orig_shift * CYC_SHIFT); + + if(shift != 0) + { + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + FLAG_C = src << shift; + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + FLAG_C = (src & 1)<<8; + FLAG_N = NFLAG_8(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_8(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_rol_16_r(void) +{ + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + uint shift = orig_shift & 15; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = MASK_OUT_ABOVE_16(ROL_16(src, shift)); + + if(orig_shift != 0) + { + USE_CYCLES(orig_shift * CYC_SHIFT); + + if(shift != 0) + { + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + FLAG_C = (src << shift) >> 8; + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + FLAG_C = (src & 1)<<8; + FLAG_N = NFLAG_16(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_16(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_rol_32_r(void) +{ + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + uint shift = orig_shift & 31; + uint64 src = *r_dst; + uint res = ROL_32(src, shift); + + if(orig_shift != 0) + { + USE_CYCLES(orig_shift * CYC_SHIFT); + + *r_dst = res; + + FLAG_C = (src >> ((32 - shift) & 0x1f)) << 8; + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = CFLAG_CLEAR; + FLAG_N = NFLAG_32(src); + FLAG_Z = src; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_rol_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_rol_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_rol_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_rol_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_rol_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_rol_16_aw(void) +{ + uint ea = EA_AW_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_rol_16_al(void) +{ + uint ea = EA_AL_16(); + uint src = m68ki_read_16(ea); + uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1)); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_C = src >> 7; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxr_8_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = ROR_9(src | (XFLAG_AS_1() << 8), shift); + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + FLAG_C = FLAG_X = res; + res = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxr_16_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = ROR_17(src | (XFLAG_AS_1() << 16), shift); + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxr_32_s(void) +{ +#if M68K_USE_64_BIT + + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint64 src = *r_dst; + uint64 res = src | (((uint64)XFLAG_AS_1()) << 32); + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + res = ROR_33_64(res, shift); + + FLAG_C = FLAG_X = res >> 24; + res = MASK_OUT_ABOVE_32(res); + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + +#else + + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = *r_dst; + uint res = MASK_OUT_ABOVE_32((ROR_33(src, shift) & ~(1 << (32 - shift))) | (XFLAG_AS_1() << (32 - shift))); + uint new_x_flag = src & (1 << (shift - 1)); + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + *r_dst = res; + + FLAG_C = FLAG_X = (new_x_flag != 0)<<8; + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + +#endif +} + + +static void m68k_op_roxr_8_r(void) +{ + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + + if(orig_shift != 0) + { + uint shift = orig_shift % 9; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = ROR_9(src | (XFLAG_AS_1() << 8), shift); + + USE_CYCLES(orig_shift * CYC_SHIFT); + + FLAG_C = FLAG_X = res; + res = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = FLAG_X; + FLAG_N = NFLAG_8(*r_dst); + FLAG_Z = MASK_OUT_ABOVE_8(*r_dst); + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxr_16_r(void) +{ + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + + if(orig_shift != 0) + { + uint shift = orig_shift % 17; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = ROR_17(src | (XFLAG_AS_1() << 16), shift); + + USE_CYCLES(orig_shift * CYC_SHIFT); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = FLAG_X; + FLAG_N = NFLAG_16(*r_dst); + FLAG_Z = MASK_OUT_ABOVE_16(*r_dst); + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxr_32_r(void) +{ +#if M68K_USE_64_BIT + + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + + if(orig_shift != 0) + { + uint shift = orig_shift % 33; + uint64 src = *r_dst; + uint64 res = src | (((uint64)XFLAG_AS_1()) << 32); + + res = ROR_33_64(res, shift); + + USE_CYCLES(orig_shift * CYC_SHIFT); + + FLAG_C = FLAG_X = res >> 24; + res = MASK_OUT_ABOVE_32(res); + + *r_dst = res; + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = FLAG_X; + FLAG_N = NFLAG_32(*r_dst); + FLAG_Z = *r_dst; + FLAG_V = VFLAG_CLEAR; + +#else + + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + uint shift = orig_shift % 33; + uint src = *r_dst; + uint res = MASK_OUT_ABOVE_32((ROR_33(src, shift) & ~(1 << (32 - shift))) | (XFLAG_AS_1() << (32 - shift))); + uint new_x_flag = src & (1 << (shift - 1)); + + if(orig_shift != 0) + USE_CYCLES(orig_shift * CYC_SHIFT); + + if(shift != 0) + { + *r_dst = res; + FLAG_X = (new_x_flag != 0)<<8; + } + else + res = src; + FLAG_C = FLAG_X; + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + +#endif +} + + +static void m68k_op_roxr_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxr_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxr_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxr_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxr_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxr_16_aw(void) +{ + uint ea = EA_AW_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxr_16_al(void) +{ + uint ea = EA_AL_16(); + uint src = m68ki_read_16(ea); + uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxl_8_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = ROL_9(src | (XFLAG_AS_1() << 8), shift); + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + FLAG_C = FLAG_X = res; + res = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxl_16_s(void) +{ + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = ROL_17(src | (XFLAG_AS_1() << 16), shift); + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxl_32_s(void) +{ +#if M68K_USE_64_BIT + + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint64 src = *r_dst; + uint64 res = src | (((uint64)XFLAG_AS_1()) << 32); + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + res = ROL_33_64(res, shift); + + FLAG_C = FLAG_X = res >> 24; + res = MASK_OUT_ABOVE_32(res); + + *r_dst = res; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + +#else + + uint* r_dst = &DY; + uint shift = (((REG_IR >> 9) - 1) & 7) + 1; + uint src = *r_dst; + uint res = MASK_OUT_ABOVE_32((ROL_33(src, shift) & ~(1 << (shift - 1))) | (XFLAG_AS_1() << (shift - 1))); + uint new_x_flag = src & (1 << (32 - shift)); + + if(shift != 0) + USE_CYCLES(shift * CYC_SHIFT); + + *r_dst = res; + + FLAG_C = FLAG_X = (new_x_flag != 0)<<8; + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + +#endif +} + + +static void m68k_op_roxl_8_r(void) +{ + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + + + if(orig_shift != 0) + { + uint shift = orig_shift % 9; + uint src = MASK_OUT_ABOVE_8(*r_dst); + uint res = ROL_9(src | (XFLAG_AS_1() << 8), shift); + + USE_CYCLES(orig_shift * CYC_SHIFT); + + FLAG_C = FLAG_X = res; + res = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = FLAG_X; + FLAG_N = NFLAG_8(*r_dst); + FLAG_Z = MASK_OUT_ABOVE_8(*r_dst); + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxl_16_r(void) +{ + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + + if(orig_shift != 0) + { + uint shift = orig_shift % 17; + uint src = MASK_OUT_ABOVE_16(*r_dst); + uint res = ROL_17(src | (XFLAG_AS_1() << 16), shift); + + USE_CYCLES(orig_shift * CYC_SHIFT); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = FLAG_X; + FLAG_N = NFLAG_16(*r_dst); + FLAG_Z = MASK_OUT_ABOVE_16(*r_dst); + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxl_32_r(void) +{ +#if M68K_USE_64_BIT + + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + + if(orig_shift != 0) + { + uint shift = orig_shift % 33; + uint64 src = *r_dst; + uint64 res = src | (((uint64)XFLAG_AS_1()) << 32); + + res = ROL_33_64(res, shift); + + USE_CYCLES(orig_shift * CYC_SHIFT); + + FLAG_C = FLAG_X = res >> 24; + res = MASK_OUT_ABOVE_32(res); + + *r_dst = res; + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + return; + } + + FLAG_C = FLAG_X; + FLAG_N = NFLAG_32(*r_dst); + FLAG_Z = *r_dst; + FLAG_V = VFLAG_CLEAR; + +#else + + uint* r_dst = &DY; + uint orig_shift = DX & 0x3f; + uint shift = orig_shift % 33; + uint src = *r_dst; + uint res = MASK_OUT_ABOVE_32((ROL_33(src, shift) & ~(1 << (shift - 1))) | (XFLAG_AS_1() << (shift - 1))); + uint new_x_flag = src & (1 << (32 - shift)); + + if(orig_shift != 0) + USE_CYCLES(orig_shift * CYC_SHIFT); + + if(shift != 0) + { + *r_dst = res; + FLAG_X = (new_x_flag != 0)<<8; + } + else + res = src; + FLAG_C = FLAG_X; + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + +#endif +} + + +static void m68k_op_roxl_16_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = m68ki_read_16(ea); + uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxl_16_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = m68ki_read_16(ea); + uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxl_16_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = m68ki_read_16(ea); + uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxl_16_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = m68ki_read_16(ea); + uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxl_16_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = m68ki_read_16(ea); + uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxl_16_aw(void) +{ + uint ea = EA_AW_16(); + uint src = m68ki_read_16(ea); + uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_roxl_16_al(void) +{ + uint ea = EA_AL_16(); + uint src = m68ki_read_16(ea); + uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1); + + FLAG_C = FLAG_X = res >> 8; + res = MASK_OUT_ABOVE_16(res); + + m68ki_write_16(ea, res); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_rte_32(void) +{ + if(FLAG_S) + { + uint new_sr; + uint new_pc; + + new_sr = m68ki_pull_16(); + new_pc = m68ki_pull_32(); + m68ki_jump(new_pc); + m68ki_set_sr(new_sr); + +#if M68K_EMULATE_ADDRESS_ERROR + CPU_INSTR_MODE = INSTRUCTION_YES; + CPU_RUN_MODE = RUN_MODE_NORMAL; +#endif + + return; + } + m68ki_exception_privilege_violation(); +} + + +static void m68k_op_rtr_32(void) +{ + m68ki_set_ccr(m68ki_pull_16()); + m68ki_jump(m68ki_pull_32()); +} + + +static void m68k_op_rts_32(void) +{ + m68ki_jump(m68ki_pull_32()); +} + + +static void m68k_op_sbcd_8_rr(void) +{ + uint* r_dst = &DX; + uint src = DY; + uint dst = *r_dst; + uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(); + +/* FLAG_V = ~res; */ /* Undefined V behavior */ + FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to assume cleared. */ + + if(res > 9) + res -= 6; + res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src); + if(res > 0x99) + { + res += 0xa0; + FLAG_X = FLAG_C = CFLAG_SET; + FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */ + } + else + FLAG_N = FLAG_X = FLAG_C = 0; + + res = MASK_OUT_ABOVE_8(res); + +/* FLAG_V &= res; */ /* Undefined V behavior part II */ +/* FLAG_N = NFLAG_8(res); */ /* Undefined N behavior */ + FLAG_Z |= res; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; +} + + +static void m68k_op_sbcd_8_mm_ax7(void) +{ + uint src = OPER_AY_PD_8(); + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(); + +/* FLAG_V = ~res; */ /* Undefined V behavior */ + FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */ + + if(res > 9) + res -= 6; + res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src); + if(res > 0x99) + { + res += 0xa0; + FLAG_X = FLAG_C = CFLAG_SET; + FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */ + } + else + FLAG_N = FLAG_X = FLAG_C = 0; + + res = MASK_OUT_ABOVE_8(res); + +/* FLAG_V &= res; */ /* Undefined V behavior part II */ +/* FLAG_N = NFLAG_8(res); */ /* Undefined N behavior */ + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_sbcd_8_mm_ay7(void) +{ + uint src = OPER_A7_PD_8(); + uint ea = EA_AX_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(); + +/* FLAG_V = ~res; */ /* Undefined V behavior */ + FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */ + + if(res > 9) + res -= 6; + res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src); + if(res > 0x99) + { + res += 0xa0; + FLAG_X = FLAG_C = CFLAG_SET; + FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */ + } + else + FLAG_N = FLAG_X = FLAG_C = 0; + + res = MASK_OUT_ABOVE_8(res); + +/* FLAG_V &= res; */ /* Undefined V behavior part II */ +/* FLAG_N = NFLAG_8(res); */ /* Undefined N behavior */ + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_sbcd_8_mm_axy7(void) +{ + uint src = OPER_A7_PD_8(); + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(); + +/* FLAG_V = ~res; */ /* Undefined V behavior */ + FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */ + + if(res > 9) + res -= 6; + res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src); + if(res > 0x99) + { + res += 0xa0; + FLAG_X = FLAG_C = CFLAG_SET; + FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */ + } + else + FLAG_N = FLAG_X = FLAG_C = 0; + + res = MASK_OUT_ABOVE_8(res); + +/* FLAG_V &= res; */ /* Undefined V behavior part II */ +/* FLAG_N = NFLAG_8(res); */ /* Undefined N behavior */ + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_sbcd_8_mm(void) +{ + uint src = OPER_AY_PD_8(); + uint ea = EA_AX_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(); + +/* FLAG_V = ~res; */ /* Undefined V behavior */ + FLAG_V = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */ + + if(res > 9) + res -= 6; + res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src); + if(res > 0x99) + { + res += 0xa0; + FLAG_X = FLAG_C = CFLAG_SET; + FLAG_N = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */ + } + else + FLAG_N = FLAG_X = FLAG_C = 0; + + res = MASK_OUT_ABOVE_8(res); + +/* FLAG_V &= res; */ /* Undefined V behavior part II */ +/* FLAG_N = NFLAG_8(res); */ /* Undefined N behavior */ + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_st_8_d(void) +{ + DY |= 0xff; +} + + +static void m68k_op_st_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), 0xff); +} + + +static void m68k_op_st_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), 0xff); +} + + +static void m68k_op_st_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), 0xff); +} + + +static void m68k_op_st_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), 0xff); +} + + +static void m68k_op_st_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), 0xff); +} + + +static void m68k_op_st_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), 0xff); +} + + +static void m68k_op_st_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), 0xff); +} + + +static void m68k_op_st_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), 0xff); +} + + +static void m68k_op_st_8_al(void) +{ + m68ki_write_8(EA_AL_8(), 0xff); +} + + +static void m68k_op_sf_8_d(void) +{ + DY &= 0xffffff00; +} + + +static void m68k_op_sf_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), 0); +} + + +static void m68k_op_sf_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), 0); +} + + +static void m68k_op_sf_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), 0); +} + + +static void m68k_op_sf_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), 0); +} + + +static void m68k_op_sf_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), 0); +} + + +static void m68k_op_sf_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), 0); +} + + +static void m68k_op_sf_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), 0); +} + + +static void m68k_op_sf_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), 0); +} + + +static void m68k_op_sf_8_al(void) +{ + m68ki_write_8(EA_AL_8(), 0); +} + + +static void m68k_op_shi_8_d(void) +{ + if(COND_HI()) + { + DY |= 0xff; + USE_CYCLES(CYC_SCC_R_TRUE); + return; + } + DY &= 0xffffff00; +} + + +static void m68k_op_sls_8_d(void) +{ + if(COND_LS()) + { + DY |= 0xff; + USE_CYCLES(CYC_SCC_R_TRUE); + return; + } + DY &= 0xffffff00; +} + + +static void m68k_op_scc_8_d(void) +{ + if(COND_CC()) + { + DY |= 0xff; + USE_CYCLES(CYC_SCC_R_TRUE); + return; + } + DY &= 0xffffff00; +} + + +static void m68k_op_scs_8_d(void) +{ + if(COND_CS()) + { + DY |= 0xff; + USE_CYCLES(CYC_SCC_R_TRUE); + return; + } + DY &= 0xffffff00; +} + + +static void m68k_op_sne_8_d(void) +{ + if(COND_NE()) + { + DY |= 0xff; + USE_CYCLES(CYC_SCC_R_TRUE); + return; + } + DY &= 0xffffff00; +} + + +static void m68k_op_seq_8_d(void) +{ + if(COND_EQ()) + { + DY |= 0xff; + USE_CYCLES(CYC_SCC_R_TRUE); + return; + } + DY &= 0xffffff00; +} + + +static void m68k_op_svc_8_d(void) +{ + if(COND_VC()) + { + DY |= 0xff; + USE_CYCLES(CYC_SCC_R_TRUE); + return; + } + DY &= 0xffffff00; +} + + +static void m68k_op_svs_8_d(void) +{ + if(COND_VS()) + { + DY |= 0xff; + USE_CYCLES(CYC_SCC_R_TRUE); + return; + } + DY &= 0xffffff00; +} + + +static void m68k_op_spl_8_d(void) +{ + if(COND_PL()) + { + DY |= 0xff; + USE_CYCLES(CYC_SCC_R_TRUE); + return; + } + DY &= 0xffffff00; +} + + +static void m68k_op_smi_8_d(void) +{ + if(COND_MI()) + { + DY |= 0xff; + USE_CYCLES(CYC_SCC_R_TRUE); + return; + } + DY &= 0xffffff00; +} + + +static void m68k_op_sge_8_d(void) +{ + if(COND_GE()) + { + DY |= 0xff; + USE_CYCLES(CYC_SCC_R_TRUE); + return; + } + DY &= 0xffffff00; +} + + +static void m68k_op_slt_8_d(void) +{ + if(COND_LT()) + { + DY |= 0xff; + USE_CYCLES(CYC_SCC_R_TRUE); + return; + } + DY &= 0xffffff00; +} + + +static void m68k_op_sgt_8_d(void) +{ + if(COND_GT()) + { + DY |= 0xff; + USE_CYCLES(CYC_SCC_R_TRUE); + return; + } + DY &= 0xffffff00; +} + + +static void m68k_op_sle_8_d(void) +{ + if(COND_LE()) + { + DY |= 0xff; + USE_CYCLES(CYC_SCC_R_TRUE); + return; + } + DY &= 0xffffff00; +} + + +static void m68k_op_shi_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_HI() ? 0xff : 0); +} + + +static void m68k_op_shi_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_HI() ? 0xff : 0); +} + + +static void m68k_op_shi_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_HI() ? 0xff : 0); +} + + +static void m68k_op_shi_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_HI() ? 0xff : 0); +} + + +static void m68k_op_shi_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_HI() ? 0xff : 0); +} + + +static void m68k_op_shi_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_HI() ? 0xff : 0); +} + + +static void m68k_op_shi_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_HI() ? 0xff : 0); +} + + +static void m68k_op_shi_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_HI() ? 0xff : 0); +} + + +static void m68k_op_shi_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_HI() ? 0xff : 0); +} + + +static void m68k_op_sls_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_LS() ? 0xff : 0); +} + + +static void m68k_op_sls_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_LS() ? 0xff : 0); +} + + +static void m68k_op_sls_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_LS() ? 0xff : 0); +} + + +static void m68k_op_sls_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_LS() ? 0xff : 0); +} + + +static void m68k_op_sls_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_LS() ? 0xff : 0); +} + + +static void m68k_op_sls_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_LS() ? 0xff : 0); +} + + +static void m68k_op_sls_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_LS() ? 0xff : 0); +} + + +static void m68k_op_sls_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_LS() ? 0xff : 0); +} + + +static void m68k_op_sls_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_LS() ? 0xff : 0); +} + + +static void m68k_op_scc_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_CC() ? 0xff : 0); +} + + +static void m68k_op_scc_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_CC() ? 0xff : 0); +} + + +static void m68k_op_scc_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_CC() ? 0xff : 0); +} + + +static void m68k_op_scc_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_CC() ? 0xff : 0); +} + + +static void m68k_op_scc_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_CC() ? 0xff : 0); +} + + +static void m68k_op_scc_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_CC() ? 0xff : 0); +} + + +static void m68k_op_scc_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_CC() ? 0xff : 0); +} + + +static void m68k_op_scc_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_CC() ? 0xff : 0); +} + + +static void m68k_op_scc_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_CC() ? 0xff : 0); +} + + +static void m68k_op_scs_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_CS() ? 0xff : 0); +} + + +static void m68k_op_scs_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_CS() ? 0xff : 0); +} + + +static void m68k_op_scs_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_CS() ? 0xff : 0); +} + + +static void m68k_op_scs_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_CS() ? 0xff : 0); +} + + +static void m68k_op_scs_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_CS() ? 0xff : 0); +} + + +static void m68k_op_scs_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_CS() ? 0xff : 0); +} + + +static void m68k_op_scs_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_CS() ? 0xff : 0); +} + + +static void m68k_op_scs_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_CS() ? 0xff : 0); +} + + +static void m68k_op_scs_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_CS() ? 0xff : 0); +} + + +static void m68k_op_sne_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_NE() ? 0xff : 0); +} + + +static void m68k_op_sne_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_NE() ? 0xff : 0); +} + + +static void m68k_op_sne_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_NE() ? 0xff : 0); +} + + +static void m68k_op_sne_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_NE() ? 0xff : 0); +} + + +static void m68k_op_sne_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_NE() ? 0xff : 0); +} + + +static void m68k_op_sne_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_NE() ? 0xff : 0); +} + + +static void m68k_op_sne_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_NE() ? 0xff : 0); +} + + +static void m68k_op_sne_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_NE() ? 0xff : 0); +} + + +static void m68k_op_sne_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_NE() ? 0xff : 0); +} + + +static void m68k_op_seq_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_EQ() ? 0xff : 0); +} + + +static void m68k_op_seq_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_EQ() ? 0xff : 0); +} + + +static void m68k_op_seq_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_EQ() ? 0xff : 0); +} + + +static void m68k_op_seq_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_EQ() ? 0xff : 0); +} + + +static void m68k_op_seq_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_EQ() ? 0xff : 0); +} + + +static void m68k_op_seq_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_EQ() ? 0xff : 0); +} + + +static void m68k_op_seq_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_EQ() ? 0xff : 0); +} + + +static void m68k_op_seq_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_EQ() ? 0xff : 0); +} + + +static void m68k_op_seq_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_EQ() ? 0xff : 0); +} + + +static void m68k_op_svc_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_VC() ? 0xff : 0); +} + + +static void m68k_op_svc_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_VC() ? 0xff : 0); +} + + +static void m68k_op_svc_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_VC() ? 0xff : 0); +} + + +static void m68k_op_svc_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_VC() ? 0xff : 0); +} + + +static void m68k_op_svc_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_VC() ? 0xff : 0); +} + + +static void m68k_op_svc_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_VC() ? 0xff : 0); +} + + +static void m68k_op_svc_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_VC() ? 0xff : 0); +} + + +static void m68k_op_svc_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_VC() ? 0xff : 0); +} + + +static void m68k_op_svc_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_VC() ? 0xff : 0); +} + + +static void m68k_op_svs_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_VS() ? 0xff : 0); +} + + +static void m68k_op_svs_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_VS() ? 0xff : 0); +} + + +static void m68k_op_svs_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_VS() ? 0xff : 0); +} + + +static void m68k_op_svs_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_VS() ? 0xff : 0); +} + + +static void m68k_op_svs_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_VS() ? 0xff : 0); +} + + +static void m68k_op_svs_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_VS() ? 0xff : 0); +} + + +static void m68k_op_svs_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_VS() ? 0xff : 0); +} + + +static void m68k_op_svs_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_VS() ? 0xff : 0); +} + + +static void m68k_op_svs_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_VS() ? 0xff : 0); +} + + +static void m68k_op_spl_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_PL() ? 0xff : 0); +} + + +static void m68k_op_spl_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_PL() ? 0xff : 0); +} + + +static void m68k_op_spl_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_PL() ? 0xff : 0); +} + + +static void m68k_op_spl_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_PL() ? 0xff : 0); +} + + +static void m68k_op_spl_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_PL() ? 0xff : 0); +} + + +static void m68k_op_spl_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_PL() ? 0xff : 0); +} + + +static void m68k_op_spl_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_PL() ? 0xff : 0); +} + + +static void m68k_op_spl_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_PL() ? 0xff : 0); +} + + +static void m68k_op_spl_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_PL() ? 0xff : 0); +} + + +static void m68k_op_smi_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_MI() ? 0xff : 0); +} + + +static void m68k_op_smi_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_MI() ? 0xff : 0); +} + + +static void m68k_op_smi_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_MI() ? 0xff : 0); +} + + +static void m68k_op_smi_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_MI() ? 0xff : 0); +} + + +static void m68k_op_smi_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_MI() ? 0xff : 0); +} + + +static void m68k_op_smi_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_MI() ? 0xff : 0); +} + + +static void m68k_op_smi_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_MI() ? 0xff : 0); +} + + +static void m68k_op_smi_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_MI() ? 0xff : 0); +} + + +static void m68k_op_smi_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_MI() ? 0xff : 0); +} + + +static void m68k_op_sge_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_GE() ? 0xff : 0); +} + + +static void m68k_op_sge_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_GE() ? 0xff : 0); +} + + +static void m68k_op_sge_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_GE() ? 0xff : 0); +} + + +static void m68k_op_sge_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_GE() ? 0xff : 0); +} + + +static void m68k_op_sge_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_GE() ? 0xff : 0); +} + + +static void m68k_op_sge_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_GE() ? 0xff : 0); +} + + +static void m68k_op_sge_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_GE() ? 0xff : 0); +} + + +static void m68k_op_sge_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_GE() ? 0xff : 0); +} + + +static void m68k_op_sge_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_GE() ? 0xff : 0); +} + + +static void m68k_op_slt_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_LT() ? 0xff : 0); +} + + +static void m68k_op_slt_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_LT() ? 0xff : 0); +} + + +static void m68k_op_slt_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_LT() ? 0xff : 0); +} + + +static void m68k_op_slt_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_LT() ? 0xff : 0); +} + + +static void m68k_op_slt_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_LT() ? 0xff : 0); +} + + +static void m68k_op_slt_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_LT() ? 0xff : 0); +} + + +static void m68k_op_slt_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_LT() ? 0xff : 0); +} + + +static void m68k_op_slt_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_LT() ? 0xff : 0); +} + + +static void m68k_op_slt_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_LT() ? 0xff : 0); +} + + +static void m68k_op_sgt_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_GT() ? 0xff : 0); +} + + +static void m68k_op_sgt_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_GT() ? 0xff : 0); +} + + +static void m68k_op_sgt_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_GT() ? 0xff : 0); +} + + +static void m68k_op_sgt_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_GT() ? 0xff : 0); +} + + +static void m68k_op_sgt_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_GT() ? 0xff : 0); +} + + +static void m68k_op_sgt_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_GT() ? 0xff : 0); +} + + +static void m68k_op_sgt_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_GT() ? 0xff : 0); +} + + +static void m68k_op_sgt_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_GT() ? 0xff : 0); +} + + +static void m68k_op_sgt_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_GT() ? 0xff : 0); +} + + +static void m68k_op_sle_8_ai(void) +{ + m68ki_write_8(EA_AY_AI_8(), COND_LE() ? 0xff : 0); +} + + +static void m68k_op_sle_8_pi(void) +{ + m68ki_write_8(EA_AY_PI_8(), COND_LE() ? 0xff : 0); +} + + +static void m68k_op_sle_8_pi7(void) +{ + m68ki_write_8(EA_A7_PI_8(), COND_LE() ? 0xff : 0); +} + + +static void m68k_op_sle_8_pd(void) +{ + m68ki_write_8(EA_AY_PD_8(), COND_LE() ? 0xff : 0); +} + + +static void m68k_op_sle_8_pd7(void) +{ + m68ki_write_8(EA_A7_PD_8(), COND_LE() ? 0xff : 0); +} + + +static void m68k_op_sle_8_di(void) +{ + m68ki_write_8(EA_AY_DI_8(), COND_LE() ? 0xff : 0); +} + + +static void m68k_op_sle_8_ix(void) +{ + m68ki_write_8(EA_AY_IX_8(), COND_LE() ? 0xff : 0); +} + + +static void m68k_op_sle_8_aw(void) +{ + m68ki_write_8(EA_AW_8(), COND_LE() ? 0xff : 0); +} + + +static void m68k_op_sle_8_al(void) +{ + m68ki_write_8(EA_AL_8(), COND_LE() ? 0xff : 0); +} + + +static void m68k_op_stop(void) +{ + if(FLAG_S) + { + uint new_sr = OPER_I_16(); + CPU_STOPPED |= STOP_LEVEL_STOP; + m68ki_set_sr(new_sr); + SET_CYCLES(m68ki_cpu.cycle_end - 4*MUL); + return; + } + m68ki_exception_privilege_violation(); +} + + +static void m68k_op_sub_8_er_d(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_8(DY); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_8_er_ai(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_AI_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_8_er_pi(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PI_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_8_er_pi7(void) +{ + uint* r_dst = &DX; + uint src = OPER_A7_PI_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_8_er_pd(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PD_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_8_er_pd7(void) +{ + uint* r_dst = &DX; + uint src = OPER_A7_PD_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_8_er_di(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_DI_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_8_er_ix(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_IX_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_8_er_aw(void) +{ + uint* r_dst = &DX; + uint src = OPER_AW_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_8_er_al(void) +{ + uint* r_dst = &DX; + uint src = OPER_AL_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_8_er_pcdi(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCDI_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_8_er_pcix(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCIX_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_8_er_i(void) +{ + uint* r_dst = &DX; + uint src = OPER_I_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_16_er_d(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_16(DY); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_16_er_a(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_16(AY); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_16_er_ai(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_AI_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_16_er_pi(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PI_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_16_er_pd(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PD_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_16_er_di(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_DI_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_16_er_ix(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_IX_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_16_er_aw(void) +{ + uint* r_dst = &DX; + uint src = OPER_AW_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_16_er_al(void) +{ + uint* r_dst = &DX; + uint src = OPER_AL_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_16_er_pcdi(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCDI_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_16_er_pcix(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCIX_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_16_er_i(void) +{ + uint* r_dst = &DX; + uint src = OPER_I_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_sub_32_er_d(void) +{ + uint* r_dst = &DX; + uint src = DY; + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_sub_32_er_a(void) +{ + uint* r_dst = &DX; + uint src = AY; + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_sub_32_er_ai(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_AI_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_sub_32_er_pi(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PI_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_sub_32_er_pd(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_PD_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_sub_32_er_di(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_DI_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_sub_32_er_ix(void) +{ + uint* r_dst = &DX; + uint src = OPER_AY_IX_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_sub_32_er_aw(void) +{ + uint* r_dst = &DX; + uint src = OPER_AW_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_sub_32_er_al(void) +{ + uint* r_dst = &DX; + uint src = OPER_AL_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_sub_32_er_pcdi(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCDI_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_sub_32_er_pcix(void) +{ + uint* r_dst = &DX; + uint src = OPER_PCIX_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_sub_32_er_i(void) +{ + uint* r_dst = &DX; + uint src = OPER_I_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_sub_8_re_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_sub_8_re_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_sub_8_re_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_sub_8_re_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_sub_8_re_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_sub_8_re_di(void) +{ + uint ea = EA_AY_DI_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_sub_8_re_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_sub_8_re_aw(void) +{ + uint ea = EA_AW_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_sub_8_re_al(void) +{ + uint ea = EA_AL_8(); + uint src = MASK_OUT_ABOVE_8(DX); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_sub_16_re_ai(void) +{ + uint ea = EA_AY_AI_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_sub_16_re_pi(void) +{ + uint ea = EA_AY_PI_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_sub_16_re_pd(void) +{ + uint ea = EA_AY_PD_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_sub_16_re_di(void) +{ + uint ea = EA_AY_DI_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_sub_16_re_ix(void) +{ + uint ea = EA_AY_IX_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_sub_16_re_aw(void) +{ + uint ea = EA_AW_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_sub_16_re_al(void) +{ + uint ea = EA_AL_16(); + uint src = MASK_OUT_ABOVE_16(DX); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_sub_32_re_ai(void) +{ + uint ea = EA_AY_AI_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_sub_32_re_pi(void) +{ + uint ea = EA_AY_PI_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_sub_32_re_pd(void) +{ + uint ea = EA_AY_PD_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_sub_32_re_di(void) +{ + uint ea = EA_AY_DI_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_sub_32_re_ix(void) +{ + uint ea = EA_AY_IX_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_sub_32_re_aw(void) +{ + uint ea = EA_AW_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_sub_32_re_al(void) +{ + uint ea = EA_AL_32(); + uint src = DX; + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_suba_16_d(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(DY)); +} + + +static void m68k_op_suba_16_a(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(AY)); +} + + +static void m68k_op_suba_16_ai(void) +{ + uint* r_dst = &AX; + uint src = MAKE_INT_16(OPER_AY_AI_16()); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); +} + + +static void m68k_op_suba_16_pi(void) +{ + uint* r_dst = &AX; + uint src = MAKE_INT_16(OPER_AY_PI_16()); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); +} + + +static void m68k_op_suba_16_pd(void) +{ + uint* r_dst = &AX; + uint src = MAKE_INT_16(OPER_AY_PD_16()); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); +} + + +static void m68k_op_suba_16_di(void) +{ + uint* r_dst = &AX; + uint src = MAKE_INT_16(OPER_AY_DI_16()); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); +} + + +static void m68k_op_suba_16_ix(void) +{ + uint* r_dst = &AX; + uint src = MAKE_INT_16(OPER_AY_IX_16()); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); +} + + +static void m68k_op_suba_16_aw(void) +{ + uint* r_dst = &AX; + uint src = MAKE_INT_16(OPER_AW_16()); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); +} + + +static void m68k_op_suba_16_al(void) +{ + uint* r_dst = &AX; + uint src = MAKE_INT_16(OPER_AL_16()); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); +} + + +static void m68k_op_suba_16_pcdi(void) +{ + uint* r_dst = &AX; + uint src = MAKE_INT_16(OPER_PCDI_16()); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); +} + + +static void m68k_op_suba_16_pcix(void) +{ + uint* r_dst = &AX; + uint src = MAKE_INT_16(OPER_PCIX_16()); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); +} + + +static void m68k_op_suba_16_i(void) +{ + uint* r_dst = &AX; + uint src = MAKE_INT_16(OPER_I_16()); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); +} + + +static void m68k_op_suba_32_d(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - DY); +} + + +static void m68k_op_suba_32_a(void) +{ + uint* r_dst = &AX; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - AY); +} + + +static void m68k_op_suba_32_ai(void) +{ + uint* r_dst = &AX; + uint src = OPER_AY_AI_32(); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); +} + + +static void m68k_op_suba_32_pi(void) +{ + uint* r_dst = &AX; + uint src = OPER_AY_PI_32(); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); +} + + +static void m68k_op_suba_32_pd(void) +{ + uint* r_dst = &AX; + uint src = OPER_AY_PD_32(); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); +} + + +static void m68k_op_suba_32_di(void) +{ + uint* r_dst = &AX; + uint src = OPER_AY_DI_32(); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); +} + + +static void m68k_op_suba_32_ix(void) +{ + uint* r_dst = &AX; + uint src = OPER_AY_IX_32(); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); +} + + +static void m68k_op_suba_32_aw(void) +{ + uint* r_dst = &AX; + uint src = OPER_AW_32(); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); +} + + +static void m68k_op_suba_32_al(void) +{ + uint* r_dst = &AX; + uint src = OPER_AL_32(); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); +} + + +static void m68k_op_suba_32_pcdi(void) +{ + uint* r_dst = &AX; + uint src = OPER_PCDI_32(); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); +} + + +static void m68k_op_suba_32_pcix(void) +{ + uint* r_dst = &AX; + uint src = OPER_PCIX_32(); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); +} + + +static void m68k_op_suba_32_i(void) +{ + uint* r_dst = &AX; + uint src = OPER_I_32(); + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - src); +} + + +static void m68k_op_subi_8_d(void) +{ + uint* r_dst = &DY; + uint src = OPER_I_8(); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_subi_8_ai(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_AI_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_subi_8_pi(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_PI_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_subi_8_pi7(void) +{ + uint src = OPER_I_8(); + uint ea = EA_A7_PI_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_subi_8_pd(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_subi_8_pd7(void) +{ + uint src = OPER_I_8(); + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_subi_8_di(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_DI_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_subi_8_ix(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AY_IX_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_subi_8_aw(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AW_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_subi_8_al(void) +{ + uint src = OPER_I_8(); + uint ea = EA_AL_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_subi_16_d(void) +{ + uint* r_dst = &DY; + uint src = OPER_I_16(); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_subi_16_ai(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_AI_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_subi_16_pi(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_PI_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_subi_16_pd(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_PD_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_subi_16_di(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_DI_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_subi_16_ix(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AY_IX_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_subi_16_aw(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AW_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_subi_16_al(void) +{ + uint src = OPER_I_16(); + uint ea = EA_AL_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_subi_32_d(void) +{ + uint* r_dst = &DY; + uint src = OPER_I_32(); + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_subi_32_ai(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_AI_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_subi_32_pi(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_PI_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_subi_32_pd(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_PD_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_subi_32_di(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_DI_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_subi_32_ix(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AY_IX_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_subi_32_aw(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AW_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_subi_32_al(void) +{ + uint src = OPER_I_32(); + uint ea = EA_AL_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_subq_8_d(void) +{ + uint* r_dst = &DY; + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z; +} + + +static void m68k_op_subq_8_ai(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_AI_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_subq_8_pi(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PI_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_subq_8_pi7(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_A7_PI_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_subq_8_pd(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_subq_8_pd7(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_subq_8_di(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_DI_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_subq_8_ix(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_IX_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_subq_8_aw(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AW_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_subq_8_al(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AL_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src; + + FLAG_N = NFLAG_8(res); + FLAG_Z = MASK_OUT_ABOVE_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + m68ki_write_8(ea, FLAG_Z); +} + + +static void m68k_op_subq_16_d(void) +{ + uint* r_dst = &DY; + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z; +} + + +static void m68k_op_subq_16_a(void) +{ + uint* r_dst = &AY; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - ((((REG_IR >> 9) - 1) & 7) + 1)); +} + + +static void m68k_op_subq_16_ai(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_AI_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_subq_16_pi(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PI_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_subq_16_pd(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PD_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_subq_16_di(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_DI_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_subq_16_ix(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_IX_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_subq_16_aw(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AW_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_subq_16_al(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AL_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src; + + FLAG_N = NFLAG_16(res); + FLAG_Z = MASK_OUT_ABOVE_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + m68ki_write_16(ea, FLAG_Z); +} + + +static void m68k_op_subq_32_d(void) +{ + uint* r_dst = &DY; + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint dst = *r_dst; + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + *r_dst = FLAG_Z; +} + + +static void m68k_op_subq_32_a(void) +{ + uint* r_dst = &AY; + + *r_dst = MASK_OUT_ABOVE_32(*r_dst - ((((REG_IR >> 9) - 1) & 7) + 1)); +} + + +static void m68k_op_subq_32_ai(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_AI_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_subq_32_pi(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PI_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_subq_32_pd(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_PD_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_subq_32_di(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_DI_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_subq_32_ix(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AY_IX_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_subq_32_aw(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AW_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_subq_32_al(void) +{ + uint src = (((REG_IR >> 9) - 1) & 7) + 1; + uint ea = EA_AL_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src; + + FLAG_N = NFLAG_32(res); + FLAG_Z = MASK_OUT_ABOVE_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + m68ki_write_32(ea, FLAG_Z); +} + + +static void m68k_op_subx_8_rr(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_8(DY); + uint dst = MASK_OUT_ABOVE_8(*r_dst); + uint res = dst - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + *r_dst = MASK_OUT_BELOW_8(*r_dst) | res; +} + + +static void m68k_op_subx_16_rr(void) +{ + uint* r_dst = &DX; + uint src = MASK_OUT_ABOVE_16(DY); + uint dst = MASK_OUT_ABOVE_16(*r_dst); + uint res = dst - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + *r_dst = MASK_OUT_BELOW_16(*r_dst) | res; +} + + +static void m68k_op_subx_32_rr(void) +{ + uint* r_dst = &DX; + uint src = DY; + uint dst = *r_dst; + uint res = dst - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + *r_dst = res; +} + + +static void m68k_op_subx_8_mm_ax7(void) +{ + uint src = OPER_AY_PD_8(); + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_subx_8_mm_ay7(void) +{ + uint src = OPER_A7_PD_8(); + uint ea = EA_AX_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_subx_8_mm_axy7(void) +{ + uint src = OPER_A7_PD_8(); + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_subx_8_mm(void) +{ + uint src = OPER_AY_PD_8(); + uint ea = EA_AX_PD_8(); + uint dst = m68ki_read_8(ea); + uint res = dst - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_8(res); + FLAG_X = FLAG_C = CFLAG_8(res); + FLAG_V = VFLAG_SUB_8(src, dst, res); + + res = MASK_OUT_ABOVE_8(res); + FLAG_Z |= res; + + m68ki_write_8(ea, res); +} + + +static void m68k_op_subx_16_mm(void) +{ + uint src = OPER_AY_PD_16(); + uint ea = EA_AX_PD_16(); + uint dst = m68ki_read_16(ea); + uint res = dst - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_16(res); + FLAG_X = FLAG_C = CFLAG_16(res); + FLAG_V = VFLAG_SUB_16(src, dst, res); + + res = MASK_OUT_ABOVE_16(res); + FLAG_Z |= res; + + m68ki_write_16(ea, res); +} + + +static void m68k_op_subx_32_mm(void) +{ + uint src = OPER_AY_PD_32(); + uint ea = EA_AX_PD_32(); + uint dst = m68ki_read_32(ea); + uint res = dst - src - XFLAG_AS_1(); + + FLAG_N = NFLAG_32(res); + FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res); + FLAG_V = VFLAG_SUB_32(src, dst, res); + + res = MASK_OUT_ABOVE_32(res); + FLAG_Z |= res; + + m68ki_write_32(ea, res); +} + + +static void m68k_op_swap_32(void) +{ + uint* r_dst = &DY; + + FLAG_Z = MASK_OUT_ABOVE_32(*r_dst<<16); + *r_dst = (*r_dst>>16) | FLAG_Z; + + FLAG_Z = *r_dst; + FLAG_N = NFLAG_32(*r_dst); + FLAG_C = CFLAG_CLEAR; + FLAG_V = VFLAG_CLEAR; +} + + +static void m68k_op_tas_8_d(void) +{ + uint* r_dst = &DY; + + FLAG_Z = MASK_OUT_ABOVE_8(*r_dst); + FLAG_N = NFLAG_8(*r_dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + *r_dst |= 0x80; +} + + +static void m68k_op_tas_8_ai(void) +{ + uint ea = EA_AY_AI_8(); + uint dst = m68ki_read_8(ea); + + FLAG_Z = dst; + FLAG_N = NFLAG_8(dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + /* The Genesis/Megadrive games Gargoyles and Ex-Mutants need the TAS writeback + disabled in order to function properly. Some Amiga software may also rely + on this, but only when accessing specific addresses so additional functionality + will be needed. */ + if (m68ki_tas_callback()) m68ki_write_8(ea, dst | 0x80); +} + + +static void m68k_op_tas_8_pi(void) +{ + uint ea = EA_AY_PI_8(); + uint dst = m68ki_read_8(ea); + + FLAG_Z = dst; + FLAG_N = NFLAG_8(dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + /* The Genesis/Megadrive games Gargoyles and Ex-Mutants need the TAS writeback + disabled in order to function properly. Some Amiga software may also rely + on this, but only when accessing specific addresses so additional functionality + will be needed. */ + if (m68ki_tas_callback()) m68ki_write_8(ea, dst | 0x80); +} + + +static void m68k_op_tas_8_pi7(void) +{ + uint ea = EA_A7_PI_8(); + uint dst = m68ki_read_8(ea); + + FLAG_Z = dst; + FLAG_N = NFLAG_8(dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + /* The Genesis/Megadrive games Gargoyles and Ex-Mutants need the TAS writeback + disabled in order to function properly. Some Amiga software may also rely + on this, but only when accessing specific addresses so additional functionality + will be needed. */ + if (m68ki_tas_callback()) m68ki_write_8(ea, dst | 0x80); +} + + +static void m68k_op_tas_8_pd(void) +{ + uint ea = EA_AY_PD_8(); + uint dst = m68ki_read_8(ea); + + FLAG_Z = dst; + FLAG_N = NFLAG_8(dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + /* The Genesis/Megadrive games Gargoyles and Ex-Mutants need the TAS writeback + disabled in order to function properly. Some Amiga software may also rely + on this, but only when accessing specific addresses so additional functionality + will be needed. */ + if (m68ki_tas_callback()) m68ki_write_8(ea, dst | 0x80); +} + + +static void m68k_op_tas_8_pd7(void) +{ + uint ea = EA_A7_PD_8(); + uint dst = m68ki_read_8(ea); + + FLAG_Z = dst; + FLAG_N = NFLAG_8(dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + /* The Genesis/Megadrive games Gargoyles and Ex-Mutants need the TAS writeback + disabled in order to function properly. Some Amiga software may also rely + on this, but only when accessing specific addresses so additional functionality + will be needed. */ + if (m68ki_tas_callback()) m68ki_write_8(ea, dst | 0x80); +} + + +static void m68k_op_tas_8_di(void) +{ + uint ea = EA_AY_DI_8(); + uint dst = m68ki_read_8(ea); + + FLAG_Z = dst; + FLAG_N = NFLAG_8(dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + /* The Genesis/Megadrive games Gargoyles and Ex-Mutants need the TAS writeback + disabled in order to function properly. Some Amiga software may also rely + on this, but only when accessing specific addresses so additional functionality + will be needed. */ + if (m68ki_tas_callback()) m68ki_write_8(ea, dst | 0x80); +} + + +static void m68k_op_tas_8_ix(void) +{ + uint ea = EA_AY_IX_8(); + uint dst = m68ki_read_8(ea); + + FLAG_Z = dst; + FLAG_N = NFLAG_8(dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + /* The Genesis/Megadrive games Gargoyles and Ex-Mutants need the TAS writeback + disabled in order to function properly. Some Amiga software may also rely + on this, but only when accessing specific addresses so additional functionality + will be needed. */ + if (m68ki_tas_callback()) m68ki_write_8(ea, dst | 0x80); +} + + +static void m68k_op_tas_8_aw(void) +{ + uint ea = EA_AW_8(); + uint dst = m68ki_read_8(ea); + + FLAG_Z = dst; + FLAG_N = NFLAG_8(dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + /* The Genesis/Megadrive games Gargoyles and Ex-Mutants need the TAS writeback + disabled in order to function properly. Some Amiga software may also rely + on this, but only when accessing specific addresses so additional functionality + will be needed. */ + if (m68ki_tas_callback()) m68ki_write_8(ea, dst | 0x80); +} + + +static void m68k_op_tas_8_al(void) +{ + uint ea = EA_AL_8(); + uint dst = m68ki_read_8(ea); + + FLAG_Z = dst; + FLAG_N = NFLAG_8(dst); + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; + + /* The Genesis/Megadrive games Gargoyles and Ex-Mutants need the TAS writeback + disabled in order to function properly. Some Amiga software may also rely + on this, but only when accessing specific addresses so additional functionality + will be needed. */ + if (m68ki_tas_callback()) m68ki_write_8(ea, dst | 0x80); +} + + +static void m68k_op_trap(void) +{ + /* Trap#n stacks exception frame type 0 */ + m68ki_exception_trapN(EXCEPTION_TRAP_BASE + (REG_IR & 0xf)); /* HJB 990403 */ +} + + +static void m68k_op_trapv(void) +{ + if(COND_VC()) + { + return; + } + m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */ +} + + +static void m68k_op_tst_8_d(void) +{ + uint res = MASK_OUT_ABOVE_8(DY); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_8_ai(void) +{ + uint res = OPER_AY_AI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_8_pi(void) +{ + uint res = OPER_AY_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_8_pi7(void) +{ + uint res = OPER_A7_PI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_8_pd(void) +{ + uint res = OPER_AY_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_8_pd7(void) +{ + uint res = OPER_A7_PD_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_8_di(void) +{ + uint res = OPER_AY_DI_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_8_ix(void) +{ + uint res = OPER_AY_IX_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_8_aw(void) +{ + uint res = OPER_AW_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_8_al(void) +{ + uint res = OPER_AL_8(); + + FLAG_N = NFLAG_8(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_16_d(void) +{ + uint res = MASK_OUT_ABOVE_16(DY); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_16_ai(void) +{ + uint res = OPER_AY_AI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_16_pi(void) +{ + uint res = OPER_AY_PI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_16_pd(void) +{ + uint res = OPER_AY_PD_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_16_di(void) +{ + uint res = OPER_AY_DI_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_16_ix(void) +{ + uint res = OPER_AY_IX_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_16_aw(void) +{ + uint res = OPER_AW_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_16_al(void) +{ + uint res = OPER_AL_16(); + + FLAG_N = NFLAG_16(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_32_d(void) +{ + uint res = DY; + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_32_ai(void) +{ + uint res = OPER_AY_AI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_32_pi(void) +{ + uint res = OPER_AY_PI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_32_pd(void) +{ + uint res = OPER_AY_PD_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_32_di(void) +{ + uint res = OPER_AY_DI_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_32_ix(void) +{ + uint res = OPER_AY_IX_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_32_aw(void) +{ + uint res = OPER_AW_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_tst_32_al(void) +{ + uint res = OPER_AL_32(); + + FLAG_N = NFLAG_32(res); + FLAG_Z = res; + FLAG_V = VFLAG_CLEAR; + FLAG_C = CFLAG_CLEAR; +} + + +static void m68k_op_unlk_32_a7(void) +{ + REG_A[7] = m68ki_read_32(REG_A[7]); +} + + +static void m68k_op_unlk_32(void) +{ + uint* r_dst = &AY; + + REG_A[7] = *r_dst; + *r_dst = m68ki_pull_32(); +} + + +/* ======================================================================== */ +/* ========================= OPCODE TABLE BUILDER ========================= */ +/* ======================================================================== */ + +#ifndef BUILD_TABLES + +#include "m68ki_instruction_jump_table.h" + +#else + +/* This is used to generate the opcode handler jump table */ +typedef struct +{ + void (*opcode_handler)(void); /* handler function */ + unsigned int mask; /* mask on opcode */ + unsigned int match; /* what to match after masking */ + unsigned char cycles; /* cycles each cpu type takes */ +} opcode_handler_struct; + +/* opcode handler jump table */ +static void (*m68ki_instruction_jump_table[0x10000])(void); + +/* Opcode handler table */ +static const opcode_handler_struct m68k_opcode_handler_table[] = +{ +/* function mask match cyc */ + {m68k_op_1010 , 0xf000, 0xa000, 4}, + {m68k_op_1111 , 0xf000, 0xf000, 4}, + {m68k_op_moveq_32 , 0xf100, 0x7000, 4}, + {m68k_op_bra_8 , 0xff00, 0x6000, 10}, + {m68k_op_bsr_8 , 0xff00, 0x6100, 18}, + {m68k_op_bhi_8 , 0xff00, 0x6200, 10}, + {m68k_op_bls_8 , 0xff00, 0x6300, 10}, + {m68k_op_bcc_8 , 0xff00, 0x6400, 10}, + {m68k_op_bcs_8 , 0xff00, 0x6500, 10}, + {m68k_op_bne_8 , 0xff00, 0x6600, 10}, + {m68k_op_beq_8 , 0xff00, 0x6700, 10}, + {m68k_op_bvc_8 , 0xff00, 0x6800, 10}, + {m68k_op_bvs_8 , 0xff00, 0x6900, 10}, + {m68k_op_bpl_8 , 0xff00, 0x6a00, 10}, + {m68k_op_bmi_8 , 0xff00, 0x6b00, 10}, + {m68k_op_bge_8 , 0xff00, 0x6c00, 10}, + {m68k_op_blt_8 , 0xff00, 0x6d00, 10}, + {m68k_op_bgt_8 , 0xff00, 0x6e00, 10}, + {m68k_op_ble_8 , 0xff00, 0x6f00, 10}, + {m68k_op_btst_32_r_d , 0xf1f8, 0x0100, 6}, + {m68k_op_movep_16_er , 0xf1f8, 0x0108, 16}, + {m68k_op_btst_8_r_ai , 0xf1f8, 0x0110, 8}, + {m68k_op_btst_8_r_pi , 0xf1f8, 0x0118, 8}, + {m68k_op_btst_8_r_pd , 0xf1f8, 0x0120, 10}, + {m68k_op_btst_8_r_di , 0xf1f8, 0x0128, 12}, + {m68k_op_btst_8_r_ix , 0xf1f8, 0x0130, 14}, + {m68k_op_bchg_32_r_d , 0xf1f8, 0x0140, 8}, + {m68k_op_movep_32_er , 0xf1f8, 0x0148, 24}, + {m68k_op_bchg_8_r_ai , 0xf1f8, 0x0150, 12}, + {m68k_op_bchg_8_r_pi , 0xf1f8, 0x0158, 12}, + {m68k_op_bchg_8_r_pd , 0xf1f8, 0x0160, 14}, + {m68k_op_bchg_8_r_di , 0xf1f8, 0x0168, 16}, + {m68k_op_bchg_8_r_ix , 0xf1f8, 0x0170, 18}, + {m68k_op_bclr_32_r_d , 0xf1f8, 0x0180, 10}, + {m68k_op_movep_16_re , 0xf1f8, 0x0188, 16}, + {m68k_op_bclr_8_r_ai , 0xf1f8, 0x0190, 12}, + {m68k_op_bclr_8_r_pi , 0xf1f8, 0x0198, 12}, + {m68k_op_bclr_8_r_pd , 0xf1f8, 0x01a0, 14}, + {m68k_op_bclr_8_r_di , 0xf1f8, 0x01a8, 16}, + {m68k_op_bclr_8_r_ix , 0xf1f8, 0x01b0, 18}, + {m68k_op_bset_32_r_d , 0xf1f8, 0x01c0, 8}, + {m68k_op_movep_32_re , 0xf1f8, 0x01c8, 24}, + {m68k_op_bset_8_r_ai , 0xf1f8, 0x01d0, 12}, + {m68k_op_bset_8_r_pi , 0xf1f8, 0x01d8, 12}, + {m68k_op_bset_8_r_pd , 0xf1f8, 0x01e0, 14}, + {m68k_op_bset_8_r_di , 0xf1f8, 0x01e8, 16}, + {m68k_op_bset_8_r_ix , 0xf1f8, 0x01f0, 18}, + {m68k_op_move_8_d_d , 0xf1f8, 0x1000, 4}, + {m68k_op_move_8_d_ai , 0xf1f8, 0x1010, 8}, + {m68k_op_move_8_d_pi , 0xf1f8, 0x1018, 8}, + {m68k_op_move_8_d_pd , 0xf1f8, 0x1020, 10}, + {m68k_op_move_8_d_di , 0xf1f8, 0x1028, 12}, + {m68k_op_move_8_d_ix , 0xf1f8, 0x1030, 14}, + {m68k_op_move_8_ai_d , 0xf1f8, 0x1080, 8}, + {m68k_op_move_8_ai_ai , 0xf1f8, 0x1090, 12}, + {m68k_op_move_8_ai_pi , 0xf1f8, 0x1098, 12}, + {m68k_op_move_8_ai_pd , 0xf1f8, 0x10a0, 14}, + {m68k_op_move_8_ai_di , 0xf1f8, 0x10a8, 16}, + {m68k_op_move_8_ai_ix , 0xf1f8, 0x10b0, 18}, + {m68k_op_move_8_pi_d , 0xf1f8, 0x10c0, 8}, + {m68k_op_move_8_pi_ai , 0xf1f8, 0x10d0, 12}, + {m68k_op_move_8_pi_pi , 0xf1f8, 0x10d8, 12}, + {m68k_op_move_8_pi_pd , 0xf1f8, 0x10e0, 14}, + {m68k_op_move_8_pi_di , 0xf1f8, 0x10e8, 16}, + {m68k_op_move_8_pi_ix , 0xf1f8, 0x10f0, 18}, + {m68k_op_move_8_pd_d , 0xf1f8, 0x1100, 8}, + {m68k_op_move_8_pd_ai , 0xf1f8, 0x1110, 12}, + {m68k_op_move_8_pd_pi , 0xf1f8, 0x1118, 12}, + {m68k_op_move_8_pd_pd , 0xf1f8, 0x1120, 14}, + {m68k_op_move_8_pd_di , 0xf1f8, 0x1128, 16}, + {m68k_op_move_8_pd_ix , 0xf1f8, 0x1130, 18}, + {m68k_op_move_8_di_d , 0xf1f8, 0x1140, 12}, + {m68k_op_move_8_di_ai , 0xf1f8, 0x1150, 16}, + {m68k_op_move_8_di_pi , 0xf1f8, 0x1158, 16}, + {m68k_op_move_8_di_pd , 0xf1f8, 0x1160, 18}, + {m68k_op_move_8_di_di , 0xf1f8, 0x1168, 20}, + {m68k_op_move_8_di_ix , 0xf1f8, 0x1170, 22}, + {m68k_op_move_8_ix_d , 0xf1f8, 0x1180, 14}, + {m68k_op_move_8_ix_ai , 0xf1f8, 0x1190, 18}, + {m68k_op_move_8_ix_pi , 0xf1f8, 0x1198, 18}, + {m68k_op_move_8_ix_pd , 0xf1f8, 0x11a0, 20}, + {m68k_op_move_8_ix_di , 0xf1f8, 0x11a8, 22}, + {m68k_op_move_8_ix_ix , 0xf1f8, 0x11b0, 24}, + {m68k_op_move_32_d_d , 0xf1f8, 0x2000, 4}, + {m68k_op_move_32_d_a , 0xf1f8, 0x2008, 4}, + {m68k_op_move_32_d_ai , 0xf1f8, 0x2010, 12}, + {m68k_op_move_32_d_pi , 0xf1f8, 0x2018, 12}, + {m68k_op_move_32_d_pd , 0xf1f8, 0x2020, 14}, + {m68k_op_move_32_d_di , 0xf1f8, 0x2028, 16}, + {m68k_op_move_32_d_ix , 0xf1f8, 0x2030, 18}, + {m68k_op_movea_32_d , 0xf1f8, 0x2040, 4}, + {m68k_op_movea_32_a , 0xf1f8, 0x2048, 4}, + {m68k_op_movea_32_ai , 0xf1f8, 0x2050, 12}, + {m68k_op_movea_32_pi , 0xf1f8, 0x2058, 12}, + {m68k_op_movea_32_pd , 0xf1f8, 0x2060, 14}, + {m68k_op_movea_32_di , 0xf1f8, 0x2068, 16}, + {m68k_op_movea_32_ix , 0xf1f8, 0x2070, 18}, + {m68k_op_move_32_ai_d , 0xf1f8, 0x2080, 12}, + {m68k_op_move_32_ai_a , 0xf1f8, 0x2088, 12}, + {m68k_op_move_32_ai_ai , 0xf1f8, 0x2090, 20}, + {m68k_op_move_32_ai_pi , 0xf1f8, 0x2098, 20}, + {m68k_op_move_32_ai_pd , 0xf1f8, 0x20a0, 22}, + {m68k_op_move_32_ai_di , 0xf1f8, 0x20a8, 24}, + {m68k_op_move_32_ai_ix , 0xf1f8, 0x20b0, 26}, + {m68k_op_move_32_pi_d , 0xf1f8, 0x20c0, 12}, + {m68k_op_move_32_pi_a , 0xf1f8, 0x20c8, 12}, + {m68k_op_move_32_pi_ai , 0xf1f8, 0x20d0, 20}, + {m68k_op_move_32_pi_pi , 0xf1f8, 0x20d8, 20}, + {m68k_op_move_32_pi_pd , 0xf1f8, 0x20e0, 22}, + {m68k_op_move_32_pi_di , 0xf1f8, 0x20e8, 24}, + {m68k_op_move_32_pi_ix , 0xf1f8, 0x20f0, 26}, + {m68k_op_move_32_pd_d , 0xf1f8, 0x2100, 12}, + {m68k_op_move_32_pd_a , 0xf1f8, 0x2108, 12}, + {m68k_op_move_32_pd_ai , 0xf1f8, 0x2110, 20}, + {m68k_op_move_32_pd_pi , 0xf1f8, 0x2118, 20}, + {m68k_op_move_32_pd_pd , 0xf1f8, 0x2120, 22}, + {m68k_op_move_32_pd_di , 0xf1f8, 0x2128, 24}, + {m68k_op_move_32_pd_ix , 0xf1f8, 0x2130, 26}, + {m68k_op_move_32_di_d , 0xf1f8, 0x2140, 16}, + {m68k_op_move_32_di_a , 0xf1f8, 0x2148, 16}, + {m68k_op_move_32_di_ai , 0xf1f8, 0x2150, 24}, + {m68k_op_move_32_di_pi , 0xf1f8, 0x2158, 24}, + {m68k_op_move_32_di_pd , 0xf1f8, 0x2160, 26}, + {m68k_op_move_32_di_di , 0xf1f8, 0x2168, 28}, + {m68k_op_move_32_di_ix , 0xf1f8, 0x2170, 30}, + {m68k_op_move_32_ix_d , 0xf1f8, 0x2180, 18}, + {m68k_op_move_32_ix_a , 0xf1f8, 0x2188, 18}, + {m68k_op_move_32_ix_ai , 0xf1f8, 0x2190, 26}, + {m68k_op_move_32_ix_pi , 0xf1f8, 0x2198, 26}, + {m68k_op_move_32_ix_pd , 0xf1f8, 0x21a0, 28}, + {m68k_op_move_32_ix_di , 0xf1f8, 0x21a8, 30}, + {m68k_op_move_32_ix_ix , 0xf1f8, 0x21b0, 32}, + {m68k_op_move_16_d_d , 0xf1f8, 0x3000, 4}, + {m68k_op_move_16_d_a , 0xf1f8, 0x3008, 4}, + {m68k_op_move_16_d_ai , 0xf1f8, 0x3010, 8}, + {m68k_op_move_16_d_pi , 0xf1f8, 0x3018, 8}, + {m68k_op_move_16_d_pd , 0xf1f8, 0x3020, 10}, + {m68k_op_move_16_d_di , 0xf1f8, 0x3028, 12}, + {m68k_op_move_16_d_ix , 0xf1f8, 0x3030, 14}, + {m68k_op_movea_16_d , 0xf1f8, 0x3040, 4}, + {m68k_op_movea_16_a , 0xf1f8, 0x3048, 4}, + {m68k_op_movea_16_ai , 0xf1f8, 0x3050, 8}, + {m68k_op_movea_16_pi , 0xf1f8, 0x3058, 8}, + {m68k_op_movea_16_pd , 0xf1f8, 0x3060, 10}, + {m68k_op_movea_16_di , 0xf1f8, 0x3068, 12}, + {m68k_op_movea_16_ix , 0xf1f8, 0x3070, 14}, + {m68k_op_move_16_ai_d , 0xf1f8, 0x3080, 8}, + {m68k_op_move_16_ai_a , 0xf1f8, 0x3088, 8}, + {m68k_op_move_16_ai_ai , 0xf1f8, 0x3090, 12}, + {m68k_op_move_16_ai_pi , 0xf1f8, 0x3098, 12}, + {m68k_op_move_16_ai_pd , 0xf1f8, 0x30a0, 14}, + {m68k_op_move_16_ai_di , 0xf1f8, 0x30a8, 16}, + {m68k_op_move_16_ai_ix , 0xf1f8, 0x30b0, 18}, + {m68k_op_move_16_pi_d , 0xf1f8, 0x30c0, 8}, + {m68k_op_move_16_pi_a , 0xf1f8, 0x30c8, 8}, + {m68k_op_move_16_pi_ai , 0xf1f8, 0x30d0, 12}, + {m68k_op_move_16_pi_pi , 0xf1f8, 0x30d8, 12}, + {m68k_op_move_16_pi_pd , 0xf1f8, 0x30e0, 14}, + {m68k_op_move_16_pi_di , 0xf1f8, 0x30e8, 16}, + {m68k_op_move_16_pi_ix , 0xf1f8, 0x30f0, 18}, + {m68k_op_move_16_pd_d , 0xf1f8, 0x3100, 8}, + {m68k_op_move_16_pd_a , 0xf1f8, 0x3108, 8}, + {m68k_op_move_16_pd_ai , 0xf1f8, 0x3110, 12}, + {m68k_op_move_16_pd_pi , 0xf1f8, 0x3118, 12}, + {m68k_op_move_16_pd_pd , 0xf1f8, 0x3120, 14}, + {m68k_op_move_16_pd_di , 0xf1f8, 0x3128, 16}, + {m68k_op_move_16_pd_ix , 0xf1f8, 0x3130, 18}, + {m68k_op_move_16_di_d , 0xf1f8, 0x3140, 12}, + {m68k_op_move_16_di_a , 0xf1f8, 0x3148, 12}, + {m68k_op_move_16_di_ai , 0xf1f8, 0x3150, 16}, + {m68k_op_move_16_di_pi , 0xf1f8, 0x3158, 16}, + {m68k_op_move_16_di_pd , 0xf1f8, 0x3160, 18}, + {m68k_op_move_16_di_di , 0xf1f8, 0x3168, 20}, + {m68k_op_move_16_di_ix , 0xf1f8, 0x3170, 22}, + {m68k_op_move_16_ix_d , 0xf1f8, 0x3180, 14}, + {m68k_op_move_16_ix_a , 0xf1f8, 0x3188, 14}, + {m68k_op_move_16_ix_ai , 0xf1f8, 0x3190, 18}, + {m68k_op_move_16_ix_pi , 0xf1f8, 0x3198, 18}, + {m68k_op_move_16_ix_pd , 0xf1f8, 0x31a0, 20}, + {m68k_op_move_16_ix_di , 0xf1f8, 0x31a8, 22}, + {m68k_op_move_16_ix_ix , 0xf1f8, 0x31b0, 24}, + {m68k_op_chk_16_d , 0xf1f8, 0x4180, 10}, + {m68k_op_chk_16_ai , 0xf1f8, 0x4190, 14}, + {m68k_op_chk_16_pi , 0xf1f8, 0x4198, 14}, + {m68k_op_chk_16_pd , 0xf1f8, 0x41a0, 16}, + {m68k_op_chk_16_di , 0xf1f8, 0x41a8, 18}, + {m68k_op_chk_16_ix , 0xf1f8, 0x41b0, 20}, + {m68k_op_lea_32_ai , 0xf1f8, 0x41d0, 4}, + {m68k_op_lea_32_di , 0xf1f8, 0x41e8, 8}, + {m68k_op_lea_32_ix , 0xf1f8, 0x41f0, 12}, + {m68k_op_addq_8_d , 0xf1f8, 0x5000, 4}, + {m68k_op_addq_8_ai , 0xf1f8, 0x5010, 12}, + {m68k_op_addq_8_pi , 0xf1f8, 0x5018, 12}, + {m68k_op_addq_8_pd , 0xf1f8, 0x5020, 14}, + {m68k_op_addq_8_di , 0xf1f8, 0x5028, 16}, + {m68k_op_addq_8_ix , 0xf1f8, 0x5030, 18}, + {m68k_op_addq_16_d , 0xf1f8, 0x5040, 4}, + {m68k_op_addq_16_a , 0xf1f8, 0x5048, 4}, + {m68k_op_addq_16_ai , 0xf1f8, 0x5050, 12}, + {m68k_op_addq_16_pi , 0xf1f8, 0x5058, 12}, + {m68k_op_addq_16_pd , 0xf1f8, 0x5060, 14}, + {m68k_op_addq_16_di , 0xf1f8, 0x5068, 16}, + {m68k_op_addq_16_ix , 0xf1f8, 0x5070, 18}, + {m68k_op_addq_32_d , 0xf1f8, 0x5080, 8}, + {m68k_op_addq_32_a , 0xf1f8, 0x5088, 8}, + {m68k_op_addq_32_ai , 0xf1f8, 0x5090, 20}, + {m68k_op_addq_32_pi , 0xf1f8, 0x5098, 20}, + {m68k_op_addq_32_pd , 0xf1f8, 0x50a0, 22}, + {m68k_op_addq_32_di , 0xf1f8, 0x50a8, 24}, + {m68k_op_addq_32_ix , 0xf1f8, 0x50b0, 26}, + {m68k_op_subq_8_d , 0xf1f8, 0x5100, 4}, + {m68k_op_subq_8_ai , 0xf1f8, 0x5110, 12}, + {m68k_op_subq_8_pi , 0xf1f8, 0x5118, 12}, + {m68k_op_subq_8_pd , 0xf1f8, 0x5120, 14}, + {m68k_op_subq_8_di , 0xf1f8, 0x5128, 16}, + {m68k_op_subq_8_ix , 0xf1f8, 0x5130, 18}, + {m68k_op_subq_16_d , 0xf1f8, 0x5140, 4}, + {m68k_op_subq_16_a , 0xf1f8, 0x5148, 8}, + {m68k_op_subq_16_ai , 0xf1f8, 0x5150, 12}, + {m68k_op_subq_16_pi , 0xf1f8, 0x5158, 12}, + {m68k_op_subq_16_pd , 0xf1f8, 0x5160, 14}, + {m68k_op_subq_16_di , 0xf1f8, 0x5168, 16}, + {m68k_op_subq_16_ix , 0xf1f8, 0x5170, 18}, + {m68k_op_subq_32_d , 0xf1f8, 0x5180, 8}, + {m68k_op_subq_32_a , 0xf1f8, 0x5188, 8}, + {m68k_op_subq_32_ai , 0xf1f8, 0x5190, 20}, + {m68k_op_subq_32_pi , 0xf1f8, 0x5198, 20}, + {m68k_op_subq_32_pd , 0xf1f8, 0x51a0, 22}, + {m68k_op_subq_32_di , 0xf1f8, 0x51a8, 24}, + {m68k_op_subq_32_ix , 0xf1f8, 0x51b0, 26}, + {m68k_op_or_8_er_d , 0xf1f8, 0x8000, 4}, + {m68k_op_or_8_er_ai , 0xf1f8, 0x8010, 8}, + {m68k_op_or_8_er_pi , 0xf1f8, 0x8018, 8}, + {m68k_op_or_8_er_pd , 0xf1f8, 0x8020, 10}, + {m68k_op_or_8_er_di , 0xf1f8, 0x8028, 12}, + {m68k_op_or_8_er_ix , 0xf1f8, 0x8030, 14}, + {m68k_op_or_16_er_d , 0xf1f8, 0x8040, 4}, + {m68k_op_or_16_er_ai , 0xf1f8, 0x8050, 8}, + {m68k_op_or_16_er_pi , 0xf1f8, 0x8058, 8}, + {m68k_op_or_16_er_pd , 0xf1f8, 0x8060, 10}, + {m68k_op_or_16_er_di , 0xf1f8, 0x8068, 12}, + {m68k_op_or_16_er_ix , 0xf1f8, 0x8070, 14}, + {m68k_op_or_32_er_d , 0xf1f8, 0x8080, 8}, + {m68k_op_or_32_er_ai , 0xf1f8, 0x8090, 14}, + {m68k_op_or_32_er_pi , 0xf1f8, 0x8098, 14}, + {m68k_op_or_32_er_pd , 0xf1f8, 0x80a0, 16}, + {m68k_op_or_32_er_di , 0xf1f8, 0x80a8, 18}, + {m68k_op_or_32_er_ix , 0xf1f8, 0x80b0, 20}, + {m68k_op_divu_16_d , 0xf1f8, 0x80c0, 0}, + {m68k_op_divu_16_ai , 0xf1f8, 0x80d0, 4}, + {m68k_op_divu_16_pi , 0xf1f8, 0x80d8, 4}, + {m68k_op_divu_16_pd , 0xf1f8, 0x80e0, 6}, + {m68k_op_divu_16_di , 0xf1f8, 0x80e8, 8}, + {m68k_op_divu_16_ix , 0xf1f8, 0x80f0, 10}, + {m68k_op_sbcd_8_rr , 0xf1f8, 0x8100, 6}, + {m68k_op_sbcd_8_mm , 0xf1f8, 0x8108, 18}, + {m68k_op_or_8_re_ai , 0xf1f8, 0x8110, 12}, + {m68k_op_or_8_re_pi , 0xf1f8, 0x8118, 12}, + {m68k_op_or_8_re_pd , 0xf1f8, 0x8120, 14}, + {m68k_op_or_8_re_di , 0xf1f8, 0x8128, 16}, + {m68k_op_or_8_re_ix , 0xf1f8, 0x8130, 18}, + {m68k_op_or_16_re_ai , 0xf1f8, 0x8150, 12}, + {m68k_op_or_16_re_pi , 0xf1f8, 0x8158, 12}, + {m68k_op_or_16_re_pd , 0xf1f8, 0x8160, 14}, + {m68k_op_or_16_re_di , 0xf1f8, 0x8168, 16}, + {m68k_op_or_16_re_ix , 0xf1f8, 0x8170, 18}, + {m68k_op_or_32_re_ai , 0xf1f8, 0x8190, 20}, + {m68k_op_or_32_re_pi , 0xf1f8, 0x8198, 20}, + {m68k_op_or_32_re_pd , 0xf1f8, 0x81a0, 22}, + {m68k_op_or_32_re_di , 0xf1f8, 0x81a8, 24}, + {m68k_op_or_32_re_ix , 0xf1f8, 0x81b0, 26}, + {m68k_op_divs_16_d , 0xf1f8, 0x81c0, 0}, + {m68k_op_divs_16_ai , 0xf1f8, 0x81d0, 4}, + {m68k_op_divs_16_pi , 0xf1f8, 0x81d8, 4}, + {m68k_op_divs_16_pd , 0xf1f8, 0x81e0, 6}, + {m68k_op_divs_16_di , 0xf1f8, 0x81e8, 8}, + {m68k_op_divs_16_ix , 0xf1f8, 0x81f0, 10}, + {m68k_op_sub_8_er_d , 0xf1f8, 0x9000, 4}, + {m68k_op_sub_8_er_ai , 0xf1f8, 0x9010, 8}, + {m68k_op_sub_8_er_pi , 0xf1f8, 0x9018, 8}, + {m68k_op_sub_8_er_pd , 0xf1f8, 0x9020, 10}, + {m68k_op_sub_8_er_di , 0xf1f8, 0x9028, 12}, + {m68k_op_sub_8_er_ix , 0xf1f8, 0x9030, 14}, + {m68k_op_sub_16_er_d , 0xf1f8, 0x9040, 4}, + {m68k_op_sub_16_er_a , 0xf1f8, 0x9048, 4}, + {m68k_op_sub_16_er_ai , 0xf1f8, 0x9050, 8}, + {m68k_op_sub_16_er_pi , 0xf1f8, 0x9058, 8}, + {m68k_op_sub_16_er_pd , 0xf1f8, 0x9060, 10}, + {m68k_op_sub_16_er_di , 0xf1f8, 0x9068, 12}, + {m68k_op_sub_16_er_ix , 0xf1f8, 0x9070, 14}, + {m68k_op_sub_32_er_d , 0xf1f8, 0x9080, 8}, + {m68k_op_sub_32_er_a , 0xf1f8, 0x9088, 8}, + {m68k_op_sub_32_er_ai , 0xf1f8, 0x9090, 14}, + {m68k_op_sub_32_er_pi , 0xf1f8, 0x9098, 14}, + {m68k_op_sub_32_er_pd , 0xf1f8, 0x90a0, 16}, + {m68k_op_sub_32_er_di , 0xf1f8, 0x90a8, 18}, + {m68k_op_sub_32_er_ix , 0xf1f8, 0x90b0, 20}, + {m68k_op_suba_16_d , 0xf1f8, 0x90c0, 8}, + {m68k_op_suba_16_a , 0xf1f8, 0x90c8, 8}, + {m68k_op_suba_16_ai , 0xf1f8, 0x90d0, 12}, + {m68k_op_suba_16_pi , 0xf1f8, 0x90d8, 12}, + {m68k_op_suba_16_pd , 0xf1f8, 0x90e0, 14}, + {m68k_op_suba_16_di , 0xf1f8, 0x90e8, 16}, + {m68k_op_suba_16_ix , 0xf1f8, 0x90f0, 18}, + {m68k_op_subx_8_rr , 0xf1f8, 0x9100, 4}, + {m68k_op_subx_8_mm , 0xf1f8, 0x9108, 18}, + {m68k_op_sub_8_re_ai , 0xf1f8, 0x9110, 12}, + {m68k_op_sub_8_re_pi , 0xf1f8, 0x9118, 12}, + {m68k_op_sub_8_re_pd , 0xf1f8, 0x9120, 14}, + {m68k_op_sub_8_re_di , 0xf1f8, 0x9128, 16}, + {m68k_op_sub_8_re_ix , 0xf1f8, 0x9130, 18}, + {m68k_op_subx_16_rr , 0xf1f8, 0x9140, 4}, + {m68k_op_subx_16_mm , 0xf1f8, 0x9148, 18}, + {m68k_op_sub_16_re_ai , 0xf1f8, 0x9150, 12}, + {m68k_op_sub_16_re_pi , 0xf1f8, 0x9158, 12}, + {m68k_op_sub_16_re_pd , 0xf1f8, 0x9160, 14}, + {m68k_op_sub_16_re_di , 0xf1f8, 0x9168, 16}, + {m68k_op_sub_16_re_ix , 0xf1f8, 0x9170, 18}, + {m68k_op_subx_32_rr , 0xf1f8, 0x9180, 8}, + {m68k_op_subx_32_mm , 0xf1f8, 0x9188, 30}, + {m68k_op_sub_32_re_ai , 0xf1f8, 0x9190, 20}, + {m68k_op_sub_32_re_pi , 0xf1f8, 0x9198, 20}, + {m68k_op_sub_32_re_pd , 0xf1f8, 0x91a0, 22}, + {m68k_op_sub_32_re_di , 0xf1f8, 0x91a8, 24}, + {m68k_op_sub_32_re_ix , 0xf1f8, 0x91b0, 26}, + {m68k_op_suba_32_d , 0xf1f8, 0x91c0, 8}, + {m68k_op_suba_32_a , 0xf1f8, 0x91c8, 8}, + {m68k_op_suba_32_ai , 0xf1f8, 0x91d0, 14}, + {m68k_op_suba_32_pi , 0xf1f8, 0x91d8, 14}, + {m68k_op_suba_32_pd , 0xf1f8, 0x91e0, 16}, + {m68k_op_suba_32_di , 0xf1f8, 0x91e8, 18}, + {m68k_op_suba_32_ix , 0xf1f8, 0x91f0, 20}, + {m68k_op_cmp_8_d , 0xf1f8, 0xb000, 4}, + {m68k_op_cmp_8_ai , 0xf1f8, 0xb010, 8}, + {m68k_op_cmp_8_pi , 0xf1f8, 0xb018, 8}, + {m68k_op_cmp_8_pd , 0xf1f8, 0xb020, 10}, + {m68k_op_cmp_8_di , 0xf1f8, 0xb028, 12}, + {m68k_op_cmp_8_ix , 0xf1f8, 0xb030, 14}, + {m68k_op_cmp_16_d , 0xf1f8, 0xb040, 4}, + {m68k_op_cmp_16_a , 0xf1f8, 0xb048, 4}, + {m68k_op_cmp_16_ai , 0xf1f8, 0xb050, 8}, + {m68k_op_cmp_16_pi , 0xf1f8, 0xb058, 8}, + {m68k_op_cmp_16_pd , 0xf1f8, 0xb060, 10}, + {m68k_op_cmp_16_di , 0xf1f8, 0xb068, 12}, + {m68k_op_cmp_16_ix , 0xf1f8, 0xb070, 14}, + {m68k_op_cmp_32_d , 0xf1f8, 0xb080, 6}, + {m68k_op_cmp_32_a , 0xf1f8, 0xb088, 6}, + {m68k_op_cmp_32_ai , 0xf1f8, 0xb090, 14}, + {m68k_op_cmp_32_pi , 0xf1f8, 0xb098, 14}, + {m68k_op_cmp_32_pd , 0xf1f8, 0xb0a0, 16}, + {m68k_op_cmp_32_di , 0xf1f8, 0xb0a8, 18}, + {m68k_op_cmp_32_ix , 0xf1f8, 0xb0b0, 20}, + {m68k_op_cmpa_16_d , 0xf1f8, 0xb0c0, 6}, + {m68k_op_cmpa_16_a , 0xf1f8, 0xb0c8, 6}, + {m68k_op_cmpa_16_ai , 0xf1f8, 0xb0d0, 10}, + {m68k_op_cmpa_16_pi , 0xf1f8, 0xb0d8, 10}, + {m68k_op_cmpa_16_pd , 0xf1f8, 0xb0e0, 12}, + {m68k_op_cmpa_16_di , 0xf1f8, 0xb0e8, 14}, + {m68k_op_cmpa_16_ix , 0xf1f8, 0xb0f0, 16}, + {m68k_op_eor_8_d , 0xf1f8, 0xb100, 4}, + {m68k_op_cmpm_8 , 0xf1f8, 0xb108, 12}, + {m68k_op_eor_8_ai , 0xf1f8, 0xb110, 12}, + {m68k_op_eor_8_pi , 0xf1f8, 0xb118, 12}, + {m68k_op_eor_8_pd , 0xf1f8, 0xb120, 14}, + {m68k_op_eor_8_di , 0xf1f8, 0xb128, 16}, + {m68k_op_eor_8_ix , 0xf1f8, 0xb130, 18}, + {m68k_op_eor_16_d , 0xf1f8, 0xb140, 4}, + {m68k_op_cmpm_16 , 0xf1f8, 0xb148, 12}, + {m68k_op_eor_16_ai , 0xf1f8, 0xb150, 12}, + {m68k_op_eor_16_pi , 0xf1f8, 0xb158, 12}, + {m68k_op_eor_16_pd , 0xf1f8, 0xb160, 14}, + {m68k_op_eor_16_di , 0xf1f8, 0xb168, 16}, + {m68k_op_eor_16_ix , 0xf1f8, 0xb170, 18}, + {m68k_op_eor_32_d , 0xf1f8, 0xb180, 8}, + {m68k_op_cmpm_32 , 0xf1f8, 0xb188, 20}, + {m68k_op_eor_32_ai , 0xf1f8, 0xb190, 20}, + {m68k_op_eor_32_pi , 0xf1f8, 0xb198, 20}, + {m68k_op_eor_32_pd , 0xf1f8, 0xb1a0, 22}, + {m68k_op_eor_32_di , 0xf1f8, 0xb1a8, 24}, + {m68k_op_eor_32_ix , 0xf1f8, 0xb1b0, 26}, + {m68k_op_cmpa_32_d , 0xf1f8, 0xb1c0, 6}, + {m68k_op_cmpa_32_a , 0xf1f8, 0xb1c8, 6}, + {m68k_op_cmpa_32_ai , 0xf1f8, 0xb1d0, 14}, + {m68k_op_cmpa_32_pi , 0xf1f8, 0xb1d8, 14}, + {m68k_op_cmpa_32_pd , 0xf1f8, 0xb1e0, 16}, + {m68k_op_cmpa_32_di , 0xf1f8, 0xb1e8, 18}, + {m68k_op_cmpa_32_ix , 0xf1f8, 0xb1f0, 20}, + {m68k_op_and_8_er_d , 0xf1f8, 0xc000, 4}, + {m68k_op_and_8_er_ai , 0xf1f8, 0xc010, 8}, + {m68k_op_and_8_er_pi , 0xf1f8, 0xc018, 8}, + {m68k_op_and_8_er_pd , 0xf1f8, 0xc020, 10}, + {m68k_op_and_8_er_di , 0xf1f8, 0xc028, 12}, + {m68k_op_and_8_er_ix , 0xf1f8, 0xc030, 14}, + {m68k_op_and_16_er_d , 0xf1f8, 0xc040, 4}, + {m68k_op_and_16_er_ai , 0xf1f8, 0xc050, 8}, + {m68k_op_and_16_er_pi , 0xf1f8, 0xc058, 8}, + {m68k_op_and_16_er_pd , 0xf1f8, 0xc060, 10}, + {m68k_op_and_16_er_di , 0xf1f8, 0xc068, 12}, + {m68k_op_and_16_er_ix , 0xf1f8, 0xc070, 14}, + {m68k_op_and_32_er_d , 0xf1f8, 0xc080, 8}, + {m68k_op_and_32_er_ai , 0xf1f8, 0xc090, 14}, + {m68k_op_and_32_er_pi , 0xf1f8, 0xc098, 14}, + {m68k_op_and_32_er_pd , 0xf1f8, 0xc0a0, 16}, + {m68k_op_and_32_er_di , 0xf1f8, 0xc0a8, 18}, + {m68k_op_and_32_er_ix , 0xf1f8, 0xc0b0, 20}, + {m68k_op_mulu_16_d , 0xf1f8, 0xc0c0, 0}, + {m68k_op_mulu_16_ai , 0xf1f8, 0xc0d0, 4}, + {m68k_op_mulu_16_pi , 0xf1f8, 0xc0d8, 4}, + {m68k_op_mulu_16_pd , 0xf1f8, 0xc0e0, 6}, + {m68k_op_mulu_16_di , 0xf1f8, 0xc0e8, 8}, + {m68k_op_mulu_16_ix , 0xf1f8, 0xc0f0, 10}, + {m68k_op_abcd_8_rr , 0xf1f8, 0xc100, 6}, + {m68k_op_abcd_8_mm , 0xf1f8, 0xc108, 18}, + {m68k_op_and_8_re_ai , 0xf1f8, 0xc110, 12}, + {m68k_op_and_8_re_pi , 0xf1f8, 0xc118, 12}, + {m68k_op_and_8_re_pd , 0xf1f8, 0xc120, 14}, + {m68k_op_and_8_re_di , 0xf1f8, 0xc128, 16}, + {m68k_op_and_8_re_ix , 0xf1f8, 0xc130, 18}, + {m68k_op_exg_32_dd , 0xf1f8, 0xc140, 6}, + {m68k_op_exg_32_aa , 0xf1f8, 0xc148, 6}, + {m68k_op_and_16_re_ai , 0xf1f8, 0xc150, 12}, + {m68k_op_and_16_re_pi , 0xf1f8, 0xc158, 12}, + {m68k_op_and_16_re_pd , 0xf1f8, 0xc160, 14}, + {m68k_op_and_16_re_di , 0xf1f8, 0xc168, 16}, + {m68k_op_and_16_re_ix , 0xf1f8, 0xc170, 18}, + {m68k_op_exg_32_da , 0xf1f8, 0xc188, 6}, + {m68k_op_and_32_re_ai , 0xf1f8, 0xc190, 20}, + {m68k_op_and_32_re_pi , 0xf1f8, 0xc198, 20}, + {m68k_op_and_32_re_pd , 0xf1f8, 0xc1a0, 22}, + {m68k_op_and_32_re_di , 0xf1f8, 0xc1a8, 24}, + {m68k_op_and_32_re_ix , 0xf1f8, 0xc1b0, 26}, + {m68k_op_muls_16_d , 0xf1f8, 0xc1c0, 0}, + {m68k_op_muls_16_ai , 0xf1f8, 0xc1d0, 4}, + {m68k_op_muls_16_pi , 0xf1f8, 0xc1d8, 4}, + {m68k_op_muls_16_pd , 0xf1f8, 0xc1e0, 6}, + {m68k_op_muls_16_di , 0xf1f8, 0xc1e8, 8}, + {m68k_op_muls_16_ix , 0xf1f8, 0xc1f0, 10}, + {m68k_op_add_8_er_d , 0xf1f8, 0xd000, 4}, + {m68k_op_add_8_er_ai , 0xf1f8, 0xd010, 8}, + {m68k_op_add_8_er_pi , 0xf1f8, 0xd018, 8}, + {m68k_op_add_8_er_pd , 0xf1f8, 0xd020, 10}, + {m68k_op_add_8_er_di , 0xf1f8, 0xd028, 12}, + {m68k_op_add_8_er_ix , 0xf1f8, 0xd030, 14}, + {m68k_op_add_16_er_d , 0xf1f8, 0xd040, 4}, + {m68k_op_add_16_er_a , 0xf1f8, 0xd048, 4}, + {m68k_op_add_16_er_ai , 0xf1f8, 0xd050, 8}, + {m68k_op_add_16_er_pi , 0xf1f8, 0xd058, 8}, + {m68k_op_add_16_er_pd , 0xf1f8, 0xd060, 10}, + {m68k_op_add_16_er_di , 0xf1f8, 0xd068, 12}, + {m68k_op_add_16_er_ix , 0xf1f8, 0xd070, 14}, + {m68k_op_add_32_er_d , 0xf1f8, 0xd080, 8}, + {m68k_op_add_32_er_a , 0xf1f8, 0xd088, 8}, + {m68k_op_add_32_er_ai , 0xf1f8, 0xd090, 14}, + {m68k_op_add_32_er_pi , 0xf1f8, 0xd098, 14}, + {m68k_op_add_32_er_pd , 0xf1f8, 0xd0a0, 16}, + {m68k_op_add_32_er_di , 0xf1f8, 0xd0a8, 18}, + {m68k_op_add_32_er_ix , 0xf1f8, 0xd0b0, 20}, + {m68k_op_adda_16_d , 0xf1f8, 0xd0c0, 8}, + {m68k_op_adda_16_a , 0xf1f8, 0xd0c8, 8}, + {m68k_op_adda_16_ai , 0xf1f8, 0xd0d0, 12}, + {m68k_op_adda_16_pi , 0xf1f8, 0xd0d8, 12}, + {m68k_op_adda_16_pd , 0xf1f8, 0xd0e0, 14}, + {m68k_op_adda_16_di , 0xf1f8, 0xd0e8, 16}, + {m68k_op_adda_16_ix , 0xf1f8, 0xd0f0, 18}, + {m68k_op_addx_8_rr , 0xf1f8, 0xd100, 4}, + {m68k_op_addx_8_mm , 0xf1f8, 0xd108, 18}, + {m68k_op_add_8_re_ai , 0xf1f8, 0xd110, 12}, + {m68k_op_add_8_re_pi , 0xf1f8, 0xd118, 12}, + {m68k_op_add_8_re_pd , 0xf1f8, 0xd120, 14}, + {m68k_op_add_8_re_di , 0xf1f8, 0xd128, 16}, + {m68k_op_add_8_re_ix , 0xf1f8, 0xd130, 18}, + {m68k_op_addx_16_rr , 0xf1f8, 0xd140, 4}, + {m68k_op_addx_16_mm , 0xf1f8, 0xd148, 18}, + {m68k_op_add_16_re_ai , 0xf1f8, 0xd150, 12}, + {m68k_op_add_16_re_pi , 0xf1f8, 0xd158, 12}, + {m68k_op_add_16_re_pd , 0xf1f8, 0xd160, 14}, + {m68k_op_add_16_re_di , 0xf1f8, 0xd168, 16}, + {m68k_op_add_16_re_ix , 0xf1f8, 0xd170, 18}, + {m68k_op_addx_32_rr , 0xf1f8, 0xd180, 8}, + {m68k_op_addx_32_mm , 0xf1f8, 0xd188, 30}, + {m68k_op_add_32_re_ai , 0xf1f8, 0xd190, 20}, + {m68k_op_add_32_re_pi , 0xf1f8, 0xd198, 20}, + {m68k_op_add_32_re_pd , 0xf1f8, 0xd1a0, 22}, + {m68k_op_add_32_re_di , 0xf1f8, 0xd1a8, 24}, + {m68k_op_add_32_re_ix , 0xf1f8, 0xd1b0, 26}, + {m68k_op_adda_32_d , 0xf1f8, 0xd1c0, 8}, + {m68k_op_adda_32_a , 0xf1f8, 0xd1c8, 8}, + {m68k_op_adda_32_ai , 0xf1f8, 0xd1d0, 14}, + {m68k_op_adda_32_pi , 0xf1f8, 0xd1d8, 14}, + {m68k_op_adda_32_pd , 0xf1f8, 0xd1e0, 16}, + {m68k_op_adda_32_di , 0xf1f8, 0xd1e8, 18}, + {m68k_op_adda_32_ix , 0xf1f8, 0xd1f0, 20}, + {m68k_op_asr_8_s , 0xf1f8, 0xe000, 6}, + {m68k_op_lsr_8_s , 0xf1f8, 0xe008, 6}, + {m68k_op_roxr_8_s , 0xf1f8, 0xe010, 6}, + {m68k_op_ror_8_s , 0xf1f8, 0xe018, 6}, + {m68k_op_asr_8_r , 0xf1f8, 0xe020, 6}, + {m68k_op_lsr_8_r , 0xf1f8, 0xe028, 6}, + {m68k_op_roxr_8_r , 0xf1f8, 0xe030, 6}, + {m68k_op_ror_8_r , 0xf1f8, 0xe038, 6}, + {m68k_op_asr_16_s , 0xf1f8, 0xe040, 6}, + {m68k_op_lsr_16_s , 0xf1f8, 0xe048, 6}, + {m68k_op_roxr_16_s , 0xf1f8, 0xe050, 6}, + {m68k_op_ror_16_s , 0xf1f8, 0xe058, 6}, + {m68k_op_asr_16_r , 0xf1f8, 0xe060, 6}, + {m68k_op_lsr_16_r , 0xf1f8, 0xe068, 6}, + {m68k_op_roxr_16_r , 0xf1f8, 0xe070, 6}, + {m68k_op_ror_16_r , 0xf1f8, 0xe078, 6}, + {m68k_op_asr_32_s , 0xf1f8, 0xe080, 8}, + {m68k_op_lsr_32_s , 0xf1f8, 0xe088, 8}, + {m68k_op_roxr_32_s , 0xf1f8, 0xe090, 8}, + {m68k_op_ror_32_s , 0xf1f8, 0xe098, 8}, + {m68k_op_asr_32_r , 0xf1f8, 0xe0a0, 8}, + {m68k_op_lsr_32_r , 0xf1f8, 0xe0a8, 8}, + {m68k_op_roxr_32_r , 0xf1f8, 0xe0b0, 8}, + {m68k_op_ror_32_r , 0xf1f8, 0xe0b8, 8}, + {m68k_op_asl_8_s , 0xf1f8, 0xe100, 6}, + {m68k_op_lsl_8_s , 0xf1f8, 0xe108, 6}, + {m68k_op_roxl_8_s , 0xf1f8, 0xe110, 6}, + {m68k_op_rol_8_s , 0xf1f8, 0xe118, 6}, + {m68k_op_asl_8_r , 0xf1f8, 0xe120, 6}, + {m68k_op_lsl_8_r , 0xf1f8, 0xe128, 6}, + {m68k_op_roxl_8_r , 0xf1f8, 0xe130, 6}, + {m68k_op_rol_8_r , 0xf1f8, 0xe138, 6}, + {m68k_op_asl_16_s , 0xf1f8, 0xe140, 6}, + {m68k_op_lsl_16_s , 0xf1f8, 0xe148, 6}, + {m68k_op_roxl_16_s , 0xf1f8, 0xe150, 6}, + {m68k_op_rol_16_s , 0xf1f8, 0xe158, 6}, + {m68k_op_asl_16_r , 0xf1f8, 0xe160, 6}, + {m68k_op_lsl_16_r , 0xf1f8, 0xe168, 6}, + {m68k_op_roxl_16_r , 0xf1f8, 0xe170, 6}, + {m68k_op_rol_16_r , 0xf1f8, 0xe178, 6}, + {m68k_op_asl_32_s , 0xf1f8, 0xe180, 8}, + {m68k_op_lsl_32_s , 0xf1f8, 0xe188, 8}, + {m68k_op_roxl_32_s , 0xf1f8, 0xe190, 8}, + {m68k_op_rol_32_s , 0xf1f8, 0xe198, 8}, + {m68k_op_asl_32_r , 0xf1f8, 0xe1a0, 8}, + {m68k_op_lsl_32_r , 0xf1f8, 0xe1a8, 8}, + {m68k_op_roxl_32_r , 0xf1f8, 0xe1b0, 8}, + {m68k_op_rol_32_r , 0xf1f8, 0xe1b8, 8}, + {m68k_op_trap , 0xfff0, 0x4e40, 4}, + {m68k_op_btst_8_r_pi7 , 0xf1ff, 0x011f, 8}, + {m68k_op_btst_8_r_pd7 , 0xf1ff, 0x0127, 10}, + {m68k_op_btst_8_r_aw , 0xf1ff, 0x0138, 12}, + {m68k_op_btst_8_r_al , 0xf1ff, 0x0139, 16}, + {m68k_op_btst_8_r_pcdi , 0xf1ff, 0x013a, 12}, + {m68k_op_btst_8_r_pcix , 0xf1ff, 0x013b, 14}, + {m68k_op_btst_8_r_i , 0xf1ff, 0x013c, 8}, + {m68k_op_bchg_8_r_pi7 , 0xf1ff, 0x015f, 12}, + {m68k_op_bchg_8_r_pd7 , 0xf1ff, 0x0167, 14}, + {m68k_op_bchg_8_r_aw , 0xf1ff, 0x0178, 16}, + {m68k_op_bchg_8_r_al , 0xf1ff, 0x0179, 20}, + {m68k_op_bclr_8_r_pi7 , 0xf1ff, 0x019f, 12}, + {m68k_op_bclr_8_r_pd7 , 0xf1ff, 0x01a7, 14}, + {m68k_op_bclr_8_r_aw , 0xf1ff, 0x01b8, 16}, + {m68k_op_bclr_8_r_al , 0xf1ff, 0x01b9, 20}, + {m68k_op_bset_8_r_pi7 , 0xf1ff, 0x01df, 12}, + {m68k_op_bset_8_r_pd7 , 0xf1ff, 0x01e7, 14}, + {m68k_op_bset_8_r_aw , 0xf1ff, 0x01f8, 16}, + {m68k_op_bset_8_r_al , 0xf1ff, 0x01f9, 20}, + {m68k_op_move_8_d_pi7 , 0xf1ff, 0x101f, 8}, + {m68k_op_move_8_d_pd7 , 0xf1ff, 0x1027, 10}, + {m68k_op_move_8_d_aw , 0xf1ff, 0x1038, 12}, + {m68k_op_move_8_d_al , 0xf1ff, 0x1039, 16}, + {m68k_op_move_8_d_pcdi , 0xf1ff, 0x103a, 12}, + {m68k_op_move_8_d_pcix , 0xf1ff, 0x103b, 14}, + {m68k_op_move_8_d_i , 0xf1ff, 0x103c, 8}, + {m68k_op_move_8_ai_pi7 , 0xf1ff, 0x109f, 12}, + {m68k_op_move_8_ai_pd7 , 0xf1ff, 0x10a7, 14}, + {m68k_op_move_8_ai_aw , 0xf1ff, 0x10b8, 16}, + {m68k_op_move_8_ai_al , 0xf1ff, 0x10b9, 20}, + {m68k_op_move_8_ai_pcdi , 0xf1ff, 0x10ba, 16}, + {m68k_op_move_8_ai_pcix , 0xf1ff, 0x10bb, 18}, + {m68k_op_move_8_ai_i , 0xf1ff, 0x10bc, 12}, + {m68k_op_move_8_pi_pi7 , 0xf1ff, 0x10df, 12}, + {m68k_op_move_8_pi_pd7 , 0xf1ff, 0x10e7, 14}, + {m68k_op_move_8_pi_aw , 0xf1ff, 0x10f8, 16}, + {m68k_op_move_8_pi_al , 0xf1ff, 0x10f9, 20}, + {m68k_op_move_8_pi_pcdi , 0xf1ff, 0x10fa, 16}, + {m68k_op_move_8_pi_pcix , 0xf1ff, 0x10fb, 18}, + {m68k_op_move_8_pi_i , 0xf1ff, 0x10fc, 12}, + {m68k_op_move_8_pd_pi7 , 0xf1ff, 0x111f, 12}, + {m68k_op_move_8_pd_pd7 , 0xf1ff, 0x1127, 14}, + {m68k_op_move_8_pd_aw , 0xf1ff, 0x1138, 16}, + {m68k_op_move_8_pd_al , 0xf1ff, 0x1139, 20}, + {m68k_op_move_8_pd_pcdi , 0xf1ff, 0x113a, 16}, + {m68k_op_move_8_pd_pcix , 0xf1ff, 0x113b, 18}, + {m68k_op_move_8_pd_i , 0xf1ff, 0x113c, 12}, + {m68k_op_move_8_di_pi7 , 0xf1ff, 0x115f, 16}, + {m68k_op_move_8_di_pd7 , 0xf1ff, 0x1167, 18}, + {m68k_op_move_8_di_aw , 0xf1ff, 0x1178, 20}, + {m68k_op_move_8_di_al , 0xf1ff, 0x1179, 24}, + {m68k_op_move_8_di_pcdi , 0xf1ff, 0x117a, 20}, + {m68k_op_move_8_di_pcix , 0xf1ff, 0x117b, 22}, + {m68k_op_move_8_di_i , 0xf1ff, 0x117c, 16}, + {m68k_op_move_8_ix_pi7 , 0xf1ff, 0x119f, 18}, + {m68k_op_move_8_ix_pd7 , 0xf1ff, 0x11a7, 20}, + {m68k_op_move_8_ix_aw , 0xf1ff, 0x11b8, 22}, + {m68k_op_move_8_ix_al , 0xf1ff, 0x11b9, 26}, + {m68k_op_move_8_ix_pcdi , 0xf1ff, 0x11ba, 22}, + {m68k_op_move_8_ix_pcix , 0xf1ff, 0x11bb, 24}, + {m68k_op_move_8_ix_i , 0xf1ff, 0x11bc, 18}, + {m68k_op_move_32_d_aw , 0xf1ff, 0x2038, 16}, + {m68k_op_move_32_d_al , 0xf1ff, 0x2039, 20}, + {m68k_op_move_32_d_pcdi , 0xf1ff, 0x203a, 16}, + {m68k_op_move_32_d_pcix , 0xf1ff, 0x203b, 18}, + {m68k_op_move_32_d_i , 0xf1ff, 0x203c, 12}, + {m68k_op_movea_32_aw , 0xf1ff, 0x2078, 16}, + {m68k_op_movea_32_al , 0xf1ff, 0x2079, 20}, + {m68k_op_movea_32_pcdi , 0xf1ff, 0x207a, 16}, + {m68k_op_movea_32_pcix , 0xf1ff, 0x207b, 18}, + {m68k_op_movea_32_i , 0xf1ff, 0x207c, 12}, + {m68k_op_move_32_ai_aw , 0xf1ff, 0x20b8, 24}, + {m68k_op_move_32_ai_al , 0xf1ff, 0x20b9, 28}, + {m68k_op_move_32_ai_pcdi , 0xf1ff, 0x20ba, 24}, + {m68k_op_move_32_ai_pcix , 0xf1ff, 0x20bb, 26}, + {m68k_op_move_32_ai_i , 0xf1ff, 0x20bc, 20}, + {m68k_op_move_32_pi_aw , 0xf1ff, 0x20f8, 24}, + {m68k_op_move_32_pi_al , 0xf1ff, 0x20f9, 28}, + {m68k_op_move_32_pi_pcdi , 0xf1ff, 0x20fa, 24}, + {m68k_op_move_32_pi_pcix , 0xf1ff, 0x20fb, 26}, + {m68k_op_move_32_pi_i , 0xf1ff, 0x20fc, 20}, + {m68k_op_move_32_pd_aw , 0xf1ff, 0x2138, 24}, + {m68k_op_move_32_pd_al , 0xf1ff, 0x2139, 28}, + {m68k_op_move_32_pd_pcdi , 0xf1ff, 0x213a, 24}, + {m68k_op_move_32_pd_pcix , 0xf1ff, 0x213b, 26}, + {m68k_op_move_32_pd_i , 0xf1ff, 0x213c, 20}, + {m68k_op_move_32_di_aw , 0xf1ff, 0x2178, 28}, + {m68k_op_move_32_di_al , 0xf1ff, 0x2179, 32}, + {m68k_op_move_32_di_pcdi , 0xf1ff, 0x217a, 28}, + {m68k_op_move_32_di_pcix , 0xf1ff, 0x217b, 30}, + {m68k_op_move_32_di_i , 0xf1ff, 0x217c, 24}, + {m68k_op_move_32_ix_aw , 0xf1ff, 0x21b8, 30}, + {m68k_op_move_32_ix_al , 0xf1ff, 0x21b9, 34}, + {m68k_op_move_32_ix_pcdi , 0xf1ff, 0x21ba, 30}, + {m68k_op_move_32_ix_pcix , 0xf1ff, 0x21bb, 32}, + {m68k_op_move_32_ix_i , 0xf1ff, 0x21bc, 26}, + {m68k_op_move_16_d_aw , 0xf1ff, 0x3038, 12}, + {m68k_op_move_16_d_al , 0xf1ff, 0x3039, 16}, + {m68k_op_move_16_d_pcdi , 0xf1ff, 0x303a, 12}, + {m68k_op_move_16_d_pcix , 0xf1ff, 0x303b, 14}, + {m68k_op_move_16_d_i , 0xf1ff, 0x303c, 8}, + {m68k_op_movea_16_aw , 0xf1ff, 0x3078, 12}, + {m68k_op_movea_16_al , 0xf1ff, 0x3079, 16}, + {m68k_op_movea_16_pcdi , 0xf1ff, 0x307a, 12}, + {m68k_op_movea_16_pcix , 0xf1ff, 0x307b, 14}, + {m68k_op_movea_16_i , 0xf1ff, 0x307c, 8}, + {m68k_op_move_16_ai_aw , 0xf1ff, 0x30b8, 16}, + {m68k_op_move_16_ai_al , 0xf1ff, 0x30b9, 20}, + {m68k_op_move_16_ai_pcdi , 0xf1ff, 0x30ba, 16}, + {m68k_op_move_16_ai_pcix , 0xf1ff, 0x30bb, 18}, + {m68k_op_move_16_ai_i , 0xf1ff, 0x30bc, 12}, + {m68k_op_move_16_pi_aw , 0xf1ff, 0x30f8, 16}, + {m68k_op_move_16_pi_al , 0xf1ff, 0x30f9, 20}, + {m68k_op_move_16_pi_pcdi , 0xf1ff, 0x30fa, 16}, + {m68k_op_move_16_pi_pcix , 0xf1ff, 0x30fb, 18}, + {m68k_op_move_16_pi_i , 0xf1ff, 0x30fc, 12}, + {m68k_op_move_16_pd_aw , 0xf1ff, 0x3138, 16}, + {m68k_op_move_16_pd_al , 0xf1ff, 0x3139, 20}, + {m68k_op_move_16_pd_pcdi , 0xf1ff, 0x313a, 16}, + {m68k_op_move_16_pd_pcix , 0xf1ff, 0x313b, 18}, + {m68k_op_move_16_pd_i , 0xf1ff, 0x313c, 12}, + {m68k_op_move_16_di_aw , 0xf1ff, 0x3178, 20}, + {m68k_op_move_16_di_al , 0xf1ff, 0x3179, 24}, + {m68k_op_move_16_di_pcdi , 0xf1ff, 0x317a, 20}, + {m68k_op_move_16_di_pcix , 0xf1ff, 0x317b, 22}, + {m68k_op_move_16_di_i , 0xf1ff, 0x317c, 16}, + {m68k_op_move_16_ix_aw , 0xf1ff, 0x31b8, 22}, + {m68k_op_move_16_ix_al , 0xf1ff, 0x31b9, 26}, + {m68k_op_move_16_ix_pcdi , 0xf1ff, 0x31ba, 22}, + {m68k_op_move_16_ix_pcix , 0xf1ff, 0x31bb, 24}, + {m68k_op_move_16_ix_i , 0xf1ff, 0x31bc, 18}, + {m68k_op_chk_16_aw , 0xf1ff, 0x41b8, 18}, + {m68k_op_chk_16_al , 0xf1ff, 0x41b9, 22}, + {m68k_op_chk_16_pcdi , 0xf1ff, 0x41ba, 18}, + {m68k_op_chk_16_pcix , 0xf1ff, 0x41bb, 20}, + {m68k_op_chk_16_i , 0xf1ff, 0x41bc, 14}, + {m68k_op_lea_32_aw , 0xf1ff, 0x41f8, 8}, + {m68k_op_lea_32_al , 0xf1ff, 0x41f9, 12}, + {m68k_op_lea_32_pcdi , 0xf1ff, 0x41fa, 8}, + {m68k_op_lea_32_pcix , 0xf1ff, 0x41fb, 12}, + {m68k_op_addq_8_pi7 , 0xf1ff, 0x501f, 12}, + {m68k_op_addq_8_pd7 , 0xf1ff, 0x5027, 14}, + {m68k_op_addq_8_aw , 0xf1ff, 0x5038, 16}, + {m68k_op_addq_8_al , 0xf1ff, 0x5039, 20}, + {m68k_op_addq_16_aw , 0xf1ff, 0x5078, 16}, + {m68k_op_addq_16_al , 0xf1ff, 0x5079, 20}, + {m68k_op_addq_32_aw , 0xf1ff, 0x50b8, 24}, + {m68k_op_addq_32_al , 0xf1ff, 0x50b9, 28}, + {m68k_op_subq_8_pi7 , 0xf1ff, 0x511f, 12}, + {m68k_op_subq_8_pd7 , 0xf1ff, 0x5127, 14}, + {m68k_op_subq_8_aw , 0xf1ff, 0x5138, 16}, + {m68k_op_subq_8_al , 0xf1ff, 0x5139, 20}, + {m68k_op_subq_16_aw , 0xf1ff, 0x5178, 16}, + {m68k_op_subq_16_al , 0xf1ff, 0x5179, 20}, + {m68k_op_subq_32_aw , 0xf1ff, 0x51b8, 24}, + {m68k_op_subq_32_al , 0xf1ff, 0x51b9, 28}, + {m68k_op_or_8_er_pi7 , 0xf1ff, 0x801f, 8}, + {m68k_op_or_8_er_pd7 , 0xf1ff, 0x8027, 10}, + {m68k_op_or_8_er_aw , 0xf1ff, 0x8038, 12}, + {m68k_op_or_8_er_al , 0xf1ff, 0x8039, 16}, + {m68k_op_or_8_er_pcdi , 0xf1ff, 0x803a, 12}, + {m68k_op_or_8_er_pcix , 0xf1ff, 0x803b, 14}, + {m68k_op_or_8_er_i , 0xf1ff, 0x803c, 8}, + {m68k_op_or_16_er_aw , 0xf1ff, 0x8078, 12}, + {m68k_op_or_16_er_al , 0xf1ff, 0x8079, 16}, + {m68k_op_or_16_er_pcdi , 0xf1ff, 0x807a, 12}, + {m68k_op_or_16_er_pcix , 0xf1ff, 0x807b, 14}, + {m68k_op_or_16_er_i , 0xf1ff, 0x807c, 8}, + {m68k_op_or_32_er_aw , 0xf1ff, 0x80b8, 18}, + {m68k_op_or_32_er_al , 0xf1ff, 0x80b9, 22}, + {m68k_op_or_32_er_pcdi , 0xf1ff, 0x80ba, 18}, + {m68k_op_or_32_er_pcix , 0xf1ff, 0x80bb, 20}, + {m68k_op_or_32_er_i , 0xf1ff, 0x80bc, 16}, + {m68k_op_divu_16_aw , 0xf1ff, 0x80f8, 8}, + {m68k_op_divu_16_al , 0xf1ff, 0x80f9, 12}, + {m68k_op_divu_16_pcdi , 0xf1ff, 0x80fa, 8}, + {m68k_op_divu_16_pcix , 0xf1ff, 0x80fb, 10}, + {m68k_op_divu_16_i , 0xf1ff, 0x80fc, 4}, + {m68k_op_sbcd_8_mm_ay7 , 0xf1ff, 0x810f, 18}, + {m68k_op_or_8_re_pi7 , 0xf1ff, 0x811f, 12}, + {m68k_op_or_8_re_pd7 , 0xf1ff, 0x8127, 14}, + {m68k_op_or_8_re_aw , 0xf1ff, 0x8138, 16}, + {m68k_op_or_8_re_al , 0xf1ff, 0x8139, 20}, + {m68k_op_or_16_re_aw , 0xf1ff, 0x8178, 16}, + {m68k_op_or_16_re_al , 0xf1ff, 0x8179, 20}, + {m68k_op_or_32_re_aw , 0xf1ff, 0x81b8, 24}, + {m68k_op_or_32_re_al , 0xf1ff, 0x81b9, 28}, + {m68k_op_divs_16_aw , 0xf1ff, 0x81f8, 8}, + {m68k_op_divs_16_al , 0xf1ff, 0x81f9, 12}, + {m68k_op_divs_16_pcdi , 0xf1ff, 0x81fa, 8}, + {m68k_op_divs_16_pcix , 0xf1ff, 0x81fb, 10}, + {m68k_op_divs_16_i , 0xf1ff, 0x81fc, 4}, + {m68k_op_sub_8_er_pi7 , 0xf1ff, 0x901f, 8}, + {m68k_op_sub_8_er_pd7 , 0xf1ff, 0x9027, 10}, + {m68k_op_sub_8_er_aw , 0xf1ff, 0x9038, 12}, + {m68k_op_sub_8_er_al , 0xf1ff, 0x9039, 16}, + {m68k_op_sub_8_er_pcdi , 0xf1ff, 0x903a, 12}, + {m68k_op_sub_8_er_pcix , 0xf1ff, 0x903b, 14}, + {m68k_op_sub_8_er_i , 0xf1ff, 0x903c, 8}, + {m68k_op_sub_16_er_aw , 0xf1ff, 0x9078, 12}, + {m68k_op_sub_16_er_al , 0xf1ff, 0x9079, 16}, + {m68k_op_sub_16_er_pcdi , 0xf1ff, 0x907a, 12}, + {m68k_op_sub_16_er_pcix , 0xf1ff, 0x907b, 14}, + {m68k_op_sub_16_er_i , 0xf1ff, 0x907c, 8}, + {m68k_op_sub_32_er_aw , 0xf1ff, 0x90b8, 18}, + {m68k_op_sub_32_er_al , 0xf1ff, 0x90b9, 22}, + {m68k_op_sub_32_er_pcdi , 0xf1ff, 0x90ba, 18}, + {m68k_op_sub_32_er_pcix , 0xf1ff, 0x90bb, 20}, + {m68k_op_sub_32_er_i , 0xf1ff, 0x90bc, 16}, + {m68k_op_suba_16_aw , 0xf1ff, 0x90f8, 16}, + {m68k_op_suba_16_al , 0xf1ff, 0x90f9, 20}, + {m68k_op_suba_16_pcdi , 0xf1ff, 0x90fa, 16}, + {m68k_op_suba_16_pcix , 0xf1ff, 0x90fb, 18}, + {m68k_op_suba_16_i , 0xf1ff, 0x90fc, 12}, + {m68k_op_subx_8_mm_ay7 , 0xf1ff, 0x910f, 18}, + {m68k_op_sub_8_re_pi7 , 0xf1ff, 0x911f, 12}, + {m68k_op_sub_8_re_pd7 , 0xf1ff, 0x9127, 14}, + {m68k_op_sub_8_re_aw , 0xf1ff, 0x9138, 16}, + {m68k_op_sub_8_re_al , 0xf1ff, 0x9139, 20}, + {m68k_op_sub_16_re_aw , 0xf1ff, 0x9178, 16}, + {m68k_op_sub_16_re_al , 0xf1ff, 0x9179, 20}, + {m68k_op_sub_32_re_aw , 0xf1ff, 0x91b8, 24}, + {m68k_op_sub_32_re_al , 0xf1ff, 0x91b9, 28}, + {m68k_op_suba_32_aw , 0xf1ff, 0x91f8, 18}, + {m68k_op_suba_32_al , 0xf1ff, 0x91f9, 22}, + {m68k_op_suba_32_pcdi , 0xf1ff, 0x91fa, 18}, + {m68k_op_suba_32_pcix , 0xf1ff, 0x91fb, 20}, + {m68k_op_suba_32_i , 0xf1ff, 0x91fc, 16}, + {m68k_op_cmp_8_pi7 , 0xf1ff, 0xb01f, 8}, + {m68k_op_cmp_8_pd7 , 0xf1ff, 0xb027, 10}, + {m68k_op_cmp_8_aw , 0xf1ff, 0xb038, 12}, + {m68k_op_cmp_8_al , 0xf1ff, 0xb039, 16}, + {m68k_op_cmp_8_pcdi , 0xf1ff, 0xb03a, 12}, + {m68k_op_cmp_8_pcix , 0xf1ff, 0xb03b, 14}, + {m68k_op_cmp_8_i , 0xf1ff, 0xb03c, 8}, + {m68k_op_cmp_16_aw , 0xf1ff, 0xb078, 12}, + {m68k_op_cmp_16_al , 0xf1ff, 0xb079, 16}, + {m68k_op_cmp_16_pcdi , 0xf1ff, 0xb07a, 12}, + {m68k_op_cmp_16_pcix , 0xf1ff, 0xb07b, 14}, + {m68k_op_cmp_16_i , 0xf1ff, 0xb07c, 8}, + {m68k_op_cmp_32_aw , 0xf1ff, 0xb0b8, 18}, + {m68k_op_cmp_32_al , 0xf1ff, 0xb0b9, 22}, + {m68k_op_cmp_32_pcdi , 0xf1ff, 0xb0ba, 18}, + {m68k_op_cmp_32_pcix , 0xf1ff, 0xb0bb, 20}, + {m68k_op_cmp_32_i , 0xf1ff, 0xb0bc, 14}, + {m68k_op_cmpa_16_aw , 0xf1ff, 0xb0f8, 14}, + {m68k_op_cmpa_16_al , 0xf1ff, 0xb0f9, 18}, + {m68k_op_cmpa_16_pcdi , 0xf1ff, 0xb0fa, 14}, + {m68k_op_cmpa_16_pcix , 0xf1ff, 0xb0fb, 16}, + {m68k_op_cmpa_16_i , 0xf1ff, 0xb0fc, 10}, + {m68k_op_cmpm_8_ay7 , 0xf1ff, 0xb10f, 12}, + {m68k_op_eor_8_pi7 , 0xf1ff, 0xb11f, 12}, + {m68k_op_eor_8_pd7 , 0xf1ff, 0xb127, 14}, + {m68k_op_eor_8_aw , 0xf1ff, 0xb138, 16}, + {m68k_op_eor_8_al , 0xf1ff, 0xb139, 20}, + {m68k_op_eor_16_aw , 0xf1ff, 0xb178, 16}, + {m68k_op_eor_16_al , 0xf1ff, 0xb179, 20}, + {m68k_op_eor_32_aw , 0xf1ff, 0xb1b8, 24}, + {m68k_op_eor_32_al , 0xf1ff, 0xb1b9, 28}, + {m68k_op_cmpa_32_aw , 0xf1ff, 0xb1f8, 18}, + {m68k_op_cmpa_32_al , 0xf1ff, 0xb1f9, 22}, + {m68k_op_cmpa_32_pcdi , 0xf1ff, 0xb1fa, 18}, + {m68k_op_cmpa_32_pcix , 0xf1ff, 0xb1fb, 20}, + {m68k_op_cmpa_32_i , 0xf1ff, 0xb1fc, 14}, + {m68k_op_and_8_er_pi7 , 0xf1ff, 0xc01f, 8}, + {m68k_op_and_8_er_pd7 , 0xf1ff, 0xc027, 10}, + {m68k_op_and_8_er_aw , 0xf1ff, 0xc038, 12}, + {m68k_op_and_8_er_al , 0xf1ff, 0xc039, 16}, + {m68k_op_and_8_er_pcdi , 0xf1ff, 0xc03a, 12}, + {m68k_op_and_8_er_pcix , 0xf1ff, 0xc03b, 14}, + {m68k_op_and_8_er_i , 0xf1ff, 0xc03c, 8}, + {m68k_op_and_16_er_aw , 0xf1ff, 0xc078, 12}, + {m68k_op_and_16_er_al , 0xf1ff, 0xc079, 16}, + {m68k_op_and_16_er_pcdi , 0xf1ff, 0xc07a, 12}, + {m68k_op_and_16_er_pcix , 0xf1ff, 0xc07b, 14}, + {m68k_op_and_16_er_i , 0xf1ff, 0xc07c, 8}, + {m68k_op_and_32_er_aw , 0xf1ff, 0xc0b8, 18}, + {m68k_op_and_32_er_al , 0xf1ff, 0xc0b9, 22}, + {m68k_op_and_32_er_pcdi , 0xf1ff, 0xc0ba, 18}, + {m68k_op_and_32_er_pcix , 0xf1ff, 0xc0bb, 20}, + {m68k_op_and_32_er_i , 0xf1ff, 0xc0bc, 16}, + {m68k_op_mulu_16_aw , 0xf1ff, 0xc0f8, 8}, + {m68k_op_mulu_16_al , 0xf1ff, 0xc0f9, 12}, + {m68k_op_mulu_16_pcdi , 0xf1ff, 0xc0fa, 8}, + {m68k_op_mulu_16_pcix , 0xf1ff, 0xc0fb, 10}, + {m68k_op_mulu_16_i , 0xf1ff, 0xc0fc, 4}, + {m68k_op_abcd_8_mm_ay7 , 0xf1ff, 0xc10f, 18}, + {m68k_op_and_8_re_pi7 , 0xf1ff, 0xc11f, 12}, + {m68k_op_and_8_re_pd7 , 0xf1ff, 0xc127, 14}, + {m68k_op_and_8_re_aw , 0xf1ff, 0xc138, 16}, + {m68k_op_and_8_re_al , 0xf1ff, 0xc139, 20}, + {m68k_op_and_16_re_aw , 0xf1ff, 0xc178, 16}, + {m68k_op_and_16_re_al , 0xf1ff, 0xc179, 20}, + {m68k_op_and_32_re_aw , 0xf1ff, 0xc1b8, 24}, + {m68k_op_and_32_re_al , 0xf1ff, 0xc1b9, 28}, + {m68k_op_muls_16_aw , 0xf1ff, 0xc1f8, 8}, + {m68k_op_muls_16_al , 0xf1ff, 0xc1f9, 12}, + {m68k_op_muls_16_pcdi , 0xf1ff, 0xc1fa, 8}, + {m68k_op_muls_16_pcix , 0xf1ff, 0xc1fb, 10}, + {m68k_op_muls_16_i , 0xf1ff, 0xc1fc, 4}, + {m68k_op_add_8_er_pi7 , 0xf1ff, 0xd01f, 8}, + {m68k_op_add_8_er_pd7 , 0xf1ff, 0xd027, 10}, + {m68k_op_add_8_er_aw , 0xf1ff, 0xd038, 12}, + {m68k_op_add_8_er_al , 0xf1ff, 0xd039, 16}, + {m68k_op_add_8_er_pcdi , 0xf1ff, 0xd03a, 12}, + {m68k_op_add_8_er_pcix , 0xf1ff, 0xd03b, 14}, + {m68k_op_add_8_er_i , 0xf1ff, 0xd03c, 8}, + {m68k_op_add_16_er_aw , 0xf1ff, 0xd078, 12}, + {m68k_op_add_16_er_al , 0xf1ff, 0xd079, 16}, + {m68k_op_add_16_er_pcdi , 0xf1ff, 0xd07a, 12}, + {m68k_op_add_16_er_pcix , 0xf1ff, 0xd07b, 14}, + {m68k_op_add_16_er_i , 0xf1ff, 0xd07c, 8}, + {m68k_op_add_32_er_aw , 0xf1ff, 0xd0b8, 18}, + {m68k_op_add_32_er_al , 0xf1ff, 0xd0b9, 22}, + {m68k_op_add_32_er_pcdi , 0xf1ff, 0xd0ba, 18}, + {m68k_op_add_32_er_pcix , 0xf1ff, 0xd0bb, 20}, + {m68k_op_add_32_er_i , 0xf1ff, 0xd0bc, 16}, + {m68k_op_adda_16_aw , 0xf1ff, 0xd0f8, 16}, + {m68k_op_adda_16_al , 0xf1ff, 0xd0f9, 20}, + {m68k_op_adda_16_pcdi , 0xf1ff, 0xd0fa, 16}, + {m68k_op_adda_16_pcix , 0xf1ff, 0xd0fb, 18}, + {m68k_op_adda_16_i , 0xf1ff, 0xd0fc, 12}, + {m68k_op_addx_8_mm_ay7 , 0xf1ff, 0xd10f, 18}, + {m68k_op_add_8_re_pi7 , 0xf1ff, 0xd11f, 12}, + {m68k_op_add_8_re_pd7 , 0xf1ff, 0xd127, 14}, + {m68k_op_add_8_re_aw , 0xf1ff, 0xd138, 16}, + {m68k_op_add_8_re_al , 0xf1ff, 0xd139, 20}, + {m68k_op_add_16_re_aw , 0xf1ff, 0xd178, 16}, + {m68k_op_add_16_re_al , 0xf1ff, 0xd179, 20}, + {m68k_op_add_32_re_aw , 0xf1ff, 0xd1b8, 24}, + {m68k_op_add_32_re_al , 0xf1ff, 0xd1b9, 28}, + {m68k_op_adda_32_aw , 0xf1ff, 0xd1f8, 18}, + {m68k_op_adda_32_al , 0xf1ff, 0xd1f9, 22}, + {m68k_op_adda_32_pcdi , 0xf1ff, 0xd1fa, 18}, + {m68k_op_adda_32_pcix , 0xf1ff, 0xd1fb, 20}, + {m68k_op_adda_32_i , 0xf1ff, 0xd1fc, 16}, + {m68k_op_ori_8_d , 0xfff8, 0x0000, 8}, + {m68k_op_ori_8_ai , 0xfff8, 0x0010, 16}, + {m68k_op_ori_8_pi , 0xfff8, 0x0018, 16}, + {m68k_op_ori_8_pd , 0xfff8, 0x0020, 18}, + {m68k_op_ori_8_di , 0xfff8, 0x0028, 20}, + {m68k_op_ori_8_ix , 0xfff8, 0x0030, 22}, + {m68k_op_ori_16_d , 0xfff8, 0x0040, 8}, + {m68k_op_ori_16_ai , 0xfff8, 0x0050, 16}, + {m68k_op_ori_16_pi , 0xfff8, 0x0058, 16}, + {m68k_op_ori_16_pd , 0xfff8, 0x0060, 18}, + {m68k_op_ori_16_di , 0xfff8, 0x0068, 20}, + {m68k_op_ori_16_ix , 0xfff8, 0x0070, 22}, + {m68k_op_ori_32_d , 0xfff8, 0x0080, 16}, + {m68k_op_ori_32_ai , 0xfff8, 0x0090, 28}, + {m68k_op_ori_32_pi , 0xfff8, 0x0098, 28}, + {m68k_op_ori_32_pd , 0xfff8, 0x00a0, 30}, + {m68k_op_ori_32_di , 0xfff8, 0x00a8, 32}, + {m68k_op_ori_32_ix , 0xfff8, 0x00b0, 34}, + {m68k_op_andi_8_d , 0xfff8, 0x0200, 8}, + {m68k_op_andi_8_ai , 0xfff8, 0x0210, 16}, + {m68k_op_andi_8_pi , 0xfff8, 0x0218, 16}, + {m68k_op_andi_8_pd , 0xfff8, 0x0220, 18}, + {m68k_op_andi_8_di , 0xfff8, 0x0228, 20}, + {m68k_op_andi_8_ix , 0xfff8, 0x0230, 22}, + {m68k_op_andi_16_d , 0xfff8, 0x0240, 8}, + {m68k_op_andi_16_ai , 0xfff8, 0x0250, 16}, + {m68k_op_andi_16_pi , 0xfff8, 0x0258, 16}, + {m68k_op_andi_16_pd , 0xfff8, 0x0260, 18}, + {m68k_op_andi_16_di , 0xfff8, 0x0268, 20}, + {m68k_op_andi_16_ix , 0xfff8, 0x0270, 22}, + {m68k_op_andi_32_d , 0xfff8, 0x0280, 14}, + {m68k_op_andi_32_ai , 0xfff8, 0x0290, 28}, + {m68k_op_andi_32_pi , 0xfff8, 0x0298, 28}, + {m68k_op_andi_32_pd , 0xfff8, 0x02a0, 30}, + {m68k_op_andi_32_di , 0xfff8, 0x02a8, 32}, + {m68k_op_andi_32_ix , 0xfff8, 0x02b0, 34}, + {m68k_op_subi_8_d , 0xfff8, 0x0400, 8}, + {m68k_op_subi_8_ai , 0xfff8, 0x0410, 16}, + {m68k_op_subi_8_pi , 0xfff8, 0x0418, 16}, + {m68k_op_subi_8_pd , 0xfff8, 0x0420, 18}, + {m68k_op_subi_8_di , 0xfff8, 0x0428, 20}, + {m68k_op_subi_8_ix , 0xfff8, 0x0430, 22}, + {m68k_op_subi_16_d , 0xfff8, 0x0440, 8}, + {m68k_op_subi_16_ai , 0xfff8, 0x0450, 16}, + {m68k_op_subi_16_pi , 0xfff8, 0x0458, 16}, + {m68k_op_subi_16_pd , 0xfff8, 0x0460, 18}, + {m68k_op_subi_16_di , 0xfff8, 0x0468, 20}, + {m68k_op_subi_16_ix , 0xfff8, 0x0470, 22}, + {m68k_op_subi_32_d , 0xfff8, 0x0480, 16}, + {m68k_op_subi_32_ai , 0xfff8, 0x0490, 28}, + {m68k_op_subi_32_pi , 0xfff8, 0x0498, 28}, + {m68k_op_subi_32_pd , 0xfff8, 0x04a0, 30}, + {m68k_op_subi_32_di , 0xfff8, 0x04a8, 32}, + {m68k_op_subi_32_ix , 0xfff8, 0x04b0, 34}, + {m68k_op_addi_8_d , 0xfff8, 0x0600, 8}, + {m68k_op_addi_8_ai , 0xfff8, 0x0610, 16}, + {m68k_op_addi_8_pi , 0xfff8, 0x0618, 16}, + {m68k_op_addi_8_pd , 0xfff8, 0x0620, 18}, + {m68k_op_addi_8_di , 0xfff8, 0x0628, 20}, + {m68k_op_addi_8_ix , 0xfff8, 0x0630, 22}, + {m68k_op_addi_16_d , 0xfff8, 0x0640, 8}, + {m68k_op_addi_16_ai , 0xfff8, 0x0650, 16}, + {m68k_op_addi_16_pi , 0xfff8, 0x0658, 16}, + {m68k_op_addi_16_pd , 0xfff8, 0x0660, 18}, + {m68k_op_addi_16_di , 0xfff8, 0x0668, 20}, + {m68k_op_addi_16_ix , 0xfff8, 0x0670, 22}, + {m68k_op_addi_32_d , 0xfff8, 0x0680, 16}, + {m68k_op_addi_32_ai , 0xfff8, 0x0690, 28}, + {m68k_op_addi_32_pi , 0xfff8, 0x0698, 28}, + {m68k_op_addi_32_pd , 0xfff8, 0x06a0, 30}, + {m68k_op_addi_32_di , 0xfff8, 0x06a8, 32}, + {m68k_op_addi_32_ix , 0xfff8, 0x06b0, 34}, + {m68k_op_btst_32_s_d , 0xfff8, 0x0800, 10}, + {m68k_op_btst_8_s_ai , 0xfff8, 0x0810, 12}, + {m68k_op_btst_8_s_pi , 0xfff8, 0x0818, 12}, + {m68k_op_btst_8_s_pd , 0xfff8, 0x0820, 14}, + {m68k_op_btst_8_s_di , 0xfff8, 0x0828, 16}, + {m68k_op_btst_8_s_ix , 0xfff8, 0x0830, 18}, + {m68k_op_bchg_32_s_d , 0xfff8, 0x0840, 12}, + {m68k_op_bchg_8_s_ai , 0xfff8, 0x0850, 16}, + {m68k_op_bchg_8_s_pi , 0xfff8, 0x0858, 16}, + {m68k_op_bchg_8_s_pd , 0xfff8, 0x0860, 18}, + {m68k_op_bchg_8_s_di , 0xfff8, 0x0868, 20}, + {m68k_op_bchg_8_s_ix , 0xfff8, 0x0870, 22}, + {m68k_op_bclr_32_s_d , 0xfff8, 0x0880, 14}, + {m68k_op_bclr_8_s_ai , 0xfff8, 0x0890, 16}, + {m68k_op_bclr_8_s_pi , 0xfff8, 0x0898, 16}, + {m68k_op_bclr_8_s_pd , 0xfff8, 0x08a0, 18}, + {m68k_op_bclr_8_s_di , 0xfff8, 0x08a8, 20}, + {m68k_op_bclr_8_s_ix , 0xfff8, 0x08b0, 22}, + {m68k_op_bset_32_s_d , 0xfff8, 0x08c0, 12}, + {m68k_op_bset_8_s_ai , 0xfff8, 0x08d0, 16}, + {m68k_op_bset_8_s_pi , 0xfff8, 0x08d8, 16}, + {m68k_op_bset_8_s_pd , 0xfff8, 0x08e0, 18}, + {m68k_op_bset_8_s_di , 0xfff8, 0x08e8, 20}, + {m68k_op_bset_8_s_ix , 0xfff8, 0x08f0, 22}, + {m68k_op_eori_8_d , 0xfff8, 0x0a00, 8}, + {m68k_op_eori_8_ai , 0xfff8, 0x0a10, 16}, + {m68k_op_eori_8_pi , 0xfff8, 0x0a18, 16}, + {m68k_op_eori_8_pd , 0xfff8, 0x0a20, 18}, + {m68k_op_eori_8_di , 0xfff8, 0x0a28, 20}, + {m68k_op_eori_8_ix , 0xfff8, 0x0a30, 22}, + {m68k_op_eori_16_d , 0xfff8, 0x0a40, 8}, + {m68k_op_eori_16_ai , 0xfff8, 0x0a50, 16}, + {m68k_op_eori_16_pi , 0xfff8, 0x0a58, 16}, + {m68k_op_eori_16_pd , 0xfff8, 0x0a60, 18}, + {m68k_op_eori_16_di , 0xfff8, 0x0a68, 20}, + {m68k_op_eori_16_ix , 0xfff8, 0x0a70, 22}, + {m68k_op_eori_32_d , 0xfff8, 0x0a80, 16}, + {m68k_op_eori_32_ai , 0xfff8, 0x0a90, 28}, + {m68k_op_eori_32_pi , 0xfff8, 0x0a98, 28}, + {m68k_op_eori_32_pd , 0xfff8, 0x0aa0, 30}, + {m68k_op_eori_32_di , 0xfff8, 0x0aa8, 32}, + {m68k_op_eori_32_ix , 0xfff8, 0x0ab0, 34}, + {m68k_op_cmpi_8_d , 0xfff8, 0x0c00, 8}, + {m68k_op_cmpi_8_ai , 0xfff8, 0x0c10, 12}, + {m68k_op_cmpi_8_pi , 0xfff8, 0x0c18, 12}, + {m68k_op_cmpi_8_pd , 0xfff8, 0x0c20, 14}, + {m68k_op_cmpi_8_di , 0xfff8, 0x0c28, 16}, + {m68k_op_cmpi_8_ix , 0xfff8, 0x0c30, 18}, + {m68k_op_cmpi_16_d , 0xfff8, 0x0c40, 8}, + {m68k_op_cmpi_16_ai , 0xfff8, 0x0c50, 12}, + {m68k_op_cmpi_16_pi , 0xfff8, 0x0c58, 12}, + {m68k_op_cmpi_16_pd , 0xfff8, 0x0c60, 14}, + {m68k_op_cmpi_16_di , 0xfff8, 0x0c68, 16}, + {m68k_op_cmpi_16_ix , 0xfff8, 0x0c70, 18}, + {m68k_op_cmpi_32_d , 0xfff8, 0x0c80, 14}, + {m68k_op_cmpi_32_ai , 0xfff8, 0x0c90, 20}, + {m68k_op_cmpi_32_pi , 0xfff8, 0x0c98, 20}, + {m68k_op_cmpi_32_pd , 0xfff8, 0x0ca0, 22}, + {m68k_op_cmpi_32_di , 0xfff8, 0x0ca8, 24}, + {m68k_op_cmpi_32_ix , 0xfff8, 0x0cb0, 26}, + {m68k_op_move_8_aw_d , 0xfff8, 0x11c0, 12}, + {m68k_op_move_8_aw_ai , 0xfff8, 0x11d0, 16}, + {m68k_op_move_8_aw_pi , 0xfff8, 0x11d8, 16}, + {m68k_op_move_8_aw_pd , 0xfff8, 0x11e0, 18}, + {m68k_op_move_8_aw_di , 0xfff8, 0x11e8, 20}, + {m68k_op_move_8_aw_ix , 0xfff8, 0x11f0, 22}, + {m68k_op_move_8_al_d , 0xfff8, 0x13c0, 16}, + {m68k_op_move_8_al_ai , 0xfff8, 0x13d0, 20}, + {m68k_op_move_8_al_pi , 0xfff8, 0x13d8, 20}, + {m68k_op_move_8_al_pd , 0xfff8, 0x13e0, 22}, + {m68k_op_move_8_al_di , 0xfff8, 0x13e8, 24}, + {m68k_op_move_8_al_ix , 0xfff8, 0x13f0, 26}, + {m68k_op_move_8_pi7_d , 0xfff8, 0x1ec0, 8}, + {m68k_op_move_8_pi7_ai , 0xfff8, 0x1ed0, 12}, + {m68k_op_move_8_pi7_pi , 0xfff8, 0x1ed8, 12}, + {m68k_op_move_8_pi7_pd , 0xfff8, 0x1ee0, 14}, + {m68k_op_move_8_pi7_di , 0xfff8, 0x1ee8, 16}, + {m68k_op_move_8_pi7_ix , 0xfff8, 0x1ef0, 18}, + {m68k_op_move_8_pd7_d , 0xfff8, 0x1f00, 8}, + {m68k_op_move_8_pd7_ai , 0xfff8, 0x1f10, 12}, + {m68k_op_move_8_pd7_pi , 0xfff8, 0x1f18, 12}, + {m68k_op_move_8_pd7_pd , 0xfff8, 0x1f20, 14}, + {m68k_op_move_8_pd7_di , 0xfff8, 0x1f28, 16}, + {m68k_op_move_8_pd7_ix , 0xfff8, 0x1f30, 18}, + {m68k_op_move_32_aw_d , 0xfff8, 0x21c0, 16}, + {m68k_op_move_32_aw_a , 0xfff8, 0x21c8, 16}, + {m68k_op_move_32_aw_ai , 0xfff8, 0x21d0, 24}, + {m68k_op_move_32_aw_pi , 0xfff8, 0x21d8, 24}, + {m68k_op_move_32_aw_pd , 0xfff8, 0x21e0, 26}, + {m68k_op_move_32_aw_di , 0xfff8, 0x21e8, 28}, + {m68k_op_move_32_aw_ix , 0xfff8, 0x21f0, 30}, + {m68k_op_move_32_al_d , 0xfff8, 0x23c0, 20}, + {m68k_op_move_32_al_a , 0xfff8, 0x23c8, 20}, + {m68k_op_move_32_al_ai , 0xfff8, 0x23d0, 28}, + {m68k_op_move_32_al_pi , 0xfff8, 0x23d8, 28}, + {m68k_op_move_32_al_pd , 0xfff8, 0x23e0, 30}, + {m68k_op_move_32_al_di , 0xfff8, 0x23e8, 32}, + {m68k_op_move_32_al_ix , 0xfff8, 0x23f0, 34}, + {m68k_op_move_16_aw_d , 0xfff8, 0x31c0, 12}, + {m68k_op_move_16_aw_a , 0xfff8, 0x31c8, 12}, + {m68k_op_move_16_aw_ai , 0xfff8, 0x31d0, 16}, + {m68k_op_move_16_aw_pi , 0xfff8, 0x31d8, 16}, + {m68k_op_move_16_aw_pd , 0xfff8, 0x31e0, 18}, + {m68k_op_move_16_aw_di , 0xfff8, 0x31e8, 20}, + {m68k_op_move_16_aw_ix , 0xfff8, 0x31f0, 22}, + {m68k_op_move_16_al_d , 0xfff8, 0x33c0, 16}, + {m68k_op_move_16_al_a , 0xfff8, 0x33c8, 16}, + {m68k_op_move_16_al_ai , 0xfff8, 0x33d0, 20}, + {m68k_op_move_16_al_pi , 0xfff8, 0x33d8, 20}, + {m68k_op_move_16_al_pd , 0xfff8, 0x33e0, 22}, + {m68k_op_move_16_al_di , 0xfff8, 0x33e8, 24}, + {m68k_op_move_16_al_ix , 0xfff8, 0x33f0, 26}, + {m68k_op_negx_8_d , 0xfff8, 0x4000, 4}, + {m68k_op_negx_8_ai , 0xfff8, 0x4010, 12}, + {m68k_op_negx_8_pi , 0xfff8, 0x4018, 12}, + {m68k_op_negx_8_pd , 0xfff8, 0x4020, 14}, + {m68k_op_negx_8_di , 0xfff8, 0x4028, 16}, + {m68k_op_negx_8_ix , 0xfff8, 0x4030, 18}, + {m68k_op_negx_16_d , 0xfff8, 0x4040, 4}, + {m68k_op_negx_16_ai , 0xfff8, 0x4050, 12}, + {m68k_op_negx_16_pi , 0xfff8, 0x4058, 12}, + {m68k_op_negx_16_pd , 0xfff8, 0x4060, 14}, + {m68k_op_negx_16_di , 0xfff8, 0x4068, 16}, + {m68k_op_negx_16_ix , 0xfff8, 0x4070, 18}, + {m68k_op_negx_32_d , 0xfff8, 0x4080, 6}, + {m68k_op_negx_32_ai , 0xfff8, 0x4090, 20}, + {m68k_op_negx_32_pi , 0xfff8, 0x4098, 20}, + {m68k_op_negx_32_pd , 0xfff8, 0x40a0, 22}, + {m68k_op_negx_32_di , 0xfff8, 0x40a8, 24}, + {m68k_op_negx_32_ix , 0xfff8, 0x40b0, 26}, + {m68k_op_move_16_frs_d , 0xfff8, 0x40c0, 6}, + {m68k_op_move_16_frs_ai , 0xfff8, 0x40d0, 12}, + {m68k_op_move_16_frs_pi , 0xfff8, 0x40d8, 12}, + {m68k_op_move_16_frs_pd , 0xfff8, 0x40e0, 14}, + {m68k_op_move_16_frs_di , 0xfff8, 0x40e8, 16}, + {m68k_op_move_16_frs_ix , 0xfff8, 0x40f0, 18}, + {m68k_op_clr_8_d , 0xfff8, 0x4200, 4}, + {m68k_op_clr_8_ai , 0xfff8, 0x4210, 12}, + {m68k_op_clr_8_pi , 0xfff8, 0x4218, 12}, + {m68k_op_clr_8_pd , 0xfff8, 0x4220, 14}, + {m68k_op_clr_8_di , 0xfff8, 0x4228, 16}, + {m68k_op_clr_8_ix , 0xfff8, 0x4230, 18}, + {m68k_op_clr_16_d , 0xfff8, 0x4240, 4}, + {m68k_op_clr_16_ai , 0xfff8, 0x4250, 12}, + {m68k_op_clr_16_pi , 0xfff8, 0x4258, 12}, + {m68k_op_clr_16_pd , 0xfff8, 0x4260, 14}, + {m68k_op_clr_16_di , 0xfff8, 0x4268, 16}, + {m68k_op_clr_16_ix , 0xfff8, 0x4270, 18}, + {m68k_op_clr_32_d , 0xfff8, 0x4280, 6}, + {m68k_op_clr_32_ai , 0xfff8, 0x4290, 20}, + {m68k_op_clr_32_pi , 0xfff8, 0x4298, 20}, + {m68k_op_clr_32_pd , 0xfff8, 0x42a0, 22}, + {m68k_op_clr_32_di , 0xfff8, 0x42a8, 24}, + {m68k_op_clr_32_ix , 0xfff8, 0x42b0, 26}, + {m68k_op_neg_8_d , 0xfff8, 0x4400, 4}, + {m68k_op_neg_8_ai , 0xfff8, 0x4410, 12}, + {m68k_op_neg_8_pi , 0xfff8, 0x4418, 12}, + {m68k_op_neg_8_pd , 0xfff8, 0x4420, 14}, + {m68k_op_neg_8_di , 0xfff8, 0x4428, 16}, + {m68k_op_neg_8_ix , 0xfff8, 0x4430, 18}, + {m68k_op_neg_16_d , 0xfff8, 0x4440, 4}, + {m68k_op_neg_16_ai , 0xfff8, 0x4450, 12}, + {m68k_op_neg_16_pi , 0xfff8, 0x4458, 12}, + {m68k_op_neg_16_pd , 0xfff8, 0x4460, 14}, + {m68k_op_neg_16_di , 0xfff8, 0x4468, 16}, + {m68k_op_neg_16_ix , 0xfff8, 0x4470, 18}, + {m68k_op_neg_32_d , 0xfff8, 0x4480, 6}, + {m68k_op_neg_32_ai , 0xfff8, 0x4490, 20}, + {m68k_op_neg_32_pi , 0xfff8, 0x4498, 20}, + {m68k_op_neg_32_pd , 0xfff8, 0x44a0, 22}, + {m68k_op_neg_32_di , 0xfff8, 0x44a8, 24}, + {m68k_op_neg_32_ix , 0xfff8, 0x44b0, 26}, + {m68k_op_move_16_toc_d , 0xfff8, 0x44c0, 12}, + {m68k_op_move_16_toc_ai , 0xfff8, 0x44d0, 16}, + {m68k_op_move_16_toc_pi , 0xfff8, 0x44d8, 16}, + {m68k_op_move_16_toc_pd , 0xfff8, 0x44e0, 18}, + {m68k_op_move_16_toc_di , 0xfff8, 0x44e8, 20}, + {m68k_op_move_16_toc_ix , 0xfff8, 0x44f0, 22}, + {m68k_op_not_8_d , 0xfff8, 0x4600, 4}, + {m68k_op_not_8_ai , 0xfff8, 0x4610, 12}, + {m68k_op_not_8_pi , 0xfff8, 0x4618, 12}, + {m68k_op_not_8_pd , 0xfff8, 0x4620, 14}, + {m68k_op_not_8_di , 0xfff8, 0x4628, 16}, + {m68k_op_not_8_ix , 0xfff8, 0x4630, 18}, + {m68k_op_not_16_d , 0xfff8, 0x4640, 4}, + {m68k_op_not_16_ai , 0xfff8, 0x4650, 12}, + {m68k_op_not_16_pi , 0xfff8, 0x4658, 12}, + {m68k_op_not_16_pd , 0xfff8, 0x4660, 14}, + {m68k_op_not_16_di , 0xfff8, 0x4668, 16}, + {m68k_op_not_16_ix , 0xfff8, 0x4670, 18}, + {m68k_op_not_32_d , 0xfff8, 0x4680, 6}, + {m68k_op_not_32_ai , 0xfff8, 0x4690, 20}, + {m68k_op_not_32_pi , 0xfff8, 0x4698, 20}, + {m68k_op_not_32_pd , 0xfff8, 0x46a0, 22}, + {m68k_op_not_32_di , 0xfff8, 0x46a8, 24}, + {m68k_op_not_32_ix , 0xfff8, 0x46b0, 26}, + {m68k_op_move_16_tos_d , 0xfff8, 0x46c0, 12}, + {m68k_op_move_16_tos_ai , 0xfff8, 0x46d0, 16}, + {m68k_op_move_16_tos_pi , 0xfff8, 0x46d8, 16}, + {m68k_op_move_16_tos_pd , 0xfff8, 0x46e0, 18}, + {m68k_op_move_16_tos_di , 0xfff8, 0x46e8, 20}, + {m68k_op_move_16_tos_ix , 0xfff8, 0x46f0, 22}, + {m68k_op_nbcd_8_d , 0xfff8, 0x4800, 6}, + {m68k_op_nbcd_8_ai , 0xfff8, 0x4810, 12}, + {m68k_op_nbcd_8_pi , 0xfff8, 0x4818, 12}, + {m68k_op_nbcd_8_pd , 0xfff8, 0x4820, 14}, + {m68k_op_nbcd_8_di , 0xfff8, 0x4828, 16}, + {m68k_op_nbcd_8_ix , 0xfff8, 0x4830, 18}, + {m68k_op_swap_32 , 0xfff8, 0x4840, 4}, + {m68k_op_pea_32_ai , 0xfff8, 0x4850, 12}, + {m68k_op_pea_32_di , 0xfff8, 0x4868, 16}, + {m68k_op_pea_32_ix , 0xfff8, 0x4870, 20}, + {m68k_op_ext_16 , 0xfff8, 0x4880, 4}, + {m68k_op_movem_16_re_ai , 0xfff8, 0x4890, 8}, + {m68k_op_movem_16_re_pd , 0xfff8, 0x48a0, 8}, + {m68k_op_movem_16_re_di , 0xfff8, 0x48a8, 12}, + {m68k_op_movem_16_re_ix , 0xfff8, 0x48b0, 14}, + {m68k_op_ext_32 , 0xfff8, 0x48c0, 4}, + {m68k_op_movem_32_re_ai , 0xfff8, 0x48d0, 8}, + {m68k_op_movem_32_re_pd , 0xfff8, 0x48e0, 8}, + {m68k_op_movem_32_re_di , 0xfff8, 0x48e8, 12}, + {m68k_op_movem_32_re_ix , 0xfff8, 0x48f0, 14}, + {m68k_op_tst_8_d , 0xfff8, 0x4a00, 4}, + {m68k_op_tst_8_ai , 0xfff8, 0x4a10, 8}, + {m68k_op_tst_8_pi , 0xfff8, 0x4a18, 8}, + {m68k_op_tst_8_pd , 0xfff8, 0x4a20, 10}, + {m68k_op_tst_8_di , 0xfff8, 0x4a28, 12}, + {m68k_op_tst_8_ix , 0xfff8, 0x4a30, 14}, + {m68k_op_tst_16_d , 0xfff8, 0x4a40, 4}, + {m68k_op_tst_16_ai , 0xfff8, 0x4a50, 8}, + {m68k_op_tst_16_pi , 0xfff8, 0x4a58, 8}, + {m68k_op_tst_16_pd , 0xfff8, 0x4a60, 10}, + {m68k_op_tst_16_di , 0xfff8, 0x4a68, 12}, + {m68k_op_tst_16_ix , 0xfff8, 0x4a70, 14}, + {m68k_op_tst_32_d , 0xfff8, 0x4a80, 4}, + {m68k_op_tst_32_ai , 0xfff8, 0x4a90, 12}, + {m68k_op_tst_32_pi , 0xfff8, 0x4a98, 12}, + {m68k_op_tst_32_pd , 0xfff8, 0x4aa0, 14}, + {m68k_op_tst_32_di , 0xfff8, 0x4aa8, 16}, + {m68k_op_tst_32_ix , 0xfff8, 0x4ab0, 18}, + {m68k_op_tas_8_d , 0xfff8, 0x4ac0, 4}, + {m68k_op_tas_8_ai , 0xfff8, 0x4ad0, 18}, + {m68k_op_tas_8_pi , 0xfff8, 0x4ad8, 18}, + {m68k_op_tas_8_pd , 0xfff8, 0x4ae0, 20}, + {m68k_op_tas_8_di , 0xfff8, 0x4ae8, 22}, + {m68k_op_tas_8_ix , 0xfff8, 0x4af0, 24}, + {m68k_op_movem_16_er_ai , 0xfff8, 0x4c90, 12}, + {m68k_op_movem_16_er_pi , 0xfff8, 0x4c98, 12}, + {m68k_op_movem_16_er_di , 0xfff8, 0x4ca8, 16}, + {m68k_op_movem_16_er_ix , 0xfff8, 0x4cb0, 18}, + {m68k_op_movem_32_er_ai , 0xfff8, 0x4cd0, 12}, + {m68k_op_movem_32_er_pi , 0xfff8, 0x4cd8, 12}, + {m68k_op_movem_32_er_di , 0xfff8, 0x4ce8, 16}, + {m68k_op_movem_32_er_ix , 0xfff8, 0x4cf0, 18}, + {m68k_op_link_16 , 0xfff8, 0x4e50, 16}, + {m68k_op_unlk_32 , 0xfff8, 0x4e58, 12}, + {m68k_op_move_32_tou , 0xfff8, 0x4e60, 4}, + {m68k_op_move_32_fru , 0xfff8, 0x4e68, 4}, + {m68k_op_jsr_32_ai , 0xfff8, 0x4e90, 16}, + {m68k_op_jsr_32_di , 0xfff8, 0x4ea8, 18}, + {m68k_op_jsr_32_ix , 0xfff8, 0x4eb0, 22}, + {m68k_op_jmp_32_ai , 0xfff8, 0x4ed0, 8}, + {m68k_op_jmp_32_di , 0xfff8, 0x4ee8, 10}, + {m68k_op_jmp_32_ix , 0xfff8, 0x4ef0, 14}, + {m68k_op_st_8_d , 0xfff8, 0x50c0, 6}, + {m68k_op_dbt_16 , 0xfff8, 0x50c8, 12}, + {m68k_op_st_8_ai , 0xfff8, 0x50d0, 12}, + {m68k_op_st_8_pi , 0xfff8, 0x50d8, 12}, + {m68k_op_st_8_pd , 0xfff8, 0x50e0, 14}, + {m68k_op_st_8_di , 0xfff8, 0x50e8, 16}, + {m68k_op_st_8_ix , 0xfff8, 0x50f0, 18}, + {m68k_op_sf_8_d , 0xfff8, 0x51c0, 4}, + {m68k_op_dbf_16 , 0xfff8, 0x51c8, 12}, + {m68k_op_sf_8_ai , 0xfff8, 0x51d0, 12}, + {m68k_op_sf_8_pi , 0xfff8, 0x51d8, 12}, + {m68k_op_sf_8_pd , 0xfff8, 0x51e0, 14}, + {m68k_op_sf_8_di , 0xfff8, 0x51e8, 16}, + {m68k_op_sf_8_ix , 0xfff8, 0x51f0, 18}, + {m68k_op_shi_8_d , 0xfff8, 0x52c0, 4}, + {m68k_op_dbhi_16 , 0xfff8, 0x52c8, 12}, + {m68k_op_shi_8_ai , 0xfff8, 0x52d0, 12}, + {m68k_op_shi_8_pi , 0xfff8, 0x52d8, 12}, + {m68k_op_shi_8_pd , 0xfff8, 0x52e0, 14}, + {m68k_op_shi_8_di , 0xfff8, 0x52e8, 16}, + {m68k_op_shi_8_ix , 0xfff8, 0x52f0, 18}, + {m68k_op_sls_8_d , 0xfff8, 0x53c0, 4}, + {m68k_op_dbls_16 , 0xfff8, 0x53c8, 12}, + {m68k_op_sls_8_ai , 0xfff8, 0x53d0, 12}, + {m68k_op_sls_8_pi , 0xfff8, 0x53d8, 12}, + {m68k_op_sls_8_pd , 0xfff8, 0x53e0, 14}, + {m68k_op_sls_8_di , 0xfff8, 0x53e8, 16}, + {m68k_op_sls_8_ix , 0xfff8, 0x53f0, 18}, + {m68k_op_scc_8_d , 0xfff8, 0x54c0, 4}, + {m68k_op_dbcc_16 , 0xfff8, 0x54c8, 12}, + {m68k_op_scc_8_ai , 0xfff8, 0x54d0, 12}, + {m68k_op_scc_8_pi , 0xfff8, 0x54d8, 12}, + {m68k_op_scc_8_pd , 0xfff8, 0x54e0, 14}, + {m68k_op_scc_8_di , 0xfff8, 0x54e8, 16}, + {m68k_op_scc_8_ix , 0xfff8, 0x54f0, 18}, + {m68k_op_scs_8_d , 0xfff8, 0x55c0, 4}, + {m68k_op_dbcs_16 , 0xfff8, 0x55c8, 12}, + {m68k_op_scs_8_ai , 0xfff8, 0x55d0, 12}, + {m68k_op_scs_8_pi , 0xfff8, 0x55d8, 12}, + {m68k_op_scs_8_pd , 0xfff8, 0x55e0, 14}, + {m68k_op_scs_8_di , 0xfff8, 0x55e8, 16}, + {m68k_op_scs_8_ix , 0xfff8, 0x55f0, 18}, + {m68k_op_sne_8_d , 0xfff8, 0x56c0, 4}, + {m68k_op_dbne_16 , 0xfff8, 0x56c8, 12}, + {m68k_op_sne_8_ai , 0xfff8, 0x56d0, 12}, + {m68k_op_sne_8_pi , 0xfff8, 0x56d8, 12}, + {m68k_op_sne_8_pd , 0xfff8, 0x56e0, 14}, + {m68k_op_sne_8_di , 0xfff8, 0x56e8, 16}, + {m68k_op_sne_8_ix , 0xfff8, 0x56f0, 18}, + {m68k_op_seq_8_d , 0xfff8, 0x57c0, 4}, + {m68k_op_dbeq_16 , 0xfff8, 0x57c8, 12}, + {m68k_op_seq_8_ai , 0xfff8, 0x57d0, 12}, + {m68k_op_seq_8_pi , 0xfff8, 0x57d8, 12}, + {m68k_op_seq_8_pd , 0xfff8, 0x57e0, 14}, + {m68k_op_seq_8_di , 0xfff8, 0x57e8, 16}, + {m68k_op_seq_8_ix , 0xfff8, 0x57f0, 18}, + {m68k_op_svc_8_d , 0xfff8, 0x58c0, 4}, + {m68k_op_dbvc_16 , 0xfff8, 0x58c8, 12}, + {m68k_op_svc_8_ai , 0xfff8, 0x58d0, 12}, + {m68k_op_svc_8_pi , 0xfff8, 0x58d8, 12}, + {m68k_op_svc_8_pd , 0xfff8, 0x58e0, 14}, + {m68k_op_svc_8_di , 0xfff8, 0x58e8, 16}, + {m68k_op_svc_8_ix , 0xfff8, 0x58f0, 18}, + {m68k_op_svs_8_d , 0xfff8, 0x59c0, 4}, + {m68k_op_dbvs_16 , 0xfff8, 0x59c8, 12}, + {m68k_op_svs_8_ai , 0xfff8, 0x59d0, 12}, + {m68k_op_svs_8_pi , 0xfff8, 0x59d8, 12}, + {m68k_op_svs_8_pd , 0xfff8, 0x59e0, 14}, + {m68k_op_svs_8_di , 0xfff8, 0x59e8, 16}, + {m68k_op_svs_8_ix , 0xfff8, 0x59f0, 18}, + {m68k_op_spl_8_d , 0xfff8, 0x5ac0, 4}, + {m68k_op_dbpl_16 , 0xfff8, 0x5ac8, 12}, + {m68k_op_spl_8_ai , 0xfff8, 0x5ad0, 12}, + {m68k_op_spl_8_pi , 0xfff8, 0x5ad8, 12}, + {m68k_op_spl_8_pd , 0xfff8, 0x5ae0, 14}, + {m68k_op_spl_8_di , 0xfff8, 0x5ae8, 16}, + {m68k_op_spl_8_ix , 0xfff8, 0x5af0, 18}, + {m68k_op_smi_8_d , 0xfff8, 0x5bc0, 4}, + {m68k_op_dbmi_16 , 0xfff8, 0x5bc8, 12}, + {m68k_op_smi_8_ai , 0xfff8, 0x5bd0, 12}, + {m68k_op_smi_8_pi , 0xfff8, 0x5bd8, 12}, + {m68k_op_smi_8_pd , 0xfff8, 0x5be0, 14}, + {m68k_op_smi_8_di , 0xfff8, 0x5be8, 16}, + {m68k_op_smi_8_ix , 0xfff8, 0x5bf0, 18}, + {m68k_op_sge_8_d , 0xfff8, 0x5cc0, 4}, + {m68k_op_dbge_16 , 0xfff8, 0x5cc8, 12}, + {m68k_op_sge_8_ai , 0xfff8, 0x5cd0, 12}, + {m68k_op_sge_8_pi , 0xfff8, 0x5cd8, 12}, + {m68k_op_sge_8_pd , 0xfff8, 0x5ce0, 14}, + {m68k_op_sge_8_di , 0xfff8, 0x5ce8, 16}, + {m68k_op_sge_8_ix , 0xfff8, 0x5cf0, 18}, + {m68k_op_slt_8_d , 0xfff8, 0x5dc0, 4}, + {m68k_op_dblt_16 , 0xfff8, 0x5dc8, 12}, + {m68k_op_slt_8_ai , 0xfff8, 0x5dd0, 12}, + {m68k_op_slt_8_pi , 0xfff8, 0x5dd8, 12}, + {m68k_op_slt_8_pd , 0xfff8, 0x5de0, 14}, + {m68k_op_slt_8_di , 0xfff8, 0x5de8, 16}, + {m68k_op_slt_8_ix , 0xfff8, 0x5df0, 18}, + {m68k_op_sgt_8_d , 0xfff8, 0x5ec0, 4}, + {m68k_op_dbgt_16 , 0xfff8, 0x5ec8, 12}, + {m68k_op_sgt_8_ai , 0xfff8, 0x5ed0, 12}, + {m68k_op_sgt_8_pi , 0xfff8, 0x5ed8, 12}, + {m68k_op_sgt_8_pd , 0xfff8, 0x5ee0, 14}, + {m68k_op_sgt_8_di , 0xfff8, 0x5ee8, 16}, + {m68k_op_sgt_8_ix , 0xfff8, 0x5ef0, 18}, + {m68k_op_sle_8_d , 0xfff8, 0x5fc0, 4}, + {m68k_op_dble_16 , 0xfff8, 0x5fc8, 12}, + {m68k_op_sle_8_ai , 0xfff8, 0x5fd0, 12}, + {m68k_op_sle_8_pi , 0xfff8, 0x5fd8, 12}, + {m68k_op_sle_8_pd , 0xfff8, 0x5fe0, 14}, + {m68k_op_sle_8_di , 0xfff8, 0x5fe8, 16}, + {m68k_op_sle_8_ix , 0xfff8, 0x5ff0, 18}, + {m68k_op_sbcd_8_mm_ax7 , 0xfff8, 0x8f08, 18}, + {m68k_op_subx_8_mm_ax7 , 0xfff8, 0x9f08, 18}, + {m68k_op_cmpm_8_ax7 , 0xfff8, 0xbf08, 12}, + {m68k_op_abcd_8_mm_ax7 , 0xfff8, 0xcf08, 18}, + {m68k_op_addx_8_mm_ax7 , 0xfff8, 0xdf08, 18}, + {m68k_op_asr_16_ai , 0xfff8, 0xe0d0, 12}, + {m68k_op_asr_16_pi , 0xfff8, 0xe0d8, 12}, + {m68k_op_asr_16_pd , 0xfff8, 0xe0e0, 14}, + {m68k_op_asr_16_di , 0xfff8, 0xe0e8, 16}, + {m68k_op_asr_16_ix , 0xfff8, 0xe0f0, 18}, + {m68k_op_asl_16_ai , 0xfff8, 0xe1d0, 12}, + {m68k_op_asl_16_pi , 0xfff8, 0xe1d8, 12}, + {m68k_op_asl_16_pd , 0xfff8, 0xe1e0, 14}, + {m68k_op_asl_16_di , 0xfff8, 0xe1e8, 16}, + {m68k_op_asl_16_ix , 0xfff8, 0xe1f0, 18}, + {m68k_op_lsr_16_ai , 0xfff8, 0xe2d0, 12}, + {m68k_op_lsr_16_pi , 0xfff8, 0xe2d8, 12}, + {m68k_op_lsr_16_pd , 0xfff8, 0xe2e0, 14}, + {m68k_op_lsr_16_di , 0xfff8, 0xe2e8, 16}, + {m68k_op_lsr_16_ix , 0xfff8, 0xe2f0, 18}, + {m68k_op_lsl_16_ai , 0xfff8, 0xe3d0, 12}, + {m68k_op_lsl_16_pi , 0xfff8, 0xe3d8, 12}, + {m68k_op_lsl_16_pd , 0xfff8, 0xe3e0, 14}, + {m68k_op_lsl_16_di , 0xfff8, 0xe3e8, 16}, + {m68k_op_lsl_16_ix , 0xfff8, 0xe3f0, 18}, + {m68k_op_roxr_16_ai , 0xfff8, 0xe4d0, 12}, + {m68k_op_roxr_16_pi , 0xfff8, 0xe4d8, 12}, + {m68k_op_roxr_16_pd , 0xfff8, 0xe4e0, 14}, + {m68k_op_roxr_16_di , 0xfff8, 0xe4e8, 16}, + {m68k_op_roxr_16_ix , 0xfff8, 0xe4f0, 18}, + {m68k_op_roxl_16_ai , 0xfff8, 0xe5d0, 12}, + {m68k_op_roxl_16_pi , 0xfff8, 0xe5d8, 12}, + {m68k_op_roxl_16_pd , 0xfff8, 0xe5e0, 14}, + {m68k_op_roxl_16_di , 0xfff8, 0xe5e8, 16}, + {m68k_op_roxl_16_ix , 0xfff8, 0xe5f0, 18}, + {m68k_op_ror_16_ai , 0xfff8, 0xe6d0, 12}, + {m68k_op_ror_16_pi , 0xfff8, 0xe6d8, 12}, + {m68k_op_ror_16_pd , 0xfff8, 0xe6e0, 14}, + {m68k_op_ror_16_di , 0xfff8, 0xe6e8, 16}, + {m68k_op_ror_16_ix , 0xfff8, 0xe6f0, 18}, + {m68k_op_rol_16_ai , 0xfff8, 0xe7d0, 12}, + {m68k_op_rol_16_pi , 0xfff8, 0xe7d8, 12}, + {m68k_op_rol_16_pd , 0xfff8, 0xe7e0, 14}, + {m68k_op_rol_16_di , 0xfff8, 0xe7e8, 16}, + {m68k_op_rol_16_ix , 0xfff8, 0xe7f0, 18}, + {m68k_op_ori_8_pi7 , 0xffff, 0x001f, 16}, + {m68k_op_ori_8_pd7 , 0xffff, 0x0027, 18}, + {m68k_op_ori_8_aw , 0xffff, 0x0038, 20}, + {m68k_op_ori_8_al , 0xffff, 0x0039, 24}, + {m68k_op_ori_16_toc , 0xffff, 0x003c, 20}, + {m68k_op_ori_16_aw , 0xffff, 0x0078, 20}, + {m68k_op_ori_16_al , 0xffff, 0x0079, 24}, + {m68k_op_ori_16_tos , 0xffff, 0x007c, 20}, + {m68k_op_ori_32_aw , 0xffff, 0x00b8, 32}, + {m68k_op_ori_32_al , 0xffff, 0x00b9, 36}, + {m68k_op_andi_8_pi7 , 0xffff, 0x021f, 16}, + {m68k_op_andi_8_pd7 , 0xffff, 0x0227, 18}, + {m68k_op_andi_8_aw , 0xffff, 0x0238, 20}, + {m68k_op_andi_8_al , 0xffff, 0x0239, 24}, + {m68k_op_andi_16_toc , 0xffff, 0x023c, 20}, + {m68k_op_andi_16_aw , 0xffff, 0x0278, 20}, + {m68k_op_andi_16_al , 0xffff, 0x0279, 24}, + {m68k_op_andi_16_tos , 0xffff, 0x027c, 20}, + {m68k_op_andi_32_aw , 0xffff, 0x02b8, 32}, + {m68k_op_andi_32_al , 0xffff, 0x02b9, 36}, + {m68k_op_subi_8_pi7 , 0xffff, 0x041f, 16}, + {m68k_op_subi_8_pd7 , 0xffff, 0x0427, 18}, + {m68k_op_subi_8_aw , 0xffff, 0x0438, 20}, + {m68k_op_subi_8_al , 0xffff, 0x0439, 24}, + {m68k_op_subi_16_aw , 0xffff, 0x0478, 20}, + {m68k_op_subi_16_al , 0xffff, 0x0479, 24}, + {m68k_op_subi_32_aw , 0xffff, 0x04b8, 32}, + {m68k_op_subi_32_al , 0xffff, 0x04b9, 36}, + {m68k_op_addi_8_pi7 , 0xffff, 0x061f, 16}, + {m68k_op_addi_8_pd7 , 0xffff, 0x0627, 18}, + {m68k_op_addi_8_aw , 0xffff, 0x0638, 20}, + {m68k_op_addi_8_al , 0xffff, 0x0639, 24}, + {m68k_op_addi_16_aw , 0xffff, 0x0678, 20}, + {m68k_op_addi_16_al , 0xffff, 0x0679, 24}, + {m68k_op_addi_32_aw , 0xffff, 0x06b8, 32}, + {m68k_op_addi_32_al , 0xffff, 0x06b9, 36}, + {m68k_op_btst_8_s_pi7 , 0xffff, 0x081f, 12}, + {m68k_op_btst_8_s_pd7 , 0xffff, 0x0827, 14}, + {m68k_op_btst_8_s_aw , 0xffff, 0x0838, 16}, + {m68k_op_btst_8_s_al , 0xffff, 0x0839, 20}, + {m68k_op_btst_8_s_pcdi , 0xffff, 0x083a, 16}, + {m68k_op_btst_8_s_pcix , 0xffff, 0x083b, 18}, + {m68k_op_bchg_8_s_pi7 , 0xffff, 0x085f, 16}, + {m68k_op_bchg_8_s_pd7 , 0xffff, 0x0867, 18}, + {m68k_op_bchg_8_s_aw , 0xffff, 0x0878, 20}, + {m68k_op_bchg_8_s_al , 0xffff, 0x0879, 24}, + {m68k_op_bclr_8_s_pi7 , 0xffff, 0x089f, 16}, + {m68k_op_bclr_8_s_pd7 , 0xffff, 0x08a7, 18}, + {m68k_op_bclr_8_s_aw , 0xffff, 0x08b8, 20}, + {m68k_op_bclr_8_s_al , 0xffff, 0x08b9, 24}, + {m68k_op_bset_8_s_pi7 , 0xffff, 0x08df, 16}, + {m68k_op_bset_8_s_pd7 , 0xffff, 0x08e7, 18}, + {m68k_op_bset_8_s_aw , 0xffff, 0x08f8, 20}, + {m68k_op_bset_8_s_al , 0xffff, 0x08f9, 24}, + {m68k_op_eori_8_pi7 , 0xffff, 0x0a1f, 16}, + {m68k_op_eori_8_pd7 , 0xffff, 0x0a27, 18}, + {m68k_op_eori_8_aw , 0xffff, 0x0a38, 20}, + {m68k_op_eori_8_al , 0xffff, 0x0a39, 24}, + {m68k_op_eori_16_toc , 0xffff, 0x0a3c, 20}, + {m68k_op_eori_16_aw , 0xffff, 0x0a78, 20}, + {m68k_op_eori_16_al , 0xffff, 0x0a79, 24}, + {m68k_op_eori_16_tos , 0xffff, 0x0a7c, 20}, + {m68k_op_eori_32_aw , 0xffff, 0x0ab8, 32}, + {m68k_op_eori_32_al , 0xffff, 0x0ab9, 36}, + {m68k_op_cmpi_8_pi7 , 0xffff, 0x0c1f, 12}, + {m68k_op_cmpi_8_pd7 , 0xffff, 0x0c27, 14}, + {m68k_op_cmpi_8_aw , 0xffff, 0x0c38, 16}, + {m68k_op_cmpi_8_al , 0xffff, 0x0c39, 20}, + {m68k_op_cmpi_16_aw , 0xffff, 0x0c78, 16}, + {m68k_op_cmpi_16_al , 0xffff, 0x0c79, 20}, + {m68k_op_cmpi_32_aw , 0xffff, 0x0cb8, 24}, + {m68k_op_cmpi_32_al , 0xffff, 0x0cb9, 28}, + {m68k_op_move_8_aw_pi7 , 0xffff, 0x11df, 16}, + {m68k_op_move_8_aw_pd7 , 0xffff, 0x11e7, 18}, + {m68k_op_move_8_aw_aw , 0xffff, 0x11f8, 20}, + {m68k_op_move_8_aw_al , 0xffff, 0x11f9, 24}, + {m68k_op_move_8_aw_pcdi , 0xffff, 0x11fa, 20}, + {m68k_op_move_8_aw_pcix , 0xffff, 0x11fb, 22}, + {m68k_op_move_8_aw_i , 0xffff, 0x11fc, 16}, + {m68k_op_move_8_al_pi7 , 0xffff, 0x13df, 20}, + {m68k_op_move_8_al_pd7 , 0xffff, 0x13e7, 22}, + {m68k_op_move_8_al_aw , 0xffff, 0x13f8, 24}, + {m68k_op_move_8_al_al , 0xffff, 0x13f9, 28}, + {m68k_op_move_8_al_pcdi , 0xffff, 0x13fa, 24}, + {m68k_op_move_8_al_pcix , 0xffff, 0x13fb, 26}, + {m68k_op_move_8_al_i , 0xffff, 0x13fc, 20}, + {m68k_op_move_8_pi7_pi7 , 0xffff, 0x1edf, 12}, + {m68k_op_move_8_pi7_pd7 , 0xffff, 0x1ee7, 14}, + {m68k_op_move_8_pi7_aw , 0xffff, 0x1ef8, 16}, + {m68k_op_move_8_pi7_al , 0xffff, 0x1ef9, 20}, + {m68k_op_move_8_pi7_pcdi , 0xffff, 0x1efa, 16}, + {m68k_op_move_8_pi7_pcix , 0xffff, 0x1efb, 18}, + {m68k_op_move_8_pi7_i , 0xffff, 0x1efc, 12}, + {m68k_op_move_8_pd7_pi7 , 0xffff, 0x1f1f, 12}, + {m68k_op_move_8_pd7_pd7 , 0xffff, 0x1f27, 14}, + {m68k_op_move_8_pd7_aw , 0xffff, 0x1f38, 16}, + {m68k_op_move_8_pd7_al , 0xffff, 0x1f39, 20}, + {m68k_op_move_8_pd7_pcdi , 0xffff, 0x1f3a, 16}, + {m68k_op_move_8_pd7_pcix , 0xffff, 0x1f3b, 18}, + {m68k_op_move_8_pd7_i , 0xffff, 0x1f3c, 12}, + {m68k_op_move_32_aw_aw , 0xffff, 0x21f8, 28}, + {m68k_op_move_32_aw_al , 0xffff, 0x21f9, 32}, + {m68k_op_move_32_aw_pcdi , 0xffff, 0x21fa, 28}, + {m68k_op_move_32_aw_pcix , 0xffff, 0x21fb, 30}, + {m68k_op_move_32_aw_i , 0xffff, 0x21fc, 24}, + {m68k_op_move_32_al_aw , 0xffff, 0x23f8, 32}, + {m68k_op_move_32_al_al , 0xffff, 0x23f9, 36}, + {m68k_op_move_32_al_pcdi , 0xffff, 0x23fa, 32}, + {m68k_op_move_32_al_pcix , 0xffff, 0x23fb, 34}, + {m68k_op_move_32_al_i , 0xffff, 0x23fc, 28}, + {m68k_op_move_16_aw_aw , 0xffff, 0x31f8, 20}, + {m68k_op_move_16_aw_al , 0xffff, 0x31f9, 24}, + {m68k_op_move_16_aw_pcdi , 0xffff, 0x31fa, 20}, + {m68k_op_move_16_aw_pcix , 0xffff, 0x31fb, 22}, + {m68k_op_move_16_aw_i , 0xffff, 0x31fc, 16}, + {m68k_op_move_16_al_aw , 0xffff, 0x33f8, 24}, + {m68k_op_move_16_al_al , 0xffff, 0x33f9, 28}, + {m68k_op_move_16_al_pcdi , 0xffff, 0x33fa, 24}, + {m68k_op_move_16_al_pcix , 0xffff, 0x33fb, 26}, + {m68k_op_move_16_al_i , 0xffff, 0x33fc, 20}, + {m68k_op_negx_8_pi7 , 0xffff, 0x401f, 12}, + {m68k_op_negx_8_pd7 , 0xffff, 0x4027, 14}, + {m68k_op_negx_8_aw , 0xffff, 0x4038, 16}, + {m68k_op_negx_8_al , 0xffff, 0x4039, 20}, + {m68k_op_negx_16_aw , 0xffff, 0x4078, 16}, + {m68k_op_negx_16_al , 0xffff, 0x4079, 20}, + {m68k_op_negx_32_aw , 0xffff, 0x40b8, 24}, + {m68k_op_negx_32_al , 0xffff, 0x40b9, 28}, + {m68k_op_move_16_frs_aw , 0xffff, 0x40f8, 16}, + {m68k_op_move_16_frs_al , 0xffff, 0x40f9, 20}, + {m68k_op_clr_8_pi7 , 0xffff, 0x421f, 12}, + {m68k_op_clr_8_pd7 , 0xffff, 0x4227, 14}, + {m68k_op_clr_8_aw , 0xffff, 0x4238, 16}, + {m68k_op_clr_8_al , 0xffff, 0x4239, 20}, + {m68k_op_clr_16_aw , 0xffff, 0x4278, 16}, + {m68k_op_clr_16_al , 0xffff, 0x4279, 20}, + {m68k_op_clr_32_aw , 0xffff, 0x42b8, 24}, + {m68k_op_clr_32_al , 0xffff, 0x42b9, 28}, + {m68k_op_neg_8_pi7 , 0xffff, 0x441f, 12}, + {m68k_op_neg_8_pd7 , 0xffff, 0x4427, 14}, + {m68k_op_neg_8_aw , 0xffff, 0x4438, 16}, + {m68k_op_neg_8_al , 0xffff, 0x4439, 20}, + {m68k_op_neg_16_aw , 0xffff, 0x4478, 16}, + {m68k_op_neg_16_al , 0xffff, 0x4479, 20}, + {m68k_op_neg_32_aw , 0xffff, 0x44b8, 24}, + {m68k_op_neg_32_al , 0xffff, 0x44b9, 28}, + {m68k_op_move_16_toc_aw , 0xffff, 0x44f8, 20}, + {m68k_op_move_16_toc_al , 0xffff, 0x44f9, 24}, + {m68k_op_move_16_toc_pcdi , 0xffff, 0x44fa, 20}, + {m68k_op_move_16_toc_pcix , 0xffff, 0x44fb, 22}, + {m68k_op_move_16_toc_i , 0xffff, 0x44fc, 16}, + {m68k_op_not_8_pi7 , 0xffff, 0x461f, 12}, + {m68k_op_not_8_pd7 , 0xffff, 0x4627, 14}, + {m68k_op_not_8_aw , 0xffff, 0x4638, 16}, + {m68k_op_not_8_al , 0xffff, 0x4639, 20}, + {m68k_op_not_16_aw , 0xffff, 0x4678, 16}, + {m68k_op_not_16_al , 0xffff, 0x4679, 20}, + {m68k_op_not_32_aw , 0xffff, 0x46b8, 24}, + {m68k_op_not_32_al , 0xffff, 0x46b9, 28}, + {m68k_op_move_16_tos_aw , 0xffff, 0x46f8, 20}, + {m68k_op_move_16_tos_al , 0xffff, 0x46f9, 24}, + {m68k_op_move_16_tos_pcdi , 0xffff, 0x46fa, 20}, + {m68k_op_move_16_tos_pcix , 0xffff, 0x46fb, 22}, + {m68k_op_move_16_tos_i , 0xffff, 0x46fc, 16}, + {m68k_op_nbcd_8_pi7 , 0xffff, 0x481f, 12}, + {m68k_op_nbcd_8_pd7 , 0xffff, 0x4827, 14}, + {m68k_op_nbcd_8_aw , 0xffff, 0x4838, 16}, + {m68k_op_nbcd_8_al , 0xffff, 0x4839, 20}, + {m68k_op_pea_32_aw , 0xffff, 0x4878, 16}, + {m68k_op_pea_32_al , 0xffff, 0x4879, 20}, + {m68k_op_pea_32_pcdi , 0xffff, 0x487a, 16}, + {m68k_op_pea_32_pcix , 0xffff, 0x487b, 20}, + {m68k_op_movem_16_re_aw , 0xffff, 0x48b8, 12}, + {m68k_op_movem_16_re_al , 0xffff, 0x48b9, 16}, + {m68k_op_movem_32_re_aw , 0xffff, 0x48f8, 12}, + {m68k_op_movem_32_re_al , 0xffff, 0x48f9, 16}, + {m68k_op_tst_8_pi7 , 0xffff, 0x4a1f, 8}, + {m68k_op_tst_8_pd7 , 0xffff, 0x4a27, 10}, + {m68k_op_tst_8_aw , 0xffff, 0x4a38, 12}, + {m68k_op_tst_8_al , 0xffff, 0x4a39, 16}, + {m68k_op_tst_16_aw , 0xffff, 0x4a78, 12}, + {m68k_op_tst_16_al , 0xffff, 0x4a79, 16}, + {m68k_op_tst_32_aw , 0xffff, 0x4ab8, 16}, + {m68k_op_tst_32_al , 0xffff, 0x4ab9, 20}, + {m68k_op_tas_8_pi7 , 0xffff, 0x4adf, 18}, + {m68k_op_tas_8_pd7 , 0xffff, 0x4ae7, 20}, + {m68k_op_tas_8_aw , 0xffff, 0x4af8, 22}, + {m68k_op_tas_8_al , 0xffff, 0x4af9, 26}, + {m68k_op_illegal , 0xffff, 0x4afc, 4}, + {m68k_op_movem_16_er_aw , 0xffff, 0x4cb8, 16}, + {m68k_op_movem_16_er_al , 0xffff, 0x4cb9, 20}, + {m68k_op_movem_16_er_pcdi , 0xffff, 0x4cba, 16}, + {m68k_op_movem_16_er_pcix , 0xffff, 0x4cbb, 18}, + {m68k_op_movem_32_er_aw , 0xffff, 0x4cf8, 16}, + {m68k_op_movem_32_er_al , 0xffff, 0x4cf9, 20}, + {m68k_op_movem_32_er_pcdi , 0xffff, 0x4cfa, 16}, + {m68k_op_movem_32_er_pcix , 0xffff, 0x4cfb, 18}, + {m68k_op_link_16_a7 , 0xffff, 0x4e57, 16}, + {m68k_op_unlk_32_a7 , 0xffff, 0x4e5f, 12}, + {m68k_op_reset , 0xffff, 0x4e70, 0}, + {m68k_op_nop , 0xffff, 0x4e71, 4}, + {m68k_op_stop , 0xffff, 0x4e72, 4}, + {m68k_op_rte_32 , 0xffff, 0x4e73, 20}, + {m68k_op_rts_32 , 0xffff, 0x4e75, 16}, + {m68k_op_trapv , 0xffff, 0x4e76, 4}, + {m68k_op_rtr_32 , 0xffff, 0x4e77, 20}, + {m68k_op_jsr_32_aw , 0xffff, 0x4eb8, 18}, + {m68k_op_jsr_32_al , 0xffff, 0x4eb9, 20}, + {m68k_op_jsr_32_pcdi , 0xffff, 0x4eba, 18}, + {m68k_op_jsr_32_pcix , 0xffff, 0x4ebb, 22}, + {m68k_op_jmp_32_aw , 0xffff, 0x4ef8, 10}, + {m68k_op_jmp_32_al , 0xffff, 0x4ef9, 12}, + {m68k_op_jmp_32_pcdi , 0xffff, 0x4efa, 10}, + {m68k_op_jmp_32_pcix , 0xffff, 0x4efb, 14}, + {m68k_op_st_8_pi7 , 0xffff, 0x50df, 12}, + {m68k_op_st_8_pd7 , 0xffff, 0x50e7, 14}, + {m68k_op_st_8_aw , 0xffff, 0x50f8, 16}, + {m68k_op_st_8_al , 0xffff, 0x50f9, 20}, + {m68k_op_sf_8_pi7 , 0xffff, 0x51df, 12}, + {m68k_op_sf_8_pd7 , 0xffff, 0x51e7, 14}, + {m68k_op_sf_8_aw , 0xffff, 0x51f8, 16}, + {m68k_op_sf_8_al , 0xffff, 0x51f9, 20}, + {m68k_op_shi_8_pi7 , 0xffff, 0x52df, 12}, + {m68k_op_shi_8_pd7 , 0xffff, 0x52e7, 14}, + {m68k_op_shi_8_aw , 0xffff, 0x52f8, 16}, + {m68k_op_shi_8_al , 0xffff, 0x52f9, 20}, + {m68k_op_sls_8_pi7 , 0xffff, 0x53df, 12}, + {m68k_op_sls_8_pd7 , 0xffff, 0x53e7, 14}, + {m68k_op_sls_8_aw , 0xffff, 0x53f8, 16}, + {m68k_op_sls_8_al , 0xffff, 0x53f9, 20}, + {m68k_op_scc_8_pi7 , 0xffff, 0x54df, 12}, + {m68k_op_scc_8_pd7 , 0xffff, 0x54e7, 14}, + {m68k_op_scc_8_aw , 0xffff, 0x54f8, 16}, + {m68k_op_scc_8_al , 0xffff, 0x54f9, 20}, + {m68k_op_scs_8_pi7 , 0xffff, 0x55df, 12}, + {m68k_op_scs_8_pd7 , 0xffff, 0x55e7, 14}, + {m68k_op_scs_8_aw , 0xffff, 0x55f8, 16}, + {m68k_op_scs_8_al , 0xffff, 0x55f9, 20}, + {m68k_op_sne_8_pi7 , 0xffff, 0x56df, 12}, + {m68k_op_sne_8_pd7 , 0xffff, 0x56e7, 14}, + {m68k_op_sne_8_aw , 0xffff, 0x56f8, 16}, + {m68k_op_sne_8_al , 0xffff, 0x56f9, 20}, + {m68k_op_seq_8_pi7 , 0xffff, 0x57df, 12}, + {m68k_op_seq_8_pd7 , 0xffff, 0x57e7, 14}, + {m68k_op_seq_8_aw , 0xffff, 0x57f8, 16}, + {m68k_op_seq_8_al , 0xffff, 0x57f9, 20}, + {m68k_op_svc_8_pi7 , 0xffff, 0x58df, 12}, + {m68k_op_svc_8_pd7 , 0xffff, 0x58e7, 14}, + {m68k_op_svc_8_aw , 0xffff, 0x58f8, 16}, + {m68k_op_svc_8_al , 0xffff, 0x58f9, 20}, + {m68k_op_svs_8_pi7 , 0xffff, 0x59df, 12}, + {m68k_op_svs_8_pd7 , 0xffff, 0x59e7, 14}, + {m68k_op_svs_8_aw , 0xffff, 0x59f8, 16}, + {m68k_op_svs_8_al , 0xffff, 0x59f9, 20}, + {m68k_op_spl_8_pi7 , 0xffff, 0x5adf, 12}, + {m68k_op_spl_8_pd7 , 0xffff, 0x5ae7, 14}, + {m68k_op_spl_8_aw , 0xffff, 0x5af8, 16}, + {m68k_op_spl_8_al , 0xffff, 0x5af9, 20}, + {m68k_op_smi_8_pi7 , 0xffff, 0x5bdf, 12}, + {m68k_op_smi_8_pd7 , 0xffff, 0x5be7, 14}, + {m68k_op_smi_8_aw , 0xffff, 0x5bf8, 16}, + {m68k_op_smi_8_al , 0xffff, 0x5bf9, 20}, + {m68k_op_sge_8_pi7 , 0xffff, 0x5cdf, 12}, + {m68k_op_sge_8_pd7 , 0xffff, 0x5ce7, 14}, + {m68k_op_sge_8_aw , 0xffff, 0x5cf8, 16}, + {m68k_op_sge_8_al , 0xffff, 0x5cf9, 20}, + {m68k_op_slt_8_pi7 , 0xffff, 0x5ddf, 12}, + {m68k_op_slt_8_pd7 , 0xffff, 0x5de7, 14}, + {m68k_op_slt_8_aw , 0xffff, 0x5df8, 16}, + {m68k_op_slt_8_al , 0xffff, 0x5df9, 20}, + {m68k_op_sgt_8_pi7 , 0xffff, 0x5edf, 12}, + {m68k_op_sgt_8_pd7 , 0xffff, 0x5ee7, 14}, + {m68k_op_sgt_8_aw , 0xffff, 0x5ef8, 16}, + {m68k_op_sgt_8_al , 0xffff, 0x5ef9, 20}, + {m68k_op_sle_8_pi7 , 0xffff, 0x5fdf, 12}, + {m68k_op_sle_8_pd7 , 0xffff, 0x5fe7, 14}, + {m68k_op_sle_8_aw , 0xffff, 0x5ff8, 16}, + {m68k_op_sle_8_al , 0xffff, 0x5ff9, 20}, + {m68k_op_bra_16 , 0xffff, 0x6000, 10}, + {m68k_op_bra_32 , 0xffff, 0x60ff, 10}, + {m68k_op_bsr_16 , 0xffff, 0x6100, 18}, + {m68k_op_bsr_32 , 0xffff, 0x61ff, 18}, + {m68k_op_bhi_16 , 0xffff, 0x6200, 10}, + {m68k_op_bhi_32 , 0xffff, 0x62ff, 10}, + {m68k_op_bls_16 , 0xffff, 0x6300, 10}, + {m68k_op_bls_32 , 0xffff, 0x63ff, 10}, + {m68k_op_bcc_16 , 0xffff, 0x6400, 10}, + {m68k_op_bcc_32 , 0xffff, 0x64ff, 10}, + {m68k_op_bcs_16 , 0xffff, 0x6500, 10}, + {m68k_op_bcs_32 , 0xffff, 0x65ff, 10}, + {m68k_op_bne_16 , 0xffff, 0x6600, 10}, + {m68k_op_bne_32 , 0xffff, 0x66ff, 10}, + {m68k_op_beq_16 , 0xffff, 0x6700, 10}, + {m68k_op_beq_32 , 0xffff, 0x67ff, 10}, + {m68k_op_bvc_16 , 0xffff, 0x6800, 10}, + {m68k_op_bvc_32 , 0xffff, 0x68ff, 10}, + {m68k_op_bvs_16 , 0xffff, 0x6900, 10}, + {m68k_op_bvs_32 , 0xffff, 0x69ff, 10}, + {m68k_op_bpl_16 , 0xffff, 0x6a00, 10}, + {m68k_op_bpl_32 , 0xffff, 0x6aff, 10}, + {m68k_op_bmi_16 , 0xffff, 0x6b00, 10}, + {m68k_op_bmi_32 , 0xffff, 0x6bff, 10}, + {m68k_op_bge_16 , 0xffff, 0x6c00, 10}, + {m68k_op_bge_32 , 0xffff, 0x6cff, 10}, + {m68k_op_blt_16 , 0xffff, 0x6d00, 10}, + {m68k_op_blt_32 , 0xffff, 0x6dff, 10}, + {m68k_op_bgt_16 , 0xffff, 0x6e00, 10}, + {m68k_op_bgt_32 , 0xffff, 0x6eff, 10}, + {m68k_op_ble_16 , 0xffff, 0x6f00, 10}, + {m68k_op_ble_32 , 0xffff, 0x6fff, 10}, + {m68k_op_sbcd_8_mm_axy7 , 0xffff, 0x8f0f, 18}, + {m68k_op_subx_8_mm_axy7 , 0xffff, 0x9f0f, 18}, + {m68k_op_cmpm_8_axy7 , 0xffff, 0xbf0f, 12}, + {m68k_op_abcd_8_mm_axy7 , 0xffff, 0xcf0f, 18}, + {m68k_op_addx_8_mm_axy7 , 0xffff, 0xdf0f, 18}, + {m68k_op_asr_16_aw , 0xffff, 0xe0f8, 16}, + {m68k_op_asr_16_al , 0xffff, 0xe0f9, 20}, + {m68k_op_asl_16_aw , 0xffff, 0xe1f8, 16}, + {m68k_op_asl_16_al , 0xffff, 0xe1f9, 20}, + {m68k_op_lsr_16_aw , 0xffff, 0xe2f8, 16}, + {m68k_op_lsr_16_al , 0xffff, 0xe2f9, 20}, + {m68k_op_lsl_16_aw , 0xffff, 0xe3f8, 16}, + {m68k_op_lsl_16_al , 0xffff, 0xe3f9, 20}, + {m68k_op_roxr_16_aw , 0xffff, 0xe4f8, 16}, + {m68k_op_roxr_16_al , 0xffff, 0xe4f9, 20}, + {m68k_op_roxl_16_aw , 0xffff, 0xe5f8, 16}, + {m68k_op_roxl_16_al , 0xffff, 0xe5f9, 20}, + {m68k_op_ror_16_aw , 0xffff, 0xe6f8, 16}, + {m68k_op_ror_16_al , 0xffff, 0xe6f9, 20}, + {m68k_op_rol_16_aw , 0xffff, 0xe7f8, 16}, + {m68k_op_rol_16_al , 0xffff, 0xe7f9, 20}, + {0, 0, 0, 0} +}; + + +/* Build the opcode handler jump table */ +static void m68ki_build_opcode_table(void) +{ + const opcode_handler_struct *ostruct; + int instr; + int i; + int j; + + for(i = 0; i < 0x10000; i++) + { + /* default to illegal */ + m68ki_instruction_jump_table[i] = m68k_op_illegal; + m68ki_cycles[i] = 4; + } + + ostruct = &m68k_opcode_handler_table[0]; + while(ostruct->mask != 0xff00) + { + for(i = 0;i < 0x10000;i++) + { + if((i & ostruct->mask) == ostruct->match) + { + m68ki_instruction_jump_table[i] = ostruct->opcode_handler; + m68ki_cycles[i] = ostruct->cycles * MUL; + } + } + ostruct++; + } + while(ostruct->mask == 0xff00) + { + for(i = 0;i <= 0xff;i++) + { + m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler; + m68ki_cycles[ostruct->match | i] = ostruct->cycles * MUL; + } + ostruct++; + } + while(ostruct->mask == 0xf1f8) + { + for(i = 0;i < 8;i++) + { + for(j = 0;j < 8;j++) + { + instr = ostruct->match | (i << 9) | j; + m68ki_instruction_jump_table[instr] = ostruct->opcode_handler; + m68ki_cycles[instr] = ostruct->cycles * MUL; + } + } + ostruct++; + } + while(ostruct->mask == 0xfff0) + { + for(i = 0;i <= 0x0f;i++) + { + m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler; + m68ki_cycles[ostruct->match | i] = ostruct->cycles * MUL; + } + ostruct++; + } + while(ostruct->mask == 0xf1ff) + { + for(i = 0;i <= 0x07;i++) + { + m68ki_instruction_jump_table[ostruct->match | (i << 9)] = ostruct->opcode_handler; + m68ki_cycles[ostruct->match | (i << 9)] = ostruct->cycles * MUL; + } + ostruct++; + } + while(ostruct->mask == 0xfff8) + { + for(i = 0;i <= 0x07;i++) + { + m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler; + m68ki_cycles[ostruct->match | i] = ostruct->cycles * MUL; + } + ostruct++; + } + while(ostruct->mask == 0xffff) + { + m68ki_instruction_jump_table[ostruct->match] = ostruct->opcode_handler; + m68ki_cycles[ostruct->match] = ostruct->cycles * MUL; + ostruct++; + } +} + +#endif + +/* ======================================================================== */ +/* ============================== END OF FILE ============================= */ +/* ======================================================================== */ + + diff --git a/genplus-gx/core/m68k/readme.txt b/genplus-gx/core/m68k/readme.txt new file mode 100644 index 0000000000..48e603faae --- /dev/null +++ b/genplus-gx/core/m68k/readme.txt @@ -0,0 +1,315 @@ + MUSASHI + ======= + + Version 3.3 + + A portable Motorola M680x0 processor emulation engine. + Copyright 1998-2001 Karl Stenerud. All rights reserved. + + + +INTRODUCTION: +------------ + +Musashi is a Motorola 68000, 68010, 68EC020, and 68020 emulator written in C. +This emulator was written with two goals in mind: portability and speed. + +The emulator is written to ANSI C specifications with the exception that I use +inline functions. This is not compliant to the ANSI spec, but will be +compliant to the ANSI C9X spec. + +It has been successfully running in the MAME project (www.mame.net) for over 2 +years and so has had time to mature. + + + +LICENSE AND COPYRIGHT: +--------------------- + +The Musashi M680x0 emulator is copyright 1998-2001 Karl Stenerud. + +The source code included in this archive is provided AS-IS, free for any +non-commercial purpose. + +If you build a program using this core, please give credit to the author. + +If you wish to use this core in a commercial environment, please contact +the author to discuss commercial licensing. + + + +AVAILABILITY: +------------ +The latest version of this code can be obtained at: +http://kstenerud.cjb.net + + + +CONTACTING THE AUTHOR: +--------------------- +I can be reached at kstenerud@mame.net + + + +BASIC CONFIGURATION: +------------------- +The basic configuration will give you a standard 68000 that has sufficient +functionality to work in a primitive environment. + +This setup assumes that you only have 1 device interrupting it, that the +device will always request an autovectored interrupt, and it will always clear +the interrupt before the interrupt service routine finishes (but could +possibly re-assert the interrupt). +You will have only one address space, no tracing, and no instruction prefetch. + +To implement the basic configuration: + +- Open m68kconf.h and verify that the settings for INLINE and DECL_SPEC will + work with your compiler. (They are set for gcc) + +- In your host program, implement the following functions: + unsigned int m68k_read_memory_8(unsigned int address); + unsigned int m68k_read_memory_16(unsigned int address); + unsigned int m68k_read_memory_32(unsigned int address); + void m68k_write_memory_8(unsigned int address, unsigned int value); + void m68k_write_memory_16(unsigned int address, unsigned int value); + void m68k_write_memory_32(unsigned int address, unsigned int value); + +- In your host program, be sure to call m68k_pulse_reset() once before calling + any of the other functions as this initializes the core. + +- Use m68k_execute() to execute instructions and m68k_set_irq() to cause an + interrupt. + + + +ADDING PROPER INTERRUPT HANDLING: +-------------------------------- +The interrupt handling in the basic configuration doesn't emulate the +interrupt acknowledge phase of the CPU and automatically clears an interrupt +request during interrupt processing. +While this works for most systems, you may need more accurate interrupt +handling. + +To add proper interrupt handling: + +- In m68kconf.h, set M68K_EMULATE_INT_ACK to OPT_SPECIFY_HANDLER + +- In m68kconf.h, set M68K_INT_ACK_CALLBACK(A) to your interrupt acknowledge + routine + +- Your interrupt acknowledge routine must return an interrupt vector, + M68K_INT_ACK_AUTOVECTOR, or M68K_INT_ACK_SPURIOUS. most m68k + implementations just use autovectored interrupts. + +- When the interrupting device is satisfied, you must call m68k_set_irq(0) to + remove the interrupt request. + + + +MULTIPLE INTERRUPTS: +------------------- +The above system will work if you have only one device interrupting the CPU, +but if you have more than one device, you must do a bit more. + +To add multiple interrupts: + +- You must make an interrupt arbitration device that will take the highest + priority interrupt and encode it onto the IRQ pins on the CPU. + +- The interrupt arbitration device should use m68k_set_irq() to set the + highest pending interrupt, or 0 for no interrupts pending. + + + +SEPARATE IMMEDIATE AND PC-RELATIVE READS: +---------------------------------------- +You can write faster memory access functions if you know whether you are +fetching from ROM or RAM. Immediate reads are always from the program space +(Always in ROM unless it is running self-modifying code). +This will also separate the pc-relative reads, since some systems treat +PROGRAM mode reads and DATA mode reads differently (for program encryption, +for instance). See the section below (ADDRESS SPACE) for an explanation of +PROGRAM and DATA mode. + +To enable separate reads: + +- In m68kconf.h, turn on M68K_SEPARATE_READS. + +- In your host program, implement the following functions: + unsigned int m68k_read_immediate_16(unsigned int address); + unsigned int m68k_read_immediate_32(unsigned int address); + + unsigned int m68k_read_pcrelative_8(unsigned int address); + unsigned int m68k_read_pcrelative_16(unsigned int address); + unsigned int m68k_read_pcrelative_32(unsigned int address); + +- If you need to know the current PC (for banking and such), set + M68K_MONITOR_PC to OPT_SPECIFY_HANDLER, and set M68K_SET_PC_CALLBACK(A) to + your routine. + + + +ADDRESS SPACES: +-------------- +Most systems will only implement one address space, placing ROM at the lower +addresses and RAM at the higher. However, there is the possibility that a +system will implement ROM and RAM in the same address range, but in different +address spaces, or will have different mamory types that require different +handling for the program and the data. + +The 68k accomodates this by allowing different program spaces, the most +important to us being PROGRAM and DATA space. Here is a breakdown of +how information is fetched: + +- All immediate reads are fetched from PROGRAM space. + +- All PC-relative reads are fetched from PROGRAM space. + +- The initial stack pointer and program counter are fetched from PROGRAM space. + +- All other reads (except for those from the moves instruction for 68020) + are fetched from DATA space. + +The m68k deals with this by encoding the requested address space on the +function code pins: + + FC + Address Space 210 + ------------------ --- + USER DATA 001 + USER PROGRAM 010 + SUPERVISOR DATA 101 + SUPERVISOR PROGRAM 110 + CPU SPACE 111 <-- not emulated in this core since we emulate + interrupt acknowledge in another way. + +Problems arise here if you need to emulate this distinction (if, for example, +your ROM and RAM are at the same address range, with RAM and ROM enable +wired to the function code pins). + +There are 2 ways to deal with this situation using Musashi: + +1. If you only need the distinction between PROGRAM and DATA (the most common), + you can just separate the reads (see the preceeding section). This is the + faster solution. + +2. You can emulate the function code pins entirely. + +To emulate the function code pins: + +- In m68kconf.h, set M68K_EMULATE_FC to OPT_SPECIFY_HANDLER and set + M68K_SET_FC_CALLBACK(A) to your function code handler function. + +- Your function code handler should select the proper address space for + subsequent calls to m68k_read_xx (and m68k_write_xx for 68010+). + +Note: immediate reads are always done from program space, so technically you + don't need to implement the separate immediate reads, although you could + gain more speed improvements leaving them in and doing some clever + programming. + + + +USING DIFFERENT CPU TYPES: +------------------------- +The default is to enable only the 68000 cpu type. To change this, change the +settings for M68K_EMULATE_010 etc in m68kconf.h. + +To set the CPU type you want to use: + +- Make sure it is enabled in m68kconf.h. Current switches are: + M68K_EMULATE_010 + M68K_EMULATE_EC020 + M68K_EMULATE_020 + +- In your host program, call m68k_set_cpu_type() and then call + m68k_pulse_reset(). Valid CPU types are: + M68K_CPU_TYPE_68000, + M68K_CPU_TYPE_68010, + M68K_CPU_TYPE_68EC020, + M68K_CPU_TYPE_68020 + + + +CLOCK FREQUENCY: +--------------- +In order to emulate the correct clock frequency, you will have to calculate +how long it takes the emulation to execute a certain number of "cycles" and +vary your calls to m68k_execute() accordingly. +As well, it is a good idea to take away the CPU's timeslice when it writes to +a memory-mapped port in order to give the device it wrote to a chance to +react. + +You can use the functions m68k_cycles_run(), m68k_cycles_remaining(), +m68k_modify_timeslice(), and m68k_end_timeslice() to do this. +Try to use large cycle values in your calls to m68k_execute() since it will +increase throughput. You can always take away the timeslice later. + + + +MORE CORRECT EMULATION: +---------------------- +You may need to enable these in order to properly emulate some of the more +obscure functions of the m68k: + +- M68K_EMULATE_BKPT_ACK causes the CPU to call a breakpoint handler on a BKPT + instruction + +- M68K_EMULATE_TRACE causes the CPU to generate trace exceptions when the + trace bits are set + +- M68K_EMULATE_RESET causes the CPU to call a reset handler on a RESET + instruction. + +- M68K_EMULATE_PREFETCH emulates the 4-word instruction prefetch that is part + of the 68000/68010 (needed for Amiga emulation). + +- call m68k_pulse_halt() to emulate the HALT pin. + + + +CONVENIENCE FUNCTIONS: +--------------------- +These are in here for programmer convenience: + +- M68K_INSTRUCTION_HOOK lets you call a handler before each instruction. + +- M68K_LOG_ENABLE and M68K_LOG_1010_1111 lets you log illegal and A/F-line + instructions. + + + +MULTIPLE CPU EMULATION: +---------------------- +The default is to use only one CPU. To use more than one CPU in this core, +there are some things to keep in mind: + +- To have different cpus call different functions, use OPT_ON instead of + OPT_SPECIFY_HANDLER, and use the m68k_set_xxx_callback() functions to set + your callback handlers on a per-cpu basis. + +- Be sure to call set_cpu_type() for each CPU you use. + +- Use m68k_set_context() and m68k_get_context() to switch to another CPU. + + + +LOAD AND SAVE CPU CONTEXTS FROM DISK: +------------------------------------ +You can use them68k_load_context() and m68k_save_context() functions to load +and save the CPU state to disk. + + + +GET/SET INFORMATION FROM THE CPU: +-------------------------------- +You can use m68k_get_reg() and m68k_set_reg() to gain access to the internals +of the CPU. + + + +EXAMPLE: +------- + +I have included a file example.zip that contains a full example. diff --git a/genplus-gx/core/m68k/s68kconf.h b/genplus-gx/core/m68k/s68kconf.h new file mode 100644 index 0000000000..07431fbd2f --- /dev/null +++ b/genplus-gx/core/m68k/s68kconf.h @@ -0,0 +1,93 @@ +#ifndef M68KCONF__HEADER +#define M68KCONF__HEADER + +/* ======================================================================== */ +/* ======================== SUB 68K CONFIGURATION ========================= */ +/* ======================================================================== */ + +/* Configuration switches. + * Use OPT_SPECIFY_HANDLER for configuration options that allow callbacks. + * OPT_SPECIFY_HANDLER causes the core to link directly to the function + * or macro you specify, rather than using callback functions whose pointer + * must be passed in using m68k_set_xxx_callback(). + */ +#define OPT_OFF 0 +#define OPT_ON 1 +#define OPT_SPECIFY_HANDLER 2 + +/* If ON, the CPU will call m68k_write_32_pd() when it executes move.l with a + * predecrement destination EA mode instead of m68k_write_32(). + * To simulate real 68k behavior, m68k_write_32_pd() must first write the high + * word to [address+2], and then write the low word to [address]. + */ +#define M68K_SIMULATE_PD_WRITES OPT_OFF + +/* If ON, CPU will call the interrupt acknowledge callback when it services an + * interrupt. + * If off, all interrupts will be autovectored and all interrupt requests will + * auto-clear when the interrupt is serviced. + */ +#define M68K_EMULATE_INT_ACK OPT_SPECIFY_HANDLER +#define M68K_INT_ACK_CALLBACK(A) scd_68k_irq_ack(A) + +/* If ON, CPU will call the output reset callback when it encounters a reset + * instruction. + */ +#define M68K_EMULATE_RESET OPT_OFF +#define M68K_RESET_CALLBACK() your_reset_handler_function() + +/* If ON, CPU will call the callback when it encounters a tas + * instruction. + */ +#define M68K_TAS_HAS_CALLBACK OPT_SPECIFY_HANDLER +#define M68K_TAS_CALLBACK() 1 + +/* If ON, CPU will call the set fc callback on every memory access to + * differentiate between user/supervisor, program/data access like a real + * 68000 would. This should be enabled and the callback should be set if you + * want to properly emulate the m68010 or higher. (moves uses function codes + * to read/write data from different address spaces) + */ +#define M68K_EMULATE_FC OPT_OFF +#define M68K_SET_FC_CALLBACK(A) your_set_fc_handler_function(A) + +/* If ON, the CPU will monitor the trace flags and take trace exceptions + */ +#define M68K_EMULATE_TRACE OPT_OFF + +/* If ON, the CPU will emulate the 4-byte prefetch queue of a real 68000 */ +#define M68K_EMULATE_PREFETCH OPT_OFF + +/* If ON, the CPU will generate address error exceptions if it tries to + * access a word or longword at an odd address. + * NOTE: This is only emulated properly for 68000 mode. + */ +#define M68K_EMULATE_ADDRESS_ERROR OPT_OFF + +/* If ON and previous option is also ON, address error exceptions will + also be checked when fetching instructions. Disabling this can help + speeding up emulation while still emulating address error exceptions + on other memory access if needed. + * NOTE: This is only emulated properly for 68000 mode. + */ +#define M68K_CHECK_PC_ADDRESS_ERROR OPT_OFF + + +/* ----------------------------- COMPATIBILITY ---------------------------- */ + +/* The following options set optimizations that violate the current ANSI + * standard, but will be compliant under the forthcoming C9X standard. + */ + + +/* If ON, the enulation core will use 64-bit integers to speed up some + * operations. +*/ +#define M68K_USE_64_BIT OPT_OFF + + +/* ======================================================================== */ +/* ============================== END OF FILE ============================= */ +/* ======================================================================== */ + +#endif /* M68KCONF__HEADER */ diff --git a/genplus-gx/core/m68k/s68kcpu.c b/genplus-gx/core/m68k/s68kcpu.c new file mode 100644 index 0000000000..452d48b2df --- /dev/null +++ b/genplus-gx/core/m68k/s68kcpu.c @@ -0,0 +1,349 @@ +/* ======================================================================== */ +/* SUB 68K CORE */ +/* ======================================================================== */ + +extern int scd_68k_irq_ack(int level); + +#define m68ki_cpu s68k +#define MUL (4) + +/* ======================================================================== */ +/* ================================ INCLUDES ============================== */ +/* ======================================================================== */ + +#ifndef BUILD_TABLES +#include "s68ki_cycles.h" +#endif + +#include "s68kconf.h" +#include "m68kcpu.h" +#include "m68kops.h" + +/* ======================================================================== */ +/* ================================= DATA ================================= */ +/* ======================================================================== */ + +#ifdef BUILD_TABLES +static unsigned char s68ki_cycles[0x10000]; +#endif +static int irq_latency; + +/* IRQ priority */ +static const uint8 irq_level[0x40] = +{ + 0, 1, 2, 2, 3, 3, 3, 3, + 4, 4, 4, 4, 4, 4, 4, 4, + 5, 5, 5, 5, 5, 5, 5, 5, + 5, 5, 5, 5, 5, 5, 5, 5, + 6, 6, 6, 6, 6, 6, 6, 6, + 6, 6, 6, 6, 6, 6, 6, 6, + 6, 6, 6, 6, 6, 6, 6, 6, + 6, 6, 6, 6, 6, 6, 6, 6 +}; + +m68ki_cpu_core s68k; + + +/* ======================================================================== */ +/* =============================== CALLBACKS ============================== */ +/* ======================================================================== */ + +/* Default callbacks used if the callback hasn't been set yet, or if the + * callback is set to NULL + */ + +#if M68K_EMULATE_INT_ACK == OPT_ON +/* Interrupt acknowledge */ +static int default_int_ack_callback(int int_level) +{ + CPU_INT_LEVEL = 0; + return M68K_INT_ACK_AUTOVECTOR; +} +#endif + +#if M68K_EMULATE_RESET == OPT_ON +/* Called when a reset instruction is executed */ +static void default_reset_instr_callback(void) +{ +} +#endif + +#if M68K_TAS_HAS_CALLBACK == OPT_ON +/* Called when a tas instruction is executed */ +static int default_tas_instr_callback(void) +{ + return 1; // allow writeback +} +#endif + +#if M68K_EMULATE_FC == OPT_ON +/* Called every time there's bus activity (read/write to/from memory */ +static void default_set_fc_callback(unsigned int new_fc) +{ +} +#endif + + +/* ======================================================================== */ +/* ================================= API ================================== */ +/* ======================================================================== */ + +/* Access the internals of the CPU */ +unsigned int s68k_get_reg(m68k_register_t regnum) +{ + switch(regnum) + { + case M68K_REG_D0: return m68ki_cpu.dar[0]; + case M68K_REG_D1: return m68ki_cpu.dar[1]; + case M68K_REG_D2: return m68ki_cpu.dar[2]; + case M68K_REG_D3: return m68ki_cpu.dar[3]; + case M68K_REG_D4: return m68ki_cpu.dar[4]; + case M68K_REG_D5: return m68ki_cpu.dar[5]; + case M68K_REG_D6: return m68ki_cpu.dar[6]; + case M68K_REG_D7: return m68ki_cpu.dar[7]; + case M68K_REG_A0: return m68ki_cpu.dar[8]; + case M68K_REG_A1: return m68ki_cpu.dar[9]; + case M68K_REG_A2: return m68ki_cpu.dar[10]; + case M68K_REG_A3: return m68ki_cpu.dar[11]; + case M68K_REG_A4: return m68ki_cpu.dar[12]; + case M68K_REG_A5: return m68ki_cpu.dar[13]; + case M68K_REG_A6: return m68ki_cpu.dar[14]; + case M68K_REG_A7: return m68ki_cpu.dar[15]; + case M68K_REG_PC: return MASK_OUT_ABOVE_32(m68ki_cpu.pc); + case M68K_REG_SR: return m68ki_cpu.t1_flag | + (m68ki_cpu.s_flag << 11) | + m68ki_cpu.int_mask | + ((m68ki_cpu.x_flag & XFLAG_SET) >> 4) | + ((m68ki_cpu.n_flag & NFLAG_SET) >> 4) | + ((!m68ki_cpu.not_z_flag) << 2) | + ((m68ki_cpu.v_flag & VFLAG_SET) >> 6) | + ((m68ki_cpu.c_flag & CFLAG_SET) >> 8); + case M68K_REG_SP: return m68ki_cpu.dar[15]; + case M68K_REG_USP: return m68ki_cpu.s_flag ? m68ki_cpu.sp[0] : m68ki_cpu.dar[15]; + case M68K_REG_ISP: return m68ki_cpu.s_flag ? m68ki_cpu.dar[15] : m68ki_cpu.sp[4]; +#if M68K_EMULATE_PREFETCH + case M68K_REG_PREF_ADDR: return m68ki_cpu.pref_addr; + case M68K_REG_PREF_DATA: return m68ki_cpu.pref_data; +#endif + case M68K_REG_IR: return m68ki_cpu.ir; + default: return 0; + } +} + +void s68k_set_reg(m68k_register_t regnum, unsigned int value) +{ + switch(regnum) + { + case M68K_REG_D0: REG_D[0] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D1: REG_D[1] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D2: REG_D[2] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D3: REG_D[3] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D4: REG_D[4] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D5: REG_D[5] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D6: REG_D[6] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_D7: REG_D[7] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A0: REG_A[0] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A1: REG_A[1] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A2: REG_A[2] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A3: REG_A[3] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A4: REG_A[4] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A5: REG_A[5] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A6: REG_A[6] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_A7: REG_A[7] = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_PC: m68ki_jump(MASK_OUT_ABOVE_32(value)); return; + case M68K_REG_SR: m68ki_set_sr(value); return; + case M68K_REG_SP: REG_SP = MASK_OUT_ABOVE_32(value); return; + case M68K_REG_USP: if(FLAG_S) + REG_USP = MASK_OUT_ABOVE_32(value); + else + REG_SP = MASK_OUT_ABOVE_32(value); + return; + case M68K_REG_ISP: if(FLAG_S) + REG_SP = MASK_OUT_ABOVE_32(value); + else + REG_ISP = MASK_OUT_ABOVE_32(value); + return; + case M68K_REG_IR: REG_IR = MASK_OUT_ABOVE_16(value); return; +#if M68K_EMULATE_PREFETCH + case M68K_REG_PREF_ADDR: CPU_PREF_ADDR = MASK_OUT_ABOVE_32(value); return; +#endif + default: return; + } +} + +/* Set the callbacks */ +#if M68K_EMULATE_INT_ACK == OPT_ON +void s68k_set_int_ack_callback(int (*callback)(int int_level)) +{ + CALLBACK_INT_ACK = callback ? callback : default_int_ack_callback; +} +#endif + +#if M68K_EMULATE_RESET == OPT_ON +void s68k_set_reset_instr_callback(void (*callback)(void)) +{ + CALLBACK_RESET_INSTR = callback ? callback : default_reset_instr_callback; +} +#endif + +#if M68K_TAS_HAS_CALLBACK == OPT_ON +void s68k_set_tas_instr_callback(int (*callback)(void)) +{ + CALLBACK_TAS_INSTR = callback ? callback : default_tas_instr_callback; +} +#endif + +#if M68K_EMULATE_FC == OPT_ON +void s68k_set_fc_callback(void (*callback)(unsigned int new_fc)) +{ + CALLBACK_SET_FC = callback ? callback : default_set_fc_callback; +} +#endif + +extern void error(char *format, ...); +extern uint16 v_counter; + +/* update IRQ level according to triggered interrupts */ +void s68k_update_irq(unsigned int mask) +{ + /* Get IRQ level (6 interrupt lines) */ + mask = irq_level[mask]; + + /* Set IRQ level */ + CPU_INT_LEVEL = mask << 8; + +#ifdef LOG_SCD + error("[%d][%d] IRQ Level = %d(0x%02x) (%x)\n", v_counter, s68k.cycles, CPU_INT_LEVEL>>8,FLAG_INT_MASK,s68k.pc); +#endif +} + +void s68k_run(unsigned int cycles) +{ + /* Make sure CPU is not already ahead */ + if (s68k.cycles >= cycles) + { + return; + } + + /* Check interrupt mask to process IRQ if needed */ + m68ki_check_interrupts(); + + /* Make sure we're not stopped */ + if (CPU_STOPPED) + { + s68k.cycles = cycles; + return; + } + + /* Save end cycles count for when CPU is stopped */ + s68k.cycle_end = cycles; + + /* Return point for when we have an address error (TODO: use goto) */ + m68ki_set_address_error_trap() /* auto-disable (see m68kcpu.h) */ + +#ifdef LOG_SCD + error("[%d][%d] s68k run to %d cycles (%x), irq mask = %x (%x)\n", v_counter, s68k.cycles, cycles, s68k.pc,FLAG_INT_MASK, CPU_INT_LEVEL); +#endif + + while (s68k.cycles < cycles) + { + /* Set tracing accodring to T1. */ + m68ki_trace_t1() /* auto-disable (see m68kcpu.h) */ + + /* Set the address space for reads */ + m68ki_use_data_space() /* auto-disable (see m68kcpu.h) */ + + /* Decode next instruction */ + REG_IR = m68ki_read_imm_16(); + + /* Execute instruction */ + m68ki_instruction_jump_table[REG_IR](); + USE_CYCLES(CYC_INSTRUCTION[REG_IR]); + + /* Trace m68k_exception, if necessary */ + m68ki_exception_if_trace(); /* auto-disable (see m68kcpu.h) */ + } +} + +void s68k_init(void) +{ +#ifdef BUILD_TABLES + static uint emulation_initialized = 0; + + /* The first call to this function initializes the opcode handler jump table */ + if(!emulation_initialized) + { + m68ki_build_opcode_table(); + emulation_initialized = 1; + } +#endif + +#if M68K_EMULATE_INT_ACK == OPT_ON + s68k_set_int_ack_callback(NULL); +#endif +#if M68K_EMULATE_RESET == OPT_ON + s68k_set_reset_instr_callback(NULL); +#endif +#if M68K_TAS_HAS_CALLBACK == OPT_ON + s68k_set_tas_instr_callback(NULL); +#endif +#if M68K_EMULATE_FC == OPT_ON + s68k_set_fc_callback(NULL); +#endif +} + +/* Pulse the RESET line on the CPU */ +void s68k_pulse_reset(void) +{ + /* Clear all stop levels */ + CPU_STOPPED = 0; +#if M68K_EMULATE_ADDRESS_ERROR + CPU_RUN_MODE = RUN_MODE_BERR_AERR_RESET; +#endif + + /* Turn off tracing */ + FLAG_T1 = 0; + m68ki_clear_trace() + + /* Interrupt mask to level 7 */ + FLAG_INT_MASK = 0x0700; + CPU_INT_LEVEL = 0; + irq_latency = 0; + + /* Go to supervisor mode */ + m68ki_set_s_flag(SFLAG_SET); + + /* Invalidate the prefetch queue */ +#if M68K_EMULATE_PREFETCH + /* Set to arbitrary number since our first fetch is from 0 */ + CPU_PREF_ADDR = 0x1000; +#endif /* M68K_EMULATE_PREFETCH */ + + /* Read the initial stack pointer and program counter */ + m68ki_jump(0); + REG_SP = m68ki_read_imm_32(); + REG_PC = m68ki_read_imm_32(); + m68ki_jump(REG_PC); + +#if M68K_EMULATE_ADDRESS_ERROR + CPU_RUN_MODE = RUN_MODE_NORMAL; +#endif + + USE_CYCLES(CYC_EXCEPTION[EXCEPTION_RESET]); +} + +void s68k_pulse_halt(void) +{ + /* Pulse the HALT line on the CPU */ + CPU_STOPPED |= STOP_LEVEL_HALT; +} + +void s68k_clear_halt() +{ + /* Clear the HALT line on the CPU */ + CPU_STOPPED &= ~STOP_LEVEL_HALT; +} + +/* ======================================================================== */ +/* ============================== END OF FILE ============================= */ +/* ======================================================================== */ diff --git a/genplus-gx/core/m68k/s68ki_cycles.h b/genplus-gx/core/m68k/s68ki_cycles.h new file mode 100644 index 0000000000..bbadeda5fa --- /dev/null +++ b/genplus-gx/core/m68k/s68ki_cycles.h @@ -0,0 +1,4099 @@ +static const unsigned char m68ki_cycles[0x10000] = +{ + 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, + 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 20*4, 20*4, 20*4, 20*4, 20*4, 20*4, 20*4, 20*4, + 22*4, 22*4, 22*4, 22*4, 22*4, 22*4, 22*4, 22*4, 20*4, 24*4, 0*4, 0*4, 20*4, 0*4, 0*4, 0*4, + 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, + 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 20*4, 20*4, 20*4, 20*4, 20*4, 20*4, 20*4, 20*4, + 22*4, 22*4, 22*4, 22*4, 22*4, 22*4, 22*4, 22*4, 20*4, 24*4, 0*4, 0*4, 20*4, 0*4, 0*4, 0*4, + 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, + 30*4, 30*4, 30*4, 30*4, 30*4, 30*4, 30*4, 30*4, 32*4, 32*4, 32*4, 32*4, 32*4, 32*4, 32*4, 32*4, + 34*4, 34*4, 34*4, 34*4, 34*4, 34*4, 34*4, 34*4, 32*4, 36*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 6*4, 6*4, 6*4, 6*4, 6*4, 6*4, 6*4, 6*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, + 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, + 10*4, 10*4, 10*4, 10*4, 10*4, 10*4, 10*4, 10*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, + 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 12*4, 16*4, 12*4, 14*4, 8*4, 0*4, 0*4, 0*4, + 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 24*4, 24*4, 24*4, 24*4, 24*4, 24*4, 24*4, 24*4, + 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, + 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, + 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 16*4, 20*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 10*4, 10*4, 10*4, 10*4, 10*4, 10*4, 10*4, 10*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, + 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, + 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, + 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 16*4, 20*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 24*4, 24*4, 24*4, 24*4, 24*4, 24*4, 24*4, 24*4, + 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, + 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, + 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 16*4, 20*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, + 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 20*4, 20*4, 20*4, 20*4, 20*4, 20*4, 20*4, 20*4, + 22*4, 22*4, 22*4, 22*4, 22*4, 22*4, 22*4, 22*4, 20*4, 24*4, 0*4, 0*4, 20*4, 0*4, 0*4, 0*4, + 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, + 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 20*4, 20*4, 20*4, 20*4, 20*4, 20*4, 20*4, 20*4, + 22*4, 22*4, 22*4, 22*4, 22*4, 22*4, 22*4, 22*4, 20*4, 24*4, 0*4, 0*4, 20*4, 0*4, 0*4, 0*4, + 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, 28*4, + 30*4, 30*4, 30*4, 30*4, 30*4, 30*4, 30*4, 30*4, 32*4, 32*4, 32*4, 32*4, 32*4, 32*4, 32*4, 32*4, + 34*4, 34*4, 34*4, 34*4, 34*4, 34*4, 34*4, 34*4, 32*4, 36*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 6*4, 6*4, 6*4, 6*4, 6*4, 6*4, 6*4, 6*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, + 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, + 10*4, 10*4, 10*4, 10*4, 10*4, 10*4, 10*4, 10*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, + 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 12*4, 16*4, 12*4, 14*4, 8*4, 0*4, 0*4, 0*4, + 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 24*4, 24*4, 24*4, 24*4, 24*4, 24*4, 24*4, 24*4, + 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, + 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, + 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 16*4, 20*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 10*4, 10*4, 10*4, 10*4, 10*4, 10*4, 10*4, 10*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, + 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, + 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, + 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 16*4, 20*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 24*4, 24*4, 24*4, 24*4, 24*4, 24*4, 24*4, 24*4, + 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, 12*4, + 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 14*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, + 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 16*4, 20*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 8*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, 0*4, + 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, 16*4, + 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 18*4, 20*4, 20*4, 20*4, 20*4, 20*4, 20*4, 20*4, 20*4, + 22*4, 22*4, 22*4, 22*4, 22*4, 22*4, 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--- /dev/null +++ b/genplus-gx/core/macros.h @@ -0,0 +1,49 @@ +#ifndef _MACROS_H_ +#define _MACROS_H_ + +#ifdef LSB_FIRST + +#define READ_BYTE(BASE, ADDR) (BASE)[(ADDR)^1] + +#define READ_WORD(BASE, ADDR) (((BASE)[ADDR]<<8) | (BASE)[(ADDR)+1]) + +#define READ_WORD_LONG(BASE, ADDR) (((BASE)[(ADDR)+1]<<24) | \ + ((BASE)[(ADDR)]<<16) | \ + ((BASE)[(ADDR)+3]<<8) | \ + (BASE)[(ADDR)+2]) + +#define WRITE_BYTE(BASE, ADDR, VAL) (BASE)[(ADDR)^1] = (VAL)&0xff + +#define WRITE_WORD(BASE, ADDR, VAL) (BASE)[ADDR] = ((VAL)>>8) & 0xff; \ + (BASE)[(ADDR)+1] = (VAL)&0xff + +#define WRITE_WORD_LONG(BASE, ADDR, VAL) (BASE)[(ADDR+1)] = ((VAL)>>24) & 0xff; \ + (BASE)[(ADDR)] = ((VAL)>>16)&0xff; \ + (BASE)[(ADDR+3)] = ((VAL)>>8)&0xff; \ + (BASE)[(ADDR+2)] = (VAL)&0xff + +#else + +#define READ_BYTE(BASE, ADDR) (BASE)[ADDR] +#define READ_WORD(BASE, ADDR) *(uint16 *)((BASE) + (ADDR)) +#define READ_WORD_LONG(BASE, ADDR) *(uint32 *)((BASE) + (ADDR)) +#define WRITE_BYTE(BASE, ADDR, VAL) (BASE)[ADDR] = VAL & 0xff +#define WRITE_WORD(BASE, ADDR, VAL) *(uint16 *)((BASE) + (ADDR)) = VAL & 0xffff +#define WRITE_WORD_LONG(BASE, ADDR, VAL) *(uint32 *)((BASE) + (ADDR)) = VAL & 0xffffffff +#endif + +/* C89 compatibility */ +#ifndef M_PI +#define M_PI 3.14159265358979323846264338327f +#endif /* M_PI */ + +/* Set to your compiler's static inline keyword to enable it, or + * set it to blank to disable it. + * If you define INLINE in the makefile, it will override this value. + * NOTE: not enabling inline functions will SEVERELY slow down emulation. + */ +#ifndef INLINE +#define INLINE static __inline__ +#endif /* INLINE */ + +#endif /* _MACROS_H_ */ diff --git a/genplus-gx/core/mem68k.c b/genplus-gx/core/mem68k.c new file mode 100644 index 0000000000..78f2d82009 --- /dev/null +++ b/genplus-gx/core/mem68k.c @@ -0,0 +1,1281 @@ +/*************************************************************************************** + * Genesis Plus + * Main 68k bus handlers + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code) + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + +/*--------------------------------------------------------------------------*/ +/* Unused areas (return open bus data, i.e prefetched instruction word) */ +/*--------------------------------------------------------------------------*/ + +unsigned int m68k_read_bus_8(unsigned int address) +{ +#ifdef LOGERROR + error("Unused read8 %08X (%08X)\n", address, m68k_get_reg(M68K_REG_PC)); +#endif + address = m68k.pc | (address & 1); + return READ_BYTE(m68k.memory_map[((address)>>16)&0xff].base, (address) & 0xffff); +} + +unsigned int m68k_read_bus_16(unsigned int address) +{ +#ifdef LOGERROR + error("Unused read16 %08X (%08X)\n", address, m68k_get_reg(M68K_REG_PC)); +#endif + address = m68k.pc; + return *(uint16 *)(m68k.memory_map[((address)>>16)&0xff].base + ((address) & 0xffff)); +} + + +void m68k_unused_8_w(unsigned int address, unsigned int data) +{ +#ifdef LOGERROR + error("Unused write8 %08X = %02X (%08X)\n", address, data, m68k_get_reg(M68K_REG_PC)); +#endif +} + +void m68k_unused_16_w(unsigned int address, unsigned int data) +{ +#ifdef LOGERROR + error("Unused write16 %08X = %04X (%08X)\n", address, data, m68k_get_reg(M68K_REG_PC)); +#endif +} + + +/*--------------------------------------------------------------------------*/ +/* Illegal areas (cause system to lock-up since !DTACK is not returned) */ +/*--------------------------------------------------------------------------*/ + +void m68k_lockup_w_8 (unsigned int address, unsigned int data) +{ +#ifdef LOGERROR + error ("Lockup %08X = %02X (%08X)\n", address, data, m68k_get_reg(M68K_REG_PC)); +#endif + if (!config.force_dtack) + { + m68k_pulse_halt(); + m68k.cycles = m68k.cycle_end; + } +} + +void m68k_lockup_w_16 (unsigned int address, unsigned int data) +{ +#ifdef LOGERROR + error ("Lockup %08X = %04X (%08X)\n", address, data, m68k_get_reg(M68K_REG_PC)); +#endif + if (!config.force_dtack) + { + m68k_pulse_halt(); + m68k.cycles = m68k.cycle_end; + } +} + +unsigned int m68k_lockup_r_8 (unsigned int address) +{ +#ifdef LOGERROR + error ("Lockup %08X.b (%08X)\n", address, m68k_get_reg(M68K_REG_PC)); +#endif + if (!config.force_dtack) + { + m68k_pulse_halt(); + m68k.cycles = m68k.cycle_end; + } + address = m68k.pc | (address & 1); + return READ_BYTE(m68k.memory_map[((address)>>16)&0xff].base, (address) & 0xffff); +} + +unsigned int m68k_lockup_r_16 (unsigned int address) +{ +#ifdef LOGERROR + error ("Lockup %08X.w (%08X)\n", address, m68k_get_reg(M68K_REG_PC)); +#endif + if (!config.force_dtack) + { + m68k_pulse_halt(); + m68k.cycles = m68k.cycle_end; + } + address = m68k.pc; + return *(uint16 *)(m68k.memory_map[((address)>>16)&0xff].base + ((address) & 0xffff)); +} + + +/*--------------------------------------------------------------------------*/ +/* Z80 bus (accessed through I/O chip) */ +/*--------------------------------------------------------------------------*/ + +unsigned int z80_read_byte(unsigned int address) +{ + switch ((address >> 13) & 3) + { + case 2: /* YM2612 */ + { + return fm_read(m68k.cycles, address & 3); + } + + case 3: /* Misc */ + { + /* VDP (through 68k bus) */ + if ((address & 0xFF00) == 0x7F00) + { + return m68k_lockup_r_8(address); + } + return (m68k_read_bus_8(address) | 0xFF); + } + + default: /* ZRAM */ + { + return zram[address & 0x1FFF]; + } + } +} + +unsigned int z80_read_word(unsigned int address) +{ + unsigned int data = z80_read_byte(address); + return (data | (data << 8)); +} + +void z80_write_byte(unsigned int address, unsigned int data) +{ + switch ((address >> 13) & 3) + { + case 2: /* YM2612 */ + { + fm_write(m68k.cycles, address & 3, data); + return; + } + + case 3: + { + switch ((address >> 8) & 0x7F) + { + case 0x60: /* Bank register */ + { + gen_zbank_w(data & 1); + return; + } + + case 0x7F: /* VDP */ + { + m68k_lockup_w_8(address, data); + return; + } + + default: + { + m68k_unused_8_w(address, data); + return; + } + } + } + + default: /* ZRAM */ + { + zram[address & 0x1FFF] = data; + m68k.cycles += 8; /* ZRAM access latency (fixes Pacman 2: New Adventures) */ + return; + } + } +} + +void z80_write_word(unsigned int address, unsigned int data) +{ + z80_write_byte(address, data >> 8); +} + + +/*--------------------------------------------------------------------------*/ +/* I/O Control */ +/*--------------------------------------------------------------------------*/ + +static void m68k_poll_detect(unsigned int reg_mask) +{ + /* detect MAIN-CPU register polling */ + if (m68k.poll.detected & reg_mask) + { + if (m68k.cycles <= m68k.poll.cycle) + { + if (m68k.pc == m68k.poll.pc) + { + /* MAIN-CPU polling confirmed ? */ + if (m68k.poll.detected & 1) + { + /* idle MAIN-CPU until register is modified */ + m68k.cycles = m68k.cycle_end; + m68k.stopped = reg_mask; +#ifdef LOG_SCD + error("m68k stopped from %d cycles\n", m68k.cycles); +#endif + } + else + { + /* confirm MAIN-CPU polling */ + m68k.poll.detected |= 1; + m68k.poll.cycle = m68k.cycles + 840; + } + } + return; + } + } + else + { + /* set MAIN-CPU register access flag */ + m68k.poll.detected = reg_mask; + } + + /* reset MAIN-CPU polling detection */ + m68k.poll.cycle = m68k.cycles + 840; + m68k.poll.pc = m68k.pc; +} + +static void m68k_poll_sync(unsigned int reg_mask) +{ + /* relative SUB-CPU cycle counter */ + unsigned int cycles = (m68k.cycles * SCYCLES_PER_LINE) / MCYCLES_PER_LINE; + + /* sync SUB-CPU with MAIN-CPU */ + if (!s68k.stopped) + { + s68k_run(cycles); + } + + /* SUB-CPU idle on register polling ? */ + if (s68k.stopped & reg_mask) + { + /* sync SUB-CPU with MAIN-CPU */ + s68k.cycles = cycles; + + /* restart SUB-CPU */ + s68k.stopped = 0; +#ifdef LOG_SCD + error("s68k started from %d cycles\n", cycles); +#endif + } + + /* clear CPU register access flags */ + s68k.poll.detected &= ~reg_mask; + m68k.poll.detected &= ~reg_mask; +} + +unsigned int ctrl_io_read_byte(unsigned int address) +{ + switch ((address >> 8) & 0xFF) + { + case 0x00: /* I/O chip */ + { + if (!(address & 0xE0)) + { + return io_68k_read((address >> 1) & 0x0F); + } + return m68k_read_bus_8(address); + } + + case 0x11: /* Z80 BUSACK */ + { + if (!(address & 1)) + { + /* Unused bits return prefetched bus data (Time Killers) */ + address = m68k.pc; + + /* Check if bus has been requested and is not reseted */ + if (zstate == 3) + { + /* D0 is cleared */ + return (READ_BYTE(m68k.memory_map[((address)>>16)&0xff].base, (address) & 0xffff) & 0xFE); + } + + /* D0 is set */ + return (READ_BYTE(m68k.memory_map[((address)>>16)&0xff].base, (address) & 0xffff) | 0x01); + } + return m68k_read_bus_8(address); + } + + case 0x20: /* MEGA-CD */ + { +#ifdef LOG_SCD + error("[%d][%d]read byte CD register %X (%X)\n", v_counter, m68k.cycles, address, m68k.pc); +#endif + if (system_hw == SYSTEM_MCD) + { + /* register index ($A12000-A1203F mirrored up to $A120FF) */ + uint8 index = address & 0x3f; + + /* Memory Mode */ + if (index == 0x03) + { + m68k_poll_detect(1<<0x03); + return scd.regs[0x03>>1].byte.l; + } + + /* SUB-CPU communication flags */ + if (index == 0x0f) + { + if (!s68k.stopped) + { + /* relative SUB-CPU cycle counter */ + unsigned int cycles = (m68k.cycles * SCYCLES_PER_LINE) / MCYCLES_PER_LINE; + + /* sync SUB-CPU with MAIN-CPU (Dracula Unleashed w/ Sega CD Model 2 Boot ROM) */ + s68k_run(cycles); + } + + m68k_poll_detect(1<<0x0f); + return scd.regs[0x0f>>1].byte.l; + } + + /* default registers */ + if (index < 0x30) + { + /* SUB-CPU communication words */ + if (index >= 0x20) + { + m68k_poll_detect(1 << (index - 0x10)); + } + + /* register LSB */ + if (address & 1) + { + return scd.regs[index >> 1].byte.l; + } + + /* register MSB */ + return scd.regs[index >> 1].byte.h; + } + } + + return m68k_read_bus_8(address); + } + + case 0x30: /* TIME */ + { + if (cart.hw.time_r) + { + unsigned int data = cart.hw.time_r(address); + if (address & 1) + { + return (data & 0xFF); + } + return (data >> 8); + } + return m68k_read_bus_8(address); + } + + case 0x41: /* BOOT ROM */ + { + if ((config.bios & 1) && (address & 1)) + { + unsigned int data = gen_bankswitch_r() & 1; + + /* Unused bits return prefetched bus data */ + address = m68k.pc; + data |= (READ_BYTE(m68k.memory_map[((address)>>16)&0xff].base, (address) & 0xffff) & 0xFE); + return data; + } + return m68k_read_bus_8(address); + } + + case 0x10: /* MEMORY MODE */ + case 0x12: /* Z80 RESET */ + case 0x13: /* unknown */ + case 0x40: /* TMSS */ + case 0x44: /* RADICA */ + case 0x50: /* SVP */ + { + return m68k_read_bus_8(address); + } + + default: /* Invalid address */ + { + return m68k_lockup_r_8(address); + } + } +} + +unsigned int ctrl_io_read_word(unsigned int address) +{ + switch ((address >> 8) & 0xFF) + { + case 0x00: /* I/O chip */ + { + if (!(address & 0xE0)) + { + unsigned int data = io_68k_read((address >> 1) & 0x0F); + return (data << 8 | data); + } + return m68k_read_bus_16(address); + } + + case 0x11: /* Z80 BUSACK */ + { + /* Unused bits return prefetched bus data (Time Killers) */ + address = m68k.pc; + + /* Check if bus has been requested and is not reseted */ + if (zstate == 3) + { + /* D8 is cleared */ + return (*(uint16 *)(m68k.memory_map[((address)>>16)&0xff].base + ((address) & 0xffff)) & 0xFEFF); + } + + /* D8 is set */ + return (*(uint16 *)(m68k.memory_map[((address)>>16)&0xff].base + ((address) & 0xffff)) | 0x0100); + } + + case 0x20: /* MEGA-CD */ + { +#ifdef LOG_SCD + error("[%d][%d]read word CD register %X (%X)\n", v_counter, m68k.cycles, address, m68k.pc); +#endif + if (system_hw == SYSTEM_MCD) + { + /* register index ($A12000-A1203F mirrored up to $A120FF) */ + uint8 index = address & 0x3f; + + /* Memory Mode */ + if (index == 0x02) + { + m68k_poll_detect(1<<0x03); + return scd.regs[0x03>>1].w; + } + + /* CDC host data (word access only ?) */ + if (index == 0x08) + { + return cdc_host_r(); + } + + /* H-INT vector (word access only ?) */ + if (index == 0x06) + { + return *(uint16 *)(m68k.memory_map[0].base + 0x72); + } + + /* Stopwatch counter (word read access only ?) */ + if (index == 0x0c) + { + /* relative SUB-CPU cycle counter */ + unsigned int cycles = (m68k.cycles * SCYCLES_PER_LINE) / MCYCLES_PER_LINE; + + /* cycle-accurate counter value */ + return (scd.regs[0x0c>>1].w + ((cycles - scd.stopwatch) / TIMERS_SCYCLES_RATIO)) & 0xfff; + } + + /* default registers */ + if (index < 0x30) + { + /* SUB-CPU communication words */ + if (index >= 0x20) + { + if (!s68k.stopped) + { + /* relative SUB-CPU cycle counter */ + unsigned int cycles = (m68k.cycles * SCYCLES_PER_LINE) / MCYCLES_PER_LINE; + + /* sync SUB-CPU with MAIN-CPU (Soul Star) */ + s68k_run(cycles); + } + + m68k_poll_detect(3 << (index - 0x10)); + } + + return scd.regs[index >> 1].w; + } + } + + /* invalid address */ + return m68k_read_bus_16(address); + } + + case 0x30: /* TIME */ + { + if (cart.hw.time_r) + { + return cart.hw.time_r(address); + } + return m68k_read_bus_16(address); + } + + case 0x50: /* SVP */ + { + if ((address & 0xFD) == 0) + { + return svp->ssp1601.gr[SSP_XST].byte.h; + } + + if ((address & 0xFF) == 4) + { + unsigned int data = svp->ssp1601.gr[SSP_PM0].byte.h; + svp->ssp1601.gr[SSP_PM0].byte.h &= ~1; + return data; + } + + return m68k_read_bus_16(address); + } + + case 0x10: /* MEMORY MODE */ + case 0x12: /* Z80 RESET */ + case 0x13: /* unknown */ + case 0x40: /* TMSS */ + case 0x41: /* BOOT ROM */ + case 0x44: /* RADICA */ + { + return m68k_read_bus_16(address); + } + + default: /* Invalid address */ + { + return m68k_lockup_r_16(address); + } + } +} + +void ctrl_io_write_byte(unsigned int address, unsigned int data) +{ + switch ((address >> 8) & 0xFF) + { + case 0x00: /* I/O chip */ + { + if ((address & 0xE1) == 0x01) + { + /* get /LWR only */ + io_68k_write((address >> 1) & 0x0F, data); + return; + } + m68k_unused_8_w(address, data); + return; + } + + case 0x11: /* Z80 BUSREQ */ + { + if (!(address & 1)) + { + gen_zbusreq_w(data & 1, m68k.cycles); + return; + } + m68k_unused_8_w(address, data); + return; + } + + case 0x12: /* Z80 RESET */ + { + if (!(address & 1)) + { + gen_zreset_w(data & 1, m68k.cycles); + return; + } + m68k_unused_8_w(address, data); + return; + } + + case 0x20: /* MEGA-CD */ + { +#ifdef LOG_SCD + error("[%d][%d]write byte CD register %X -> 0x%02X (%X)\n", v_counter, m68k.cycles, address, data, m68k.pc); +#endif + if (system_hw == SYSTEM_MCD) + { + /* register index ($A12000-A1203F mirrored up to $A120FF) */ + switch (address & 0x3f) + { + case 0x00: /* SUB-CPU interrupt */ + { + /* IFL2 bit */ + if (data & 0x01) + { + /* level 2 interrupt enabled ? */ + if (scd.regs[0x32>>1].byte.l & 0x04) + { + if (!s68k.stopped) + { + /* relative SUB-CPU cycle counter */ + unsigned int cycles = (m68k.cycles * SCYCLES_PER_LINE) / MCYCLES_PER_LINE; + + /* sync SUB-CPU with MAIN-CPU (Earnest Evans, Fhey Area) */ + s68k_run(cycles); + } + + /* set IFL2 flag */ + scd.regs[0x00].byte.h |= 0x01; + + /* trigger level 2 interrupt */ + scd.pending |= (1 << 2); + + /* update IRQ level */ + s68k_update_irq((scd.pending & scd.regs[0x32>>1].byte.l) >> 1); + } + } + + /* writing 0 does nothing */ + return; + } + + case 0x01: /* SUB-CPU control */ + { + /* RESET bit */ + if (data & 0x01) + { + /* trigger reset on 0->1 transition */ + if (!(scd.regs[0x00].byte.l & 0x01)) + { + /* reset SUB-CPU */ + s68k_pulse_reset(); + } + + /* BUSREQ bit */ + if (data & 0x02) + { + /* SUB-CPU bus requested */ + s68k_pulse_halt(); + } + else + { + /* SUB-CPU bus released */ + s68k_clear_halt(); + } + } + else + { + /* SUB-CPU is halted while !RESET is asserted */ + s68k_pulse_halt(); + } + + scd.regs[0x00].byte.l = data; + return; + } + + case 0x02: /* PRG-RAM Write Protection */ + { + scd.regs[0x02>>1].byte.h = data; + return; + } + + case 0x03: /* Memory mode */ + { + m68k_poll_sync(1<<0x03); + + /* PRG-RAM 128k bank mapped to $020000-$03FFFF (resp. $420000-$43FFFF) */ + m68k.memory_map[scd.cartridge.boot + 0x02].base = scd.prg_ram + ((data & 0xc0) << 11); + m68k.memory_map[scd.cartridge.boot + 0x03].base = m68k.memory_map[scd.cartridge.boot + 0x02].base + 0x10000; + + /* check current mode */ + if (scd.regs[0x03>>1].byte.l & 0x04) + { + /* DMNA bit */ + if (data & 0x02) + { + /* writing 1 to DMNA in 1M mode will return Word-RAM to SUB-CPU in 2M mode */ + scd.dmna = 1; + } + else + { + /* writing 0 to DMNA in 1M mode actually set DMNA bit */ + data |= 0x02; + + /* update BK0-1 & DMNA bits */ + scd.regs[0x03>>1].byte.l = (scd.regs[0x03>>1].byte.l & ~0xc2) | (data & 0xc2); + return; + } + } + else + { + /* writing 0 in 2M mode does nothing */ + if (data & 0x02) + { + /* Word-RAM is assigned to SUB-CPU */ + scd.dmna = 1; + + /* clear RET bit */ + scd.regs[0x03>>1].byte.l = (scd.regs[0x03>>1].byte.l & ~0xc3) | (data & 0xc2); + return; + } + } + + /* update BK0-1 bits */ + scd.regs[0x03>>1].byte.l = (scd.regs[0x02>>1].byte.l & ~0xc0) | (data & 0xc0); + return; + } + + case 0x0e: /* MAIN-CPU communication flags */ + case 0x0f: /* !LWR is ignored (Space Ace, Dragon's Lair) */ + { + m68k_poll_sync(1<<0x0e); + scd.regs[0x0e>>1].byte.h = data; + return; + } + + default: + { + /* MAIN-CPU communication words */ + if ((address & 0x30) == 0x10) + { + m68k_poll_sync(1 << (address & 0x1f)); + + /* register LSB */ + if (address & 1) + { + scd.regs[(address >> 1) & 0xff].byte.l = data; + return; + } + + /* register MSB */ + scd.regs[(address >> 1) & 0xff].byte.h = data; + return; + } + + /* invalid address */ + m68k_unused_8_w(address, data); + return; + } + } + } + + m68k_unused_8_w(address, data); + return; + } + + case 0x30: /* TIME */ + { + cart.hw.time_w(address, data); + return; + } + + case 0x41: /* BOOT ROM */ + { + if ((config.bios & 1) && (address & 1)) + { + gen_bankswitch_w(data & 1); + return; + } + m68k_unused_8_w(address, data); + return; + } + + case 0x10: /* MEMORY MODE */ + case 0x13: /* unknown */ + case 0x40: /* TMSS */ + case 0x44: /* RADICA */ + case 0x50: /* SVP */ + { + m68k_unused_8_w(address, data); + return; + } + + default: /* Invalid address */ + { + m68k_lockup_w_8(address, data); + return; + } + } +} + +void ctrl_io_write_word(unsigned int address, unsigned int data) +{ + switch ((address >> 8) & 0xFF) + { + case 0x00: /* I/O chip */ + { + if (!(address & 0xE0)) + { + io_68k_write((address >> 1) & 0x0F, data & 0xFF); + return; + } + m68k_unused_16_w(address, data); + return; + } + + case 0x11: /* Z80 BUSREQ */ + { + gen_zbusreq_w((data >> 8) & 1, m68k.cycles); + return; + } + + case 0x12: /* Z80 RESET */ + { + gen_zreset_w((data >> 8) & 1, m68k.cycles); + return; + } + + case 0x20: /* MEGA-CD */ + { +#ifdef LOG_SCD + error("[%d][%d]write word CD register %X -> 0x%04X (%X)\n", v_counter, m68k.cycles, address, data, m68k.pc); +#endif + if (system_hw == SYSTEM_MCD) + { + /* register index ($A12000-A1203F mirrored up to $A120FF) */ + switch (address & 0x3e) + { + case 0x00: /* SUB-CPU interrupt & control */ + { + /* RESET bit */ + if (data & 0x01) + { + /* trigger reset on 0->1 transition */ + if (!(scd.regs[0x00].byte.l & 0x01)) + { + /* reset SUB-CPU */ + s68k_pulse_reset(); + } + + /* BUSREQ bit */ + if (data & 0x02) + { + /* SUB-CPU bus requested */ + s68k_pulse_halt(); + } + else + { + /* SUB-CPU bus released */ + s68k_clear_halt(); + } + } + else + { + /* SUB-CPU is halted while !RESET is asserted */ + s68k_pulse_halt(); + } + + /* IFL2 bit */ + if (data & 0x100) + { + /* level 2 interrupt enabled ? */ + if (scd.regs[0x32>>1].byte.l & 0x04) + { + /* set IFL2 flag */ + scd.regs[0x00].byte.h |= 0x01; + + /* trigger level 2 interrupt */ + scd.pending |= (1 << 2); + + /* update IRQ level */ + s68k_update_irq((scd.pending & scd.regs[0x32>>1].byte.l) >> 1); + } + } + + /* update LSB only */ + scd.regs[0x00].byte.l = data & 0xff; + return; + } + + case 0x02: /* Memory Mode */ + { + m68k_poll_sync(1<<0x03); + + /* PRG-RAM 128k bank mapped to $020000-$03FFFF (resp. $420000-$43FFFF) */ + m68k.memory_map[scd.cartridge.boot + 0x02].base = scd.prg_ram + ((data & 0xc0) << 11); + m68k.memory_map[scd.cartridge.boot + 0x03].base = m68k.memory_map[scd.cartridge.boot + 0x02].base + 0x10000; + + /* check current mode */ + if (scd.regs[0x03>>1].byte.l & 0x04) + { + /* DMNA bit */ + if (data & 0x02) + { + /* writing 1 to DMNA in 1M mode will return Word-RAM to SUB-CPU in 2M mode */ + scd.dmna = 1; + } + else + { + /* writing 0 to DMNA in 1M mode actually set DMNA bit */ + data |= 0x02; + + /* update WP0-7, BK0-1 & DMNA bits */ + scd.regs[0x02>>1].w = (scd.regs[0x02>>1].w & ~0xffc2) | (data & 0xffc2); + return; + } + } + else + { + /* writing 0 in 2M mode does nothing */ + if (data & 0x02) + { + /* Word-RAM is assigned to SUB-CPU */ + scd.dmna = 1; + + /* clear RET bit */ + scd.regs[0x02>>1].w = (scd.regs[0x02>>1].w & ~0xffc3) | (data & 0xffc2); + return; + } + } + + /* update WP0-7 & BK0-1 bits */ + scd.regs[0x02>>1].w = (scd.regs[0x02>>1].w & ~0xffc0) | (data & 0xffc0); + return; + } + + case 0x06: /* H-INT vector (word access only ?) */ + { + *(uint16 *)(m68k.memory_map[0].base + 0x72) = data; + return; + } + + case 0x0e: /* CPU communication flags */ + { + m68k_poll_sync(1<<0x0e); + + /* D8-D15 ignored -> only MAIN-CPU flags are updated (Mortal Kombat) */ + scd.regs[0x0e>>1].byte.h = data & 0xff; + return; + } + + default: + { + /* MAIN-CPU communication words */ + if ((address & 0x30) == 0x10) + { + m68k_poll_sync(3 << (address & 0x1e)); + scd.regs[(address >> 1) & 0xff].w = data; + return; + } + + /* invalid address */ + m68k_unused_16_w (address, data); + return; + } + } + } + + m68k_unused_16_w (address, data); + return; + } + + case 0x30: /* TIME */ + { + cart.hw.time_w(address, data); + return; + } + + case 0x40: /* TMSS */ + { + if (config.bios & 1) + { + gen_tmss_w(address & 3, data); + return; + } + m68k_unused_16_w(address, data); + return; + } + + case 0x50: /* SVP */ + { + if (!(address & 0xFD)) + { + svp->ssp1601.gr[SSP_XST].byte.h = data; + svp->ssp1601.gr[SSP_PM0].byte.h |= 2; + svp->ssp1601.emu_status &= ~SSP_WAIT_PM0; + return; + } + m68k_unused_16_w(address, data); + return; + } + + case 0x10: /* MEMORY MODE */ + case 0x13: /* unknown */ + case 0x41: /* BOOT ROM */ + case 0x44: /* RADICA */ + { + m68k_unused_16_w (address, data); + return; + } + + default: /* Invalid address */ + { + m68k_lockup_w_16 (address, data); + return; + } + } +} + + +/*--------------------------------------------------------------------------*/ +/* VDP */ +/*--------------------------------------------------------------------------*/ + +unsigned int vdp_read_byte(unsigned int address) +{ + switch (address & 0xFD) + { + case 0x00: /* DATA */ + { + return (vdp_68k_data_r() >> 8); + } + + case 0x01: /* DATA */ + { + return (vdp_68k_data_r() & 0xFF); + } + + case 0x04: /* CTRL */ + { + unsigned int data = (vdp_68k_ctrl_r(m68k.cycles) >> 8) & 3; + + /* Unused bits return prefetched bus data */ + address = m68k.pc; + data |= (READ_BYTE(m68k.memory_map[((address)>>16)&0xff].base, (address) & 0xffff) & 0xFC); + + return data; + } + + case 0x05: /* CTRL */ + { + return (vdp_68k_ctrl_r(m68k.cycles) & 0xFF); + } + + case 0x08: /* HVC */ + case 0x0C: + { + return (vdp_hvc_r(m68k.cycles) >> 8); + } + + case 0x09: /* HVC */ + case 0x0D: + { + return (vdp_hvc_r(m68k.cycles) & 0xFF); + } + + case 0x18: /* Unused */ + case 0x19: + case 0x1C: + case 0x1D: + { + return m68k_read_bus_8(address); + } + + default: /* Invalid address */ + { + return m68k_lockup_r_8(address); + } + } +} + +unsigned int vdp_read_word(unsigned int address) +{ + switch (address & 0xFC) + { + case 0x00: /* DATA */ + { + return vdp_68k_data_r(); + } + + case 0x04: /* CTRL */ + { + unsigned int data = vdp_68k_ctrl_r(m68k.cycles) & 0x3FF; + + /* Unused bits return prefetched bus data */ + address = m68k.pc; + data |= (*(uint16 *)(m68k.memory_map[((address)>>16)&0xff].base + ((address) & 0xffff)) & 0xFC00); + + return data; + } + + case 0x08: /* HVC */ + case 0x0C: + { + return vdp_hvc_r(m68k.cycles); + } + + case 0x18: /* Unused */ + case 0x1C: + { + return m68k_read_bus_16(address); + } + + default: /* Invalid address */ + { + return m68k_lockup_r_16(address); + } + } +} + +void vdp_write_byte(unsigned int address, unsigned int data) +{ + switch (address & 0xFC) + { + case 0x00: /* Data port */ + { + vdp_68k_data_w(data << 8 | data); + return; + } + + case 0x04: /* Control port */ + { + vdp_68k_ctrl_w(data << 8 | data); + return; + } + + case 0x10: /* PSG */ + case 0x14: + { + if (address & 1) + { + SN76489_Write(m68k.cycles, data); + return; + } + m68k_unused_8_w(address, data); + return; + } + + case 0x18: /* Unused */ + { + m68k_unused_8_w(address, data); + return; + } + + case 0x1C: /* TEST register */ + { + vdp_test_w(data << 8 | data); + return; + } + + default: /* Invalid address */ + { + m68k_lockup_w_8(address, data); + return; + } + } +} + +void vdp_write_word(unsigned int address, unsigned int data) +{ + switch (address & 0xFC) + { + case 0x00: /* DATA */ + { + vdp_68k_data_w(data); + return; + } + + case 0x04: /* CTRL */ + { + vdp_68k_ctrl_w(data); + return; + } + + case 0x10: /* PSG */ + case 0x14: + { + SN76489_Write(m68k.cycles, data & 0xFF); + return; + } + + case 0x18: /* Unused */ + { + m68k_unused_16_w(address, data); + return; + } + + case 0x1C: /* Test register */ + { + vdp_test_w(data); + return; + } + + default: /* Invalid address */ + { + m68k_lockup_w_16 (address, data); + return; + } + } +} + + +/*--------------------------------------------------------------------------*/ +/* PICO (incomplete) */ +/*--------------------------------------------------------------------------*/ + +unsigned int pico_read_byte(unsigned int address) +{ + switch (address & 0xFF) + { + case 0x01: /* VERSION register */ + { + return (region_code >> 1); + } + + case 0x03: /* IO register */ + { + return ~input.pad[0]; + } + + case 0x05: /* PEN X coordinate (MSB) */ + { + return (input.analog[0][0] >> 8); + } + + case 0x07: /* PEN X coordinate (LSB) */ + { + return (input.analog[0][0] & 0xFF); + } + + case 0x09: /* PEN Y coordinate (MSB) */ + { + return (input.analog[0][1] >> 8); + } + + case 0x0B: /* PEN Y coordinate (LSB) */ + { + return (input.analog[0][1] & 0xFF); + } + + case 0x0D: /* PAGE register */ + { + return (1 << pico_current) - 1; + } + + case 0x10: /* ADPCM data registers (TODO) */ + case 0x11: + { + return 0xff; + } + + case 0x12: /* ADPCM control registers (TODO) */ + { + return 0x80; + } + + default: + { + return m68k_read_bus_8(address); + } + } +} + +unsigned int pico_read_word(unsigned int address) +{ + return (pico_read_byte(address | 1) | (pico_read_byte(address) << 8)); +} diff --git a/genplus-gx/core/mem68k.h b/genplus-gx/core/mem68k.h new file mode 100644 index 0000000000..1d8bc3bab3 --- /dev/null +++ b/genplus-gx/core/mem68k.h @@ -0,0 +1,77 @@ +/*************************************************************************************** + * Genesis Plus + * Main 68k bus handlers + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code) + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _MEM68K_H_ +#define _MEM68K_H_ + +/* unused areas */ +extern unsigned int m68k_read_bus_8(unsigned int address); +extern unsigned int m68k_read_bus_16(unsigned int address); +extern void m68k_unused_8_w(unsigned int address, unsigned int data); +extern void m68k_unused_16_w(unsigned int address, unsigned int data); + +/* illegal areas */ +extern unsigned int m68k_lockup_r_8(unsigned int address); +extern unsigned int m68k_lockup_r_16(unsigned int address); +extern void m68k_lockup_w_8(unsigned int address, unsigned int data); +extern void m68k_lockup_w_16(unsigned int address, unsigned int data); + +/* Z80 bus */ +extern unsigned int z80_read_byte(unsigned int address); +extern unsigned int z80_read_word(unsigned int address); +extern void z80_write_byte(unsigned int address, unsigned int data); +extern void z80_write_word(unsigned int address, unsigned int data); + +/* I/O & Control registers */ +extern unsigned int ctrl_io_read_byte(unsigned int address); +extern unsigned int ctrl_io_read_word(unsigned int address); +extern void ctrl_io_write_byte(unsigned int address, unsigned int data); +extern void ctrl_io_write_word(unsigned int address, unsigned int data); + +/* VDP */ +extern unsigned int vdp_read_byte(unsigned int address); +extern unsigned int vdp_read_word(unsigned int address); +extern void vdp_write_byte(unsigned int address, unsigned int data); +extern void vdp_write_word(unsigned int address, unsigned int data); + +/* PICO */ +extern unsigned int pico_read_byte(unsigned int address); +extern unsigned int pico_read_word(unsigned int address); + +#endif /* _MEM68K_H_ */ diff --git a/genplus-gx/core/membnk.c b/genplus-gx/core/membnk.c new file mode 100644 index 0000000000..64f16d83a1 --- /dev/null +++ b/genplus-gx/core/membnk.c @@ -0,0 +1,322 @@ +/*************************************************************************************** + * Genesis Plus + * Z80 bank access to 68k bus + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code) + * Copyright (C) 2007-2011 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + +/* + Handlers for access to unused addresses and those which make the + machine lock up. +*/ + +unsigned int zbank_unused_r(unsigned int address) +{ +#ifdef LOGERROR + error("Z80 bank unused read %06X (%x)\n", address, Z80.pc.d); +#endif + return 0xFF; +} + +void zbank_unused_w(unsigned int address, unsigned int data) +{ +#ifdef LOGERROR + error("Z80 bank unused write %06X = %02X (%x)\n", address, data, Z80.pc.d); +#endif +} + +unsigned int zbank_lockup_r(unsigned int address) +{ +#ifdef LOGERROR + error("Z80 bank lockup read %06X (%x)\n", address, Z80.pc.d); +#endif + if (!config.force_dtack) + { + Z80.cycles = 0xFFFFFFFF; + zstate = 0; + } + return 0xFF; +} + +void zbank_lockup_w(unsigned int address, unsigned int data) +{ +#ifdef LOGERROR + error("Z80 bank lockup write %06X = %02X (%x)\n", address, data, Z80.pc.d); +#endif + if (!config.force_dtack) + { + Z80.cycles = 0xFFFFFFFF; + zstate = 0; + } +} + +/* I/O & Control registers */ +unsigned int zbank_read_ctrl_io(unsigned int address) +{ + switch ((address >> 8) & 0xFF) + { + case 0x00: /* I/O chip */ + { + if (!(address & 0xE0)) + { + return (io_68k_read((address >> 1) & 0x0F)); + } + return zbank_unused_r(address); + } + + case 0x11: /* BUSACK */ + { + if (address & 1) + { + return zbank_unused_r(address); + } + return 0xFF; + } + + case 0x30: /* TIME */ + { + if (cart.hw.time_r) + { + unsigned int data = cart.hw.time_r(address); + if (address & 1) + { + return (data & 0xFF); + } + return (data >> 8); + } + return zbank_unused_r(address); + } + + case 0x41: /* OS ROM */ + { + if (address & 1) + { + return (gen_bankswitch_r() | 0xFE); + } + return zbank_unused_r(address); + } + + case 0x10: /* MEMORY MODE */ + case 0x12: /* RESET */ + case 0x20: /* MEGA-CD */ + case 0x40: /* TMSS */ + case 0x44: /* RADICA */ + case 0x50: /* SVP REGISTERS */ + { + return zbank_unused_r(address); + } + + default: /* Invalid address */ + { + return zbank_lockup_r(address); + } + } +} + +void zbank_write_ctrl_io(unsigned int address, unsigned int data) +{ + switch ((address >> 8) & 0xFF) + { + case 0x00: /* I/O chip */ + { + /* get /LWR only */ + if ((address & 0xE1) == 0x01) + { + io_68k_write((address >> 1) & 0x0F, data); + return; + } + zbank_unused_w(address, data); + return; + } + + case 0x11: /* BUSREQ */ + { + if (!(address & 1)) + { + gen_zbusreq_w(data & 1, Z80.cycles); + return; + } + zbank_unused_w(address, data); + return; + } + + case 0x12: /* RESET */ + { + if (!(address & 1)) + { + gen_zreset_w(data & 1, Z80.cycles); + return; + } + zbank_unused_w(address, data); + return; + } + + case 0x30: /* TIME */ + { + cart.hw.time_w(address, data); + return; + } + + case 0x41: /* OS ROM */ + { + if ((config.bios & 1) && (address & 1)) + { + gen_bankswitch_w(data & 1); + return; + } + zbank_unused_w(address, data); + return; + } + + case 0x10: /* MEMORY MODE */ + case 0x20: /* MEGA-CD */ + case 0x40: /* TMSS */ + case 0x44: /* RADICA */ + case 0x50: /* SVP REGISTERS */ + { + zbank_unused_w(address, data); + return; + } + + default: /* Invalid address */ + { + zbank_lockup_w(address, data); + return; + } + } +} + + +/* VDP */ +unsigned int zbank_read_vdp(unsigned int address) +{ + switch (address & 0xFD) + { + case 0x00: /* DATA */ + { + return (vdp_68k_data_r() >> 8); + } + + case 0x01: /* DATA */ + { + return (vdp_68k_data_r() & 0xFF); + } + + case 0x04: /* CTRL */ + { + return (((vdp_68k_ctrl_r(Z80.cycles) >> 8) & 3) | 0xFC); + } + + case 0x05: /* CTRL */ + { + return (vdp_68k_ctrl_r(Z80.cycles) & 0xFF); + } + + case 0x08: /* HVC */ + case 0x0C: + { + return (vdp_hvc_r(Z80.cycles) >> 8); + } + + case 0x09: /* HVC */ + case 0x0D: + { + return (vdp_hvc_r(Z80.cycles) & 0xFF); + } + + case 0x18: /* Unused */ + case 0x19: + case 0x1C: + case 0x1D: + { + return zbank_unused_r(address); + } + + default: /* Invalid address */ + { + return zbank_lockup_r(address); + } + } +} + +void zbank_write_vdp(unsigned int address, unsigned int data) +{ + switch (address & 0xFC) + { + case 0x00: /* Data port */ + { + vdp_68k_data_w(data << 8 | data); + return; + } + + case 0x04: /* Control port */ + { + vdp_68k_ctrl_w(data << 8 | data); + return; + } + + case 0x10: /* PSG */ + case 0x14: + { + if (address & 1) + { + SN76489_Write(Z80.cycles, data); + return; + } + zbank_unused_w(address, data); + return; + } + + case 0x18: /* Unused */ + { + zbank_unused_w(address, data); + return; + } + + case 0x1C: /* TEST register */ + { + vdp_test_w(data << 8 | data); + return; + } + + default: /* Invalid address */ + { + zbank_lockup_w(address, data); + return; + } + } +} diff --git a/genplus-gx/core/membnk.h b/genplus-gx/core/membnk.h new file mode 100644 index 0000000000..b4b242e2e0 --- /dev/null +++ b/genplus-gx/core/membnk.h @@ -0,0 +1,58 @@ +/*************************************************************************************** + * Genesis Plus + * Z80 bank access to 68k bus + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code) + * Copyright (C) 2007-2012 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _MEMBNK_H_ +#define _MEMBNK_H_ + +extern unsigned int zbank_unused_r(unsigned int address); +extern void zbank_unused_w(unsigned int address, unsigned int data); +extern unsigned int zbank_lockup_r(unsigned int address); +extern void zbank_lockup_w(unsigned int address, unsigned int data); +extern unsigned int zbank_read_ctrl_io(unsigned int address); +extern void zbank_write_ctrl_io(unsigned int address, unsigned int data); +extern unsigned int zbank_read_vdp(unsigned int address); +extern void zbank_write_vdp(unsigned int address, unsigned int data); + +struct _zbank_memory_map +{ + unsigned int (*read)(unsigned int address); + void (*write)(unsigned int address, unsigned int data); +} zbank_memory_map[256]; + +#endif /* _MEMBNK_H_ */ diff --git a/genplus-gx/core/memz80.c b/genplus-gx/core/memz80.c new file mode 100644 index 0000000000..3a5d9b291e --- /dev/null +++ b/genplus-gx/core/memz80.c @@ -0,0 +1,682 @@ +/*************************************************************************************** + * Genesis Plus + * Z80 bus handlers (Genesis & Master System modes) + * + * Support for SG-1000, Mark-III, Master System, Game Gear & Mega Drive ports access + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code) + * Copyright (C) 2007-2011 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + + +/*--------------------------------------------------------------------------*/ +/* Handlers for access to unused addresses and those which make the */ +/* machine lock up. */ +/*--------------------------------------------------------------------------*/ + +INLINE void z80_unused_w(unsigned int address, unsigned char data) +{ +#ifdef LOGERROR + error("Z80 unused write %04X = %02X (%x)\n", address, data, Z80.pc.w.l); +#endif +} + +INLINE unsigned char z80_unused_r(unsigned int address) +{ +#ifdef LOGERROR + error("Z80 unused read %04X (%x)\n", address, Z80.pc.w.l); +#endif + return 0xFF; +} + +INLINE void z80_lockup_w(unsigned int address, unsigned char data) +{ +#ifdef LOGERROR + error("Z80 lockup write %04X = %02X (%x)\n", address, data, Z80.pc.w.l); +#endif + if (!config.force_dtack) + { + Z80.cycles = 0xFFFFFFFF; + zstate = 0; + } +} + +INLINE unsigned char z80_lockup_r(unsigned int address) +{ +#ifdef LOGERROR + error("Z80 lockup read %04X (%x)\n", address, Z80.pc.w.l); +#endif + if (!config.force_dtack) + { + Z80.cycles = 0xFFFFFFFF; + zstate = 0; + } + return 0xFF; +} + + +/*--------------------------------------------------------------------------*/ +/* Z80 Memory handlers (Genesis mode) */ +/*--------------------------------------------------------------------------*/ + +unsigned char z80_memory_r(unsigned int address) +{ + switch((address >> 13) & 7) + { + case 0: /* $0000-$3FFF: Z80 RAM (8K mirrored) */ + case 1: + { + return zram[address & 0x1FFF]; + } + + case 2: /* $4000-$5FFF: YM2612 */ + { + return fm_read(Z80.cycles, address & 3); + } + + case 3: /* $7F00-$7FFF: VDP */ + { + if ((address >> 8) == 0x7F) + { + return (*zbank_memory_map[0xc0].read)(address); + } + return z80_unused_r(address); + } + + default: /* $8000-$FFFF: 68k bank (32K) */ + { + address = zbank | (address & 0x7FFF); + if (zbank_memory_map[address >> 16].read) + { + return (*zbank_memory_map[address >> 16].read)(address); + } + return READ_BYTE(m68k.memory_map[address >> 16].base, address & 0xFFFF); + } + } +} + + +void z80_memory_w(unsigned int address, unsigned char data) +{ + switch((address >> 13) & 7) + { + case 0: /* $0000-$3FFF: Z80 RAM (8K mirrored) */ + case 1: + { + zram[address & 0x1FFF] = data; + return; + } + + case 2: /* $4000-$5FFF: YM2612 */ + { + fm_write(Z80.cycles, address & 3, data); + return; + } + + case 3: /* Bank register and VDP */ + { + switch(address >> 8) + { + case 0x60: /* $6000-$60FF: Bank register */ + { + gen_zbank_w(data & 1); + return; + } + + case 0x7F: /* $7F00-$7FFF: VDP */ + { + (*zbank_memory_map[0xc0].write)(address, data); + return; + } + + default: + { + z80_unused_w(address, data); + return; + } + } + } + + default: /* $8000-$FFFF: 68k bank (32K) */ + { + address = zbank | (address & 0x7FFF); + if (zbank_memory_map[address >> 16].write) + { + (*zbank_memory_map[address >> 16].write)(address, data); + return; + } + WRITE_BYTE(m68k.memory_map[address >> 16].base, address & 0xFFFF, data); + return; + } + } +} + +/*--------------------------------------------------------------------------*/ +/* Unused Port handlers */ +/* */ +/* Ports are unused when not in Mark III compatibility mode. */ +/* */ +/* Genesis games that access ports anyway: */ +/* Thunder Force IV reads port $BF in it's interrupt handler. */ +/* */ +/*--------------------------------------------------------------------------*/ + +unsigned char z80_unused_port_r(unsigned int port) +{ +#if LOGERROR + error("Z80 unused read from port %04X (%x)\n", port, Z80.pc.w.l); +#endif + if (system_hw == SYSTEM_SMS) + { + unsigned int address = (Z80.pc.w.l - 1) & 0xFFFF; + return z80_readmap[address >> 10][address & 0x3FF]; + } + return 0xFF; +} + +void z80_unused_port_w(unsigned int port, unsigned char data) +{ +#if LOGERROR + error("Z80 unused write to port %04X = %02X (%x)\n", port, data, Z80.pc.w.l); +#endif +} + +/*--------------------------------------------------------------------------*/ +/* MegaDrive / Genesis port handlers (Master System compatibility mode) */ +/*--------------------------------------------------------------------------*/ + +void z80_md_port_w(unsigned int port, unsigned char data) +{ + switch (port & 0xC1) + { + case 0x01: + { + io_z80_write(1, data, Z80.cycles + PBC_CYCLE_OFFSET); + return; + } + + case 0x40: + case 0x41: + { + SN76489_Write(Z80.cycles, data); + return; + } + + case 0x80: + { + vdp_z80_data_w(data); + return; + } + + case 0x81: + { + vdp_z80_ctrl_w(data); + return; + } + + default: + { + port &= 0xFF; + + if ((port >= 0xF0) && (config.ym2413 & 1)) + { + fm_write(Z80.cycles, port&3, data); + return; + } + + z80_unused_port_w(port, data); + return; + } + } +} + +unsigned char z80_md_port_r(unsigned int port) +{ + switch (port & 0xC1) + { + case 0x40: + { + return ((vdp_hvc_r(Z80.cycles - 15) >> 8) & 0xFF); + } + + case 0x41: + { + return (vdp_hvc_r(Z80.cycles - 15) & 0xFF); + } + + case 0x80: + { + return vdp_z80_data_r(); + } + + case 0x81: + { + return vdp_z80_ctrl_r(Z80.cycles); + } + + default: + { + port &= 0xFF; + + if ((port == 0xC0) || (port == 0xC1) || (port == 0xDC) || (port == 0xDD)) + { + return io_z80_read(port & 1); + } + + /* read FM chip if enabled */ + if ((port >= 0xF0) && (config.ym2413 & 1)) + { + return YM2413Read(port & 3); + } + + return z80_unused_port_r(port); + } + } +} + + +/*--------------------------------------------------------------------------*/ +/* Game Gear port handlers */ +/*--------------------------------------------------------------------------*/ + +void z80_gg_port_w(unsigned int port, unsigned char data) +{ + switch(port & 0xC1) + { + case 0x00: + case 0x01: + { + port &= 0xFF; + + if (port < 0x07) + { + if (system_hw == SYSTEM_GG) + { + io_gg_write(port, data); + return; + } + + z80_unused_port_w(port & 0xFF, data); + return; + } + + io_z80_write(port & 1, data, Z80.cycles + SMS_CYCLE_OFFSET); + return; + } + + case 0x40: + case 0x41: + { + SN76489_Write(Z80.cycles, data); + return; + } + + case 0x80: + { + vdp_z80_data_w(data); + return; + } + + case 0x81: + { + vdp_sms_ctrl_w(data); + return; + } + + default: + { + z80_unused_port_w(port & 0xFF, data); + return; + } + } +} + +unsigned char z80_gg_port_r(unsigned int port) +{ + switch(port & 0xC1) + { + case 0x00: + case 0x01: + { + port &= 0xFF; + + if (port < 0x07) + { + if (system_hw == SYSTEM_GG) + { + return io_gg_read(port); + } + } + + return z80_unused_port_r(port); + } + + case 0x40: + { + return ((vdp_hvc_r(Z80.cycles) >> 8) & 0xFF); + } + + case 0x41: + { + return (vdp_hvc_r(Z80.cycles) & 0xFF); + } + + case 0x80: + { + return vdp_z80_data_r(); + } + + case 0x81: + { + return vdp_z80_ctrl_r(Z80.cycles); + } + + default: + { + port &= 0xFF; + + if ((port == 0xC0) || (port == 0xC1) || (port == 0xDC) || (port == 0xDD)) + { + return io_z80_read(port & 1); + } + + return z80_unused_port_r(port); + } + } +} + + +/*--------------------------------------------------------------------------*/ +/* Master System port handlers */ +/*--------------------------------------------------------------------------*/ + +void z80_ms_port_w(unsigned int port, unsigned char data) +{ + switch (port & 0xC1) + { + case 0x00: + case 0x01: + { + io_z80_write(port & 1, data, Z80.cycles + SMS_CYCLE_OFFSET); + return; + } + + case 0x40: + case 0x41: + { + SN76489_Write(Z80.cycles, data); + return; + } + + case 0x80: + { + vdp_z80_data_w(data); + return; + } + + case 0x81: + { + vdp_sms_ctrl_w(data); + return; + } + + default: + { + if (!(port & 4) && (config.ym2413 & 1)) + { + fm_write(Z80.cycles, port & 3, data); + return; + } + + z80_unused_port_w(port & 0xFF, data); + return; + } + } +} + +unsigned char z80_ms_port_r(unsigned int port) +{ + switch (port & 0xC1) + { + case 0x00: + case 0x01: + { + return z80_unused_port_r(port & 0xFF); + } + + case 0x40: + { + return ((vdp_hvc_r(Z80.cycles) >> 8) & 0xFF); + } + + case 0x41: + { + return (vdp_hvc_r(Z80.cycles) & 0xFF); + } + + case 0x80: + { + return vdp_z80_data_r(); + } + + case 0x81: + { + return vdp_z80_ctrl_r(Z80.cycles); + } + + default: + { + /* read FM chip if enabled */ + if (!(port & 4) && (config.ym2413 & 1)) + { + /* check if I/O ports are disabled */ + if (io_reg[0x0E] & 0x04) + { + return YM2413Read(port & 3); + } + else + { + return YM2413Read(port & 3) & io_z80_read(port & 1); + } + } + + /* check if I/O ports are enabled */ + if (!(io_reg[0x0E] & 0x04)) + { + return io_z80_read(port & 1); + } + + return z80_unused_port_r(port & 0xFF); + } + } +} + + +/*--------------------------------------------------------------------------*/ +/* Mark III port handlers */ +/*--------------------------------------------------------------------------*/ + +void z80_m3_port_w(unsigned int port, unsigned char data) +{ + switch (port & 0xC1) + { + case 0x00: + case 0x01: + { + z80_unused_port_w(port, data); + return; + } + + case 0x40: + case 0x41: + { + SN76489_Write(Z80.cycles, data); + return; + } + + case 0x80: + { + vdp_z80_data_w(data); + return; + } + + case 0x81: + { + vdp_sms_ctrl_w(data); + return; + } + + default: + { + if (!(port & 4) && (config.ym2413 & 1)) + { + fm_write(Z80.cycles, port & 3, data); + return; + } + + z80_unused_port_w(port & 0xFF, data); + return; + } + } +} + +unsigned char z80_m3_port_r(unsigned int port) +{ + switch (port & 0xC1) + { + case 0x00: + case 0x01: + { + return z80_unused_port_r(port & 0xFF); + } + + case 0x40: + { + return ((vdp_hvc_r(Z80.cycles) >> 8) & 0xFF); + } + + case 0x41: + { + return (vdp_hvc_r(Z80.cycles) & 0xFF); + } + + case 0x80: + { + return vdp_z80_data_r(); + } + + case 0x81: + { + return vdp_z80_ctrl_r(Z80.cycles); + } + + default: + { + /* read FM chip if enabled */ + if (!(port & 4) && (config.ym2413 & 1)) + { + /* I/O ports are automatically disabled */ + return YM2413Read(port & 3); + } + + /* read I/O ports */ + return io_z80_read(port & 1); + } + } +} + + +/*--------------------------------------------------------------------------*/ +/* SG-1000 port handlers */ +/*--------------------------------------------------------------------------*/ + +void z80_sg_port_w(unsigned int port, unsigned char data) +{ + switch(port & 0xC1) + { + case 0x40: + case 0x41: + { + SN76489_Write(Z80.cycles, data); + return; + } + + case 0x80: + { + vdp_z80_data_w(data); + return; + } + + case 0x81: + { + vdp_tms_ctrl_w(data); + return; + } + + default: + { + z80_unused_port_w(port & 0xFF, data); + return; + } + } +} + +unsigned char z80_sg_port_r(unsigned int port) +{ + switch (port & 0xC1) + { + case 0x80: + { + return vdp_z80_data_r(); + } + + case 0x81: + { + return vdp_z80_ctrl_r(Z80.cycles); + } + + case 0xC0: + case 0xC1: + { + return io_z80_read(port & 1); + } + + default: + { + return z80_unused_port_r(port); + } + } +} diff --git a/genplus-gx/core/memz80.h b/genplus-gx/core/memz80.h new file mode 100644 index 0000000000..27207f33e7 --- /dev/null +++ b/genplus-gx/core/memz80.h @@ -0,0 +1,60 @@ +/*************************************************************************************** + * Genesis Plus + * Z80 bus handlers (Genesis & Master System modes) + * + * Support for SG-1000, Mark-III, Master System, Game Gear & Mega Drive ports access + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code) + * Copyright (C) 2007-2011 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _MEMZ80_H_ +#define _MEMZ80_H_ + +extern unsigned char z80_memory_r(unsigned int address); +extern void z80_memory_w(unsigned int address, unsigned char data); +extern unsigned char z80_unused_port_r(unsigned int port); +extern void z80_unused_port_w(unsigned int port, unsigned char data); +extern unsigned char z80_md_port_r(unsigned int port); +extern void z80_md_port_w(unsigned int port, unsigned char data); +extern unsigned char z80_gg_port_r(unsigned int port); +extern void z80_gg_port_w(unsigned int port, unsigned char data); +extern unsigned char z80_ms_port_r(unsigned int port); +extern void z80_ms_port_w(unsigned int port, unsigned char data); +extern unsigned char z80_m3_port_r(unsigned int port); +extern void z80_m3_port_w(unsigned int port, unsigned char data); +extern unsigned char z80_sg_port_r(unsigned int port); +extern void z80_sg_port_w(unsigned int port, unsigned char data); + +#endif /* _MEMZ80_H_ */ diff --git a/genplus-gx/core/ntsc/changes.txt b/genplus-gx/core/ntsc/changes.txt new file mode 100644 index 0000000000..7fd8b4f985 --- /dev/null +++ b/genplus-gx/core/ntsc/changes.txt @@ -0,0 +1,96 @@ +sms_ntsc Change Log +------------------- + +sms_ntsc 0.2.3 +-------------- +- Moved configuration options to sms_ntsc_config.h, making it easier to +manage + +- Greatly clarified and improved demo to read any uncompressed BMP image +and write filtered image when done + +- Improved gamma to be properly applied to each RGB channel, and changed +default to compensate for difference between PC monitor and TV gamma + +- Improved contrast to be properly applied to each RGB channel rather +than just luma + +- Improved floating point calculations in library to be more stable and +not need double precision, which was causing problems with the sharpness +control on Windows when the DirectX libraries changed the FPU to single +precision mode + +- Added extern "C" to header, allowing use in C++ without having to +rename the source file + +- Made internal changes to factor out code common from all my NTSC +filter libraries, greatly simplifying things for me + + +sms_ntsc 0.2.2 +-------------- +- Changed sms_ntsc_blit() again, this time to always take a pixel count +for input pitch (since the type is known) and a byte count for the +output pitch (since it can output at multiple depths now). I think I've +got the right interface this time. :) + +- Improved default blitter to have selectable input and output pixel +formats + +- Added parameters for resolution, color bleed, and artifacts + +- Added presets for composite video, S-video, RGB, and monochrome + +- Added SMS_NTSC_OUT_WIDTH() and SMS_NTSC_IN_WIDTH() for calculating +input/output widths + +- Improved demo with more controls and interpolation and darkening of +scanlines rather than duplicating them + +- Improved documentation + +- Interface changes: sms_ntsc_blit() takes output pitch in bytes again. +Sorry for the multiple changes; I think I got it right this time. :) + +- Removed: SMS_NTSC_CALC_WIDTH (use SMS_NTSC_OUT_WIDTH) + + +sms_ntsc 0.2.1 +-------------- +- Added parameters for color fringing and edge artifacts + + +sms_ntsc 0.2.0 +-------------- +- Changed sms_ntsc_blit() to take pixel counts instead of byte counts +for in_pitch and out_pitch, making it simpler to use. This requires that +current code be updated. + +- Significantly improved NTSC signal processing to give clearer image +and better sharpness control + +- Reduced scrolling shimmer and color artifacts to be closer to what +console generates + +- Added gamma curve parameter to allow better matching of darker colors +on a TV + +- Added ability to generate matching RGB palette for use in a normal +blitter + + +sms_ntsc 0.1.1 +-------------- +- Changed sms_ntsc_blit() to accept 12-bit BGR pixels instead of palette +indicies and a separate palette. + +- Improved sms_ntsc_blit() to accept any input width, allowing all the +different screen widths to be handled without complication. Use +SMS_NTSC_CALC_WIDTH() to find the output width for a given input width. + +- Added toggling of left 8 column display to demo + + +sms_ntsc 0.1.0 +-------------- +- First version diff --git a/genplus-gx/core/ntsc/license.txt b/genplus-gx/core/ntsc/license.txt new file mode 100644 index 0000000000..5faba9d48c --- /dev/null +++ b/genplus-gx/core/ntsc/license.txt @@ -0,0 +1,504 @@ + GNU LESSER GENERAL PUBLIC LICENSE + Version 2.1, February 1999 + + Copyright (C) 1991, 1999 Free Software Foundation, Inc. + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + Everyone is permitted to copy and distribute verbatim copies + of this license document, but changing it is not allowed. + +[This is the first released version of the Lesser GPL. It also counts + as the successor of the GNU Library Public License, version 2, hence + the version number 2.1.] + + Preamble + + The licenses for most software are designed to take away your +freedom to share and change it. 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Here is a sample; alter the names: + + Yoyodyne, Inc., hereby disclaims all copyright interest in the + library `Frob' (a library for tweaking knobs) written by James Random Hacker. + + , 1 April 1990 + Ty Coon, President of Vice + +That's all there is to it! + + diff --git a/genplus-gx/core/ntsc/md_ntsc.c b/genplus-gx/core/ntsc/md_ntsc.c new file mode 100644 index 0000000000..3859cfd58b --- /dev/null +++ b/genplus-gx/core/ntsc/md_ntsc.c @@ -0,0 +1,143 @@ +/* md_ntsc 0.1.2. http://www.slack.net/~ant/ */ + +/* Modified for use with Genesis Plus GX -- EkeEke */ + +#include "shared.h" +#include "md_ntsc.h" + +/* Copyright (C) 2006 Shay Green. This module is free software; you +can redistribute it and/or modify it under the terms of the GNU Lesser +General Public License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. This +module is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS +FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more +details. You should have received a copy of the GNU Lesser General Public +License along with this module; if not, write to the Free Software Foundation, +Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */ + +md_ntsc_setup_t const md_ntsc_monochrome = { 0,-1, 0, 0,.2, 0, 0,-.2,-.2,-1, 0, 0 }; +md_ntsc_setup_t const md_ntsc_composite = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; +md_ntsc_setup_t const md_ntsc_svideo = { 0, 0, 0, 0, 0, 0,.2, -1, -1, 0, 0, 0 }; +md_ntsc_setup_t const md_ntsc_rgb = { 0, 0, 0, 0,.2, 0,.7, -1, -1,-1, 0, 0 }; + +#define alignment_count 2 +#define burst_count 1 +#define rescale_in 1 +#define rescale_out 1 + +#define artifacts_mid 0.40f +#define fringing_mid 0.30f +#define std_decoder_hue 0 + +#define gamma_size 8 +#define artifacts_max 1.00f +#define LUMA_CUTOFF 0.1974 + +#include "md_ntsc_impl.h" + +/* 2 input pixels -> 4 composite samples */ +pixel_info_t const md_ntsc_pixels [alignment_count] = { + { PIXEL_OFFSET( -4, -9 ), { 0.1f, 0.9f, 0.9f, 0.1f } }, + { PIXEL_OFFSET( -2, -7 ), { 0.1f, 0.9f, 0.9f, 0.1f } }, +}; + +static void correct_errors( md_ntsc_rgb_t color, md_ntsc_rgb_t* out ) +{ + unsigned i; + for ( i = 0; i < rgb_kernel_size / 4; i++ ) + { + md_ntsc_rgb_t error = color - + out [i ] - out [i + 2 +16] - out [i + 4 ] - out [i + 6 +16] - + out [i + 8] - out [(i+10)%16+16] - out [(i+12)%16] - out [(i+14)%16+16]; + CORRECT_ERROR( i + 6 + 16 ); + /*DISTRIBUTE_ERROR( 2+16, 4, 6+16 );*/ + } +} + +void md_ntsc_init( md_ntsc_t* ntsc, md_ntsc_setup_t const* setup ) +{ + int entry; + init_t impl; + if ( !setup ) + setup = &md_ntsc_composite; + init( &impl, setup ); + + for ( entry = 0; entry < md_ntsc_palette_size; entry++ ) + { + float bb = impl.to_float [entry >> 6 & 7]; + float gg = impl.to_float [entry >> 3 & 7]; + float rr = impl.to_float [entry & 7]; + + float y, i, q = RGB_TO_YIQ( rr, gg, bb, y, i ); + + int r, g, b = YIQ_TO_RGB( y, i, q, impl.to_rgb, int, r, g ); + md_ntsc_rgb_t rgb = PACK_RGB( r, g, b ); + + if ( setup->palette_out ) + RGB_PALETTE_OUT( rgb, &setup->palette_out [entry * 3] ); + + if ( ntsc ) + { + gen_kernel( &impl, y, i, q, ntsc->table [entry] ); + correct_errors( rgb, ntsc->table [entry] ); + } + } +} + +#ifndef CUSTOM_BLITTER +void md_ntsc_blit( md_ntsc_t const* ntsc, MD_NTSC_IN_T const* table, unsigned char* input, + int in_width, int vline) +{ + int const chunk_count = in_width / md_ntsc_in_chunk - 1; + + /* use palette entry 0 for unused pixels */ + MD_NTSC_IN_T border = table[0]; + + MD_NTSC_BEGIN_ROW( ntsc, border, + MD_NTSC_ADJ_IN( table[*input++] ), + MD_NTSC_ADJ_IN( table[*input++] ), + MD_NTSC_ADJ_IN( table[*input++] ) ); + + md_ntsc_out_t* restrict line_out = (md_ntsc_out_t*)(&bitmap.data[(vline * bitmap.pitch)]); + + int n; + + for ( n = chunk_count; n; --n ) + { + /* order of input and output pixels must not be altered */ + MD_NTSC_COLOR_IN( 0, ntsc, MD_NTSC_ADJ_IN( table[*input++] ) ); + MD_NTSC_RGB_OUT( 0, *line_out++ ); + MD_NTSC_RGB_OUT( 1, *line_out++ ); + + MD_NTSC_COLOR_IN( 1, ntsc, MD_NTSC_ADJ_IN( table[*input++] ) ); + MD_NTSC_RGB_OUT( 2, *line_out++ ); + MD_NTSC_RGB_OUT( 3, *line_out++ ); + + MD_NTSC_COLOR_IN( 2, ntsc, MD_NTSC_ADJ_IN( table[*input++] ) ); + MD_NTSC_RGB_OUT( 4, *line_out++ ); + MD_NTSC_RGB_OUT( 5, *line_out++ ); + + MD_NTSC_COLOR_IN( 3, ntsc, MD_NTSC_ADJ_IN( table[*input++] ) ); + MD_NTSC_RGB_OUT( 6, *line_out++ ); + MD_NTSC_RGB_OUT( 7, *line_out++ ); + } + + /* finish final pixels */ + MD_NTSC_COLOR_IN( 0, ntsc, MD_NTSC_ADJ_IN( table[*input++] ) ); + MD_NTSC_RGB_OUT( 0, *line_out++ ); + MD_NTSC_RGB_OUT( 1, *line_out++ ); + + MD_NTSC_COLOR_IN( 1, ntsc, border ); + MD_NTSC_RGB_OUT( 2, *line_out++ ); + MD_NTSC_RGB_OUT( 3, *line_out++ ); + + MD_NTSC_COLOR_IN( 2, ntsc, border ); + MD_NTSC_RGB_OUT( 4, *line_out++ ); + MD_NTSC_RGB_OUT( 5, *line_out++ ); + + MD_NTSC_COLOR_IN( 3, ntsc, border ); + MD_NTSC_RGB_OUT( 6, *line_out++ ); + MD_NTSC_RGB_OUT( 7, *line_out++ ); +} +#endif diff --git a/genplus-gx/core/ntsc/md_ntsc.h b/genplus-gx/core/ntsc/md_ntsc.h new file mode 100644 index 0000000000..d2c6350728 --- /dev/null +++ b/genplus-gx/core/ntsc/md_ntsc.h @@ -0,0 +1,154 @@ +/* Sega Genesis/Mega Drive NTSC video filter */ + +/* md_ntsc 0.1.2 */ +#ifndef MD_NTSC_H +#define MD_NTSC_H + +#include "md_ntsc_config.h" + +#ifdef __cplusplus + extern "C" { +#endif + +/* Image parameters, ranging from -1.0 to 1.0. Actual internal values shown +in parenthesis and should remain fairly stable in future versions. */ +typedef struct md_ntsc_setup_t +{ + /* Basic parameters */ + double hue; /* -1 = -180 degrees +1 = +180 degrees */ + double saturation; /* -1 = grayscale (0.0) +1 = oversaturated colors (2.0) */ + double contrast; /* -1 = dark (0.5) +1 = light (1.5) */ + double brightness; /* -1 = dark (0.5) +1 = light (1.5) */ + double sharpness; /* edge contrast enhancement/blurring */ + + /* Advanced parameters */ + double gamma; /* -1 = dark (1.5) +1 = light (0.5) */ + double resolution; /* image resolution */ + double artifacts; /* artifacts caused by color changes */ + double fringing; /* color artifacts caused by brightness changes */ + double bleed; /* color bleed (color resolution reduction) */ + float const* decoder_matrix; /* optional RGB decoder matrix, 6 elements */ + + unsigned char* palette_out; /* optional RGB palette out, 3 bytes per color */ +} md_ntsc_setup_t; + +/* Video format presets */ +extern md_ntsc_setup_t const md_ntsc_composite; /* color bleeding + artifacts */ +extern md_ntsc_setup_t const md_ntsc_svideo; /* color bleeding only */ +extern md_ntsc_setup_t const md_ntsc_rgb; /* crisp image */ +extern md_ntsc_setup_t const md_ntsc_monochrome;/* desaturated + artifacts */ + +enum { md_ntsc_palette_size = 512 }; + +/* Initializes and adjusts parameters. Can be called multiple times on the same +md_ntsc_t object. Can pass NULL for either parameter. */ +typedef struct md_ntsc_t md_ntsc_t; +void md_ntsc_init( md_ntsc_t* ntsc, md_ntsc_setup_t const* setup ); + +/* Filters one row of pixels. Input pixel format is set by MD_NTSC_IN_FORMAT +and output RGB depth is set by MD_NTSC_OUT_DEPTH. Both default to 16-bit RGB. +In_row_width is the number of pixels to get to the next input row. */ +void md_ntsc_blit( md_ntsc_t const* ntsc, MD_NTSC_IN_T const* table, unsigned char* input, + int in_width, int vline); + +/* Number of output pixels written by blitter for given input width. */ +#define MD_NTSC_OUT_WIDTH( in_width ) \ + (((in_width) - 3) / md_ntsc_in_chunk * md_ntsc_out_chunk + md_ntsc_out_chunk) + +/* Number of input pixels that will fit within given output width. Might be +rounded down slightly; use MD_NTSC_OUT_WIDTH() on result to find rounded +value. */ +#define MD_NTSC_IN_WIDTH( out_width ) \ + ((out_width) / md_ntsc_out_chunk * md_ntsc_in_chunk - md_ntsc_in_chunk + 3) + + +/* Interface for user-defined custom blitters */ + +enum { md_ntsc_in_chunk = 4 }; /* number of input pixels read per chunk */ +enum { md_ntsc_out_chunk = 8 }; /* number of output pixels generated per chunk */ +enum { md_ntsc_black = 0 }; /* palette index for black */ + +/* Begin outputting row and start three pixels. First pixel will be cut off a bit. +Declares variables, so must be before first statement in a block (unless you're using C++). */ +#define MD_NTSC_BEGIN_ROW( ntsc, pixel0, pixel1, pixel2, pixel3 ) \ + md_ntsc_rgb_t raw_;\ + unsigned const md_pixel0_ = (pixel0);\ + md_ntsc_rgb_t const* kernel0 = MD_NTSC_IN_FORMAT( ntsc, md_pixel0_ );\ + unsigned const md_pixel1_ = (pixel1);\ + md_ntsc_rgb_t const* kernel1 = MD_NTSC_IN_FORMAT( ntsc, md_pixel1_ );\ + unsigned const md_pixel2_ = (pixel2);\ + md_ntsc_rgb_t const* kernel2 = MD_NTSC_IN_FORMAT( ntsc, md_pixel2_ );\ + unsigned const md_pixel3_ = (pixel3);\ + md_ntsc_rgb_t const* kernel3 = MD_NTSC_IN_FORMAT( ntsc, md_pixel3_ );\ + md_ntsc_rgb_t const* kernelx0;\ + md_ntsc_rgb_t const* kernelx1 = kernel0;\ + md_ntsc_rgb_t const* kernelx2 = kernel0;\ + md_ntsc_rgb_t const* kernelx3 = kernel0 + +/* Begin input pixel */ +#define MD_NTSC_COLOR_IN( index, ntsc, color ) \ + MD_NTSC_COLOR_IN_( index, color, MD_NTSC_IN_FORMAT, ntsc ) + +/* Generate output pixel */ +#define MD_NTSC_RGB_OUT( x, rgb_out ) {\ + raw_ =\ + kernel0 [x+ 0] + kernel1 [(x+6)%8+16] + kernel2 [(x+4)%8 ] + kernel3 [(x+2)%8+16] +\ + kernelx0 [x+ 8] + kernelx1 [(x+6)%8+24] + kernelx2 [(x+4)%8+8] + kernelx3 [(x+2)%8+24];\ + MD_NTSC_CLAMP_( raw_, 0 );\ + MD_NTSC_RGB_OUT_( rgb_out, 0 );\ +} + + +/* private */ +enum { md_ntsc_entry_size = 2 * 16 }; +typedef unsigned long md_ntsc_rgb_t; +struct md_ntsc_t { + md_ntsc_rgb_t table [md_ntsc_palette_size] [md_ntsc_entry_size]; +}; + +#define MD_NTSC_BGR9( ntsc, n ) (ntsc)->table [n & 0x1FF] + +#define MD_NTSC_RGB16( ntsc, n ) \ + (md_ntsc_rgb_t*) ((char*) (ntsc)->table +\ + ((n << 9 & 0x3800) | (n & 0x0700) | (n >> 8 & 0x00E0)) *\ + (md_ntsc_entry_size * sizeof (md_ntsc_rgb_t) / 32)) + +#define MD_NTSC_RGB15( ntsc, n ) \ + (md_ntsc_rgb_t*) ((char*) (ntsc)->table +\ + ((n << 8 & 0x1C00) | (n & 0x0380) | (n >> 8 & 0x0070)) *\ + (md_ntsc_entry_size * sizeof (md_ntsc_rgb_t) / 16)) + +/* common ntsc macros */ +#define md_ntsc_rgb_builder ((1L << 21) | (1 << 11) | (1 << 1)) +#define md_ntsc_clamp_mask (md_ntsc_rgb_builder * 3 / 2) +#define md_ntsc_clamp_add (md_ntsc_rgb_builder * 0x101) +#define MD_NTSC_CLAMP_( io, shift ) {\ + md_ntsc_rgb_t sub = (io) >> (9-(shift)) & md_ntsc_clamp_mask;\ + md_ntsc_rgb_t clamp = md_ntsc_clamp_add - sub;\ + io |= clamp;\ + clamp -= sub;\ + io &= clamp;\ +} + +#define MD_NTSC_COLOR_IN_( index, color, ENTRY, table ) {\ + unsigned color_;\ + kernelx##index = kernel##index;\ + kernel##index = (color_ = (color), ENTRY( table, color_ ));\ +} + +/* x is always zero except in snes_ntsc library */ +#if MD_NTSC_OUT_DEPTH == 15 +#define MD_NTSC_RGB_OUT_( rgb_out, x ) {\ + rgb_out = (raw_>>(14-x)& 0x7C00)|(raw_>>(9-x)&0x03E0)|(raw_>>(4-x)&0x001F);\ + } +#elif MD_NTSC_OUT_DEPTH == 16 +#define MD_NTSC_RGB_OUT_( rgb_out, x ) {\ + rgb_out = (raw_>>(13-x)& 0xF800)|(raw_>>(8-x)&0x07E0)|(raw_>>(4-x)&0x001F);\ + } +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/genplus-gx/core/ntsc/md_ntsc_config.h b/genplus-gx/core/ntsc/md_ntsc_config.h new file mode 100644 index 0000000000..8864dde3f5 --- /dev/null +++ b/genplus-gx/core/ntsc/md_ntsc_config.h @@ -0,0 +1,31 @@ +/* Configure library by modifying this file */ + +#ifndef MD_NTSC_CONFIG_H +#define MD_NTSC_CONFIG_H + +/* Format of source & output pixels (RGB555 or RGB565 only)*/ +#ifdef USE_15BPP_RENDERING +#define MD_NTSC_IN_FORMAT MD_NTSC_RGB15 +#define MD_NTSC_OUT_DEPTH 15 +#else +#define MD_NTSC_IN_FORMAT MD_NTSC_RGB16 +#define MD_NTSC_OUT_DEPTH 16 +#endif + +/* Original CRAM format (not used) */ +/* #define MD_NTSC_IN_FORMAT MD_NTSC_BGR9 */ + +/* The following affect the built-in blitter only; a custom blitter can +handle things however it wants. */ + +/* Type of input pixel values (fixed to 16-bit) */ +#define MD_NTSC_IN_T unsigned short + +/* Each raw pixel input value is passed through this. You might want to mask +the pixel index if you use the high bits as flags, etc. */ +#define MD_NTSC_ADJ_IN( in ) in + +/* For each pixel, this is the basic operation: +output_color = MD_NTSC_ADJ_IN( MD_NTSC_IN_T ) */ + +#endif diff --git a/genplus-gx/core/ntsc/md_ntsc_impl.h b/genplus-gx/core/ntsc/md_ntsc_impl.h new file mode 100644 index 0000000000..274fb81c1b --- /dev/null +++ b/genplus-gx/core/ntsc/md_ntsc_impl.h @@ -0,0 +1,439 @@ +/* md_ntsc 0.1.2. http://www.slack.net/~ant/ */ + +/* Common implementation of NTSC filters */ + +#include +#include + +/* Copyright (C) 2006-2007 Shay Green. This module is free software; you +can redistribute it and/or modify it under the terms of the GNU Lesser +General Public License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. This +module is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS +FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more +details. You should have received a copy of the GNU Lesser General Public +License along with this module; if not, write to the Free Software Foundation, +Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */ + +#define DISABLE_CORRECTION 0 + +#undef PI +#define PI 3.14159265358979323846f + +#ifndef LUMA_CUTOFF + #define LUMA_CUTOFF 0.20 +#endif +#ifndef gamma_size + #define gamma_size 1 +#endif +#ifndef rgb_bits + #define rgb_bits 8 +#endif +#ifndef artifacts_max + #define artifacts_max (artifacts_mid * 1.5f) +#endif +#ifndef fringing_max + #define fringing_max (fringing_mid * 2) +#endif +#ifndef STD_HUE_CONDITION + #define STD_HUE_CONDITION( setup ) 1 +#endif + +#define ext_decoder_hue (std_decoder_hue + 15) +#define rgb_unit (1 << rgb_bits) +#define rgb_offset (rgb_unit * 2 + 0.5f) + +enum { burst_size = md_ntsc_entry_size / burst_count }; +enum { kernel_half = 16 }; +enum { kernel_size = kernel_half * 2 + 1 }; + +typedef struct init_t +{ + float to_rgb [burst_count * 6]; + float to_float [gamma_size]; + float contrast; + float brightness; + float artifacts; + float fringing; + float kernel [rescale_out * kernel_size * 2]; +} init_t; + +#define ROTATE_IQ( i, q, sin_b, cos_b ) {\ + float t;\ + t = i * cos_b - q * sin_b;\ + q = i * sin_b + q * cos_b;\ + i = t;\ +} + +static void init_filters( init_t* impl, md_ntsc_setup_t const* setup ) +{ +#if rescale_out > 1 + float kernels [kernel_size * 2]; +#else + float* const kernels = impl->kernel; +#endif + + /* generate luma (y) filter using sinc kernel */ + { + /* sinc with rolloff (dsf) */ + float const rolloff = 1 + (float) setup->sharpness * (float) 0.032; + float const maxh = 32; + float const pow_a_n = (float) pow( rolloff, maxh ); + float sum; + int i; + /* quadratic mapping to reduce negative (blurring) range */ + float to_angle = (float) setup->resolution + 1; + to_angle = PI / maxh * (float) LUMA_CUTOFF * (to_angle * to_angle + 1); + + kernels [kernel_size * 3 / 2] = maxh; /* default center value */ + for ( i = 0; i < kernel_half * 2 + 1; i++ ) + { + int x = i - kernel_half; + float angle = x * to_angle; + /* instability occurs at center point with rolloff very close to 1.0 */ + if ( x || pow_a_n > (float) 1.056 || pow_a_n < (float) 0.981 ) + { + float rolloff_cos_a = rolloff * (float) cos( angle ); + float num = 1 - rolloff_cos_a - + pow_a_n * (float) cos( maxh * angle ) + + pow_a_n * rolloff * (float) cos( (maxh - 1) * angle ); + float den = 1 - rolloff_cos_a - rolloff_cos_a + rolloff * rolloff; + float dsf = num / den; + kernels [kernel_size * 3 / 2 - kernel_half + i] = dsf - (float) 0.5; + } + } + + /* apply blackman window and find sum */ + sum = 0; + for ( i = 0; i < kernel_half * 2 + 1; i++ ) + { + float x = PI * 2 / (kernel_half * 2) * i; + float blackman = 0.42f - 0.5f * (float) cos( x ) + 0.08f * (float) cos( x * 2 ); + sum += (kernels [kernel_size * 3 / 2 - kernel_half + i] *= blackman); + } + + /* normalize kernel */ + sum = 1.0f / sum; + for ( i = 0; i < kernel_half * 2 + 1; i++ ) + { + int x = kernel_size * 3 / 2 - kernel_half + i; + kernels [x] *= sum; + assert( kernels [x] == kernels [x] ); /* catch numerical instability */ + } + } + + /* generate chroma (iq) filter using gaussian kernel */ + { + float const cutoff_factor = -0.03125f; + float cutoff = (float) setup->bleed; + int i; + + if ( cutoff < 0 ) + { + /* keep extreme value accessible only near upper end of scale (1.0) */ + cutoff *= cutoff; + cutoff *= cutoff; + cutoff *= cutoff; + cutoff *= -30.0f / 0.65f; + } + cutoff = cutoff_factor - 0.65f * cutoff_factor * cutoff; + + for ( i = -kernel_half; i <= kernel_half; i++ ) + kernels [kernel_size / 2 + i] = (float) exp( i * i * cutoff ); + + /* normalize even and odd phases separately */ + for ( i = 0; i < 2; i++ ) + { + float sum = 0; + int x; + for ( x = i; x < kernel_size; x += 2 ) + sum += kernels [x]; + + sum = 1.0f / sum; + for ( x = i; x < kernel_size; x += 2 ) + { + kernels [x] *= sum; + assert( kernels [x] == kernels [x] ); /* catch numerical instability */ + } + } + } + + /* + printf( "luma:\n" ); + for ( i = kernel_size; i < kernel_size * 2; i++ ) + printf( "%f\n", kernels [i] ); + printf( "chroma:\n" ); + for ( i = 0; i < kernel_size; i++ ) + printf( "%f\n", kernels [i] ); + */ + + /* generate linear rescale kernels */ + #if rescale_out > 1 + { + float weight = 1.0f; + float* out = impl->kernel; + int n = rescale_out; + do + { + float remain = 0; + int i; + weight -= 1.0f / rescale_in; + for ( i = 0; i < kernel_size * 2; i++ ) + { + float cur = kernels [i]; + float m = cur * weight; + *out++ = m + remain; + remain = cur - m; + } + } + while ( --n ); + } + #endif +} + +static float const default_decoder [6] = + { 0.956f, 0.621f, -0.272f, -0.647f, -1.105f, 1.702f }; + +static void init( init_t* impl, md_ntsc_setup_t const* setup ) +{ + impl->brightness = (float) setup->brightness * (0.5f * rgb_unit) + rgb_offset; + impl->contrast = (float) setup->contrast * (0.5f * rgb_unit) + rgb_unit; + #ifdef default_palette_contrast + if ( !setup->palette ) + impl->contrast *= default_palette_contrast; + #endif + + impl->artifacts = (float) setup->artifacts; + if ( impl->artifacts > 0 ) + impl->artifacts *= artifacts_max - artifacts_mid; + impl->artifacts = impl->artifacts * artifacts_mid + artifacts_mid; + + impl->fringing = (float) setup->fringing; + if ( impl->fringing > 0 ) + impl->fringing *= fringing_max - fringing_mid; + impl->fringing = impl->fringing * fringing_mid + fringing_mid; + + init_filters( impl, setup ); + + /* generate gamma table */ + if ( gamma_size > 1 ) + { + float const to_float = 1.0f / (gamma_size - (gamma_size > 1)); + float const gamma = 1.1333f - (float) setup->gamma * 0.5f; + /* match common PC's 2.2 gamma to TV's 2.65 gamma */ + int i; + for ( i = 0; i < gamma_size; i++ ) + impl->to_float [i] = + (float) pow( i * to_float, gamma ) * impl->contrast + impl->brightness; + } + + /* setup decoder matricies */ + { + float hue = (float) setup->hue * PI + PI / 180 * ext_decoder_hue; + float sat = (float) setup->saturation + 1; + float const* decoder = setup->decoder_matrix; + if ( !decoder ) + { + decoder = default_decoder; + if ( STD_HUE_CONDITION( setup ) ) + hue += PI / 180 * (std_decoder_hue - ext_decoder_hue); + } + + { + float s = (float) sin( hue ) * sat; + float c = (float) cos( hue ) * sat; + float* out = impl->to_rgb; + int n; + + n = burst_count; + do + { + float const* in = decoder; + int n = 3; + do + { + float i = *in++; + float q = *in++; + *out++ = i * c - q * s; + *out++ = i * s + q * c; + } + while ( --n ); + if ( burst_count <= 1 ) + break; + ROTATE_IQ( s, c, 0.866025f, -0.5f ); /* +120 degrees */ + } + while ( --n ); + } + } +} + +/* kernel generation */ + +#define RGB_TO_YIQ( r, g, b, y, i ) (\ + (y = (r) * 0.299f + (g) * 0.587f + (b) * 0.114f),\ + (i = (r) * 0.596f - (g) * 0.275f - (b) * 0.321f),\ + ((r) * 0.212f - (g) * 0.523f + (b) * 0.311f)\ +) + +#define YIQ_TO_RGB( y, i, q, to_rgb, type, r, g ) (\ + r = (type) (y + to_rgb [0] * i + to_rgb [1] * q),\ + g = (type) (y + to_rgb [2] * i + to_rgb [3] * q),\ + (type) (y + to_rgb [4] * i + to_rgb [5] * q)\ +) + +#define PACK_RGB( r, g, b ) ((r) << 21 | (g) << 11 | (b) << 1) + +enum { rgb_kernel_size = burst_size / alignment_count }; +enum { rgb_bias = rgb_unit * 2 * md_ntsc_rgb_builder }; + +typedef struct pixel_info_t +{ + int offset; + float negate; + float kernel [4]; +} pixel_info_t; + +#if rescale_in > 1 + #define PIXEL_OFFSET_( ntsc, scaled ) \ + (kernel_size / 2 + ntsc + (scaled != 0) + (rescale_out - scaled) % rescale_out + \ + (kernel_size * 2 * scaled)) + + #define PIXEL_OFFSET( ntsc, scaled ) \ + PIXEL_OFFSET_( ((ntsc) - (scaled) / rescale_out * rescale_in),\ + (((scaled) + rescale_out * 10) % rescale_out) ),\ + (1.0f - (((ntsc) + 100) & 2)) +#else + #define PIXEL_OFFSET( ntsc, scaled ) \ + (kernel_size / 2 + (ntsc) - (scaled)),\ + (1.0f - (((ntsc) + 100) & 2)) +#endif + +extern pixel_info_t const md_ntsc_pixels [alignment_count]; + +/* Generate pixel at all burst phases and column alignments */ +static void gen_kernel( init_t* impl, float y, float i, float q, md_ntsc_rgb_t* out ) +{ + /* generate for each scanline burst phase */ + float const* to_rgb = impl->to_rgb; + int burst_remain = burst_count; + y -= rgb_offset; + do + { + /* Encode yiq into *two* composite signals (to allow control over artifacting). + Convolve these with kernels which: filter respective components, apply + sharpening, and rescale horizontally. Convert resulting yiq to rgb and pack + into integer. Based on algorithm by NewRisingSun. */ + pixel_info_t const* pixel = md_ntsc_pixels; + int alignment_remain = alignment_count; + do + { + /* negate is -1 when composite starts at odd multiple of 2 */ + float const yy = y * impl->fringing * pixel->negate; + float const ic0 = (i + yy) * pixel->kernel [0]; + float const qc1 = (q + yy) * pixel->kernel [1]; + float const ic2 = (i - yy) * pixel->kernel [2]; + float const qc3 = (q - yy) * pixel->kernel [3]; + + float const factor = impl->artifacts * pixel->negate; + float const ii = i * factor; + float const yc0 = (y + ii) * pixel->kernel [0]; + float const yc2 = (y - ii) * pixel->kernel [2]; + + float const qq = q * factor; + float const yc1 = (y + qq) * pixel->kernel [1]; + float const yc3 = (y - qq) * pixel->kernel [3]; + + float const* k = &impl->kernel [pixel->offset]; + int n; + ++pixel; + for ( n = rgb_kernel_size; n; --n ) + { + float i = k[0]*ic0 + k[2]*ic2; + float q = k[1]*qc1 + k[3]*qc3; + float y = k[kernel_size+0]*yc0 + k[kernel_size+1]*yc1 + + k[kernel_size+2]*yc2 + k[kernel_size+3]*yc3 + rgb_offset; + if ( rescale_out <= 1 ) + k--; + else if ( k < &impl->kernel [kernel_size * 2 * (rescale_out - 1)] ) + k += kernel_size * 2 - 1; + else + k -= kernel_size * 2 * (rescale_out - 1) + 2; + { + int r, g, b = YIQ_TO_RGB( y, i, q, to_rgb, int, r, g ); + *out++ = PACK_RGB( r, g, b ) - rgb_bias; + } + } + } + while ( alignment_count > 1 && --alignment_remain ); + + if ( burst_count <= 1 ) + break; + + to_rgb += 6; + + ROTATE_IQ( i, q, -0.866025f, -0.5f ); /* -120 degrees */ + } + while ( --burst_remain ); +} + +static void correct_errors( md_ntsc_rgb_t color, md_ntsc_rgb_t* out ); + +#if DISABLE_CORRECTION + #define CORRECT_ERROR( a ) { out [i] += rgb_bias; } + #define DISTRIBUTE_ERROR( a, b, c ) { out [i] += rgb_bias; } +#else + #define CORRECT_ERROR( a ) { out [a] += error; } + #define DISTRIBUTE_ERROR( a, b, c ) {\ + md_ntsc_rgb_t fourth = (error + 2 * md_ntsc_rgb_builder) >> 2;\ + fourth &= (rgb_bias >> 1) - md_ntsc_rgb_builder;\ + fourth -= rgb_bias >> 2;\ + out [a] += fourth;\ + out [b] += fourth;\ + out [c] += fourth;\ + out [i] += error - (fourth * 3);\ + } +#endif + +#define RGB_PALETTE_OUT( rgb, out_ )\ +{\ + unsigned char* out = (out_);\ + md_ntsc_rgb_t clamped = (rgb);\ + MD_NTSC_CLAMP_( clamped, (8 - rgb_bits) );\ + out [0] = (unsigned char) (clamped >> 21);\ + out [1] = (unsigned char) (clamped >> 11);\ + out [2] = (unsigned char) (clamped >> 1);\ +} + +/* blitter related */ + +#ifndef restrict + #if defined (__GNUC__) + #define restrict __restrict__ + #elif defined (_MSC_VER) && _MSC_VER > 1300 + #define restrict + #else + /* no support for restricted pointers */ + #define restrict + #endif +#endif + +#include + +#if MD_NTSC_OUT_DEPTH <= 16 + #if USHRT_MAX == 0xFFFF + typedef unsigned short md_ntsc_out_t; + #else + #error "Need 16-bit int type" + #endif + +#else + #if UINT_MAX == 0xFFFFFFFF + typedef unsigned int md_ntsc_out_t; + #elif ULONG_MAX == 0xFFFFFFFF + typedef unsigned long md_ntsc_out_t; + #else + #error "Need 32-bit int type" + #endif + +#endif diff --git a/genplus-gx/core/ntsc/readme.txt b/genplus-gx/core/ntsc/readme.txt new file mode 100644 index 0000000000..152daa04e4 --- /dev/null +++ b/genplus-gx/core/ntsc/readme.txt @@ -0,0 +1,58 @@ +sms_ntsc 0.2.3: Sega Master System NTSC Video Filter +---------------------------------------------------- +This library filters a Sega Master System image to match what a TV would +show, allowing an authentic image in an emulator. It uses a highly +optimized algorithm to perform the same signal processing as an NTSC +decoder in a TV, giving very similar pixel artifacts and color bleeding. +The usual picture controls can be adjusted: hue, saturation, contrast, +brightness, and sharpness. Additionally, the amount of NTSC chroma and +luma artifacts can be reduced, allowing an image that corresponds to +composite video (artifacts), S-video (color bleeding only), RGB (clean +pixels), or anywhere inbetween. + +The output is scaled to the proper horizontal width, leaving it up the +emulator to simply double the height. Specialized blitters can be easily +written using a special interface, allowing customization of input and +output pixel formats, optimization for the host platform, and efficient +scanline doubling. + +Blitting a 248x192 source image to a 581x384 pixel 16-bit RGB memory +buffer at 60 frames per second uses 7% CPU on a 2.0 GHz Athlon 3500+ and +33% CPU on a 10-year-old 400 MHz G3 PowerMac. + +Author : Shay Green +Website : http://www.slack.net/~ant/ +Forum : http://groups.google.com/group/blargg-sound-libs +License : GNU Lesser General Public License (LGPL) +Language: C or C++ + + +Getting Started +--------------- +Build a program from demo.c, sms_ntsc.c, and the SDL multimedia library +(see http://libsdl.org/). Run it with "test.bmp" in the same directory +and it should show the filtered image. See demo.c for more. + +See sms_ntsc.txt for documentation and sms_ntsc.h for reference. Post to +the discussion forum for assistance. + + +Files +----- +readme.txt Essential information +sms_ntsc.txt Library documentation +changes.txt Changes made since previous releases +license.txt GNU Lesser General Public License + +benchmark.c Measures frame rate and processor usage of library +demo.c Displays and saves NTSC filtered image +demo_impl.h Internal routines used by demo +test.bmp Test image for demo + +sms_ntsc_config.h Library configuration (modify as needed) +sms_ntsc.h Library header and source +sms_ntsc.c +sms_ntsc_impl.h + +-- +Shay Green diff --git a/genplus-gx/core/ntsc/sms_ntsc.c b/genplus-gx/core/ntsc/sms_ntsc.c new file mode 100644 index 0000000000..d41239e342 --- /dev/null +++ b/genplus-gx/core/ntsc/sms_ntsc.c @@ -0,0 +1,141 @@ +/* sms_ntsc 0.2.3. http://www.slack.net/~ant/ */ + +/* Modified for use with Genesis Plus GX -- EkeEke */ + +#include "shared.h" +#include "sms_ntsc.h" + +/* Copyright (C) 2006-2007 Shay Green. This module is free software; you +can redistribute it and/or modify it under the terms of the GNU Lesser +General Public License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. This +module is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS +FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more +details. You should have received a copy of the GNU Lesser General Public +License along with this module; if not, write to the Free Software Foundation, +Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */ + +sms_ntsc_setup_t const sms_ntsc_monochrome = { 0,-1, 0, 0,.2, 0, .2,-.2,-.2,-1, 0, 0 }; +sms_ntsc_setup_t const sms_ntsc_composite = { 0, 0, 0, 0, 0, 0,.25, 0, 0, 0, 0, 0 }; +sms_ntsc_setup_t const sms_ntsc_svideo = { 0, 0, 0, 0, 0, 0,.25, -1, -1, 0, 0, 0 }; +sms_ntsc_setup_t const sms_ntsc_rgb = { 0, 0, 0, 0,.2, 0,.70, -1, -1,-1, 0, 0 }; + +#define alignment_count 3 +#define burst_count 1 +#define rescale_in 8 +#define rescale_out 7 + +#define artifacts_mid 0.4f +#define artifacts_max 1.2f +#define fringing_mid 0.8f +#define std_decoder_hue 0 + +#define gamma_size 16 + +#include "sms_ntsc_impl.h" + +/* 3 input pixels -> 8 composite samples */ +pixel_info_t const sms_ntsc_pixels [alignment_count] = { + { PIXEL_OFFSET( -4, -9 ), { 1, 1, .6667f, 0 } }, + { PIXEL_OFFSET( -2, -7 ), { .3333f, 1, 1, .3333f } }, + { PIXEL_OFFSET( 0, -5 ), { 0, .6667f, 1, 1 } }, +}; + +static void correct_errors( sms_ntsc_rgb_t color, sms_ntsc_rgb_t* out ) +{ + unsigned i; + for ( i = 0; i < rgb_kernel_size / 2; i++ ) + { + sms_ntsc_rgb_t error = color - + out [i ] - out [(i+12)%14+14] - out [(i+10)%14+28] - + out [i + 7] - out [i + 5 +14] - out [i + 3 +28]; + CORRECT_ERROR( i + 3 + 28 ); + } +} + +void sms_ntsc_init( sms_ntsc_t* ntsc, sms_ntsc_setup_t const* setup ) +{ + int entry; + init_t impl; + if ( !setup ) + setup = &sms_ntsc_composite; + init( &impl, setup ); + + for ( entry = 0; entry < sms_ntsc_palette_size; entry++ ) + { + float bb = impl.to_float [entry >> 8 & 0x0F]; + float gg = impl.to_float [entry >> 4 & 0x0F]; + float rr = impl.to_float [entry & 0x0F]; + + float y, i, q = RGB_TO_YIQ( rr, gg, bb, y, i ); + + int r, g, b = YIQ_TO_RGB( y, i, q, impl.to_rgb, int, r, g ); + sms_ntsc_rgb_t rgb = PACK_RGB( r, g, b ); + + if ( setup->palette_out ) + RGB_PALETTE_OUT( rgb, &setup->palette_out [entry * 3] ); + + if ( ntsc ) + { + gen_kernel( &impl, y, i, q, ntsc->table [entry] ); + correct_errors( rgb, ntsc->table [entry] ); + } + } +} + +#ifndef CUSTOM_BLITTER +void sms_ntsc_blit( sms_ntsc_t const* ntsc, SMS_NTSC_IN_T const* table, unsigned char* input, + int in_width, int vline) +{ + int const chunk_count = in_width / sms_ntsc_in_chunk; + + /* handle extra 0, 1, or 2 pixels by placing them at beginning of row */ + int const in_extra = in_width - chunk_count * sms_ntsc_in_chunk; + unsigned const extra2 = (unsigned) -(in_extra >> 1 & 1); /* (unsigned) -1 = ~0 */ + unsigned const extra1 = (unsigned) -(in_extra & 1) | extra2; + + /* use palette entry 0 for unused pixels */ + SMS_NTSC_IN_T border = table[0]; + + SMS_NTSC_BEGIN_ROW( ntsc, border, + (SMS_NTSC_ADJ_IN( table[input[0]] )) & extra2, + (SMS_NTSC_ADJ_IN( table[input[extra2 & 1]] )) & extra1 ); + + sms_ntsc_out_t* restrict line_out = (sms_ntsc_out_t*)(&bitmap.data[(vline * bitmap.pitch)]); + + int n; + input += in_extra; + + for ( n = chunk_count; n; --n ) + { + /* order of input and output pixels must not be altered */ + SMS_NTSC_COLOR_IN( 0, ntsc, SMS_NTSC_ADJ_IN( table[*input++] ) ); + SMS_NTSC_RGB_OUT( 0, *line_out++ ); + SMS_NTSC_RGB_OUT( 1, *line_out++ ); + + SMS_NTSC_COLOR_IN( 1, ntsc, SMS_NTSC_ADJ_IN( table[*input++] ) ); + SMS_NTSC_RGB_OUT( 2, *line_out++ ); + SMS_NTSC_RGB_OUT( 3, *line_out++ ); + + SMS_NTSC_COLOR_IN( 2, ntsc, SMS_NTSC_ADJ_IN( table[*input++] ) ); + SMS_NTSC_RGB_OUT( 4, *line_out++ ); + SMS_NTSC_RGB_OUT( 5, *line_out++ ); + SMS_NTSC_RGB_OUT( 6, *line_out++ ); + } + + /* finish final pixels */ + SMS_NTSC_COLOR_IN( 0, ntsc, border ); + SMS_NTSC_RGB_OUT( 0, *line_out++ ); + SMS_NTSC_RGB_OUT( 1, *line_out++ ); + + SMS_NTSC_COLOR_IN( 1, ntsc, border ); + SMS_NTSC_RGB_OUT( 2, *line_out++ ); + SMS_NTSC_RGB_OUT( 3, *line_out++ ); + + SMS_NTSC_COLOR_IN( 2, ntsc, border ); + SMS_NTSC_RGB_OUT( 4, *line_out++ ); + SMS_NTSC_RGB_OUT( 5, *line_out++ ); + SMS_NTSC_RGB_OUT( 6, *line_out++ ); +} +#endif diff --git a/genplus-gx/core/ntsc/sms_ntsc.h b/genplus-gx/core/ntsc/sms_ntsc.h new file mode 100644 index 0000000000..7546fa35ec --- /dev/null +++ b/genplus-gx/core/ntsc/sms_ntsc.h @@ -0,0 +1,154 @@ +/* Sega Master System/Game Gear/TI 99/4A NTSC video filter */ + +/* sms_ntsc 0.2.3 */ +#ifndef SMS_NTSC_H +#define SMS_NTSC_H + +#include "sms_ntsc_config.h" + +#ifdef __cplusplus + extern "C" { +#endif + +/* Image parameters, ranging from -1.0 to 1.0. Actual internal values shown +in parenthesis and should remain fairly stable in future versions. */ +typedef struct sms_ntsc_setup_t +{ + /* Basic parameters */ + double hue; /* -1 = -180 degrees +1 = +180 degrees */ + double saturation; /* -1 = grayscale (0.0) +1 = oversaturated colors (2.0) */ + double contrast; /* -1 = dark (0.5) +1 = light (1.5) */ + double brightness; /* -1 = dark (0.5) +1 = light (1.5) */ + double sharpness; /* edge contrast enhancement/blurring */ + + /* Advanced parameters */ + double gamma; /* -1 = dark (1.5) +1 = light (0.5) */ + double resolution; /* image resolution */ + double artifacts; /* artifacts caused by color changes */ + double fringing; /* color artifacts caused by brightness changes */ + double bleed; /* color bleed (color resolution reduction) */ + float const* decoder_matrix; /* optional RGB decoder matrix, 6 elements */ + + unsigned char* palette_out; /* optional RGB palette out, 3 bytes per color */ +} sms_ntsc_setup_t; + +/* Video format presets */ +extern sms_ntsc_setup_t const sms_ntsc_composite; /* color bleeding + artifacts */ +extern sms_ntsc_setup_t const sms_ntsc_svideo; /* color bleeding only */ +extern sms_ntsc_setup_t const sms_ntsc_rgb; /* crisp image */ +extern sms_ntsc_setup_t const sms_ntsc_monochrome;/* desaturated + artifacts */ + +enum { sms_ntsc_palette_size = 4096 }; + +/* Initializes and adjusts parameters. Can be called multiple times on the same +sms_ntsc_t object. Can pass NULL for either parameter. */ +typedef struct sms_ntsc_t sms_ntsc_t; +void sms_ntsc_init( sms_ntsc_t* ntsc, sms_ntsc_setup_t const* setup ); + +/* Filters one row of pixels. Input pixel format is set by SMS_NTSC_IN_FORMAT +and output RGB depth is set by SMS_NTSC_OUT_DEPTH. Both default to 16-bit RGB. +In_row_width is the number of pixels to get to the next input row. */ +void sms_ntsc_blit( sms_ntsc_t const* ntsc, SMS_NTSC_IN_T const* table, unsigned char* input, + int in_width, int vline); + +/* Number of output pixels written by blitter for given input width. */ +#define SMS_NTSC_OUT_WIDTH( in_width ) \ + (((in_width) / sms_ntsc_in_chunk + 1) * sms_ntsc_out_chunk) + +/* Number of input pixels that will fit within given output width. Might be +rounded down slightly; use SMS_NTSC_OUT_WIDTH() on result to find rounded +value. */ +#define SMS_NTSC_IN_WIDTH( out_width ) \ + (((out_width) / sms_ntsc_out_chunk - 1) * sms_ntsc_in_chunk + 2) + + +/* Interface for user-defined custom blitters */ + +enum { sms_ntsc_in_chunk = 3 }; /* number of input pixels read per chunk */ +enum { sms_ntsc_out_chunk = 7 }; /* number of output pixels generated per chunk */ + +/* Begins outputting row and starts three pixels. First pixel will be cut off a bit. +Declares variables, so must be before first statement in a block (unless you're using C++). */ +#define SMS_NTSC_BEGIN_ROW( ntsc, pixel0, pixel1, pixel2 ) \ + SMS_NTSC_BEGIN_ROW_6_( pixel0, pixel1, pixel2, SMS_NTSC_IN_FORMAT, ntsc ) + +/* Begins input pixel */ +#define SMS_NTSC_COLOR_IN( in_index, ntsc, color_in ) \ + SMS_NTSC_COLOR_IN_( in_index, color_in, SMS_NTSC_IN_FORMAT, ntsc ) + +/* Generates output pixel */ +#define SMS_NTSC_RGB_OUT( x, rgb_out ) {\ + raw_ =\ + kernel0 [x ] + kernel1 [(x+12)%7+14] + kernel2 [(x+10)%7+28] +\ + kernelx0 [(x+7)%14] + kernelx1 [(x+ 5)%7+21] + kernelx2 [(x+ 3)%7+35];\ + SMS_NTSC_CLAMP_( raw_, 0 );\ + SMS_NTSC_RGB_OUT_( rgb_out, 0 );\ +} + +/* private */ +enum { sms_ntsc_entry_size = 3 * 14 }; +typedef unsigned long sms_ntsc_rgb_t; +struct sms_ntsc_t { + sms_ntsc_rgb_t table [sms_ntsc_palette_size] [sms_ntsc_entry_size]; +}; + +#define SMS_NTSC_BGR12( ntsc, n ) (ntsc)->table [n & 0xFFF] + +#define SMS_NTSC_RGB16( ntsc, n ) \ + (sms_ntsc_rgb_t const*) ((char const*) (ntsc)->table +\ + ((n << 10 & 0x7800) | (n & 0x0780) | (n >> 9 & 0x0078)) *\ + (sms_ntsc_entry_size * sizeof (sms_ntsc_rgb_t) / 8)) + +#define SMS_NTSC_RGB15( ntsc, n ) \ + (sms_ntsc_rgb_t const*) ((char const*) (ntsc)->table +\ + ((n << 9 & 0x3C00) | (n & 0x03C0) | (n >> 9 & 0x003C)) *\ + (sms_ntsc_entry_size * sizeof (sms_ntsc_rgb_t) / 4)) + +/* common 3->7 ntsc macros */ +#define SMS_NTSC_BEGIN_ROW_6_( pixel0, pixel1, pixel2, ENTRY, table ) \ + sms_ntsc_rgb_t raw_;\ + unsigned const sms_ntsc_pixel0_ = (pixel0);\ + sms_ntsc_rgb_t const* kernel0 = ENTRY( table, sms_ntsc_pixel0_ );\ + unsigned const sms_ntsc_pixel1_ = (pixel1);\ + sms_ntsc_rgb_t const* kernel1 = ENTRY( table, sms_ntsc_pixel1_ );\ + unsigned const sms_ntsc_pixel2_ = (pixel2);\ + sms_ntsc_rgb_t const* kernel2 = ENTRY( table, sms_ntsc_pixel2_ );\ + sms_ntsc_rgb_t const* kernelx0;\ + sms_ntsc_rgb_t const* kernelx1 = kernel0;\ + sms_ntsc_rgb_t const* kernelx2 = kernel0 + + +/* common ntsc macros */ +#define sms_ntsc_rgb_builder ((1L << 21) | (1 << 11) | (1 << 1)) +#define sms_ntsc_clamp_mask (sms_ntsc_rgb_builder * 3 / 2) +#define sms_ntsc_clamp_add (sms_ntsc_rgb_builder * 0x101) +#define SMS_NTSC_CLAMP_( io, shift ) {\ + sms_ntsc_rgb_t sub = (io) >> (9-(shift)) & sms_ntsc_clamp_mask;\ + sms_ntsc_rgb_t clamp = sms_ntsc_clamp_add - sub;\ + io |= clamp;\ + clamp -= sub;\ + io &= clamp;\ +} + +#define SMS_NTSC_COLOR_IN_( index, color, ENTRY, table ) {\ + unsigned color_;\ + kernelx##index = kernel##index;\ + kernel##index = (color_ = (color), ENTRY( table, color_ ));\ +} + +/* x is always zero except in snes_ntsc library */ +#if SMS_NTSC_OUT_DEPTH == 15 +#define SMS_NTSC_RGB_OUT_( rgb_out, x ) {\ + rgb_out = (raw_>>(14-x)& 0x7C00)|(raw_>>(9-x)&0x03E0)|(raw_>>(4-x)&0x001F);\ + } +#elif SMS_NTSC_OUT_DEPTH == 16 +#define SMS_NTSC_RGB_OUT_( rgb_out, x) {\ + rgb_out = (raw_>>(13-x)& 0xF800)|(raw_>>(8-x)&0x07E0)|(raw_>>(4-x)&0x001F);\ + } +#endif + +#ifdef __cplusplus + } +#endif + +#endif diff --git a/genplus-gx/core/ntsc/sms_ntsc.txt b/genplus-gx/core/ntsc/sms_ntsc.txt new file mode 100644 index 0000000000..21b010b099 --- /dev/null +++ b/genplus-gx/core/ntsc/sms_ntsc.txt @@ -0,0 +1,119 @@ +sms_ntsc 0.2.3: Sega Master System NTSC Video Filter +---------------------------------------------------- +Author : Shay Green +Website : http://www.slack.net/~ant/ +Forum : http://groups.google.com/group/blargg-sound-libs +License : GNU Lesser General Public License (LGPL) +Language: C or C++ + + +Overview +-------- +To perform NTSC filtering, first allocate memory for a sms_ntsc_t object +and call sms_ntsc_init(), then call sms_ntsc_blit() to perform +filtering. You can call sms_ntsc_init() at any time to change image +parameters. + +By default, sms_ntsc_blit() reads and writes pixels in 16-bit RGB. Edit +sms_ntsc_config.h to change this. + + +RGB Palette Generation +---------------------- +A 4096-color RGB palette can be generated for use in a normal blitter. +In your sms_ntsc_setup_t structure, point palette_out to a 12288-byte +buffer (4096 * 3) to hold the palette, then call sms_ntsc_init(). If you +only need the palette and aren't going to be using the NTSC blitter, +pass 0 for the first parameter. + + +Image Parameters +---------------- +Many image parameters can be adjusted and presets are provided for +composite video, S-video, RGB, and monochrome. Most are floating-point +values with a general range of -1.0 to 1.0, where 0 is normal. The +ranges are adjusted so that one parameter at an extreme (-1 or +1) and +the rest at zero shouldn't result in any internal overflow (garbage +pixels). Setting multiple parameters to their extreme can produce +garbage. Put another way, the state space defined by all parameters +within the range -1 to +1 is not fully usable, but some extreme corners +are very useful so I don't want to reduce the parameter ranges. + +The sharpness and resolution parameters have similar effects. Resolution +affects how crisp pixels are. Sharpness merely enhances the edges by +increasing contrast, which makes things brighter at the edges. Artifacts +sets how much "junk" is around the edges where colors and brightness +change in the image, where -1 completely eliminates them. (Color) bleed +affects how much colors blend together and the artifact colors at the +edges of pixels surrounded by black. (Color) fringing affects how much +color fringing occurs around the edges of bright objects, especially +white text on a black background. + +When using custom settings, initialize your sms_ntsc_setup_t using one +of the standard setups before customizing it. This will ensure that all +fields are properly initialized, including any added in future releases +of the library that your current code can't even know about. + + sms_ntsc_setup_t setup; + setup = sms_ntsc_composite; /* do this first */ + setup.sharpness = custom_sharpness; + sms_ntsc_init( ntsc, &setup ); + + +Image Size +---------- +For proper aspect ratio, the image generated by the library must be +doubled vertically. + +Use the SMS_NTSC_OUT_WIDTH() and SMS_NTSC_IN_WIDTH() macros to convert +between input and output widths that the blitter uses. For example, if +you are blitting an image 256 pixels wide, use SMS_NTSC_OUT_WIDTH( 256 ) +to find out how many output pixels are written per row. Another example, +use SMS_NTSC_IN_WIDTH( 640 ) to find how many input pixels will fit +within 640 output pixels. + + +Custom Blitter +-------------- +You can write your own blitter, allowing customization of how input +pixels are obtained, the format of output pixels (15, 16, or 32-bit +RGB), optimizations for your platform, and additional effects like +efficient scanline doubling during blitting. + +Macros are included in sms_ntsc.h for writing your blitter so that your +code can be carried over without changes to improved versions of the +library. The default blitter at the end of sms_ntsc.c shows how to use +the macros. Contact me for further assistance. + +The SMS_NTSC_BEGIN_ROW macro allows starting up to three pixels. The +first pixel is cut off; its use is in specifying a background color +other than black for the sliver on the left edge. The next two pixels +can be used to handle the extra one or two pixels not handled by the +main chunks of three pixels. For example if you want to blit 257 input +pixels on a row (for whatever odd reason), you would start the first two +with SMS_NTSC_BEGIN_ROW( ... sms_ntsc_black, line_in [0], line_in [1] ), +then do the remaining 255 in chunks of three (255 is divisible by 3). + + +Limitations +----------- +The library's horizontal rescaling is too wide by about 3% in order to +allow a much more optimal implementation. This means that a 248 pixel +wide input image should appear as 563 output pixels, but with this +library appears as 581 output pixels. TV aspect ratios probably vary by +this much anyway. If you really need unscaled output, contact me and +I'll see about adding it. + + +Thanks +------ +Thanks to NewRisingSun for his original code and explanations of NTSC, +which was a starting point for me learning about NTSC video and +decoding. Thanks to the Nesdev forum for feedback and encouragement. +Thanks to Martin Freij (Nestopia author) and Charles MacDonald (SMS Plus +author) for significant ongoing testing and feedback as the library has +improved. Thanks to byuu (bsnes author) and pagefault (ZSNES team) for +feedback about the SNES version. + +-- +Shay Green diff --git a/genplus-gx/core/ntsc/sms_ntsc_config.h b/genplus-gx/core/ntsc/sms_ntsc_config.h new file mode 100644 index 0000000000..6b9e0bff13 --- /dev/null +++ b/genplus-gx/core/ntsc/sms_ntsc_config.h @@ -0,0 +1,31 @@ +/* Configure library by modifying this file */ + +#ifndef SMS_NTSC_CONFIG_H +#define SMS_NTSC_CONFIG_H + +/* Format of source & output pixels (RGB555 or RGB565 only) */ +#ifdef USE_15BPP_RENDERING +#define SMS_NTSC_IN_FORMAT SMS_NTSC_RGB15 +#define SMS_NTSC_OUT_DEPTH 15 +#else +#define SMS_NTSC_IN_FORMAT SMS_NTSC_RGB16 +#define SMS_NTSC_OUT_DEPTH 16 +#endif + +/* Original CRAM format (not used) */ +/* #define SMS_NTSC_IN_FORMAT SMS_NTSC_BGR12 */ + +/* The following affect the built-in blitter only; a custom blitter can +handle things however it wants. */ + +/* Type of input pixel values (fixed to 16-bit)*/ +#define SMS_NTSC_IN_T unsigned short + +/* Each raw pixel input value is passed through this. You might want to mask +the pixel index if you use the high bits as flags, etc. */ +#define SMS_NTSC_ADJ_IN( in ) in + +/* For each pixel, this is the basic operation: +output_color = SMS_NTSC_ADJ_IN( SMS_NTSC_IN_T ) */ + +#endif diff --git a/genplus-gx/core/ntsc/sms_ntsc_impl.h b/genplus-gx/core/ntsc/sms_ntsc_impl.h new file mode 100644 index 0000000000..cf86a55220 --- /dev/null +++ b/genplus-gx/core/ntsc/sms_ntsc_impl.h @@ -0,0 +1,439 @@ +/* sms_ntsc 0.2.3. http://www.slack.net/~ant/ */ + +/* Common implementation of NTSC filters */ + +#include +#include + +/* Copyright (C) 2006 Shay Green. This module is free software; you +can redistribute it and/or modify it under the terms of the GNU Lesser +General Public License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. This +module is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS +FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more +details. You should have received a copy of the GNU Lesser General Public +License along with this module; if not, write to the Free Software Foundation, +Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */ + +#define DISABLE_CORRECTION 0 + +#undef PI +#define PI 3.14159265358979323846f + +#ifndef LUMA_CUTOFF + #define LUMA_CUTOFF 0.20 +#endif +#ifndef gamma_size + #define gamma_size 1 +#endif +#ifndef rgb_bits + #define rgb_bits 8 +#endif +#ifndef artifacts_max + #define artifacts_max (artifacts_mid * 1.5f) +#endif +#ifndef fringing_max + #define fringing_max (fringing_mid * 2) +#endif +#ifndef STD_HUE_CONDITION + #define STD_HUE_CONDITION( setup ) 1 +#endif + +#define ext_decoder_hue (std_decoder_hue + 15) +#define rgb_unit (1 << rgb_bits) +#define rgb_offset (rgb_unit * 2 + 0.5f) + +enum { burst_size = sms_ntsc_entry_size / burst_count }; +enum { kernel_half = 16 }; +enum { kernel_size = kernel_half * 2 + 1 }; + +typedef struct init_t +{ + float to_rgb [burst_count * 6]; + float to_float [gamma_size]; + float contrast; + float brightness; + float artifacts; + float fringing; + float kernel [rescale_out * kernel_size * 2]; +} init_t; + +#define ROTATE_IQ( i, q, sin_b, cos_b ) {\ + float t;\ + t = i * cos_b - q * sin_b;\ + q = i * sin_b + q * cos_b;\ + i = t;\ +} + +static void init_filters( init_t* impl, sms_ntsc_setup_t const* setup ) +{ +#if rescale_out > 1 + float kernels [kernel_size * 2]; +#else + float* const kernels = impl->kernel; +#endif + + /* generate luma (y) filter using sinc kernel */ + { + /* sinc with rolloff (dsf) */ + float const rolloff = 1 + (float) setup->sharpness * (float) 0.032; + float const maxh = 32; + float const pow_a_n = (float) pow( rolloff, maxh ); + float sum; + int i; + /* quadratic mapping to reduce negative (blurring) range */ + float to_angle = (float) setup->resolution + 1; + to_angle = PI / maxh * (float) LUMA_CUTOFF * (to_angle * to_angle + 1); + + kernels [kernel_size * 3 / 2] = maxh; /* default center value */ + for ( i = 0; i < kernel_half * 2 + 1; i++ ) + { + int x = i - kernel_half; + float angle = x * to_angle; + /* instability occurs at center point with rolloff very close to 1.0 */ + if ( x || pow_a_n > (float) 1.056 || pow_a_n < (float) 0.981 ) + { + float rolloff_cos_a = rolloff * (float) cos( angle ); + float num = 1 - rolloff_cos_a - + pow_a_n * (float) cos( maxh * angle ) + + pow_a_n * rolloff * (float) cos( (maxh - 1) * angle ); + float den = 1 - rolloff_cos_a - rolloff_cos_a + rolloff * rolloff; + float dsf = num / den; + kernels [kernel_size * 3 / 2 - kernel_half + i] = dsf - (float) 0.5; + } + } + + /* apply blackman window and find sum */ + sum = 0; + for ( i = 0; i < kernel_half * 2 + 1; i++ ) + { + float x = PI * 2 / (kernel_half * 2) * i; + float blackman = 0.42f - 0.5f * (float) cos( x ) + 0.08f * (float) cos( x * 2 ); + sum += (kernels [kernel_size * 3 / 2 - kernel_half + i] *= blackman); + } + + /* normalize kernel */ + sum = 1.0f / sum; + for ( i = 0; i < kernel_half * 2 + 1; i++ ) + { + int x = kernel_size * 3 / 2 - kernel_half + i; + kernels [x] *= sum; + assert( kernels [x] == kernels [x] ); /* catch numerical instability */ + } + } + + /* generate chroma (iq) filter using gaussian kernel */ + { + float const cutoff_factor = -0.03125f; + float cutoff = (float) setup->bleed; + int i; + + if ( cutoff < 0 ) + { + /* keep extreme value accessible only near upper end of scale (1.0) */ + cutoff *= cutoff; + cutoff *= cutoff; + cutoff *= cutoff; + cutoff *= -30.0f / 0.65f; + } + cutoff = cutoff_factor - 0.65f * cutoff_factor * cutoff; + + for ( i = -kernel_half; i <= kernel_half; i++ ) + kernels [kernel_size / 2 + i] = (float) exp( i * i * cutoff ); + + /* normalize even and odd phases separately */ + for ( i = 0; i < 2; i++ ) + { + float sum = 0; + int x; + for ( x = i; x < kernel_size; x += 2 ) + sum += kernels [x]; + + sum = 1.0f / sum; + for ( x = i; x < kernel_size; x += 2 ) + { + kernels [x] *= sum; + assert( kernels [x] == kernels [x] ); /* catch numerical instability */ + } + } + } + + /* + printf( "luma:\n" ); + for ( i = kernel_size; i < kernel_size * 2; i++ ) + printf( "%f\n", kernels [i] ); + printf( "chroma:\n" ); + for ( i = 0; i < kernel_size; i++ ) + printf( "%f\n", kernels [i] ); + */ + + /* generate linear rescale kernels */ + #if rescale_out > 1 + { + float weight = 1.0f; + float* out = impl->kernel; + int n = rescale_out; + do + { + float remain = 0; + int i; + weight -= 1.0f / rescale_in; + for ( i = 0; i < kernel_size * 2; i++ ) + { + float cur = kernels [i]; + float m = cur * weight; + *out++ = m + remain; + remain = cur - m; + } + } + while ( --n ); + } + #endif +} + +static float const default_decoder [6] = + { 0.956f, 0.621f, -0.272f, -0.647f, -1.105f, 1.702f }; + +static void init( init_t* impl, sms_ntsc_setup_t const* setup ) +{ + impl->brightness = (float) setup->brightness * (0.5f * rgb_unit) + rgb_offset; + impl->contrast = (float) setup->contrast * (0.5f * rgb_unit) + rgb_unit; + #ifdef default_palette_contrast + if ( !setup->palette ) + impl->contrast *= default_palette_contrast; + #endif + + impl->artifacts = (float) setup->artifacts; + if ( impl->artifacts > 0 ) + impl->artifacts *= artifacts_max - artifacts_mid; + impl->artifacts = impl->artifacts * artifacts_mid + artifacts_mid; + + impl->fringing = (float) setup->fringing; + if ( impl->fringing > 0 ) + impl->fringing *= fringing_max - fringing_mid; + impl->fringing = impl->fringing * fringing_mid + fringing_mid; + + init_filters( impl, setup ); + + /* generate gamma table */ + if ( gamma_size > 1 ) + { + float const to_float = 1.0f / (gamma_size - (gamma_size > 1)); + float const gamma = 1.1333f - (float) setup->gamma * 0.5f; + /* match common PC's 2.2 gamma to TV's 2.65 gamma */ + int i; + for ( i = 0; i < gamma_size; i++ ) + impl->to_float [i] = + (float) pow( i * to_float, gamma ) * impl->contrast + impl->brightness; + } + + /* setup decoder matricies */ + { + float hue = (float) setup->hue * PI + PI / 180 * ext_decoder_hue; + float sat = (float) setup->saturation + 1; + float const* decoder = setup->decoder_matrix; + if ( !decoder ) + { + decoder = default_decoder; + if ( STD_HUE_CONDITION( setup ) ) + hue += PI / 180 * (std_decoder_hue - ext_decoder_hue); + } + + { + float s = (float) sin( hue ) * sat; + float c = (float) cos( hue ) * sat; + float* out = impl->to_rgb; + int n; + + n = burst_count; + do + { + float const* in = decoder; + int n = 3; + do + { + float i = *in++; + float q = *in++; + *out++ = i * c - q * s; + *out++ = i * s + q * c; + } + while ( --n ); + if ( burst_count <= 1 ) + break; + ROTATE_IQ( s, c, 0.866025f, -0.5f ); /* +120 degrees */ + } + while ( --n ); + } + } +} + +/* kernel generation */ + +#define RGB_TO_YIQ( r, g, b, y, i ) (\ + (y = (r) * 0.299f + (g) * 0.587f + (b) * 0.114f),\ + (i = (r) * 0.596f - (g) * 0.275f - (b) * 0.321f),\ + ((r) * 0.212f - (g) * 0.523f + (b) * 0.311f)\ +) + +#define YIQ_TO_RGB( y, i, q, to_rgb, type, r, g ) (\ + r = (type) (y + to_rgb [0] * i + to_rgb [1] * q),\ + g = (type) (y + to_rgb [2] * i + to_rgb [3] * q),\ + (type) (y + to_rgb [4] * i + to_rgb [5] * q)\ +) + +#define PACK_RGB( r, g, b ) ((r) << 21 | (g) << 11 | (b) << 1) + +enum { rgb_kernel_size = burst_size / alignment_count }; +enum { rgb_bias = rgb_unit * 2 * sms_ntsc_rgb_builder }; + +typedef struct pixel_info_t +{ + int offset; + float negate; + float kernel [4]; +} pixel_info_t; + +#if rescale_in > 1 + #define PIXEL_OFFSET_( ntsc, scaled ) \ + (kernel_size / 2 + ntsc + (scaled != 0) + (rescale_out - scaled) % rescale_out + \ + (kernel_size * 2 * scaled)) + + #define PIXEL_OFFSET( ntsc, scaled ) \ + PIXEL_OFFSET_( ((ntsc) - (scaled) / rescale_out * rescale_in),\ + (((scaled) + rescale_out * 10) % rescale_out) ),\ + (1.0f - (((ntsc) + 100) & 2)) +#else + #define PIXEL_OFFSET( ntsc, scaled ) \ + (kernel_size / 2 + (ntsc) - (scaled)),\ + (1.0f - (((ntsc) + 100) & 2)) +#endif + +extern pixel_info_t const sms_ntsc_pixels [alignment_count]; + +/* Generate pixel at all burst phases and column alignments */ +static void gen_kernel( init_t* impl, float y, float i, float q, sms_ntsc_rgb_t* out ) +{ + /* generate for each scanline burst phase */ + float const* to_rgb = impl->to_rgb; + int burst_remain = burst_count; + y -= rgb_offset; + do + { + /* Encode yiq into *two* composite signals (to allow control over artifacting). + Convolve these with kernels which: filter respective components, apply + sharpening, and rescale horizontally. Convert resulting yiq to rgb and pack + into integer. Based on algorithm by NewRisingSun. */ + pixel_info_t const* pixel = sms_ntsc_pixels; + int alignment_remain = alignment_count; + do + { + /* negate is -1 when composite starts at odd multiple of 2 */ + float const yy = y * impl->fringing * pixel->negate; + float const ic0 = (i + yy) * pixel->kernel [0]; + float const qc1 = (q + yy) * pixel->kernel [1]; + float const ic2 = (i - yy) * pixel->kernel [2]; + float const qc3 = (q - yy) * pixel->kernel [3]; + + float const factor = impl->artifacts * pixel->negate; + float const ii = i * factor; + float const yc0 = (y + ii) * pixel->kernel [0]; + float const yc2 = (y - ii) * pixel->kernel [2]; + + float const qq = q * factor; + float const yc1 = (y + qq) * pixel->kernel [1]; + float const yc3 = (y - qq) * pixel->kernel [3]; + + float const* k = &impl->kernel [pixel->offset]; + int n; + ++pixel; + for ( n = rgb_kernel_size; n; --n ) + { + float i = k[0]*ic0 + k[2]*ic2; + float q = k[1]*qc1 + k[3]*qc3; + float y = k[kernel_size+0]*yc0 + k[kernel_size+1]*yc1 + + k[kernel_size+2]*yc2 + k[kernel_size+3]*yc3 + rgb_offset; + if ( rescale_out <= 1 ) + k--; + else if ( k < &impl->kernel [kernel_size * 2 * (rescale_out - 1)] ) + k += kernel_size * 2 - 1; + else + k -= kernel_size * 2 * (rescale_out - 1) + 2; + { + int r, g, b = YIQ_TO_RGB( y, i, q, to_rgb, int, r, g ); + *out++ = PACK_RGB( r, g, b ) - rgb_bias; + } + } + } + while ( alignment_count > 1 && --alignment_remain ); + + if ( burst_count <= 1 ) + break; + + to_rgb += 6; + + ROTATE_IQ( i, q, -0.866025f, -0.5f ); /* -120 degrees */ + } + while ( --burst_remain ); +} + +static void correct_errors( sms_ntsc_rgb_t color, sms_ntsc_rgb_t* out ); + +#if DISABLE_CORRECTION + #define CORRECT_ERROR( a ) { out [i] += rgb_bias; } + #define DISTRIBUTE_ERROR( a, b, c ) { out [i] += rgb_bias; } +#else + #define CORRECT_ERROR( a ) { out [a] += error; } + #define DISTRIBUTE_ERROR( a, b, c ) {\ + sms_ntsc_rgb_t fourth = (error + 2 * sms_ntsc_rgb_builder) >> 2;\ + fourth &= (rgb_bias >> 1) - sms_ntsc_rgb_builder;\ + fourth -= rgb_bias >> 2;\ + out [a] += fourth;\ + out [b] += fourth;\ + out [c] += fourth;\ + out [i] += error - (fourth * 3);\ + } +#endif + +#define RGB_PALETTE_OUT( rgb, out_ )\ +{\ + unsigned char* out = (out_);\ + sms_ntsc_rgb_t clamped = (rgb);\ + SMS_NTSC_CLAMP_( clamped, (8 - rgb_bits) );\ + out [0] = (unsigned char) (clamped >> 21);\ + out [1] = (unsigned char) (clamped >> 11);\ + out [2] = (unsigned char) (clamped >> 1);\ +} + +/* blitter related */ + +#ifndef restrict + #if defined (__GNUC__) + #define restrict __restrict__ + #elif defined (_MSC_VER) && _MSC_VER > 1300 + #define restrict __restrict + #else + /* no support for restricted pointers */ + #define restrict + #endif +#endif + +#include + +#if SMS_NTSC_OUT_DEPTH <= 16 + #if USHRT_MAX == 0xFFFF + typedef unsigned short sms_ntsc_out_t; + #else + #error "Need 16-bit int type" + #endif + +#else + #if UINT_MAX == 0xFFFFFFFF + typedef unsigned int sms_ntsc_out_t; + #elif ULONG_MAX == 0xFFFFFFFF + typedef unsigned long sms_ntsc_out_t; + #else + #error "Need 32-bit int type" + #endif + +#endif diff --git a/genplus-gx/core/shared.h b/genplus-gx/core/shared.h new file mode 100644 index 0000000000..f463aa8ff3 --- /dev/null +++ b/genplus-gx/core/shared.h @@ -0,0 +1,35 @@ +#ifndef _SHARED_H_ +#define _SHARED_H_ + +#include +#include +#include +#include + +#include "types.h" +#include "macros.h" +#include "osd.h" +#include "loadrom.h" +#include "m68k.h" +#include "z80.h" +#include "system.h" +#include "genesis.h" +#include "vdp_ctrl.h" +#include "vdp_render.h" +#include "mem68k.h" +#include "memz80.h" +#include "membnk.h" +#include "io_ctrl.h" +#include "input.h" +#include "sound.h" +#include "sn76489.h" +#include "ym2413.h" +#include "ym2612.h" +#include "sram.h" +#include "ggenie.h" +#include "areplay.h" +#include "svp.h" +#include "state.h" + +#endif /* _SHARED_H_ */ + diff --git a/genplus-gx/core/sound/blip_buf.c b/genplus-gx/core/sound/blip_buf.c new file mode 100644 index 0000000000..307b721337 --- /dev/null +++ b/genplus-gx/core/sound/blip_buf.c @@ -0,0 +1,405 @@ +/* blip_buf $vers. http://www.slack.net/~ant/ */ + +/* Modified for Genesis Plus GX by EkeEke (01/09/12) */ +/* - disabled assertions checks (define #BLIP_ASSERT to re-enable) */ +/* - fixed multiple time-frames support & removed m->avail */ +/* - modified blip_read_samples to always output to stereo streams */ +/* - added blip_mix_samples function (see blip_buf.h) */ + +#include "blip_buf.h" + +#ifdef BLIP_ASSERT +#include +#endif +#include +#include +#include + +/* Library Copyright (C) 2003-2009 Shay Green. This library is free software; +you can redistribute it and/or modify it under the terms of the GNU Lesser +General Public License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. This +library is distributed in the hope that it will be useful, but WITHOUT ANY +WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR +A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more +details. You should have received a copy of the GNU Lesser General Public +License along with this module; if not, write to the Free Software Foundation, +Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */ + + +#if defined (BLARGG_TEST) && BLARGG_TEST + #include "blargg_test.h" +#endif + +/* Equivalent to ULONG_MAX >= 0xFFFFFFFF00000000. +Avoids constants that don't fit in 32 bits. */ +#if ULONG_MAX/0xFFFFFFFF > 0xFFFFFFFF + typedef unsigned long fixed_t; + enum { pre_shift = 32 }; + +#elif defined(ULLONG_MAX) + typedef unsigned long long fixed_t; + enum { pre_shift = 32 }; + +#else + typedef unsigned fixed_t; + enum { pre_shift = 0 }; + +#endif + +enum { time_bits = pre_shift + 20 }; + +static fixed_t const time_unit = (fixed_t) 1 << time_bits; + +enum { bass_shift = 9 }; /* affects high-pass filter breakpoint frequency */ +enum { end_frame_extra = 2 }; /* allows deltas slightly after frame length */ + +enum { half_width = 8 }; +enum { buf_extra = half_width*2 + end_frame_extra }; +enum { phase_bits = 5 }; +enum { phase_count = 1 << phase_bits }; +enum { delta_bits = 15 }; +enum { delta_unit = 1 << delta_bits }; +enum { frac_bits = time_bits - pre_shift }; + +/* We could eliminate avail and encode whole samples in offset, but that would +limit the total buffered samples to blip_max_frame. That could only be +increased by decreasing time_bits, which would reduce resample ratio accuracy. +*/ + +struct blip_t +{ + fixed_t factor; + fixed_t offset; + int size; + int integrator; +}; + +typedef int buf_t; + +/* probably not totally portable */ +#define SAMPLES( buf ) ((buf_t*) ((buf) + 1)) + +/* Arithmetic (sign-preserving) right shift */ +#define ARITH_SHIFT( n, shift ) \ + ((n) >> (shift)) + +enum { max_sample = +32767 }; +enum { min_sample = -32768 }; + +#define CLAMP( n ) \ + {\ + if ( n > max_sample ) n = max_sample;\ + else if ( n < min_sample) n = min_sample;\ + } + +#ifdef BLIP_ASSERT +static void check_assumptions( void ) +{ + int n; + + #if INT_MAX < 0x7FFFFFFF || UINT_MAX < 0xFFFFFFFF + #error "int must be at least 32 bits" + #endif + + assert( (-3 >> 1) == -2 ); /* right shift must preserve sign */ + + n = max_sample * 2; + CLAMP( n ); + assert( n == max_sample ); + + n = min_sample * 2; + CLAMP( n ); + assert( n == min_sample ); + + assert( blip_max_ratio <= time_unit ); + assert( blip_max_frame <= (fixed_t) -1 >> time_bits ); +} +#endif + +blip_t* blip_new( int size ) +{ + blip_t* m; +#ifdef BLIP_ASSERT + assert( size >= 0 ); +#endif + + m = (blip_t*) malloc( sizeof *m + (size + buf_extra) * sizeof (buf_t) ); + if ( m ) + { + m->factor = time_unit / blip_max_ratio; + m->size = size; + blip_clear( m ); +#ifdef BLIP_ASSERT + check_assumptions(); +#endif + } + return m; +} + +void blip_delete( blip_t* m ) +{ + if ( m != NULL ) + { + /* Clear fields in case user tries to use after freeing */ + memset( m, 0, sizeof *m ); + free( m ); + } +} + +void blip_set_rates( blip_t* m, double clock_rate, double sample_rate ) +{ + double factor = time_unit * sample_rate / clock_rate; + m->factor = (fixed_t) factor; + +#ifdef BLIP_ASSERT + /* Fails if clock_rate exceeds maximum, relative to sample_rate */ + assert( 0 <= factor - m->factor && factor - m->factor < 1 ); +#endif + +/* Avoid requiring math.h. Equivalent to + m->factor = (int) ceil( factor ) */ + if ( m->factor < factor ) + m->factor++; + + /* At this point, factor is most likely rounded up, but could still + have been rounded down in the floating-point calculation. */ +} + +void blip_clear( blip_t* m ) +{ + /* We could set offset to 0, factor/2, or factor-1. 0 is suitable if + factor is rounded up. factor-1 is suitable if factor is rounded down. + Since we don't know rounding direction, factor/2 accommodates either, + with the slight loss of showing an error in half the time. Since for + a 64-bit factor this is years, the halving isn't a problem. */ + + m->offset = m->factor / 2; + m->integrator = 0; + memset( SAMPLES( m ), 0, (m->size + buf_extra) * sizeof (buf_t) ); +} + +int blip_clocks_needed( const blip_t* m, int samples ) +{ + fixed_t needed; + +#ifdef BLIP_ASSERT + /* Fails if buffer can't hold that many more samples */ + assert( (samples >= 0) && (((m->offset >> time_bits) + samples) <= m->size) ); +#endif + + needed = (fixed_t) samples * time_unit; + if ( needed < m->offset ) + return 0; + + return (needed - m->offset + m->factor - 1) / m->factor; +} + +void blip_end_frame( blip_t* m, unsigned t ) +{ + m->offset += t * m->factor; + +#ifdef BLIP_ASSERT + /* Fails if buffer size was exceeded */ + assert( (m->offset >> time_bits) <= m->size ); +#endif +} + +int blip_samples_avail( const blip_t* m ) +{ + return (m->offset >> time_bits); +} + +static void remove_samples( blip_t* m, int count ) +{ + buf_t* buf = SAMPLES( m ); + int remain = (m->offset >> time_bits) + buf_extra - count; + m->offset -= count * time_unit; + + memmove( &buf [0], &buf [count], remain * sizeof buf [0] ); + memset( &buf [remain], 0, count * sizeof buf [0] ); +} + +int blip_read_samples( blip_t* m, short out [], int count) +{ +#ifdef BLIP_ASSERT + assert( count >= 0 ); + + if ( count > (m->offset >> time_bits) ) + count = m->offset >> time_bits; + + if ( count ) +#endif + { + buf_t const* in = SAMPLES( m ); + buf_t const* end = in + count; + int sum = m->integrator; + do + { + /* Eliminate fraction */ + int s = ARITH_SHIFT( sum, delta_bits ); + + sum += *in++; + + CLAMP( s ); + + *out = s; + out += 2; + + /* High-pass filter */ + sum -= s << (delta_bits - bass_shift); + } + while ( in != end ); + m->integrator = sum; + + remove_samples( m, count ); + } + + return count; +} + +int blip_mix_samples( blip_t* m, short out [], int count) +{ +#ifdef BLIP_ASSERT + assert( count >= 0 ); + + if ( count > (m->offset >> time_bits) ) + count = m->offset >> time_bits; + + if ( count ) +#endif + { + buf_t const* in = SAMPLES( m ); + buf_t const* end = in + count; + int sum = m->integrator; + do + { + /* Eliminate fraction */ + int s = ARITH_SHIFT( sum, delta_bits ); + + sum += *in++; + + /* High-pass filter */ + sum -= s << (delta_bits - bass_shift); + + /* Add current buffer value */ + s += *out; + + CLAMP( s ); + + *out = s; + out += 2; + } + while ( in != end ); + m->integrator = sum; + + remove_samples( m, count ); + } + + return count; +} + +/* Things that didn't help performance on x86: + __attribute__((aligned(128))) + #define short int + restrict +*/ + +/* Sinc_Generator( 0.9, 0.55, 4.5 ) */ +static short const bl_step [phase_count + 1] [half_width] = +{ +{ 43, -115, 350, -488, 1136, -914, 5861,21022}, +{ 44, -118, 348, -473, 1076, -799, 5274,21001}, +{ 45, -121, 344, -454, 1011, -677, 4706,20936}, +{ 46, -122, 336, -431, 942, -549, 4156,20829}, +{ 47, -123, 327, -404, 868, -418, 3629,20679}, +{ 47, -122, 316, -375, 792, -285, 3124,20488}, +{ 47, -120, 303, -344, 714, -151, 2644,20256}, +{ 46, -117, 289, -310, 634, -17, 2188,19985}, +{ 46, -114, 273, -275, 553, 117, 1758,19675}, +{ 44, -108, 255, -237, 471, 247, 1356,19327}, +{ 43, -103, 237, -199, 390, 373, 981,18944}, +{ 42, -98, 218, -160, 310, 495, 633,18527}, +{ 40, -91, 198, -121, 231, 611, 314,18078}, +{ 38, -84, 178, -81, 153, 722, 22,17599}, +{ 36, -76, 157, -43, 80, 824, -241,17092}, +{ 34, -68, 135, -3, 8, 919, -476,16558}, +{ 32, -61, 115, 34, -60, 1006, -683,16001}, +{ 29, -52, 94, 70, -123, 1083, -862,15422}, +{ 27, -44, 73, 106, -184, 1152,-1015,14824}, +{ 25, -36, 53, 139, -239, 1211,-1142,14210}, +{ 22, -27, 34, 170, -290, 1261,-1244,13582}, +{ 20, -20, 16, 199, -335, 1301,-1322,12942}, +{ 18, -12, -3, 226, -375, 1331,-1376,12293}, +{ 15, -4, -19, 250, -410, 1351,-1408,11638}, +{ 13, 3, -35, 272, -439, 1361,-1419,10979}, +{ 11, 9, -49, 292, -464, 1362,-1410,10319}, +{ 9, 16, -63, 309, -483, 1354,-1383, 9660}, +{ 7, 22, -75, 322, -496, 1337,-1339, 9005}, +{ 6, 26, -85, 333, -504, 1312,-1280, 8355}, +{ 4, 31, -94, 341, -507, 1278,-1205, 7713}, +{ 3, 35, -102, 347, -506, 1238,-1119, 7082}, +{ 1, 40, -110, 350, -499, 1190,-1021, 6464}, +{ 0, 43, -115, 350, -488, 1136, -914, 5861} +}; + +/* Shifting by pre_shift allows calculation using unsigned int rather than +possibly-wider fixed_t. On 32-bit platforms, this is likely more efficient. +And by having pre_shift 32, a 32-bit platform can easily do the shift by +simply ignoring the low half. */ + +void blip_add_delta( blip_t* m, unsigned time, int delta ) +{ + unsigned fixed = (unsigned) ((time * m->factor + m->offset) >> pre_shift); + buf_t* out = SAMPLES( m ) + (fixed >> frac_bits); + + int const phase_shift = frac_bits - phase_bits; + int phase = fixed >> phase_shift & (phase_count - 1); + short const* in = bl_step [phase]; + short const* rev = bl_step [phase_count - phase]; + + int interp = fixed >> (phase_shift - delta_bits) & (delta_unit - 1); + int delta2 = (delta * interp) >> delta_bits; + delta -= delta2; + +#ifdef BLIP_ASSERT + /* Fails if buffer size was exceeded */ + assert( out <= &SAMPLES( m ) [m->size + end_frame_extra] ); +#endif + + out [0] += in[0]*delta + in[half_width+0]*delta2; + out [1] += in[1]*delta + in[half_width+1]*delta2; + out [2] += in[2]*delta + in[half_width+2]*delta2; + out [3] += in[3]*delta + in[half_width+3]*delta2; + out [4] += in[4]*delta + in[half_width+4]*delta2; + out [5] += in[5]*delta + in[half_width+5]*delta2; + out [6] += in[6]*delta + in[half_width+6]*delta2; + out [7] += in[7]*delta + in[half_width+7]*delta2; + + in = rev; + out [ 8] += in[7]*delta + in[7-half_width]*delta2; + out [ 9] += in[6]*delta + in[6-half_width]*delta2; + out [10] += in[5]*delta + in[5-half_width]*delta2; + out [11] += in[4]*delta + in[4-half_width]*delta2; + out [12] += in[3]*delta + in[3-half_width]*delta2; + out [13] += in[2]*delta + in[2-half_width]*delta2; + out [14] += in[1]*delta + in[1-half_width]*delta2; + out [15] += in[0]*delta + in[0-half_width]*delta2; +} + +void blip_add_delta_fast( blip_t* m, unsigned time, int delta ) +{ + unsigned fixed = (unsigned) ((time * m->factor + m->offset) >> pre_shift); + buf_t* out = SAMPLES( m ) + (fixed >> frac_bits); + + int interp = fixed >> (frac_bits - delta_bits) & (delta_unit - 1); + int delta2 = delta * interp; + +#ifdef BLIP_ASSERT + /* Fails if buffer size was exceeded */ + assert( out <= &SAMPLES( m ) [m->size + end_frame_extra] ); +#endif + + out [7] += delta * delta_unit - delta2; + out [8] += delta2; +} diff --git a/genplus-gx/core/sound/blip_buf.h b/genplus-gx/core/sound/blip_buf.h new file mode 100644 index 0000000000..21c45d0a15 --- /dev/null +++ b/genplus-gx/core/sound/blip_buf.h @@ -0,0 +1,74 @@ +/** Sample buffer that resamples from input clock rate to output sample rate \file */ + +/* blip_buf $vers */ +#ifndef BLIP_BUF_H +#define BLIP_BUF_H + +#ifdef __cplusplus + extern "C" { +#endif + +/** First parameter of most functions is blip_t*, or const blip_t* if nothing +is changed. */ +typedef struct blip_t blip_t; + +/** Creates new buffer that can hold at most sample_count samples. Sets rates +so that there are blip_max_ratio clocks per sample. Returns pointer to new +buffer, or NULL if insufficient memory. */ +blip_t* blip_new( int sample_count ); + +/** Sets approximate input clock rate and output sample rate. For every +clock_rate input clocks, approximately sample_rate samples are generated. */ +void blip_set_rates( blip_t*, double clock_rate, double sample_rate ); + +enum { /** Maximum clock_rate/sample_rate ratio. For a given sample_rate, +clock_rate must not be greater than sample_rate*blip_max_ratio. */ +blip_max_ratio = 1 << 20 }; + +/** Clears entire buffer. Afterwards, blip_samples_avail() == 0. */ +void blip_clear( blip_t* ); + +/** Adds positive/negative delta into buffer at specified clock time. */ +void blip_add_delta( blip_t*, unsigned int clock_time, int delta ); + +/** Same as blip_add_delta(), but uses faster, lower-quality synthesis. */ +void blip_add_delta_fast( blip_t*, unsigned int clock_time, int delta ); + +/** Length of time frame, in clocks, needed to make sample_count additional +samples available. */ +int blip_clocks_needed( const blip_t*, int sample_count ); + +enum { /** Maximum number of samples that can be generated from one time frame. */ +blip_max_frame = 4000 }; + +/** Makes input clocks before clock_duration available for reading as output +samples. Also begins new time frame at clock_duration, so that clock time 0 in +the new time frame specifies the same clock as clock_duration in the old time +frame specified. Deltas can have been added slightly past clock_duration (up to +however many clocks there are in two output samples). */ +void blip_end_frame( blip_t*, unsigned int clock_duration ); + +/** Number of buffered samples available for reading. */ +int blip_samples_avail( const blip_t* ); + +/** Reads and removes at most 'count' samples and writes them to to every other +element of 'out', allowing easy interleaving of two buffers into a stereo sample +stream. Outputs 16-bit signed samples. Returns number of samples actually read. */ +int blip_read_samples( blip_t*, short out [], int count); + +/* Same as above function except sample is added to output buffer previous value */ +/* This allows easy mixing of different blip buffers into a single output stream */ +int blip_mix_samples( blip_t* m, short out [], int count); + +/** Frees buffer. No effect if NULL is passed. */ +void blip_delete( blip_t* ); + + +/* Deprecated */ +typedef blip_t blip_buffer_t; + +#ifdef __cplusplus + } +#endif + +#endif diff --git a/genplus-gx/core/sound/eq.c b/genplus-gx/core/sound/eq.c new file mode 100644 index 0000000000..2f57e2eabf --- /dev/null +++ b/genplus-gx/core/sound/eq.c @@ -0,0 +1,132 @@ +/*---------------------------------------------------------------------------- +// +// 3 Band EQ :) +// +// EQ.C - Main Source file for 3 band EQ +// +// (c) Neil C / Etanza Systems / 2K6 +// +// Shouts / Loves / Moans = etanza at lycos dot co dot uk +// +// This work is hereby placed in the public domain for all purposes, including +// use in commercial applications. +// +// The author assumes NO RESPONSIBILITY for any problems caused by the use of +// this software. +// +//----------------------------------------------------------------------------*/ + +/* NOTES : +// +// - Original filter code by Paul Kellet (musicdsp.pdf) +// +// - Uses 4 first order filters in series, should give 24dB per octave +// +// - Now with P4 Denormal fix :) + + +//----------------------------------------------------------------------------*/ + +/* ---------- +//| Includes | +// ----------*/ +#include +#include +#include +#include "eq.h" +#include "macros.h" + + +/* ----------- +//| Constants | +// -----------*/ + +static double vsa = (1.0 / 4294967295.0); /* Very small amount (Denormal Fix) */ + + +/* --------------- +//| Initialise EQ | +// ---------------*/ + +/* Recommended frequencies are ... +// +// lowfreq = 880 Hz +// highfreq = 5000 Hz +// +// Set mixfreq to whatever rate your system is using (eg 48Khz)*/ + +void init_3band_state(EQSTATE * es, int lowfreq, int highfreq, int mixfreq) +{ + /* Clear state */ + + memset(es, 0, sizeof(EQSTATE)); + + /* Set Low/Mid/High gains to unity */ + + es->lg = 1.0; + es->mg = 1.0; + es->hg = 1.0; + + /* Calculate filter cutoff frequencies */ + + es->lf = 2 * sin(M_PI * ((double) lowfreq / (double) mixfreq)); + es->hf = 2 * sin(M_PI * ((double) highfreq / (double) mixfreq)); +} + + +/* --------------- +//| EQ one sample | +// ---------------*/ + +/* - sample can be any range you like :) +// +// Note that the output will depend on the gain settings for each band +// (especially the bass) so may require clipping before output, but you +// knew that anyway :)*/ + +double do_3band(EQSTATE * es, int sample) +{ + /* Locals */ + + double l, m, h; /* Low / Mid / High - Sample Values */ + + /* Filter #1 (lowpass) */ + + es->f1p0 += (es->lf * ((double) sample - es->f1p0)) + vsa; + es->f1p1 += (es->lf * (es->f1p0 - es->f1p1)); + es->f1p2 += (es->lf * (es->f1p1 - es->f1p2)); + es->f1p3 += (es->lf * (es->f1p2 - es->f1p3)); + + l = es->f1p3; + + /* Filter #2 (highpass) */ + + es->f2p0 += (es->hf * ((double) sample - es->f2p0)) + vsa; + es->f2p1 += (es->hf * (es->f2p0 - es->f2p1)); + es->f2p2 += (es->hf * (es->f2p1 - es->f2p2)); + es->f2p3 += (es->hf * (es->f2p2 - es->f2p3)); + + h = es->sdm3 - es->f2p3; + + /* Calculate midrange (signal - (low + high)) */ + + /* m = es->sdm3 - (h + l); */ + /* fix from http://www.musicdsp.org/showArchiveComment.php?ArchiveID=236 ? */ + m = sample - (h + l); + + /* Scale, Combine and store */ + + l *= es->lg; + m *= es->mg; + h *= es->hg; + + /* Shuffle history buffer */ + + es->sdm3 = es->sdm2; + es->sdm2 = es->sdm1; + es->sdm1 = sample; + + /* Return result */ + + return (int) (l + m + h); +} diff --git a/genplus-gx/core/sound/eq.h b/genplus-gx/core/sound/eq.h new file mode 100644 index 0000000000..d1f37dc56c --- /dev/null +++ b/genplus-gx/core/sound/eq.h @@ -0,0 +1,67 @@ +/*--------------------------------------------------------------------------- +// +// 3 Band EQ :) +// +// EQ.H - Header file for 3 band EQ +// +// (c) Neil C / Etanza Systems / 2K6 +// +// Shouts / Loves / Moans = etanza at lycos dot co dot uk +// +// This work is hereby placed in the public domain for all purposes, including +// use in commercial applications. +// +// The author assumes NO RESPONSIBILITY for any problems caused by the use of +// this software. +// +//----------------------------------------------------------------------------*/ + +#ifndef __EQ3BAND__ +#define __EQ3BAND__ + +/* ------------ +//| Structures | +// ------------*/ + +typedef struct { + /* Filter #1 (Low band) */ + + double lf; /* Frequency */ + double f1p0; /* Poles ... */ + double f1p1; + double f1p2; + double f1p3; + + /* Filter #2 (High band) */ + + double hf; /* Frequency */ + double f2p0; /* Poles ... */ + double f2p1; + double f2p2; + double f2p3; + + /* Sample history buffer */ + + double sdm1; /* Sample data minus 1 */ + double sdm2; /* 2 */ + double sdm3; /* 3 */ + + /* Gain Controls */ + + double lg; /* low gain */ + double mg; /* mid gain */ + double hg; /* high gain */ + +} EQSTATE; + + +/* --------- +//| Exports | +// ---------*/ + +extern void init_3band_state(EQSTATE * es, int lowfreq, int highfreq, + int mixfreq); +extern double do_3band(EQSTATE * es, int sample); + + +#endif /* #ifndef __EQ3BAND__ */ diff --git a/genplus-gx/core/sound/sn76489.c b/genplus-gx/core/sound/sn76489.c new file mode 100644 index 0000000000..78a051dcb1 --- /dev/null +++ b/genplus-gx/core/sound/sn76489.c @@ -0,0 +1,451 @@ +/* + SN76489 emulation + by Maxim in 2001 and 2002 + converted from my original Delphi implementation + + I'm a C newbie so I'm sure there are loads of stupid things + in here which I'll come back to some day and redo + + Includes: + - Super-high quality tone channel "oversampling" by calculating fractional positions on transitions + - Noise output pattern reverse engineered from actual SMS output + - Volume levels taken from actual SMS output + + 07/08/04 Charles MacDonald + Modified for use with SMS Plus: + - Added support for multiple PSG chips. + - Added reset/config/update routines. + - Added context management routines. + - Removed SN76489_GetValues(). + - Removed some unused variables. + + 25/04/07 Eke-Eke (Genesis Plus GX) + - Removed stereo GG support (unused) + - Made SN76489_Update outputs 16bits mono samples + - Replaced volume table with VGM plugin's one + + 05/01/09 Eke-Eke (Genesis Plus GX) + - Modified Cut-Off frequency (according to Steve Snake: http://www.smspower.org/forums/viewtopic.php?t=1746) + + 24/08/10 Eke-Eke (Genesis Plus GX) + - Removed multichip support (unused) + - Removed alternate volume table, panning & mute support (unused) + - Removed configurable Feedback and Shift Register Width (always use Sega ones) + - Added linear resampling using Blip Buffer (based on Blargg's implementation: http://www.smspower.org/forums/viewtopic.php?t=11376) + + 01/09/12 Eke-Eke (Genesis Plus GX) + - Added generic Blip-Buffer support internally, using common Master Clock as timebase + - Re-added stereo GG support + - Re-added configurable Feedback and Shift Register Width + - Rewrote core with various optimizations +*/ + +#include "shared.h" + +#define PSG_MCYCLES_RATIO (16 * 15) + +/* Initial state of shift register */ +#define NoiseInitialState 0x8000 + +/* Value below which PSG does not output */ +/*#define PSG_CUTOFF 0x6*/ +#define PSG_CUTOFF 0x1 + +/* original Texas Instruments TMS SN76489AN (rev. A) used in SG-1000, SC-3000H & SF-7000 computers */ +#define FB_DISCRETE 0x0006 +#define SRW_DISCRETE 15 + +/* SN76489AN clone integrated in Sega's VDP chips (315-5124, 315-5246, 315-5313, Game Gear) */ +#define FB_SEGAVDP 0x0009 +#define SRW_SEGAVDP 16 + +typedef struct +{ + /* Configuration */ + int PreAmp[4][2]; /* stereo channels pre-amplification ratio (%) */ + int NoiseFeedback; + int SRWidth; + + /* PSG registers: */ + int Registers[8]; /* Tone, vol x4 */ + int LatchedRegister; + int NoiseShiftRegister; + int NoiseFreq; /* Noise channel signal generator frequency */ + + /* Output calculation variables */ + int ToneFreqVals[4]; /* Frequency register values (counters) */ + int ToneFreqPos[4]; /* Frequency channel flip-flops */ + int Channel[4][2]; /* current amplitude of each (stereo) channel */ + int ChanOut[4][2]; /* current output value of each (stereo) channel */ + + /* Internal M-clock counter */ + unsigned long clocks; + +} SN76489_Context; + +static const uint16 PSGVolumeValues[16] = +{ + /* These values are taken from a real SMS2's output */ + /*{892,892,892,760,623,497,404,323,257,198,159,123,96,75,60,0}, */ + /* I can't remember why 892... :P some scaling I did at some point */ + /* these values are true volumes for 2dB drops at each step (multiply previous by 10^-0.1) */ + 1516,1205,957,760,603,479,381,303,240,191,152,120,96,76,60,0 +}; + +static SN76489_Context SN76489; + +static blip_t* blip[2]; + +void SN76489_Init(blip_t* left, blip_t* right, int type) +{ + int i; + + blip[0] = left; + blip[1] = right; + + for (i=0; i<4; i++) + { + SN76489.PreAmp[i][0] = 100; + SN76489.PreAmp[i][1] = 100; + } + + if (type == SN_DISCRETE) + { + SN76489.NoiseFeedback = FB_DISCRETE; + SN76489.SRWidth = SRW_DISCRETE; + } + else + { + SN76489.NoiseFeedback = FB_SEGAVDP; + SN76489.SRWidth = SRW_SEGAVDP; + } +} + +void SN76489_Reset() +{ + int i; + + for(i = 0; i <= 3; i++) + { + /* Initialise PSG state */ + SN76489.Registers[2*i] = 1; /* tone freq=1 */ + SN76489.Registers[2*i+1] = 0xf; /* vol=off */ + + /* Set counters to 0 */ + SN76489.ToneFreqVals[i] = 0; + + /* Set flip-flops to 1 */ + SN76489.ToneFreqPos[i] = 1; + + /* Clear stereo channels amplitude */ + SN76489.Channel[i][0] = 0; + SN76489.Channel[i][1] = 0; + + /* Clear stereo channel outputs in delta buffer */ + SN76489.ChanOut[i][0] = 0; + SN76489.ChanOut[i][1] = 0; + } + + /* Initialise latched register index */ + SN76489.LatchedRegister = 0; + + /* Initialise noise generator */ + SN76489.NoiseShiftRegister=NoiseInitialState; + SN76489.NoiseFreq = 0x10; + + /* Reset internal M-cycle counter */ + SN76489.clocks = 0; +} + +void *SN76489_GetContextPtr(void) +{ + return (uint8 *)&SN76489; +} + +int SN76489_GetContextSize(void) +{ + return sizeof(SN76489_Context); +} + +/* Updates tone amplitude in delta buffer. Call whenever amplitude might have changed. */ +INLINE void UpdateToneAmplitude(int i, int time) +{ + int delta; + + /* left output */ + delta = (SN76489.Channel[i][0] * SN76489.ToneFreqPos[i]) - SN76489.ChanOut[i][0]; + if (delta != 0) + { + SN76489.ChanOut[i][0] += delta; + blip_add_delta_fast(blip[0], time, delta); + } + + /* right output */ + delta = (SN76489.Channel[i][1] * SN76489.ToneFreqPos[i]) - SN76489.ChanOut[i][1]; + if (delta != 0) + { + SN76489.ChanOut[i][1] += delta; + blip_add_delta_fast(blip[1], time, delta); + } +} + +/* Updates noise amplitude in delta buffer. Call whenever amplitude might have changed. */ +INLINE void UpdateNoiseAmplitude(int time) +{ + int delta; + + /* left output */ + delta = (SN76489.Channel[3][0] * ( SN76489.NoiseShiftRegister & 0x1 )) - SN76489.ChanOut[3][0]; + if (delta != 0) + { + SN76489.ChanOut[3][0] += delta; + blip_add_delta_fast(blip[0], time, delta); + } + + /* right output */ + delta = (SN76489.Channel[3][1] * ( SN76489.NoiseShiftRegister & 0x1 )) - SN76489.ChanOut[3][1]; + if (delta != 0) + { + SN76489.ChanOut[3][1] += delta; + blip_add_delta_fast(blip[1], time, delta); + } +} + +/* Runs tone channel for clock_length clocks */ +static void RunTone(int i, int clocks) +{ + int time; + + /* Update in case a register changed etc. */ + UpdateToneAmplitude(i, SN76489.clocks); + + /* Time of next transition */ + time = SN76489.ToneFreqVals[i]; + + /* Process any transitions that occur within clocks we're running */ + while (time < clocks) + { + if (SN76489.Registers[i*2]>PSG_CUTOFF) { + /* Flip the flip-flop */ + SN76489.ToneFreqPos[i] = -SN76489.ToneFreqPos[i]; + } else { + /* stuck value */ + SN76489.ToneFreqPos[i] = 1; + } + UpdateToneAmplitude(i, time); + + /* Advance to time of next transition */ + time += SN76489.Registers[i*2] * PSG_MCYCLES_RATIO; + } + + /* Update channel tone counter */ + SN76489.ToneFreqVals[i] = time; +} + +/* Runs noise channel for clock_length clocks */ +static void RunNoise(int clocks) +{ + int time; + + /* Noise channel: match to tone2 if in slave mode */ + int NoiseFreq = SN76489.NoiseFreq; + if (NoiseFreq == 0x80) + { + NoiseFreq = SN76489.Registers[2*2]; + SN76489.ToneFreqVals[3] = SN76489.ToneFreqVals[2]; + } + + /* Update in case a register changed etc. */ + UpdateNoiseAmplitude(SN76489.clocks); + + /* Time of next transition */ + time = SN76489.ToneFreqVals[3]; + + /* Process any transitions that occur within clocks we're running */ + while (time < clocks) + { + /* Flip the flip-flop */ + SN76489.ToneFreqPos[3] = -SN76489.ToneFreqPos[3]; + if (SN76489.ToneFreqPos[3] == 1) + { + /* On the positive edge of the square wave (only once per cycle) */ + int Feedback = SN76489.NoiseShiftRegister; + if ( SN76489.Registers[6] & 0x4 ) + { + /* White noise */ + /* Calculate parity of fed-back bits for feedback */ + /* Do some optimised calculations for common (known) feedback values */ + /* If two bits fed back, I can do Feedback=(nsr & fb) && (nsr & fb ^ fb) */ + /* since that's (one or more bits set) && (not all bits set) */ + Feedback = ((Feedback & SN76489.NoiseFeedback) && ((Feedback & SN76489.NoiseFeedback) ^ SN76489.NoiseFeedback)); + } + else /* Periodic noise */ + Feedback = Feedback & 1; + + SN76489.NoiseShiftRegister = (SN76489.NoiseShiftRegister >> 1) | (Feedback << (SN76489.SRWidth - 1)); + UpdateNoiseAmplitude(time); + } + + /* Advance to time of next transition */ + time += NoiseFreq * PSG_MCYCLES_RATIO; + } + + /* Update channel tone counter */ + SN76489.ToneFreqVals[3] = time; +} + +static void SN76489_RunUntil(unsigned int clocks) +{ + int i; + + /* Run noise first, since it might use current value of third tone frequency counter */ + RunNoise(clocks); + + /* Run tone channels */ + for (i=0; i<3; ++i) + { + RunTone(i, clocks); + } +} + +void SN76489_Config(unsigned int clocks, int preAmp, int boostNoise, int stereo) +{ + int i; + + /* cycle-accurate Game Gear stereo */ + if (clocks > SN76489.clocks) + { + /* Run chip until current timestamp */ + SN76489_RunUntil(clocks); + + /* Update internal M-cycle counter */ + SN76489.clocks += ((clocks - SN76489.clocks + PSG_MCYCLES_RATIO - 1) / PSG_MCYCLES_RATIO) * PSG_MCYCLES_RATIO; + } + + for (i=0; i<4; i++) + { + /* stereo channel pre-amplification */ + SN76489.PreAmp[i][0] = preAmp * ((stereo >> (i + 4)) & 1); + SN76489.PreAmp[i][1] = preAmp * ((stereo >> (i + 0)) & 1); + + /* noise channel boost */ + if (i == 3) + { + SN76489.PreAmp[3][0] = SN76489.PreAmp[3][0] << boostNoise; + SN76489.PreAmp[3][1] = SN76489.PreAmp[3][1] << boostNoise; + } + + /* update stereo channel amplitude */ + SN76489.Channel[i][0]= (PSGVolumeValues[SN76489.Registers[i*2 + 1]] * SN76489.PreAmp[i][0]) / 100; + SN76489.Channel[i][1]= (PSGVolumeValues[SN76489.Registers[i*2 + 1]] * SN76489.PreAmp[i][1]) / 100; + } +} + +void SN76489_Update(unsigned int clocks) +{ + int i; + + if (clocks > SN76489.clocks) + { + /* Run chip until current timestamp */ + SN76489_RunUntil(clocks); + + /* Update internal M-cycle counter */ + SN76489.clocks += ((clocks - SN76489.clocks + PSG_MCYCLES_RATIO - 1) / PSG_MCYCLES_RATIO) * PSG_MCYCLES_RATIO; + } + + /* Adjust internal M-cycle counter for next frame */ + SN76489.clocks -= clocks; + + /* Adjust channel time counters for new frame */ + for (i=0; i<4; ++i) + { + SN76489.ToneFreqVals[i] -= clocks; + } +} + +void SN76489_Write(unsigned int clocks, unsigned int data) +{ + unsigned int index; + + if (clocks > SN76489.clocks) + { + /* run chip until current timestamp */ + SN76489_RunUntil(clocks); + + /* update internal M-cycle counter */ + SN76489.clocks += ((clocks - SN76489.clocks + PSG_MCYCLES_RATIO - 1) / PSG_MCYCLES_RATIO) * PSG_MCYCLES_RATIO; + } + + if (data & 0x80) + { + /* latch byte %1 cc t dddd */ + SN76489.LatchedRegister = index = (data >> 4) & 0x07; + } + else + { + /* restore latched register index */ + index = SN76489.LatchedRegister; + } + + switch (index) + { + case 0: + case 2: + case 4: /* Tone Channels frequency */ + { + if (data & 0x80) + { + /* Data byte %1 cc t dddd */ + SN76489.Registers[index] = (SN76489.Registers[index] & 0x3f0) | (data & 0xf); + } + else + { + /* Data byte %0 - dddddd */ + SN76489.Registers[index] = (SN76489.Registers[index] & 0x00f) | ((data & 0x3f) << 4); + } + + /* zero frequency behaves the same as a value of 1 */ + if (SN76489.Registers[index] == 0) + { + SN76489.Registers[index] = 1; + } + break; + } + + case 1: + case 3: + case 5: /* Tone Channels attenuation */ + { + data &= 0x0f; + SN76489.Registers[index] = data; + data = PSGVolumeValues[data]; + index >>= 1; + SN76489.Channel[index][0] = (data * SN76489.PreAmp[index][0]) / 100; + SN76489.Channel[index][1] = (data * SN76489.PreAmp[index][1]) / 100; + break; + } + + case 6: /* Noise control */ + { + SN76489.Registers[6] = data & 0x0f; + + /* reset shift register */ + SN76489.NoiseShiftRegister = NoiseInitialState; + + /* set noise signal generator frequency */ + SN76489.NoiseFreq = 0x10 << (data&0x3); + break; + } + + case 7: /* Noise attenuation */ + { + data &= 0x0f; + SN76489.Registers[7] = data; + data = PSGVolumeValues[data]; + SN76489.Channel[3][0] = (data * SN76489.PreAmp[3][0]) / 100; + SN76489.Channel[3][1] = (data * SN76489.PreAmp[3][1]) / 100; + break; + } + } +} diff --git a/genplus-gx/core/sound/sn76489.h b/genplus-gx/core/sound/sn76489.h new file mode 100644 index 0000000000..3c86caeede --- /dev/null +++ b/genplus-gx/core/sound/sn76489.h @@ -0,0 +1,23 @@ +/* + SN76489 emulation + by Maxim in 2001 and 2002 +*/ + +#ifndef _SN76489_H_ +#define _SN76489_H_ + +#include "blip_buf.h" + +#define SN_DISCRETE 0 +#define SN_INTEGRATED 1 + +/* Function prototypes */ +extern void SN76489_Init(blip_t* left, blip_t* right, int type); +extern void SN76489_Reset(void); +extern void SN76489_Config(unsigned int clocks, int preAmp, int boostNoise, int stereo); +extern void SN76489_Write(unsigned int clocks, unsigned int data); +extern void SN76489_Update(unsigned int cycles); +extern void *SN76489_GetContextPtr(void); +extern int SN76489_GetContextSize(void); + +#endif /* _SN76489_H_ */ diff --git a/genplus-gx/core/sound/sound.c b/genplus-gx/core/sound/sound.c new file mode 100644 index 0000000000..7dbbcb07ed --- /dev/null +++ b/genplus-gx/core/sound/sound.c @@ -0,0 +1,275 @@ +/*************************************************************************************** + * Genesis Plus + * Sound Hardware + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code) + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "blip_buf.h" + +/* FM output buffer (large enough to hold a whole frame at original chips rate) */ +static int fm_buffer[1080 * 2]; +static int fm_last[2]; +static int *fm_ptr; + +/* Cycle-accurate FM samples */ +static uint32 fm_cycles_ratio; +static uint32 fm_cycles_start; +static uint32 fm_cycles_count; + +/* YM chip function pointers */ +static void (*YM_Reset)(void); +static void (*YM_Update)(int *buffer, int length); +static void (*YM_Write)(unsigned int a, unsigned int v); + +/* Run FM chip until required M-cycles */ +INLINE void fm_update(unsigned int cycles) +{ + if (cycles > fm_cycles_count) + { + /* number of samples to run */ + unsigned int samples = (cycles - fm_cycles_count + fm_cycles_ratio - 1) / fm_cycles_ratio; + + /* run FM chip to sample buffer */ + YM_Update(fm_ptr, samples); + + /* update FM buffer pointer */ + fm_ptr += (samples << 1); + + /* update FM cycle counter */ + fm_cycles_count += samples * fm_cycles_ratio; + } +} + +void sound_init( void ) +{ + /* Initialize FM chip */ + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + /* YM2612 */ + YM2612Init(); + YM2612Config(config.dac_bits); + YM_Reset = YM2612ResetChip; + YM_Update = YM2612Update; + YM_Write = YM2612Write; + + /* chip is running a VCLK / 144 = MCLK / 7 / 144 */ + fm_cycles_ratio = 144 * 7; + } + else + { + /* YM2413 */ + YM2413Init(); + YM_Reset = YM2413ResetChip; + YM_Update = YM2413Update; + YM_Write = YM2413Write; + + /* chip is running a ZCLK / 72 = MCLK / 15 / 72 */ + fm_cycles_ratio = 72 * 15; + } + + /* Initialize PSG chip */ + SN76489_Config(0, config.psg_preamp, config.psgBoostNoise, 0xff); +} + +void sound_reset(void) +{ + /* reset sound chips */ + YM_Reset(); + SN76489_Reset(); + + /* reset FM buffer ouput */ + fm_last[0] = fm_last[1] = 0; + + /* reset FM buffer pointer */ + fm_ptr = fm_buffer; + + /* reset FM cycle counters */ + fm_cycles_start = fm_cycles_count = 0; +} + +int sound_update(unsigned int cycles) +{ + int delta, preamp, time, l, r, *ptr; + + /* Run PSG & FM chips until end of frame */ + SN76489_Update(cycles); + fm_update(cycles); + + /* FM output pre-amplification */ + preamp = config.fm_preamp; + + /* FM frame initial timestamp */ + time = fm_cycles_start; + + /* Restore last FM outputs from previous frame */ + l = fm_last[0]; + r = fm_last[1]; + + /* FM buffer start pointer */ + ptr = fm_buffer; + + /* flush FM samples */ + if (config.hq_fm) + { + /* high-quality Band-Limited synthesis */ + do + { + /* left channel */ + delta = ((*ptr++ * preamp) / 100) - l; + l += delta; + blip_add_delta(snd.blips[0][0], time, delta); + + /* right channel */ + delta = ((*ptr++ * preamp) / 100) - r; + r += delta; + blip_add_delta(snd.blips[0][1], time, delta); + + /* increment time counter */ + time += fm_cycles_ratio; + } + while (time < cycles); + } + else + { + /* faster Linear Interpolation */ + do + { + /* left channel */ + delta = ((*ptr++ * preamp) / 100) - l; + l += delta; + blip_add_delta_fast(snd.blips[0][0], time, delta); + + /* right channel */ + delta = ((*ptr++ * preamp) / 100) - r; + r += delta; + blip_add_delta_fast(snd.blips[0][1], time, delta); + + /* increment time counter */ + time += fm_cycles_ratio; + } + while (time < cycles); + } + + /* reset FM buffer pointer */ + fm_ptr = fm_buffer; + + /* save last FM output for next frame */ + fm_last[0] = l; + fm_last[1] = r; + + /* adjust FM cycle counters for next frame */ + fm_cycles_count = fm_cycles_start = time - cycles; + + /* end of blip buffers time frame */ + blip_end_frame(snd.blips[0][0], cycles); + blip_end_frame(snd.blips[0][1], cycles); + + /* return number of available samples */ + return blip_samples_avail(snd.blips[0][0]); +} + +int sound_context_save(uint8 *state) +{ + int bufferptr = 0; + + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + bufferptr = YM2612SaveContext(state); + } + else + { + save_param(YM2413GetContextPtr(),YM2413GetContextSize()); + } + + save_param(SN76489_GetContextPtr(),SN76489_GetContextSize()); + + save_param(&fm_cycles_start,sizeof(fm_cycles_start)); + + return bufferptr; +} + +int sound_context_load(uint8 *state) +{ + int bufferptr = 0; + + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + bufferptr = YM2612LoadContext(state); + YM2612Config(config.dac_bits); + } + else + { + load_param(YM2413GetContextPtr(),YM2413GetContextSize()); + } + + load_param(SN76489_GetContextPtr(),SN76489_GetContextSize()); + + load_param(&fm_cycles_start,sizeof(fm_cycles_start)); + fm_cycles_count = fm_cycles_start; + + return bufferptr; +} + +void fm_reset(unsigned int cycles) +{ + /* synchronize FM chip with CPU */ + fm_update(cycles); + + /* reset FM chip */ + YM_Reset(); +} + +void fm_write(unsigned int cycles, unsigned int address, unsigned int data) +{ + /* synchronize FM chip with CPU (on data port write only) */ + if (address & 1) + { + fm_update(cycles); + } + + /* write FM register */ + YM_Write(address, data); +} + +unsigned int fm_read(unsigned int cycles, unsigned int address) +{ + /* synchronize FM chip with CPU */ + fm_update(cycles); + + /* read FM status (YM2612 only) */ + return YM2612Read(); +} diff --git a/genplus-gx/core/sound/sound.h b/genplus-gx/core/sound/sound.h new file mode 100644 index 0000000000..a4284a7abb --- /dev/null +++ b/genplus-gx/core/sound/sound.h @@ -0,0 +1,53 @@ +/*************************************************************************************** + * Genesis Plus + * Sound Hardware + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code) + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _SOUND_H_ +#define _SOUND_H_ + +/* Function prototypes */ +extern void sound_init(void); +extern void sound_reset(void); +extern int sound_context_save(uint8 *state); +extern int sound_context_load(uint8 *state); +extern int sound_update(unsigned int cycles); +extern void fm_reset(unsigned int cycles); +extern void fm_write(unsigned int cycles, unsigned int address, unsigned int data); +extern unsigned int fm_read(unsigned int cycles, unsigned int address); + +#endif /* _SOUND_H_ */ diff --git a/genplus-gx/core/sound/ym2413.c b/genplus-gx/core/sound/ym2413.c new file mode 100644 index 0000000000..b71fbdf3dc --- /dev/null +++ b/genplus-gx/core/sound/ym2413.c @@ -0,0 +1,1721 @@ +/* +** +** File: ym2413.c - software implementation of YM2413 +** FM sound generator type OPLL +** +** Copyright (C) 2002 Jarek Burczynski +** +** Version 1.0 +** +** + +to do: + +- make sure of the sinus amplitude bits + +- make sure of the EG resolution bits (looks like the biggest + modulation index generated by the modulator is 123, 124 = no modulation) +- find proper algorithm for attack phase of EG + +- tune up instruments ROM + +- support sample replay in test mode (it is NOT as simple as setting bit 0 + in register 0x0f and using register 0x10 for sample data). + Which games use this feature ? + +*/ + +/** EkeEke (2011): removed multiple chips support, cleaned code & added FM board interface for Genesis Plus GX **/ + +#include "shared.h" + +#define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */ +#define EG_SH 16 /* 16.16 fixed point (EG timing) */ +#define LFO_SH 24 /* 8.24 fixed point (LFO calculations) */ + +#define FREQ_MASK ((1<>KSR */ + UINT8 mul; /* multiple: mul_tab[ML] */ + + /* Phase Generator */ + UINT32 phase; /* frequency counter */ + UINT32 freq; /* frequency counter step */ + UINT8 fb_shift; /* feedback shift value */ + INT32 op1_out[2]; /* slot1 output for feedback */ + + /* Envelope Generator */ + UINT8 eg_type; /* percussive/nonpercussive mode */ + UINT8 state; /* phase type */ + UINT32 TL; /* total level: TL << 2 */ + INT32 TLL; /* adjusted now TL */ + INT32 volume; /* envelope counter */ + UINT32 sl; /* sustain level: sl_tab[SL] */ + + UINT8 eg_sh_dp; /* (dump state) */ + UINT8 eg_sel_dp; /* (dump state) */ + UINT8 eg_sh_ar; /* (attack state) */ + UINT8 eg_sel_ar; /* (attack state) */ + UINT8 eg_sh_dr; /* (decay state) */ + UINT8 eg_sel_dr; /* (decay state) */ + UINT8 eg_sh_rr; /* (release state for non-perc.) */ + UINT8 eg_sel_rr; /* (release state for non-perc.) */ + UINT8 eg_sh_rs; /* (release state for perc.mode) */ + UINT8 eg_sel_rs; /* (release state for perc.mode) */ + + UINT32 key; /* 0 = KEY OFF, >0 = KEY ON */ + + /* LFO */ + UINT32 AMmask; /* LFO Amplitude Modulation enable mask */ + UINT8 vib; /* LFO Phase Modulation enable flag (active high)*/ + + /* waveform select */ + unsigned int wavetable; +} YM2413_OPLL_SLOT; + +typedef struct +{ + YM2413_OPLL_SLOT SLOT[2]; + + /* phase generator state */ + UINT32 block_fnum; /* block+fnum */ + UINT32 fc; /* Freq. freqement base */ + UINT32 ksl_base; /* KeyScaleLevel Base step */ + UINT8 kcode; /* key code (for key scaling) */ + UINT8 sus; /* sus on/off (release speed in percussive mode) */ +} YM2413_OPLL_CH; + +/* chip state */ +typedef struct { + YM2413_OPLL_CH P_CH[9]; /* OPLL chips have 9 channels */ + UINT8 instvol_r[9]; /* instrument/volume (or volume/volume in percussive mode) */ + + UINT32 eg_cnt; /* global envelope generator counter */ + UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/72 */ + UINT32 eg_timer_add; /* step of eg_timer */ + UINT32 eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */ + + UINT8 rhythm; /* Rhythm mode */ + + /* LFO */ + UINT32 lfo_am_cnt; + UINT32 lfo_am_inc; + UINT32 lfo_pm_cnt; + UINT32 lfo_pm_inc; + + UINT32 noise_rng; /* 23 bit noise shift register */ + UINT32 noise_p; /* current noise 'phase' */ + UINT32 noise_f; /* current noise period */ + + +/* instrument settings */ +/* + 0-user instrument + 1-15 - fixed instruments + 16 -bass drum settings + 17,18 - other percussion instruments +*/ + UINT8 inst_tab[19][8]; + + UINT32 fn_tab[1024]; /* fnumber->increment counter */ + + UINT8 address; /* address register */ + UINT8 status; /* status flag */ + + double clock; /* master clock (Hz) */ + int rate; /* sampling rate (Hz) */ +} YM2413; + +/* key scale level */ +/* table is 3dB/octave, DV converts this into 6dB/octave */ +/* 0.1875 is bit 0 weight of the envelope counter (volume) expressed in the 'decibel' scale */ +#define DV (0.1875/1.0) +static const UINT32 ksl_tab[8*16]= +{ + /* OCT 0 */ + 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, + 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, + 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, + 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, + /* OCT 1 */ + 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, + 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, + 0.000/DV, 0.750/DV, 1.125/DV, 1.500/DV, + 1.875/DV, 2.250/DV, 2.625/DV, 3.000/DV, + /* OCT 2 */ + 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV, + 0.000/DV, 1.125/DV, 1.875/DV, 2.625/DV, + 3.000/DV, 3.750/DV, 4.125/DV, 4.500/DV, + 4.875/DV, 5.250/DV, 5.625/DV, 6.000/DV, + /* OCT 3 */ + 0.000/DV, 0.000/DV, 0.000/DV, 1.875/DV, + 3.000/DV, 4.125/DV, 4.875/DV, 5.625/DV, + 6.000/DV, 6.750/DV, 7.125/DV, 7.500/DV, + 7.875/DV, 8.250/DV, 8.625/DV, 9.000/DV, + /* OCT 4 */ + 0.000/DV, 0.000/DV, 3.000/DV, 4.875/DV, + 6.000/DV, 7.125/DV, 7.875/DV, 8.625/DV, + 9.000/DV, 9.750/DV,10.125/DV,10.500/DV, + 10.875/DV,11.250/DV,11.625/DV,12.000/DV, + /* OCT 5 */ + 0.000/DV, 3.000/DV, 6.000/DV, 7.875/DV, + 9.000/DV,10.125/DV,10.875/DV,11.625/DV, + 12.000/DV,12.750/DV,13.125/DV,13.500/DV, + 13.875/DV,14.250/DV,14.625/DV,15.000/DV, + /* OCT 6 */ + 0.000/DV, 6.000/DV, 9.000/DV,10.875/DV, + 12.000/DV,13.125/DV,13.875/DV,14.625/DV, + 15.000/DV,15.750/DV,16.125/DV,16.500/DV, + 16.875/DV,17.250/DV,17.625/DV,18.000/DV, + /* OCT 7 */ + 0.000/DV, 9.000/DV,12.000/DV,13.875/DV, + 15.000/DV,16.125/DV,16.875/DV,17.625/DV, + 18.000/DV,18.750/DV,19.125/DV,19.500/DV, + 19.875/DV,20.250/DV,20.625/DV,21.000/DV +}; +#undef DV + +/* sustain level table (3dB per step) */ +/* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,45 (dB)*/ +#define SC(db) (UINT32) ( db * (1.0/ENV_STEP) ) +static const UINT32 sl_tab[16]={ + SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7), + SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(15) +}; +#undef SC + + +#define RATE_STEPS (8) +static const unsigned char eg_inc[15*RATE_STEPS]={ + +/*cycle:0 1 2 3 4 5 6 7*/ + +/* 0 */ 0,1, 0,1, 0,1, 0,1, /* rates 00..12 0 (increment by 0 or 1) */ +/* 1 */ 0,1, 0,1, 1,1, 0,1, /* rates 00..12 1 */ +/* 2 */ 0,1, 1,1, 0,1, 1,1, /* rates 00..12 2 */ +/* 3 */ 0,1, 1,1, 1,1, 1,1, /* rates 00..12 3 */ + +/* 4 */ 1,1, 1,1, 1,1, 1,1, /* rate 13 0 (increment by 1) */ +/* 5 */ 1,1, 1,2, 1,1, 1,2, /* rate 13 1 */ +/* 6 */ 1,2, 1,2, 1,2, 1,2, /* rate 13 2 */ +/* 7 */ 1,2, 2,2, 1,2, 2,2, /* rate 13 3 */ + +/* 8 */ 2,2, 2,2, 2,2, 2,2, /* rate 14 0 (increment by 2) */ +/* 9 */ 2,2, 2,4, 2,2, 2,4, /* rate 14 1 */ +/*10 */ 2,4, 2,4, 2,4, 2,4, /* rate 14 2 */ +/*11 */ 2,4, 4,4, 2,4, 4,4, /* rate 14 3 */ + +/*12 */ 4,4, 4,4, 4,4, 4,4, /* rates 15 0, 15 1, 15 2, 15 3 (increment by 4) */ +/*13 */ 8,8, 8,8, 8,8, 8,8, /* rates 15 2, 15 3 for attack */ +/*14 */ 0,0, 0,0, 0,0, 0,0, /* infinity rates for attack and decay(s) */ +}; + + +#define O(a) (a*RATE_STEPS) + +/*note that there is no O(13) in this table - it's directly in the code */ +static const unsigned char eg_rate_select[16+64+16]={ /* Envelope Generator rates (16 + 64 rates + 16 RKS) */ +/* 16 infinite time rates */ +O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14), +O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14), + +/* rates 00-12 */ +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), + +/* rate 13 */ +O( 4),O( 5),O( 6),O( 7), + +/* rate 14 */ +O( 8),O( 9),O(10),O(11), + +/* rate 15 */ +O(12),O(12),O(12),O(12), + +/* 16 dummy rates (same as 15 3) */ +O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12), +O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12), + +}; +#undef O + +/*rate 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 */ +/*shift 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0 */ +/*mask 8191, 4095, 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0 */ + +#define O(a) (a*1) +static const unsigned char eg_rate_shift[16+64+16]={ /* Envelope Generator counter shifts (16 + 64 rates + 16 RKS) */ +/* 16 infinite time rates */ +O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0), +O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0), + +/* rates 00-12 */ +O(13),O(13),O(13),O(13), +O(12),O(12),O(12),O(12), +O(11),O(11),O(11),O(11), +O(10),O(10),O(10),O(10), +O( 9),O( 9),O( 9),O( 9), +O( 8),O( 8),O( 8),O( 8), +O( 7),O( 7),O( 7),O( 7), +O( 6),O( 6),O( 6),O( 6), +O( 5),O( 5),O( 5),O( 5), +O( 4),O( 4),O( 4),O( 4), +O( 3),O( 3),O( 3),O( 3), +O( 2),O( 2),O( 2),O( 2), +O( 1),O( 1),O( 1),O( 1), + +/* rate 13 */ +O( 0),O( 0),O( 0),O( 0), + +/* rate 14 */ +O( 0),O( 0),O( 0),O( 0), + +/* rate 15 */ +O( 0),O( 0),O( 0),O( 0), + +/* 16 dummy rates (same as 15 3) */ +O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0), +O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0), + +}; +#undef O + + +/* multiple table */ +#define ML 2 +static const UINT8 mul_tab[16]= { +/* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,10,12,12,15,15 */ + 0.50*ML, 1.00*ML, 2.00*ML, 3.00*ML, 4.00*ML, 5.00*ML, 6.00*ML, 7.00*ML, + 8.00*ML, 9.00*ML,10.00*ML,10.00*ML,12.00*ML,12.00*ML,15.00*ML,15.00*ML +}; +#undef ML + +/* TL_TAB_LEN is calculated as: +* 11 - sinus amplitude bits (Y axis) +* 2 - sinus sign bit (Y axis) +* TL_RES_LEN - sinus resolution (X axis) +*/ +#define TL_TAB_LEN (11*2*TL_RES_LEN) +static signed int tl_tab[TL_TAB_LEN]; + +#define ENV_QUIET (TL_TAB_LEN>>5) + +/* sin waveform table in 'decibel' scale */ +/* two waveforms on OPLL type chips */ +static unsigned int sin_tab[SIN_LEN * 2]; + + +/* LFO Amplitude Modulation table (verified on real YM3812) + 27 output levels (triangle waveform); 1 level takes one of: 192, 256 or 448 samples + + Length: 210 elements. + + Each of the elements has to be repeated + exactly 64 times (on 64 consecutive samples). + The whole table takes: 64 * 210 = 13440 samples. + +We use data>>1, until we find what it really is on real chip... + +*/ + +#define LFO_AM_TAB_ELEMENTS 210 + +static const UINT8 lfo_am_table[LFO_AM_TAB_ELEMENTS] = { +0,0,0,0,0,0,0, +1,1,1,1, +2,2,2,2, +3,3,3,3, +4,4,4,4, +5,5,5,5, +6,6,6,6, +7,7,7,7, +8,8,8,8, +9,9,9,9, +10,10,10,10, +11,11,11,11, +12,12,12,12, +13,13,13,13, +14,14,14,14, +15,15,15,15, +16,16,16,16, +17,17,17,17, +18,18,18,18, +19,19,19,19, +20,20,20,20, +21,21,21,21, +22,22,22,22, +23,23,23,23, +24,24,24,24, +25,25,25,25, +26,26,26, +25,25,25,25, +24,24,24,24, +23,23,23,23, +22,22,22,22, +21,21,21,21, +20,20,20,20, +19,19,19,19, +18,18,18,18, +17,17,17,17, +16,16,16,16, +15,15,15,15, +14,14,14,14, +13,13,13,13, +12,12,12,12, +11,11,11,11, +10,10,10,10, +9,9,9,9, +8,8,8,8, +7,7,7,7, +6,6,6,6, +5,5,5,5, +4,4,4,4, +3,3,3,3, +2,2,2,2, +1,1,1,1 +}; + +/* LFO Phase Modulation table (verified on real YM2413) */ +static const INT8 lfo_pm_table[8*8] = { + +/* FNUM2/FNUM = 0 00xxxxxx (0x0000) */ +0, 0, 0, 0, 0, 0, 0, 0, + +/* FNUM2/FNUM = 0 01xxxxxx (0x0040) */ +1, 0, 0, 0,-1, 0, 0, 0, + +/* FNUM2/FNUM = 0 10xxxxxx (0x0080) */ +2, 1, 0,-1,-2,-1, 0, 1, + +/* FNUM2/FNUM = 0 11xxxxxx (0x00C0) */ +3, 1, 0,-1,-3,-1, 0, 1, + +/* FNUM2/FNUM = 1 00xxxxxx (0x0100) */ +4, 2, 0,-2,-4,-2, 0, 2, + +/* FNUM2/FNUM = 1 01xxxxxx (0x0140) */ +5, 2, 0,-2,-5,-2, 0, 2, + +/* FNUM2/FNUM = 1 10xxxxxx (0x0180) */ +6, 3, 0,-3,-6,-3, 0, 3, + +/* FNUM2/FNUM = 1 11xxxxxx (0x01C0) */ +7, 3, 0,-3,-7,-3, 0, 3, +}; + + +/* This is not 100% perfect yet but very close */ +/* + - multi parameters are 100% correct (instruments and drums) + - LFO PM and AM enable are 100% correct + - waveform DC and DM select are 100% correct +*/ + +static unsigned char table[19][8] = { +/* MULT MULT modTL DcDmFb AR/DR AR/DR SL/RR SL/RR */ +/* 0 1 2 3 4 5 6 7 */ + {0x49, 0x4c, 0x4c, 0x12, 0x00, 0x00, 0x00, 0x00 }, /* 0 */ + + {0x61, 0x61, 0x1e, 0x17, 0xf0, 0x78, 0x00, 0x17 }, /* 1 */ + {0x13, 0x41, 0x1e, 0x0d, 0xd7, 0xf7, 0x13, 0x13 }, /* 2 */ + {0x13, 0x01, 0x99, 0x04, 0xf2, 0xf4, 0x11, 0x23 }, /* 3 */ + {0x21, 0x61, 0x1b, 0x07, 0xaf, 0x64, 0x40, 0x27 }, /* 4 */ + +/*{0x22, 0x21, 0x1e, 0x09, 0xf0, 0x76, 0x08, 0x28 }, */ /* 5 */ + {0x22, 0x21, 0x1e, 0x06, 0xf0, 0x75, 0x08, 0x18 }, /* 5 */ + +/*{0x31, 0x22, 0x16, 0x09, 0x90, 0x7f, 0x00, 0x08 }, */ /* 6 */ + {0x31, 0x22, 0x16, 0x05, 0x90, 0x71, 0x00, 0x13 }, /* 6 */ + + {0x21, 0x61, 0x1d, 0x07, 0x82, 0x80, 0x10, 0x17 }, /* 7 */ + {0x23, 0x21, 0x2d, 0x16, 0xc0, 0x70, 0x07, 0x07 }, /* 8 */ + {0x61, 0x61, 0x1b, 0x06, 0x64, 0x65, 0x10, 0x17 }, /* 9 */ + +/* {0x61, 0x61, 0x0c, 0x08, 0x85, 0xa0, 0x79, 0x07 }, */ /* A */ + {0x61, 0x61, 0x0c, 0x18, 0x85, 0xf0, 0x70, 0x07 }, /* A */ + + {0x23, 0x01, 0x07, 0x11, 0xf0, 0xa4, 0x00, 0x22 }, /* B */ + {0x97, 0xc1, 0x24, 0x07, 0xff, 0xf8, 0x22, 0x12 }, /* C */ + +/* {0x61, 0x10, 0x0c, 0x08, 0xf2, 0xc4, 0x40, 0xc8 }, */ /* D */ + {0x61, 0x10, 0x0c, 0x05, 0xf2, 0xf4, 0x40, 0x44 }, /* D */ + + {0x01, 0x01, 0x55, 0x03, 0xf3, 0x92, 0xf3, 0xf3 }, /* E */ + {0x61, 0x41, 0x89, 0x03, 0xf1, 0xf4, 0xf0, 0x13 }, /* F */ + +/* drum instruments definitions */ +/* MULTI MULTI modTL xxx AR/DR AR/DR SL/RR SL/RR */ +/* 0 1 2 3 4 5 6 7 */ + {0x01, 0x01, 0x16, 0x00, 0xfd, 0xf8, 0x2f, 0x6d },/* BD(multi verified, modTL verified, mod env - verified(close), carr. env verifed) */ + {0x01, 0x01, 0x00, 0x00, 0xd8, 0xd8, 0xf9, 0xf8 },/* HH(multi verified), SD(multi not used) */ + {0x05, 0x01, 0x00, 0x00, 0xf8, 0xba, 0x49, 0x55 },/* TOM(multi,env verified), TOP CYM(multi verified, env verified) */ +}; + +static signed int output[2]; + +static UINT32 LFO_AM; +static INT32 LFO_PM; + +/* emulated chip */ +static YM2413 ym2413; + +/* advance LFO to next sample */ +INLINE void advance_lfo(void) +{ + /* LFO */ + ym2413.lfo_am_cnt += ym2413.lfo_am_inc; + if (ym2413.lfo_am_cnt >= (LFO_AM_TAB_ELEMENTS<> LFO_SH ] >> 1; + + ym2413.lfo_pm_cnt += ym2413.lfo_pm_inc; + LFO_PM = (ym2413.lfo_pm_cnt>>LFO_SH) & 7; +} + +/* advance to next sample */ +INLINE void advance(void) +{ + YM2413_OPLL_CH *CH; + YM2413_OPLL_SLOT *op; + unsigned int i; + + /* Envelope Generator */ + ym2413.eg_timer += ym2413.eg_timer_add; + + while (ym2413.eg_timer >= ym2413.eg_timer_overflow) + { + ym2413.eg_timer -= ym2413.eg_timer_overflow; + + ym2413.eg_cnt++; + + for (i=0; i<9*2; i++) + { + CH = &ym2413.P_CH[i>>1]; + + op = &CH->SLOT[i&1]; + + switch(op->state) + { + case EG_DMP: /* dump phase */ + /*dump phase is performed by both operators in each channel*/ + /*when CARRIER envelope gets down to zero level, + ** phases in BOTH opearators are reset (at the same time ?) + */ + if ( !(ym2413.eg_cnt & ((1<eg_sh_dp)-1) ) ) + { + op->volume += eg_inc[op->eg_sel_dp + ((ym2413.eg_cnt>>op->eg_sh_dp)&7)]; + + if ( op->volume >= MAX_ATT_INDEX ) + { + op->volume = MAX_ATT_INDEX; + op->state = EG_ATT; + /* restart Phase Generator */ + op->phase = 0; + } + } + break; + + case EG_ATT: /* attack phase */ + if ( !(ym2413.eg_cnt & ((1<eg_sh_ar)-1) ) ) + { + op->volume += (~op->volume * + (eg_inc[op->eg_sel_ar + ((ym2413.eg_cnt>>op->eg_sh_ar)&7)]) + ) >>2; + + if (op->volume <= MIN_ATT_INDEX) + { + op->volume = MIN_ATT_INDEX; + op->state = EG_DEC; + } + } + break; + + case EG_DEC: /* decay phase */ + if ( !(ym2413.eg_cnt & ((1<eg_sh_dr)-1) ) ) + { + op->volume += eg_inc[op->eg_sel_dr + ((ym2413.eg_cnt>>op->eg_sh_dr)&7)]; + + if ( op->volume >= op->sl ) + op->state = EG_SUS; + } + break; + + case EG_SUS: /* sustain phase */ + /* this is important behaviour: + one can change percusive/non-percussive modes on the fly and + the chip will remain in sustain phase - verified on real YM3812 */ + + if(op->eg_type) /* non-percussive mode (sustained tone) */ + { + /* do nothing */ + } + else /* percussive mode */ + { + /* during sustain phase chip adds Release Rate (in percussive mode) */ + if ( !(ym2413.eg_cnt & ((1<eg_sh_rr)-1) ) ) + { + op->volume += eg_inc[op->eg_sel_rr + ((ym2413.eg_cnt>>op->eg_sh_rr)&7)]; + + if ( op->volume >= MAX_ATT_INDEX ) + op->volume = MAX_ATT_INDEX; + } + /* else do nothing in sustain phase */ + } + break; + + case EG_REL: /* release phase */ + /* exclude modulators in melody channels from performing anything in this mode*/ + /* allowed are only carriers in melody mode and rhythm slots in rhythm mode */ + + /*This table shows which operators and on what conditions are allowed to perform EG_REL: + (a) - always perform EG_REL + (n) - never perform EG_REL + (r) - perform EG_REL in Rhythm mode ONLY + 0: 0 (n), 1 (a) + 1: 2 (n), 3 (a) + 2: 4 (n), 5 (a) + 3: 6 (n), 7 (a) + 4: 8 (n), 9 (a) + 5: 10(n), 11(a) + 6: 12(r), 13(a) + 7: 14(r), 15(a) + 8: 16(r), 17(a) + */ + if ( (i&1) || ((ym2413.rhythm&0x20) && (i>=12)) )/* exclude modulators */ + { + if(op->eg_type) /* non-percussive mode (sustained tone) */ + /*this is correct: use RR when SUS = OFF*/ + /*and use RS when SUS = ON*/ + { + if (CH->sus) + { + if ( !(ym2413.eg_cnt & ((1<eg_sh_rs)-1) ) ) + { + op->volume += eg_inc[op->eg_sel_rs + ((ym2413.eg_cnt>>op->eg_sh_rs)&7)]; + if ( op->volume >= MAX_ATT_INDEX ) + { + op->volume = MAX_ATT_INDEX; + op->state = EG_OFF; + } + } + } + else + { + if ( !(ym2413.eg_cnt & ((1<eg_sh_rr)-1) ) ) + { + op->volume += eg_inc[op->eg_sel_rr + ((ym2413.eg_cnt>>op->eg_sh_rr)&7)]; + if ( op->volume >= MAX_ATT_INDEX ) + { + op->volume = MAX_ATT_INDEX; + op->state = EG_OFF; + } + } + } + } + else /* percussive mode */ + { + if ( !(ym2413.eg_cnt & ((1<eg_sh_rs)-1) ) ) + { + op->volume += eg_inc[op->eg_sel_rs + ((ym2413.eg_cnt>>op->eg_sh_rs)&7)]; + if ( op->volume >= MAX_ATT_INDEX ) + { + op->volume = MAX_ATT_INDEX; + op->state = EG_OFF; + } + } + } + } + break; + + default: + break; + } + } + } + + for (i=0; i<9*2; i++) + { + CH = &ym2413.P_CH[i/2]; + op = &CH->SLOT[i&1]; + + /* Phase Generator */ + if(op->vib) + { + UINT8 block; + + unsigned int fnum_lfo = 8*((CH->block_fnum&0x01c0) >> 6); + unsigned int block_fnum = CH->block_fnum * 2; + signed int lfo_fn_table_index_offset = lfo_pm_table[LFO_PM + fnum_lfo ]; + + if (lfo_fn_table_index_offset) /* LFO phase modulation active */ + { + block_fnum += lfo_fn_table_index_offset; + block = (block_fnum&0x1c00) >> 10; + op->phase += (ym2413.fn_tab[block_fnum&0x03ff] >> (7-block)) * op->mul; + } + else /* LFO phase modulation = zero */ + { + op->phase += op->freq; + } + } + else /* LFO phase modulation disabled for this operator */ + { + op->phase += op->freq; + } + } + + /* The Noise Generator of the YM3812 is 23-bit shift register. + * Period is equal to 2^23-2 samples. + * Register works at sampling frequency of the chip, so output + * can change on every sample. + * + * Output of the register and input to the bit 22 is: + * bit0 XOR bit14 XOR bit15 XOR bit22 + * + * Simply use bit 22 as the noise output. + */ + + ym2413.noise_p += ym2413.noise_f; + i = ym2413.noise_p >> FREQ_SH; /* number of events (shifts of the shift register) */ + ym2413.noise_p &= FREQ_MASK; + while (i) + { + /* + UINT32 j; + j = ( (chip->noise_rng) ^ (chip->noise_rng>>14) ^ (chip->noise_rng>>15) ^ (chip->noise_rng>>22) ) & 1; + chip->noise_rng = (j<<22) | (chip->noise_rng>>1); + */ + + /* + Instead of doing all the logic operations above, we + use a trick here (and use bit 0 as the noise output). + The difference is only that the noise bit changes one + step ahead. This doesn't matter since we don't know + what is real state of the noise_rng after the reset. + */ + + if (ym2413.noise_rng & 1) ym2413.noise_rng ^= 0x800302; + ym2413.noise_rng >>= 1; + + i--; + } +} + + +INLINE signed int op_calc(UINT32 phase, unsigned int env, signed int pm, unsigned int wave_tab) +{ + UINT32 p = (env<<5) + sin_tab[wave_tab + ((((signed int)((phase & ~FREQ_MASK) + (pm<<17))) >> FREQ_SH ) & SIN_MASK) ]; + + if (p >= TL_TAB_LEN) + return 0; + return tl_tab[p]; +} + +INLINE signed int op_calc1(UINT32 phase, unsigned int env, signed int pm, unsigned int wave_tab) +{ + UINT32 p = (env<<5) + sin_tab[wave_tab + ((((signed int)((phase & ~FREQ_MASK) + pm)) >> FREQ_SH ) & SIN_MASK) ]; + + if (p >= TL_TAB_LEN) + return 0; + return tl_tab[p]; +} + +#define volume_calc(OP) ((OP)->TLL + ((UINT32)(OP)->volume) + (LFO_AM & (OP)->AMmask)) + +/* calculate output */ +INLINE void chan_calc( YM2413_OPLL_CH *CH ) +{ + YM2413_OPLL_SLOT *SLOT; + unsigned int env; + signed int out; + signed int phase_modulation; /* phase modulation input (SLOT 2) */ + + /* SLOT 1 */ + SLOT = &CH->SLOT[SLOT1]; + env = volume_calc(SLOT); + out = SLOT->op1_out[0] + SLOT->op1_out[1]; + + SLOT->op1_out[0] = SLOT->op1_out[1]; + phase_modulation = SLOT->op1_out[0]; + + SLOT->op1_out[1] = 0; + + if( env < ENV_QUIET ) + { + if (!SLOT->fb_shift) + out = 0; + SLOT->op1_out[1] = op_calc1(SLOT->phase, env, (out<fb_shift), SLOT->wavetable ); + } + + /* SLOT 2 */ + + SLOT++; + env = volume_calc(SLOT); + if( env < ENV_QUIET ) + { + output[0] += op_calc(SLOT->phase, env, phase_modulation, SLOT->wavetable); + } +} + +/* + operators used in the rhythm sounds generation process: + + Envelope Generator: + +channel operator register number Bass High Snare Tom Top +/ slot number TL ARDR SLRR Wave Drum Hat Drum Tom Cymbal + 6 / 0 12 50 70 90 f0 + + 6 / 1 15 53 73 93 f3 + + 7 / 0 13 51 71 91 f1 + + 7 / 1 16 54 74 94 f4 + + 8 / 0 14 52 72 92 f2 + + 8 / 1 17 55 75 95 f5 + + + Phase Generator: + +channel operator register number Bass High Snare Tom Top +/ slot number MULTIPLE Drum Hat Drum Tom Cymbal + 6 / 0 12 30 + + 6 / 1 15 33 + + 7 / 0 13 31 + + + + 7 / 1 16 34 ----- n o t u s e d ----- + 8 / 0 14 32 + + 8 / 1 17 35 + + + +channel operator register number Bass High Snare Tom Top +number number BLK/FNUM2 FNUM Drum Hat Drum Tom Cymbal + 6 12,15 B6 A6 + + + 7 13,16 B7 A7 + + + + + 8 14,17 B8 A8 + + + + +*/ + +/* calculate rhythm */ + +INLINE void rhythm_calc( YM2413_OPLL_CH *CH, unsigned int noise ) +{ + YM2413_OPLL_SLOT *SLOT; + signed int out; + unsigned int env; + signed int phase_modulation; /* phase modulation input (SLOT 2) */ + + + /* Bass Drum (verified on real YM3812): + - depends on the channel 6 'connect' register: + when connect = 0 it works the same as in normal (non-rhythm) mode (op1->op2->out) + when connect = 1 _only_ operator 2 is present on output (op2->out), operator 1 is ignored + - output sample always is multiplied by 2 + */ + + + /* SLOT 1 */ + SLOT = &CH[6].SLOT[SLOT1]; + env = volume_calc(SLOT); + + out = SLOT->op1_out[0] + SLOT->op1_out[1]; + SLOT->op1_out[0] = SLOT->op1_out[1]; + + phase_modulation = SLOT->op1_out[0]; + + SLOT->op1_out[1] = 0; + if( env < ENV_QUIET ) + { + if (!SLOT->fb_shift) + out = 0; + SLOT->op1_out[1] = op_calc1(SLOT->phase, env, (out<fb_shift), SLOT->wavetable ); + } + + /* SLOT 2 */ + SLOT++; + env = volume_calc(SLOT); + if( env < ENV_QUIET ) + output[1] += op_calc(SLOT->phase, env, phase_modulation, SLOT->wavetable); + + + /* Phase generation is based on: */ + /* HH (13) channel 7->slot 1 combined with channel 8->slot 2 (same combination as TOP CYMBAL but different output phases) */ + /* SD (16) channel 7->slot 1 */ + /* TOM (14) channel 8->slot 1 */ + /* TOP (17) channel 7->slot 1 combined with channel 8->slot 2 (same combination as HIGH HAT but different output phases) */ + + /* Envelope generation based on: */ + /* HH channel 7->slot1 */ + /* SD channel 7->slot2 */ + /* TOM channel 8->slot1 */ + /* TOP channel 8->slot2 */ + + + /* The following formulas can be well optimized. + I leave them in direct form for now (in case I've missed something). + */ + + /* High Hat (verified on real YM3812) */ + env = volume_calc(&CH[7].SLOT[SLOT1]); + if( env < ENV_QUIET ) + { + + /* high hat phase generation: + phase = d0 or 234 (based on frequency only) + phase = 34 or 2d0 (based on noise) + */ + + /* base frequency derived from operator 1 in channel 7 */ + unsigned char bit7 = ((CH[7].SLOT[SLOT1].phase>>FREQ_SH)>>7)&1; + unsigned char bit3 = ((CH[7].SLOT[SLOT1].phase>>FREQ_SH)>>3)&1; + unsigned char bit2 = ((CH[7].SLOT[SLOT1].phase>>FREQ_SH)>>2)&1; + + unsigned char res1 = (bit2 ^ bit7) | bit3; + + /* when res1 = 0 phase = 0x000 | 0xd0; */ + /* when res1 = 1 phase = 0x200 | (0xd0>>2); */ + UINT32 phase = res1 ? (0x200|(0xd0>>2)) : 0xd0; + + /* enable gate based on frequency of operator 2 in channel 8 */ + unsigned char bit5e= ((CH[8].SLOT[SLOT2].phase>>FREQ_SH)>>5)&1; + unsigned char bit3e= ((CH[8].SLOT[SLOT2].phase>>FREQ_SH)>>3)&1; + + unsigned char res2 = (bit3e | bit5e); + + /* when res2 = 0 pass the phase from calculation above (res1); */ + /* when res2 = 1 phase = 0x200 | (0xd0>>2); */ + if (res2) + phase = (0x200|(0xd0>>2)); + + + /* when phase & 0x200 is set and noise=1 then phase = 0x200|0xd0 */ + /* when phase & 0x200 is set and noise=0 then phase = 0x200|(0xd0>>2), ie no change */ + if (phase&0x200) + { + if (noise) + phase = 0x200|0xd0; + } + else + /* when phase & 0x200 is clear and noise=1 then phase = 0xd0>>2 */ + /* when phase & 0x200 is clear and noise=0 then phase = 0xd0, ie no change */ + { + if (noise) + phase = 0xd0>>2; + } + + output[1] += op_calc(phase<>FREQ_SH)>>8)&1; + + /* when bit8 = 0 phase = 0x100; */ + /* when bit8 = 1 phase = 0x200; */ + UINT32 phase = bit8 ? 0x200 : 0x100; + + /* Noise bit XOR'es phase by 0x100 */ + /* when noisebit = 0 pass the phase from calculation above */ + /* when noisebit = 1 phase ^= 0x100; */ + /* in other words: phase ^= (noisebit<<8); */ + if (noise) + phase ^= 0x100; + + output[1] += op_calc(phase<>FREQ_SH)>>7)&1; + unsigned char bit3 = ((CH[7].SLOT[SLOT1].phase>>FREQ_SH)>>3)&1; + unsigned char bit2 = ((CH[7].SLOT[SLOT1].phase>>FREQ_SH)>>2)&1; + + unsigned char res1 = (bit2 ^ bit7) | bit3; + + /* when res1 = 0 phase = 0x000 | 0x100; */ + /* when res1 = 1 phase = 0x200 | 0x100; */ + UINT32 phase = res1 ? 0x300 : 0x100; + + /* enable gate based on frequency of operator 2 in channel 8 */ + unsigned char bit5e= ((CH[8].SLOT[SLOT2].phase>>FREQ_SH)>>5)&1; + unsigned char bit3e= ((CH[8].SLOT[SLOT2].phase>>FREQ_SH)>>3)&1; + + unsigned char res2 = (bit3e | bit5e); + /* when res2 = 0 pass the phase from calculation above (res1); */ + /* when res2 = 1 phase = 0x200 | 0x100; */ + if (res2) + phase = 0x300; + + output[1] += op_calc(phase<>= 4; /* 12 bits here */ + if (n&1) /* round to nearest */ + n = (n>>1)+1; + else + n = n>>1; + /* 11 bits here (rounded) */ + tl_tab[ x*2 + 0 ] = n; + tl_tab[ x*2 + 1 ] = -tl_tab[ x*2 + 0 ]; + + for (i=1; i<11; i++) + { + tl_tab[ x*2+0 + i*2*TL_RES_LEN ] = tl_tab[ x*2+0 ]>>i; + tl_tab[ x*2+1 + i*2*TL_RES_LEN ] = -tl_tab[ x*2+0 + i*2*TL_RES_LEN ]; + } + } + + for (i=0; i0.0) + o = 8*log(1.0/m)/log(2); /* convert to 'decibels' */ + else + o = 8*log(-1.0/m)/log(2); /* convert to 'decibels' */ + + o = o / (ENV_STEP/4); + + n = (int)(2.0*o); + if (n&1) /* round to nearest */ + n = (n>>1)+1; + else + n = n>>1; + + /* waveform 0: standard sinus */ + sin_tab[ i ] = n*2 + (m>=0.0? 0: 1 ); + + /* waveform 1: __ __ */ + /* / \____/ \____*/ + /* output only first half of the sinus waveform (positive one) */ + if (i & (1<<(SIN_BITS-1)) ) + sin_tab[1*SIN_LEN+i] = TL_TAB_LEN; + else + sin_tab[1*SIN_LEN+i] = sin_tab[i]; + } + + return 1; +} + + +static void OPLL_initalize(void) +{ + int i; + + /* YM2413 always running at original frequency */ + double freqbase = 1.0; + + /* make fnumber -> increment counter table */ + for( i = 0 ; i < 1024; i++ ) + { + /* OPLL (YM2413) phase increment counter = 18bit */ + ym2413.fn_tab[i] = (UINT32)( (double)i * 64 * freqbase * (1<<(FREQ_SH-10)) ); /* -10 because chip works with 10.10 fixed point, while we use 16.16 */ + } + + /* Amplitude modulation: 27 output levels (triangle waveform); 1 level takes one of: 192, 256 or 448 samples */ + /* One entry from LFO_AM_TABLE lasts for 64 samples */ + ym2413.lfo_am_inc = (1.0 / 64.0 ) * (1<key ) + { + /* do NOT restart Phase Generator (verified on real YM2413)*/ + /* phase -> Dump */ + SLOT->state = EG_DMP; + } + SLOT->key |= key_set; +} + +INLINE void KEY_OFF(YM2413_OPLL_SLOT *SLOT, UINT32 key_clr) +{ + if( SLOT->key ) + { + SLOT->key &= key_clr; + + if( !SLOT->key ) + { + /* phase -> Release */ + if (SLOT->state>EG_REL) + SLOT->state = EG_REL; + } + } +} + +/* update phase increment counter of operator (also update the EG rates if necessary) */ +INLINE void CALC_FCSLOT(YM2413_OPLL_CH *CH,YM2413_OPLL_SLOT *SLOT) +{ + int ksr; + UINT32 SLOT_rs; + UINT32 SLOT_dp; + + /* (frequency) phase increment counter */ + SLOT->freq = CH->fc * SLOT->mul; + ksr = CH->kcode >> SLOT->KSR; + + if( SLOT->ksr != ksr ) + { + SLOT->ksr = ksr; + + /* calculate envelope generator rates */ + if ((SLOT->ar + SLOT->ksr) < 16+62) + { + SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ]; + SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ]; + } + else + { + SLOT->eg_sh_ar = 0; + SLOT->eg_sel_ar = 13*RATE_STEPS; + } + SLOT->eg_sh_dr = eg_rate_shift [SLOT->dr + SLOT->ksr ]; + SLOT->eg_sel_dr = eg_rate_select[SLOT->dr + SLOT->ksr ]; + SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr ]; + SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr ]; + + } + + if (CH->sus) + SLOT_rs = 16 + (5<<2); + else + SLOT_rs = 16 + (7<<2); + + SLOT->eg_sh_rs = eg_rate_shift [SLOT_rs + SLOT->ksr ]; + SLOT->eg_sel_rs = eg_rate_select[SLOT_rs + SLOT->ksr ]; + + SLOT_dp = 16 + (13<<2); + SLOT->eg_sh_dp = eg_rate_shift [SLOT_dp + SLOT->ksr ]; + SLOT->eg_sel_dp = eg_rate_select[SLOT_dp + SLOT->ksr ]; +} + +/* set multi,am,vib,EG-TYP,KSR,mul */ +INLINE void set_mul(int slot,int v) +{ + YM2413_OPLL_CH *CH = &ym2413.P_CH[slot/2]; + YM2413_OPLL_SLOT *SLOT = &CH->SLOT[slot&1]; + + SLOT->mul = mul_tab[v&0x0f]; + SLOT->KSR = (v&0x10) ? 0 : 2; + SLOT->eg_type = (v&0x20); + SLOT->vib = (v&0x40); + SLOT->AMmask = (v&0x80) ? ~0 : 0; + CALC_FCSLOT(CH,SLOT); +} + +/* set ksl, tl */ +INLINE void set_ksl_tl(int chan,int v) +{ + YM2413_OPLL_CH *CH = &ym2413.P_CH[chan]; + /* modulator */ + YM2413_OPLL_SLOT *SLOT = &CH->SLOT[SLOT1]; + + int ksl = v>>6; /* 0 / 1.5 / 3.0 / 6.0 dB/OCT */ + + SLOT->ksl = ksl ? 3-ksl : 31; + SLOT->TL = (v&0x3f)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */ + SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl); +} + +/* set ksl , waveforms, feedback */ +INLINE void set_ksl_wave_fb(int chan,int v) +{ + YM2413_OPLL_CH *CH = &ym2413.P_CH[chan]; + /* modulator */ + YM2413_OPLL_SLOT *SLOT = &CH->SLOT[SLOT1]; + SLOT->wavetable = ((v&0x08)>>3)*SIN_LEN; + SLOT->fb_shift = (v&7) ? (v&7) + 8 : 0; + + /*carrier*/ + SLOT = &CH->SLOT[SLOT2]; + SLOT->wavetable = ((v&0x10)>>4)*SIN_LEN; + v >>= 6; /* 0 / 1.5 / 3.0 / 6.0 dB/OCT */ + SLOT->ksl = v ? 3-v : 31; + SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl); +} + +/* set attack rate & decay rate */ +INLINE void set_ar_dr(int slot,int v) +{ + YM2413_OPLL_CH *CH = &ym2413.P_CH[slot/2]; + YM2413_OPLL_SLOT *SLOT = &CH->SLOT[slot&1]; + + SLOT->ar = (v>>4) ? 16 + ((v>>4) <<2) : 0; + + if ((SLOT->ar + SLOT->ksr) < 16+62) + { + SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ]; + SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ]; + } + else + { + SLOT->eg_sh_ar = 0; + SLOT->eg_sel_ar = 13*RATE_STEPS; + } + + SLOT->dr = (v&0x0f)? 16 + ((v&0x0f)<<2) : 0; + SLOT->eg_sh_dr = eg_rate_shift [SLOT->dr + SLOT->ksr ]; + SLOT->eg_sel_dr = eg_rate_select[SLOT->dr + SLOT->ksr ]; +} + +/* set sustain level & release rate */ +INLINE void set_sl_rr(int slot,int v) +{ + YM2413_OPLL_CH *CH = &ym2413.P_CH[slot/2]; + YM2413_OPLL_SLOT *SLOT = &CH->SLOT[slot&1]; + + SLOT->sl = sl_tab[ v>>4 ]; + + SLOT->rr = (v&0x0f)? 16 + ((v&0x0f)<<2) : 0; + SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr ]; + SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr ]; +} + +static void load_instrument(UINT32 chan, UINT32 slot, UINT8* inst ) +{ + set_mul(slot, inst[0]); + set_mul(slot+1, inst[1]); + set_ksl_tl(chan, inst[2]); + set_ksl_wave_fb(chan, inst[3]); + set_ar_dr(slot, inst[4]); + set_ar_dr(slot+1, inst[5]); + set_sl_rr(slot, inst[6]); + set_sl_rr(slot+1, inst[7]); +} + +static void update_instrument_zero(UINT8 r) +{ + UINT8* inst = &ym2413.inst_tab[0][0]; /* point to user instrument */ + UINT32 chan; + + UINT32 chan_max = 9; + if (ym2413.rhythm & 0x20) + chan_max=6; + + switch(r&7) + { + case 0: + for (chan=0; chanSLOT[SLOT1]; /* modulator envelope is HH */ + SLOT->TL = ((ym2413.instvol_r[7]>>4)<<2)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */ + SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl); + + /* Load instrument settings for channel nine. (Tom-tom and top cymbal) */ + load_instrument(8, 16, &ym2413.inst_tab[18][0]); + + CH = &ym2413.P_CH[8]; + SLOT = &CH->SLOT[SLOT1]; /* modulator envelope is TOM */ + SLOT->TL = ((ym2413.instvol_r[8]>>4)<<2)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */ + SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl); + } + + /* BD key on/off */ + if(v&0x10) + { + KEY_ON (&ym2413.P_CH[6].SLOT[SLOT1], 2); + KEY_ON (&ym2413.P_CH[6].SLOT[SLOT2], 2); + } + else + { + KEY_OFF(&ym2413.P_CH[6].SLOT[SLOT1],~2); + KEY_OFF(&ym2413.P_CH[6].SLOT[SLOT2],~2); + } + + /* HH key on/off */ + if(v&0x01) KEY_ON (&ym2413.P_CH[7].SLOT[SLOT1], 2); + else KEY_OFF(&ym2413.P_CH[7].SLOT[SLOT1],~2); + + /* SD key on/off */ + if(v&0x08) KEY_ON (&ym2413.P_CH[7].SLOT[SLOT2], 2); + else KEY_OFF(&ym2413.P_CH[7].SLOT[SLOT2],~2); + + /* TOM key on/off */ + if(v&0x04) KEY_ON (&ym2413.P_CH[8].SLOT[SLOT1], 2); + else KEY_OFF(&ym2413.P_CH[8].SLOT[SLOT1],~2); + + /* TOP-CY key on/off */ + if(v&0x02) KEY_ON (&ym2413.P_CH[8].SLOT[SLOT2], 2); + else KEY_OFF(&ym2413.P_CH[8].SLOT[SLOT2],~2); + } + else + { + /* rhythm ON to OFF */ + if (ym2413.rhythm&0x20) + { + /* Load instrument settings for channel seven(chan=6 since we're zero based).*/ + load_instrument(6, 12, &ym2413.inst_tab[ym2413.instvol_r[6]>>4][0]); + + /* Load instrument settings for channel eight.*/ + load_instrument(7, 14, &ym2413.inst_tab[ym2413.instvol_r[7]>>4][0]); + + /* Load instrument settings for channel nine.*/ + load_instrument(8, 16, &ym2413.inst_tab[ym2413.instvol_r[8]>>4][0]); + } + + /* BD key off */ + KEY_OFF(&ym2413.P_CH[6].SLOT[SLOT1],~2); + KEY_OFF(&ym2413.P_CH[6].SLOT[SLOT2],~2); + + /* HH key off */ + KEY_OFF(&ym2413.P_CH[7].SLOT[SLOT1],~2); + + /* SD key off */ + KEY_OFF(&ym2413.P_CH[7].SLOT[SLOT2],~2); + + /* TOM key off */ + KEY_OFF(&ym2413.P_CH[8].SLOT[SLOT1],~2); + + /* TOP-CY off */ + KEY_OFF(&ym2413.P_CH[8].SLOT[SLOT2],~2); + } + + ym2413.rhythm = v&0x3f; + break; + } + } + + break; + } + + case 0x10: + case 0x20: + { + int block_fnum; + + int chan = r&0x0f; + + if (chan >= 9) + chan -= 9; /* verified on real YM2413 */ + + CH = &ym2413.P_CH[chan]; + + if(r&0x10) + { + /* 10-18: FNUM 0-7 */ + block_fnum = (CH->block_fnum&0x0f00) | v; + } + else + { + /* 20-28: suson, keyon, block, FNUM 8 */ + block_fnum = ((v&0x0f)<<8) | (CH->block_fnum&0xff); + + if(v&0x10) + { + KEY_ON (&CH->SLOT[SLOT1], 1); + KEY_ON (&CH->SLOT[SLOT2], 1); + } + else + { + KEY_OFF(&CH->SLOT[SLOT1],~1); + KEY_OFF(&CH->SLOT[SLOT2],~1); + } + + CH->sus = v & 0x20; + } + + /* update */ + if(CH->block_fnum != block_fnum) + { + UINT8 block; + CH->block_fnum = block_fnum; + + /* BLK 2,1,0 bits -> bits 3,2,1 of kcode, FNUM MSB -> kcode LSB */ + CH->kcode = (block_fnum&0x0f00)>>8; + + CH->ksl_base = ksl_tab[block_fnum>>5]; + + block_fnum = block_fnum * 2; + block = (block_fnum&0x1c00) >> 10; + CH->fc = ym2413.fn_tab[block_fnum&0x03ff] >> (7-block); + + /* refresh Total Level in both SLOTs of this channel */ + CH->SLOT[SLOT1].TLL = CH->SLOT[SLOT1].TL + (CH->ksl_base>>CH->SLOT[SLOT1].ksl); + CH->SLOT[SLOT2].TLL = CH->SLOT[SLOT2].TL + (CH->ksl_base>>CH->SLOT[SLOT2].ksl); + + /* refresh frequency counter in both SLOTs of this channel */ + CALC_FCSLOT(CH,&CH->SLOT[SLOT1]); + CALC_FCSLOT(CH,&CH->SLOT[SLOT2]); + } + + break; + } + + case 0x30: /* inst 4 MSBs, VOL 4 LSBs */ + { + int chan = r&0x0f; + + if (chan >= 9) + chan -= 9; /* verified on real YM2413 */ + + CH = &ym2413.P_CH[chan]; + SLOT = &CH->SLOT[SLOT2]; /* carrier */ + SLOT->TL = ((v&0x0f)<<2)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */ + SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl); + + /*check wether we are in rhythm mode and handle instrument/volume register accordingly*/ + if ((chan>=6) && (ym2413.rhythm&0x20)) + { + /* we're in rhythm mode*/ + + if (chan>=7) /* only for channel 7 and 8 (channel 6 is handled in usual way)*/ + { + SLOT = &CH->SLOT[SLOT1]; /* modulator envelope is HH(chan=7) or TOM(chan=8) */ + SLOT->TL = ((v>>4)<<2)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */ + SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl); + } + } + else + { + if ((ym2413.instvol_r[chan]&0xf0) != (v&0xf0)) + { + ym2413.instvol_r[chan] = v; /* store for later use */ + load_instrument(chan, chan * 2, &ym2413.inst_tab[v>>4][0]); + } + } + + break; + } + + default: + break; + } +} + + +void YM2413Init(void) +{ + init_tables(); + + /* clear */ + memset(&ym2413,0,sizeof(YM2413)); + + /* init global tables */ + OPLL_initalize(); +} + +void YM2413ResetChip(void) +{ + int c,s; + int i; + + ym2413.eg_timer = 0; + ym2413.eg_cnt = 0; + + ym2413.noise_rng = 1; /* noise shift register */ + + + /* setup instruments table */ + for (i=0; i<19; i++) + { + for (c=0; c<8; c++) + { + ym2413.inst_tab[i][c] = table[i][c]; + } + } + + + /* reset with register write */ + OPLLWriteReg(0x0f,0); /*test reg*/ + for(i = 0x3f ; i >= 0x10 ; i-- ) OPLLWriteReg(i,0x00); + + /* reset operator parameters */ + for( c = 0 ; c < 9 ; c++ ) + { + YM2413_OPLL_CH *CH = &ym2413.P_CH[c]; + for(s = 0 ; s < 2 ; s++ ) + { + /* wave table */ + CH->SLOT[s].wavetable = 0; + CH->SLOT[s].state = EG_OFF; + CH->SLOT[s].volume = MAX_ATT_INDEX; + } + } +} + +/* YM2413 I/O interface */ + +void YM2413Write(unsigned int a, unsigned int v) +{ + if( !(a&2) ) + { + if( !(a&1) ) + { + /* address port */ + ym2413.address = v & 0xff; + } + else + { + /* data port */ + OPLLWriteReg(ym2413.address,v); + } + } + else + { + /* latched bit (Master System specific) */ + ym2413.status = v & 0x01; + } +} + +unsigned int YM2413Read(unsigned int a) +{ + /* D0=latched bit, D1-D2 need to be zero (Master System specific) */ + return 0xF8 | ym2413.status; +} + +void YM2413Update(int *buffer, int length) +{ + int i, out; + + for( i=0; i < length ; i++ ) + { + output[0] = 0; + output[1] = 0; + + advance_lfo(); + + /* FM part */ + chan_calc(&ym2413.P_CH[0]); + chan_calc(&ym2413.P_CH[1]); + chan_calc(&ym2413.P_CH[2]); + chan_calc(&ym2413.P_CH[3]); + chan_calc(&ym2413.P_CH[4]); + chan_calc(&ym2413.P_CH[5]); + + if(!(ym2413.rhythm&0x20)) + { + chan_calc(&ym2413.P_CH[6]); + chan_calc(&ym2413.P_CH[7]); + chan_calc(&ym2413.P_CH[8]); + } + else /* Rhythm part */ + { + rhythm_calc(&ym2413.P_CH[0], (ym2413.noise_rng>>0)&1 ); + } + + /* Melody (MO) & Rythm (RO) outputs mixing & amplification (latched bit controls FM output) */ + out = (output[0] + (output[1] * 2)) * 2 * ym2413.status; + + /* Store to stereo sound buffer */ + *buffer++ = out; + *buffer++ = out; + + advance(); + } +} + +unsigned char *YM2413GetContextPtr(void) +{ + return (unsigned char *)&ym2413; +} + +unsigned int YM2413GetContextSize(void) +{ + return sizeof(YM2413); +} diff --git a/genplus-gx/core/sound/ym2413.h b/genplus-gx/core/sound/ym2413.h new file mode 100644 index 0000000000..73c8c84b48 --- /dev/null +++ b/genplus-gx/core/sound/ym2413.h @@ -0,0 +1,23 @@ +/* +** +** File: ym2413.c - software implementation of YM2413 +** FM sound generator type OPLL +** +** Copyright (C) 2002 Jarek Burczynski +** +** Version 1.0 +** +*/ + +#ifndef _H_YM2413_ +#define _H_YM2413_ + +extern void YM2413Init(void); +extern void YM2413ResetChip(void); +extern void YM2413Update(int *buffer, int length); +extern void YM2413Write(unsigned int a, unsigned int v); +extern unsigned int YM2413Read(unsigned int a); +extern unsigned char *YM2413GetContextPtr(void); +extern unsigned int YM2413GetContextSize(void); + +#endif /*_H_YM2413_*/ diff --git a/genplus-gx/core/sound/ym2612.c b/genplus-gx/core/sound/ym2612.c new file mode 100644 index 0000000000..210f386f09 --- /dev/null +++ b/genplus-gx/core/sound/ym2612.c @@ -0,0 +1,2178 @@ +/* +** +** software implementation of Yamaha FM sound generator (YM2612/YM3438) +** +** Original code (MAME fm.c) +** +** Copyright (C) 2001, 2002, 2003 Jarek Burczynski (bujar at mame dot net) +** Copyright (C) 1998 Tatsuyuki Satoh , MultiArcadeMachineEmulator development +** +** Version 1.4 (final beta) +** +** Additional code & fixes by Eke-Eke for Genesis Plus GX +** +** Huge thanks to Nemesis, most of those fixes came from his tests on Sega Genesis hardware +** More informations at http://gendev.spritesmind.net/forum/viewtopic.php?t=386 +** +** TODO: +** - better documentation +** - BUSY flag emulation +*/ + +/* +** CHANGELOG: +** +** 01-09-2012 Eke-Eke (Genesis Plus GX): +** - removed input clock / output samplerate frequency ratio, chip now always run at (original) internal sample frequency +** - removed now uneeded extra bits of precision +** +** 2006~2012 Eke-Eke (Genesis Plus GX): +** - removed unused multichip support +** - added YM2612 Context external access functions +** - fixed LFO implementation: +** .added support for CH3 special mode: fixes various sound effects (birds in Warlock, bug sound in Aladdin...) +** .inverted LFO AM waveform: fixes Spider-Man & Venom : Separation Anxiety (intro), California Games (surfing event) +** .improved LFO timing accuracy: now updated AFTER sample output, like EG/PG updates, and without any precision loss anymore. +** - improved internal timers emulation +** - adjusted lowest EG rates increment values +** - fixed Attack Rate not being updated in some specific cases (Batman & Robin intro) +** - fixed EG behavior when Attack Rate is maximal +** - fixed EG behavior when SL=0 (Mega Turrican tracks 03,09...) or/and Key ON occurs at minimal attenuation +** - implemented EG output immediate changes on register writes +** - fixed YM2612 initial values (after the reset): fixes missing intro in B.O.B +** - implemented Detune overflow (Ariel, Comix Zone, Shaq Fu, Spiderman & many other games using GEMS sound engine) +** - implemented accurate CSM mode emulation +** - implemented accurate SSG-EG emulation (Asterix, Beavis&Butthead, Bubba'n Stix & many other games) +** - implemented accurate address/data ports behavior +** - added preliminar support for DAC precision +** +** 03-08-2003 Jarek Burczynski: +** - fixed YM2608 initial values (after the reset) +** - fixed flag and irqmask handling (YM2608) +** - fixed BUFRDY flag handling (YM2608) +** +** 14-06-2003 Jarek Burczynski: +** - implemented all of the YM2608 status register flags +** - implemented support for external memory read/write via YM2608 +** - implemented support for deltat memory limit register in YM2608 emulation +** +** 22-05-2003 Jarek Burczynski: +** - fixed LFO PM calculations (copy&paste bugfix) +** +** 08-05-2003 Jarek Burczynski: +** - fixed SSG support +** +** 22-04-2003 Jarek Burczynski: +** - implemented 100% correct LFO generator (verified on real YM2610 and YM2608) +** +** 15-04-2003 Jarek Burczynski: +** - added support for YM2608's register 0x110 - status mask +** +** 01-12-2002 Jarek Burczynski: +** - fixed register addressing in YM2608, YM2610, YM2610B chips. (verified on real YM2608) +** The addressing patch used for early Neo-Geo games can be removed now. +** +** 26-11-2002 Jarek Burczynski, Nicola Salmoria: +** - recreated YM2608 ADPCM ROM using data from real YM2608's output which leads to: +** - added emulation of YM2608 drums. +** - output of YM2608 is two times lower now - same as YM2610 (verified on real YM2608) +** +** 16-08-2002 Jarek Burczynski: +** - binary exact Envelope Generator (verified on real YM2203); +** identical to YM2151 +** - corrected 'off by one' error in feedback calculations (when feedback is off) +** - corrected connection (algorithm) calculation (verified on real YM2203 and YM2610) +** +** 18-12-2001 Jarek Burczynski: +** - added SSG-EG support (verified on real YM2203) +** +** 12-08-2001 Jarek Burczynski: +** - corrected sin_tab and tl_tab data (verified on real chip) +** - corrected feedback calculations (verified on real chip) +** - corrected phase generator calculations (verified on real chip) +** - corrected envelope generator calculations (verified on real chip) +** - corrected FM volume level (YM2610 and YM2610B). +** - changed YMxxxUpdateOne() functions (YM2203, YM2608, YM2610, YM2610B, YM2612) : +** this was needed to calculate YM2610 FM channels output correctly. +** (Each FM channel is calculated as in other chips, but the output of the channel +** gets shifted right by one *before* sending to accumulator. That was impossible to do +** with previous implementation). +** +** 23-07-2001 Jarek Burczynski, Nicola Salmoria: +** - corrected YM2610 ADPCM type A algorithm and tables (verified on real chip) +** +** 11-06-2001 Jarek Burczynski: +** - corrected end of sample bug in ADPCMA_calc_cha(). +** Real YM2610 checks for equality between current and end addresses (only 20 LSB bits). +** +** 08-12-98 hiro-shi: +** rename ADPCMA -> ADPCMB, ADPCMB -> ADPCMA +** move ROM limit check.(CALC_CH? -> 2610Write1/2) +** test program (ADPCMB_TEST) +** move ADPCM A/B end check. +** ADPCMB repeat flag(no check) +** change ADPCM volume rate (8->16) (32->48). +** +** 09-12-98 hiro-shi: +** change ADPCM volume. (8->16, 48->64) +** replace ym2610 ch0/3 (YM-2610B) +** change ADPCM_SHIFT (10->8) missing bank change 0x4000-0xffff. +** add ADPCM_SHIFT_MASK +** change ADPCMA_DECODE_MIN/MAX. +*/ + +/************************************************************************/ +/* comment of hiro-shi(Hiromitsu Shioya) */ +/* YM2610(B) = OPN-B */ +/* YM2610 : PSG:3ch FM:4ch ADPCM(18.5KHz):6ch DeltaT ADPCM:1ch */ +/* YM2610B : PSG:3ch FM:6ch ADPCM(18.5KHz):6ch DeltaT ADPCM:1ch */ +/************************************************************************/ + +#include "shared.h" + +/* envelope generator */ +#define ENV_BITS 10 +#define ENV_LEN (1<>3) + +/* sin waveform table in 'decibel' scale */ +static unsigned int sin_tab[SIN_LEN]; + +/* sustain level table (3dB per step) */ +/* bit0, bit1, bit2, bit3, bit4, bit5, bit6 */ +/* 1, 2, 4, 8, 16, 32, 64 (value)*/ +/* 0.75, 1.5, 3, 6, 12, 24, 48 (dB)*/ + +/* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/ +/* attenuation value (10 bits) = (SL << 2) << 3 */ +#define SC(db) (UINT32) ( db * (4.0/ENV_STEP) ) +static const UINT32 sl_table[16]={ + SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7), + SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31) +}; +#undef SC + + +#define RATE_STEPS (8) +static const UINT8 eg_inc[19*RATE_STEPS]={ + +/*cycle:0 1 2 3 4 5 6 7*/ + +/* 0 */ 0,1, 0,1, 0,1, 0,1, /* rates 00..11 0 (increment by 0 or 1) */ +/* 1 */ 0,1, 0,1, 1,1, 0,1, /* rates 00..11 1 */ +/* 2 */ 0,1, 1,1, 0,1, 1,1, /* rates 00..11 2 */ +/* 3 */ 0,1, 1,1, 1,1, 1,1, /* rates 00..11 3 */ + +/* 4 */ 1,1, 1,1, 1,1, 1,1, /* rate 12 0 (increment by 1) */ +/* 5 */ 1,1, 1,2, 1,1, 1,2, /* rate 12 1 */ +/* 6 */ 1,2, 1,2, 1,2, 1,2, /* rate 12 2 */ +/* 7 */ 1,2, 2,2, 1,2, 2,2, /* rate 12 3 */ + +/* 8 */ 2,2, 2,2, 2,2, 2,2, /* rate 13 0 (increment by 2) */ +/* 9 */ 2,2, 2,4, 2,2, 2,4, /* rate 13 1 */ +/*10 */ 2,4, 2,4, 2,4, 2,4, /* rate 13 2 */ +/*11 */ 2,4, 4,4, 2,4, 4,4, /* rate 13 3 */ + +/*12 */ 4,4, 4,4, 4,4, 4,4, /* rate 14 0 (increment by 4) */ +/*13 */ 4,4, 4,8, 4,4, 4,8, /* rate 14 1 */ +/*14 */ 4,8, 4,8, 4,8, 4,8, /* rate 14 2 */ +/*15 */ 4,8, 8,8, 4,8, 8,8, /* rate 14 3 */ + +/*16 */ 8,8, 8,8, 8,8, 8,8, /* rates 15 0, 15 1, 15 2, 15 3 (increment by 8) */ +/*17 */ 16,16,16,16,16,16,16,16, /* rates 15 2, 15 3 for attack */ +/*18 */ 0,0, 0,0, 0,0, 0,0, /* infinity rates for attack and decay(s) */ +}; + + +#define O(a) (a*RATE_STEPS) + +/*note that there is no O(17) in this table - it's directly in the code */ +static const UINT8 eg_rate_select[32+64+32]={ /* Envelope Generator rates (32 + 64 rates + 32 RKS) */ +/* 32 infinite time rates (same as Rate 0) */ +O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18), +O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18), +O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18), +O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18), + +/* rates 00-11 */ +/* +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), +*/ +O(18),O(18),O( 0),O( 0), +O( 0),O( 0),O( 2),O( 2), /* Nemesis's tests */ + +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), +O( 0),O( 1),O( 2),O( 3), + +/* rate 12 */ +O( 4),O( 5),O( 6),O( 7), + +/* rate 13 */ +O( 8),O( 9),O(10),O(11), + +/* rate 14 */ +O(12),O(13),O(14),O(15), + +/* rate 15 */ +O(16),O(16),O(16),O(16), + +/* 32 dummy rates (same as 15 3) */ +O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16), +O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16), +O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16), +O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16) + +}; +#undef O + +/*rate 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15*/ +/*shift 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0, 0, 0 */ +/*mask 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0, 0, 0 */ + +#define O(a) (a*1) +static const UINT8 eg_rate_shift[32+64+32]={ /* Envelope Generator counter shifts (32 + 64 rates + 32 RKS) */ +/* 32 infinite time rates */ +/* O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0), +O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0), +O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0), +O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0), */ + +/* fixed (should be the same as rate 0, even if it makes no difference since increment value is 0 for these rates) */ +O(11),O(11),O(11),O(11),O(11),O(11),O(11),O(11), +O(11),O(11),O(11),O(11),O(11),O(11),O(11),O(11), +O(11),O(11),O(11),O(11),O(11),O(11),O(11),O(11), +O(11),O(11),O(11),O(11),O(11),O(11),O(11),O(11), + +/* rates 00-11 */ +O(11),O(11),O(11),O(11), +O(10),O(10),O(10),O(10), +O( 9),O( 9),O( 9),O( 9), +O( 8),O( 8),O( 8),O( 8), +O( 7),O( 7),O( 7),O( 7), +O( 6),O( 6),O( 6),O( 6), +O( 5),O( 5),O( 5),O( 5), +O( 4),O( 4),O( 4),O( 4), +O( 3),O( 3),O( 3),O( 3), +O( 2),O( 2),O( 2),O( 2), +O( 1),O( 1),O( 1),O( 1), +O( 0),O( 0),O( 0),O( 0), + +/* rate 12 */ +O( 0),O( 0),O( 0),O( 0), + +/* rate 13 */ +O( 0),O( 0),O( 0),O( 0), + +/* rate 14 */ +O( 0),O( 0),O( 0),O( 0), + +/* rate 15 */ +O( 0),O( 0),O( 0),O( 0), + +/* 32 dummy rates (same as 15 3) */ +O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0), +O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0), +O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0), +O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0) + +}; +#undef O + +static const UINT8 dt_tab[4 * 32]={ +/* this is YM2151 and YM2612 phase increment data (in 10.10 fixed point format)*/ +/* FD=0 */ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, +/* FD=1 */ + 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, + 2, 3, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 8, 8, 8, 8, +/* FD=2 */ + 1, 1, 1, 1, 2, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, + 5, 6, 6, 7, 8, 8, 9,10,11,12,13,14,16,16,16,16, +/* FD=3 */ + 2, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, + 8 , 8, 9,10,11,12,13,14,16,17,19,20,22,22,22,22 +}; + + +/* OPN key frequency number -> key code follow table */ +/* fnum higher 4bit -> keycode lower 2bit */ +static const UINT8 opn_fktable[16] = {0,0,0,0,0,0,0,1,2,3,3,3,3,3,3,3}; + + +/* 8 LFO speed parameters */ +/* each value represents number of samples that one LFO level will last for */ +static const UINT32 lfo_samples_per_step[8] = {108, 77, 71, 67, 62, 44, 8, 5}; + + +/*There are 4 different LFO AM depths available, they are: + 0 dB, 1.4 dB, 5.9 dB, 11.8 dB + Here is how it is generated (in EG steps): + + 11.8 dB = 0, 2, 4, 6, 8, 10,12,14,16...126,126,124,122,120,118,....4,2,0 + 5.9 dB = 0, 1, 2, 3, 4, 5, 6, 7, 8....63, 63, 62, 61, 60, 59,.....2,1,0 + 1.4 dB = 0, 0, 0, 0, 1, 1, 1, 1, 2,...15, 15, 15, 15, 14, 14,.....0,0,0 + + (1.4 dB is loosing precision as you can see) + + It's implemented as generator from 0..126 with step 2 then a shift + right N times, where N is: + 8 for 0 dB + 3 for 1.4 dB + 1 for 5.9 dB + 0 for 11.8 dB +*/ +static const UINT8 lfo_ams_depth_shift[4] = {8, 3, 1, 0}; + + + +/*There are 8 different LFO PM depths available, they are: + 0, 3.4, 6.7, 10, 14, 20, 40, 80 (cents) + + Modulation level at each depth depends on F-NUMBER bits: 4,5,6,7,8,9,10 + (bits 8,9,10 = FNUM MSB from OCT/FNUM register) + + Here we store only first quarter (positive one) of full waveform. + Full table (lfo_pm_table) containing all 128 waveforms is build + at run (init) time. + + One value in table below represents 4 (four) basic LFO steps + (1 PM step = 4 AM steps). + + For example: + at LFO SPEED=0 (which is 108 samples per basic LFO step) + one value from "lfo_pm_output" table lasts for 432 consecutive + samples (4*108=432) and one full LFO waveform cycle lasts for 13824 + samples (32*432=13824; 32 because we store only a quarter of whole + waveform in the table below) +*/ +static const UINT8 lfo_pm_output[7*8][8]={ +/* 7 bits meaningful (of F-NUMBER), 8 LFO output levels per one depth (out of 32), 8 LFO depths */ +/* FNUM BIT 4: 000 0001xxxx */ +/* DEPTH 0 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 1 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 2 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 3 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 4 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 5 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 6 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 7 */ {0, 0, 0, 0, 1, 1, 1, 1}, + +/* FNUM BIT 5: 000 0010xxxx */ +/* DEPTH 0 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 1 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 2 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 3 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 4 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 5 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 6 */ {0, 0, 0, 0, 1, 1, 1, 1}, +/* DEPTH 7 */ {0, 0, 1, 1, 2, 2, 2, 3}, + +/* FNUM BIT 6: 000 0100xxxx */ +/* DEPTH 0 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 1 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 2 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 3 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 4 */ {0, 0, 0, 0, 0, 0, 0, 1}, +/* DEPTH 5 */ {0, 0, 0, 0, 1, 1, 1, 1}, +/* DEPTH 6 */ {0, 0, 1, 1, 2, 2, 2, 3}, +/* DEPTH 7 */ {0, 0, 2, 3, 4, 4, 5, 6}, + +/* FNUM BIT 7: 000 1000xxxx */ +/* DEPTH 0 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 1 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 2 */ {0, 0, 0, 0, 0, 0, 1, 1}, +/* DEPTH 3 */ {0, 0, 0, 0, 1, 1, 1, 1}, +/* DEPTH 4 */ {0, 0, 0, 1, 1, 1, 1, 2}, +/* DEPTH 5 */ {0, 0, 1, 1, 2, 2, 2, 3}, +/* DEPTH 6 */ {0, 0, 2, 3, 4, 4, 5, 6}, +/* DEPTH 7 */ {0, 0, 4, 6, 8, 8, 0xa, 0xc}, + +/* FNUM BIT 8: 001 0000xxxx */ +/* DEPTH 0 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 1 */ {0, 0, 0, 0, 1, 1, 1, 1}, +/* DEPTH 2 */ {0, 0, 0, 1, 1, 1, 2, 2}, +/* DEPTH 3 */ {0, 0, 1, 1, 2, 2, 3, 3}, +/* DEPTH 4 */ {0, 0, 1, 2, 2, 2, 3, 4}, +/* DEPTH 5 */ {0, 0, 2, 3, 4, 4, 5, 6}, +/* DEPTH 6 */ {0, 0, 4, 6, 8, 8, 0xa, 0xc}, +/* DEPTH 7 */ {0, 0, 8, 0xc,0x10,0x10,0x14,0x18}, + +/* FNUM BIT 9: 010 0000xxxx */ +/* DEPTH 0 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 1 */ {0, 0, 0, 0, 2, 2, 2, 2}, +/* DEPTH 2 */ {0, 0, 0, 2, 2, 2, 4, 4}, +/* DEPTH 3 */ {0, 0, 2, 2, 4, 4, 6, 6}, +/* DEPTH 4 */ {0, 0, 2, 4, 4, 4, 6, 8}, +/* DEPTH 5 */ {0, 0, 4, 6, 8, 8, 0xa, 0xc}, +/* DEPTH 6 */ {0, 0, 8, 0xc,0x10,0x10,0x14,0x18}, +/* DEPTH 7 */ {0, 0,0x10,0x18,0x20,0x20,0x28,0x30}, + +/* FNUM BIT10: 100 0000xxxx */ +/* DEPTH 0 */ {0, 0, 0, 0, 0, 0, 0, 0}, +/* DEPTH 1 */ {0, 0, 0, 0, 4, 4, 4, 4}, +/* DEPTH 2 */ {0, 0, 0, 4, 4, 4, 8, 8}, +/* DEPTH 3 */ {0, 0, 4, 4, 8, 8, 0xc, 0xc}, +/* DEPTH 4 */ {0, 0, 4, 8, 8, 8, 0xc,0x10}, +/* DEPTH 5 */ {0, 0, 8, 0xc,0x10,0x10,0x14,0x18}, +/* DEPTH 6 */ {0, 0,0x10,0x18,0x20,0x20,0x28,0x30}, +/* DEPTH 7 */ {0, 0,0x20,0x30,0x40,0x40,0x50,0x60}, + +}; + +/* all 128 LFO PM waveforms */ +static INT32 lfo_pm_table[128*8*32]; /* 128 combinations of 7 bits meaningful (of F-NUMBER), 8 LFO depths, 32 LFO output levels per one depth */ + +/* register number to channel number , slot offset */ +#define OPN_CHAN(N) (N&3) +#define OPN_SLOT(N) ((N>>2)&3) + +/* slot number */ +#define SLOT1 0 +#define SLOT2 2 +#define SLOT3 1 +#define SLOT4 3 + +/* struct describing a single operator (SLOT) */ +typedef struct +{ + INT32 *DT; /* detune :dt_tab[DT] */ + UINT8 KSR; /* key scale rate :3-KSR */ + UINT32 ar; /* attack rate */ + UINT32 d1r; /* decay rate */ + UINT32 d2r; /* sustain rate */ + UINT32 rr; /* release rate */ + UINT8 ksr; /* key scale rate :kcode>>(3-KSR) */ + UINT32 mul; /* multiple :ML_TABLE[ML] */ + + /* Phase Generator */ + UINT32 phase; /* phase counter */ + INT32 Incr; /* phase step */ + + /* Envelope Generator */ + UINT8 state; /* phase type */ + UINT32 tl; /* total level: TL << 3 */ + INT32 volume; /* envelope counter */ + UINT32 sl; /* sustain level:sl_table[SL] */ + UINT32 vol_out; /* current output from EG circuit (without AM from LFO) */ + + UINT8 eg_sh_ar; /* (attack state) */ + UINT8 eg_sel_ar; /* (attack state) */ + UINT8 eg_sh_d1r; /* (decay state) */ + UINT8 eg_sel_d1r; /* (decay state) */ + UINT8 eg_sh_d2r; /* (sustain state) */ + UINT8 eg_sel_d2r; /* (sustain state) */ + UINT8 eg_sh_rr; /* (release state) */ + UINT8 eg_sel_rr; /* (release state) */ + + UINT8 ssg; /* SSG-EG waveform */ + UINT8 ssgn; /* SSG-EG negated output */ + + UINT8 key; /* 0=last key was KEY OFF, 1=KEY ON */ + + /* LFO */ + UINT32 AMmask; /* AM enable flag */ + +} FM_SLOT; + +typedef struct +{ + FM_SLOT SLOT[4]; /* four SLOTs (operators) */ + + UINT8 ALGO; /* algorithm */ + UINT8 FB; /* feedback shift */ + INT32 op1_out[2]; /* op1 output for feedback */ + + INT32 *connect1; /* SLOT1 output pointer */ + INT32 *connect3; /* SLOT3 output pointer */ + INT32 *connect2; /* SLOT2 output pointer */ + INT32 *connect4; /* SLOT4 output pointer */ + + INT32 *mem_connect; /* where to put the delayed sample (MEM) */ + INT32 mem_value; /* delayed sample (MEM) value */ + + INT32 pms; /* channel PMS */ + UINT8 ams; /* channel AMS */ + + UINT32 fc; /* fnum,blk */ + UINT8 kcode; /* key code */ + UINT32 block_fnum; /* blk/fnum value (for LFO PM calculations) */ +} FM_CH; + + +typedef struct +{ + UINT16 address; /* address register */ + UINT8 status; /* status flag */ + UINT32 mode; /* mode CSM / 3SLOT */ + UINT8 fn_h; /* freq latch */ + INT32 TA; /* timer a value */ + INT32 TAL; /* timer a base */ + INT32 TAC; /* timer a counter */ + INT32 TB; /* timer b value */ + INT32 TBL; /* timer b base */ + INT32 TBC; /* timer b counter */ + INT32 dt_tab[8][32]; /* DeTune table */ + +} FM_ST; + + +/***********************************************************/ +/* OPN unit */ +/***********************************************************/ + +/* OPN 3slot struct */ +typedef struct +{ + UINT32 fc[3]; /* fnum3,blk3: calculated */ + UINT8 fn_h; /* freq3 latch */ + UINT8 kcode[3]; /* key code */ + UINT32 block_fnum[3]; /* current fnum value for this slot (can be different betweeen slots of one channel in 3slot mode) */ + UINT8 key_csm; /* CSM mode Key-ON flag */ + +} FM_3SLOT; + +/* OPN/A/B common state */ +typedef struct +{ + FM_ST ST; /* general state */ + FM_3SLOT SL3; /* 3 slot mode state */ + unsigned int pan[6*2]; /* fm channels output masks (0xffffffff = enable) */ + + /* EG */ + UINT32 eg_cnt; /* global envelope generator counter */ + UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/144/3 */ + + /* LFO */ + UINT8 lfo_cnt; /* current LFO phase (out of 128) */ + UINT32 lfo_timer; /* current LFO phase runs at LFO frequency */ + UINT32 lfo_timer_overflow; /* LFO timer overflows every N samples (depends on LFO frequency) */ + UINT32 LFO_AM; /* current LFO AM step */ + UINT32 LFO_PM; /* current LFO PM step */ + +} FM_OPN; + +/***********************************************************/ +/* YM2612 chip */ +/***********************************************************/ +typedef struct +{ + FM_CH CH[6]; /* channel state */ + UINT8 dacen; /* DAC mode */ + INT32 dacout; /* DAC output */ + FM_OPN OPN; /* OPN state */ + +} YM2612; + +/* emulated chip */ +static YM2612 ym2612; + +/* current chip state */ +static INT32 m2,c1,c2; /* Phase Modulation input for operators 2,3,4 */ +static INT32 mem; /* one sample delay memory */ +static INT32 out_fm[8]; /* outputs of working channels */ +static UINT32 bitmask; /* working channels output bitmasking (DAC quantization) */ + + +INLINE void FM_KEYON(FM_CH *CH , int s ) +{ + FM_SLOT *SLOT = &CH->SLOT[s]; + + if (!SLOT->key && !ym2612.OPN.SL3.key_csm) + { + /* restart Phase Generator */ + SLOT->phase = 0; + + /* reset SSG-EG inversion flag */ + SLOT->ssgn = 0; + + if ((SLOT->ar + SLOT->ksr) < 94 /*32+62*/) + { + SLOT->state = (SLOT->volume <= MIN_ATT_INDEX) ? ((SLOT->sl == MIN_ATT_INDEX) ? EG_SUS : EG_DEC) : EG_ATT; + } + else + { + /* force attenuation level to 0 */ + SLOT->volume = MIN_ATT_INDEX; + + /* directly switch to Decay (or Sustain) */ + SLOT->state = (SLOT->sl == MIN_ATT_INDEX) ? EG_SUS : EG_DEC; + } + + /* recalculate EG output */ + if ((SLOT->ssg&0x08) && (SLOT->ssgn ^ (SLOT->ssg&0x04))) + SLOT->vol_out = ((UINT32)(0x200 - SLOT->volume) & MAX_ATT_INDEX) + SLOT->tl; + else + SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl; + } + + SLOT->key = 1; +} + +INLINE void FM_KEYOFF(FM_CH *CH , int s ) +{ + FM_SLOT *SLOT = &CH->SLOT[s]; + + if (SLOT->key && !ym2612.OPN.SL3.key_csm) + { + if (SLOT->state>EG_REL) + { + SLOT->state = EG_REL; /* phase -> Release */ + + /* SSG-EG specific update */ + if (SLOT->ssg&0x08) + { + /* convert EG attenuation level */ + if (SLOT->ssgn ^ (SLOT->ssg&0x04)) + SLOT->volume = (0x200 - SLOT->volume); + + /* force EG attenuation level */ + if (SLOT->volume >= 0x200) + { + SLOT->volume = MAX_ATT_INDEX; + SLOT->state = EG_OFF; + } + + /* recalculate EG output */ + SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl; + } + } + } + + SLOT->key = 0; +} + +INLINE void FM_KEYON_CSM(FM_CH *CH , int s ) +{ + FM_SLOT *SLOT = &CH->SLOT[s]; + + if (!SLOT->key && !ym2612.OPN.SL3.key_csm) + { + /* restart Phase Generator */ + SLOT->phase = 0; + + /* reset SSG-EG inversion flag */ + SLOT->ssgn = 0; + + if ((SLOT->ar + SLOT->ksr) < 94 /*32+62*/) + { + SLOT->state = (SLOT->volume <= MIN_ATT_INDEX) ? ((SLOT->sl == MIN_ATT_INDEX) ? EG_SUS : EG_DEC) : EG_ATT; + } + else + { + /* force attenuation level to 0 */ + SLOT->volume = MIN_ATT_INDEX; + + /* directly switch to Decay (or Sustain) */ + SLOT->state = (SLOT->sl == MIN_ATT_INDEX) ? EG_SUS : EG_DEC; + } + + /* recalculate EG output */ + if ((SLOT->ssg&0x08) && (SLOT->ssgn ^ (SLOT->ssg&0x04))) + SLOT->vol_out = ((UINT32)(0x200 - SLOT->volume) & MAX_ATT_INDEX) + SLOT->tl; + else + SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl; + } +} + +INLINE void FM_KEYOFF_CSM(FM_CH *CH , int s ) +{ + FM_SLOT *SLOT = &CH->SLOT[s]; + if (!SLOT->key) + { + if (SLOT->state>EG_REL) + { + SLOT->state = EG_REL; /* phase -> Release */ + + /* SSG-EG specific update */ + if (SLOT->ssg&0x08) + { + /* convert EG attenuation level */ + if (SLOT->ssgn ^ (SLOT->ssg&0x04)) + SLOT->volume = (0x200 - SLOT->volume); + + /* force EG attenuation level */ + if (SLOT->volume >= 0x200) + { + SLOT->volume = MAX_ATT_INDEX; + SLOT->state = EG_OFF; + } + + /* recalculate EG output */ + SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl; + } + } + } +} + +/* CSM Key Controll */ +INLINE void CSMKeyControll(FM_CH *CH) +{ + /* all key ON (verified by Nemesis on real hardware) */ + FM_KEYON_CSM(CH,SLOT1); + FM_KEYON_CSM(CH,SLOT2); + FM_KEYON_CSM(CH,SLOT3); + FM_KEYON_CSM(CH,SLOT4); + ym2612.OPN.SL3.key_csm = 1; +} + +INLINE void INTERNAL_TIMER_A() +{ + if (ym2612.OPN.ST.mode & 0x01) + { + ym2612.OPN.ST.TAC--; + if (ym2612.OPN.ST.TAC <= 0) + { + /* set status (if enabled) */ + if (ym2612.OPN.ST.mode & 0x04) + ym2612.OPN.ST.status |= 0x01; + + /* reload the counter */ + ym2612.OPN.ST.TAC = ym2612.OPN.ST.TAL; + + /* CSM mode auto key on */ + if ((ym2612.OPN.ST.mode & 0xC0) == 0x80) + CSMKeyControll(&ym2612.CH[2]); + } + } +} + +INLINE void INTERNAL_TIMER_B(int step) +{ + if (ym2612.OPN.ST.mode & 0x02) + { + ym2612.OPN.ST.TBC-=step; + if (ym2612.OPN.ST.TBC <= 0) + { + /* set status (if enabled) */ + if (ym2612.OPN.ST.mode & 0x08) + ym2612.OPN.ST.status |= 0x02; + + /* reload the counter */ + if (ym2612.OPN.ST.TBL) + ym2612.OPN.ST.TBC += ym2612.OPN.ST.TBL; + else + ym2612.OPN.ST.TBC = ym2612.OPN.ST.TBL; + } + } +} + +/* OPN Mode Register Write */ +INLINE void set_timers(int v ) +{ + /* b7 = CSM MODE */ + /* b6 = 3 slot mode */ + /* b5 = reset b */ + /* b4 = reset a */ + /* b3 = timer enable b */ + /* b2 = timer enable a */ + /* b1 = load b */ + /* b0 = load a */ + + if ((ym2612.OPN.ST.mode ^ v) & 0xC0) + { + /* phase increment need to be recalculated */ + ym2612.CH[2].SLOT[SLOT1].Incr=-1; + + /* CSM mode disabled and CSM key ON active*/ + if (((v & 0xC0) != 0x80) && ym2612.OPN.SL3.key_csm) + { + /* CSM Mode Key OFF (verified by Nemesis on real hardware) */ + FM_KEYOFF_CSM(&ym2612.CH[2],SLOT1); + FM_KEYOFF_CSM(&ym2612.CH[2],SLOT2); + FM_KEYOFF_CSM(&ym2612.CH[2],SLOT3); + FM_KEYOFF_CSM(&ym2612.CH[2],SLOT4); + ym2612.OPN.SL3.key_csm = 0; + } + } + + /* reload Timers */ + if ((v&1) && !(ym2612.OPN.ST.mode&1)) + ym2612.OPN.ST.TAC = ym2612.OPN.ST.TAL; + if ((v&2) && !(ym2612.OPN.ST.mode&2)) + ym2612.OPN.ST.TBC = ym2612.OPN.ST.TBL; + + /* reset Timers flags */ + ym2612.OPN.ST.status &= (~v >> 4); + + ym2612.OPN.ST.mode = v; +} + +/* set algorithm connection */ +INLINE void setup_connection( FM_CH *CH, int ch ) +{ + INT32 *carrier = &out_fm[ch]; + + INT32 **om1 = &CH->connect1; + INT32 **om2 = &CH->connect3; + INT32 **oc1 = &CH->connect2; + + INT32 **memc = &CH->mem_connect; + + switch( CH->ALGO ){ + case 0: + /* M1---C1---MEM---M2---C2---OUT */ + *om1 = &c1; + *oc1 = &mem; + *om2 = &c2; + *memc= &m2; + break; + case 1: + /* M1------+-MEM---M2---C2---OUT */ + /* C1-+ */ + *om1 = &mem; + *oc1 = &mem; + *om2 = &c2; + *memc= &m2; + break; + case 2: + /* M1-----------------+-C2---OUT */ + /* C1---MEM---M2-+ */ + *om1 = &c2; + *oc1 = &mem; + *om2 = &c2; + *memc= &m2; + break; + case 3: + /* M1---C1---MEM------+-C2---OUT */ + /* M2-+ */ + *om1 = &c1; + *oc1 = &mem; + *om2 = &c2; + *memc= &c2; + break; + case 4: + /* M1---C1-+-OUT */ + /* M2---C2-+ */ + /* MEM: not used */ + *om1 = &c1; + *oc1 = carrier; + *om2 = &c2; + *memc= &mem; /* store it anywhere where it will not be used */ + break; + case 5: + /* +----C1----+ */ + /* M1-+-MEM---M2-+-OUT */ + /* +----C2----+ */ + *om1 = 0; /* special mark */ + *oc1 = carrier; + *om2 = carrier; + *memc= &m2; + break; + case 6: + /* M1---C1-+ */ + /* M2-+-OUT */ + /* C2-+ */ + /* MEM: not used */ + *om1 = &c1; + *oc1 = carrier; + *om2 = carrier; + *memc= &mem; /* store it anywhere where it will not be used */ + break; + case 7: + /* M1-+ */ + /* C1-+-OUT */ + /* M2-+ */ + /* C2-+ */ + /* MEM: not used*/ + *om1 = carrier; + *oc1 = carrier; + *om2 = carrier; + *memc= &mem; /* store it anywhere where it will not be used */ + break; + } + + CH->connect4 = carrier; +} + +/* set detune & multiple */ +INLINE void set_det_mul(FM_CH *CH,FM_SLOT *SLOT,int v) +{ + SLOT->mul = (v&0x0f)? (v&0x0f)*2 : 1; + SLOT->DT = ym2612.OPN.ST.dt_tab[(v>>4)&7]; + CH->SLOT[SLOT1].Incr=-1; +} + +/* set total level */ +INLINE void set_tl(FM_SLOT *SLOT , int v) +{ + SLOT->tl = (v&0x7f)<<(ENV_BITS-7); /* 7bit TL */ + + /* recalculate EG output */ + if ((SLOT->ssg&0x08) && (SLOT->ssgn ^ (SLOT->ssg&0x04)) && (SLOT->state > EG_REL)) + SLOT->vol_out = ((UINT32)(0x200 - SLOT->volume) & MAX_ATT_INDEX) + SLOT->tl; + else + SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl; +} + +/* set attack rate & key scale */ +INLINE void set_ar_ksr(FM_CH *CH,FM_SLOT *SLOT,int v) +{ + UINT8 old_KSR = SLOT->KSR; + + SLOT->ar = (v&0x1f) ? 32 + ((v&0x1f)<<1) : 0; + + SLOT->KSR = 3-(v>>6); + if (SLOT->KSR != old_KSR) + { + CH->SLOT[SLOT1].Incr=-1; + } + + /* Even if it seems unnecessary to do it here, it could happen that KSR and KC */ + /* are modified but the resulted SLOT->ksr value (kc >> SLOT->KSR) remains unchanged. */ + /* In such case, Attack Rate would not be recalculated by "refresh_fc_eg_slot". */ + /* This actually fixes the intro of "The Adventures of Batman & Robin" (Eke-Eke) */ + if ((SLOT->ar + SLOT->ksr) < (32+62)) + { + SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ]; + SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ]; + } + else + { + /* verified by Nemesis on real hardware (Attack phase is blocked) */ + SLOT->eg_sh_ar = 0; + SLOT->eg_sel_ar = 18*RATE_STEPS; + } + } + +/* set decay rate */ +INLINE void set_dr(FM_SLOT *SLOT,int v) +{ + SLOT->d1r = (v&0x1f) ? 32 + ((v&0x1f)<<1) : 0; + + SLOT->eg_sh_d1r = eg_rate_shift [SLOT->d1r + SLOT->ksr]; + SLOT->eg_sel_d1r= eg_rate_select[SLOT->d1r + SLOT->ksr]; + +} + +/* set sustain rate */ +INLINE void set_sr(FM_SLOT *SLOT,int v) +{ + SLOT->d2r = (v&0x1f) ? 32 + ((v&0x1f)<<1) : 0; + + SLOT->eg_sh_d2r = eg_rate_shift [SLOT->d2r + SLOT->ksr]; + SLOT->eg_sel_d2r= eg_rate_select[SLOT->d2r + SLOT->ksr]; +} + +/* set release rate */ +INLINE void set_sl_rr(FM_SLOT *SLOT,int v) +{ + SLOT->sl = sl_table[ v>>4 ]; + + /* check EG state changes */ + if ((SLOT->state == EG_DEC) && (SLOT->volume >= (INT32)(SLOT->sl))) + SLOT->state = EG_SUS; + + SLOT->rr = 34 + ((v&0x0f)<<2); + + SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr]; + SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr]; +} + +/* advance LFO to next sample */ +INLINE void advance_lfo() +{ + if (ym2612.OPN.lfo_timer_overflow) /* LFO enabled ? */ + { + /* increment LFO timer (every samples) */ + ym2612.OPN.lfo_timer ++; + + /* when LFO is enabled, one level will last for 108, 77, 71, 67, 62, 44, 8 or 5 samples */ + if (ym2612.OPN.lfo_timer >= ym2612.OPN.lfo_timer_overflow) + { + ym2612.OPN.lfo_timer = 0; + + /* There are 128 LFO steps */ + ym2612.OPN.lfo_cnt = ( ym2612.OPN.lfo_cnt + 1 ) & 127; + + /* triangle (inverted) */ + /* AM: from 126 to 0 step -2, 0 to 126 step +2 */ + if (ym2612.OPN.lfo_cnt<64) + ym2612.OPN.LFO_AM = (ym2612.OPN.lfo_cnt ^ 63) << 1; + else + ym2612.OPN.LFO_AM = (ym2612.OPN.lfo_cnt & 63) << 1; + + /* PM works with 4 times slower clock */ + ym2612.OPN.LFO_PM = ym2612.OPN.lfo_cnt >> 2; + } + } +} + + +INLINE void advance_eg_channels(FM_CH *CH, unsigned int eg_cnt) +{ + unsigned int i = 6; /* six channels */ + unsigned int j; + FM_SLOT *SLOT; + + do + { + SLOT = &CH->SLOT[SLOT1]; + j = 4; /* four operators per channel */ + do + { + switch(SLOT->state) + { + case EG_ATT: /* attack phase */ + { + if (!(eg_cnt & ((1<eg_sh_ar)-1))) + { + /* update attenuation level */ + SLOT->volume += (~SLOT->volume * (eg_inc[SLOT->eg_sel_ar + ((eg_cnt>>SLOT->eg_sh_ar)&7)]))>>4; + + /* check phase transition*/ + if (SLOT->volume <= MIN_ATT_INDEX) + { + SLOT->volume = MIN_ATT_INDEX; + SLOT->state = (SLOT->sl == MIN_ATT_INDEX) ? EG_SUS : EG_DEC; /* special case where SL=0 */ + } + + /* recalculate EG output */ + if ((SLOT->ssg&0x08) && (SLOT->ssgn ^ (SLOT->ssg&0x04))) /* SSG-EG Output Inversion */ + SLOT->vol_out = ((UINT32)(0x200 - SLOT->volume) & MAX_ATT_INDEX) + SLOT->tl; + else + SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl; + } + break; + } + + case EG_DEC: /* decay phase */ + { + if (!(eg_cnt & ((1<eg_sh_d1r)-1))) + { + /* SSG EG type */ + if (SLOT->ssg&0x08) + { + /* update attenuation level */ + if (SLOT->volume < 0x200) + { + SLOT->volume += 4 * eg_inc[SLOT->eg_sel_d1r + ((eg_cnt>>SLOT->eg_sh_d1r)&7)]; + + /* recalculate EG output */ + if (SLOT->ssgn ^ (SLOT->ssg&0x04)) /* SSG-EG Output Inversion */ + SLOT->vol_out = ((UINT32)(0x200 - SLOT->volume) & MAX_ATT_INDEX) + SLOT->tl; + else + SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl; + } + } + else + { + /* update attenuation level */ + SLOT->volume += eg_inc[SLOT->eg_sel_d1r + ((eg_cnt>>SLOT->eg_sh_d1r)&7)]; + + /* recalculate EG output */ + SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl; + } + + /* check phase transition*/ + if (SLOT->volume >= (INT32)(SLOT->sl)) + SLOT->state = EG_SUS; + } + break; + } + + case EG_SUS: /* sustain phase */ + { + if (!(eg_cnt & ((1<eg_sh_d2r)-1))) + { + /* SSG EG type */ + if (SLOT->ssg&0x08) + { + /* update attenuation level */ + if (SLOT->volume < 0x200) + { + SLOT->volume += 4 * eg_inc[SLOT->eg_sel_d2r + ((eg_cnt>>SLOT->eg_sh_d2r)&7)]; + + /* recalculate EG output */ + if (SLOT->ssgn ^ (SLOT->ssg&0x04)) /* SSG-EG Output Inversion */ + SLOT->vol_out = ((UINT32)(0x200 - SLOT->volume) & MAX_ATT_INDEX) + SLOT->tl; + else + SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl; + } + } + else + { + /* update attenuation level */ + SLOT->volume += eg_inc[SLOT->eg_sel_d2r + ((eg_cnt>>SLOT->eg_sh_d2r)&7)]; + + /* check phase transition*/ + if ( SLOT->volume >= MAX_ATT_INDEX ) + SLOT->volume = MAX_ATT_INDEX; + /* do not change SLOT->state (verified on real chip) */ + + /* recalculate EG output */ + SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl; + } + } + break; + } + + case EG_REL: /* release phase */ + { + if (!(eg_cnt & ((1<eg_sh_rr)-1))) + { + /* SSG EG type */ + if (SLOT->ssg&0x08) + { + /* update attenuation level */ + if (SLOT->volume < 0x200) + SLOT->volume += 4 * eg_inc[SLOT->eg_sel_rr + ((eg_cnt>>SLOT->eg_sh_rr)&7)]; + + /* check phase transition */ + if (SLOT->volume >= 0x200) + { + SLOT->volume = MAX_ATT_INDEX; + SLOT->state = EG_OFF; + } + } + else + { + /* update attenuation level */ + SLOT->volume += eg_inc[SLOT->eg_sel_rr + ((eg_cnt>>SLOT->eg_sh_rr)&7)]; + + /* check phase transition*/ + if (SLOT->volume >= MAX_ATT_INDEX) + { + SLOT->volume = MAX_ATT_INDEX; + SLOT->state = EG_OFF; + } + } + + /* recalculate EG output */ + SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl; + + } + break; + } + } + + /* next slot */ + SLOT++; + } while (--j); + + /* next channel */ + CH++; + } while (--i); +} + +/* SSG-EG update process */ +/* The behavior is based upon Nemesis tests on real hardware */ +/* This is actually executed before each samples */ +INLINE void update_ssg_eg_channels(FM_CH *CH) +{ + unsigned int i = 6; /* six channels */ + unsigned int j; + FM_SLOT *SLOT; + + do + { + j = 4; /* four operators per channel */ + SLOT = &CH->SLOT[SLOT1]; + + do + { + /* detect SSG-EG transition */ + /* this is not required during release phase as the attenuation has been forced to MAX and output invert flag is not used */ + /* if an Attack Phase is programmed, inversion can occur on each sample */ + if ((SLOT->ssg & 0x08) && (SLOT->volume >= 0x200) && (SLOT->state > EG_REL)) + { + if (SLOT->ssg & 0x01) /* bit 0 = hold SSG-EG */ + { + /* set inversion flag */ + if (SLOT->ssg & 0x02) + SLOT->ssgn = 4; + + /* force attenuation level during decay phases */ + if ((SLOT->state != EG_ATT) && !(SLOT->ssgn ^ (SLOT->ssg & 0x04))) + SLOT->volume = MAX_ATT_INDEX; + } + else /* loop SSG-EG */ + { + /* toggle output inversion flag or reset Phase Generator */ + if (SLOT->ssg & 0x02) + SLOT->ssgn ^= 4; + else + SLOT->phase = 0; + + /* same as Key ON */ + if (SLOT->state != EG_ATT) + { + if ((SLOT->ar + SLOT->ksr) < 94 /*32+62*/) + { + SLOT->state = (SLOT->volume <= MIN_ATT_INDEX) ? ((SLOT->sl == MIN_ATT_INDEX) ? EG_SUS : EG_DEC) : EG_ATT; + } + else + { + /* Attack Rate is maximal: directly switch to Decay or Substain */ + SLOT->volume = MIN_ATT_INDEX; + SLOT->state = (SLOT->sl == MIN_ATT_INDEX) ? EG_SUS : EG_DEC; + } + } + } + + /* recalculate EG output */ + if (SLOT->ssgn ^ (SLOT->ssg&0x04)) + SLOT->vol_out = ((UINT32)(0x200 - SLOT->volume) & MAX_ATT_INDEX) + SLOT->tl; + else + SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl; + } + + /* next slot */ + SLOT++; + } while (--j); + + /* next channel */ + CH++; + } while (--i); +} + +INLINE void update_phase_lfo_slot(FM_SLOT *SLOT, INT32 pms, UINT32 block_fnum) +{ + INT32 lfo_fn_table_index_offset = lfo_pm_table[(((block_fnum & 0x7f0) >> 4) << 8) + pms + ym2612.OPN.LFO_PM]; + + if (lfo_fn_table_index_offset) /* LFO phase modulation active */ + { + UINT8 blk; + unsigned int kc, fc; + + /* there are 2048 FNUMs that can be generated using FNUM/BLK registers + but LFO works with one more bit of a precision so we really need 4096 elements */ + block_fnum = block_fnum*2 + lfo_fn_table_index_offset; + blk = (block_fnum&0x7000) >> 12; + block_fnum = block_fnum & 0xfff; + + /* keyscale code */ + kc = (blk<<2) | opn_fktable[block_fnum >> 8]; + + /* (frequency) phase increment counter */ + fc = (((block_fnum << 5) >> (7 - blk)) + SLOT->DT[kc]) & DT_MASK; + + /* update phase */ + SLOT->phase += (fc * SLOT->mul) >> 1; + } + else /* LFO phase modulation = zero */ + { + SLOT->phase += SLOT->Incr; + } +} + +INLINE void update_phase_lfo_channel(FM_CH *CH) +{ + UINT32 block_fnum = CH->block_fnum; + + INT32 lfo_fn_table_index_offset = lfo_pm_table[(((block_fnum & 0x7f0) >> 4) << 8) + CH->pms + ym2612.OPN.LFO_PM]; + + if (lfo_fn_table_index_offset) /* LFO phase modulation active */ + { + UINT8 blk; + unsigned int kc, fc, finc; + + /* there are 2048 FNUMs that can be generated using FNUM/BLK registers + but LFO works with one more bit of a precision so we really need 4096 elements */ + block_fnum = block_fnum*2 + lfo_fn_table_index_offset; + blk = (block_fnum&0x7000) >> 12; + block_fnum = block_fnum & 0xfff; + + /* keyscale code */ + kc = (blk<<2) | opn_fktable[block_fnum >> 8]; + + /* (frequency) phase increment counter */ + fc = (block_fnum << 5) >> (7 - blk); + + /* apply DETUNE & MUL operator specific values */ + finc = (fc + CH->SLOT[SLOT1].DT[kc]) & DT_MASK; + CH->SLOT[SLOT1].phase += (finc*CH->SLOT[SLOT1].mul) >> 1; + + finc = (fc + CH->SLOT[SLOT2].DT[kc]) & DT_MASK; + CH->SLOT[SLOT2].phase += (finc*CH->SLOT[SLOT2].mul) >> 1; + + finc = (fc + CH->SLOT[SLOT3].DT[kc]) & DT_MASK; + CH->SLOT[SLOT3].phase += (finc*CH->SLOT[SLOT3].mul) >> 1; + + finc = (fc + CH->SLOT[SLOT4].DT[kc]) & DT_MASK; + CH->SLOT[SLOT4].phase += (finc*CH->SLOT[SLOT4].mul) >> 1; + } + else /* LFO phase modulation = zero */ + { + CH->SLOT[SLOT1].phase += CH->SLOT[SLOT1].Incr; + CH->SLOT[SLOT2].phase += CH->SLOT[SLOT2].Incr; + CH->SLOT[SLOT3].phase += CH->SLOT[SLOT3].Incr; + CH->SLOT[SLOT4].phase += CH->SLOT[SLOT4].Incr; + } +} + +/* update phase increment and envelope generator */ +INLINE void refresh_fc_eg_slot(FM_SLOT *SLOT , unsigned int fc , unsigned int kc ) +{ + /* add detune value */ + fc += SLOT->DT[kc]; + + /* (frequency) phase overflow (credits to Nemesis) */ + fc &= DT_MASK; + + /* (frequency) phase increment counter */ + SLOT->Incr = (fc * SLOT->mul) >> 1; + + /* ksr */ + kc = kc >> SLOT->KSR; + + if( SLOT->ksr != kc ) + { + SLOT->ksr = kc; + + /* recalculate envelope generator rates */ + if ((SLOT->ar + kc) < (32+62)) + { + SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + kc ]; + SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + kc ]; + } + else + { + /* verified by Nemesis on real hardware (Attack phase is blocked) */ + SLOT->eg_sh_ar = 0; + SLOT->eg_sel_ar = 18*RATE_STEPS; + } + + SLOT->eg_sh_d1r = eg_rate_shift [SLOT->d1r + kc]; + SLOT->eg_sel_d1r= eg_rate_select[SLOT->d1r + kc]; + + SLOT->eg_sh_d2r = eg_rate_shift [SLOT->d2r + kc]; + SLOT->eg_sel_d2r= eg_rate_select[SLOT->d2r + kc]; + + SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + kc]; + SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + kc]; + } +} + +/* update phase increment counters */ +INLINE void refresh_fc_eg_chan(FM_CH *CH ) +{ + if( CH->SLOT[SLOT1].Incr==-1) + { + int fc = CH->fc; + int kc = CH->kcode; + refresh_fc_eg_slot(&CH->SLOT[SLOT1] , fc , kc ); + refresh_fc_eg_slot(&CH->SLOT[SLOT2] , fc , kc ); + refresh_fc_eg_slot(&CH->SLOT[SLOT3] , fc , kc ); + refresh_fc_eg_slot(&CH->SLOT[SLOT4] , fc , kc ); + } +} + +#define volume_calc(OP) ((OP)->vol_out + (AM & (OP)->AMmask)) + +INLINE signed int op_calc(UINT32 phase, unsigned int env, unsigned int pm) +{ + UINT32 p = (env<<3) + sin_tab[ ( (phase >> SIN_BITS) + (pm >> 1) ) & SIN_MASK ]; + + if (p >= TL_TAB_LEN) + return 0; + return tl_tab[p]; +} + +INLINE signed int op_calc1(UINT32 phase, unsigned int env, unsigned int pm) +{ + UINT32 p = (env<<3) + sin_tab[ ( (phase + pm ) >> SIN_BITS ) & SIN_MASK ]; + + if (p >= TL_TAB_LEN) + return 0; + return tl_tab[p]; +} + +INLINE void chan_calc(FM_CH *CH, int num) +{ + do + { + UINT32 AM = ym2612.OPN.LFO_AM >> CH->ams; + unsigned int eg_out = volume_calc(&CH->SLOT[SLOT1]); + + m2 = c1 = c2 = mem = 0; + + *CH->mem_connect = CH->mem_value; /* restore delayed sample (MEM) value to m2 or c2 */ + { + INT32 out = CH->op1_out[0] + CH->op1_out[1]; + CH->op1_out[0] = CH->op1_out[1]; + + if( !CH->connect1 ){ + /* algorithm 5 */ + mem = c1 = c2 = CH->op1_out[0]; + }else{ + /* other algorithms */ + *CH->connect1 += CH->op1_out[0]; + } + + CH->op1_out[1] = 0; + if( eg_out < ENV_QUIET ) /* SLOT 1 */ + { + if (!CH->FB) + out=0; + + CH->op1_out[1] = op_calc1(CH->SLOT[SLOT1].phase, eg_out, (out<FB) ); + } + } + + eg_out = volume_calc(&CH->SLOT[SLOT3]); + if( eg_out < ENV_QUIET ) /* SLOT 3 */ + *CH->connect3 += op_calc(CH->SLOT[SLOT3].phase, eg_out, m2); + + eg_out = volume_calc(&CH->SLOT[SLOT2]); + if( eg_out < ENV_QUIET ) /* SLOT 2 */ + *CH->connect2 += op_calc(CH->SLOT[SLOT2].phase, eg_out, c1); + + eg_out = volume_calc(&CH->SLOT[SLOT4]); + if( eg_out < ENV_QUIET ) /* SLOT 4 */ + *CH->connect4 += op_calc(CH->SLOT[SLOT4].phase, eg_out, c2); + + + /* store current MEM */ + CH->mem_value = mem; + + /* update phase counters AFTER output calculations */ + if(CH->pms) + { + /* add support for 3 slot mode */ + if ((ym2612.OPN.ST.mode & 0xC0) && (CH == &ym2612.CH[2])) + { + update_phase_lfo_slot(&CH->SLOT[SLOT1], CH->pms, ym2612.OPN.SL3.block_fnum[1]); + update_phase_lfo_slot(&CH->SLOT[SLOT2], CH->pms, ym2612.OPN.SL3.block_fnum[2]); + update_phase_lfo_slot(&CH->SLOT[SLOT3], CH->pms, ym2612.OPN.SL3.block_fnum[0]); + update_phase_lfo_slot(&CH->SLOT[SLOT4], CH->pms, CH->block_fnum); + } + else + { + update_phase_lfo_channel(CH); + } + } + else /* no LFO phase modulation */ + { + CH->SLOT[SLOT1].phase += CH->SLOT[SLOT1].Incr; + CH->SLOT[SLOT2].phase += CH->SLOT[SLOT2].Incr; + CH->SLOT[SLOT3].phase += CH->SLOT[SLOT3].Incr; + CH->SLOT[SLOT4].phase += CH->SLOT[SLOT4].Incr; + } + + /* next channel */ + CH++; + } while (--num); +} + +/* write a OPN mode register 0x20-0x2f */ +INLINE void OPNWriteMode(int r, int v) +{ + UINT8 c; + FM_CH *CH; + + switch(r){ + case 0x21: /* Test */ + break; + + case 0x22: /* LFO FREQ (YM2608/YM2610/YM2610B/ym2612) */ + if (v&8) /* LFO enabled ? */ + { + ym2612.OPN.lfo_timer_overflow = lfo_samples_per_step[v&7]; + } + else + { + /* hold LFO waveform in reset state */ + ym2612.OPN.lfo_timer_overflow = 0; + ym2612.OPN.lfo_timer = 0; + ym2612.OPN.lfo_cnt = 0; + ym2612.OPN.LFO_PM = 0; + ym2612.OPN.LFO_AM = 126; + } + break; + case 0x24: /* timer A High 8*/ + ym2612.OPN.ST.TA = (ym2612.OPN.ST.TA & 0x03)|(((int)v)<<2); + ym2612.OPN.ST.TAL = 1024 - ym2612.OPN.ST.TA; + break; + case 0x25: /* timer A Low 2*/ + ym2612.OPN.ST.TA = (ym2612.OPN.ST.TA & 0x3fc)|(v&3); + ym2612.OPN.ST.TAL = 1024 - ym2612.OPN.ST.TA; + break; + case 0x26: /* timer B */ + ym2612.OPN.ST.TB = v; + ym2612.OPN.ST.TBL = (256 - v) << 4; + break; + case 0x27: /* mode, timer control */ + set_timers(v); + break; + case 0x28: /* key on / off */ + c = v & 0x03; + if( c == 3 ) break; + if (v&0x04) c+=3; /* CH 4-6 */ + CH = &ym2612.CH[c]; + + if (v&0x10) FM_KEYON(CH,SLOT1); else FM_KEYOFF(CH,SLOT1); + if (v&0x20) FM_KEYON(CH,SLOT2); else FM_KEYOFF(CH,SLOT2); + if (v&0x40) FM_KEYON(CH,SLOT3); else FM_KEYOFF(CH,SLOT3); + if (v&0x80) FM_KEYON(CH,SLOT4); else FM_KEYOFF(CH,SLOT4); + break; + } +} + +/* write a OPN register (0x30-0xff) */ +INLINE void OPNWriteReg(int r, int v) +{ + FM_CH *CH; + FM_SLOT *SLOT; + + UINT8 c = OPN_CHAN(r); + + if (c == 3) return; /* 0xX3,0xX7,0xXB,0xXF */ + + if (r >= 0x100) c+=3; + + CH = &ym2612.CH[c]; + + SLOT = &(CH->SLOT[OPN_SLOT(r)]); + + switch( r & 0xf0 ) { + case 0x30: /* DET , MUL */ + set_det_mul(CH,SLOT,v); + break; + + case 0x40: /* TL */ + set_tl(SLOT,v); + break; + + case 0x50: /* KS, AR */ + set_ar_ksr(CH,SLOT,v); + break; + + case 0x60: /* bit7 = AM ENABLE, DR */ + set_dr(SLOT,v); + SLOT->AMmask = (v&0x80) ? ~0 : 0; + break; + + case 0x70: /* SR */ + set_sr(SLOT,v); + break; + + case 0x80: /* SL, RR */ + set_sl_rr(SLOT,v); + break; + + case 0x90: /* SSG-EG */ + SLOT->ssg = v&0x0f; + + /* recalculate EG output */ + if (SLOT->state > EG_REL) + { + if ((SLOT->ssg&0x08) && (SLOT->ssgn ^ (SLOT->ssg&0x04))) + SLOT->vol_out = ((UINT32)(0x200 - SLOT->volume) & MAX_ATT_INDEX) + SLOT->tl; + else + SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl; + } + + /* SSG-EG envelope shapes : + + E AtAlH + 1 0 0 0 \\\\ + + 1 0 0 1 \___ + + 1 0 1 0 \/\/ + ___ + 1 0 1 1 \ + + 1 1 0 0 //// + ___ + 1 1 0 1 / + + 1 1 1 0 /\/\ + + 1 1 1 1 /___ + + + E = SSG-EG enable + + + The shapes are generated using Attack, Decay and Sustain phases. + + Each single character in the diagrams above represents this whole + sequence: + + - when KEY-ON = 1, normal Attack phase is generated (*without* any + difference when compared to normal mode), + + - later, when envelope level reaches minimum level (max volume), + the EG switches to Decay phase (which works with bigger steps + when compared to normal mode - see below), + + - later when envelope level passes the SL level, + the EG swithes to Sustain phase (which works with bigger steps + when compared to normal mode - see below), + + - finally when envelope level reaches maximum level (min volume), + the EG switches to Attack phase again (depends on actual waveform). + + Important is that when switch to Attack phase occurs, the phase counter + of that operator will be zeroed-out (as in normal KEY-ON) but not always. + (I havent found the rule for that - perhaps only when the output level is low) + + The difference (when compared to normal Envelope Generator mode) is + that the resolution in Decay and Sustain phases is 4 times lower; + this results in only 256 steps instead of normal 1024. + In other words: + when SSG-EG is disabled, the step inside of the EG is one, + when SSG-EG is enabled, the step is four (in Decay and Sustain phases). + + Times between the level changes are the same in both modes. + + + Important: + Decay 1 Level (so called SL) is compared to actual SSG-EG output, so + it is the same in both SSG and no-SSG modes, with this exception: + + when the SSG-EG is enabled and is generating raising levels + (when the EG output is inverted) the SL will be found at wrong level !!! + For example, when SL=02: + 0 -6 = -6dB in non-inverted EG output + 96-6 = -90dB in inverted EG output + Which means that EG compares its level to SL as usual, and that the + output is simply inverted afterall. + + + The Yamaha's manuals say that AR should be set to 0x1f (max speed). + That is not necessary, but then EG will be generating Attack phase. + + */ + + + break; + + case 0xa0: + switch( OPN_SLOT(r) ){ + case 0: /* 0xa0-0xa2 : FNUM1 */ + { + UINT32 fn = (((UINT32)((ym2612.OPN.ST.fn_h)&7))<<8) + v; + UINT8 blk = ym2612.OPN.ST.fn_h>>3; + /* keyscale code */ + CH->kcode = (blk<<2) | opn_fktable[fn >> 7]; + /* phase increment counter */ + CH->fc = (fn << 6) >> (7 - blk); + + /* store fnum in clear form for LFO PM calculations */ + CH->block_fnum = (blk<<11) | fn; + + CH->SLOT[SLOT1].Incr=-1; + break; + } + case 1: /* 0xa4-0xa6 : FNUM2,BLK */ + ym2612.OPN.ST.fn_h = v&0x3f; + break; + case 2: /* 0xa8-0xaa : 3CH FNUM1 */ + if(r < 0x100) + { + UINT32 fn = (((UINT32)(ym2612.OPN.SL3.fn_h&7))<<8) + v; + UINT8 blk = ym2612.OPN.SL3.fn_h>>3; + /* keyscale code */ + ym2612.OPN.SL3.kcode[c]= (blk<<2) | opn_fktable[fn >> 7]; + /* phase increment counter */ + ym2612.OPN.SL3.fc[c] = (fn << 6) >> (7 - blk); + ym2612.OPN.SL3.block_fnum[c] = (blk<<11) | fn; + ym2612.CH[2].SLOT[SLOT1].Incr=-1; + } + break; + case 3: /* 0xac-0xae : 3CH FNUM2,BLK */ + if(r < 0x100) + ym2612.OPN.SL3.fn_h = v&0x3f; + break; + } + break; + + case 0xb0: + switch( OPN_SLOT(r) ){ + case 0: /* 0xb0-0xb2 : FB,ALGO */ + { + CH->ALGO = v&7; + CH->FB = (v>>3)&7; + setup_connection( CH, c ); + break; + } + case 1: /* 0xb4-0xb6 : L , R , AMS , PMS */ + /* b0-2 PMS */ + CH->pms = (v & 7) * 32; /* CH->pms = PM depth * 32 (index in lfo_pm_table) */ + + /* b4-5 AMS */ + CH->ams = lfo_ams_depth_shift[(v>>4) & 0x03]; + + /* PAN : b7 = L, b6 = R */ + ym2612.OPN.pan[ c*2 ] = (v & 0x80) ? bitmask : 0; + ym2612.OPN.pan[ c*2+1 ] = (v & 0x40) ? bitmask : 0; + break; + } + break; + } +} + +static void reset_channels(FM_CH *CH , int num ) +{ + int c,s; + + for( c = 0 ; c < num ; c++ ) + { + CH[c].mem_value = 0; + CH[c].op1_out[0] = 0; + CH[c].op1_out[1] = 0; + for(s = 0 ; s < 4 ; s++ ) + { + CH[c].SLOT[s].Incr = -1; + CH[c].SLOT[s].key = 0; + CH[c].SLOT[s].phase = 0; + CH[c].SLOT[s].ssgn = 0; + CH[c].SLOT[s].state = EG_OFF; + CH[c].SLOT[s].volume = MAX_ATT_INDEX; + CH[c].SLOT[s].vol_out = MAX_ATT_INDEX; + } + } +} + +/* initialize generic tables */ +static void init_tables(void) +{ + signed int d,i,x; + signed int n; + double o,m; + + /* build Linear Power Table */ + for (x=0; x>= 4; /* 12 bits here */ + if (n&1) /* round to nearest */ + n = (n>>1)+1; + else + n = n>>1; + /* 11 bits here (rounded) */ + n <<= 2; /* 13 bits here (as in real chip) */ + + /* 14 bits (with sign bit) */ + tl_tab[ x*2 + 0 ] = n; + tl_tab[ x*2 + 1 ] = -tl_tab[ x*2 + 0 ]; + + /* one entry in the 'Power' table use the following format, xxxxxyyyyyyyys with: */ + /* s = sign bit */ + /* yyyyyyyy = 8-bits decimal part (0-TL_RES_LEN) */ + /* xxxxx = 5-bits integer 'shift' value (0-31) but, since Power table output is 13 bits, */ + /* any value above 13 (included) would be discarded. */ + for (i=1; i<13; i++) + { + tl_tab[ x*2+0 + i*2*TL_RES_LEN ] = tl_tab[ x*2+0 ]>>i; + tl_tab[ x*2+1 + i*2*TL_RES_LEN ] = -tl_tab[ x*2+0 + i*2*TL_RES_LEN ]; + } + } + + /* build Logarithmic Sinus table */ + for (i=0; i0.0) + o = 8*log(1.0/m)/log(2); /* convert to 'decibels' */ + else + o = 8*log(-1.0/m)/log(2); /* convert to 'decibels' */ + + o = o / (ENV_STEP/4); + + n = (int)(2.0*o); + if (n&1) /* round to nearest */ + n = (n>>1)+1; + else + n = n>>1; + + /* 13-bits (8.5) value is formatted for above 'Power' table */ + sin_tab[ i ] = n*2 + (m>=0.0? 0: 1 ); + } + + /* build LFO PM modulation table */ + for(i = 0; i < 8; i++) /* 8 PM depths */ + { + UINT8 fnum; + for (fnum=0; fnum<128; fnum++) /* 7 bits meaningful of F-NUMBER */ + { + UINT8 value; + UINT8 step; + UINT32 offset_depth = i; + UINT32 offset_fnum_bit; + UINT32 bit_tmp; + + for (step=0; step<8; step++) + { + value = 0; + for (bit_tmp=0; bit_tmp<7; bit_tmp++) /* 7 bits */ + { + if (fnum & (1<= 0xb4 ; i-- ) + { + OPNWriteReg(i ,0xc0); + OPNWriteReg(i|0x100,0xc0); + } + for(i = 0xb2 ; i >= 0x30 ; i-- ) + { + OPNWriteReg(i ,0); + OPNWriteReg(i|0x100,0); + } +} + +/* ym2612 write */ +/* n = number */ +/* a = address */ +/* v = value */ +void YM2612Write(unsigned int a, unsigned int v) +{ + v &= 0xff; /* adjust to 8 bit bus */ + + switch( a ) + { + case 0: /* address port 0 */ + ym2612.OPN.ST.address = v; + break; + + case 2: /* address port 1 */ + ym2612.OPN.ST.address = v | 0x100; + break; + + default: /* data port */ + { + int addr = ym2612.OPN.ST.address; /* verified by Nemesis on real YM2612 */ + switch( addr & 0x1f0 ) + { + case 0x20: /* 0x20-0x2f Mode */ + switch( addr ) + { + case 0x2a: /* DAC data (ym2612) */ + ym2612.dacout = ((int)v - 0x80) << 6; /* convert to 14-bit output */ + break; + case 0x2b: /* DAC Sel (ym2612) */ + /* b7 = dac enable */ + ym2612.dacen = v & 0x80; + break; + default: /* OPN section */ + /* write register */ + OPNWriteMode(addr,v); + } + break; + default: /* 0x30-0xff OPN section */ + /* write register */ + OPNWriteReg(addr,v); + } + break; + } + } +} + +unsigned int YM2612Read(void) +{ + return ym2612.OPN.ST.status & 0xff; +} + +/* Generate samples for ym2612 */ +void YM2612Update(int *buffer, int length) +{ + int i; + int lt,rt; + + /* refresh PG increments and EG rates if required */ + refresh_fc_eg_chan(&ym2612.CH[0]); + refresh_fc_eg_chan(&ym2612.CH[1]); + + if (!(ym2612.OPN.ST.mode & 0xC0)) + { + refresh_fc_eg_chan(&ym2612.CH[2]); + } + else + { + /* 3SLOT MODE (operator order is 0,1,3,2) */ + if(ym2612.CH[2].SLOT[SLOT1].Incr==-1) + { + refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT1] , ym2612.OPN.SL3.fc[1] , ym2612.OPN.SL3.kcode[1] ); + refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT2] , ym2612.OPN.SL3.fc[2] , ym2612.OPN.SL3.kcode[2] ); + refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT3] , ym2612.OPN.SL3.fc[0] , ym2612.OPN.SL3.kcode[0] ); + refresh_fc_eg_slot(&ym2612.CH[2].SLOT[SLOT4] , ym2612.CH[2].fc , ym2612.CH[2].kcode ); + } + } + + refresh_fc_eg_chan(&ym2612.CH[3]); + refresh_fc_eg_chan(&ym2612.CH[4]); + refresh_fc_eg_chan(&ym2612.CH[5]); + + /* buffering */ + for(i=0; i < length ; i++) + { + /* clear outputs */ + out_fm[0] = 0; + out_fm[1] = 0; + out_fm[2] = 0; + out_fm[3] = 0; + out_fm[4] = 0; + out_fm[5] = 0; + + /* update SSG-EG output */ + update_ssg_eg_channels(&ym2612.CH[0]); + + /* calculate FM */ + if (!ym2612.dacen) + { + chan_calc(&ym2612.CH[0],6); + } + else + { + /* DAC Mode */ + out_fm[5] = ym2612.dacout; + chan_calc(&ym2612.CH[0],5); + } + + /* advance LFO */ + advance_lfo(); + + /* advance envelope generator */ + ym2612.OPN.eg_timer ++; + + /* EG is updated every 3 samples */ + if (ym2612.OPN.eg_timer >= 3) + { + ym2612.OPN.eg_timer = 0; + ym2612.OPN.eg_cnt++; + advance_eg_channels(&ym2612.CH[0], ym2612.OPN.eg_cnt); + } + + /* 14-bit accumulator channels outputs (range is -8192;+8192) */ + if (out_fm[0] > 8192) out_fm[0] = 8192; + else if (out_fm[0] < -8192) out_fm[0] = -8192; + if (out_fm[1] > 8192) out_fm[1] = 8192; + else if (out_fm[1] < -8192) out_fm[1] = -8192; + if (out_fm[2] > 8192) out_fm[2] = 8192; + else if (out_fm[2] < -8192) out_fm[2] = -8192; + if (out_fm[3] > 8192) out_fm[3] = 8192; + else if (out_fm[3] < -8192) out_fm[3] = -8192; + if (out_fm[4] > 8192) out_fm[4] = 8192; + else if (out_fm[4] < -8192) out_fm[4] = -8192; + if (out_fm[5] > 8192) out_fm[5] = 8192; + else if (out_fm[5] < -8192) out_fm[5] = -8192; + + /* stereo DAC channels outputs mixing */ + lt = ((out_fm[0]) & ym2612.OPN.pan[0]); + rt = ((out_fm[0]) & ym2612.OPN.pan[1]); + lt += ((out_fm[1]) & ym2612.OPN.pan[2]); + rt += ((out_fm[1]) & ym2612.OPN.pan[3]); + lt += ((out_fm[2]) & ym2612.OPN.pan[4]); + rt += ((out_fm[2]) & ym2612.OPN.pan[5]); + lt += ((out_fm[3]) & ym2612.OPN.pan[6]); + rt += ((out_fm[3]) & ym2612.OPN.pan[7]); + lt += ((out_fm[4]) & ym2612.OPN.pan[8]); + rt += ((out_fm[4]) & ym2612.OPN.pan[9]); + lt += ((out_fm[5]) & ym2612.OPN.pan[10]); + rt += ((out_fm[5]) & ym2612.OPN.pan[11]); + + /* buffering */ + *buffer++ = lt; + *buffer++ = rt; + + /* CSM mode: if CSM Key ON has occured, CSM Key OFF need to be sent */ + /* only if Timer A does not overflow again (i.e CSM Key ON not set again) */ + ym2612.OPN.SL3.key_csm <<= 1; + + /* timer A control */ + INTERNAL_TIMER_A(); + + /* CSM Mode Key ON still disabled */ + if (ym2612.OPN.SL3.key_csm & 2) + { + /* CSM Mode Key OFF (verified by Nemesis on real hardware) */ + FM_KEYOFF_CSM(&ym2612.CH[2],SLOT1); + FM_KEYOFF_CSM(&ym2612.CH[2],SLOT2); + FM_KEYOFF_CSM(&ym2612.CH[2],SLOT3); + FM_KEYOFF_CSM(&ym2612.CH[2],SLOT4); + ym2612.OPN.SL3.key_csm = 0; + } + } + + /* timer B control */ + INTERNAL_TIMER_B(length); +} + +void YM2612Config(unsigned char dac_bits) +{ + int i; + + /* DAC precision (normally 9-bit on real hardware, implemented through simple 14-bit channel output bitmasking) */ + bitmask = ~((1 << (TL_BITS - dac_bits)) - 1); + + /* update L/R panning bitmasks */ + for (i=0; i<2*6; i++) + { + if (ym2612.OPN.pan[i]) + { + ym2612.OPN.pan[i] = bitmask; + } + } +} + +int YM2612LoadContext(unsigned char *state) +{ + int c,s; + uint8 index; + int bufferptr = 0; + + /* restore YM2612 context */ + load_param(&ym2612, sizeof(ym2612)); + + /* restore DT table address pointer for each channel slots */ + for (c=0; c<6; c++) + { + for (s=0; s<4; s++) + { + load_param(&index,sizeof(index)); + bufferptr += sizeof(index); + ym2612.CH[c].SLOT[s].DT = ym2612.OPN.ST.dt_tab[index&7]; + } + } + + /* restore outputs connections */ + setup_connection(&ym2612.CH[0],0); + setup_connection(&ym2612.CH[1],1); + setup_connection(&ym2612.CH[2],2); + setup_connection(&ym2612.CH[3],3); + setup_connection(&ym2612.CH[4],4); + setup_connection(&ym2612.CH[5],5); + + return bufferptr; +} + +int YM2612SaveContext(unsigned char *state) +{ + int c,s; + uint8 index; + int bufferptr = 0; + + /* save YM2612 context */ + save_param(&ym2612, sizeof(ym2612)); + + /* save DT table index for each channel slots */ + for (c=0; c<6; c++) + { + for (s=0; s<4; s++) + { + index = (ym2612.CH[c].SLOT[s].DT - ym2612.OPN.ST.dt_tab[0]) >> 5; + save_param(&index,sizeof(index)); + bufferptr += sizeof(index); + } + } + + return bufferptr; +} diff --git a/genplus-gx/core/sound/ym2612.h b/genplus-gx/core/sound/ym2612.h new file mode 100644 index 0000000000..2cad8bfec5 --- /dev/null +++ b/genplus-gx/core/sound/ym2612.h @@ -0,0 +1,28 @@ +/* +** +** software implementation of Yamaha FM sound generator (YM2612/YM3438) +** +** Original code (MAME fm.c) +** +** Copyright (C) 2001, 2002, 2003 Jarek Burczynski (bujar at mame dot net) +** Copyright (C) 1998 Tatsuyuki Satoh , MultiArcadeMachineEmulator development +** +** Version 1.4 (final beta) +** +** Additional code & fixes by Eke-Eke for Genesis Plus GX +** +*/ + +#ifndef _H_YM2612_ +#define _H_YM2612_ + +extern void YM2612Init(void); +extern void YM2612Config(unsigned char dac_bits); +extern void YM2612ResetChip(void); +extern void YM2612Update(int *buffer, int length); +extern void YM2612Write(unsigned int a, unsigned int v); +extern unsigned int YM2612Read(void); +extern int YM2612LoadContext(unsigned char *state); +extern int YM2612SaveContext(unsigned char *state); + +#endif /* _YM2612_ */ diff --git a/genplus-gx/core/state.c b/genplus-gx/core/state.c new file mode 100644 index 0000000000..50b99c2187 --- /dev/null +++ b/genplus-gx/core/state.c @@ -0,0 +1,285 @@ +/*************************************************************************************** + * Genesis Plus + * Savestate support + * + * Copyright (C) 2007-2012 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + +int state_load(unsigned char *state) +{ + int i, bufferptr = 0; + + /* signature check (GENPLUS-GX x.x.x) */ + char version[17]; + load_param(version,16); + version[16] = 0; + if (memcmp(version,STATE_VERSION,11)) + { + return 0; + } + + /* version check (keep compatibility with previous & current state version) */ + if ((version[11] < 0x31) || (version[13] < 0x37) || (version[15] < 0x31)) + { + return 0; + } + + /* reset system */ + system_reset(); + + /* enable VDP access for TMSS systems */ + for (i=0xc0; i<0xe0; i+=8) + { + m68k.memory_map[i].read8 = vdp_read_byte; + m68k.memory_map[i].read16 = vdp_read_word; + m68k.memory_map[i].write8 = vdp_write_byte; + m68k.memory_map[i].write16 = vdp_write_word; + zbank_memory_map[i].read = zbank_read_vdp; + zbank_memory_map[i].write = zbank_write_vdp; + } + + /* GENESIS */ + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + load_param(work_ram, sizeof(work_ram)); + load_param(zram, sizeof(zram)); + load_param(&zstate, sizeof(zstate)); + load_param(&zbank, sizeof(zbank)); + if (zstate == 3) + { + m68k.memory_map[0xa0].read8 = z80_read_byte; + m68k.memory_map[0xa0].read16 = z80_read_word; + m68k.memory_map[0xa0].write8 = z80_write_byte; + m68k.memory_map[0xa0].write16 = z80_write_word; + } + else + { + m68k.memory_map[0xa0].read8 = m68k_read_bus_8; + m68k.memory_map[0xa0].read16 = m68k_read_bus_16; + m68k.memory_map[0xa0].write8 = m68k_unused_8_w; + m68k.memory_map[0xa0].write16 = m68k_unused_16_w; + } + } + else + { + load_param(work_ram, 0x2000); + } + + /* IO */ + load_param(io_reg, sizeof(io_reg)); + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + io_reg[0] = region_code | 0x20 | (config.bios & 1); + } + else + { + io_reg[0] = 0x80 | (region_code >> 1); + } + + /* VDP */ + bufferptr += vdp_context_load(&state[bufferptr], version[15]); + + /* SOUND */ + bufferptr += sound_context_load(&state[bufferptr]); + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + SN76489_Init(snd.blips[0][0], snd.blips[0][1], SN_INTEGRATED); + SN76489_Config(0, config.psg_preamp, config.psgBoostNoise, 0xff); + } + else + { + SN76489_Init(snd.blips[0][0], snd.blips[0][1], (system_hw < SYSTEM_MARKIII) ? SN_DISCRETE : SN_INTEGRATED); + SN76489_Config(0, config.psg_preamp, config.psgBoostNoise, io_reg[6]); + } + + /* 68000 */ + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + uint16 tmp16; + uint32 tmp32; + load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D0, tmp32); + load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D1, tmp32); + load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D2, tmp32); + load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D3, tmp32); + load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D4, tmp32); + load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D5, tmp32); + load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D6, tmp32); + load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D7, tmp32); + load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A0, tmp32); + load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A1, tmp32); + load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A2, tmp32); + load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A3, tmp32); + load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A4, tmp32); + load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A5, tmp32); + load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A6, tmp32); + load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A7, tmp32); + load_param(&tmp32, 4); m68k_set_reg(M68K_REG_PC, tmp32); + load_param(&tmp16, 2); m68k_set_reg(M68K_REG_SR, tmp16); + load_param(&tmp32, 4); m68k_set_reg(M68K_REG_USP,tmp32); + load_param(&tmp32, 4); m68k_set_reg(M68K_REG_ISP,tmp32); + + load_param(&m68k.cycles, sizeof(m68k.cycles)); + load_param(&m68k.int_level, sizeof(m68k.int_level)); + load_param(&m68k.stopped, sizeof(m68k.stopped)); + } + + /* Z80 */ + load_param(&Z80, sizeof(Z80_Regs)); + Z80.irq_callback = z80_irq_callback; + + /* Extra HW */ + if (system_hw == SYSTEM_MCD) + { + /* handle case of MD cartridge using or not CD hardware */ + char id[5]; + load_param(id,4); + id[4] = 0; + + /* check if CD hardware was enabled before attempting to restore */ + if (memcmp(id,"SCD!",4)) + { + return 0; + } + + /* CD hardware */ + bufferptr += scd_context_load(&state[bufferptr]); + } + else if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + /* MD cartridge hardware */ + bufferptr += md_cart_context_load(&state[bufferptr]); + } + else + { + /* MS cartridge hardware */ + bufferptr += sms_cart_context_load(&state[bufferptr]); + sms_cart_switch(~io_reg[0x0E]); + } + + return bufferptr; +} + +int state_save(unsigned char *state) +{ + /* buffer size */ + int bufferptr = 0; + + /* version string */ + char version[16]; + strncpy(version,STATE_VERSION,16); + save_param(version, 16); + + /* GENESIS */ + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + save_param(work_ram, sizeof(work_ram)); + save_param(zram, sizeof(zram)); + save_param(&zstate, sizeof(zstate)); + save_param(&zbank, sizeof(zbank)); + } + else + { + save_param(work_ram, 0x2000); + } + + /* IO */ + save_param(io_reg, sizeof(io_reg)); + + /* VDP */ + bufferptr += vdp_context_save(&state[bufferptr]); + + /* SOUND */ + bufferptr += sound_context_save(&state[bufferptr]); + + /* 68000 */ + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + uint16 tmp16; + uint32 tmp32; + tmp32 = m68k_get_reg(M68K_REG_D0); save_param(&tmp32, 4); + tmp32 = m68k_get_reg(M68K_REG_D1); save_param(&tmp32, 4); + tmp32 = m68k_get_reg(M68K_REG_D2); save_param(&tmp32, 4); + tmp32 = m68k_get_reg(M68K_REG_D3); save_param(&tmp32, 4); + tmp32 = m68k_get_reg(M68K_REG_D4); save_param(&tmp32, 4); + tmp32 = m68k_get_reg(M68K_REG_D5); save_param(&tmp32, 4); + tmp32 = m68k_get_reg(M68K_REG_D6); save_param(&tmp32, 4); + tmp32 = m68k_get_reg(M68K_REG_D7); save_param(&tmp32, 4); + tmp32 = m68k_get_reg(M68K_REG_A0); save_param(&tmp32, 4); + tmp32 = m68k_get_reg(M68K_REG_A1); save_param(&tmp32, 4); + tmp32 = m68k_get_reg(M68K_REG_A2); save_param(&tmp32, 4); + tmp32 = m68k_get_reg(M68K_REG_A3); save_param(&tmp32, 4); + tmp32 = m68k_get_reg(M68K_REG_A4); save_param(&tmp32, 4); + tmp32 = m68k_get_reg(M68K_REG_A5); save_param(&tmp32, 4); + tmp32 = m68k_get_reg(M68K_REG_A6); save_param(&tmp32, 4); + tmp32 = m68k_get_reg(M68K_REG_A7); save_param(&tmp32, 4); + tmp32 = m68k_get_reg(M68K_REG_PC); save_param(&tmp32, 4); + tmp16 = m68k_get_reg(M68K_REG_SR); save_param(&tmp16, 2); + tmp32 = m68k_get_reg(M68K_REG_USP); save_param(&tmp32, 4); + tmp32 = m68k_get_reg(M68K_REG_ISP); save_param(&tmp32, 4); + + save_param(&m68k.cycles, sizeof(m68k.cycles)); + save_param(&m68k.int_level, sizeof(m68k.int_level)); + save_param(&m68k.stopped, sizeof(m68k.stopped)); + } + + /* Z80 */ + save_param(&Z80, sizeof(Z80_Regs)); + + /* External HW */ + if (system_hw == SYSTEM_MCD) + { + /* CD hardware ID flag */ + char id[5]; + strncpy(id,"SCD!",4); + save_param(id, 4); + + /* CD hardware */ + bufferptr += scd_context_save(&state[bufferptr]); + } + else if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + /* MD cartridge hardware */ + bufferptr += md_cart_context_save(&state[bufferptr]); + } + else + { + /* MS cartridge hardware */ + bufferptr += sms_cart_context_save(&state[bufferptr]); + } + + /* return total size */ + return bufferptr; +} diff --git a/genplus-gx/core/state.h b/genplus-gx/core/state.h new file mode 100644 index 0000000000..678d632858 --- /dev/null +++ b/genplus-gx/core/state.h @@ -0,0 +1,57 @@ +/*************************************************************************************** + * Genesis Plus + * Savestate support + * + * Copyright (C) 2007-2012 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _STATE_H_ +#define _STATE_H_ + +#define STATE_SIZE 0xfd000 +#define STATE_VERSION "GENPLUS-GX 1.7.5" + +#define load_param(param, size) \ + memcpy(param, &state[bufferptr], size); \ + bufferptr+= size; + +#define save_param(param, size) \ + memcpy(&state[bufferptr], param, size); \ + bufferptr+= size; + +/* Function prototypes */ +extern int state_load(unsigned char *state); +extern int state_save(unsigned char *state); + +#endif diff --git a/genplus-gx/core/system.c b/genplus-gx/core/system.c new file mode 100644 index 0000000000..d80a2557a9 --- /dev/null +++ b/genplus-gx/core/system.c @@ -0,0 +1,1384 @@ +/*************************************************************************************** + * Genesis Plus + * Virtual System emulation + * + * Support for "Genesis", "Genesis + CD" & "Master System" modes + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code) + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "eq.h" + +/* Global variables */ +t_bitmap bitmap; +t_snd snd; +uint32 mcycles_vdp; +uint8 system_hw; +uint8 system_bios; +uint32 system_clock; +int16 SVP_cycles = 800; + +static uint8 pause_b; +static EQSTATE eq; +static int16 llp,rrp; + +/******************************************************************************************/ +/* Audio subsystem */ +/******************************************************************************************/ + +int audio_init(int samplerate, double framerate) +{ + /* Number of M-cycles executed per second. */ + /* All emulated chips are kept in sync by using a common oscillator (MCLOCK) */ + /* */ + /* The original console would run exactly 53693175 M-cycles per sec (53203424 for PAL), */ + /* 3420 M-cycles per line and 262 (313 for PAL) lines per frame, which gives an exact */ + /* framerate of 59.92 (49.70 for PAL) frames per second. */ + /* */ + /* Since audio samples are generated at the end of the frame, to prevent audio skipping */ + /* or lag between emulated frames, number of samples rendered per frame must be set to */ + /* output samplerate (number of samples played per second) divided by input framerate */ + /* (number of frames emulated per seconds). */ + /* */ + /* On some systems, we may want to achieve 100% smooth video rendering by synchronizing */ + /* frame emulation with VSYNC, which frequency is generally not exactly those values. */ + /* In that case, input framerate (number of frames emulated per seconds) is the same as */ + /* output framerate (number of frames rendered per seconds) by the host video hardware. */ + /* */ + /* When no framerate is specified, base clock is set to original master clock value. */ + /* Otherwise, it is set to number of M-cycles emulated per line (fixed) multiplied by */ + /* number of lines per frame (VDP mode specific) multiplied by input framerate. */ + /* */ + double mclk = framerate ? (MCYCLES_PER_LINE * (vdp_pal ? 313 : 262) * framerate) : system_clock; + + /* Shutdown first */ + audio_shutdown(); + + /* Clear the sound data context */ + memset(&snd, 0, sizeof (snd)); + + /* Initialize audio rates */ + snd.sample_rate = samplerate; + snd.frame_rate = framerate; + + /* Initialize Blip Buffers */ + snd.blips[0][0] = blip_new(samplerate / 10); + snd.blips[0][1] = blip_new(samplerate / 10); + if (!snd.blips[0][0] || !snd.blips[0][1]) + { + audio_shutdown(); + return -1; + } + + /* For maximal accuracy, sound chips are running at their original rate using common */ + /* master clock timebase so they remain perfectly synchronized together, while still */ + /* being synchronized with 68K and Z80 CPUs as well. Mixed sound chip output is then */ + /* resampled to desired rate at the end of each frame, using Blip Buffer. */ + blip_set_rates(snd.blips[0][0], mclk, samplerate); + blip_set_rates(snd.blips[0][1], mclk, samplerate); + + /* Initialize PSG core */ + SN76489_Init(snd.blips[0][0], snd.blips[0][1], (system_hw < SYSTEM_MARKIII) ? SN_DISCRETE : SN_INTEGRATED); + + /* Mega CD sound hardware */ + if (system_hw == SYSTEM_MCD) + { + /* allocate blip buffers */ + snd.blips[1][0] = blip_new(samplerate / 10); + snd.blips[1][1] = blip_new(samplerate / 10); + snd.blips[2][0] = blip_new(samplerate / 10); + snd.blips[2][1] = blip_new(samplerate / 10); + if (!snd.blips[1][0] || !snd.blips[1][1] || !snd.blips[2][0] || !snd.blips[2][1]) + { + audio_shutdown(); + return -1; + } + + /* Initialize PCM core */ + pcm_init(snd.blips[1][0], snd.blips[1][1]); + + /* Initialize CDD core */ + cdd_init(snd.blips[2][0], snd.blips[2][1]); + } + + /* Set audio enable flag */ + snd.enabled = 1; + + /* Reset audio */ + audio_reset(); + + return (0); +} + +void audio_reset(void) +{ + int i,j; + + /* Clear blip buffers */ + for (i=0; i<3; i++) + { + for (j=0; j<2; j++) + { + if (snd.blips[i][j]) + { + blip_clear(snd.blips[i][j]); + } + } + } + + /* Low-Pass filter */ + llp = 0; + rrp = 0; + + /* 3 band EQ */ + audio_set_equalizer(); +} + +void audio_set_equalizer(void) +{ + init_3band_state(&eq,config.low_freq,config.high_freq,snd.sample_rate); + eq.lg = (double)(config.lg) / 100.0; + eq.mg = (double)(config.mg) / 100.0; + eq.hg = (double)(config.hg) / 100.0; +} + +void audio_shutdown(void) +{ + int i,j; + + /* Delete blip buffers */ + for (i=0; i<3; i++) + { + for (j=0; j<2; j++) + { + blip_delete(snd.blips[i][j]); + snd.blips[i][j] = 0; + } + } +} + +int audio_update(int16 *buffer) +{ + /* run sound chips until end of frame */ + int size = sound_update(mcycles_vdp); + + /* Mega CD specific */ + if (system_hw == SYSTEM_MCD) + { + /* sync PCM chip with other sound chips */ + pcm_update(size); + + /* read CDDA samples */ + cdd_read_audio(size); + } + +#ifdef ALIGN_SND + /* return an aligned number of samples if required */ + size &= ALIGN_SND; +#endif + + /* resample FM & PSG mixed stream to output buffer */ +#ifdef LSB_FIRST + blip_read_samples(snd.blips[0][0], buffer, size); + blip_read_samples(snd.blips[0][1], buffer + 1, size); +#else + blip_read_samples(snd.blips[0][0], buffer + 1, size); + blip_read_samples(snd.blips[0][1], buffer, size); +#endif + + /* Mega CD specific */ + if (system_hw == SYSTEM_MCD) + { + /* resample PCM & CD-DA streams to output buffer */ +#ifdef LSB_FIRST + blip_mix_samples(snd.blips[1][0], buffer, size); + blip_mix_samples(snd.blips[1][1], buffer + 1, size); + blip_mix_samples(snd.blips[2][0], buffer, size); + blip_mix_samples(snd.blips[2][1], buffer + 1, size); +#else + blip_mix_samples(snd.blips[1][0], buffer + 1, size); + blip_mix_samples(snd.blips[1][1], buffer, size); + blip_mix_samples(snd.blips[2][0], buffer + 1, size); + blip_mix_samples(snd.blips[2][1], buffer, size); +#endif + } + + /* Audio filtering */ + if (config.filter) + { + int samples = size; + int16 *out = buffer; + int32 l, r; + + if (config.filter & 1) + { + /* single-pole low-pass filter (6 dB/octave) */ + uint32 factora = config.lp_range; + uint32 factorb = 0x10000 - factora; + + /* restore previous sample */ + l = llp; + r = rrp; + + do + { + /* apply low-pass filter */ + l = l*factora + out[0]*factorb; + r = r*factora + out[1]*factorb; + + /* 16.16 fixed point */ + l >>= 16; + r >>= 16; + + /* update sound buffer */ + *out++ = l; + *out++ = r; + } + while (--samples); + + /* save last samples for next frame */ + llp = l; + rrp = r; + } + else if (config.filter & 2) + { + do + { + /* 3 Band EQ */ + l = do_3band(&eq,out[0]); + r = do_3band(&eq,out[1]); + + /* clipping (16-bit samples) */ + if (l > 32767) l = 32767; + else if (l < -32768) l = -32768; + if (r > 32767) r = 32767; + else if (r < -32768) r = -32768; + + /* update sound buffer */ + *out++ = l; + *out++ = r; + } + while (--samples); + } + } + + /* Mono output mixing */ + if (config.mono) + { + int16 out; + int samples = size; + do + { + out = (buffer[0] + buffer[1]) / 2; + *buffer++ = out; + *buffer++ = out; + } + while (--samples); + } + +#ifdef LOGSOUND + error("%d samples returned\n\n",size); +#endif + + return size; +} + +/**************************************************************** + * Virtual System emulation + ****************************************************************/ +void system_init(void) +{ + gen_init(); + io_init(); + vdp_init(); + render_init(); + sound_init(); +} + +void system_reset(void) +{ + gen_reset(1); + io_reset(); + render_reset(); + vdp_reset(); + sound_reset(); + audio_reset(); +} + +void system_frame_gen(int do_skip) +{ + /* line counters */ + int start, end, line = 0; + + /* Z80 interrupt flag */ + int zirq = 1; + + /* reload H Counter */ + int h_counter = reg[10]; + + /* reset frame cycle counter */ + mcycles_vdp = 0; + + /* reload V Counter */ + v_counter = lines_per_frame - 1; + + /* reset VDP FIFO */ + fifo_write_cnt = 0; + fifo_slots = 0; + + /* update 6-Buttons & Lightguns */ + input_refresh(); + + /* display changed during VBLANK */ + if (bitmap.viewport.changed & 2) + { + /* interlaced modes */ + int old_interlaced = interlaced; + interlaced = (reg[12] & 0x02) >> 1; + + if (old_interlaced != interlaced) + { + /* double resolution mode */ + im2_flag = ((reg[12] & 0x06) == 0x06); + + /* reset field status flag */ + odd_frame = 1; + + /* video mode has changed */ + bitmap.viewport.changed = 5; + + /* update rendering mode */ + if (reg[1] & 0x04) + { + if (im2_flag) + { + render_bg = (reg[11] & 0x04) ? render_bg_m5_im2_vs : render_bg_m5_im2; + render_obj = (reg[12] & 0x08) ? render_obj_m5_im2_ste : render_obj_m5_im2; + } + else + { + render_bg = (reg[11] & 0x04) ? render_bg_m5_vs : render_bg_m5; + render_obj = (reg[12] & 0x08) ? render_obj_m5_ste : render_obj_m5; + } + } + } + else + { + /* clear flag */ + bitmap.viewport.changed &= ~2; + } + + /* active screen height */ + if (reg[1] & 0x04) + { + /* Mode 5 */ + if (reg[1] & 0x08) + { + /* 240 active lines */ + bitmap.viewport.h = 240; + bitmap.viewport.y = (config.overscan & 1) * 24 * vdp_pal; + } + else + { + /* 224 active lines */ + bitmap.viewport.h = 224; + bitmap.viewport.y = (config.overscan & 1) * (8 + (24 * vdp_pal)); + } + } + else + { + /* Mode 4 (192 active lines) */ + bitmap.viewport.h = 192; + bitmap.viewport.y = (config.overscan & 1) * 24 * (vdp_pal + 1); + } + + /* active screen width */ + bitmap.viewport.w = 256 + ((reg[12] & 0x01) << 6); + } + + /* clear VBLANK, DMA, FIFO FULL & field flags */ + status &= 0xFEE5; + + /* set FIFO EMPTY flag */ + status |= 0x0200; + + /* even/odd field flag (interlaced modes only) */ + odd_frame ^= 1; + if (interlaced) + { + status |= (odd_frame << 4); + } + + /* update VDP DMA */ + if (dma_length) + { + vdp_dma_update(0); + } + + /* render last line of overscan */ + if (bitmap.viewport.y > 0) + { + blank_line(v_counter, -bitmap.viewport.x, bitmap.viewport.w + 2*bitmap.viewport.x); + } + + /* parse first line of sprites */ + if (reg[1] & 0x40) + { + parse_satb(-1); + } + + /* run 68k & Z80 */ + m68k_run(MCYCLES_PER_LINE); + if (zstate == 1) + { + z80_run(MCYCLES_PER_LINE); + } + else + { + Z80.cycles = MCYCLES_PER_LINE; + } + + /* run SVP chip */ + if (svp) + { + ssp1601_run(SVP_cycles); + } + + /* update line cycle count */ + mcycles_vdp += MCYCLES_PER_LINE; + + /* Active Display */ + do + { + /* update V Counter */ + v_counter = line; + + /* update 6-Buttons & Lightguns */ + input_refresh(); + + /* H Interrupt */ + if(--h_counter < 0) + { + /* reload H Counter */ + h_counter = reg[10]; + + /* interrupt level 4 */ + hint_pending = 0x10; + if (reg[0] & 0x10) + { + m68k_update_irq(4); + } + } + + /* update VDP DMA */ + if (dma_length) + { + vdp_dma_update(mcycles_vdp); + } + + /* render scanline */ + if (!do_skip) + { + render_line(line); + } + + /* run 68k & Z80 */ + m68k_run(mcycles_vdp + MCYCLES_PER_LINE); + if (zstate == 1) + { + z80_run(mcycles_vdp + MCYCLES_PER_LINE); + } + else + { + Z80.cycles = mcycles_vdp + MCYCLES_PER_LINE; + } + + /* run SVP chip */ + if (svp) + { + ssp1601_run(SVP_cycles); + } + + /* update line cycle count */ + mcycles_vdp += MCYCLES_PER_LINE; + } + while (++line < bitmap.viewport.h); + + /* end of active display */ + v_counter = line; + + /* set VBLANK flag */ + status |= 0x08; + + /* overscan area */ + start = lines_per_frame - bitmap.viewport.y; + end = bitmap.viewport.h + bitmap.viewport.y; + + /* check viewport changes */ + if ((bitmap.viewport.w != bitmap.viewport.ow) || (bitmap.viewport.h != bitmap.viewport.oh)) + { + bitmap.viewport.ow = bitmap.viewport.w; + bitmap.viewport.oh = bitmap.viewport.h; + bitmap.viewport.changed |= 1; + } + + /* update 6-Buttons & Lightguns */ + input_refresh(); + + /* H Interrupt */ + if(--h_counter < 0) + { + /* reload H Counter */ + h_counter = reg[10]; + + /* interrupt level 4 */ + hint_pending = 0x10; + if (reg[0] & 0x10) + { + m68k_update_irq(4); + } + } + + /* update VDP DMA */ + if (dma_length) + { + vdp_dma_update(mcycles_vdp); + } + + /* render overscan */ + if (line < end) + { + blank_line(line, -bitmap.viewport.x, bitmap.viewport.w + 2*bitmap.viewport.x); + } + + /* update inputs before VINT (Warriors of Eternal Sun) */ + osd_input_update(); + + /* delay between VINT flag & V Interrupt (Ex-Mutants, Tyrant) */ + m68k_run(mcycles_vdp + 588); + status |= 0x80; + + /* delay between VBLANK flag & V Interrupt (Dracula, OutRunners, VR Troopers) */ + m68k_run(mcycles_vdp + 788); + if (zstate == 1) + { + z80_run(mcycles_vdp + 788); + } + else + { + Z80.cycles = mcycles_vdp + 788; + } + + /* V Interrupt */ + vint_pending = 0x20; + if (reg[1] & 0x20) + { + m68k_set_irq(6); + } + + /* assert Z80 interrupt */ + Z80.irq_state = ASSERT_LINE; + + /* run 68k & Z80 until end of line */ + m68k_run(mcycles_vdp + MCYCLES_PER_LINE); + if (zstate == 1) + { + z80_run(mcycles_vdp + MCYCLES_PER_LINE); + } + else + { + Z80.cycles = mcycles_vdp + MCYCLES_PER_LINE; + } + + /* run SVP chip */ + if (svp) + { + ssp1601_run(SVP_cycles); + } + + /* update line cycle count */ + mcycles_vdp += MCYCLES_PER_LINE; + + /* increment line count */ + line++; + + /* Vertical Blanking */ + do + { + /* update V Counter */ + v_counter = line; + + /* update 6-Buttons & Lightguns */ + input_refresh(); + + /* render overscan */ + if ((line < end) || (line >= start)) + { + blank_line(line, -bitmap.viewport.x, bitmap.viewport.w + 2*bitmap.viewport.x); + } + + if (zirq) + { + /* Z80 interrupt is asserted exactly for one line */ + m68k_run(mcycles_vdp + 788); + if (zstate == 1) + { + z80_run(mcycles_vdp + 788); + } + else + { + Z80.cycles = mcycles_vdp + 788; + } + + /* clear Z80 interrupt */ + Z80.irq_state = CLEAR_LINE; + zirq = 0; + } + + /* run 68k & Z80 */ + m68k_run(mcycles_vdp + MCYCLES_PER_LINE); + if (zstate == 1) + { + z80_run(mcycles_vdp + MCYCLES_PER_LINE); + } + else + { + Z80.cycles = mcycles_vdp + MCYCLES_PER_LINE; + } + + /* run SVP chip */ + if (svp) + { + ssp1601_run(SVP_cycles); + } + + /* update line cycle count */ + mcycles_vdp += MCYCLES_PER_LINE; + } + while (++line < (lines_per_frame - 1)); + + /* adjust CPU cycle counters for next frame */ + m68k.cycles -= mcycles_vdp; + Z80.cycles -= mcycles_vdp; +} + +void system_frame_scd(int do_skip) +{ + /* line counters */ + int start, end, line = 0; + + /* Z80 interrupt flag */ + int zirq = 1; + + /* reload H Counter */ + int h_counter = reg[10]; + + /* reset frame cycle counters */ + mcycles_vdp = 0; + scd.cycles = 0; + + /* reload V Counter */ + v_counter = lines_per_frame - 1; + + /* reset VDP FIFO */ + fifo_write_cnt = 0; + fifo_slots = 0; + + /* update 6-Buttons & Lightguns */ + input_refresh(); + + /* display changed during VBLANK */ + if (bitmap.viewport.changed & 2) + { + /* interlaced modes */ + int old_interlaced = interlaced; + interlaced = (reg[12] & 0x02) >> 1; + + if (old_interlaced != interlaced) + { + /* double resolution mode */ + im2_flag = ((reg[12] & 0x06) == 0x06); + + /* reset field status flag */ + odd_frame = 1; + + /* video mode has changed */ + bitmap.viewport.changed = 5; + + /* update rendering mode */ + if (reg[1] & 0x04) + { + if (im2_flag) + { + render_bg = (reg[11] & 0x04) ? render_bg_m5_im2_vs : render_bg_m5_im2; + render_obj = (reg[12] & 0x08) ? render_obj_m5_im2_ste : render_obj_m5_im2; + } + else + { + render_bg = (reg[11] & 0x04) ? render_bg_m5_vs : render_bg_m5; + render_obj = (reg[12] & 0x08) ? render_obj_m5_ste : render_obj_m5; + } + } + } + else + { + /* clear flag */ + bitmap.viewport.changed &= ~2; + } + + /* active screen height */ + if (reg[1] & 0x04) + { + bitmap.viewport.h = 224 + ((reg[1] & 0x08) << 1); + bitmap.viewport.y = (config.overscan & 1) * ((240 + 48*vdp_pal - bitmap.viewport.h) >> 1); + } + else + { + bitmap.viewport.h = 192; + bitmap.viewport.y = (config.overscan & 1) * 24 * (vdp_pal + 1); + } + + /* active screen width */ + bitmap.viewport.w = 256 + ((reg[12] & 0x01) << 6); + } + + /* clear VBLANK, DMA, FIFO FULL & field flags */ + status &= 0xFEE5; + + /* set FIFO EMPTY flag */ + status |= 0x0200; + + /* even/odd field flag (interlaced modes only) */ + odd_frame ^= 1; + if (interlaced) + { + status |= (odd_frame << 4); + } + + /* update VDP DMA */ + if (dma_length) + { + vdp_dma_update(0); + } + + /* render last line of overscan */ + if (bitmap.viewport.y > 0) + { + blank_line(v_counter, -bitmap.viewport.x, bitmap.viewport.w + 2*bitmap.viewport.x); + } + + /* parse first line of sprites */ + if (reg[1] & 0x40) + { + parse_satb(-1); + } + + /* run both 68k & CD hardware */ + scd_update(MCYCLES_PER_LINE); + + /* run Z80 */ + if (zstate == 1) + { + z80_run(MCYCLES_PER_LINE); + } + else + { + Z80.cycles = MCYCLES_PER_LINE; + } + + /* update line cycle count */ + mcycles_vdp += MCYCLES_PER_LINE; + + /* Active Display */ + do + { + /* update V Counter */ + v_counter = line; + + /* update 6-Buttons & Lightguns */ + input_refresh(); + + /* H Interrupt */ + if(--h_counter < 0) + { + /* reload H Counter */ + h_counter = reg[10]; + + /* interrupt level 4 */ + hint_pending = 0x10; + if (reg[0] & 0x10) + { + m68k_update_irq(4); + } + } + + /* update VDP DMA */ + if (dma_length) + { + vdp_dma_update(mcycles_vdp); + } + + /* render scanline */ + if (!do_skip) + { + render_line(line); + } + + /* run both 68k & CD hardware */ + scd_update(mcycles_vdp + MCYCLES_PER_LINE); + + /* run Z80 */ + if (zstate == 1) + { + z80_run(mcycles_vdp + MCYCLES_PER_LINE); + } + else + { + Z80.cycles = mcycles_vdp + MCYCLES_PER_LINE; + } + + /* update line cycle count */ + mcycles_vdp += MCYCLES_PER_LINE; + } + while (++line < bitmap.viewport.h); + + /* end of active display */ + v_counter = line; + + /* set VBLANK flag */ + status |= 0x08; + + /* overscan area */ + start = lines_per_frame - bitmap.viewport.y; + end = bitmap.viewport.h + bitmap.viewport.y; + + /* check viewport changes */ + if ((bitmap.viewport.w != bitmap.viewport.ow) || (bitmap.viewport.h != bitmap.viewport.oh)) + { + bitmap.viewport.ow = bitmap.viewport.w; + bitmap.viewport.oh = bitmap.viewport.h; + bitmap.viewport.changed |= 1; + } + + /* update 6-Buttons & Lightguns */ + input_refresh(); + + /* H Interrupt */ + if(--h_counter < 0) + { + /* reload H Counter */ + h_counter = reg[10]; + + /* interrupt level 4 */ + hint_pending = 0x10; + if (reg[0] & 0x10) + { + m68k_update_irq(4); + } + } + + /* update VDP DMA */ + if (dma_length) + { + vdp_dma_update(mcycles_vdp); + } + + /* render overscan */ + if (line < end) + { + blank_line(line, -bitmap.viewport.x, bitmap.viewport.w + 2*bitmap.viewport.x); + } + + /* update inputs before VINT (Warriors of Eternal Sun) */ + osd_input_update(); + + /* delay between VINT flag & V Interrupt (Ex-Mutants, Tyrant) */ + m68k_run(mcycles_vdp + 588); + status |= 0x80; + + /* delay between VBLANK flag & V Interrupt (Dracula, OutRunners, VR Troopers) */ + m68k_run(mcycles_vdp + 788); + if (zstate == 1) + { + z80_run(mcycles_vdp + 788); + } + else + { + Z80.cycles = mcycles_vdp + 788; + } + + /* V Interrupt */ + vint_pending = 0x20; + if (reg[1] & 0x20) + { + m68k_set_irq(6); + } + + /* assert Z80 interrupt */ + Z80.irq_state = ASSERT_LINE; + + /* run both 68k & CD hardware */ + scd_update(mcycles_vdp + MCYCLES_PER_LINE); + + /* run Z80 until end of line */ + if (zstate == 1) + { + z80_run(mcycles_vdp + MCYCLES_PER_LINE); + } + else + { + Z80.cycles = mcycles_vdp + MCYCLES_PER_LINE; + } + + /* update line cycle count */ + mcycles_vdp += MCYCLES_PER_LINE; + + /* increment line count */ + line++; + + /* Vertical Blanking */ + do + { + /* update V Counter */ + v_counter = line; + + /* update 6-Buttons & Lightguns */ + input_refresh(); + + /* render overscan */ + if ((line < end) || (line >= start)) + { + blank_line(line, -bitmap.viewport.x, bitmap.viewport.w + 2*bitmap.viewport.x); + } + + if (zirq) + { + /* Z80 interrupt is asserted exactly for one line */ + m68k_run(mcycles_vdp + 788); + if (zstate == 1) + { + z80_run(mcycles_vdp + 788); + } + else + { + Z80.cycles = mcycles_vdp + 788; + } + + /* clear Z80 interrupt */ + Z80.irq_state = CLEAR_LINE; + zirq = 0; + } + + /* run both 68k & CD hardware */ + scd_update(mcycles_vdp + MCYCLES_PER_LINE); + + /* run Z80 */ + if (zstate == 1) + { + z80_run(mcycles_vdp + MCYCLES_PER_LINE); + } + else + { + Z80.cycles = mcycles_vdp + MCYCLES_PER_LINE; + } + + /* update line cycle count */ + mcycles_vdp += MCYCLES_PER_LINE; + } + while (++line < (lines_per_frame - 1)); + + /* prepare for next SCD frame */ + scd_end_frame(scd.cycles); + + /* adjust CPU cycle counters for next frame */ + Z80.cycles -= mcycles_vdp; + m68k.cycles -= mcycles_vdp; +} + +void system_frame_sms(int do_skip) +{ + /* line counter */ + int start, end, line = 0; + + /* reload H Counter */ + int h_counter = reg[10]; + + /* reset line master cycle count */ + mcycles_vdp = 0; + + /* reload V Counter */ + v_counter = lines_per_frame - 1; + + /* reset VDP FIFO */ + fifo_write_cnt = 0; + fifo_slots = 0; + + /* update 6-Buttons & Lightguns */ + input_refresh(); + + /* display changed during VBLANK */ + if (bitmap.viewport.changed & 2) + { + bitmap.viewport.changed &= ~2; + + if (system_hw & SYSTEM_MD) + { + /* interlaced mode */ + int old_interlaced = interlaced; + interlaced = (reg[12] & 0x02) >> 1; + if (old_interlaced != interlaced) + { + im2_flag = ((reg[12] & 0x06) == 0x06); + odd_frame = 1; + bitmap.viewport.changed = 5; + + /* update rendering mode */ + if (reg[1] & 0x04) + { + if (im2_flag) + { + render_bg = (reg[11] & 0x04) ? render_bg_m5_im2_vs : render_bg_m5_im2; + render_obj = render_obj_m5_im2; + + } + else + { + render_bg = (reg[11] & 0x04) ? render_bg_m5_vs : render_bg_m5; + render_obj = render_obj_m5; + } + } + } + + /* active screen height */ + if (reg[1] & 0x04) + { + bitmap.viewport.h = 224 + ((reg[1] & 0x08) << 1); + bitmap.viewport.y = (config.overscan & 1) * ((240 + 48*vdp_pal - bitmap.viewport.h) >> 1); + } + else + { + bitmap.viewport.h = 192; + bitmap.viewport.y = (config.overscan & 1) * 24 * (vdp_pal + 1); + } + + /* active screen width */ + bitmap.viewport.w = 256 + ((reg[12] & 0x01) << 6); + } + else + { + /* check for VDP extended modes */ + int mode = (reg[0] & 0x06) | (reg[1] & 0x18); + + /* update active height */ + if (mode == 0x0E) + { + bitmap.viewport.h = 240; + } + else if (mode == 0x16) + { + bitmap.viewport.h = 224; + } + else + { + bitmap.viewport.h = 192; + } + + /* update vertical overscan */ + if (config.overscan & 1) + { + bitmap.viewport.y = (240 + 48*vdp_pal - bitmap.viewport.h) >> 1; + } + else + { + if ((system_hw == SYSTEM_GG) && !config.gg_extra) + { + /* Display area reduced to 160x144 */ + bitmap.viewport.y = (144 - bitmap.viewport.h) / 2; + } + else + { + bitmap.viewport.y = 0; + } + } + } + } + + /* Detect pause button input (in Game Gear Mode, NMI is not generated) */ + if (system_hw != SYSTEM_GG) + { + if (input.pad[0] & INPUT_START) + { + /* NMI is edge-triggered */ + if (!pause_b) + { + pause_b = 1; + z80_set_nmi_line(ASSERT_LINE); + z80_set_nmi_line(CLEAR_LINE); + } + } + else + { + pause_b = 0; + } + } + + /* 3-D glasses faking: skip rendering of left lens frame */ + do_skip |= (work_ram[0x1ffb] & cart.special & HW_3D_GLASSES); + + /* Mega Drive VDP specific */ + if (system_hw & SYSTEM_MD) + { + /* clear VBLANK, DMA & field flags */ + status &= 0xE5; + + /* even/odd field flag (interlaced modes only) */ + odd_frame ^= 1; + if (interlaced) + { + status |= (odd_frame << 4); + } + + /* update VDP DMA */ + if (dma_length) + { + vdp_dma_update(0); + } + } + + /* Master System & Game Gear VDP specific */ + if (system_hw < SYSTEM_MD) + { + /* Sprites are still processed during vertical borders */ + if (reg[1] & 0x40) + { + render_obj(1); + } + } + + /* render last line of overscan */ + if (bitmap.viewport.y > 0) + { + blank_line(v_counter, -bitmap.viewport.x, bitmap.viewport.w + 2*bitmap.viewport.x); + } + + /* parse first line of sprites (on Master System VDP, pre-processing still occurs when display is disabled) */ + if ((reg[1] & 0x40) || (system_hw < SYSTEM_MD)) + { + parse_satb(-1); + } + + /* run Z80 */ + z80_run(MCYCLES_PER_LINE); + + /* update line cycle count */ + mcycles_vdp += MCYCLES_PER_LINE; + + /* latch Vertical Scroll register */ + vscroll = reg[0x09]; + + /* Active Display */ + do + { + /* update VDP DMA (Mega Drive VDP specific) */ + if (dma_length) + { + vdp_dma_update(mcycles_vdp); + } + + /* make sure we didn't already render that line */ + if (v_counter != line) + { + /* update V Counter */ + v_counter = line; + + /* render scanline */ + if (!do_skip) + { + render_line(line); + } + } + + /* update 6-Buttons & Lightguns */ + input_refresh(); + + /* H Interrupt */ + if(--h_counter < 0) + { + /* reload H Counter */ + h_counter = reg[10]; + + /* interrupt level 4 */ + hint_pending = 0x10; + if (reg[0] & 0x10) + { + /* cycle-accurate HINT */ + /* IRQ line is latched between instructions, during instruction last cycle. */ + /* This means that if Z80 cycle count is exactly a multiple of MCYCLES_PER_LINE, */ + /* interrupt should be triggered AFTER the next instruction. */ + if ((Z80.cycles % MCYCLES_PER_LINE) == 0) + { + z80_run(Z80.cycles + 1); + } + + Z80.irq_state = ASSERT_LINE; + } + } + + /* run Z80 */ + z80_run(mcycles_vdp + MCYCLES_PER_LINE); + + /* update line cycle count */ + mcycles_vdp += MCYCLES_PER_LINE; + } + while (++line < bitmap.viewport.h); + + /* end of active display */ + v_counter = line; + + /* Mega Drive VDP specific */ + if (system_hw & SYSTEM_MD) + { + /* set VBLANK flag */ + status |= 0x08; + } + + /* overscan area */ + start = lines_per_frame - bitmap.viewport.y; + end = bitmap.viewport.h + bitmap.viewport.y; + + /* check viewport changes */ + if ((bitmap.viewport.w != bitmap.viewport.ow) || (bitmap.viewport.h != bitmap.viewport.oh)) + { + bitmap.viewport.ow = bitmap.viewport.w; + bitmap.viewport.oh = bitmap.viewport.h; + bitmap.viewport.changed |= 1; + } + + /* update 6-Buttons & Lightguns */ + input_refresh(); + + /* H Interrupt */ + if(--h_counter < 0) + { + /* reload H Counter */ + h_counter = reg[10]; + + /* interrupt level 4 */ + hint_pending = 0x10; + if (reg[0] & 0x10) + { + /* cycle-accurate HINT */ + if ((Z80.cycles % MCYCLES_PER_LINE) == 0) + { + z80_run(Z80.cycles + 1); + } + + Z80.irq_state = ASSERT_LINE; + } + } + + /* update VDP DMA (Mega Drive VDP specific) */ + if (dma_length) + { + vdp_dma_update(mcycles_vdp); + } + + /* render overscan */ + if (line < end) + { + blank_line(line, -bitmap.viewport.x, bitmap.viewport.w + 2*bitmap.viewport.x); + } + + /* update inputs before VINT */ + osd_input_update(); + + /* run Z80 until end of line */ + z80_run(mcycles_vdp + MCYCLES_PER_LINE); + + /* make sure VINT flag was not cleared by last instruction */ + if (v_counter == line) + { + /* Set VINT flag */ + status |= 0x80; + + /* V Interrupt */ + vint_pending = 0x20; + if (reg[1] & 0x20) + { + Z80.irq_state = ASSERT_LINE; + } + } + + /* update line cycle count */ + mcycles_vdp += MCYCLES_PER_LINE; + + /* increment line count */ + line++; + + /* Vertical Blanking */ + do + { + /* update V Counter */ + v_counter = line; + + /* update 6-Buttons & Lightguns */ + input_refresh(); + + /* Master System & Game Gear VDP specific */ + if ((system_hw < SYSTEM_MD) && (line > (lines_per_frame - 16))) + { + /* Sprites are still processed during top border */ + render_obj((line - lines_per_frame) & 1); + parse_satb(line - lines_per_frame); + } + + /* render overscan */ + if ((line < end) || (line >= start)) + { + blank_line(line, -bitmap.viewport.x, bitmap.viewport.w + 2*bitmap.viewport.x); + } + + /* run Z80 */ + z80_run(mcycles_vdp + MCYCLES_PER_LINE); + + /* update line cycle count */ + mcycles_vdp += MCYCLES_PER_LINE; + } + while (++line < (lines_per_frame - 1)); + + /* adjust Z80 cycle count for next frame */ + Z80.cycles -= mcycles_vdp; +} diff --git a/genplus-gx/core/system.h b/genplus-gx/core/system.h new file mode 100644 index 0000000000..b679421f97 --- /dev/null +++ b/genplus-gx/core/system.h @@ -0,0 +1,119 @@ +/*************************************************************************************** + * Genesis Plus + * Virtual System emulation + * + * Support for "Genesis", "Genesis + CD" & "Master System" modes + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code) + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _SYSTEM_H_ +#define _SYSTEM_H_ + +#include "blip_buf.h" + +/* Supported hardware models */ +#define SYSTEM_SG 0x10 +#define SYSTEM_MARKIII 0x11 +#define SYSTEM_SMS 0x20 +#define SYSTEM_SMS2 0x21 +#define SYSTEM_GG 0x40 +#define SYSTEM_GGMS 0x41 +#define SYSTEM_MD 0x80 +#define SYSTEM_PBC 0x81 +#define SYSTEM_PICO 0x82 +#define SYSTEM_MCD 0x84 + +/* NTSC & PAL Master Clock frequencies */ +#define MCLOCK_NTSC 53693175 +#define MCLOCK_PAL 53203424 + +/* Number of M-Cycles executed per line */ +#define MCYCLES_PER_LINE 3420 + +/* Horizontal timing offsets when running in Z80 mode */ +#define SMS_CYCLE_OFFSET 530 +#define PBC_CYCLE_OFFSET 560 + +typedef struct +{ + uint8 *data; /* Bitmap data */ + int width; /* Bitmap width */ + int height; /* Bitmap height */ + int pitch; /* Bitmap pitch */ + struct + { + int x; /* X offset of viewport within bitmap */ + int y; /* Y offset of viewport within bitmap */ + int w; /* Width of viewport */ + int h; /* Height of viewport */ + int ow; /* Previous width of viewport */ + int oh; /* Previous height of viewport */ + int changed; /* 1= Viewport width or height have changed */ + } viewport; +} t_bitmap; + +typedef struct +{ + int sample_rate; /* Output Sample rate (8000-48000) */ + double frame_rate; /* Output Frame rate (usually 50 or 60 frames per second) */ + int enabled; /* 1= sound emulation is enabled */ + blip_t* blips[3][2]; /* Blip Buffer resampling */ +} t_snd; + + +/* Global variables */ +extern t_bitmap bitmap; +extern t_snd snd; +extern uint32 mcycles_vdp; +extern int16 SVP_cycles; +extern uint8 system_hw; +extern uint8 system_bios; +extern uint32 system_clock; + +/* Function prototypes */ +extern int audio_init(int samplerate, double framerate); +extern void audio_reset(void); +extern void audio_shutdown(void); +extern int audio_update(int16 *buffer); +extern void audio_set_equalizer(void); +extern void system_init(void); +extern void system_reset(void); +extern void system_frame_gen(int do_skip); +extern void system_frame_scd(int do_skip); +extern void system_frame_sms(int do_skip); + +#endif /* _SYSTEM_H_ */ + diff --git a/genplus-gx/core/tremor/CHANGELOG b/genplus-gx/core/tremor/CHANGELOG new file mode 100644 index 0000000000..53f23351e2 --- /dev/null +++ b/genplus-gx/core/tremor/CHANGELOG @@ -0,0 +1,19 @@ +*** 20020517: 1.0.2 *** + + Playback bugfix to floor1; mode mistakenly used for sizing instead + of blockflag + +*** 20020515: 1.0.1 *** + + Added complete API documentation to source tarball. No code + changes. + +*** 20020412: 1.0.1 *** + + Fixed a clipping bug that affected ARM processors; negative + overflows were being properly clipped, but then clobbered to + positive by the positive overflow chec (asm_arm.h:CLIP_TO_15) + +*** 20020403: 1.0.0 *** + + Initial version \ No newline at end of file diff --git a/genplus-gx/core/tremor/COPYING b/genplus-gx/core/tremor/COPYING new file mode 100644 index 0000000000..6111c6c5a6 --- /dev/null +++ b/genplus-gx/core/tremor/COPYING @@ -0,0 +1,28 @@ +Copyright (c) 2002, Xiph.org Foundation + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions +are met: + +- Redistributions of source code must retain the above copyright +notice, this list of conditions and the following disclaimer. + +- Redistributions in binary form must reproduce the above copyright +notice, this list of conditions and the following disclaimer in the +documentation and/or other materials provided with the distribution. + +- Neither the name of the Xiph.org Foundation nor the names of its +contributors may be used to endorse or promote products derived from +this software without specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION +OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. diff --git a/genplus-gx/core/tremor/README b/genplus-gx/core/tremor/README new file mode 100644 index 0000000000..1321175322 --- /dev/null +++ b/genplus-gx/core/tremor/README @@ -0,0 +1,46 @@ +This README covers the Ogg Vorbis 'Tremor' integer playback codec +source as of date 2002 09 02, version 1.0.0. + + ****** + +The C source in this package will build on any ANSI C compiler and +function completely and properly on any platform. The included build +system assumes GNU build system and make tools (m4, automake, +autoconf, libtool and gmake). GCC is not required, although GCC is +the most tested compiler. To build using GNU tools, type in the +source directory: + +./autogen.sh +make + +Currently, the source implements playback in pure C on all platforms +except ARM, where a [currently] small amount of assembly (see +asm_arm.h) is used to implement 64 bit math operations and fast LSP +computation. If building on ARM without the benefit of GNU build +system tools, be sure that '_ARM_ASSEM_' is #defined by the build +system if this assembly is desired, else the resulting library will +use whatever 64 bit math builtins the compiler implements. + +No math library is required by this source. No floating point +operations are used at any point in either setup or decode. This +decoder library will properly decode any past, current or future +Vorbis I file or stream. + + ******** + +The build system produces a static and [when supported by the OS] +dynamic library named 'libvorbisidec'. This library exposes an API +nearly identical to the BSD reference library's 'libvorbisfile', +including all the features familiar to users of vorbisfile. This API +is similar enough that the proper header file to include is named +'ivorbisfile.h' [included in the source build directory]. Lower level +libvorbis-style headers and structures are in 'ivorbiscodec.h' +[included in the source build directory]. A simple example program, +ivorbisfile_example.c, can be built with 'make example'. + + ******** + +Detailed Tremor API Documentation begins at doc/index.html + +Monty +xiph.org diff --git a/genplus-gx/core/tremor/Version_script.in b/genplus-gx/core/tremor/Version_script.in new file mode 100644 index 0000000000..2eb1d87460 --- /dev/null +++ b/genplus-gx/core/tremor/Version_script.in @@ -0,0 +1,49 @@ +# +# Export file for libvorbisidec +# +# Only the symbols listed in the global section will be callable from +# applications linking to libvorbisidec. +# + +@PACKAGE@.so.1 +{ + global: + ov_clear; + ov_open; + ov_open_callbacks; + ov_test; + ov_test_callbacks; + ov_test_open; + ov_bitrate; + ov_bitrate_instant; + ov_streams; + ov_seekable; + ov_serialnumber; + ov_raw_total; + ov_pcm_total; + ov_time_total; + ov_raw_seek; + ov_pcm_seek; + ov_pcm_seek_page; + ov_time_seek; + ov_time_seek_page; + ov_raw_tell; + ov_pcm_tell; + ov_time_tell; + ov_info; + ov_comment; + ov_read; + + vorbis_info_init; + vorbis_info_clear; + vorbis_info_blocksize; + vorbis_comment_init; + vorbis_comment_add; + vorbis_comment_add_tag; + vorbis_comment_query; + vorbis_comment_query_count; + vorbis_comment_clear; + + local: + *; +}; diff --git a/genplus-gx/core/tremor/asm_arm.h b/genplus-gx/core/tremor/asm_arm.h new file mode 100644 index 0000000000..3a3716df1f --- /dev/null +++ b/genplus-gx/core/tremor/asm_arm.h @@ -0,0 +1,243 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: arm7 and later wide math functions + + ********************************************************************/ + +#ifdef _ARM_ASSEM_ + +#if !defined(_V_WIDE_MATH) && !defined(_LOW_ACCURACY_) +#define _V_WIDE_MATH + +static inline ogg_int32_t MULT32(ogg_int32_t x, ogg_int32_t y) { + int lo,hi; + asm volatile("smull\t%0, %1, %2, %3" + : "=&r"(lo),"=&r"(hi) + : "%r"(x),"r"(y) + : "cc"); + return(hi); +} + +static inline ogg_int32_t MULT31(ogg_int32_t x, ogg_int32_t y) { + return MULT32(x,y)<<1; +} + +static inline ogg_int32_t MULT31_SHIFT15(ogg_int32_t x, ogg_int32_t y) { + int lo,hi; + asm volatile("smull %0, %1, %2, %3\n\t" + "movs %0, %0, lsr #15\n\t" + "adc %1, %0, %1, lsl #17\n\t" + : "=&r"(lo),"=&r"(hi) + : "%r"(x),"r"(y) + : "cc"); + return(hi); +} + +#define MB() asm volatile ("" : : : "memory") + +static inline void XPROD32(ogg_int32_t a, ogg_int32_t b, + ogg_int32_t t, ogg_int32_t v, + ogg_int32_t *x, ogg_int32_t *y) +{ + int x1, y1, l; + asm( "smull %0, %1, %4, %6\n\t" + "smlal %0, %1, %5, %7\n\t" + "rsb %3, %4, #0\n\t" + "smull %0, %2, %5, %6\n\t" + "smlal %0, %2, %3, %7" + : "=&r" (l), "=&r" (x1), "=&r" (y1), "=r" (a) + : "3" (a), "r" (b), "r" (t), "r" (v) + : "cc" ); + *x = x1; + MB(); + *y = y1; +} + +static inline void XPROD31(ogg_int32_t a, ogg_int32_t b, + ogg_int32_t t, ogg_int32_t v, + ogg_int32_t *x, ogg_int32_t *y) +{ + int x1, y1, l; + asm( "smull %0, %1, %4, %6\n\t" + "smlal %0, %1, %5, %7\n\t" + "rsb %3, %4, #0\n\t" + "smull %0, %2, %5, %6\n\t" + "smlal %0, %2, %3, %7" + : "=&r" (l), "=&r" (x1), "=&r" (y1), "=r" (a) + : "3" (a), "r" (b), "r" (t), "r" (v) + : "cc" ); + *x = x1 << 1; + MB(); + *y = y1 << 1; +} + +static inline void XNPROD31(ogg_int32_t a, ogg_int32_t b, + ogg_int32_t t, ogg_int32_t v, + ogg_int32_t *x, ogg_int32_t *y) +{ + int x1, y1, l; + asm( "rsb %2, %4, #0\n\t" + "smull %0, %1, %3, %5\n\t" + "smlal %0, %1, %2, %6\n\t" + "smull %0, %2, %4, %5\n\t" + "smlal %0, %2, %3, %6" + : "=&r" (l), "=&r" (x1), "=&r" (y1) + : "r" (a), "r" (b), "r" (t), "r" (v) + : "cc" ); + *x = x1 << 1; + MB(); + *y = y1 << 1; +} + +#endif + +#ifndef _V_CLIP_MATH +#define _V_CLIP_MATH + +static inline ogg_int32_t CLIP_TO_15(ogg_int32_t x) { + int tmp; + asm volatile("subs %1, %0, #32768\n\t" + "movpl %0, #0x7f00\n\t" + "orrpl %0, %0, #0xff\n" + "adds %1, %0, #32768\n\t" + "movmi %0, #0x8000" + : "+r"(x),"=r"(tmp) + : + : "cc"); + return(x); +} + +#endif + +#ifndef _V_LSP_MATH_ASM +#define _V_LSP_MATH_ASM + +static inline void lsp_loop_asm(ogg_uint32_t *qip,ogg_uint32_t *pip, + ogg_int32_t *qexpp, + ogg_int32_t *ilsp,ogg_int32_t wi, + ogg_int32_t m){ + + ogg_uint32_t qi=*qip,pi=*pip; + ogg_int32_t qexp=*qexpp; + + asm("mov r0,%3;" + "mov r1,%5,asr#1;" + "add r0,r0,r1,lsl#3;" + "1:" + + "ldmdb r0!,{r1,r3};" + "subs r1,r1,%4;" //ilsp[j]-wi + "rsbmi r1,r1,#0;" //labs(ilsp[j]-wi) + "umull %0,r2,r1,%0;" //qi*=labs(ilsp[j]-wi) + + "subs r1,r3,%4;" //ilsp[j+1]-wi + "rsbmi r1,r1,#0;" //labs(ilsp[j+1]-wi) + "umull %1,r3,r1,%1;" //pi*=labs(ilsp[j+1]-wi) + + "cmn r2,r3;" // shift down 16? + "beq 0f;" + "add %2,%2,#16;" + "mov %0,%0,lsr #16;" + "orr %0,%0,r2,lsl #16;" + "mov %1,%1,lsr #16;" + "orr %1,%1,r3,lsl #16;" + "0:" + "cmp r0,%3;\n" + "bhi 1b;\n" + + // odd filter assymetry + "ands r0,%5,#1;\n" + "beq 2f;\n" + "add r0,%3,%5,lsl#2;\n" + + "ldr r1,[r0,#-4];\n" + "mov r0,#0x4000;\n" + + "subs r1,r1,%4;\n" //ilsp[j]-wi + "rsbmi r1,r1,#0;\n" //labs(ilsp[j]-wi) + "umull %0,r2,r1,%0;\n" //qi*=labs(ilsp[j]-wi) + "umull %1,r3,r0,%1;\n" //pi*=labs(ilsp[j+1]-wi) + + "cmn r2,r3;\n" // shift down 16? + "beq 2f;\n" + "add %2,%2,#16;\n" + "mov %0,%0,lsr #16;\n" + "orr %0,%0,r2,lsl #16;\n" + "mov %1,%1,lsr #16;\n" + "orr %1,%1,r3,lsl #16;\n" + + //qi=(pi>>shift)*labs(ilsp[j]-wi); + //pi=(qi>>shift)*labs(ilsp[j+1]-wi); + //qexp+=shift; + + //} + + /* normalize to max 16 sig figs */ + "2:" + "mov r2,#0;" + "orr r1,%0,%1;" + "tst r1,#0xff000000;" + "addne r2,r2,#8;" + "movne r1,r1,lsr #8;" + "tst r1,#0x00f00000;" + "addne r2,r2,#4;" + "movne r1,r1,lsr #4;" + "tst r1,#0x000c0000;" + "addne r2,r2,#2;" + "movne r1,r1,lsr #2;" + "tst r1,#0x00020000;" + "addne r2,r2,#1;" + "movne r1,r1,lsr #1;" + "tst r1,#0x00010000;" + "addne r2,r2,#1;" + "mov %0,%0,lsr r2;" + "mov %1,%1,lsr r2;" + "add %2,%2,r2;" + + : "+r"(qi),"+r"(pi),"+r"(qexp) + : "r"(ilsp),"r"(wi),"r"(m) + : "r0","r1","r2","r3","cc"); + + *qip=qi; + *pip=pi; + *qexpp=qexp; +} + +static inline void lsp_norm_asm(ogg_uint32_t *qip,ogg_int32_t *qexpp){ + + ogg_uint32_t qi=*qip; + ogg_int32_t qexp=*qexpp; + + asm("tst %0,#0x0000ff00;" + "moveq %0,%0,lsl #8;" + "subeq %1,%1,#8;" + "tst %0,#0x0000f000;" + "moveq %0,%0,lsl #4;" + "subeq %1,%1,#4;" + "tst %0,#0x0000c000;" + "moveq %0,%0,lsl #2;" + "subeq %1,%1,#2;" + "tst %0,#0x00008000;" + "moveq %0,%0,lsl #1;" + "subeq %1,%1,#1;" + : "+r"(qi),"+r"(qexp) + : + : "cc"); + *qip=qi; + *qexpp=qexp; +} + +#endif +#endif + diff --git a/genplus-gx/core/tremor/backends.h b/genplus-gx/core/tremor/backends.h new file mode 100644 index 0000000000..50c1c45cfd --- /dev/null +++ b/genplus-gx/core/tremor/backends.h @@ -0,0 +1,130 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: backend and mapping structures + + ********************************************************************/ + +/* this is exposed up here because we need it for static modes. + Lookups for each backend aren't exposed because there's no reason + to do so */ + +#ifndef _vorbis_backend_h_ +#define _vorbis_backend_h_ + +#include "codec_internal.h" + +/* this would all be simpler/shorter with templates, but.... */ +/* Transform backend generic *************************************/ + +/* only mdct right now. Flesh it out more if we ever transcend mdct + in the transform domain */ + +/* Floor backend generic *****************************************/ +typedef struct{ + vorbis_info_floor *(*unpack)(vorbis_info *,oggpack_buffer *); + vorbis_look_floor *(*look) (vorbis_dsp_state *,vorbis_info_mode *, + vorbis_info_floor *); + void (*free_info) (vorbis_info_floor *); + void (*free_look) (vorbis_look_floor *); + void *(*inverse1) (struct vorbis_block *,vorbis_look_floor *); + int (*inverse2) (struct vorbis_block *,vorbis_look_floor *, + void *buffer,ogg_int32_t *); +} vorbis_func_floor; + +typedef struct{ + int order; + long rate; + long barkmap; + + int ampbits; + int ampdB; + + int numbooks; /* <= 16 */ + int books[16]; + +} vorbis_info_floor0; + +#define VIF_POSIT 63 +#define VIF_CLASS 16 +#define VIF_PARTS 31 +typedef struct{ + int partitions; /* 0 to 31 */ + int partitionclass[VIF_PARTS]; /* 0 to 15 */ + + int class_dim[VIF_CLASS]; /* 1 to 8 */ + int class_subs[VIF_CLASS]; /* 0,1,2,3 (bits: 1< +#include +#include "ogg.h" + +static unsigned long mask[]= +{0x00000000,0x00000001,0x00000003,0x00000007,0x0000000f, + 0x0000001f,0x0000003f,0x0000007f,0x000000ff,0x000001ff, + 0x000003ff,0x000007ff,0x00000fff,0x00001fff,0x00003fff, + 0x00007fff,0x0000ffff,0x0001ffff,0x0003ffff,0x0007ffff, + 0x000fffff,0x001fffff,0x003fffff,0x007fffff,0x00ffffff, + 0x01ffffff,0x03ffffff,0x07ffffff,0x0fffffff,0x1fffffff, + 0x3fffffff,0x7fffffff,0xffffffff }; + +/* mark read process as having run off the end */ +static void _adv_halt(oggpack_buffer *b){ + b->headptr=b->head->buffer->data+b->head->begin+b->head->length; + b->headend=-1; + b->headbit=0; +} + +/* spans forward, skipping as many bytes as headend is negative; if + headend is zero, simply finds next byte. If we're up to the end + of the buffer, leaves headend at zero. If we've read past the end, + halt the decode process. */ +static void _span(oggpack_buffer *b){ + while(b->headend<1){ + if(b->head->next){ + b->count+=b->head->length; + b->head=b->head->next; + b->headptr=b->head->buffer->data+b->head->begin-b->headend; + b->headend+=b->head->length; + }else{ + /* we've either met the end of decode, or gone past it. halt + only if we're past */ + if(b->headend<0 || b->headbit) + /* read has fallen off the end */ + _adv_halt(b); + + break; + } + } +} + +void oggpack_readinit(oggpack_buffer *b,ogg_reference *r){ + memset(b,0,sizeof(*b)); + + b->tail=b->head=r; + b->count=0; + b->headptr=b->head->buffer->data+b->head->begin; + b->headend=b->head->length; + _span(b); +} + +#define _lookspan() while(!end){\ + head=head->next;\ + if(!head) return -1;\ + ptr=head->buffer->data + head->begin;\ + end=head->length;\ + } + +/* Read in bits without advancing the bitptr; bits <= 32 */ +long oggpack_look(oggpack_buffer *b,int bits){ + unsigned long m=mask[bits]; + unsigned long ret=-1; + + bits+=b->headbit; + + if(bits >= b->headend<<3){ + int end=b->headend; + unsigned char *ptr=b->headptr; + ogg_reference *head=b->head; + + if(end<0)return -1; + + if(bits){ + _lookspan(); + ret=*ptr++>>b->headbit; + if(bits>8){ + --end; + _lookspan(); + ret|=*ptr++<<(8-b->headbit); + if(bits>16){ + --end; + _lookspan(); + ret|=*ptr++<<(16-b->headbit); + if(bits>24){ + --end; + _lookspan(); + ret|=*ptr++<<(24-b->headbit); + if(bits>32 && b->headbit){ + --end; + _lookspan(); + ret|=*ptr<<(32-b->headbit); + } + } + } + } + } + + }else{ + + /* make this a switch jump-table */ + ret=b->headptr[0]>>b->headbit; + if(bits>8){ + ret|=b->headptr[1]<<(8-b->headbit); + if(bits>16){ + ret|=b->headptr[2]<<(16-b->headbit); + if(bits>24){ + ret|=b->headptr[3]<<(24-b->headbit); + if(bits>32 && b->headbit) + ret|=b->headptr[4]<<(32-b->headbit); + } + } + } + } + + ret&=m; + return ret; +} + +/* limited to 32 at a time */ +void oggpack_adv(oggpack_buffer *b,int bits){ + bits+=b->headbit; + b->headbit=bits&7; + b->headptr+=bits/8; + if((b->headend-=bits/8)<1)_span(b); +} + +/* spans forward and finds next byte. Never halts */ +static void _span_one(oggpack_buffer *b){ + while(b->headend<1){ + if(b->head->next){ + b->count+=b->head->length; + b->head=b->head->next; + b->headptr=b->head->buffer->data+b->head->begin; + b->headend=b->head->length; + }else + break; + } +} + +static int _halt_one(oggpack_buffer *b){ + if(b->headend<1){ + _adv_halt(b); + return -1; + } + return 0; +} + +int oggpack_eop(oggpack_buffer *b){ + if(b->headend<0)return -1; + return 0; +} + +/* bits <= 32 */ +long oggpack_read(oggpack_buffer *b,int bits){ + unsigned long m=mask[bits]; + ogg_uint32_t ret=-1; + + bits+=b->headbit; + + if(bits >= b->headend<<3){ + + if(b->headend<0)return -1; + + if(bits){ + if (_halt_one(b)) return -1; + ret=*b->headptr>>b->headbit; + + if(bits>=8){ + ++b->headptr; + --b->headend; + _span_one(b); + if(bits>8){ + if (_halt_one(b)) return -1; + ret|=*b->headptr<<(8-b->headbit); + + if(bits>=16){ + ++b->headptr; + --b->headend; + _span_one(b); + if(bits>16){ + if (_halt_one(b)) return -1; + ret|=*b->headptr<<(16-b->headbit); + + if(bits>=24){ + ++b->headptr; + --b->headend; + _span_one(b); + if(bits>24){ + if (_halt_one(b)) return -1; + ret|=*b->headptr<<(24-b->headbit); + + if(bits>=32){ + ++b->headptr; + --b->headend; + _span_one(b); + if(bits>32){ + if (_halt_one(b)) return -1; + if(b->headbit)ret|=*b->headptr<<(32-b->headbit); + + } + } + } + } + } + } + } + } + } + }else{ + + ret=b->headptr[0]>>b->headbit; + if(bits>8){ + ret|=b->headptr[1]<<(8-b->headbit); + if(bits>16){ + ret|=b->headptr[2]<<(16-b->headbit); + if(bits>24){ + ret|=b->headptr[3]<<(24-b->headbit); + if(bits>32 && b->headbit){ + ret|=b->headptr[4]<<(32-b->headbit); + } + } + } + } + + b->headptr+=bits/8; + b->headend-=bits/8; + } + + ret&=m; + b->headbit=bits&7; + return ret; +} + +long oggpack_bytes(oggpack_buffer *b){ + return(b->count+b->headptr-b->head->buffer->data-b->head->begin+ + (b->headbit+7)/8); +} + +long oggpack_bits(oggpack_buffer *b){ + return((b->count+b->headptr-b->head->buffer->data-b->head->begin)*8+ + b->headbit); +} + diff --git a/genplus-gx/core/tremor/block.c b/genplus-gx/core/tremor/block.c new file mode 100644 index 0000000000..8949253a16 --- /dev/null +++ b/genplus-gx/core/tremor/block.c @@ -0,0 +1,453 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: PCM data vector blocking, windowing and dis/reassembly + + ********************************************************************/ + +#include +#include +#include +#include "ogg.h" +#include "ivorbiscodec.h" +#include "codec_internal.h" + +#include "window.h" +#include "registry.h" +#include "misc.h" + +static int ilog(unsigned int v){ + int ret=0; + if(v)--v; + while(v){ + ret++; + v>>=1; + } + return(ret); +} + +/* pcm accumulator examples (not exhaustive): + + <-------------- lW ----------------> + <--------------- W ----------------> +: .....|..... _______________ | +: .''' | '''_--- | |\ | +:.....''' |_____--- '''......| | \_______| +:.................|__________________|_______|__|______| + |<------ Sl ------>| > Sr < |endW + |beginSl |endSl | |endSr + |beginW |endlW |beginSr + + + |< lW >| + <--------------- W ----------------> + | | .. ______________ | + | | ' `/ | ---_ | + |___.'___/`. | ---_____| + |_______|__|_______|_________________| + | >|Sl|< |<------ Sr ----->|endW + | | |endSl |beginSr |endSr + |beginW | |endlW + mult[0] |beginSl mult[n] + + <-------------- lW -----------------> + |<--W-->| +: .............. ___ | | +: .''' |`/ \ | | +:.....''' |/`....\|...| +:.........................|___|___|___| + |Sl |Sr |endW + | | |endSr + | |beginSr + | |endSl + |beginSl + |beginW +*/ + +/* block abstraction setup *********************************************/ + +#ifndef WORD_ALIGN +#define WORD_ALIGN 8 +#endif + +int vorbis_block_init(vorbis_dsp_state *v, vorbis_block *vb){ + memset(vb,0,sizeof(*vb)); + vb->vd=v; + vb->localalloc=0; + vb->localstore=NULL; + + return(0); +} + +void *_vorbis_block_alloc(vorbis_block *vb,long bytes){ + bytes=(bytes+(WORD_ALIGN-1)) & ~(WORD_ALIGN-1); + if(bytes+vb->localtop>vb->localalloc){ + /* can't just _ogg_realloc... there are outstanding pointers */ + if(vb->localstore){ + struct alloc_chain *link=(struct alloc_chain *)_ogg_malloc(sizeof(*link)); + vb->totaluse+=vb->localtop; + link->next=vb->reap; + link->ptr=vb->localstore; + vb->reap=link; + } + /* highly conservative */ + vb->localalloc=bytes; + vb->localstore=_ogg_malloc(vb->localalloc); + vb->localtop=0; + } + { + void *ret=(void *)(((char *)vb->localstore)+vb->localtop); + vb->localtop+=bytes; + return ret; + } +} + +/* reap the chain, pull the ripcord */ +void _vorbis_block_ripcord(vorbis_block *vb){ + /* reap the chain */ + struct alloc_chain *reap=vb->reap; + while(reap){ + struct alloc_chain *next=reap->next; + _ogg_free(reap->ptr); + memset(reap,0,sizeof(*reap)); + _ogg_free(reap); + reap=next; + } + /* consolidate storage */ + if(vb->totaluse){ + vb->localstore=_ogg_realloc(vb->localstore,vb->totaluse+vb->localalloc); + vb->localalloc+=vb->totaluse; + vb->totaluse=0; + } + + /* pull the ripcord */ + vb->localtop=0; + vb->reap=NULL; +} + +int vorbis_block_clear(vorbis_block *vb){ + _vorbis_block_ripcord(vb); + if(vb->localstore)_ogg_free(vb->localstore); + + memset(vb,0,sizeof(*vb)); + return(0); +} + +static int _vds_init(vorbis_dsp_state *v,vorbis_info *vi){ + int i; + codec_setup_info *ci=(codec_setup_info *)vi->codec_setup; + private_state *b=NULL; + + memset(v,0,sizeof(*v)); + b=(private_state *)(v->backend_state=_ogg_calloc(1,sizeof(*b))); + + v->vi=vi; + b->modebits=ilog(ci->modes); + + /* Vorbis I uses only window type 0 */ + b->window[0]=_vorbis_window(0,ci->blocksizes[0]/2); + b->window[1]=_vorbis_window(0,ci->blocksizes[1]/2); + + /* finish the codebooks */ + if(!ci->fullbooks){ + ci->fullbooks=(codebook *)_ogg_calloc(ci->books,sizeof(*ci->fullbooks)); + for(i=0;ibooks;i++){ + vorbis_book_init_decode(ci->fullbooks+i,ci->book_param[i]); + /* decode codebooks are now standalone after init */ + vorbis_staticbook_destroy(ci->book_param[i]); + ci->book_param[i]=NULL; + } + } + + v->pcm_storage=ci->blocksizes[1]; + v->pcm=(ogg_int32_t **)_ogg_malloc(vi->channels*sizeof(*v->pcm)); + v->pcmret=(ogg_int32_t **)_ogg_malloc(vi->channels*sizeof(*v->pcmret)); + for(i=0;ichannels;i++) + v->pcm[i]=(ogg_int32_t *)_ogg_calloc(v->pcm_storage,sizeof(*v->pcm[i])); + + /* all 1 (large block) or 0 (small block) */ + /* explicitly set for the sake of clarity */ + v->lW=0; /* previous window size */ + v->W=0; /* current window size */ + + /* initialize all the mapping/backend lookups */ + b->mode=(vorbis_look_mapping **)_ogg_calloc(ci->modes,sizeof(*b->mode)); + for(i=0;imodes;i++){ + int mapnum=ci->mode_param[i]->mapping; + int maptype=ci->map_type[mapnum]; + b->mode[i]=_mapping_P[maptype]->look(v,ci->mode_param[i], + ci->map_param[mapnum]); + } + return(0); +} + +int vorbis_synthesis_restart(vorbis_dsp_state *v){ + vorbis_info *vi=v->vi; + codec_setup_info *ci; + + if(!v->backend_state)return -1; + if(!vi)return -1; + ci=vi->codec_setup; + if(!ci)return -1; + + v->centerW=ci->blocksizes[1]/2; + v->pcm_current=v->centerW; + + v->pcm_returned=-1; + v->granulepos=-1; + v->sequence=-1; + ((private_state *)(v->backend_state))->sample_count=-1; + + return(0); +} + +int vorbis_synthesis_init(vorbis_dsp_state *v,vorbis_info *vi){ + _vds_init(v,vi); + vorbis_synthesis_restart(v); + + return(0); +} + +void vorbis_dsp_clear(vorbis_dsp_state *v){ + int i; + if(v){ + vorbis_info *vi=v->vi; + codec_setup_info *ci=(codec_setup_info *)(vi?vi->codec_setup:NULL); + private_state *b=(private_state *)v->backend_state; + + if(v->pcm){ + for(i=0;ichannels;i++) + if(v->pcm[i])_ogg_free(v->pcm[i]); + _ogg_free(v->pcm); + if(v->pcmret)_ogg_free(v->pcmret); + } + + /* free mode lookups; these are actually vorbis_look_mapping structs */ + if(ci){ + for(i=0;imodes;i++){ + int mapnum=ci->mode_param[i]->mapping; + int maptype=ci->map_type[mapnum]; + if(b && b->mode)_mapping_P[maptype]->free_look(b->mode[i]); + } + } + + if(b){ + if(b->mode)_ogg_free(b->mode); + _ogg_free(b); + } + + memset(v,0,sizeof(*v)); + } +} + +/* Unlike in analysis, the window is only partially applied for each + block. The time domain envelope is not yet handled at the point of + calling (as it relies on the previous block). */ + +int vorbis_synthesis_blockin(vorbis_dsp_state *v,vorbis_block *vb){ + vorbis_info *vi=v->vi; + codec_setup_info *ci=(codec_setup_info *)vi->codec_setup; + private_state *b=v->backend_state; + int i,j; + + if(v->pcm_current>v->pcm_returned && v->pcm_returned!=-1)return(OV_EINVAL); + + v->lW=v->W; + v->W=vb->W; + v->nW=-1; + + if((v->sequence==-1)|| + (v->sequence+1 != vb->sequence)){ + v->granulepos=-1; /* out of sequence; lose count */ + b->sample_count=-1; + } + + v->sequence=vb->sequence; + + if(vb->pcm){ /* no pcm to process if vorbis_synthesis_trackonly + was called on block */ + int n=ci->blocksizes[v->W]/2; + int n0=ci->blocksizes[0]/2; + int n1=ci->blocksizes[1]/2; + + int thisCenter; + int prevCenter; + + if(v->centerW){ + thisCenter=n1; + prevCenter=0; + }else{ + thisCenter=0; + prevCenter=n1; + } + + /* v->pcm is now used like a two-stage double buffer. We don't want + to have to constantly shift *or* adjust memory usage. Don't + accept a new block until the old is shifted out */ + + /* overlap/add PCM */ + + for(j=0;jchannels;j++){ + /* the overlap/add section */ + if(v->lW){ + if(v->W){ + /* large/large */ + ogg_int32_t *pcm=v->pcm[j]+prevCenter; + ogg_int32_t *p=vb->pcm[j]; + for(i=0;ipcm[j]+prevCenter+n1/2-n0/2; + ogg_int32_t *p=vb->pcm[j]; + for(i=0;iW){ + /* small/large */ + ogg_int32_t *pcm=v->pcm[j]+prevCenter; + ogg_int32_t *p=vb->pcm[j]+n1/2-n0/2; + for(i=0;ipcm[j]+prevCenter; + ogg_int32_t *p=vb->pcm[j]; + for(i=0;ipcm[j]+thisCenter; + ogg_int32_t *p=vb->pcm[j]+n; + for(i=0;icenterW) + v->centerW=0; + else + v->centerW=n1; + + /* deal with initial packet state; we do this using the explicit + pcm_returned==-1 flag otherwise we're sensitive to first block + being short or long */ + + if(v->pcm_returned==-1){ + v->pcm_returned=thisCenter; + v->pcm_current=thisCenter; + }else{ + v->pcm_returned=prevCenter; + v->pcm_current=prevCenter+ + ci->blocksizes[v->lW]/4+ + ci->blocksizes[v->W]/4; + } + + } + + /* track the frame number... This is for convenience, but also + making sure our last packet doesn't end with added padding. If + the last packet is partial, the number of samples we'll have to + return will be past the vb->granulepos. + + This is not foolproof! It will be confused if we begin + decoding at the last page after a seek or hole. In that case, + we don't have a starting point to judge where the last frame + is. For this reason, vorbisfile will always try to make sure + it reads the last two marked pages in proper sequence */ + + if(b->sample_count==-1){ + b->sample_count=0; + }else{ + b->sample_count+=ci->blocksizes[v->lW]/4+ci->blocksizes[v->W]/4; + } + + if(v->granulepos==-1){ + if(vb->granulepos!=-1){ /* only set if we have a position to set to */ + + v->granulepos=vb->granulepos; + + /* is this a short page? */ + if(b->sample_count>v->granulepos){ + /* corner case; if this is both the first and last audio page, + then spec says the end is cut, not beginning */ + if(vb->eofflag){ + /* trim the end */ + /* no preceeding granulepos; assume we started at zero (we'd + have to in a short single-page stream) */ + /* granulepos could be -1 due to a seek, but that would result + in a long coun`t, not short count */ + + v->pcm_current-=(b->sample_count-v->granulepos); + }else{ + /* trim the beginning */ + v->pcm_returned+=(b->sample_count-v->granulepos); + if(v->pcm_returned>v->pcm_current) + v->pcm_returned=v->pcm_current; + } + + } + + } + }else{ + v->granulepos+=ci->blocksizes[v->lW]/4+ci->blocksizes[v->W]/4; + if(vb->granulepos!=-1 && v->granulepos!=vb->granulepos){ + + if(v->granulepos>vb->granulepos){ + long extra=v->granulepos-vb->granulepos; + + if(extra) + if(vb->eofflag){ + /* partial last frame. Strip the extra samples off */ + v->pcm_current-=extra; + } /* else {Shouldn't happen *unless* the bitstream is out of + spec. Either way, believe the bitstream } */ + } /* else {Shouldn't happen *unless* the bitstream is out of + spec. Either way, believe the bitstream } */ + v->granulepos=vb->granulepos; + } + } + + /* Update, cleanup */ + + if(vb->eofflag)v->eofflag=1; + return(0); +} + +/* pcm==NULL indicates we just want the pending samples, no more */ +int vorbis_synthesis_pcmout(vorbis_dsp_state *v,ogg_int32_t ***pcm){ + vorbis_info *vi=v->vi; + if(v->pcm_returned>-1 && v->pcm_returnedpcm_current){ + if(pcm){ + int i; + for(i=0;ichannels;i++) + v->pcmret[i]=v->pcm[i]+v->pcm_returned; + *pcm=v->pcmret; + } + return(v->pcm_current-v->pcm_returned); + } + return(0); +} + +int vorbis_synthesis_read(vorbis_dsp_state *v,int bytes){ + if(bytes && v->pcm_returned+bytes>v->pcm_current)return(OV_EINVAL); + v->pcm_returned+=bytes; + return(0); +} + diff --git a/genplus-gx/core/tremor/block.h b/genplus-gx/core/tremor/block.h new file mode 100644 index 0000000000..5e193543d4 --- /dev/null +++ b/genplus-gx/core/tremor/block.h @@ -0,0 +1,24 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2008 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: shared block functions + + ********************************************************************/ + +#ifndef _V_BLOCK_ +#define _V_BLOCK_ + +extern void _vorbis_block_ripcord(vorbis_block *vb); +extern void *_vorbis_block_alloc(vorbis_block *vb,long bytes); + +#endif diff --git a/genplus-gx/core/tremor/codebook.c b/genplus-gx/core/tremor/codebook.c new file mode 100644 index 0000000000..d055870ad0 --- /dev/null +++ b/genplus-gx/core/tremor/codebook.c @@ -0,0 +1,371 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: basic codebook pack/unpack/code/decode operations + + ********************************************************************/ + +#include +#include +#include +#include "ogg.h" +#include "ivorbiscodec.h" +#include "codebook.h" +#include "misc.h" + +/* unpacks a codebook from the packet buffer into the codebook struct, + readies the codebook auxiliary structures for decode *************/ +int vorbis_staticbook_unpack(oggpack_buffer *opb,static_codebook *s){ + long i,j; + memset(s,0,sizeof(*s)); + + /* make sure alignment is correct */ + if(oggpack_read(opb,24)!=0x564342)goto _eofout; + + /* first the basic parameters */ + s->dim=oggpack_read(opb,16); + s->entries=oggpack_read(opb,24); + if(s->entries==-1)goto _eofout; + + /* codeword ordering.... length ordered or unordered? */ + switch((int)oggpack_read(opb,1)){ + case 0: + /* unordered */ + s->lengthlist=(long *)_ogg_malloc(sizeof(*s->lengthlist)*s->entries); + + /* allocated but unused entries? */ + if(oggpack_read(opb,1)){ + /* yes, unused entries */ + + for(i=0;ientries;i++){ + if(oggpack_read(opb,1)){ + long num=oggpack_read(opb,5); + if(num==-1)goto _eofout; + s->lengthlist[i]=num+1; + }else + s->lengthlist[i]=0; + } + }else{ + /* all entries used; no tagging */ + for(i=0;ientries;i++){ + long num=oggpack_read(opb,5); + if(num==-1)goto _eofout; + s->lengthlist[i]=num+1; + } + } + + break; + case 1: + /* ordered */ + { + long length=oggpack_read(opb,5)+1; + s->lengthlist=(long *)_ogg_malloc(sizeof(*s->lengthlist)*s->entries); + + for(i=0;ientries;){ + long num=oggpack_read(opb,_ilog(s->entries-i)); + if(num==-1)goto _eofout; + for(j=0;jentries;j++,i++) + s->lengthlist[i]=length; + length++; + } + } + break; + default: + /* EOF */ + return(-1); + } + + /* Do we have a mapping to unpack? */ + switch((s->maptype=oggpack_read(opb,4))){ + case 0: + /* no mapping */ + break; + case 1: case 2: + /* implicitly populated value mapping */ + /* explicitly populated value mapping */ + + s->q_min=oggpack_read(opb,32); + s->q_delta=oggpack_read(opb,32); + s->q_quant=oggpack_read(opb,4)+1; + s->q_sequencep=oggpack_read(opb,1); + + { + int quantvals=0; + switch(s->maptype){ + case 1: + quantvals=_book_maptype1_quantvals(s); + break; + case 2: + quantvals=s->entries*s->dim; + break; + } + + /* quantized values */ + s->quantlist=(long *)_ogg_malloc(sizeof(*s->quantlist)*quantvals); + for(i=0;iquantlist[i]=oggpack_read(opb,s->q_quant); + + if(quantvals&&s->quantlist[quantvals-1]==-1)goto _eofout; + } + break; + default: + goto _errout; + } + + /* all set */ + return(0); + + _errout: + _eofout: + vorbis_staticbook_clear(s); + return(-1); +} + +/* the 'eliminate the decode tree' optimization actually requires the + codewords to be MSb first, not LSb. This is an annoying inelegancy + (and one of the first places where carefully thought out design + turned out to be wrong; Vorbis II and future Ogg codecs should go + to an MSb bitpacker), but not actually the huge hit it appears to + be. The first-stage decode table catches most words so that + bitreverse is not in the main execution path. */ + +static ogg_uint32_t bitreverse(ogg_uint32_t x){ + x= ((x>>16)&0x0000ffff) | ((x<<16)&0xffff0000); + x= ((x>> 8)&0x00ff00ff) | ((x<< 8)&0xff00ff00); + x= ((x>> 4)&0x0f0f0f0f) | ((x<< 4)&0xf0f0f0f0); + x= ((x>> 2)&0x33333333) | ((x<< 2)&0xcccccccc); + return((x>> 1)&0x55555555) | ((x<< 1)&0xaaaaaaaa); +} + +STIN long decode_packed_entry_number(codebook *book, + oggpack_buffer *b){ + int read=book->dec_maxlength; + long lo,hi; + long lok = oggpack_look(b,book->dec_firsttablen); + + if (lok >= 0) { + long entry = book->dec_firsttable[lok]; + if(entry&0x80000000UL){ + lo=(entry>>15)&0x7fff; + hi=book->used_entries-(entry&0x7fff); + }else{ + oggpack_adv(b, book->dec_codelengths[entry-1]); + return(entry-1); + } + }else{ + lo=0; + hi=book->used_entries; + } + + lok = oggpack_look(b, read); + + while(lok<0 && read>1) + lok = oggpack_look(b, --read); + + if(lok<0){ + oggpack_adv(b,1); /* force eop */ + return -1; + } + + /* bisect search for the codeword in the ordered list */ + { + ogg_uint32_t testword=bitreverse((ogg_uint32_t)lok); + + while(hi-lo>1){ + long p=(hi-lo)>>1; + long test=book->codelist[lo+p]>testword; + lo+=p&(test-1); + hi-=p&(-test); + } + + if(book->dec_codelengths[lo]<=read){ + oggpack_adv(b, book->dec_codelengths[lo]); + return(lo); + } + } + + oggpack_adv(b, read+1); + return(-1); +} + +/* Decode side is specced and easier, because we don't need to find + matches using different criteria; we simply read and map. There are + two things we need to do 'depending': + + We may need to support interleave. We don't really, but it's + convenient to do it here rather than rebuild the vector later. + + Cascades may be additive or multiplicitive; this is not inherent in + the codebook, but set in the code using the codebook. Like + interleaving, it's easiest to do it here. + addmul==0 -> declarative (set the value) + addmul==1 -> additive + addmul==2 -> multiplicitive */ + +/* returns the [original, not compacted] entry number or -1 on eof *********/ +long vorbis_book_decode(codebook *book, oggpack_buffer *b){ + if(book->used_entries>0){ + long packed_entry=decode_packed_entry_number(book,b); + if(packed_entry>=0) + return(book->dec_index[packed_entry]); + } + + /* if there's no dec_index, the codebook unpacking isn't collapsed */ + return(-1); +} + +/* returns 0 on OK or -1 on eof *************************************/ +long vorbis_book_decodevs_add(codebook *book,ogg_int32_t *a, + oggpack_buffer *b,int n,int point){ + if(book->used_entries>0){ + int step=n/book->dim; + long *entry = (long *)alloca(sizeof(*entry)*step); + ogg_int32_t **t = (ogg_int32_t **)alloca(sizeof(*t)*step); + int i,j,o; + int shift=point-book->binarypoint; + + if(shift>=0){ + for (i = 0; i < step; i++) { + entry[i]=decode_packed_entry_number(book,b); + if(entry[i]==-1)return(-1); + t[i] = book->valuelist+entry[i]*book->dim; + } + for(i=0,o=0;idim;i++,o+=step) + for (j=0;j>shift; + }else{ + for (i = 0; i < step; i++) { + entry[i]=decode_packed_entry_number(book,b); + if(entry[i]==-1)return(-1); + t[i] = book->valuelist+entry[i]*book->dim; + } + for(i=0,o=0;idim;i++,o+=step) + for (j=0;jused_entries>0){ + int i,j,entry; + ogg_int32_t *t; + int shift=point-book->binarypoint; + + if(shift>=0){ + for(i=0;ivaluelist+entry*book->dim; + for (j=0;jdim;) + a[i++]+=t[j++]>>shift; + } + }else{ + for(i=0;ivaluelist+entry*book->dim; + for (j=0;jdim;) + a[i++]+=t[j++]<<-shift; + } + } + } + return(0); +} + +long vorbis_book_decodev_set(codebook *book,ogg_int32_t *a, + oggpack_buffer *b,int n,int point){ + if(book->used_entries>0){ + int i,j,entry; + ogg_int32_t *t; + int shift=point-book->binarypoint; + + if(shift>=0){ + + for(i=0;ivaluelist+entry*book->dim; + for (j=0;jdim;){ + a[i++]=t[j++]>>shift; + } + } + }else{ + + for(i=0;ivaluelist+entry*book->dim; + for (j=0;jdim;){ + a[i++]=t[j++]<<-shift; + } + } + } + }else{ + + int i,j; + for(i=0;idim;){ + a[i++]=0; + } + } + } + return(0); +} + +long vorbis_book_decodevv_add(codebook *book,ogg_int32_t **a,\ + long offset,int ch, + oggpack_buffer *b,int n,int point){ + if(book->used_entries>0){ + long i,j,entry; + int chptr=0; + int shift=point-book->binarypoint; + + if(shift>=0){ + + for(i=offset;ivaluelist+entry*book->dim; + for (j=0;jdim;j++){ + a[chptr++][i]+=t[j]>>shift; + if(chptr==ch){ + chptr=0; + i++; + } + } + } + } + }else{ + + for(i=offset;ivaluelist+entry*book->dim; + for (j=0;jdim;j++){ + a[chptr++][i]+=t[j]<<-shift; + if(chptr==ch){ + chptr=0; + i++; + } + } + } + } + } + } + return(0); +} diff --git a/genplus-gx/core/tremor/codebook.h b/genplus-gx/core/tremor/codebook.h new file mode 100644 index 0000000000..14f65382dd --- /dev/null +++ b/genplus-gx/core/tremor/codebook.h @@ -0,0 +1,102 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: basic shared codebook operations + + ********************************************************************/ + +#ifndef _V_CODEBOOK_H_ +#define _V_CODEBOOK_H_ + +#include "ogg.h" + +/* This structure encapsulates huffman and VQ style encoding books; it + doesn't do anything specific to either. + + valuelist/quantlist are nonNULL (and q_* significant) only if + there's entry->value mapping to be done. + + If encode-side mapping must be done (and thus the entry needs to be + hunted), the auxiliary encode pointer will point to a decision + tree. This is true of both VQ and huffman, but is mostly useful + with VQ. + +*/ + +typedef struct static_codebook{ + long dim; /* codebook dimensions (elements per vector) */ + long entries; /* codebook entries */ + long *lengthlist; /* codeword lengths in bits */ + + /* mapping ***************************************************************/ + int maptype; /* 0=none + 1=implicitly populated values from map column + 2=listed arbitrary values */ + + /* The below does a linear, single monotonic sequence mapping. */ + long q_min; /* packed 32 bit float; quant value 0 maps to minval */ + long q_delta; /* packed 32 bit float; val 1 - val 0 == delta */ + int q_quant; /* bits: 0 < quant <= 16 */ + int q_sequencep; /* bitflag */ + + long *quantlist; /* map == 1: (int)(entries^(1/dim)) element column map + map == 2: list of dim*entries quantized entry vals + */ +} static_codebook; + +typedef struct codebook{ + long dim; /* codebook dimensions (elements per vector) */ + long entries; /* codebook entries */ + long used_entries; /* populated codebook entries */ + + /* the below are ordered by bitreversed codeword and only used + entries are populated */ + int binarypoint; + ogg_int32_t *valuelist; /* list of dim*entries actual entry values */ + ogg_uint32_t *codelist; /* list of bitstream codewords for each entry */ + + int *dec_index; + char *dec_codelengths; + ogg_uint32_t *dec_firsttable; + int dec_firsttablen; + int dec_maxlength; + + long q_min; /* packed 32 bit float; quant value 0 maps to minval */ + long q_delta; /* packed 32 bit float; val 1 - val 0 == delta */ + +} codebook; + +extern void vorbis_staticbook_clear(static_codebook *b); +extern void vorbis_staticbook_destroy(static_codebook *b); +extern int vorbis_book_init_decode(codebook *dest,const static_codebook *source); + +extern void vorbis_book_clear(codebook *b); +extern long _book_maptype1_quantvals(const static_codebook *b); + +extern int vorbis_staticbook_unpack(oggpack_buffer *b,static_codebook *c); + +extern long vorbis_book_decode(codebook *book, oggpack_buffer *b); +extern long vorbis_book_decodevs_add(codebook *book, ogg_int32_t *a, + oggpack_buffer *b,int n,int point); +extern long vorbis_book_decodev_set(codebook *book, ogg_int32_t *a, + oggpack_buffer *b,int n,int point); +extern long vorbis_book_decodev_add(codebook *book, ogg_int32_t *a, + oggpack_buffer *b,int n,int point); +extern long vorbis_book_decodevv_add(codebook *book, ogg_int32_t **a, + long off,int ch, + oggpack_buffer *b,int n,int point); + +extern int _ilog(unsigned int v); + + +#endif diff --git a/genplus-gx/core/tremor/codec_internal.h b/genplus-gx/core/tremor/codec_internal.h new file mode 100644 index 0000000000..3ca7f54724 --- /dev/null +++ b/genplus-gx/core/tremor/codec_internal.h @@ -0,0 +1,92 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: libvorbis codec headers + + ********************************************************************/ + +#ifndef _V_CODECI_H_ +#define _V_CODECI_H_ + +#include "codebook.h" + +typedef void vorbis_look_mapping; +typedef void vorbis_look_floor; +typedef void vorbis_look_residue; +typedef void vorbis_look_transform; + +/* mode ************************************************************/ +typedef struct { + int blockflag; + int windowtype; + int transformtype; + int mapping; +} vorbis_info_mode; + +typedef void vorbis_info_floor; +typedef void vorbis_info_residue; +typedef void vorbis_info_mapping; + +typedef struct private_state { + /* local lookup storage */ + const void *window[2]; + + /* backend lookups are tied to the mode, not the backend or naked mapping */ + int modebits; + vorbis_look_mapping **mode; + + ogg_int64_t sample_count; + +} private_state; + +/* codec_setup_info contains all the setup information specific to the + specific compression/decompression mode in progress (eg, + psychoacoustic settings, channel setup, options, codebook + etc). +*********************************************************************/ + +typedef struct codec_setup_info { + + /* Vorbis supports only short and long blocks, but allows the + encoder to choose the sizes */ + + long blocksizes[2]; + + /* modes are the primary means of supporting on-the-fly different + blocksizes, different channel mappings (LR or M/A), + different residue backends, etc. Each mode consists of a + blocksize flag and a mapping (along with the mapping setup */ + + int modes; + int maps; + int times; + int floors; + int residues; + int books; + + vorbis_info_mode *mode_param[64]; + int map_type[64]; + vorbis_info_mapping *map_param[64]; + int time_type[64]; + int floor_type[64]; + vorbis_info_floor *floor_param[64]; + int residue_type[64]; + vorbis_info_residue *residue_param[64]; + static_codebook *book_param[256]; + codebook *fullbooks; + + int passlimit[32]; /* iteration limit per couple/quant pass */ + int coupling_passes; +} codec_setup_info; + +#endif diff --git a/genplus-gx/core/tremor/config_types.h b/genplus-gx/core/tremor/config_types.h new file mode 100644 index 0000000000..1fdcb27fe7 --- /dev/null +++ b/genplus-gx/core/tremor/config_types.h @@ -0,0 +1,25 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: #ifdef jail to whip a few platforms into the UNIX ideal. + + ********************************************************************/ +#ifndef _OS_CVTYPES_H +#define _OS_CVTYPES_H + +typedef long long ogg_int64_t; +typedef int ogg_int32_t; +typedef unsigned int ogg_uint32_t; +typedef short ogg_int16_t; + +#endif diff --git a/genplus-gx/core/tremor/configure.in b/genplus-gx/core/tremor/configure.in new file mode 100644 index 0000000000..2b44ee4a26 --- /dev/null +++ b/genplus-gx/core/tremor/configure.in @@ -0,0 +1,131 @@ +dnl Process this file with autoconf to produce a configure script + +dnl ------------------------------------------------ +dnl Initialization and Versioning +dnl ------------------------------------------------ + +AC_INIT(mdct.c) + +AC_CANONICAL_HOST +AC_CANONICAL_TARGET + +AM_CONFIG_HEADER([config.h]) + +AM_INIT_AUTOMAKE(libvorbisidec,1.2.0) + +dnl Library versioning + +V_LIB_CURRENT=1 +V_LIB_REVISION=2 +V_LIB_AGE=0 +AC_SUBST(V_LIB_CURRENT) +AC_SUBST(V_LIB_REVISION) +AC_SUBST(V_LIB_AGE) + +dnl -------------------------------------------------- +dnl Check for programs +dnl -------------------------------------------------- + +dnl save $CFLAGS since AC_PROG_CC likes to insert "-g -O2" +dnl if $CFLAGS is blank +cflags_save="$CFLAGS" +AC_PROG_CC +AC_PROG_CPP +CFLAGS="$cflags_save" + +AM_PROG_LIBTOOL + +dnl -------------------------------------------------- +dnl Set build flags based on environment +dnl -------------------------------------------------- + +dnl Set some target options + +cflags_save="$CFLAGS" +ldflags_save="$LDFLAGS" +if test -z "$GCC"; then + case $host in + arm-*-*) + DEBUG="-g -D_ARM_ASSEM_" + CFLAGS="-O -D_ARM_ASSEM_" + PROFILE="-p -g -O -D_ARM_ASSEM_" ;; + *) + DEBUG="-g" + CFLAGS="-O" + PROFILE="-g -p" ;; + esac +else + + case $host in + arm-*-*) + DEBUG="-g -Wall -D__NO_MATH_INLINES -fsigned-char -D_ARM_ASSEM_" + CFLAGS="-O2 -D_ARM_ASSEM_ -fsigned-char" + PROFILE="-W -pg -g -O2 -D_ARM_ASSEM_ -fsigned-char -fno-inline-functions";; + + *) + DEBUG="-g -Wall -D__NO_MATH_INLINES -fsigned-char" + CFLAGS="-O2 -Wall -fsigned-char" + PROFILE="-Wall -pg -g -O2 -fsigned-char -fno-inline-functions";; + esac +fi +CFLAGS="$CFLAGS $cflags_save -D_REENTRANT" +LDFLAGS="$LDFLAGS $ldflags_save" + + +# Test whenever ld supports -version-script +AC_PROG_LD +AC_PROG_LD_GNU +if test "x$lt_cv_prog_gnu_ld" = "xyes"; then + SHLIB_VERSION_ARG="Wl,--version-script=Version_script" + + dnl Set extra linker options + case "$target_os" in + linux* | solaris* ) + SHLIB_VERSION_ARG="-Wl,--version-script=Version_script" + ;; + *) + ;; + esac + LDFLAGS="$LDFLAGS $SHLIB_VERSION_ARG" +fi + +dnl -------------------------------------------------- +dnl Options +dnl -------------------------------------------------- + +AC_ARG_ENABLE( + low-accuracy, + [ --enable-low-accuracy enable 32 bit only multiply operations], + CFLAGS="$CFLAGS -D_LOW_ACCURACY_" +) + +dnl -------------------------------------------------- +dnl Check for headers +dnl -------------------------------------------------- + +AC_CHECK_HEADER(memory.h,CFLAGS="$CFLAGS -DUSE_MEMORY_H",:) + +dnl -------------------------------------------------- +dnl Check for typedefs, structures, etc +dnl -------------------------------------------------- + +dnl none + +dnl -------------------------------------------------- +dnl Check for library functions +dnl -------------------------------------------------- + +AC_FUNC_ALLOCA +AC_FUNC_MEMCMP + +dnl -------------------------------------------------- +dnl Do substitutions +dnl -------------------------------------------------- + +LIBS="$LIBS" + +AC_SUBST(LIBS) +AC_SUBST(DEBUG) +AC_SUBST(PROFILE) + +AC_OUTPUT(Makefile Version_script) diff --git a/genplus-gx/core/tremor/floor0.c b/genplus-gx/core/tremor/floor0.c new file mode 100644 index 0000000000..bdb83b8527 --- /dev/null +++ b/genplus-gx/core/tremor/floor0.c @@ -0,0 +1,435 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: floor backend 0 implementation + + ********************************************************************/ + +#include +#include +#include +#include "ogg.h" +#include "ivorbiscodec.h" +#include "codec_internal.h" +#include "registry.h" +#include "codebook.h" +#include "misc.h" +#include "block.h" + +#define LSP_FRACBITS 14 + +typedef struct { + long n; + int ln; + int m; + int *linearmap; + + vorbis_info_floor0 *vi; + ogg_int32_t *lsp_look; + +} vorbis_look_floor0; + +/*************** LSP decode ********************/ + +#include "lsp_lookup.h" + +/* interpolated 1./sqrt(p) where .5 <= a < 1. (.100000... to .111111...) in + 16.16 format + returns in m.8 format */ + +static long ADJUST_SQRT2[2]={8192,5792}; +STIN ogg_int32_t vorbis_invsqlook_i(long a,long e){ + long i=(a&0x7fff)>>(INVSQ_LOOKUP_I_SHIFT-1); + long d=a&INVSQ_LOOKUP_I_MASK; /* 0.10 */ + long val=INVSQ_LOOKUP_I[i]- /* 1.16 */ + ((INVSQ_LOOKUP_IDel[i]*d)>>INVSQ_LOOKUP_I_SHIFT); /* result 1.16 */ + val*=ADJUST_SQRT2[e&1]; + e=(e>>1)+21; + return(val>>e); +} + +/* interpolated lookup based fromdB function, domain -140dB to 0dB only */ +/* a is in n.12 format */ +STIN ogg_int32_t vorbis_fromdBlook_i(long a){ + int i=(-a)>>(12-FROMdB2_SHIFT); + if(i<0) return 0x7fffffff; + if(i>=(FROMdB_LOOKUP_SZ<>FROMdB_SHIFT] * FROMdB2_LOOKUP[i&FROMdB2_MASK]; +} + +/* interpolated lookup based cos function, domain 0 to PI only */ +/* a is in 0.16 format, where 0==0, 2^^16-1==PI, return 0.14 */ +STIN ogg_int32_t vorbis_coslook_i(long a){ + int i=a>>COS_LOOKUP_I_SHIFT; + int d=a&COS_LOOKUP_I_MASK; + return COS_LOOKUP_I[i]- ((d*(COS_LOOKUP_I[i]-COS_LOOKUP_I[i+1]))>> + COS_LOOKUP_I_SHIFT); +} + +/* interpolated lookup based cos function */ +/* a is in 0.16 format, where 0==0, 2^^16==PI, return .LSP_FRACBITS */ +STIN ogg_int32_t vorbis_coslook2_i(long a){ + a=a&0x1ffff; + + if(a>0x10000)a=0x20000-a; + { + int i=a>>COS_LOOKUP_I_SHIFT; + int d=a&COS_LOOKUP_I_MASK; + a=((COS_LOOKUP_I[i]<> + (COS_LOOKUP_I_SHIFT-LSP_FRACBITS+14); + } + + return(a); +} + +static const int barklook[28]={ + 0,100,200,301, 405,516,635,766, + 912,1077,1263,1476, 1720,2003,2333,2721, + 3184,3742,4428,5285, 6376,7791,9662,12181, + 15624,20397,27087,36554 +}; + +/* used in init only; interpolate the long way */ +STIN ogg_int32_t toBARK(int n){ + int i; + for(i=0;i<27;i++) + if(n>=barklook[i] && n>10)*0x517d)>>14; +#endif + + /* safeguard against a malicious stream */ + if(val<0 || (val>>COS_LOOKUP_I_SHIFT)>=COS_LOOKUP_I_SZ){ + memset(curve,0,sizeof(*curve)*n); + return; + } + + ilsp[i]=vorbis_coslook_i(val); + } + + i=0; + while(i>16); + qi=((qi*qi)>>16); + + if(m&1){ + qexp= qexp*2-28*((m+1)>>1)+m; + pi*=(1<<14)-((wi*wi)>>14); + qi+=pi>>14; + }else{ + qexp= qexp*2-13*m; + + pi*=(1<<14)-wi; + qi*=(1<<14)+wi; + + qi=(qi+pi)>>14; + } + + if(qi&0xffff0000){ /* checks for 1.xxxxxxxxxxxxxxxx */ + qi>>=1; qexp++; + }else + lsp_norm_asm(&qi,&qexp); + +#else + + qi*=labs(ilsp[0]-wi); + pi*=labs(ilsp[1]-wi); + + for(j=3;j>25])) + if(!(shift=MLOOP_2[(pi|qi)>>19])) + shift=MLOOP_3[(pi|qi)>>16]; + qi=(qi>>shift)*labs(ilsp[j-1]-wi); + pi=(pi>>shift)*labs(ilsp[j]-wi); + qexp+=shift; + } + if(!(shift=MLOOP_1[(pi|qi)>>25])) + if(!(shift=MLOOP_2[(pi|qi)>>19])) + shift=MLOOP_3[(pi|qi)>>16]; + + /* pi,qi normalized collectively, both tracked using qexp */ + + if(m&1){ + /* odd order filter; slightly assymetric */ + /* the last coefficient */ + qi=(qi>>shift)*labs(ilsp[j-1]-wi); + pi=(pi>>shift)<<14; + qexp+=shift; + + if(!(shift=MLOOP_1[(pi|qi)>>25])) + if(!(shift=MLOOP_2[(pi|qi)>>19])) + shift=MLOOP_3[(pi|qi)>>16]; + + pi>>=shift; + qi>>=shift; + qexp+=shift-14*((m+1)>>1); + + pi=((pi*pi)>>16); + qi=((qi*qi)>>16); + qexp=qexp*2+m; + + pi*=(1<<14)-((wi*wi)>>14); + qi+=pi>>14; + + }else{ + /* even order filter; still symmetric */ + + /* p*=p(1-w), q*=q(1+w), let normalization drift because it isn't + worth tracking step by step */ + + pi>>=shift; + qi>>=shift; + qexp+=shift-7*m; + + pi=((pi*pi)>>16); + qi=((qi*qi)>>16); + qexp=qexp*2+m; + + pi*=(1<<14)-wi; + qi*=(1<<14)+wi; + qi=(qi+pi)>>14; + + } + + + /* we've let the normalization drift because it wasn't important; + however, for the lookup, things must be normalized again. We + need at most one right shift or a number of left shifts */ + + if(qi&0xffff0000){ /* checks for 1.xxxxxxxxxxxxxxxx */ + qi>>=1; qexp++; + }else + while(qi && !(qi&0x8000)){ /* checks for 0.0xxxxxxxxxxxxxxx or less*/ + qi<<=1; qexp--; + } + +#endif + + amp=vorbis_fromdBlook_i(ampi* /* n.4 */ + vorbis_invsqlook_i(qi,qexp)- + /* m.8, m+n<=8 */ + ampoffseti); /* 8.12[0] */ + +#ifdef _LOW_ACCURACY_ + amp>>=9; +#endif + curve[i]= MULT31_SHIFT15(curve[i],amp); + while(map[++i]==k) curve[i]= MULT31_SHIFT15(curve[i],amp); + } +} + +/*************** vorbis decode glue ************/ + +static void floor0_free_info(vorbis_info_floor *i){ + vorbis_info_floor0 *info=(vorbis_info_floor0 *)i; + if(info){ + memset(info,0,sizeof(*info)); + _ogg_free(info); + } +} + +static void floor0_free_look(vorbis_look_floor *i){ + vorbis_look_floor0 *look=(vorbis_look_floor0 *)i; + if(look){ + + if(look->linearmap)_ogg_free(look->linearmap); + if(look->lsp_look)_ogg_free(look->lsp_look); + memset(look,0,sizeof(*look)); + _ogg_free(look); + } +} + +static vorbis_info_floor *floor0_unpack (vorbis_info *vi,oggpack_buffer *opb){ + codec_setup_info *ci=(codec_setup_info *)vi->codec_setup; + int j; + + vorbis_info_floor0 *info=(vorbis_info_floor0 *)_ogg_malloc(sizeof(*info)); + info->order=oggpack_read(opb,8); + info->rate=oggpack_read(opb,16); + info->barkmap=oggpack_read(opb,16); + info->ampbits=oggpack_read(opb,6); + info->ampdB=oggpack_read(opb,8); + info->numbooks=oggpack_read(opb,4)+1; + + if(info->order<1)goto err_out; + if(info->rate<1)goto err_out; + if(info->barkmap<1)goto err_out; + if(info->numbooks<1)goto err_out; + + for(j=0;jnumbooks;j++){ + info->books[j]=oggpack_read(opb,8); + if(info->books[j]<0 || info->books[j]>=ci->books)goto err_out; + } + return(info); + + err_out: + floor0_free_info(info); + return(NULL); +} + +/* initialize Bark scale and normalization lookups. We could do this + with static tables, but Vorbis allows a number of possible + combinations, so it's best to do it computationally. + + The below is authoritative in terms of defining scale mapping. + Note that the scale depends on the sampling rate as well as the + linear block and mapping sizes */ + +static vorbis_look_floor *floor0_look (vorbis_dsp_state *vd,vorbis_info_mode *mi, + vorbis_info_floor *i){ + int j; + vorbis_info *vi=vd->vi; + codec_setup_info *ci=(codec_setup_info *)vi->codec_setup; + vorbis_info_floor0 *info=(vorbis_info_floor0 *)i; + vorbis_look_floor0 *look=(vorbis_look_floor0 *)_ogg_calloc(1,sizeof(*look)); + look->m=info->order; + look->n=ci->blocksizes[mi->blockflag]/2; + look->ln=info->barkmap; + look->vi=info; + + /* the mapping from a linear scale to a smaller bark scale is + straightforward. We do *not* make sure that the linear mapping + does not skip bark-scale bins; the decoder simply skips them and + the encoder may do what it wishes in filling them. They're + necessary in some mapping combinations to keep the scale spacing + accurate */ + look->linearmap=(int *)_ogg_malloc((look->n+1)*sizeof(*look->linearmap)); + for(j=0;jn;j++){ + + int val=(look->ln* + ((toBARK(info->rate/2*j/look->n)<<11)/toBARK(info->rate/2)))>>11; + + if(val>=look->ln)val=look->ln-1; /* guard against the approximation */ + look->linearmap[j]=val; + } + look->linearmap[j]=-1; + + look->lsp_look=(ogg_int32_t *)_ogg_malloc(look->ln*sizeof(*look->lsp_look)); + for(j=0;jln;j++) + look->lsp_look[j]=vorbis_coslook2_i(0x10000*j/look->ln); + + return look; +} + +static void *floor0_inverse1(vorbis_block *vb,vorbis_look_floor *i){ + vorbis_look_floor0 *look=(vorbis_look_floor0 *)i; + vorbis_info_floor0 *info=look->vi; + int j,k; + + int ampraw=oggpack_read(&vb->opb,info->ampbits); + if(ampraw>0){ /* also handles the -1 out of data case */ + long maxval=(1<ampbits)-1; + int amp=((ampraw*info->ampdB)<<4)/maxval; + int booknum=oggpack_read(&vb->opb,_ilog(info->numbooks)); + + if(booknum!=-1 && booknumnumbooks){ /* be paranoid */ + codec_setup_info *ci=(codec_setup_info *)vb->vd->vi->codec_setup; + codebook *b=ci->fullbooks+info->books[booknum]; + ogg_int32_t last=0; + ogg_int32_t *lsp=(ogg_int32_t *)_vorbis_block_alloc(vb,sizeof(*lsp)*(look->m+1)); + + for(j=0;jm;j+=b->dim) + if(vorbis_book_decodev_set(b,lsp+j,&vb->opb,b->dim,-24)==-1)goto eop; + for(j=0;jm;){ + for(k=0;kdim;k++,j++)lsp[j]+=last; + last=lsp[j-1]; + } + + lsp[look->m]=amp; + return(lsp); + } + } + eop: + return(NULL); +} + +static int floor0_inverse2(vorbis_block *vb,vorbis_look_floor *i, + void *memo,ogg_int32_t *out){ + vorbis_look_floor0 *look=(vorbis_look_floor0 *)i; + vorbis_info_floor0 *info=look->vi; + + if(memo){ + ogg_int32_t *lsp=(ogg_int32_t *)memo; + ogg_int32_t amp=lsp[look->m]; + + /* take the coefficients back to a spectral envelope curve */ + vorbis_lsp_to_curve(out,look->linearmap,look->n,look->ln, + lsp,look->m,amp,info->ampdB,look->lsp_look); + return(1); + } + memset(out,0,sizeof(*out)*look->n); + return(0); +} + +/* export hooks */ +vorbis_func_floor floor0_exportbundle={ + &floor0_unpack,&floor0_look,&floor0_free_info, + &floor0_free_look,&floor0_inverse1,&floor0_inverse2 +}; + + diff --git a/genplus-gx/core/tremor/floor1.c b/genplus-gx/core/tremor/floor1.c new file mode 100644 index 0000000000..276ed8d8a8 --- /dev/null +++ b/genplus-gx/core/tremor/floor1.c @@ -0,0 +1,441 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: floor backend 1 implementation + + ********************************************************************/ + +#include +#include +#include +#include "ogg.h" +#include "ivorbiscodec.h" +#include "codec_internal.h" +#include "registry.h" +#include "codebook.h" +#include "misc.h" +#include "block.h" + +#define floor1_rangedB 140 /* floor 1 fixed at -140dB to 0dB range */ + +typedef struct { + int forward_index[VIF_POSIT+2]; + + int hineighbor[VIF_POSIT]; + int loneighbor[VIF_POSIT]; + int posts; + + int n; + int quant_q; + vorbis_info_floor1 *vi; + +} vorbis_look_floor1; + +/***********************************************/ + +static void floor1_free_info(vorbis_info_floor *i){ + vorbis_info_floor1 *info=(vorbis_info_floor1 *)i; + if(info){ + memset(info,0,sizeof(*info)); + _ogg_free(info); + } +} + +static void floor1_free_look(vorbis_look_floor *i){ + vorbis_look_floor1 *look=(vorbis_look_floor1 *)i; + if(look){ + memset(look,0,sizeof(*look)); + _ogg_free(look); + } +} + +static int ilog(unsigned int v){ + int ret=0; + while(v){ + ret++; + v>>=1; + } + return(ret); +} + +static vorbis_info_floor *floor1_unpack (vorbis_info *vi,oggpack_buffer *opb){ + codec_setup_info *ci=(codec_setup_info *)vi->codec_setup; + int j,k,count=0,maxclass=-1,rangebits; + + vorbis_info_floor1 *info=(vorbis_info_floor1 *)_ogg_calloc(1,sizeof(*info)); + /* read partitions */ + info->partitions=oggpack_read(opb,5); /* only 0 to 31 legal */ + for(j=0;jpartitions;j++){ + info->partitionclass[j]=oggpack_read(opb,4); /* only 0 to 15 legal */ + if(maxclasspartitionclass[j])maxclass=info->partitionclass[j]; + } + + /* read partition classes */ + for(j=0;jclass_dim[j]=oggpack_read(opb,3)+1; /* 1 to 8 */ + info->class_subs[j]=oggpack_read(opb,2); /* 0,1,2,3 bits */ + if(info->class_subs[j]<0) + goto err_out; + if(info->class_subs[j])info->class_book[j]=oggpack_read(opb,8); + if(info->class_book[j]<0 || info->class_book[j]>=ci->books) + goto err_out; + for(k=0;k<(1<class_subs[j]);k++){ + info->class_subbook[j][k]=oggpack_read(opb,8)-1; + if(info->class_subbook[j][k]<-1 || info->class_subbook[j][k]>=ci->books) + goto err_out; + } + } + + /* read the post list */ + info->mult=oggpack_read(opb,2)+1; /* only 1,2,3,4 legal now */ + rangebits=oggpack_read(opb,4); + + for(j=0,k=0;jpartitions;j++){ + count+=info->class_dim[info->partitionclass[j]]; + for(;kpostlist[k+2]=oggpack_read(opb,rangebits); + if(t<0 || t>=(1<postlist[0]=0; + info->postlist[1]=1<vi=info; + look->n=info->postlist[1]; + + /* we drop each position value in-between already decoded values, + and use linear interpolation to predict each new value past the + edges. The positions are read in the order of the position + list... we precompute the bounding positions in the lookup. Of + course, the neighbors can change (if a position is declined), but + this is an initial mapping */ + + for(i=0;ipartitions;i++)n+=info->class_dim[info->partitionclass[i]]; + n+=2; + look->posts=n; + + /* also store a sorted position index */ + for(i=0;ipostlist+i; + qsort(sortpointer,n,sizeof(*sortpointer),icomp); + + /* points from sort order back to range number */ + for(i=0;iforward_index[i]=sortpointer[i]-info->postlist; + + /* quantize values to multiplier spec */ + switch(info->mult){ + case 1: /* 1024 -> 256 */ + look->quant_q=256; + break; + case 2: /* 1024 -> 128 */ + look->quant_q=128; + break; + case 3: /* 1024 -> 86 */ + look->quant_q=86; + break; + case 4: /* 1024 -> 64 */ + look->quant_q=64; + break; + } + + /* discover our neighbors for decode where we don't use fit flags + (that would push the neighbors outward) */ + for(i=0;in; + int currentx=info->postlist[i+2]; + for(j=0;jpostlist[j]; + if(x>lx && xcurrentx){ + hi=j; + hx=x; + } + } + look->loneighbor[i]=lo; + look->hineighbor[i]=hi; + } + + return(look); +} + +static int render_point(int x0,int x1,int y0,int y1,int x){ + y0&=0x7fff; /* mask off flag */ + y1&=0x7fff; + + { + int dy=y1-y0; + int adx=x1-x0; + int ady=abs(dy); + int err=ady*(x-x0); + + int off=err/adx; + if(dy<0)return(y0-off); + return(y0+off); + } +} + +#ifdef _LOW_ACCURACY_ +# define XdB(n) ((((n)>>8)+1)>>1) +#else +# define XdB(n) (n) +#endif + +static const ogg_int32_t FLOOR_fromdB_LOOKUP[256]={ + XdB(0x000000e5), XdB(0x000000f4), XdB(0x00000103), XdB(0x00000114), + XdB(0x00000126), XdB(0x00000139), XdB(0x0000014e), XdB(0x00000163), + XdB(0x0000017a), XdB(0x00000193), XdB(0x000001ad), XdB(0x000001c9), + XdB(0x000001e7), XdB(0x00000206), XdB(0x00000228), XdB(0x0000024c), + XdB(0x00000272), XdB(0x0000029b), XdB(0x000002c6), XdB(0x000002f4), + XdB(0x00000326), XdB(0x0000035a), XdB(0x00000392), XdB(0x000003cd), + XdB(0x0000040c), XdB(0x00000450), XdB(0x00000497), XdB(0x000004e4), + XdB(0x00000535), XdB(0x0000058c), XdB(0x000005e8), XdB(0x0000064a), + XdB(0x000006b3), XdB(0x00000722), XdB(0x00000799), XdB(0x00000818), + XdB(0x0000089e), XdB(0x0000092e), XdB(0x000009c6), XdB(0x00000a69), + XdB(0x00000b16), XdB(0x00000bcf), XdB(0x00000c93), XdB(0x00000d64), + XdB(0x00000e43), XdB(0x00000f30), XdB(0x0000102d), XdB(0x0000113a), + XdB(0x00001258), XdB(0x0000138a), XdB(0x000014cf), XdB(0x00001629), + XdB(0x0000179a), XdB(0x00001922), XdB(0x00001ac4), XdB(0x00001c82), + XdB(0x00001e5c), XdB(0x00002055), XdB(0x0000226f), XdB(0x000024ac), + XdB(0x0000270e), XdB(0x00002997), XdB(0x00002c4b), XdB(0x00002f2c), + XdB(0x0000323d), XdB(0x00003581), XdB(0x000038fb), XdB(0x00003caf), + XdB(0x000040a0), XdB(0x000044d3), XdB(0x0000494c), XdB(0x00004e10), + XdB(0x00005323), XdB(0x0000588a), XdB(0x00005e4b), XdB(0x0000646b), + XdB(0x00006af2), XdB(0x000071e5), XdB(0x0000794c), XdB(0x0000812e), + XdB(0x00008993), XdB(0x00009283), XdB(0x00009c09), XdB(0x0000a62d), + XdB(0x0000b0f9), XdB(0x0000bc79), XdB(0x0000c8b9), XdB(0x0000d5c4), + XdB(0x0000e3a9), XdB(0x0000f274), XdB(0x00010235), XdB(0x000112fd), + XdB(0x000124dc), XdB(0x000137e4), XdB(0x00014c29), XdB(0x000161bf), + XdB(0x000178bc), XdB(0x00019137), XdB(0x0001ab4a), XdB(0x0001c70e), + XdB(0x0001e4a1), XdB(0x0002041f), XdB(0x000225aa), XdB(0x00024962), + XdB(0x00026f6d), XdB(0x000297f0), XdB(0x0002c316), XdB(0x0002f109), + XdB(0x000321f9), XdB(0x00035616), XdB(0x00038d97), XdB(0x0003c8b4), + XdB(0x000407a7), XdB(0x00044ab2), XdB(0x00049218), XdB(0x0004de23), + XdB(0x00052f1e), XdB(0x0005855c), XdB(0x0005e135), XdB(0x00064306), + XdB(0x0006ab33), XdB(0x00071a24), XdB(0x0007904b), XdB(0x00080e20), + XdB(0x00089422), XdB(0x000922da), XdB(0x0009bad8), XdB(0x000a5cb6), + XdB(0x000b091a), XdB(0x000bc0b1), XdB(0x000c8436), XdB(0x000d5471), + XdB(0x000e3233), XdB(0x000f1e5f), XdB(0x001019e4), XdB(0x001125c1), + XdB(0x00124306), XdB(0x001372d5), XdB(0x0014b663), XdB(0x00160ef7), + XdB(0x00177df0), XdB(0x001904c1), XdB(0x001aa4f9), XdB(0x001c603d), + XdB(0x001e384f), XdB(0x00202f0f), XdB(0x0022467a), XdB(0x002480b1), + XdB(0x0026dff7), XdB(0x002966b3), XdB(0x002c1776), XdB(0x002ef4fc), + XdB(0x0032022d), XdB(0x00354222), XdB(0x0038b828), XdB(0x003c67c2), + XdB(0x004054ae), XdB(0x004482e8), XdB(0x0048f6af), XdB(0x004db488), + XdB(0x0052c142), XdB(0x005821ff), XdB(0x005ddc33), XdB(0x0063f5b0), + XdB(0x006a74a7), XdB(0x00715faf), XdB(0x0078bdce), XdB(0x0080967f), + XdB(0x0088f1ba), XdB(0x0091d7f9), XdB(0x009b5247), XdB(0x00a56a41), + XdB(0x00b02a27), XdB(0x00bb9ce2), XdB(0x00c7ce12), XdB(0x00d4ca17), + XdB(0x00e29e20), XdB(0x00f15835), XdB(0x0101074b), XdB(0x0111bb4e), + XdB(0x01238531), XdB(0x01367704), XdB(0x014aa402), XdB(0x016020a7), + XdB(0x017702c3), XdB(0x018f6190), XdB(0x01a955cb), XdB(0x01c4f9cf), + XdB(0x01e269a8), XdB(0x0201c33b), XdB(0x0223265a), XdB(0x0246b4ea), + XdB(0x026c9302), XdB(0x0294e716), XdB(0x02bfda13), XdB(0x02ed9793), + XdB(0x031e4e09), XdB(0x03522ee4), XdB(0x03896ed0), XdB(0x03c445e2), + XdB(0x0402efd6), XdB(0x0445ac4b), XdB(0x048cbefc), XdB(0x04d87013), + XdB(0x05290c67), XdB(0x057ee5ca), XdB(0x05da5364), XdB(0x063bb204), + XdB(0x06a36485), XdB(0x0711d42b), XdB(0x0787710e), XdB(0x0804b299), + XdB(0x088a17ef), XdB(0x0918287e), XdB(0x09af747c), XdB(0x0a50957e), + XdB(0x0afc2f19), XdB(0x0bb2ef7f), XdB(0x0c759034), XdB(0x0d44d6ca), + XdB(0x0e2195bc), XdB(0x0f0cad0d), XdB(0x10070b62), XdB(0x1111aeea), + XdB(0x122da66c), XdB(0x135c120f), XdB(0x149e24d9), XdB(0x15f525b1), + XdB(0x176270e3), XdB(0x18e7794b), XdB(0x1a85c9ae), XdB(0x1c3f06d1), + XdB(0x1e14f07d), XdB(0x200963d7), XdB(0x221e5ccd), XdB(0x2455f870), + XdB(0x26b2770b), XdB(0x29363e2b), XdB(0x2be3db5c), XdB(0x2ebe06b6), + XdB(0x31c7a55b), XdB(0x3503ccd4), XdB(0x3875c5aa), XdB(0x3c210f44), + XdB(0x4009632b), XdB(0x4432b8cf), XdB(0x48a149bc), XdB(0x4d59959e), + XdB(0x52606733), XdB(0x57bad899), XdB(0x5d6e593a), XdB(0x6380b298), + XdB(0x69f80e9a), XdB(0x70dafda8), XdB(0x78307d76), XdB(0x7fffffff), +}; + +static void render_line(int n, int x0,int x1,int y0,int y1,ogg_int32_t *d){ + int dy=y1-y0; + int adx=x1-x0; + int ady=abs(dy); + int base=dy/adx; + int sy=(dy<0?base-1:base+1); + int x=x0; + int y=y0; + int err=0; + + if(n>x1)n=x1; + ady-=abs(base*adx); + + if(x=adx){ + err-=adx; + y+=sy; + }else{ + y+=base; + } + d[x]= MULT31_SHIFT15(d[x],FLOOR_fromdB_LOOKUP[y]); + } +} + +static void *floor1_inverse1(vorbis_block *vb,vorbis_look_floor *in){ + vorbis_look_floor1 *look=(vorbis_look_floor1 *)in; + vorbis_info_floor1 *info=look->vi; + codec_setup_info *ci=(codec_setup_info *)vb->vd->vi->codec_setup; + + int i,j,k; + codebook *books=ci->fullbooks; + + /* unpack wrapped/predicted values from stream */ + if(oggpack_read(&vb->opb,1)==1){ + int *fit_value=(int *)_vorbis_block_alloc(vb,(look->posts)*sizeof(*fit_value)); + + fit_value[0]=oggpack_read(&vb->opb,ilog(look->quant_q-1)); + fit_value[1]=oggpack_read(&vb->opb,ilog(look->quant_q-1)); + + /* partition by partition */ + /* partition by partition */ + for(i=0,j=2;ipartitions;i++){ + int classv=info->partitionclass[i]; + int cdim=info->class_dim[classv]; + int csubbits=info->class_subs[classv]; + int csub=1<class_book[classv],&vb->opb); + + if(cval==-1)goto eop; + } + + for(k=0;kclass_subbook[classv][cval&(csub-1)]; + cval>>=csubbits; + if(book>=0){ + if((fit_value[j+k]=vorbis_book_decode(books+book,&vb->opb))==-1) + goto eop; + }else{ + fit_value[j+k]=0; + } + } + j+=cdim; + } + + /* unwrap positive values and reconsitute via linear interpolation */ + for(i=2;iposts;i++){ + int predicted=render_point(info->postlist[look->loneighbor[i-2]], + info->postlist[look->hineighbor[i-2]], + fit_value[look->loneighbor[i-2]], + fit_value[look->hineighbor[i-2]], + info->postlist[i]); + int hiroom=look->quant_q-predicted; + int loroom=predicted; + int room=(hiroom=room){ + if(hiroom>loroom){ + val = val-loroom; + }else{ + val = -1-(val-hiroom); + } + }else{ + if(val&1){ + val= -((val+1)>>1); + }else{ + val>>=1; + } + } + + fit_value[i]=val+predicted; + fit_value[look->loneighbor[i-2]]&=0x7fff; + fit_value[look->hineighbor[i-2]]&=0x7fff; + + }else{ + fit_value[i]=predicted|0x8000; + } + + } + + return(fit_value); + } + eop: + return(NULL); +} + +static int floor1_inverse2(vorbis_block *vb,vorbis_look_floor *in,void *memo, + ogg_int32_t *out){ + vorbis_look_floor1 *look=(vorbis_look_floor1 *)in; + vorbis_info_floor1 *info=look->vi; + + codec_setup_info *ci=(codec_setup_info *)vb->vd->vi->codec_setup; + int n=ci->blocksizes[vb->W]/2; + int j; + + if(memo){ + /* render the lines */ + int *fit_value=(int *)memo; + int hx=0; + int lx=0; + int ly=fit_value[0]*info->mult; + for(j=1;jposts;j++){ + int current=look->forward_index[j]; + int hy=fit_value[current]&0x7fff; + if(hy==fit_value[current]){ + + hy*=info->mult; + hx=info->postlist[current]; + + render_line(n,lx,hx,ly,hy,out); + + lx=hx; + ly=hy; + } + } + for(j=hx;j +#include +#include "ogg.h" +#include "misc.h" + + +/* A complete description of Ogg framing exists in docs/framing.html */ + +/* basic, centralized Ogg memory management based on linked lists of + references to refcounted memory buffers. References and buffers + are both recycled. Buffers are passed around and consumed in + reference form. */ + +static ogg_buffer_state *ogg_buffer_create(void){ + ogg_buffer_state *bs=_ogg_calloc(1,sizeof(*bs)); + return bs; +} + +/* destruction is 'lazy'; there may be memory references outstanding, + and yanking the buffer state out from underneath would be + antisocial. Dealloc what is currently unused and have + _release_one watch for the stragglers to come in. When they do, + finish destruction. */ + +/* call the helper while holding lock */ +static void _ogg_buffer_destroy(ogg_buffer_state *bs){ + ogg_buffer *bt; + ogg_reference *rt; + + if(bs->shutdown){ + + bt=bs->unused_buffers; + rt=bs->unused_references; + + while(bt){ + ogg_buffer *b=bt; + bt=b->ptr.next; + if(b->data)_ogg_free(b->data); + _ogg_free(b); + } + bs->unused_buffers=0; + while(rt){ + ogg_reference *r=rt; + rt=r->next; + _ogg_free(r); + } + bs->unused_references=0; + + if(!bs->outstanding) + _ogg_free(bs); + + } +} + +static void ogg_buffer_destroy(ogg_buffer_state *bs){ + bs->shutdown=1; + _ogg_buffer_destroy(bs); +} + +static ogg_buffer *_fetch_buffer(ogg_buffer_state *bs,long bytes){ + ogg_buffer *ob; + bs->outstanding++; + + /* do we have an unused buffer sitting in the pool? */ + if(bs->unused_buffers){ + ob=bs->unused_buffers; + bs->unused_buffers=ob->ptr.next; + + /* if the unused buffer is too small, grow it */ + if(ob->sizedata=_ogg_realloc(ob->data,bytes); + ob->size=bytes; + } + }else{ + /* allocate a new buffer */ + ob=_ogg_malloc(sizeof(*ob)); + ob->data=_ogg_malloc(bytes<16?16:bytes); + ob->size=bytes; + } + + ob->refcount=1; + ob->ptr.owner=bs; + return ob; +} + +static ogg_reference *_fetch_ref(ogg_buffer_state *bs){ + ogg_reference *or; + bs->outstanding++; + + /* do we have an unused reference sitting in the pool? */ + if(bs->unused_references){ + or=bs->unused_references; + bs->unused_references=or->next; + }else{ + /* allocate a new reference */ + or=_ogg_malloc(sizeof(*or)); + } + + or->begin=0; + or->length=0; + or->next=0; + return or; +} + +/* fetch a reference pointing to a fresh, initially continguous buffer + of at least [bytes] length */ +static ogg_reference *ogg_buffer_alloc(ogg_buffer_state *bs,long bytes){ + ogg_buffer *ob=_fetch_buffer(bs,bytes); + ogg_reference *or=_fetch_ref(bs); + or->buffer=ob; + return or; +} + +/* enlarge the data buffer in the current link */ +static void ogg_buffer_realloc(ogg_reference *or,long bytes){ + ogg_buffer *ob=or->buffer; + + /* if the unused buffer is too small, grow it */ + if(ob->sizedata=_ogg_realloc(ob->data,bytes); + ob->size=bytes; + } +} + +static void _ogg_buffer_mark_one(ogg_reference *or){ + or->buffer->refcount++; +} + +/* increase the refcount of the buffers to which the reference points */ +static void ogg_buffer_mark(ogg_reference *or){ + while(or){ + _ogg_buffer_mark_one(or); + or=or->next; + } +} + +/* duplicate a reference (pointing to the same actual buffer memory) + and increment buffer refcount. If the desired segment begins out + of range, NULL is returned; if the desired segment is simply zero + length, a zero length ref is returned. Partial range overlap + returns the overlap of the ranges */ +static ogg_reference *ogg_buffer_sub(ogg_reference *or,long begin,long length){ + ogg_reference *ret=0,*head=0; + + /* walk past any preceeding fragments we don't want */ + while(or && begin>=or->length){ + begin-=or->length; + or=or->next; + } + + /* duplicate the reference chain; increment refcounts */ + while(or && length){ + ogg_reference *temp=_fetch_ref(or->buffer->ptr.owner); + if(head) + head->next=temp; + else + ret=temp; + head=temp; + head->buffer=or->buffer; + head->begin=or->begin+begin; + head->length=length; + if(head->length>or->length-begin) + head->length=or->length-begin; + + begin=0; + length-=head->length; + or=or->next; + } + + ogg_buffer_mark(ret); + return ret; +} + +ogg_reference *ogg_buffer_dup(ogg_reference *or){ + ogg_reference *ret=0,*head=0; + /* duplicate the reference chain; increment refcounts */ + while(or){ + ogg_reference *temp=_fetch_ref(or->buffer->ptr.owner); + if(head) + head->next=temp; + else + ret=temp; + head=temp; + head->buffer=or->buffer; + head->begin=or->begin; + head->length=or->length; + or=or->next; + } + + ogg_buffer_mark(ret); + return ret; +} + +/* split a reference into two references; 'return' is a reference to + the buffer preceeding pos and 'head'/'tail' are the buffer past the + split. If pos is at or past the end of the passed in segment, + 'head/tail' are NULL */ +static ogg_reference *ogg_buffer_split(ogg_reference **tail, + ogg_reference **head,long pos){ + + /* walk past any preceeding fragments to one of: + a) the exact boundary that seps two fragments + b) the fragment that needs split somewhere in the middle */ + ogg_reference *ret=*tail; + ogg_reference *or=*tail; + + while(or && pos>or->length){ + pos-=or->length; + or=or->next; + } + + if(!or || pos==0){ + + return 0; + + }else{ + + if(pos>=or->length){ + /* exact split, or off the end? */ + if(or->next){ + + /* a split */ + *tail=or->next; + or->next=0; + + }else{ + + /* off or at the end */ + *tail=*head=0; + + } + }else{ + + /* split within a fragment */ + long lengthA=pos; + long beginB=or->begin+pos; + long lengthB=or->length-pos; + + /* make a new reference to tail the second piece */ + *tail=_fetch_ref(or->buffer->ptr.owner); + + (*tail)->buffer=or->buffer; + (*tail)->begin=beginB; + (*tail)->length=lengthB; + (*tail)->next=or->next; + _ogg_buffer_mark_one(*tail); + if(head && or==*head)*head=*tail; + + /* update the first piece */ + or->next=0; + or->length=lengthA; + + } + } + return ret; +} + +static void ogg_buffer_release_one(ogg_reference *or){ + ogg_buffer *ob=or->buffer; + ogg_buffer_state *bs=ob->ptr.owner; + + ob->refcount--; + if(ob->refcount==0){ + bs->outstanding--; /* for the returned buffer */ + ob->ptr.next=bs->unused_buffers; + bs->unused_buffers=ob; + } + + bs->outstanding--; /* for the returned reference */ + or->next=bs->unused_references; + bs->unused_references=or; + + _ogg_buffer_destroy(bs); /* lazy cleanup (if needed) */ + +} + +/* release the references, decrease the refcounts of buffers to which + they point, release any buffers with a refcount that drops to zero */ +static void ogg_buffer_release(ogg_reference *or){ + while(or){ + ogg_reference *next=or->next; + ogg_buffer_release_one(or); + or=next; + } +} + +static ogg_reference *ogg_buffer_pretruncate(ogg_reference *or,long pos){ + /* release preceeding fragments we don't want */ + while(or && pos>=or->length){ + ogg_reference *next=or->next; + pos-=or->length; + ogg_buffer_release_one(or); + or=next; + } + if (or) { + or->begin+=pos; + or->length-=pos; + } + return or; +} + +static ogg_reference *ogg_buffer_walk(ogg_reference *or){ + if(!or)return NULL; + while(or->next){ + or=or->next; + } + return(or); +} + +/* *head is appended to the front end (head) of *tail; both continue to + be valid pointers, with *tail at the tail and *head at the head */ +static ogg_reference *ogg_buffer_cat(ogg_reference *tail, ogg_reference *head){ + if(!tail)return head; + + while(tail->next){ + tail=tail->next; + } + tail->next=head; + return ogg_buffer_walk(head); +} + +static void _positionB(oggbyte_buffer *b,int pos){ + if(pospos){ + /* start at beginning, scan forward */ + b->ref=b->baseref; + b->pos=0; + b->end=b->pos+b->ref->length; + b->ptr=b->ref->buffer->data+b->ref->begin; + } +} + +static void _positionF(oggbyte_buffer *b,int pos){ + /* scan forward for position */ + while(pos>=b->end){ + /* just seek forward */ + b->pos+=b->ref->length; + b->ref=b->ref->next; + b->end=b->ref->length+b->pos; + b->ptr=b->ref->buffer->data+b->ref->begin; + } +} + +static int oggbyte_init(oggbyte_buffer *b,ogg_reference *or){ + memset(b,0,sizeof(*b)); + if(or){ + b->ref=b->baseref=or; + b->pos=0; + b->end=b->ref->length; + b->ptr=b->ref->buffer->data+b->ref->begin; + return 0; + }else + return -1; +} + +static void oggbyte_set4(oggbyte_buffer *b,ogg_uint32_t val,int pos){ + int i; + _positionB(b,pos); + for(i=0;i<4;i++){ + _positionF(b,pos); + b->ptr[pos-b->pos]=val; + val>>=8; + ++pos; + } +} + +static unsigned char oggbyte_read1(oggbyte_buffer *b,int pos){ + _positionB(b,pos); + _positionF(b,pos); + return b->ptr[pos-b->pos]; +} + +static ogg_uint32_t oggbyte_read4(oggbyte_buffer *b,int pos){ + ogg_uint32_t ret; + _positionB(b,pos); + _positionF(b,pos); + ret=b->ptr[pos-b->pos]; + _positionF(b,++pos); + ret|=b->ptr[pos-b->pos]<<8; + _positionF(b,++pos); + ret|=b->ptr[pos-b->pos]<<16; + _positionF(b,++pos); + ret|=b->ptr[pos-b->pos]<<24; + return ret; +} + +static ogg_int64_t oggbyte_read8(oggbyte_buffer *b,int pos){ + ogg_int64_t ret; + unsigned char t[7]; + int i; + _positionB(b,pos); + for(i=0;i<7;i++){ + _positionF(b,pos); + t[i]=b->ptr[pos++ -b->pos]; + } + + _positionF(b,pos); + ret=b->ptr[pos-b->pos]; + + for(i=6;i>=0;--i) + ret= ret<<8 | t[i]; + + return ret; +} + +/* Now we get to the actual framing code */ + +int ogg_page_version(ogg_page *og){ + oggbyte_buffer ob; + oggbyte_init(&ob,og->header); + return oggbyte_read1(&ob,4); +} + +int ogg_page_continued(ogg_page *og){ + oggbyte_buffer ob; + oggbyte_init(&ob,og->header); + return oggbyte_read1(&ob,5)&0x01; +} + +int ogg_page_bos(ogg_page *og){ + oggbyte_buffer ob; + oggbyte_init(&ob,og->header); + return oggbyte_read1(&ob,5)&0x02; +} + +int ogg_page_eos(ogg_page *og){ + oggbyte_buffer ob; + oggbyte_init(&ob,og->header); + return oggbyte_read1(&ob,5)&0x04; +} + +ogg_int64_t ogg_page_granulepos(ogg_page *og){ + oggbyte_buffer ob; + oggbyte_init(&ob,og->header); + return oggbyte_read8(&ob,6); +} + +ogg_uint32_t ogg_page_serialno(ogg_page *og){ + oggbyte_buffer ob; + oggbyte_init(&ob,og->header); + return oggbyte_read4(&ob,14); +} + +ogg_uint32_t ogg_page_pageno(ogg_page *og){ + oggbyte_buffer ob; + oggbyte_init(&ob,og->header); + return oggbyte_read4(&ob,18); +} + +/* returns the number of packets that are completed on this page (if + the leading packet is begun on a previous page, but ends on this + page, it's counted */ + +/* NOTE: +If a page consists of a packet begun on a previous page, and a new +packet begun (but not completed) on this page, the return will be: + ogg_page_packets(page) ==1, + ogg_page_continued(page) !=0 + +If a page happens to be a single packet that was begun on a +previous page, and spans to the next page (in the case of a three or +more page packet), the return will be: + ogg_page_packets(page) ==0, + ogg_page_continued(page) !=0 +*/ + +int ogg_page_packets(ogg_page *og){ + int i; + int n; + int count=0; + oggbyte_buffer ob; + oggbyte_init(&ob,og->header); + + n=oggbyte_read1(&ob,26); + for(i=0;ibufferpool=ogg_buffer_create(); + return oy; +} + +int ogg_sync_destroy(ogg_sync_state *oy){ + if(oy){ + ogg_sync_reset(oy); + ogg_buffer_destroy(oy->bufferpool); + memset(oy,0,sizeof(*oy)); + _ogg_free(oy); + } + return OGG_SUCCESS; +} + +unsigned char *ogg_sync_bufferin(ogg_sync_state *oy, long bytes){ + + /* [allocate and] expose a buffer for data submission. + + If there is no head fragment + allocate one and expose it + else + if the current head fragment has sufficient unused space + expose it + else + if the current head fragment is unused + resize and expose it + else + allocate new fragment and expose it + */ + + /* base case; fifo uninitialized */ + if(!oy->fifo_head){ + oy->fifo_head=oy->fifo_tail=ogg_buffer_alloc(oy->bufferpool,bytes); + return oy->fifo_head->buffer->data; + } + + /* space left in current fragment case */ + if(oy->fifo_head->buffer->size- + oy->fifo_head->length- + oy->fifo_head->begin >= bytes) + return oy->fifo_head->buffer->data+ + oy->fifo_head->length+oy->fifo_head->begin; + + /* current fragment is unused, but too small */ + if(!oy->fifo_head->length){ + ogg_buffer_realloc(oy->fifo_head,bytes); + return oy->fifo_head->buffer->data+oy->fifo_head->begin; + } + + /* current fragment used/full; get new fragment */ + { + ogg_reference *new=ogg_buffer_alloc(oy->bufferpool,bytes); + oy->fifo_head->next=new; + oy->fifo_head=new; + } + return oy->fifo_head->buffer->data; +} + +int ogg_sync_wrote(ogg_sync_state *oy, long bytes){ + if(!oy->fifo_head)return OGG_EINVAL; + if(oy->fifo_head->buffer->size-oy->fifo_head->length-oy->fifo_head->begin < + bytes)return OGG_EINVAL; + oy->fifo_head->length+=bytes; + oy->fifo_fill+=bytes; + return OGG_SUCCESS; +} + +static ogg_uint32_t _checksum(ogg_reference *or, int bytes){ + ogg_uint32_t crc_reg=0; + int j,post; + + while(or){ + unsigned char *data=or->buffer->data+or->begin; + post=(byteslength?bytes:or->length); + for(j=0;j> 24)&0xff)^data[j]]; + bytes-=j; + or=or->next; + } + + return crc_reg; +} + + +/* sync the stream. This is meant to be useful for finding page + boundaries. + + return values for this: + -n) skipped n bytes + 0) page not ready; more data (no bytes skipped) + n) page synced at current location; page length n bytes + +*/ + +long ogg_sync_pageseek(ogg_sync_state *oy,ogg_page *og){ + oggbyte_buffer page; + long bytes,ret=0; + + ogg_page_release(og); + + bytes=oy->fifo_fill; + oggbyte_init(&page,oy->fifo_tail); + + if(oy->headerbytes==0){ + if(bytes<27)goto sync_out; /* not enough for even a minimal header */ + + /* verify capture pattern */ + if(oggbyte_read1(&page,0)!=(int)'O' || + oggbyte_read1(&page,1)!=(int)'g' || + oggbyte_read1(&page,2)!=(int)'g' || + oggbyte_read1(&page,3)!=(int)'S' ) goto sync_fail; + + oy->headerbytes=oggbyte_read1(&page,26)+27; + } + if(bytesheaderbytes)goto sync_out; /* not enough for header + + seg table */ + if(oy->bodybytes==0){ + int i; + /* count up body length in the segment table */ + for(i=0;iheaderbytes-27;i++) + oy->bodybytes+=oggbyte_read1(&page,27+i); + } + + if(oy->bodybytes+oy->headerbytes>bytes)goto sync_out; + + /* we have what appears to be a complete page; last test: verify + checksum */ + { + ogg_uint32_t chksum=oggbyte_read4(&page,22); + oggbyte_set4(&page,0,22); + + /* Compare checksums; memory continues to be common access */ + if(chksum!=_checksum(oy->fifo_tail,oy->bodybytes+oy->headerbytes)){ + + /* D'oh. Mismatch! Corrupt page (or miscapture and not a page + at all). replace the computed checksum with the one actually + read in; remember all the memory is common access */ + + oggbyte_set4(&page,chksum,22); + goto sync_fail; + } + oggbyte_set4(&page,chksum,22); + } + + /* We have a page. Set up page return. */ + if(og){ + /* set up page output */ + og->header=ogg_buffer_split(&oy->fifo_tail,&oy->fifo_head,oy->headerbytes); + og->header_len=oy->headerbytes; + og->body=ogg_buffer_split(&oy->fifo_tail,&oy->fifo_head,oy->bodybytes); + og->body_len=oy->bodybytes; + }else{ + /* simply advance */ + oy->fifo_tail= + ogg_buffer_pretruncate(oy->fifo_tail,oy->headerbytes+oy->bodybytes); + if(!oy->fifo_tail)oy->fifo_head=0; + } + + ret=oy->headerbytes+oy->bodybytes; + oy->unsynced=0; + oy->headerbytes=0; + oy->bodybytes=0; + oy->fifo_fill-=ret; + + return ret; + + sync_fail: + + oy->headerbytes=0; + oy->bodybytes=0; + oy->fifo_tail=ogg_buffer_pretruncate(oy->fifo_tail,1); + ret--; + + /* search forward through fragments for possible capture */ + while(oy->fifo_tail){ + /* invariant: fifo_cursor points to a position in fifo_tail */ + unsigned char *now=oy->fifo_tail->buffer->data+oy->fifo_tail->begin; + unsigned char *next=memchr(now, 'O', oy->fifo_tail->length); + + if(next){ + /* possible capture in this segment */ + long bytes=next-now; + oy->fifo_tail=ogg_buffer_pretruncate(oy->fifo_tail,bytes); + ret-=bytes; + break; + }else{ + /* no capture. advance to next segment */ + long bytes=oy->fifo_tail->length; + ret-=bytes; + oy->fifo_tail=ogg_buffer_pretruncate(oy->fifo_tail,bytes); + } + } + if(!oy->fifo_tail)oy->fifo_head=0; + oy->fifo_fill+=ret; + + sync_out: + return ret; +} + +/* sync the stream and get a page. Keep trying until we find a page. + Supress 'sync errors' after reporting the first. + + return values: + OGG_HOLE) recapture (hole in data) + 0) need more data + 1) page returned + + Returns pointers into buffered data; invalidated by next call to + _stream, _clear, _init, or _buffer */ + +int ogg_sync_pageout(ogg_sync_state *oy, ogg_page *og){ + + /* all we need to do is verify a page at the head of the stream + buffer. If it doesn't verify, we look for the next potential + frame */ + + while(1){ + long ret=ogg_sync_pageseek(oy,og); + if(ret>0){ + /* have a page */ + return 1; + } + if(ret==0){ + /* need more data */ + return 0; + } + + /* head did not start a synced page... skipped some bytes */ + if(!oy->unsynced){ + oy->unsynced=1; + return OGG_HOLE; + } + + /* loop. keep looking */ + + } +} + +/* clear things to an initial state. Good to call, eg, before seeking */ +int ogg_sync_reset(ogg_sync_state *oy){ + + ogg_buffer_release(oy->fifo_tail); + oy->fifo_tail=0; + oy->fifo_head=0; + oy->fifo_fill=0; + + oy->unsynced=0; + oy->headerbytes=0; + oy->bodybytes=0; + return OGG_SUCCESS; +} + +ogg_stream_state *ogg_stream_create(int serialno){ + ogg_stream_state *os=_ogg_calloc(1,sizeof(*os)); + os->serialno=serialno; + os->pageno=-1; + return os; +} + +int ogg_stream_destroy(ogg_stream_state *os){ + if(os){ + ogg_buffer_release(os->header_tail); + ogg_buffer_release(os->body_tail); + memset(os,0,sizeof(*os)); + _ogg_free(os); + } + return OGG_SUCCESS; +} + + +#define FINFLAG 0x80000000UL +#define FINMASK 0x7fffffffUL + +static void _next_lace(oggbyte_buffer *ob,ogg_stream_state *os){ + /* search ahead one lace */ + os->body_fill_next=0; + while(os->laceptrlacing_fill){ + int val=oggbyte_read1(ob,27+os->laceptr++); + os->body_fill_next+=val; + if(val<255){ + os->body_fill_next|=FINFLAG; + os->clearflag=1; + break; + } + } +} + +static void _span_queued_page(ogg_stream_state *os){ + while( !(os->body_fill&FINFLAG) ){ + + if(!os->header_tail)break; + + /* first flush out preceeding page header (if any). Body is + flushed as it's consumed, so that's not done here. */ + + if(os->lacing_fill>=0) + os->header_tail=ogg_buffer_pretruncate(os->header_tail, + os->lacing_fill+27); + os->lacing_fill=0; + os->laceptr=0; + os->clearflag=0; + + if(!os->header_tail){ + os->header_head=0; + break; + }else{ + + /* process/prepare next page, if any */ + + long pageno; + oggbyte_buffer ob; + ogg_page og; /* only for parsing header values */ + og.header=os->header_tail; /* only for parsing header values */ + pageno=ogg_page_pageno(&og); + + oggbyte_init(&ob,os->header_tail); + os->lacing_fill=oggbyte_read1(&ob,26); + + /* are we in sequence? */ + if(pageno!=os->pageno){ + if(os->pageno==-1) /* indicates seek or reset */ + os->holeflag=1; /* set for internal use */ + else + os->holeflag=2; /* set for external reporting */ + + os->body_tail=ogg_buffer_pretruncate(os->body_tail, + os->body_fill); + if(os->body_tail==0)os->body_head=0; + os->body_fill=0; + + } + + if(ogg_page_continued(&og)){ + if(os->body_fill==0){ + /* continued packet, but no preceeding data to continue */ + /* dump the first partial packet on the page */ + _next_lace(&ob,os); + os->body_tail= + ogg_buffer_pretruncate(os->body_tail,os->body_fill_next&FINMASK); + if(os->body_tail==0)os->body_head=0; + /* set span flag */ + if(!os->spanflag && !os->holeflag)os->spanflag=2; + } + }else{ + if(os->body_fill>0){ + /* preceeding data to continue, but not a continued page */ + /* dump body_fill */ + os->body_tail=ogg_buffer_pretruncate(os->body_tail, + os->body_fill); + if(os->body_tail==0)os->body_head=0; + os->body_fill=0; + + /* set espan flag */ + if(!os->spanflag && !os->holeflag)os->spanflag=2; + } + } + + if(os->laceptrlacing_fill){ + os->granulepos=ogg_page_granulepos(&og); + + /* get current packet size & flag */ + _next_lace(&ob,os); + os->body_fill+=os->body_fill_next; /* addition handles the flag fine; + unsigned on purpose */ + /* ...and next packet size & flag */ + _next_lace(&ob,os); + + } + + os->pageno=pageno+1; + os->e_o_s=ogg_page_eos(&og); + os->b_o_s=ogg_page_bos(&og); + + } + } +} + +/* add the incoming page to the stream state; we decompose the page + into packet segments here as well. */ + +int ogg_stream_pagein(ogg_stream_state *os, ogg_page *og){ + + int serialno=ogg_page_serialno(og); + int version=ogg_page_version(og); + + /* check the serial number */ + if(serialno!=os->serialno){ + ogg_page_release(og); + return OGG_ESERIAL; + } + if(version>0){ + ogg_page_release(og); + return OGG_EVERSION; + } + + /* add to fifos */ + if(!os->body_tail){ + os->body_tail=og->body; + os->body_head=ogg_buffer_walk(og->body); + }else{ + os->body_head=ogg_buffer_cat(os->body_head,og->body); + } + if(!os->header_tail){ + os->header_tail=og->header; + os->header_head=ogg_buffer_walk(og->header); + os->lacing_fill=-27; + }else{ + os->header_head=ogg_buffer_cat(os->header_head,og->header); + } + + memset(og,0,sizeof(*og)); + return OGG_SUCCESS; +} + +int ogg_stream_reset(ogg_stream_state *os){ + + ogg_buffer_release(os->header_tail); + ogg_buffer_release(os->body_tail); + os->header_tail=os->header_head=0; + os->body_tail=os->body_head=0; + + os->e_o_s=0; + os->b_o_s=0; + os->pageno=-1; + os->packetno=0; + os->granulepos=0; + + os->body_fill=0; + os->lacing_fill=0; + + os->holeflag=0; + os->spanflag=0; + os->clearflag=0; + os->laceptr=0; + os->body_fill_next=0; + + return OGG_SUCCESS; +} + +int ogg_stream_reset_serialno(ogg_stream_state *os,int serialno){ + ogg_stream_reset(os); + os->serialno=serialno; + return OGG_SUCCESS; +} + +static int _packetout(ogg_stream_state *os,ogg_packet *op,int adv){ + + ogg_packet_release(op); + _span_queued_page(os); + + if(os->holeflag){ + int temp=os->holeflag; + if(os->clearflag) + os->holeflag=0; + else + os->holeflag=1; + if(temp==2){ + os->packetno++; + return OGG_HOLE; + } + } + if(os->spanflag){ + int temp=os->spanflag; + if(os->clearflag) + os->spanflag=0; + else + os->spanflag=1; + if(temp==2){ + os->packetno++; + return OGG_SPAN; + } + } + + if(!(os->body_fill&FINFLAG)) return 0; + if(!op && !adv)return 1; /* just using peek as an inexpensive way + to ask if there's a whole packet + waiting */ + if(op){ + op->b_o_s=os->b_o_s; + if(os->e_o_s && os->body_fill_next==0) + op->e_o_s=os->e_o_s; + else + op->e_o_s=0; + if( (os->body_fill&FINFLAG) && !(os->body_fill_next&FINFLAG) ) + op->granulepos=os->granulepos; + else + op->granulepos=-1; + op->packetno=os->packetno; + } + + if(adv){ + oggbyte_buffer ob; + oggbyte_init(&ob,os->header_tail); + + /* split the body contents off */ + if(op){ + op->packet=ogg_buffer_split(&os->body_tail,&os->body_head, + os->body_fill&FINMASK); + op->bytes=os->body_fill&FINMASK; + }else{ + os->body_tail=ogg_buffer_pretruncate(os->body_tail, + os->body_fill&FINMASK); + if(os->body_tail==0)os->body_head=0; + } + + /* update lacing pointers */ + os->body_fill=os->body_fill_next; + _next_lace(&ob,os); + }else{ + if(op){ + op->packet=ogg_buffer_sub(os->body_tail,0,os->body_fill&FINMASK); + op->bytes=os->body_fill&FINMASK; + } + } + + if(adv){ + os->packetno++; + os->b_o_s=0; + } + + return 1; +} + +int ogg_stream_packetout(ogg_stream_state *os,ogg_packet *op){ + return _packetout(os,op,1); +} + +int ogg_stream_packetpeek(ogg_stream_state *os,ogg_packet *op){ + return _packetout(os,op,0); +} + +int ogg_packet_release(ogg_packet *op) { + if(op){ + ogg_buffer_release(op->packet); + memset(op, 0, sizeof(*op)); + } + return OGG_SUCCESS; +} + +int ogg_page_release(ogg_page *og) { + if(og){ + ogg_buffer_release(og->header); + ogg_buffer_release(og->body); + memset(og, 0, sizeof(*og)); + } + return OGG_SUCCESS; +} + +void ogg_page_dup(ogg_page *dup,ogg_page *orig){ + dup->header_len=orig->header_len; + dup->body_len=orig->body_len; + dup->header=ogg_buffer_dup(orig->header); + dup->body=ogg_buffer_dup(orig->body); +} + diff --git a/genplus-gx/core/tremor/info.c b/genplus-gx/core/tremor/info.c new file mode 100644 index 0000000000..200e5f95f9 --- /dev/null +++ b/genplus-gx/core/tremor/info.c @@ -0,0 +1,356 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2003 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: maintain the info structure, info <-> header packets + + ********************************************************************/ + +/* general handling of the header and the vorbis_info structure (and + substructures) */ + +#include +#include +#include +#include "ogg.h" +#include "ivorbiscodec.h" +#include "codec_internal.h" +#include "codebook.h" +#include "registry.h" +#include "window.h" +#include "misc.h" + +/* helpers */ +static void _v_readstring(oggpack_buffer *o,char *buf,int bytes){ + while(bytes--){ + *buf++=oggpack_read(o,8); + } +} + +void vorbis_comment_init(vorbis_comment *vc){ + memset(vc,0,sizeof(*vc)); +} + +/* This is more or less the same as strncasecmp - but that doesn't exist + * everywhere, and this is a fairly trivial function, so we include it */ +static int tagcompare(const char *s1, const char *s2, int n){ + int c=0; + while(c < n){ + if(toupper((int)s1[c]) != toupper((int)s2[c])) + return !0; + c++; + } + return 0; +} + +char *vorbis_comment_query(vorbis_comment *vc, char *tag, int count){ + long i; + int found = 0; + int taglen = strlen(tag)+1; /* +1 for the = we append */ + char *fulltag = (char *)alloca(taglen+ 1); + + strcpy(fulltag, tag); + strcat(fulltag, "="); + + for(i=0;icomments;i++){ + if(!tagcompare(vc->user_comments[i], fulltag, taglen)){ + if(count == found) + /* We return a pointer to the data, not a copy */ + return vc->user_comments[i] + taglen; + else + found++; + } + } + return NULL; /* didn't find anything */ +} + +int vorbis_comment_query_count(vorbis_comment *vc, char *tag){ + int i,count=0; + int taglen = strlen(tag)+1; /* +1 for the = we append */ + char *fulltag = (char *)alloca(taglen+1); + strcpy(fulltag,tag); + strcat(fulltag, "="); + + for(i=0;icomments;i++){ + if(!tagcompare(vc->user_comments[i], fulltag, taglen)) + count++; + } + + return count; +} + +void vorbis_comment_clear(vorbis_comment *vc){ + if(vc){ + long i; + for(i=0;icomments;i++) + if(vc->user_comments[i])_ogg_free(vc->user_comments[i]); + if(vc->user_comments)_ogg_free(vc->user_comments); + if(vc->comment_lengths)_ogg_free(vc->comment_lengths); + if(vc->vendor)_ogg_free(vc->vendor); + memset(vc,0,sizeof(*vc)); + } +} + +/* blocksize 0 is guaranteed to be short, 1 is guarantted to be long. + They may be equal, but short will never ge greater than long */ +int vorbis_info_blocksize(vorbis_info *vi,int zo){ + codec_setup_info *ci = (codec_setup_info *)vi->codec_setup; + return ci ? ci->blocksizes[zo] : -1; +} + +/* used by synthesis, which has a full, alloced vi */ +void vorbis_info_init(vorbis_info *vi){ + memset(vi,0,sizeof(*vi)); + vi->codec_setup=(codec_setup_info *)_ogg_calloc(1,sizeof(codec_setup_info)); +} + +void vorbis_info_clear(vorbis_info *vi){ + codec_setup_info *ci=(codec_setup_info *)vi->codec_setup; + int i; + + if(ci){ + + for(i=0;imodes;i++) + if(ci->mode_param[i])_ogg_free(ci->mode_param[i]); + + for(i=0;imaps;i++) /* unpack does the range checking */ + if(ci->map_param[i]) + _mapping_P[ci->map_type[i]]->free_info(ci->map_param[i]); + + for(i=0;ifloors;i++) /* unpack does the range checking */ + if(ci->floor_param[i]) + _floor_P[ci->floor_type[i]]->free_info(ci->floor_param[i]); + + for(i=0;iresidues;i++) /* unpack does the range checking */ + if(ci->residue_param[i]) + _residue_P[ci->residue_type[i]]->free_info(ci->residue_param[i]); + + for(i=0;ibooks;i++){ + if(ci->book_param[i]){ + /* knows if the book was not alloced */ + vorbis_staticbook_destroy(ci->book_param[i]); + } + if(ci->fullbooks) + vorbis_book_clear(ci->fullbooks+i); + } + if(ci->fullbooks) + _ogg_free(ci->fullbooks); + + _ogg_free(ci); + } + + memset(vi,0,sizeof(*vi)); +} + +/* Header packing/unpacking ********************************************/ + +static int _vorbis_unpack_info(vorbis_info *vi,oggpack_buffer *opb){ + codec_setup_info *ci=(codec_setup_info *)vi->codec_setup; + if(!ci)return(OV_EFAULT); + + vi->version=oggpack_read(opb,32); + if(vi->version!=0)return(OV_EVERSION); + + vi->channels=oggpack_read(opb,8); + vi->rate=oggpack_read(opb,32); + + vi->bitrate_upper=oggpack_read(opb,32); + vi->bitrate_nominal=oggpack_read(opb,32); + vi->bitrate_lower=oggpack_read(opb,32); + + ci->blocksizes[0]=1<blocksizes[1]=1<rate<1)goto err_out; + if(vi->channels<1)goto err_out; + if(ci->blocksizes[0]<64)goto err_out; + if(ci->blocksizes[1]blocksizes[0])goto err_out; + if(ci->blocksizes[1]>8192)goto err_out; + + if(oggpack_read(opb,1)!=1)goto err_out; /* EOP check */ + + return(0); + err_out: + vorbis_info_clear(vi); + return(OV_EBADHEADER); +} + +static int _vorbis_unpack_comment(vorbis_comment *vc,oggpack_buffer *opb){ + int i; + int vendorlen=oggpack_read(opb,32); + if(vendorlen<0)goto err_out; + vc->vendor=(char *)_ogg_calloc(vendorlen+1,1); + _v_readstring(opb,vc->vendor,vendorlen); + vc->comments=oggpack_read(opb,32); + if(vc->comments<0)goto err_out; + vc->user_comments=(char **)_ogg_calloc(vc->comments+1,sizeof(*vc->user_comments)); + vc->comment_lengths=(int *)_ogg_calloc(vc->comments+1, sizeof(*vc->comment_lengths)); + + for(i=0;icomments;i++){ + int len=oggpack_read(opb,32); + if(len<0)goto err_out; + vc->comment_lengths[i]=len; + vc->user_comments[i]=(char *)_ogg_calloc(len+1,1); + _v_readstring(opb,vc->user_comments[i],len); + } + if(oggpack_read(opb,1)!=1)goto err_out; /* EOP check */ + + return(0); + err_out: + vorbis_comment_clear(vc); + return(OV_EBADHEADER); +} + +/* all of the real encoding details are here. The modes, books, + everything */ +static int _vorbis_unpack_books(vorbis_info *vi,oggpack_buffer *opb){ + codec_setup_info *ci=(codec_setup_info *)vi->codec_setup; + int i; + if(!ci)return(OV_EFAULT); + + /* codebooks */ + ci->books=oggpack_read(opb,8)+1; + /*ci->book_param=_ogg_calloc(ci->books,sizeof(*ci->book_param));*/ + for(i=0;ibooks;i++){ + ci->book_param[i]=(static_codebook *)_ogg_calloc(1,sizeof(*ci->book_param[i])); + if(vorbis_staticbook_unpack(opb,ci->book_param[i]))goto err_out; + } + + /* time backend settings */ + ci->times=oggpack_read(opb,6)+1; + /*ci->time_type=_ogg_malloc(ci->times*sizeof(*ci->time_type));*/ + /*ci->time_param=_ogg_calloc(ci->times,sizeof(void *));*/ + for(i=0;itimes;i++){ + ci->time_type[i]=oggpack_read(opb,16); + if(ci->time_type[i]<0 || ci->time_type[i]>=VI_TIMEB)goto err_out; + /* ci->time_param[i]=_time_P[ci->time_type[i]]->unpack(vi,opb); + Vorbis I has no time backend */ + /*if(!ci->time_param[i])goto err_out;*/ + } + + /* floor backend settings */ + ci->floors=oggpack_read(opb,6)+1; + /*ci->floor_type=_ogg_malloc(ci->floors*sizeof(*ci->floor_type));*/ + /*ci->floor_param=_ogg_calloc(ci->floors,sizeof(void *));*/ + for(i=0;ifloors;i++){ + ci->floor_type[i]=oggpack_read(opb,16); + if(ci->floor_type[i]<0 || ci->floor_type[i]>=VI_FLOORB)goto err_out; + ci->floor_param[i]=_floor_P[ci->floor_type[i]]->unpack(vi,opb); + if(!ci->floor_param[i])goto err_out; + } + + /* residue backend settings */ + ci->residues=oggpack_read(opb,6)+1; + /*ci->residue_type=_ogg_malloc(ci->residues*sizeof(*ci->residue_type));*/ + /*ci->residue_param=_ogg_calloc(ci->residues,sizeof(void *));*/ + for(i=0;iresidues;i++){ + ci->residue_type[i]=oggpack_read(opb,16); + if(ci->residue_type[i]<0 || ci->residue_type[i]>=VI_RESB)goto err_out; + ci->residue_param[i]=_residue_P[ci->residue_type[i]]->unpack(vi,opb); + if(!ci->residue_param[i])goto err_out; + } + + /* map backend settings */ + ci->maps=oggpack_read(opb,6)+1; + /*ci->map_type=_ogg_malloc(ci->maps*sizeof(*ci->map_type));*/ + /*ci->map_param=_ogg_calloc(ci->maps,sizeof(void *));*/ + for(i=0;imaps;i++){ + ci->map_type[i]=oggpack_read(opb,16); + if(ci->map_type[i]<0 || ci->map_type[i]>=VI_MAPB)goto err_out; + ci->map_param[i]=_mapping_P[ci->map_type[i]]->unpack(vi,opb); + if(!ci->map_param[i])goto err_out; + } + + /* mode settings */ + ci->modes=oggpack_read(opb,6)+1; + /*vi->mode_param=_ogg_calloc(vi->modes,sizeof(void *));*/ + for(i=0;imodes;i++){ + ci->mode_param[i]=(vorbis_info_mode *)_ogg_calloc(1,sizeof(*ci->mode_param[i])); + ci->mode_param[i]->blockflag=oggpack_read(opb,1); + ci->mode_param[i]->windowtype=oggpack_read(opb,16); + ci->mode_param[i]->transformtype=oggpack_read(opb,16); + ci->mode_param[i]->mapping=oggpack_read(opb,8); + + if(ci->mode_param[i]->windowtype>=VI_WINDOWB)goto err_out; + if(ci->mode_param[i]->transformtype>=VI_WINDOWB)goto err_out; + if(ci->mode_param[i]->mapping>=ci->maps)goto err_out; + } + + if(oggpack_read(opb,1)!=1)goto err_out; /* top level EOP check */ + + return(0); + err_out: + vorbis_info_clear(vi); + return(OV_EBADHEADER); +} + +/* The Vorbis header is in three packets; the initial small packet in + the first page that identifies basic parameters, a second packet + with bitstream comments and a third packet that holds the + codebook. */ + +int vorbis_synthesis_headerin(vorbis_info *vi,vorbis_comment *vc,ogg_packet *op){ + oggpack_buffer opb; + + if(op){ + oggpack_readinit(&opb,op->packet); + + /* Which of the three types of header is this? */ + /* Also verify header-ness, vorbis */ + { + char buffer[6]; + int packtype=oggpack_read(&opb,8); + memset(buffer,0,6); + _v_readstring(&opb,buffer,6); + if(memcmp(buffer,"vorbis",6)){ + /* not a vorbis header */ + return(OV_ENOTVORBIS); + } + switch(packtype){ + case 0x01: /* least significant *bit* is read first */ + if(!op->b_o_s){ + /* Not the initial packet */ + return(OV_EBADHEADER); + } + if(vi->rate!=0){ + /* previously initialized info header */ + return(OV_EBADHEADER); + } + + return(_vorbis_unpack_info(vi,&opb)); + + case 0x03: /* least significant *bit* is read first */ + if(vi->rate==0){ + /* um... we didn't get the initial header */ + return(OV_EBADHEADER); + } + + return(_vorbis_unpack_comment(vc,&opb)); + + case 0x05: /* least significant *bit* is read first */ + if(vi->rate==0 || vc->vendor==NULL){ + /* um... we didn;t get the initial header or comments yet */ + return(OV_EBADHEADER); + } + + return(_vorbis_unpack_books(vi,&opb)); + + default: + /* Not a valid vorbis header type */ + return(OV_EBADHEADER); + break; + } + } + } + return(OV_EBADHEADER); +} + diff --git a/genplus-gx/core/tremor/ivorbiscodec.h b/genplus-gx/core/tremor/ivorbiscodec.h new file mode 100644 index 0000000000..d4de1fd344 --- /dev/null +++ b/genplus-gx/core/tremor/ivorbiscodec.h @@ -0,0 +1,202 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: libvorbis codec headers + + ********************************************************************/ + +#ifndef _vorbis_codec_h_ +#define _vorbis_codec_h_ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +#include "ogg.h" + +typedef struct vorbis_info{ + int version; + int channels; + long rate; + + /* The below bitrate declarations are *hints*. + Combinations of the three values carry the following implications: + + all three set to the same value: + implies a fixed rate bitstream + only nominal set: + implies a VBR stream that averages the nominal bitrate. No hard + upper/lower limit + upper and or lower set: + implies a VBR bitstream that obeys the bitrate limits. nominal + may also be set to give a nominal rate. + none set: + the coder does not care to speculate. + */ + + long bitrate_upper; + long bitrate_nominal; + long bitrate_lower; + long bitrate_window; + + void *codec_setup; +} vorbis_info; + +/* vorbis_dsp_state buffers the current vorbis audio + analysis/synthesis state. The DSP state belongs to a specific + logical bitstream ****************************************************/ +typedef struct vorbis_dsp_state{ + int analysisp; + vorbis_info *vi; + + ogg_int32_t **pcm; + ogg_int32_t **pcmret; + int pcm_storage; + int pcm_current; + int pcm_returned; + + int preextrapolate; + int eofflag; + + long lW; + long W; + long nW; + long centerW; + + ogg_int64_t granulepos; + ogg_int64_t sequence; + + void *backend_state; +} vorbis_dsp_state; + +typedef struct vorbis_block{ + /* necessary stream state for linking to the framing abstraction */ + ogg_int32_t **pcm; /* this is a pointer into local storage */ + oggpack_buffer opb; + + long lW; + long W; + long nW; + int pcmend; + int mode; + + int eofflag; + ogg_int64_t granulepos; + ogg_int64_t sequence; + vorbis_dsp_state *vd; /* For read-only access of configuration */ + + /* local storage to avoid remallocing; it's up to the mapping to + structure it */ + void *localstore; + long localtop; + long localalloc; + long totaluse; + struct alloc_chain *reap; + +} vorbis_block; + +/* vorbis_block is a single block of data to be processed as part of +the analysis/synthesis stream; it belongs to a specific logical +bitstream, but is independant from other vorbis_blocks belonging to +that logical bitstream. *************************************************/ + +struct alloc_chain{ + void *ptr; + struct alloc_chain *next; +}; + +/* vorbis_info contains all the setup information specific to the + specific compression/decompression mode in progress (eg, + psychoacoustic settings, channel setup, options, codebook + etc). vorbis_info and substructures are in backends.h. +*********************************************************************/ + +/* the comments are not part of vorbis_info so that vorbis_info can be + static storage */ +typedef struct vorbis_comment{ + /* unlimited user comment fields. libvorbis writes 'libvorbis' + whatever vendor is set to in encode */ + char **user_comments; + int *comment_lengths; + int comments; + char *vendor; + +} vorbis_comment; + + +/* libvorbis encodes in two abstraction layers; first we perform DSP + and produce a packet (see docs/analysis.txt). The packet is then + coded into a framed OggSquish bitstream by the second layer (see + docs/framing.txt). Decode is the reverse process; we sync/frame + the bitstream and extract individual packets, then decode the + packet back into PCM audio. + + The extra framing/packetizing is used in streaming formats, such as + files. Over the net (such as with UDP), the framing and + packetization aren't necessary as they're provided by the transport + and the streaming layer is not used */ + +/* Vorbis PRIMITIVES: general ***************************************/ + +extern void vorbis_info_init(vorbis_info *vi); +extern void vorbis_info_clear(vorbis_info *vi); +extern int vorbis_info_blocksize(vorbis_info *vi,int zo); +extern void vorbis_comment_init(vorbis_comment *vc); +extern void vorbis_comment_add(vorbis_comment *vc, char *comment); +extern void vorbis_comment_add_tag(vorbis_comment *vc, + char *tag, char *contents); +extern char *vorbis_comment_query(vorbis_comment *vc, char *tag, int count); +extern int vorbis_comment_query_count(vorbis_comment *vc, char *tag); +extern void vorbis_comment_clear(vorbis_comment *vc); + +extern int vorbis_block_init(vorbis_dsp_state *v, vorbis_block *vb); +extern int vorbis_block_clear(vorbis_block *vb); +extern void vorbis_dsp_clear(vorbis_dsp_state *v); + +/* Vorbis PRIMITIVES: synthesis layer *******************************/ +extern int vorbis_synthesis_headerin(vorbis_info *vi,vorbis_comment *vc, + ogg_packet *op); + +extern int vorbis_synthesis_init(vorbis_dsp_state *v,vorbis_info *vi); +extern int vorbis_synthesis_restart(vorbis_dsp_state *v); +extern int vorbis_synthesis(vorbis_block *vb,ogg_packet *op,int decodep); +extern int vorbis_synthesis_blockin(vorbis_dsp_state *v,vorbis_block *vb); +extern int vorbis_synthesis_pcmout(vorbis_dsp_state *v,ogg_int32_t ***pcm); +extern int vorbis_synthesis_read(vorbis_dsp_state *v,int samples); +extern long vorbis_packet_blocksize(vorbis_info *vi,ogg_packet *op); + +/* Vorbis ERRORS and return codes ***********************************/ + +#define OV_FALSE -1 +#define OV_EOF -2 +#define OV_HOLE -3 + +#define OV_EREAD -128 +#define OV_EFAULT -129 +#define OV_EIMPL -130 +#define OV_EINVAL -131 +#define OV_ENOTVORBIS -132 +#define OV_EBADHEADER -133 +#define OV_EVERSION -134 +#define OV_ENOTAUDIO -135 +#define OV_EBADPACKET -136 +#define OV_EBADLINK -137 +#define OV_ENOSEEK -138 + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif + diff --git a/genplus-gx/core/tremor/ivorbisfile.h b/genplus-gx/core/tremor/ivorbisfile.h new file mode 100644 index 0000000000..dd773788a1 --- /dev/null +++ b/genplus-gx/core/tremor/ivorbisfile.h @@ -0,0 +1,130 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: stdio-based convenience library for opening/seeking/decoding + + ********************************************************************/ + +#ifndef _OV_FILE_H_ +#define _OV_FILE_H_ + +#ifdef __cplusplus +extern "C" +{ +#endif /* __cplusplus */ + +#include +#include "ivorbiscodec.h" + +#define CHUNKSIZE 1024 +/* The function prototypes for the callbacks are basically the same as for + * the stdio functions fread, fseek, fclose, ftell. + * The one difference is that the FILE * arguments have been replaced with + * a void * - this is to be used as a pointer to whatever internal data these + * functions might need. In the stdio case, it's just a FILE * cast to a void * + * + * If you use other functions, check the docs for these functions and return + * the right values. For seek_func(), you *MUST* return -1 if the stream is + * unseekable + */ +typedef struct { + size_t (*read_func) (void *ptr, size_t size, size_t nmemb, void *datasource); + int (*seek_func) (void *datasource, ogg_int64_t offset, int whence); + int (*close_func) (void *datasource); + long (*tell_func) (void *datasource); +} ov_callbacks; + +#define NOTOPEN 0 +#define PARTOPEN 1 +#define OPENED 2 +#define STREAMSET 3 +#define INITSET 4 + +typedef struct OggVorbis_File { + void *datasource; /* Pointer to a FILE *, etc. */ + int seekable; + ogg_int64_t offset; + ogg_int64_t end; + ogg_sync_state *oy; + + /* If the FILE handle isn't seekable (eg, a pipe), only the current + stream appears */ + int links; + ogg_int64_t *offsets; + ogg_int64_t *dataoffsets; + ogg_uint32_t *serialnos; + ogg_int64_t *pcmlengths; + vorbis_info *vi; + vorbis_comment *vc; + + /* Decoding working state local storage */ + ogg_int64_t pcm_offset; + int ready_state; + ogg_uint32_t current_serialno; + int current_link; + + ogg_int64_t bittrack; + ogg_int64_t samptrack; + + ogg_stream_state *os; /* take physical pages, weld into a logical + stream of packets */ + vorbis_dsp_state vd; /* central working state for the packet->PCM decoder */ + vorbis_block vb; /* local working space for packet->PCM decode */ + + ov_callbacks callbacks; + +} OggVorbis_File; + +extern int ov_clear(OggVorbis_File *vf); +extern int ov_open(FILE *f,OggVorbis_File *vf,char *initial,long ibytes); +extern int ov_open_callbacks(void *datasource, OggVorbis_File *vf, + char *initial, long ibytes, ov_callbacks callbacks); + +extern int ov_test(FILE *f,OggVorbis_File *vf,char *initial,long ibytes); +extern int ov_test_callbacks(void *datasource, OggVorbis_File *vf, + char *initial, long ibytes, ov_callbacks callbacks); +extern int ov_test_open(OggVorbis_File *vf); + +extern long ov_bitrate(OggVorbis_File *vf,int i); +extern long ov_bitrate_instant(OggVorbis_File *vf); +extern long ov_streams(OggVorbis_File *vf); +extern long ov_seekable(OggVorbis_File *vf); +extern long ov_serialnumber(OggVorbis_File *vf,int i); + +extern ogg_int64_t ov_raw_total(OggVorbis_File *vf,int i); +extern ogg_int64_t ov_pcm_total(OggVorbis_File *vf,int i); +extern ogg_int64_t ov_time_total(OggVorbis_File *vf,int i); + +extern int ov_raw_seek(OggVorbis_File *vf,ogg_int64_t pos); +extern int ov_pcm_seek(OggVorbis_File *vf,ogg_int64_t pos); +extern int ov_pcm_seek_page(OggVorbis_File *vf,ogg_int64_t pos); +extern int ov_time_seek(OggVorbis_File *vf,ogg_int64_t pos); +extern int ov_time_seek_page(OggVorbis_File *vf,ogg_int64_t pos); + +extern ogg_int64_t ov_raw_tell(OggVorbis_File *vf); +extern ogg_int64_t ov_pcm_tell(OggVorbis_File *vf); +extern ogg_int64_t ov_time_tell(OggVorbis_File *vf); + +extern vorbis_info *ov_info(OggVorbis_File *vf,int link); +extern vorbis_comment *ov_comment(OggVorbis_File *vf,int link); + +extern long ov_read(OggVorbis_File *vf,char *buffer,int length, + int *bitstream); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif + + diff --git a/genplus-gx/core/tremor/lsp_lookup.h b/genplus-gx/core/tremor/lsp_lookup.h new file mode 100644 index 0000000000..fa84851887 --- /dev/null +++ b/genplus-gx/core/tremor/lsp_lookup.h @@ -0,0 +1,136 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: lookup data + + ********************************************************************/ + +#ifndef _V_LOOKUP_DATA_H_ +#define _V_LOOKUP_DATA_H_ + +#include "os_types.h" + +#define FROMdB_LOOKUP_SZ 35 +#define FROMdB2_LOOKUP_SZ 32 +#define FROMdB_SHIFT 5 +#define FROMdB2_SHIFT 3 +#define FROMdB2_MASK 31 + +static const ogg_int32_t FROMdB_LOOKUP[FROMdB_LOOKUP_SZ]={ + 0x003fffff, 0x0028619b, 0x00197a96, 0x0010137a, + 0x000a24b0, 0x00066666, 0x000409c3, 0x00028c42, + 0x00019b8c, 0x000103ab, 0x0000a3d7, 0x00006760, + 0x0000413a, 0x00002928, 0x000019f8, 0x00001062, + 0x00000a56, 0x00000686, 0x0000041e, 0x00000299, + 0x000001a3, 0x00000109, 0x000000a7, 0x00000069, + 0x00000042, 0x0000002a, 0x0000001a, 0x00000011, + 0x0000000b, 0x00000007, 0x00000004, 0x00000003, + 0x00000002, 0x00000001, 0x00000001}; + +static const ogg_int32_t FROMdB2_LOOKUP[FROMdB2_LOOKUP_SZ]={ + 0x000001fc, 0x000001f5, 0x000001ee, 0x000001e7, + 0x000001e0, 0x000001d9, 0x000001d2, 0x000001cc, + 0x000001c5, 0x000001bf, 0x000001b8, 0x000001b2, + 0x000001ac, 0x000001a6, 0x000001a0, 0x0000019a, + 0x00000194, 0x0000018e, 0x00000188, 0x00000183, + 0x0000017d, 0x00000178, 0x00000172, 0x0000016d, + 0x00000168, 0x00000163, 0x0000015e, 0x00000159, + 0x00000154, 0x0000014f, 0x0000014a, 0x00000145, +}; + +#define INVSQ_LOOKUP_I_SHIFT 10 +#define INVSQ_LOOKUP_I_MASK 1023 +static const long INVSQ_LOOKUP_I[64+1]={ + 92682, 91966, 91267, 90583, + 89915, 89261, 88621, 87995, + 87381, 86781, 86192, 85616, + 85051, 84497, 83953, 83420, + 82897, 82384, 81880, 81385, + 80899, 80422, 79953, 79492, + 79039, 78594, 78156, 77726, + 77302, 76885, 76475, 76072, + 75674, 75283, 74898, 74519, + 74146, 73778, 73415, 73058, + 72706, 72359, 72016, 71679, + 71347, 71019, 70695, 70376, + 70061, 69750, 69444, 69141, + 68842, 68548, 68256, 67969, + 67685, 67405, 67128, 66855, + 66585, 66318, 66054, 65794, + 65536, +}; + +static const long INVSQ_LOOKUP_IDel[64]={ + 716, 699, 684, 668, + 654, 640, 626, 614, + 600, 589, 576, 565, + 554, 544, 533, 523, + 513, 504, 495, 486, + 477, 469, 461, 453, + 445, 438, 430, 424, + 417, 410, 403, 398, + 391, 385, 379, 373, + 368, 363, 357, 352, + 347, 343, 337, 332, + 328, 324, 319, 315, + 311, 306, 303, 299, + 294, 292, 287, 284, + 280, 277, 273, 270, + 267, 264, 260, 258, +}; + +#define COS_LOOKUP_I_SHIFT 9 +#define COS_LOOKUP_I_MASK 511 +#define COS_LOOKUP_I_SZ 128 +static const ogg_int32_t COS_LOOKUP_I[COS_LOOKUP_I_SZ+1]={ + 16384, 16379, 16364, 16340, + 16305, 16261, 16207, 16143, + 16069, 15986, 15893, 15791, + 15679, 15557, 15426, 15286, + 15137, 14978, 14811, 14635, + 14449, 14256, 14053, 13842, + 13623, 13395, 13160, 12916, + 12665, 12406, 12140, 11866, + 11585, 11297, 11003, 10702, + 10394, 10080, 9760, 9434, + 9102, 8765, 8423, 8076, + 7723, 7366, 7005, 6639, + 6270, 5897, 5520, 5139, + 4756, 4370, 3981, 3590, + 3196, 2801, 2404, 2006, + 1606, 1205, 804, 402, + 0, -401, -803, -1204, + -1605, -2005, -2403, -2800, + -3195, -3589, -3980, -4369, + -4755, -5138, -5519, -5896, + -6269, -6638, -7004, -7365, + -7722, -8075, -8422, -8764, + -9101, -9433, -9759, -10079, + -10393, -10701, -11002, -11296, + -11584, -11865, -12139, -12405, + -12664, -12915, -13159, -13394, + -13622, -13841, -14052, -14255, + -14448, -14634, -14810, -14977, + -15136, -15285, -15425, -15556, + -15678, -15790, -15892, -15985, + -16068, -16142, -16206, -16260, + -16304, -16339, -16363, -16378, + -16383, +}; + +#endif + + + + + diff --git a/genplus-gx/core/tremor/mapping0.c b/genplus-gx/core/tremor/mapping0.c new file mode 100644 index 0000000000..38d14054f8 --- /dev/null +++ b/genplus-gx/core/tremor/mapping0.c @@ -0,0 +1,306 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: channel mapping 0 implementation + + ********************************************************************/ + +#include +#include +#include +#include +#include "ogg.h" +#include "ivorbiscodec.h" +#include "mdct.h" +#include "codec_internal.h" +#include "codebook.h" +#include "window.h" +#include "registry.h" +#include "misc.h" + +/* simplistic, wasteful way of doing this (unique lookup for each + mode/submapping); there should be a central repository for + identical lookups. That will require minor work, so I'm putting it + off as low priority. + + Why a lookup for each backend in a given mode? Because the + blocksize is set by the mode, and low backend lookups may require + parameters from other areas of the mode/mapping */ + +typedef struct { + vorbis_info_mode *mode; + vorbis_info_mapping0 *map; + + vorbis_look_floor **floor_look; + + vorbis_look_residue **residue_look; + + vorbis_func_floor **floor_func; + vorbis_func_residue **residue_func; + + int ch; + long lastframe; /* if a different mode is called, we need to + invalidate decay */ +} vorbis_look_mapping0; + +static void mapping0_free_info(vorbis_info_mapping *i){ + vorbis_info_mapping0 *info=(vorbis_info_mapping0 *)i; + if(info){ + memset(info,0,sizeof(*info)); + _ogg_free(info); + } +} + +static void mapping0_free_look(vorbis_look_mapping *look){ + int i; + vorbis_look_mapping0 *l=(vorbis_look_mapping0 *)look; + if(l){ + + for(i=0;imap->submaps;i++){ + l->floor_func[i]->free_look(l->floor_look[i]); + l->residue_func[i]->free_look(l->residue_look[i]); + } + + _ogg_free(l->floor_func); + _ogg_free(l->residue_func); + _ogg_free(l->floor_look); + _ogg_free(l->residue_look); + memset(l,0,sizeof(*l)); + _ogg_free(l); + } +} + +static vorbis_look_mapping *mapping0_look(vorbis_dsp_state *vd,vorbis_info_mode *vm, + vorbis_info_mapping *m){ + int i; + vorbis_info *vi=vd->vi; + codec_setup_info *ci=(codec_setup_info *)vi->codec_setup; + vorbis_look_mapping0 *look=(vorbis_look_mapping0 *)_ogg_calloc(1,sizeof(*look)); + vorbis_info_mapping0 *info=look->map=(vorbis_info_mapping0 *)m; + look->mode=vm; + + look->floor_look=(vorbis_look_floor **)_ogg_calloc(info->submaps,sizeof(*look->floor_look)); + + look->residue_look=(vorbis_look_residue **)_ogg_calloc(info->submaps,sizeof(*look->residue_look)); + + look->floor_func=(vorbis_func_floor **)_ogg_calloc(info->submaps,sizeof(*look->floor_func)); + look->residue_func=(vorbis_func_residue **)_ogg_calloc(info->submaps,sizeof(*look->residue_func)); + + for(i=0;isubmaps;i++){ + int floornum=info->floorsubmap[i]; + int resnum=info->residuesubmap[i]; + + look->floor_func[i]=_floor_P[ci->floor_type[floornum]]; + look->floor_look[i]=look->floor_func[i]-> + look(vd,vm,ci->floor_param[floornum]); + look->residue_func[i]=_residue_P[ci->residue_type[resnum]]; + look->residue_look[i]=look->residue_func[i]-> + look(vd,vm,ci->residue_param[resnum]); + + } + + look->ch=vi->channels; + + return(look); +} + +static int ilog(unsigned int v){ + int ret=0; + if(v)--v; + while(v){ + ret++; + v>>=1; + } + return(ret); +} + +/* also responsible for range checking */ +static vorbis_info_mapping *mapping0_unpack(vorbis_info *vi,oggpack_buffer *opb){ + int i; + vorbis_info_mapping0 *info=(vorbis_info_mapping0 *)_ogg_calloc(1,sizeof(*info)); + codec_setup_info *ci=(codec_setup_info *)vi->codec_setup; + memset(info,0,sizeof(*info)); + + if(oggpack_read(opb,1)) + info->submaps=oggpack_read(opb,4)+1; + else + info->submaps=1; + + if(oggpack_read(opb,1)){ + info->coupling_steps=oggpack_read(opb,8)+1; + + for(i=0;icoupling_steps;i++){ + int testM=info->coupling_mag[i]=oggpack_read(opb,ilog(vi->channels)); + int testA=info->coupling_ang[i]=oggpack_read(opb,ilog(vi->channels)); + + if(testM<0 || + testA<0 || + testM==testA || + testM>=vi->channels || + testA>=vi->channels) goto err_out; + } + + } + + if(oggpack_read(opb,2)>0)goto err_out; /* 2,3:reserved */ + + if(info->submaps>1){ + for(i=0;ichannels;i++){ + info->chmuxlist[i]=oggpack_read(opb,4); + if(info->chmuxlist[i]>=info->submaps)goto err_out; + } + } + for(i=0;isubmaps;i++){ + int temp=oggpack_read(opb,8); + if(temp>=ci->times)goto err_out; + info->floorsubmap[i]=oggpack_read(opb,8); + if(info->floorsubmap[i]>=ci->floors)goto err_out; + info->residuesubmap[i]=oggpack_read(opb,8); + if(info->residuesubmap[i]>=ci->residues)goto err_out; + } + + return info; + + err_out: + mapping0_free_info(info); + return(NULL); +} + +static int seq=0; +static int mapping0_inverse(vorbis_block *vb,vorbis_look_mapping *l){ + vorbis_dsp_state *vd=vb->vd; + vorbis_info *vi=vd->vi; + codec_setup_info *ci=(codec_setup_info *)vi->codec_setup; + private_state *b=(private_state *)vd->backend_state; + vorbis_look_mapping0 *look=(vorbis_look_mapping0 *)l; + vorbis_info_mapping0 *info=look->map; + + int i,j; + long n=vb->pcmend=ci->blocksizes[vb->W]; + + ogg_int32_t **pcmbundle=(ogg_int32_t **)alloca(sizeof(*pcmbundle)*vi->channels); + int *zerobundle=(int *)alloca(sizeof(*zerobundle)*vi->channels); + + int *nonzero =(int *)alloca(sizeof(*nonzero)*vi->channels); + void **floormemo=(void **)alloca(sizeof(*floormemo)*vi->channels); + + /* time domain information decode (note that applying the + information would have to happen later; we'll probably add a + function entry to the harness for that later */ + /* NOT IMPLEMENTED */ + + /* recover the spectral envelope; store it in the PCM vector for now */ + for(i=0;ichannels;i++){ + int submap=info->chmuxlist[i]; + floormemo[i]=look->floor_func[submap]-> + inverse1(vb,look->floor_look[submap]); + if(floormemo[i]) + nonzero[i]=1; + else + nonzero[i]=0; + memset(vb->pcm[i],0,sizeof(*vb->pcm[i])*n/2); + } + + /* channel coupling can 'dirty' the nonzero listing */ + for(i=0;icoupling_steps;i++){ + if(nonzero[info->coupling_mag[i]] || + nonzero[info->coupling_ang[i]]){ + nonzero[info->coupling_mag[i]]=1; + nonzero[info->coupling_ang[i]]=1; + } + } + + /* recover the residue into our working vectors */ + for(i=0;isubmaps;i++){ + int ch_in_bundle=0; + for(j=0;jchannels;j++){ + if(info->chmuxlist[j]==i){ + if(nonzero[j]) + zerobundle[ch_in_bundle]=1; + else + zerobundle[ch_in_bundle]=0; + pcmbundle[ch_in_bundle++]=vb->pcm[j]; + } + } + + look->residue_func[i]->inverse(vb,look->residue_look[i], + pcmbundle,zerobundle,ch_in_bundle); + } + + /* channel coupling */ + for(i=info->coupling_steps-1;i>=0;i--){ + ogg_int32_t *pcmM=vb->pcm[info->coupling_mag[i]]; + ogg_int32_t *pcmA=vb->pcm[info->coupling_ang[i]]; + + for(j=0;j0) + if(ang>0){ + pcmM[j]=mag; + pcmA[j]=mag-ang; + }else{ + pcmA[j]=mag; + pcmM[j]=mag+ang; + } + else + if(ang>0){ + pcmM[j]=mag; + pcmA[j]=mag+ang; + }else{ + pcmA[j]=mag; + pcmM[j]=mag-ang; + } + } + } + + /* compute and apply spectral envelope */ + for(i=0;ichannels;i++){ + ogg_int32_t *pcm=vb->pcm[i]; + int submap=info->chmuxlist[i]; + look->floor_func[submap]-> + inverse2(vb,look->floor_look[submap],floormemo[i],pcm); + } + + /* transform the PCM data; takes PCM vector, vb; modifies PCM vector */ + /* only MDCT right now.... */ + for(i=0;ichannels;i++){ + ogg_int32_t *pcm=vb->pcm[i]; + mdct_backward(n,pcm,pcm); + } + + /* window the data */ + for(i=0;ichannels;i++){ + ogg_int32_t *pcm=vb->pcm[i]; + if(nonzero[i]) + _vorbis_apply_window(pcm,b->window,ci->blocksizes,vb->lW,vb->W,vb->nW); + else + for(j=0;jchannels; + /* all done! */ + return(0); +} + +/* export hooks */ +vorbis_func_mapping mapping0_exportbundle={ + &mapping0_unpack, + &mapping0_look, + &mapping0_free_info, + &mapping0_free_look, + &mapping0_inverse +}; diff --git a/genplus-gx/core/tremor/mdct.c b/genplus-gx/core/tremor/mdct.c new file mode 100644 index 0000000000..4f39e7d531 --- /dev/null +++ b/genplus-gx/core/tremor/mdct.c @@ -0,0 +1,510 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: normalized modified discrete cosine transform + power of two length transform only [64 <= n ] + last mod: $Id: mdct.c,v 1.9 2002/10/16 09:17:39 xiphmont Exp $ + + Original algorithm adapted long ago from _The use of multirate filter + banks for coding of high quality digital audio_, by T. Sporer, + K. Brandenburg and B. Edler, collection of the European Signal + Processing Conference (EUSIPCO), Amsterdam, June 1992, Vol.1, pp + 211-214 + + The below code implements an algorithm that no longer looks much like + that presented in the paper, but the basic structure remains if you + dig deep enough to see it. + + This module DOES NOT INCLUDE code to generate/apply the window + function. Everybody has their own weird favorite including me... I + happen to like the properties of y=sin(.5PI*sin^2(x)), but others may + vehemently disagree. + + ********************************************************************/ + +#include "ivorbiscodec.h" +#include "codebook.h" +#include "misc.h" +#include "mdct.h" +#include "mdct_lookup.h" + + +/* 8 point butterfly (in place) */ +STIN void mdct_butterfly_8(DATA_TYPE *x){ + + REG_TYPE r0 = x[4] + x[0]; + REG_TYPE r1 = x[4] - x[0]; + REG_TYPE r2 = x[5] + x[1]; + REG_TYPE r3 = x[5] - x[1]; + REG_TYPE r4 = x[6] + x[2]; + REG_TYPE r5 = x[6] - x[2]; + REG_TYPE r6 = x[7] + x[3]; + REG_TYPE r7 = x[7] - x[3]; + + x[0] = r5 + r3; + x[1] = r7 - r1; + x[2] = r5 - r3; + x[3] = r7 + r1; + x[4] = r4 - r0; + x[5] = r6 - r2; + x[6] = r4 + r0; + x[7] = r6 + r2; + MB(); +} + +/* 16 point butterfly (in place, 4 register) */ +STIN void mdct_butterfly_16(DATA_TYPE *x){ + + REG_TYPE r0, r1; + + r0 = x[ 0] - x[ 8]; x[ 8] += x[ 0]; + r1 = x[ 1] - x[ 9]; x[ 9] += x[ 1]; + x[ 0] = MULT31((r0 + r1) , cPI2_8); + x[ 1] = MULT31((r1 - r0) , cPI2_8); + MB(); + + r0 = x[10] - x[ 2]; x[10] += x[ 2]; + r1 = x[ 3] - x[11]; x[11] += x[ 3]; + x[ 2] = r1; x[ 3] = r0; + MB(); + + r0 = x[12] - x[ 4]; x[12] += x[ 4]; + r1 = x[13] - x[ 5]; x[13] += x[ 5]; + x[ 4] = MULT31((r0 - r1) , cPI2_8); + x[ 5] = MULT31((r0 + r1) , cPI2_8); + MB(); + + r0 = x[14] - x[ 6]; x[14] += x[ 6]; + r1 = x[15] - x[ 7]; x[15] += x[ 7]; + x[ 6] = r0; x[ 7] = r1; + MB(); + + mdct_butterfly_8(x); + mdct_butterfly_8(x+8); +} + +/* 32 point butterfly (in place, 4 register) */ +STIN void mdct_butterfly_32(DATA_TYPE *x){ + + REG_TYPE r0, r1; + + r0 = x[30] - x[14]; x[30] += x[14]; + r1 = x[31] - x[15]; x[31] += x[15]; + x[14] = r0; x[15] = r1; + MB(); + + r0 = x[28] - x[12]; x[28] += x[12]; + r1 = x[29] - x[13]; x[29] += x[13]; + XNPROD31( r0, r1, cPI1_8, cPI3_8, &x[12], &x[13] ); + MB(); + + r0 = x[26] - x[10]; x[26] += x[10]; + r1 = x[27] - x[11]; x[27] += x[11]; + x[10] = MULT31((r0 - r1) , cPI2_8); + x[11] = MULT31((r0 + r1) , cPI2_8); + MB(); + + r0 = x[24] - x[ 8]; x[24] += x[ 8]; + r1 = x[25] - x[ 9]; x[25] += x[ 9]; + XNPROD31( r0, r1, cPI3_8, cPI1_8, &x[ 8], &x[ 9] ); + MB(); + + r0 = x[22] - x[ 6]; x[22] += x[ 6]; + r1 = x[ 7] - x[23]; x[23] += x[ 7]; + x[ 6] = r1; x[ 7] = r0; + MB(); + + r0 = x[ 4] - x[20]; x[20] += x[ 4]; + r1 = x[ 5] - x[21]; x[21] += x[ 5]; + XPROD31 ( r0, r1, cPI3_8, cPI1_8, &x[ 4], &x[ 5] ); + MB(); + + r0 = x[ 2] - x[18]; x[18] += x[ 2]; + r1 = x[ 3] - x[19]; x[19] += x[ 3]; + x[ 2] = MULT31((r1 + r0) , cPI2_8); + x[ 3] = MULT31((r1 - r0) , cPI2_8); + MB(); + + r0 = x[ 0] - x[16]; x[16] += x[ 0]; + r1 = x[ 1] - x[17]; x[17] += x[ 1]; + XPROD31 ( r0, r1, cPI1_8, cPI3_8, &x[ 0], &x[ 1] ); + MB(); + + mdct_butterfly_16(x); + mdct_butterfly_16(x+16); +} + +/* N/stage point generic N stage butterfly (in place, 2 register) */ +STIN void mdct_butterfly_generic(DATA_TYPE *x,int points,int step){ + + LOOKUP_T *T = sincos_lookup0; + DATA_TYPE *x1 = x + points - 8; + DATA_TYPE *x2 = x + (points>>1) - 8; + REG_TYPE r0; + REG_TYPE r1; + + do{ + r0 = x1[6] - x2[6]; x1[6] += x2[6]; + r1 = x2[7] - x1[7]; x1[7] += x2[7]; + XPROD31( r1, r0, T[0], T[1], &x2[6], &x2[7] ); T+=step; + + r0 = x1[4] - x2[4]; x1[4] += x2[4]; + r1 = x2[5] - x1[5]; x1[5] += x2[5]; + XPROD31( r1, r0, T[0], T[1], &x2[4], &x2[5] ); T+=step; + + r0 = x1[2] - x2[2]; x1[2] += x2[2]; + r1 = x2[3] - x1[3]; x1[3] += x2[3]; + XPROD31( r1, r0, T[0], T[1], &x2[2], &x2[3] ); T+=step; + + r0 = x1[0] - x2[0]; x1[0] += x2[0]; + r1 = x2[1] - x1[1]; x1[1] += x2[1]; + XPROD31( r1, r0, T[0], T[1], &x2[0], &x2[1] ); T+=step; + + x1-=8; x2-=8; + }while(Tsincos_lookup0); + do{ + r0 = x2[6] - x1[6]; x1[6] += x2[6]; + r1 = x2[7] - x1[7]; x1[7] += x2[7]; + XPROD31( r0, r1, T[0], T[1], &x2[6], &x2[7] ); T+=step; + + r0 = x2[4] - x1[4]; x1[4] += x2[4]; + r1 = x2[5] - x1[5]; x1[5] += x2[5]; + XPROD31( r0, r1, T[0], T[1], &x2[4], &x2[5] ); T+=step; + + r0 = x2[2] - x1[2]; x1[2] += x2[2]; + r1 = x2[3] - x1[3]; x1[3] += x2[3]; + XPROD31( r0, r1, T[0], T[1], &x2[2], &x2[3] ); T+=step; + + r0 = x2[0] - x1[0]; x1[0] += x2[0]; + r1 = x2[1] - x1[1]; x1[1] += x2[1]; + XPROD31( r0, r1, T[0], T[1], &x2[0], &x2[1] ); T+=step; + + x1-=8; x2-=8; + }while(Tsincos_lookup0); +} + +STIN void mdct_butterflies(DATA_TYPE *x,int points,int shift){ + + int stages=8-shift; + int i,j; + + for(i=0;--stages>0;i++){ + for(j=0;j<(1<>i)*j,points>>i,4<<(i+shift)); + } + + for(j=0;j>8]|(bitrev[(x&0x0f0)>>4]<<4)|(((int)bitrev[x&0x00f])<<8); +} + +STIN void mdct_bitreverse(DATA_TYPE *x,int n,int step,int shift){ + + int bit = 0; + DATA_TYPE *w0 = x; + DATA_TYPE *w1 = x = w0+(n>>1); + LOOKUP_T *T = (step>=4)?(sincos_lookup0+(step>>1)):sincos_lookup1; + LOOKUP_T *Ttop = T+1024; + DATA_TYPE r2; + + do{ + DATA_TYPE r3 = bitrev12(bit++); + DATA_TYPE *x0 = x + ((r3 ^ 0xfff)>>shift) -1; + DATA_TYPE *x1 = x + (r3>>shift); + + REG_TYPE r0 = x0[0] + x1[0]; + REG_TYPE r1 = x1[1] - x0[1]; + + XPROD32( r0, r1, T[1], T[0], &r2, &r3 ); T+=step; + + w1 -= 4; + + r0 = (x0[1] + x1[1])>>1; + r1 = (x0[0] - x1[0])>>1; + w0[0] = r0 + r2; + w0[1] = r1 + r3; + w1[2] = r0 - r2; + w1[3] = r3 - r1; + + r3 = bitrev12(bit++); + x0 = x + ((r3 ^ 0xfff)>>shift) -1; + x1 = x + (r3>>shift); + + r0 = x0[0] + x1[0]; + r1 = x1[1] - x0[1]; + + XPROD32( r0, r1, T[1], T[0], &r2, &r3 ); T+=step; + + r0 = (x0[1] + x1[1])>>1; + r1 = (x0[0] - x1[0])>>1; + w0[2] = r0 + r2; + w0[3] = r1 + r3; + w1[0] = r0 - r2; + w1[1] = r3 - r1; + + w0 += 4; + }while(T>shift) -1; + DATA_TYPE *x1 = x + (r3>>shift); + + REG_TYPE r0 = x0[0] + x1[0]; + REG_TYPE r1 = x1[1] - x0[1]; + + T-=step; XPROD32( r0, r1, T[0], T[1], &r2, &r3 ); + + w1 -= 4; + + r0 = (x0[1] + x1[1])>>1; + r1 = (x0[0] - x1[0])>>1; + w0[0] = r0 + r2; + w0[1] = r1 + r3; + w1[2] = r0 - r2; + w1[3] = r3 - r1; + + r3 = bitrev12(bit++); + x0 = x + ((r3 ^ 0xfff)>>shift) -1; + x1 = x + (r3>>shift); + + r0 = x0[0] + x1[0]; + r1 = x1[1] - x0[1]; + + T-=step; XPROD32( r0, r1, T[0], T[1], &r2, &r3 ); + + r0 = (x0[1] + x1[1])>>1; + r1 = (x0[0] - x1[0])>>1; + w0[2] = r0 + r2; + w0[3] = r1 + r3; + w1[0] = r0 - r2; + w1[1] = r3 - r1; + + w0 += 4; + }while(w0>1; + int n4=n>>2; + DATA_TYPE *iX; + DATA_TYPE *oX; + LOOKUP_T *T; + LOOKUP_T *V; + int shift; + int step; + + for (shift=6;!(n&(1<=in+n4); + do{ + oX-=4; + XPROD31( iX[4], iX[6], T[1], T[0], &oX[2], &oX[3] ); T-=step; + XPROD31( iX[0], iX[2], T[1], T[0], &oX[0], &oX[1] ); T-=step; + iX-=8; + }while(iX>=in); + + iX = in+n2-8; + oX = out+n2+n4; + T = sincos_lookup0; + + do{ + T+=step; XNPROD31( iX[6], iX[4], T[0], T[1], &oX[0], &oX[1] ); + T+=step; XNPROD31( iX[2], iX[0], T[0], T[1], &oX[2], &oX[3] ); + iX-=8; + oX+=4; + }while(iX>=in+n4); + do{ + T-=step; XNPROD31( iX[6], iX[4], T[1], T[0], &oX[0], &oX[1] ); + T-=step; XNPROD31( iX[2], iX[0], T[1], T[0], &oX[2], &oX[3] ); + iX-=8; + oX+=4; + }while(iX>=in); + + mdct_butterflies(out+n2,n2,shift); + mdct_bitreverse(out,n,step,shift); + + /* rotate + window */ + + step>>=2; + { + DATA_TYPE *oX1=out+n2+n4; + DATA_TYPE *oX2=out+n2+n4; + DATA_TYPE *iX =out; + + switch(step) { + default: { + T=(step>=4)?(sincos_lookup0+(step>>1)):sincos_lookup1; + do{ + oX1-=4; + XPROD31( iX[0], -iX[1], T[0], T[1], &oX1[3], &oX2[0] ); T+=step; + XPROD31( iX[2], -iX[3], T[0], T[1], &oX1[2], &oX2[1] ); T+=step; + XPROD31( iX[4], -iX[5], T[0], T[1], &oX1[1], &oX2[2] ); T+=step; + XPROD31( iX[6], -iX[7], T[0], T[1], &oX1[0], &oX2[3] ); T+=step; + oX2+=4; + iX+=8; + }while(iX>1; + t1 = (*T++)>>1; + do{ + oX1-=4; + + t0 += (v0 = (*V++)>>1); + t1 += (v1 = (*V++)>>1); + XPROD31( iX[0], -iX[1], t0, t1, &oX1[3], &oX2[0] ); + v0 += (t0 = (*T++)>>1); + v1 += (t1 = (*T++)>>1); + XPROD31( iX[2], -iX[3], v0, v1, &oX1[2], &oX2[1] ); + t0 += (v0 = (*V++)>>1); + t1 += (v1 = (*V++)>>1); + XPROD31( iX[4], -iX[5], t0, t1, &oX1[1], &oX2[2] ); + v0 += (t0 = (*T++)>>1); + v1 += (t1 = (*T++)>>1); + XPROD31( iX[6], -iX[7], v0, v1, &oX1[0], &oX2[3] ); + + oX2+=4; + iX+=8; + }while(iX>2); + t1 += (q1 = (v1-t1)>>2); + XPROD31( iX[0], -iX[1], t0, t1, &oX1[3], &oX2[0] ); + t0 = v0-q0; + t1 = v1-q1; + XPROD31( iX[2], -iX[3], t0, t1, &oX1[2], &oX2[1] ); + + t0 = *T++; + t1 = *T++; + v0 += (q0 = (t0-v0)>>2); + v1 += (q1 = (t1-v1)>>2); + XPROD31( iX[4], -iX[5], v0, v1, &oX1[1], &oX2[2] ); + v0 = t0-q0; + v1 = t1-q1; + XPROD31( iX[6], -iX[7], v0, v1, &oX1[0], &oX2[3] ); + + oX2+=4; + iX+=8; + }while(iXoX2); + } +} + diff --git a/genplus-gx/core/tremor/mdct.h b/genplus-gx/core/tremor/mdct.h new file mode 100644 index 0000000000..6d8890720c --- /dev/null +++ b/genplus-gx/core/tremor/mdct.h @@ -0,0 +1,52 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: modified discrete cosine transform prototypes + + ********************************************************************/ + +#ifndef _OGG_mdct_H_ +#define _OGG_mdct_H_ + +#include "ivorbiscodec.h" +#include "misc.h" + +#define DATA_TYPE ogg_int32_t +#define REG_TYPE register ogg_int32_t + +#ifdef _LOW_ACCURACY_ +#define cPI3_8 (0x0062) +#define cPI2_8 (0x00b5) +#define cPI1_8 (0x00ed) +#else +#define cPI3_8 (0x30fbc54d) +#define cPI2_8 (0x5a82799a) +#define cPI1_8 (0x7641af3d) +#endif + +extern void mdct_forward(int n, DATA_TYPE *in, DATA_TYPE *out); +extern void mdct_backward(int n, DATA_TYPE *in, DATA_TYPE *out); + +#endif + + + + + + + + + + + + diff --git a/genplus-gx/core/tremor/mdct_lookup.h b/genplus-gx/core/tremor/mdct_lookup.h new file mode 100644 index 0000000000..970e199f7f --- /dev/null +++ b/genplus-gx/core/tremor/mdct_lookup.h @@ -0,0 +1,540 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: sin,cos lookup tables + + ********************************************************************/ + +#include "os_types.h" + +/* {sin(2*i*PI/4096), cos(2*i*PI/4096)}, with i = 0 to 512 */ +static LOOKUP_T sincos_lookup0[1026] = { + X(0x00000000), X(0x7fffffff), X(0x003243f5), X(0x7ffff621), + X(0x006487e3), X(0x7fffd886), X(0x0096cbc1), X(0x7fffa72c), + X(0x00c90f88), X(0x7fff6216), X(0x00fb5330), X(0x7fff0943), + X(0x012d96b1), X(0x7ffe9cb2), X(0x015fda03), X(0x7ffe1c65), + X(0x01921d20), X(0x7ffd885a), X(0x01c45ffe), X(0x7ffce093), + X(0x01f6a297), X(0x7ffc250f), X(0x0228e4e2), X(0x7ffb55ce), + X(0x025b26d7), X(0x7ffa72d1), X(0x028d6870), X(0x7ff97c18), + X(0x02bfa9a4), X(0x7ff871a2), X(0x02f1ea6c), X(0x7ff75370), + X(0x03242abf), X(0x7ff62182), X(0x03566a96), X(0x7ff4dbd9), + X(0x0388a9ea), X(0x7ff38274), X(0x03bae8b2), X(0x7ff21553), + X(0x03ed26e6), X(0x7ff09478), X(0x041f6480), X(0x7feeffe1), + X(0x0451a177), X(0x7fed5791), X(0x0483ddc3), X(0x7feb9b85), + X(0x04b6195d), X(0x7fe9cbc0), X(0x04e8543e), X(0x7fe7e841), + X(0x051a8e5c), X(0x7fe5f108), X(0x054cc7b1), X(0x7fe3e616), + X(0x057f0035), X(0x7fe1c76b), X(0x05b137df), X(0x7fdf9508), + X(0x05e36ea9), X(0x7fdd4eec), X(0x0615a48b), X(0x7fdaf519), + X(0x0647d97c), X(0x7fd8878e), X(0x067a0d76), X(0x7fd6064c), + X(0x06ac406f), X(0x7fd37153), X(0x06de7262), X(0x7fd0c8a3), + X(0x0710a345), X(0x7fce0c3e), X(0x0742d311), X(0x7fcb3c23), + X(0x077501be), X(0x7fc85854), X(0x07a72f45), X(0x7fc560cf), + X(0x07d95b9e), X(0x7fc25596), X(0x080b86c2), X(0x7fbf36aa), + X(0x083db0a7), X(0x7fbc040a), X(0x086fd947), X(0x7fb8bdb8), + X(0x08a2009a), X(0x7fb563b3), X(0x08d42699), X(0x7fb1f5fc), + X(0x09064b3a), X(0x7fae7495), X(0x09386e78), X(0x7faadf7c), + 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X(0x4ebfe8a5), X(0x64e88926), X(0x4ee782fb), X(0x64c99498), + X(0x4f0f1126), X(0x64aa907f), X(0x4f369320), X(0x648b7ce0), + X(0x4f5e08e3), X(0x646c59bf), X(0x4f857269), X(0x644d2722), + X(0x4faccfab), X(0x642de50d), X(0x4fd420a4), X(0x640e9386), + X(0x4ffb654d), X(0x63ef3290), X(0x50229da1), X(0x63cfc231), + X(0x5049c999), X(0x63b0426d), X(0x5070e92f), X(0x6390b34a), + X(0x5097fc5e), X(0x637114cc), X(0x50bf031f), X(0x635166f9), + X(0x50e5fd6d), X(0x6331a9d4), X(0x510ceb40), X(0x6311dd64), + X(0x5133cc94), X(0x62f201ac), X(0x515aa162), X(0x62d216b3), + X(0x518169a5), X(0x62b21c7b), X(0x51a82555), X(0x6292130c), + X(0x51ced46e), X(0x6271fa69), X(0x51f576ea), X(0x6251d298), + X(0x521c0cc2), X(0x62319b9d), X(0x524295f0), X(0x6211557e), + X(0x5269126e), X(0x61f1003f), X(0x528f8238), X(0x61d09be5), + X(0x52b5e546), X(0x61b02876), X(0x52dc3b92), X(0x618fa5f7), + X(0x53028518), X(0x616f146c), X(0x5328c1d0), X(0x614e73da), + X(0x534ef1b5), X(0x612dc447), X(0x537514c2), X(0x610d05b7), + X(0x539b2af0), X(0x60ec3830), X(0x53c13439), X(0x60cb5bb7), + X(0x53e73097), X(0x60aa7050), X(0x540d2005), X(0x60897601), + X(0x5433027d), X(0x60686ccf), X(0x5458d7f9), X(0x604754bf), + X(0x547ea073), X(0x60262dd6), X(0x54a45be6), X(0x6004f819), + X(0x54ca0a4b), X(0x5fe3b38d), X(0x54efab9c), X(0x5fc26038), + X(0x55153fd4), X(0x5fa0fe1f), X(0x553ac6ee), X(0x5f7f8d46), + X(0x556040e2), X(0x5f5e0db3), X(0x5585adad), X(0x5f3c7f6b), + X(0x55ab0d46), X(0x5f1ae274), X(0x55d05faa), X(0x5ef936d1), + X(0x55f5a4d2), X(0x5ed77c8a), X(0x561adcb9), X(0x5eb5b3a2), + X(0x56400758), X(0x5e93dc1f), X(0x566524aa), X(0x5e71f606), + X(0x568a34a9), X(0x5e50015d), X(0x56af3750), X(0x5e2dfe29), + X(0x56d42c99), X(0x5e0bec6e), X(0x56f9147e), X(0x5de9cc33), + X(0x571deefa), X(0x5dc79d7c), X(0x5742bc06), X(0x5da5604f), + X(0x57677b9d), X(0x5d8314b1), X(0x578c2dba), X(0x5d60baa7), + X(0x57b0d256), X(0x5d3e5237), X(0x57d5696d), X(0x5d1bdb65), + X(0x57f9f2f8), X(0x5cf95638), X(0x581e6ef1), X(0x5cd6c2b5), + X(0x5842dd54), X(0x5cb420e0), X(0x58673e1b), X(0x5c9170bf), + X(0x588b9140), X(0x5c6eb258), X(0x58afd6bd), X(0x5c4be5b0), + X(0x58d40e8c), X(0x5c290acc), X(0x58f838a9), X(0x5c0621b2), + X(0x591c550e), X(0x5be32a67), X(0x594063b5), X(0x5bc024f0), + X(0x59646498), X(0x5b9d1154), X(0x598857b2), X(0x5b79ef96), + X(0x59ac3cfd), X(0x5b56bfbd), X(0x59d01475), X(0x5b3381ce), + X(0x59f3de12), X(0x5b1035cf), X(0x5a1799d1), X(0x5aecdbc5), + X(0x5a3b47ab), X(0x5ac973b5), X(0x5a5ee79a), X(0x5aa5fda5), + X(0x5a82799a), X(0x5a82799a) + }; + + /* {sin((2*i+1)*PI/4096), cos((2*i+1)*PI/4096)}, with i = 0 to 511 */ +static LOOKUP_T sincos_lookup1[1024] = { + X(0x001921fb), X(0x7ffffd88), X(0x004b65ee), X(0x7fffe9cb), + X(0x007da9d4), X(0x7fffc251), X(0x00afeda8), X(0x7fff8719), + X(0x00e23160), X(0x7fff3824), X(0x011474f6), X(0x7ffed572), + X(0x0146b860), X(0x7ffe5f03), X(0x0178fb99), X(0x7ffdd4d7), + X(0x01ab3e97), X(0x7ffd36ee), X(0x01dd8154), X(0x7ffc8549), + X(0x020fc3c6), X(0x7ffbbfe6), X(0x024205e8), X(0x7ffae6c7), + X(0x027447b0), X(0x7ff9f9ec), X(0x02a68917), X(0x7ff8f954), + X(0x02d8ca16), X(0x7ff7e500), X(0x030b0aa4), X(0x7ff6bcf0), + X(0x033d4abb), X(0x7ff58125), X(0x036f8a51), X(0x7ff4319d), + X(0x03a1c960), X(0x7ff2ce5b), X(0x03d407df), X(0x7ff1575d), + X(0x040645c7), X(0x7fefcca4), X(0x04388310), X(0x7fee2e30), + X(0x046abfb3), X(0x7fec7c02), X(0x049cfba7), X(0x7feab61a), + X(0x04cf36e5), X(0x7fe8dc78), X(0x05017165), X(0x7fe6ef1c), + X(0x0533ab20), X(0x7fe4ee06), X(0x0565e40d), X(0x7fe2d938), + X(0x05981c26), X(0x7fe0b0b1), X(0x05ca5361), X(0x7fde7471), + X(0x05fc89b8), X(0x7fdc247a), X(0x062ebf22), X(0x7fd9c0ca), + X(0x0660f398), X(0x7fd74964), X(0x06932713), X(0x7fd4be46), + X(0x06c5598a), X(0x7fd21f72), X(0x06f78af6), X(0x7fcf6ce8), + X(0x0729bb4e), X(0x7fcca6a7), X(0x075bea8c), X(0x7fc9ccb2), + X(0x078e18a7), X(0x7fc6df08), X(0x07c04598), X(0x7fc3dda9), + X(0x07f27157), X(0x7fc0c896), X(0x08249bdd), X(0x7fbd9fd0), + X(0x0856c520), X(0x7fba6357), X(0x0888ed1b), X(0x7fb7132b), + X(0x08bb13c5), X(0x7fb3af4e), X(0x08ed3916), X(0x7fb037bf), + X(0x091f5d06), X(0x7facac7f), X(0x09517f8f), X(0x7fa90d8e), + X(0x0983a0a7), X(0x7fa55aee), X(0x09b5c048), X(0x7fa1949e), + X(0x09e7de6a), X(0x7f9dbaa0), X(0x0a19fb04), X(0x7f99ccf4), + X(0x0a4c1610), X(0x7f95cb9a), X(0x0a7e2f85), X(0x7f91b694), + X(0x0ab0475c), X(0x7f8d8de1), X(0x0ae25d8d), X(0x7f895182), + X(0x0b147211), X(0x7f850179), X(0x0b4684df), X(0x7f809dc5), + X(0x0b7895f0), X(0x7f7c2668), X(0x0baaa53b), X(0x7f779b62), + X(0x0bdcb2bb), X(0x7f72fcb4), X(0x0c0ebe66), X(0x7f6e4a5e), + X(0x0c40c835), X(0x7f698461), X(0x0c72d020), X(0x7f64aabf), + X(0x0ca4d620), X(0x7f5fbd77), X(0x0cd6da2d), X(0x7f5abc8a), + X(0x0d08dc3f), X(0x7f55a7fa), X(0x0d3adc4e), X(0x7f507fc7), + X(0x0d6cda53), X(0x7f4b43f2), X(0x0d9ed646), X(0x7f45f47b), + X(0x0dd0d01f), X(0x7f409164), X(0x0e02c7d7), X(0x7f3b1aad), + X(0x0e34bd66), X(0x7f359057), X(0x0e66b0c3), X(0x7f2ff263), + X(0x0e98a1e9), X(0x7f2a40d2), X(0x0eca90ce), X(0x7f247ba5), + X(0x0efc7d6b), X(0x7f1ea2dc), X(0x0f2e67b8), X(0x7f18b679), + X(0x0f604faf), X(0x7f12b67c), X(0x0f923546), X(0x7f0ca2e7), + X(0x0fc41876), X(0x7f067bba), X(0x0ff5f938), X(0x7f0040f6), + X(0x1027d784), X(0x7ef9f29d), X(0x1059b352), X(0x7ef390ae), + X(0x108b8c9b), X(0x7eed1b2c), X(0x10bd6356), X(0x7ee69217), + X(0x10ef377d), X(0x7edff570), X(0x11210907), X(0x7ed94538), + X(0x1152d7ed), X(0x7ed28171), X(0x1184a427), X(0x7ecbaa1a), + X(0x11b66dad), X(0x7ec4bf36), X(0x11e83478), X(0x7ebdc0c6), + X(0x1219f880), X(0x7eb6aeca), X(0x124bb9be), X(0x7eaf8943), + X(0x127d7829), X(0x7ea85033), X(0x12af33ba), X(0x7ea1039b), + X(0x12e0ec6a), X(0x7e99a37c), X(0x1312a230), X(0x7e922fd6), + X(0x13445505), X(0x7e8aa8ac), X(0x137604e2), X(0x7e830dff), + X(0x13a7b1bf), X(0x7e7b5fce), X(0x13d95b93), X(0x7e739e1d), + X(0x140b0258), X(0x7e6bc8eb), X(0x143ca605), X(0x7e63e03b), + X(0x146e4694), X(0x7e5be40c), X(0x149fe3fc), X(0x7e53d462), + X(0x14d17e36), X(0x7e4bb13c), X(0x1503153a), X(0x7e437a9c), + X(0x1534a901), X(0x7e3b3083), X(0x15663982), X(0x7e32d2f4), + X(0x1597c6b7), X(0x7e2a61ed), X(0x15c95097), X(0x7e21dd73), + X(0x15fad71b), X(0x7e194584), X(0x162c5a3b), X(0x7e109a24), + X(0x165dd9f0), X(0x7e07db52), X(0x168f5632), X(0x7dff0911), + X(0x16c0cef9), X(0x7df62362), X(0x16f2443e), X(0x7ded2a47), + X(0x1723b5f9), X(0x7de41dc0), X(0x17552422), X(0x7ddafdce), + X(0x17868eb3), X(0x7dd1ca75), X(0x17b7f5a3), X(0x7dc883b4), + X(0x17e958ea), X(0x7dbf298d), X(0x181ab881), X(0x7db5bc02), + X(0x184c1461), X(0x7dac3b15), X(0x187d6c82), X(0x7da2a6c6), + X(0x18aec0db), X(0x7d98ff17), X(0x18e01167), X(0x7d8f4409), + X(0x19115e1c), X(0x7d85759f), X(0x1942a6f3), X(0x7d7b93da), + X(0x1973ebe6), X(0x7d719eba), X(0x19a52ceb), X(0x7d679642), + X(0x19d669fc), X(0x7d5d7a74), X(0x1a07a311), X(0x7d534b50), + X(0x1a38d823), X(0x7d4908d9), X(0x1a6a0929), X(0x7d3eb30f), + X(0x1a9b361d), X(0x7d3449f5), X(0x1acc5ef6), X(0x7d29cd8c), + X(0x1afd83ad), X(0x7d1f3dd6), X(0x1b2ea43a), X(0x7d149ad5), + X(0x1b5fc097), X(0x7d09e489), X(0x1b90d8bb), X(0x7cff1af5), + X(0x1bc1ec9e), X(0x7cf43e1a), X(0x1bf2fc3a), X(0x7ce94dfb), + X(0x1c240786), X(0x7cde4a98), X(0x1c550e7c), X(0x7cd333f3), + X(0x1c861113), X(0x7cc80a0f), X(0x1cb70f43), X(0x7cbcccec), + X(0x1ce80906), X(0x7cb17c8d), X(0x1d18fe54), X(0x7ca618f3), + X(0x1d49ef26), X(0x7c9aa221), X(0x1d7adb73), X(0x7c8f1817), + X(0x1dabc334), X(0x7c837ad8), X(0x1ddca662), X(0x7c77ca65), + X(0x1e0d84f5), X(0x7c6c06c0), X(0x1e3e5ee5), X(0x7c602fec), + X(0x1e6f342c), X(0x7c5445e9), X(0x1ea004c1), X(0x7c4848ba), + X(0x1ed0d09d), X(0x7c3c3860), X(0x1f0197b8), X(0x7c3014de), + X(0x1f325a0b), X(0x7c23de35), X(0x1f63178f), X(0x7c179467), + X(0x1f93d03c), X(0x7c0b3777), X(0x1fc4840a), X(0x7bfec765), + X(0x1ff532f2), X(0x7bf24434), X(0x2025dcec), X(0x7be5ade6), + X(0x205681f1), X(0x7bd9047c), X(0x208721f9), X(0x7bcc47fa), + X(0x20b7bcfe), X(0x7bbf7860), X(0x20e852f6), X(0x7bb295b0), + X(0x2118e3dc), X(0x7ba59fee), X(0x21496fa7), X(0x7b989719), + X(0x2179f64f), X(0x7b8b7b36), X(0x21aa77cf), X(0x7b7e4c45), + X(0x21daf41d), X(0x7b710a49), X(0x220b6b32), X(0x7b63b543), + X(0x223bdd08), X(0x7b564d36), X(0x226c4996), X(0x7b48d225), + X(0x229cb0d5), X(0x7b3b4410), X(0x22cd12bd), X(0x7b2da2fa), + X(0x22fd6f48), X(0x7b1feee5), X(0x232dc66d), X(0x7b1227d3), + X(0x235e1826), X(0x7b044dc7), X(0x238e646a), X(0x7af660c2), + X(0x23beab33), X(0x7ae860c7), X(0x23eeec78), X(0x7ada4dd8), + X(0x241f2833), X(0x7acc27f7), X(0x244f5e5c), X(0x7abdef25), + X(0x247f8eec), X(0x7aafa367), X(0x24afb9da), X(0x7aa144bc), + X(0x24dfdf20), X(0x7a92d329), X(0x250ffeb7), X(0x7a844eae), + X(0x25401896), X(0x7a75b74f), X(0x25702cb7), X(0x7a670d0d), + X(0x25a03b11), X(0x7a584feb), X(0x25d0439f), X(0x7a497feb), + X(0x26004657), X(0x7a3a9d0f), X(0x26304333), X(0x7a2ba75a), + X(0x26603a2c), X(0x7a1c9ece), X(0x26902b39), X(0x7a0d836d), + X(0x26c01655), X(0x79fe5539), X(0x26effb76), X(0x79ef1436), + X(0x271fda96), X(0x79dfc064), X(0x274fb3ae), X(0x79d059c8), + X(0x277f86b5), X(0x79c0e062), X(0x27af53a6), X(0x79b15435), + X(0x27df1a77), X(0x79a1b545), X(0x280edb23), X(0x79920392), + X(0x283e95a1), X(0x79823f20), X(0x286e49ea), X(0x797267f2), + X(0x289df7f8), X(0x79627e08), X(0x28cd9fc1), X(0x79528167), + X(0x28fd4140), X(0x79427210), X(0x292cdc6d), X(0x79325006), + X(0x295c7140), X(0x79221b4b), X(0x298bffb2), X(0x7911d3e2), + X(0x29bb87bc), X(0x790179cd), X(0x29eb0957), X(0x78f10d0f), + X(0x2a1a847b), X(0x78e08dab), X(0x2a49f920), X(0x78cffba3), + X(0x2a796740), X(0x78bf56f9), X(0x2aa8ced3), X(0x78ae9fb0), + X(0x2ad82fd2), X(0x789dd5cb), X(0x2b078a36), X(0x788cf94c), + X(0x2b36ddf7), X(0x787c0a36), X(0x2b662b0e), X(0x786b088c), + X(0x2b957173), X(0x7859f44f), X(0x2bc4b120), X(0x7848cd83), + X(0x2bf3ea0d), X(0x7837942b), X(0x2c231c33), X(0x78264849), + X(0x2c52478a), X(0x7814e9df), X(0x2c816c0c), X(0x780378f1), + X(0x2cb089b1), X(0x77f1f581), X(0x2cdfa071), X(0x77e05f91), + X(0x2d0eb046), X(0x77ceb725), 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+ * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: miscellaneous math and prototypes + + ********************************************************************/ + +#ifndef _V_RANDOM_H_ +#define _V_RANDOM_H_ +#include "ivorbiscodec.h" +#include "os.h" + +#include "asm_arm.h" +#include /* for abs() */ + +#ifdef GEKKO +#include +#endif + +#ifndef _V_WIDE_MATH +#define _V_WIDE_MATH + +#ifndef _LOW_ACCURACY_ +/* 64 bit multiply */ + +#if !(defined WIN32 && defined WINCE) +#include +#endif + +#if BYTE_ORDER==LITTLE_ENDIAN +union magic { + struct { + ogg_int32_t lo; + ogg_int32_t hi; + } halves; + ogg_int64_t whole; +}; +#endif + +#if BYTE_ORDER==BIG_ENDIAN +union magic { + struct { + ogg_int32_t hi; + ogg_int32_t lo; + } halves; + ogg_int64_t whole; +}; +#endif + +STIN ogg_int32_t MULT32(ogg_int32_t x, ogg_int32_t y) { + union magic magic; + magic.whole = (ogg_int64_t)x * y; + return magic.halves.hi; +} + +STIN ogg_int32_t MULT31(ogg_int32_t x, ogg_int32_t y) { + return MULT32(x,y)<<1; +} + +STIN ogg_int32_t MULT31_SHIFT15(ogg_int32_t x, ogg_int32_t y) { + union magic magic; + magic.whole = (ogg_int64_t)x * y; + return ((ogg_uint32_t)(magic.halves.lo)>>15) | ((magic.halves.hi)<<17); +} + +#else +/* 32 bit multiply, more portable but less accurate */ + +/* + * Note: Precision is biased towards the first argument therefore ordering + * is important. Shift values were chosen for the best sound quality after + * many listening tests. + */ + +/* + * For MULT32 and MULT31: The second argument is always a lookup table + * value already preshifted from 31 to 8 bits. We therefore take the + * opportunity to save on text space and use unsigned char for those + * tables in this case. + */ + +STIN ogg_int32_t MULT32(ogg_int32_t x, ogg_int32_t y) { + return (x >> 9) * y; /* y preshifted >>23 */ +} + +STIN ogg_int32_t MULT31(ogg_int32_t x, ogg_int32_t y) { + return (x >> 8) * y; /* y preshifted >>23 */ +} + +STIN ogg_int32_t MULT31_SHIFT15(ogg_int32_t x, ogg_int32_t y) { + return (x >> 6) * y; /* y preshifted >>9 */ +} + +#endif + +/* + * This should be used as a memory barrier, forcing all cached values in + * registers to wr writen back to memory. Might or might not be beneficial + * depending on the architecture and compiler. + */ +#define MB() + +/* + * The XPROD functions are meant to optimize the cross products found all + * over the place in mdct.c by forcing memory operation ordering to avoid + * unnecessary register reloads as soon as memory is being written to. + * However this is only beneficial on CPUs with a sane number of general + * purpose registers which exclude the Intel x86. On Intel, better let the + * compiler actually reload registers directly from original memory by using + * macros. + */ + +#ifdef __i386__ + +#define XPROD32(_a, _b, _t, _v, _x, _y) \ + { *(_x)=MULT32(_a,_t)+MULT32(_b,_v); \ + *(_y)=MULT32(_b,_t)-MULT32(_a,_v); } +#define XPROD31(_a, _b, _t, _v, _x, _y) \ + { *(_x)=MULT31(_a,_t)+MULT31(_b,_v); \ + *(_y)=MULT31(_b,_t)-MULT31(_a,_v); } +#define XNPROD31(_a, _b, _t, _v, _x, _y) \ + { *(_x)=MULT31(_a,_t)-MULT31(_b,_v); \ + *(_y)=MULT31(_b,_t)+MULT31(_a,_v); } + +#else + +STIN void XPROD32(ogg_int32_t a, ogg_int32_t b, + ogg_int32_t t, ogg_int32_t v, + ogg_int32_t *x, ogg_int32_t *y) +{ + *x = MULT32(a, t) + MULT32(b, v); + *y = MULT32(b, t) - MULT32(a, v); +} + +STIN void XPROD31(ogg_int32_t a, ogg_int32_t b, + ogg_int32_t t, ogg_int32_t v, + ogg_int32_t *x, ogg_int32_t *y) +{ + *x = MULT31(a, t) + MULT31(b, v); + *y = MULT31(b, t) - MULT31(a, v); +} + +STIN void XNPROD31(ogg_int32_t a, ogg_int32_t b, + ogg_int32_t t, ogg_int32_t v, + ogg_int32_t *x, ogg_int32_t *y) +{ + *x = MULT31(a, t) - MULT31(b, v); + *y = MULT31(b, t) + MULT31(a, v); +} + +#endif + +#endif + +#ifndef _V_CLIP_MATH +#define _V_CLIP_MATH + +STIN ogg_int32_t CLIP_TO_15(ogg_int32_t x) { + int ret=x; + ret-= ((x<=32767)-1)&(x-32767); + ret-= ((x>=-32768)-1)&(x+32768); + return(ret); +} + +#endif + +STIN ogg_int32_t VFLOAT_MULT(ogg_int32_t a,ogg_int32_t ap, + ogg_int32_t b,ogg_int32_t bp, + ogg_int32_t *p){ + if(a && b){ +#ifndef _LOW_ACCURACY_ + *p=ap+bp+32; + return MULT32(a,b); +#else + *p=ap+bp+31; + return (a>>15)*(b>>16); +#endif + }else + return 0; +} + +int _ilog(unsigned int); + +STIN ogg_int32_t VFLOAT_MULTI(ogg_int32_t a,ogg_int32_t ap, + ogg_int32_t i, + ogg_int32_t *p){ + + int ip=_ilog(abs(i))-31; + return VFLOAT_MULT(a,ap,i<<-ip,ip,p); +} + +STIN ogg_int32_t VFLOAT_ADD(ogg_int32_t a,ogg_int32_t ap, + ogg_int32_t b,ogg_int32_t bp, + ogg_int32_t *p){ + + if(!a){ + *p=bp; + return b; + }else if(!b){ + *p=ap; + return a; + } + + /* yes, this can leak a bit. */ + if(ap>bp){ + int shift=ap-bp+1; + *p=ap+1; + a>>=1; + if(shift<32){ + b=(b+(1<<(shift-1)))>>shift; + }else{ + b=0; + } + }else{ + int shift=bp-ap+1; + *p=bp+1; + b>>=1; + if(shift<32){ + a=(a+(1<<(shift-1)))>>shift; + }else{ + a=0; + } + } + + a+=b; + if((a&0xc0000000)==0xc0000000 || + (a&0xc0000000)==0){ + a<<=1; + (*p)--; + } + return(a); +} + +#endif + + + + diff --git a/genplus-gx/core/tremor/ogg.h b/genplus-gx/core/tremor/ogg.h new file mode 100644 index 0000000000..85cb41b64a --- /dev/null +++ b/genplus-gx/core/tremor/ogg.h @@ -0,0 +1,206 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2003 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: subsumed libogg includes + + ********************************************************************/ +#ifndef _OGG_H +#define _OGG_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "os_types.h" + +typedef struct ogg_buffer_state{ + struct ogg_buffer *unused_buffers; + struct ogg_reference *unused_references; + int outstanding; + int shutdown; +} ogg_buffer_state; + +typedef struct ogg_buffer { + unsigned char *data; + long size; + int refcount; + + union { + ogg_buffer_state *owner; + struct ogg_buffer *next; + } ptr; +} ogg_buffer; + +typedef struct ogg_reference { + ogg_buffer *buffer; + long begin; + long length; + + struct ogg_reference *next; +} ogg_reference; + +typedef struct oggpack_buffer { + int headbit; + unsigned char *headptr; + long headend; + + /* memory management */ + ogg_reference *head; + ogg_reference *tail; + + /* render the byte/bit counter API constant time */ + long count; /* doesn't count the tail */ +} oggpack_buffer; + +typedef struct oggbyte_buffer { + ogg_reference *baseref; + + ogg_reference *ref; + unsigned char *ptr; + long pos; + long end; +} oggbyte_buffer; + +typedef struct ogg_sync_state { + /* decode memory management pool */ + ogg_buffer_state *bufferpool; + + /* stream buffers */ + ogg_reference *fifo_head; + ogg_reference *fifo_tail; + long fifo_fill; + + /* stream sync management */ + int unsynced; + int headerbytes; + int bodybytes; + +} ogg_sync_state; + +typedef struct ogg_stream_state { + ogg_reference *header_head; + ogg_reference *header_tail; + ogg_reference *body_head; + ogg_reference *body_tail; + + int e_o_s; /* set when we have buffered the last + packet in the logical bitstream */ + int b_o_s; /* set after we've written the initial page + of a logical bitstream */ + long serialno; + long pageno; + ogg_int64_t packetno; /* sequence number for decode; the framing + knows where there's a hole in the data, + but we need coupling so that the codec + (which is in a seperate abstraction + layer) also knows about the gap */ + ogg_int64_t granulepos; + + int lacing_fill; + ogg_uint32_t body_fill; + + /* decode-side state data */ + int holeflag; + int spanflag; + int clearflag; + int laceptr; + ogg_uint32_t body_fill_next; + +} ogg_stream_state; + +typedef struct { + ogg_reference *packet; + long bytes; + long b_o_s; + long e_o_s; + ogg_int64_t granulepos; + ogg_int64_t packetno; /* sequence number for decode; the framing + knows where there's a hole in the data, + but we need coupling so that the codec + (which is in a seperate abstraction + layer) also knows about the gap */ +} ogg_packet; + +typedef struct { + ogg_reference *header; + int header_len; + ogg_reference *body; + long body_len; +} ogg_page; + +/* Ogg BITSTREAM PRIMITIVES: bitstream ************************/ + +extern void oggpack_readinit(oggpack_buffer *b,ogg_reference *r); +extern long oggpack_look(oggpack_buffer *b,int bits); +extern void oggpack_adv(oggpack_buffer *b,int bits); +extern long oggpack_read(oggpack_buffer *b,int bits); +extern long oggpack_bytes(oggpack_buffer *b); +extern long oggpack_bits(oggpack_buffer *b); +extern int oggpack_eop(oggpack_buffer *b); + +/* Ogg BITSTREAM PRIMITIVES: decoding **************************/ + +extern ogg_sync_state *ogg_sync_create(void); +extern int ogg_sync_destroy(ogg_sync_state *oy); +extern int ogg_sync_reset(ogg_sync_state *oy); + +extern unsigned char *ogg_sync_bufferin(ogg_sync_state *oy, long size); +extern int ogg_sync_wrote(ogg_sync_state *oy, long bytes); +extern long ogg_sync_pageseek(ogg_sync_state *oy,ogg_page *og); +extern int ogg_sync_pageout(ogg_sync_state *oy, ogg_page *og); +extern int ogg_stream_pagein(ogg_stream_state *os, ogg_page *og); +extern int ogg_stream_packetout(ogg_stream_state *os,ogg_packet *op); +extern int ogg_stream_packetpeek(ogg_stream_state *os,ogg_packet *op); + +/* Ogg BITSTREAM PRIMITIVES: general ***************************/ + +extern ogg_stream_state *ogg_stream_create(int serialno); +extern int ogg_stream_destroy(ogg_stream_state *os); +extern int ogg_stream_reset(ogg_stream_state *os); +extern int ogg_stream_reset_serialno(ogg_stream_state *os,int serialno); +extern int ogg_stream_eos(ogg_stream_state *os); + +extern int ogg_page_checksum_set(ogg_page *og); + +extern int ogg_page_version(ogg_page *og); +extern int ogg_page_continued(ogg_page *og); +extern int ogg_page_bos(ogg_page *og); +extern int ogg_page_eos(ogg_page *og); +extern ogg_int64_t ogg_page_granulepos(ogg_page *og); +extern ogg_uint32_t ogg_page_serialno(ogg_page *og); +extern ogg_uint32_t ogg_page_pageno(ogg_page *og); +extern int ogg_page_packets(ogg_page *og); +extern int ogg_page_getbuffer(ogg_page *og, unsigned char **buffer); + +extern int ogg_packet_release(ogg_packet *op); +extern int ogg_page_release(ogg_page *og); + +extern void ogg_page_dup(ogg_page *d, ogg_page *s); + +/* Ogg BITSTREAM PRIMITIVES: return codes ***************************/ + +#define OGG_SUCCESS 0 + +#define OGG_HOLE -10 +#define OGG_SPAN -11 +#define OGG_EVERSION -12 +#define OGG_ESERIAL -13 +#define OGG_EINVAL -14 +#define OGG_EEOS -15 + + +#ifdef __cplusplus +} +#endif + +#endif /* _OGG_H */ diff --git a/genplus-gx/core/tremor/os.h b/genplus-gx/core/tremor/os.h new file mode 100644 index 0000000000..95e6e27d92 --- /dev/null +++ b/genplus-gx/core/tremor/os.h @@ -0,0 +1,64 @@ +#ifndef _OS_H +#define _OS_H +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: #ifdef jail to whip a few platforms into the UNIX ideal. + + ********************************************************************/ + +#include +#include "os_types.h" + +#ifndef _V_IFDEFJAIL_H_ +# define _V_IFDEFJAIL_H_ + +# ifdef __GNUC__ +# define STIN static __inline__ +# elif _WIN32 +# define STIN static __inline +# endif +#else +# define STIN static +#endif + +#ifndef M_PI +# define M_PI (3.1415926536f) +#endif + +#ifdef _WIN32 +# include +# define rint(x) (floor((x)+0.5f)) +# define NO_FLOAT_MATH_LIB +# define FAST_HYPOT(a, b) sqrt((a)*(a) + (b)*(b)) +# define LITTLE_ENDIAN 1 +# define BYTE_ORDER LITTLE_ENDIAN +#endif + +#ifdef HAVE_ALLOCA_H +# include +#endif + +#ifdef USE_MEMORY_H +# include +#endif + +#ifndef min +# define min(x,y) ((x)>(y)?(y):(x)) +#endif + +#ifndef max +# define max(x,y) ((x)<(y)?(y):(x)) +#endif + +#endif /* _OS_H */ diff --git a/genplus-gx/core/tremor/os_types.h b/genplus-gx/core/tremor/os_types.h new file mode 100644 index 0000000000..8af289316b --- /dev/null +++ b/genplus-gx/core/tremor/os_types.h @@ -0,0 +1,42 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: #ifdef jail to whip a few platforms into the UNIX ideal. + + ********************************************************************/ +#ifndef _OS_TYPES_H +#define _OS_TYPES_H + +#ifdef _LOW_ACCURACY_ +# define X(n) (((((n)>>22)+1)>>1) - ((((n)>>22)+1)>>9)) +# define LOOKUP_T const unsigned char +#else +# define X(n) (n) +# define LOOKUP_T const ogg_int32_t +#endif + +/* make it easy on the folks that want to compile the libs with a + different malloc than stdlib */ +#define _ogg_malloc malloc +#define _ogg_calloc calloc +#define _ogg_realloc realloc +#define _ogg_free free + +#include + +typedef int64_t ogg_int64_t; +typedef int32_t ogg_int32_t; +typedef uint32_t ogg_uint32_t; +typedef int16_t ogg_int16_t; + +#endif /* _OS_TYPES_H */ diff --git a/genplus-gx/core/tremor/registry.c b/genplus-gx/core/tremor/registry.c new file mode 100644 index 0000000000..c0b5fec0cc --- /dev/null +++ b/genplus-gx/core/tremor/registry.c @@ -0,0 +1,50 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: registry for floor, res backends and channel mappings + + ********************************************************************/ + +#include "ivorbiscodec.h" +#include "codec_internal.h" +#include "registry.h" +#include "misc.h" + + +/* seems like major overkill now; the backend numbers will grow into + the infrastructure soon enough */ + +extern vorbis_func_floor floor0_exportbundle; +extern vorbis_func_floor floor1_exportbundle; +extern vorbis_func_residue residue0_exportbundle; +extern vorbis_func_residue residue1_exportbundle; +extern vorbis_func_residue residue2_exportbundle; +extern vorbis_func_mapping mapping0_exportbundle; + +vorbis_func_floor *_floor_P[]={ + &floor0_exportbundle, + &floor1_exportbundle, +}; + +vorbis_func_residue *_residue_P[]={ + &residue0_exportbundle, + &residue1_exportbundle, + &residue2_exportbundle, +}; + +vorbis_func_mapping *_mapping_P[]={ + &mapping0_exportbundle, +}; + + + diff --git a/genplus-gx/core/tremor/registry.h b/genplus-gx/core/tremor/registry.h new file mode 100644 index 0000000000..2bc8068f69 --- /dev/null +++ b/genplus-gx/core/tremor/registry.h @@ -0,0 +1,40 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: registry for time, floor, res backends and channel mappings + + ********************************************************************/ + +#ifndef _V_REG_H_ +#define _V_REG_H_ + +#define VI_TRANSFORMB 1 +#define VI_WINDOWB 1 +#define VI_TIMEB 1 +#define VI_FLOORB 2 +#define VI_RESB 3 +#define VI_MAPB 1 + +#include "backends.h" + +#if defined(_WIN32) && defined(VORBISDLL_IMPORT) +# define EXTERN __declspec(dllimport) extern +#else +# define EXTERN extern +#endif + +EXTERN vorbis_func_floor *_floor_P[]; +EXTERN vorbis_func_residue *_residue_P[]; +EXTERN vorbis_func_mapping *_mapping_P[]; + +#endif diff --git a/genplus-gx/core/tremor/res012.c b/genplus-gx/core/tremor/res012.c new file mode 100644 index 0000000000..224b54ee8a --- /dev/null +++ b/genplus-gx/core/tremor/res012.c @@ -0,0 +1,342 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: residue backend 0, 1 and 2 implementation + + ********************************************************************/ + +#include +#include +#include +#include "ogg.h" +#include "ivorbiscodec.h" +#include "codec_internal.h" +#include "registry.h" +#include "codebook.h" +#include "misc.h" +#include "os.h" +#include "block.h" + +typedef struct { + vorbis_info_residue0 *info; + int map; + + int parts; + int stages; + codebook *fullbooks; + codebook *phrasebook; + codebook ***partbooks; + + int partvals; + int **decodemap; + +} vorbis_look_residue0; + +void res0_free_info(vorbis_info_residue *i){ + vorbis_info_residue0 *info=(vorbis_info_residue0 *)i; + if(info){ + memset(info,0,sizeof(*info)); + _ogg_free(info); + } +} + +void res0_free_look(vorbis_look_residue *i){ + int j; + if(i){ + + vorbis_look_residue0 *look=(vorbis_look_residue0 *)i; + + for(j=0;jparts;j++) + if(look->partbooks[j])_ogg_free(look->partbooks[j]); + _ogg_free(look->partbooks); + for(j=0;jpartvals;j++) + _ogg_free(look->decodemap[j]); + _ogg_free(look->decodemap); + + memset(look,0,sizeof(*look)); + _ogg_free(look); + } +} + +static int ilog(unsigned int v){ + int ret=0; + while(v){ + ret++; + v>>=1; + } + return(ret); +} + +static int icount(unsigned int v){ + int ret=0; + while(v){ + ret+=v&1; + v>>=1; + } + return(ret); +} + +/* vorbis_info is for range checking */ +vorbis_info_residue *res0_unpack(vorbis_info *vi,oggpack_buffer *opb){ + int j,acc=0; + vorbis_info_residue0 *info=(vorbis_info_residue0 *)_ogg_calloc(1,sizeof(*info)); + codec_setup_info *ci=(codec_setup_info *)vi->codec_setup; + + info->begin=oggpack_read(opb,24); + info->end=oggpack_read(opb,24); + info->grouping=oggpack_read(opb,24)+1; + info->partitions=oggpack_read(opb,6)+1; + info->groupbook=oggpack_read(opb,8); + + for(j=0;jpartitions;j++){ + int cascade=oggpack_read(opb,3); + if(oggpack_read(opb,1)) + cascade|=(oggpack_read(opb,5)<<3); + info->secondstages[j]=cascade; + + acc+=icount(cascade); + } + for(j=0;jbooklist[j]=oggpack_read(opb,8); + + if(info->groupbook>=ci->books)goto errout; + for(j=0;jbooklist[j]>=ci->books)goto errout; + + return(info); + errout: + res0_free_info(info); + return(NULL); +} + +vorbis_look_residue *res0_look(vorbis_dsp_state *vd,vorbis_info_mode *vm, + vorbis_info_residue *vr){ + vorbis_info_residue0 *info=(vorbis_info_residue0 *)vr; + vorbis_look_residue0 *look=(vorbis_look_residue0 *)_ogg_calloc(1,sizeof(*look)); + codec_setup_info *ci=(codec_setup_info *)vd->vi->codec_setup; + + int j,k,acc=0; + int dim; + int maxstage=0; + look->info=info; + look->map=vm->mapping; + + look->parts=info->partitions; + look->fullbooks=ci->fullbooks; + look->phrasebook=ci->fullbooks+info->groupbook; + dim=look->phrasebook->dim; + + look->partbooks=(codebook ***)_ogg_calloc(look->parts,sizeof(*look->partbooks)); + + for(j=0;jparts;j++){ + int stages=ilog(info->secondstages[j]); + if(stages){ + if(stages>maxstage)maxstage=stages; + look->partbooks[j]=(codebook **)_ogg_calloc(stages,sizeof(*look->partbooks[j])); + for(k=0;ksecondstages[j]&(1<partbooks[j][k]=ci->fullbooks+info->booklist[acc++]; +#ifdef TRAIN_RES + look->training_data[k][j]=calloc(look->partbooks[j][k]->entries, + sizeof(***look->training_data)); +#endif + } + } + } + + look->partvals=look->parts; + for(j=1;jpartvals*=look->parts; + look->stages=maxstage; + look->decodemap=(int **)_ogg_malloc(look->partvals*sizeof(*look->decodemap)); + for(j=0;jpartvals;j++){ + long val=j; + long mult=look->partvals/look->parts; + look->decodemap[j]=(int *)_ogg_malloc(dim*sizeof(*look->decodemap[j])); + for(k=0;kparts; + look->decodemap[j][k]=deco; + } + } + + return(look); +} + + +/* a truncated packet here just means 'stop working'; it's not an error */ +static int _01inverse(vorbis_block *vb,vorbis_look_residue *vl, + ogg_int32_t **in,int ch, + long (*decodepart)(codebook *, ogg_int32_t *, + oggpack_buffer *,int,int)){ + + long i,j,k,l,s; + vorbis_look_residue0 *look=(vorbis_look_residue0 *)vl; + vorbis_info_residue0 *info=look->info; + + /* move all this setup out later */ + int samples_per_partition=info->grouping; + int partitions_per_word=look->phrasebook->dim; + int max=vb->pcmend>>1; + int end=(info->endend:max); + int n=end-info->begin; + + if(n>0){ + int partvals=n/samples_per_partition; + int partwords=(partvals+partitions_per_word-1)/partitions_per_word; + int ***partword=(int ***)alloca(ch*sizeof(*partword)); + + for(j=0;jstages;s++){ + + /* each loop decodes on partition codeword containing + partitions_pre_word partitions */ + for(i=0,l=0;iphrasebook,&vb->opb); + if(temp==-1)goto eopbreak; + partword[j][l]=look->decodemap[temp]; + if(partword[j][l]==NULL)goto errout; + } + } + + /* now we decode residual values for the partitions */ + for(k=0;kbegin+i*samples_per_partition; + if(info->secondstages[partword[j][l][k]]&(1<partbooks[partword[j][l][k]][s]; + if(stagebook){ + if(decodepart(stagebook,in[j]+offset,&vb->opb, + samples_per_partition,-8)==-1)goto eopbreak; + } + } + } + } + } + } + errout: + eopbreak: + return(0); +} + +int res0_inverse(vorbis_block *vb,vorbis_look_residue *vl, + ogg_int32_t **in,int *nonzero,int ch){ + int i,used=0; + for(i=0;iinfo; + + /* move all this setup out later */ + int samples_per_partition=info->grouping; + int partitions_per_word=look->phrasebook->dim; + int max=(vb->pcmend*ch)>>1; + int end=(info->endend:max); + int n=end-info->begin; + + if(n>0){ + + int partvals=n/samples_per_partition; + int partwords=(partvals+partitions_per_word-1)/partitions_per_word; + int **partword=(int **)_vorbis_block_alloc(vb,partwords*sizeof(*partword)); + int beginoff=info->begin/ch; + + for(i=0;istages;s++){ + for(i=0,l=0;iphrasebook,&vb->opb); + if(temp==-1)goto eopbreak; + partword[l]=look->decodemap[temp]; + if(partword[l]==NULL)goto errout; + } + + /* now we decode residual values for the partitions */ + for(k=0;ksecondstages[partword[l][k]]&(1<partbooks[partword[l][k]][s]; + + if(stagebook){ + if(vorbis_book_decodevv_add(stagebook,in, + i*samples_per_partition+beginoff,ch, + &vb->opb, + samples_per_partition,-8)==-1) + goto eopbreak; + } + } + } + } + } + errout: + eopbreak: + return(0); +} + + +vorbis_func_residue residue0_exportbundle={ + &res0_unpack, + &res0_look, + &res0_free_info, + &res0_free_look, + &res0_inverse +}; + +vorbis_func_residue residue1_exportbundle={ + &res0_unpack, + &res0_look, + &res0_free_info, + &res0_free_look, + &res1_inverse +}; + +vorbis_func_residue residue2_exportbundle={ + &res0_unpack, + &res0_look, + &res0_free_info, + &res0_free_look, + &res2_inverse +}; diff --git a/genplus-gx/core/tremor/sharedbook.c b/genplus-gx/core/tremor/sharedbook.c new file mode 100644 index 0000000000..8e074925d0 --- /dev/null +++ b/genplus-gx/core/tremor/sharedbook.c @@ -0,0 +1,439 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: basic shared codebook operations + + ********************************************************************/ + +#include +#include +#include +#include "ogg.h" +#include "misc.h" +#include "ivorbiscodec.h" +#include "codebook.h" + +/**** pack/unpack helpers ******************************************/ +int _ilog(unsigned int v){ + int ret=0; + while(v){ + ret++; + v>>=1; + } + return(ret); +} + +/* 32 bit float (not IEEE; nonnormalized mantissa + + biased exponent) : neeeeeee eeemmmmm mmmmmmmm mmmmmmmm + Why not IEEE? It's just not that important here. */ + +#define VQ_FEXP 10 +#define VQ_FMAN 21 +#define VQ_FEXP_BIAS 768 /* bias toward values smaller than 1. */ + +static ogg_int32_t _float32_unpack(long val,int *point){ + long mant=val&0x1fffff; + int sign=val&0x80000000; + long exp =(val&0x7fe00000L)>>VQ_FMAN; + + exp-=(VQ_FMAN-1)+VQ_FEXP_BIAS; + + if(mant){ + while(!(mant&0x40000000)){ + mant<<=1; + exp-=1; + } + + if(sign)mant= -mant; + }else{ + sign=0; + exp=-9999; + } + + *point=exp; + return mant; +} + +/* given a list of word lengths, generate a list of codewords. Works + for length ordered or unordered, always assigns the lowest valued + codewords first. Extended to handle unused entries (length 0) */ +ogg_uint32_t *_make_words(long *l,long n,long sparsecount){ + long i,j,count=0; + ogg_uint32_t marker[33]; + ogg_uint32_t *r=(ogg_uint32_t *)_ogg_malloc((sparsecount?sparsecount:n)*sizeof(*r)); + memset(marker,0,sizeof(marker)); + + for(i=0;i0){ + ogg_uint32_t entry=marker[length]; + + /* when we claim a node for an entry, we also claim the nodes + below it (pruning off the imagined tree that may have dangled + from it) as well as blocking the use of any nodes directly + above for leaves */ + + /* update ourself */ + if(length<32 && (entry>>length)){ + /* error condition; the lengths must specify an overpopulated tree */ + _ogg_free(r); + return(NULL); + } + r[count++]=entry; + + /* Look to see if the next shorter marker points to the node + above. if so, update it and repeat. */ + { + for(j=length;j>0;j--){ + + if(marker[j]&1){ + /* have to jump branches */ + if(j==1) + marker[1]++; + else + marker[j]=marker[j-1]<<1; + break; /* invariant says next upper marker would already + have been moved if it was on the same path */ + } + marker[j]++; + } + } + + /* prune the tree; the implicit invariant says all the longer + markers were dangling from our just-taken node. Dangle them + from our *new* node. */ + for(j=length+1;j<33;j++) + if((marker[j]>>1) == entry){ + entry=marker[j]; + marker[j]=marker[j-1]<<1; + }else + break; + }else + if(sparsecount==0)count++; + } + + /* bitreverse the words because our bitwise packer/unpacker is LSb + endian */ + for(i=0,count=0;i>j)&1; + } + + if(sparsecount){ + if(l[i]) + r[count++]=temp; + }else + r[count++]=temp; + } + + return(r); +} + +/* there might be a straightforward one-line way to do the below + that's portable and totally safe against roundoff, but I haven't + thought of it. Therefore, we opt on the side of caution */ +long _book_maptype1_quantvals(const static_codebook *b){ + /* get us a starting hint, we'll polish it below */ + int bits=_ilog(b->entries); + int vals=b->entries>>((bits-1)*(b->dim-1)/b->dim); + + while(1){ + long acc=1; + long acc1=1; + int i; + for(i=0;idim;i++){ + acc*=vals; + acc1*=vals+1; + } + if(acc<=b->entries && acc1>b->entries){ + return(vals); + }else{ + if(acc>b->entries){ + vals--; + }else{ + vals++; + } + } + } +} + +/* different than what _book_unquantize does for mainline: + we repack the book in a fixed point format that shares the same + binary point. Upon first use, we can shift point if needed */ + +/* we need to deal with two map types: in map type 1, the values are + generated algorithmically (each column of the vector counts through + the values in the quant vector). in map type 2, all the values came + in in an explicit list. Both value lists must be unpacked */ + +ogg_int32_t *_book_unquantize(const static_codebook *b,int n,int *sparsemap, + int *maxpoint){ + long j,k,count=0; + if(b->maptype==1 || b->maptype==2){ + int quantvals; + int minpoint,delpoint; + ogg_int32_t mindel=_float32_unpack(b->q_min,&minpoint); + ogg_int32_t delta=_float32_unpack(b->q_delta,&delpoint); + ogg_int32_t *r=(ogg_int32_t *)_ogg_calloc(n*b->dim,sizeof(*r)); + int *rp=(int *)_ogg_calloc(n*b->dim,sizeof(*rp)); + + *maxpoint=minpoint; + + /* maptype 1 and 2 both use a quantized value vector, but + different sizes */ + switch(b->maptype){ + case 1: + /* most of the time, entries%dimensions == 0, but we need to be + well defined. We define that the possible vales at each + scalar is values == entries/dim. If entries%dim != 0, we'll + have 'too few' values (values*dimentries;j++){ + if((sparsemap && b->lengthlist[j]) || !sparsemap){ + ogg_int32_t last=0; + int lastpoint=0; + int indexdiv=1; + for(k=0;kdim;k++){ + int index= (j/indexdiv)%quantvals; + int point=0; + int val=VFLOAT_MULTI(delta,delpoint, + abs(b->quantlist[index]),&point); + + val=VFLOAT_ADD(mindel,minpoint,val,point,&point); + val=VFLOAT_ADD(last,lastpoint,val,point,&point); + + if(b->q_sequencep){ + last=val; + lastpoint=point; + } + + if(sparsemap){ + r[sparsemap[count]*b->dim+k]=val; + rp[sparsemap[count]*b->dim+k]=point; + }else{ + r[count*b->dim+k]=val; + rp[count*b->dim+k]=point; + } + if(*maxpointentries;j++){ + if((sparsemap && b->lengthlist[j]) || !sparsemap){ + ogg_int32_t last=0; + int lastpoint=0; + + for(k=0;kdim;k++){ + int point=0; + int val=VFLOAT_MULTI(delta,delpoint, + abs(b->quantlist[j*b->dim+k]),&point); + + val=VFLOAT_ADD(mindel,minpoint,val,point,&point); + val=VFLOAT_ADD(last,lastpoint,val,point,&point); + + if(b->q_sequencep){ + last=val; + lastpoint=point; + } + + if(sparsemap){ + r[sparsemap[count]*b->dim+k]=val; + rp[sparsemap[count]*b->dim+k]=point; + }else{ + r[count*b->dim+k]=val; + rp[count*b->dim+k]=point; + } + if(*maxpointdim;j++) + if(rp[j]<*maxpoint) + r[j]>>=*maxpoint-rp[j]; + + _ogg_free(rp); + return(r); + } + return(NULL); +} + +void vorbis_staticbook_clear(static_codebook *b){ + if(b->quantlist)_ogg_free(b->quantlist); + if(b->lengthlist)_ogg_free(b->lengthlist); + memset(b,0,sizeof(*b)); + +} + +void vorbis_staticbook_destroy(static_codebook *b){ + vorbis_staticbook_clear(b); + _ogg_free(b); +} + +void vorbis_book_clear(codebook *b){ + /* static book is not cleared; we're likely called on the lookup and + the static codebook belongs to the info struct */ + if(b->valuelist)_ogg_free(b->valuelist); + if(b->codelist)_ogg_free(b->codelist); + + if(b->dec_index)_ogg_free(b->dec_index); + if(b->dec_codelengths)_ogg_free(b->dec_codelengths); + if(b->dec_firsttable)_ogg_free(b->dec_firsttable); + + memset(b,0,sizeof(*b)); +} + +static ogg_uint32_t bitreverse(ogg_uint32_t x){ + x= ((x>>16)&0x0000ffffUL) | ((x<<16)&0xffff0000UL); + x= ((x>> 8)&0x00ff00ffUL) | ((x<< 8)&0xff00ff00UL); + x= ((x>> 4)&0x0f0f0f0fUL) | ((x<< 4)&0xf0f0f0f0UL); + x= ((x>> 2)&0x33333333UL) | ((x<< 2)&0xccccccccUL); + return((x>> 1)&0x55555555UL) | ((x<< 1)&0xaaaaaaaaUL); +} + +static int sort32a(const void *a,const void *b){ + return (**(ogg_uint32_t **)a>**(ogg_uint32_t **)b)- + (**(ogg_uint32_t **)a<**(ogg_uint32_t **)b); +} + +/* decode codebook arrangement is more heavily optimized than encode */ +int vorbis_book_init_decode(codebook *c,const static_codebook *s){ + int i,j,n=0,tabn; + int *sortindex; + memset(c,0,sizeof(*c)); + + /* count actually used entries */ + for(i=0;ientries;i++) + if(s->lengthlist[i]>0) + n++; + + c->entries=s->entries; + c->used_entries=n; + c->dim=s->dim; + + if(n>0){ + /* two different remappings go on here. + + First, we collapse the likely sparse codebook down only to + actually represented values/words. This collapsing needs to be + indexed as map-valueless books are used to encode original entry + positions as integers. + + Second, we reorder all vectors, including the entry index above, + by sorted bitreversed codeword to allow treeless decode. */ + + /* perform sort */ + ogg_uint32_t *codes=_make_words(s->lengthlist,s->entries,c->used_entries); + ogg_uint32_t **codep=(ogg_uint32_t **)alloca(sizeof(*codep)*n); + + if(codes==NULL)goto err_out; + + for(i=0;icodelist=(ogg_uint32_t *)_ogg_malloc(n*sizeof(*c->codelist)); + /* the index is a reverse index */ + for(i=0;icodelist[sortindex[i]]=codes[i]; + _ogg_free(codes); + + + + c->valuelist=_book_unquantize(s,n,sortindex,&c->binarypoint); + c->dec_index=(int *)_ogg_malloc(n*sizeof(*c->dec_index)); + + for(n=0,i=0;ientries;i++) + if(s->lengthlist[i]>0) + c->dec_index[sortindex[n++]]=i; + + c->dec_codelengths=(char *)_ogg_malloc(n*sizeof(*c->dec_codelengths)); + for(n=0,i=0;ientries;i++) + if(s->lengthlist[i]>0) + c->dec_codelengths[sortindex[n++]]=s->lengthlist[i]; + + c->dec_firsttablen=_ilog(c->used_entries)-4; /* this is magic */ + if(c->dec_firsttablen<5)c->dec_firsttablen=5; + if(c->dec_firsttablen>8)c->dec_firsttablen=8; + + tabn=1<dec_firsttablen; + c->dec_firsttable=(ogg_uint32_t *)_ogg_calloc(tabn,sizeof(*c->dec_firsttable)); + c->dec_maxlength=0; + + for(i=0;idec_maxlengthdec_codelengths[i]) + c->dec_maxlength=c->dec_codelengths[i]; + if(c->dec_codelengths[i]<=c->dec_firsttablen){ + ogg_uint32_t orig=bitreverse(c->codelist[i]); + for(j=0;j<(1<<(c->dec_firsttablen-c->dec_codelengths[i]));j++) + c->dec_firsttable[orig|(j<dec_codelengths[i])]=i+1; + } + } + + /* now fill in 'unused' entries in the firsttable with hi/lo search + hints for the non-direct-hits */ + { + ogg_uint32_t mask=0xfffffffeUL<<(31-c->dec_firsttablen); + long lo=0,hi=0; + + for(i=0;idec_firsttablen); + if(c->dec_firsttable[bitreverse(word)]==0){ + while((lo+1)codelist[lo+1]<=word)lo++; + while( hi=(c->codelist[hi]&mask))hi++; + + /* we only actually have 15 bits per hint to play with here. + In order to overflow gracefully (nothing breaks, efficiency + just drops), encode as the difference from the extremes. */ + { + unsigned long loval=lo; + unsigned long hival=n-hi; + + if(loval>0x7fff)loval=0x7fff; + if(hival>0x7fff)hival=0x7fff; + c->dec_firsttable[bitreverse(word)]= + 0x80000000UL | (loval<<15) | hival; + } + } + } + } + } + + return(0); + err_out: + vorbis_book_clear(c); + return(-1); +} + diff --git a/genplus-gx/core/tremor/synthesis.c b/genplus-gx/core/tremor/synthesis.c new file mode 100644 index 0000000000..962c7309ef --- /dev/null +++ b/genplus-gx/core/tremor/synthesis.c @@ -0,0 +1,113 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2003 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: single-block PCM synthesis + last mod: $Id: synthesis.c,v 1.4 2003/03/29 03:07:21 xiphmont Exp $ + + ********************************************************************/ + +#include +#include "ogg.h" +#include "ivorbiscodec.h" +#include "codec_internal.h" +#include "registry.h" +#include "misc.h" +#include "block.h" + +int vorbis_synthesis(vorbis_block *vb,ogg_packet *op,int decodep){ + vorbis_dsp_state *vd=vb->vd; + private_state *b=(private_state *)vd->backend_state; + vorbis_info *vi=vd->vi; + codec_setup_info *ci=(codec_setup_info *)vi->codec_setup; + oggpack_buffer *opb=&vb->opb; + int type,mode,i; + + /* first things first. Make sure decode is ready */ + _vorbis_block_ripcord(vb); + oggpack_readinit(opb,op->packet); + + /* Check the packet type */ + if(oggpack_read(opb,1)!=0){ + /* Oops. This is not an audio data packet */ + return(OV_ENOTAUDIO); + } + + /* read our mode and pre/post windowsize */ + mode=oggpack_read(opb,b->modebits); + if(mode==-1)return(OV_EBADPACKET); + + vb->mode=mode; + vb->W=ci->mode_param[mode]->blockflag; + if(vb->W){ + vb->lW=oggpack_read(opb,1); + vb->nW=oggpack_read(opb,1); + if(vb->nW==-1) return(OV_EBADPACKET); + }else{ + vb->lW=0; + vb->nW=0; + } + + /* more setup */ + vb->granulepos=op->granulepos; + vb->sequence=op->packetno-3; /* first block is third packet */ + vb->eofflag=op->e_o_s; + + if(decodep){ + /* alloc pcm passback storage */ + vb->pcmend=ci->blocksizes[vb->W]; + vb->pcm=(ogg_int32_t **)_vorbis_block_alloc(vb,sizeof(*vb->pcm)*vi->channels); + for(i=0;ichannels;i++) + vb->pcm[i]=(ogg_int32_t *)_vorbis_block_alloc(vb,vb->pcmend*sizeof(*vb->pcm[i])); + + /* unpack_header enforces range checking */ + type=ci->map_type[ci->mode_param[mode]->mapping]; + + return(_mapping_P[type]->inverse(vb,b->mode[mode])); + }else{ + /* no pcm */ + vb->pcmend=0; + vb->pcm=NULL; + + return(0); + } +} + +long vorbis_packet_blocksize(vorbis_info *vi,ogg_packet *op){ + codec_setup_info *ci=(codec_setup_info *)vi->codec_setup; + oggpack_buffer opb; + int mode; + + oggpack_readinit(&opb,op->packet); + + /* Check the packet type */ + if(oggpack_read(&opb,1)!=0){ + /* Oops. This is not an audio data packet */ + return(OV_ENOTAUDIO); + } + + { + int modebits=0; + int v=ci->modes; + while(v>1){ + modebits++; + v>>=1; + } + + /* read our mode and pre/post windowsize */ + mode=oggpack_read(&opb,modebits); + } + if(mode==-1)return(OV_EBADPACKET); + return(ci->blocksizes[ci->mode_param[mode]->blockflag]); +} + + diff --git a/genplus-gx/core/tremor/vorbisfile.c b/genplus-gx/core/tremor/vorbisfile.c new file mode 100644 index 0000000000..0230c93e03 --- /dev/null +++ b/genplus-gx/core/tremor/vorbisfile.c @@ -0,0 +1,1597 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2003 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: stdio-based convenience library for opening/seeking/decoding + last mod: $Id: vorbisfile.c,v 1.6 2003/03/30 23:40:56 xiphmont Exp $ + + ********************************************************************/ + +#include +#include +#include +#include +#include + +#include "ivorbiscodec.h" +#include "ivorbisfile.h" + +#include "misc.h" + +/* A 'chained bitstream' is a Vorbis bitstream that contains more than + one logical bitstream arranged end to end (the only form of Ogg + multiplexing allowed in a Vorbis bitstream; grouping [parallel + multiplexing] is not allowed in Vorbis) */ + +/* A Vorbis file can be played beginning to end (streamed) without + worrying ahead of time about chaining (see decoder_example.c). If + we have the whole file, however, and want random access + (seeking/scrubbing) or desire to know the total length/time of a + file, we need to account for the possibility of chaining. */ + +/* We can handle things a number of ways; we can determine the entire + bitstream structure right off the bat, or find pieces on demand. + This example determines and caches structure for the entire + bitstream, but builds a virtual decoder on the fly when moving + between links in the chain. */ + +/* There are also different ways to implement seeking. Enough + information exists in an Ogg bitstream to seek to + sample-granularity positions in the output. Or, one can seek by + picking some portion of the stream roughly in the desired area if + we only want coarse navigation through the stream. */ + +/************************************************************************* + * Many, many internal helpers. The intention is not to be confusing; + * rampant duplication and monolithic function implementation would be + * harder to understand anyway. The high level functions are last. Begin + * grokking near the end of the file */ + + +/* read a little more data from the file/pipe into the ogg_sync framer */ +static long _get_data(OggVorbis_File *vf){ + errno=0; + if(vf->datasource){ + unsigned char *buffer=ogg_sync_bufferin(vf->oy,CHUNKSIZE); + long bytes=(vf->callbacks.read_func)(buffer,1,CHUNKSIZE,vf->datasource); + if(bytes>0)ogg_sync_wrote(vf->oy,bytes); + +#ifndef GEKKO + else if(bytes==0 && errno ) +#else + // Not sure what is up with this... appears that EOVERFLOW is set whenever + // we read to the end of the file... + // original patch by raz0red for Mednafen-Wii + else if(bytes==0 && errno && errno != EOVERFLOW ) +#endif + { + return(-1); + } + return(bytes); + }else + return(0); +} + +/* save a tiny smidge of verbosity to make the code more readable */ +static void _seek_helper(OggVorbis_File *vf,ogg_int64_t offset){ + if(vf->datasource){ + (vf->callbacks.seek_func)(vf->datasource, offset, SEEK_SET); + vf->offset=offset; + ogg_sync_reset(vf->oy); + }else{ + /* shouldn't happen unless someone writes a broken callback */ + return; + } +} + +/* The read/seek functions track absolute position within the stream */ + +/* from the head of the stream, get the next page. boundary specifies + if the function is allowed to fetch more data from the stream (and + how much) or only use internally buffered data. + + boundary: -1) unbounded search + 0) read no additional data; use cached only + n) search for a new page beginning for n bytes + + return: <0) did not find a page (OV_FALSE, OV_EOF, OV_EREAD) + n) found a page at absolute offset n + + produces a refcounted page */ + +static ogg_int64_t _get_next_page(OggVorbis_File *vf,ogg_page *og, + ogg_int64_t boundary){ + if(boundary>0)boundary+=vf->offset; + while(1){ + long more; + + if(boundary>0 && vf->offset>=boundary)return(OV_FALSE); + more=ogg_sync_pageseek(vf->oy,og); + + if(more<0){ + /* skipped n bytes */ + vf->offset-=more; + }else{ + if(more==0){ + /* send more paramedics */ + if(!boundary)return(OV_FALSE); + { + long ret=_get_data(vf); + if(ret==0)return(OV_EOF); + if(ret<0)return(OV_EREAD); + } + }else{ + /* got a page. Return the offset at the page beginning, + advance the internal offset past the page end */ + ogg_int64_t ret=vf->offset; + vf->offset+=more; + return(ret); + + } + } + } +} + +/* find the latest page beginning before the current stream cursor + position. Much dirtier than the above as Ogg doesn't have any + backward search linkage. no 'readp' as it will certainly have to + read. */ +/* returns offset or OV_EREAD, OV_FAULT and produces a refcounted page */ + +static ogg_int64_t _get_prev_page(OggVorbis_File *vf,ogg_page *og){ + ogg_int64_t begin=vf->offset; + ogg_int64_t end=begin; + ogg_int64_t ret; + ogg_int64_t offset=-1; + + while(offset==-1){ + begin-=CHUNKSIZE; + if(begin<0) + begin=0; + _seek_helper(vf,begin); + while(vf->offsetoffset); + if(ret==OV_EREAD)return(OV_EREAD); + if(ret<0){ + break; + }else{ + offset=ret; + } + } + } + + /* we have the offset. Actually snork and hold the page now */ + _seek_helper(vf,offset); + ret=_get_next_page(vf,og,CHUNKSIZE); + if(ret<0) + /* this shouldn't be possible */ + return(OV_EFAULT); + + return(offset); +} + +/* finds each bitstream link one at a time using a bisection search + (has to begin by knowing the offset of the lb's initial page). + Recurses for each link so it can alloc the link storage after + finding them all, then unroll and fill the cache at the same time */ +static int _bisect_forward_serialno(OggVorbis_File *vf, + ogg_int64_t begin, + ogg_int64_t searched, + ogg_int64_t end, + ogg_uint32_t currentno, + long m){ + ogg_int64_t endsearched=end; + ogg_int64_t next=end; + ogg_page og={0,0,0,0}; + ogg_int64_t ret; + + /* the below guards against garbage seperating the last and + first pages of two links. */ + while(searched=0)next=ret; + }else{ + searched=ret+og.header_len+og.body_len; + } + ogg_page_release(&og); + } + + _seek_helper(vf,next); + ret=_get_next_page(vf,&og,-1); + if(ret==OV_EREAD)return(OV_EREAD); + + if(searched>=end || ret<0){ + ogg_page_release(&og); + vf->links=m+1; + vf->offsets=_ogg_malloc((vf->links+1)*sizeof(*vf->offsets)); + vf->serialnos=_ogg_malloc(vf->links*sizeof(*vf->serialnos)); + vf->offsets[m+1]=searched; + }else{ + ret=_bisect_forward_serialno(vf,next,vf->offset, + end,ogg_page_serialno(&og),m+1); + ogg_page_release(&og); + if(ret==OV_EREAD)return(OV_EREAD); + } + + vf->offsets[m]=begin; + vf->serialnos[m]=currentno; + return(0); +} + +/* uses the local ogg_stream storage in vf; this is important for + non-streaming input sources */ +/* consumes the page that's passed in (if any) */ + +static int _fetch_headers(OggVorbis_File *vf, + vorbis_info *vi, + vorbis_comment *vc, + ogg_uint32_t *serialno, + ogg_page *og_ptr){ + ogg_page og={0,0,0,0}; + ogg_packet op={0,0,0,0,0,0}; + int i,ret; + + if(!og_ptr){ + ogg_int64_t llret=_get_next_page(vf,&og,CHUNKSIZE); + if(llret==OV_EREAD)return(OV_EREAD); + if(llret<0)return OV_ENOTVORBIS; + og_ptr=&og; + } + + ogg_stream_reset_serialno(vf->os,ogg_page_serialno(og_ptr)); + if(serialno)*serialno=vf->os->serialno; + vf->ready_state=STREAMSET; + + /* extract the initial header from the first page and verify that the + Ogg bitstream is in fact Vorbis data */ + + vorbis_info_init(vi); + vorbis_comment_init(vc); + + i=0; + while(i<3){ + ogg_stream_pagein(vf->os,og_ptr); + while(i<3){ + int result=ogg_stream_packetout(vf->os,&op); + if(result==0)break; + if(result==-1){ + ret=OV_EBADHEADER; + goto bail_header; + } + if((ret=vorbis_synthesis_headerin(vi,vc,&op))){ + goto bail_header; + } + i++; + } + if(i<3) + if(_get_next_page(vf,og_ptr,CHUNKSIZE)<0){ + ret=OV_EBADHEADER; + goto bail_header; + } + } + + ogg_packet_release(&op); + ogg_page_release(&og); + return 0; + + bail_header: + ogg_packet_release(&op); + ogg_page_release(&og); + vorbis_info_clear(vi); + vorbis_comment_clear(vc); + vf->ready_state=OPENED; + + return ret; +} + +/* last step of the OggVorbis_File initialization; get all the + vorbis_info structs and PCM positions. Only called by the seekable + initialization (local stream storage is hacked slightly; pay + attention to how that's done) */ + +/* this is void and does not propogate errors up because we want to be + able to open and use damaged bitstreams as well as we can. Just + watch out for missing information for links in the OggVorbis_File + struct */ +static void _prefetch_all_headers(OggVorbis_File *vf, ogg_int64_t dataoffset){ + ogg_page og={0,0,0,0}; + int i; + ogg_int64_t ret; + + vf->vi=_ogg_realloc(vf->vi,vf->links*sizeof(*vf->vi)); + vf->vc=_ogg_realloc(vf->vc,vf->links*sizeof(*vf->vc)); + vf->dataoffsets=_ogg_malloc(vf->links*sizeof(*vf->dataoffsets)); + vf->pcmlengths=_ogg_malloc(vf->links*2*sizeof(*vf->pcmlengths)); + + for(i=0;ilinks;i++){ + if(i==0){ + /* we already grabbed the initial header earlier. Just set the offset */ + vf->dataoffsets[i]=dataoffset; + _seek_helper(vf,dataoffset); + + }else{ + + /* seek to the location of the initial header */ + + _seek_helper(vf,vf->offsets[i]); + if(_fetch_headers(vf,vf->vi+i,vf->vc+i,NULL,NULL)<0){ + vf->dataoffsets[i]=-1; + }else{ + vf->dataoffsets[i]=vf->offset; + } + } + + /* fetch beginning PCM offset */ + + if(vf->dataoffsets[i]!=-1){ + ogg_int64_t accumulated=0,pos; + long lastblock=-1; + int result; + + ogg_stream_reset_serialno(vf->os,vf->serialnos[i]); + + while(1){ + ogg_packet op={0,0,0,0,0,0}; + + ret=_get_next_page(vf,&og,-1); + if(ret<0) + /* this should not be possible unless the file is + truncated/mangled */ + break; + + if(ogg_page_serialno(&og)!=vf->serialnos[i]) + break; + + pos=ogg_page_granulepos(&og); + + /* count blocksizes of all frames in the page */ + ogg_stream_pagein(vf->os,&og); + while((result=ogg_stream_packetout(vf->os,&op))){ + if(result>0){ /* ignore holes */ + long thisblock=vorbis_packet_blocksize(vf->vi+i,&op); + if(lastblock!=-1) + accumulated+=(lastblock+thisblock)>>2; + lastblock=thisblock; + } + } + ogg_packet_release(&op); + + if(pos!=-1){ + /* pcm offset of last packet on the first audio page */ + accumulated= pos-accumulated; + break; + } + } + + /* less than zero? This is a stream with samples trimmed off + the beginning, a normal occurrence; set the offset to zero */ + if(accumulated<0)accumulated=0; + + vf->pcmlengths[i*2]=accumulated; + } + + /* get the PCM length of this link. To do this, + get the last page of the stream */ + { + ogg_int64_t end=vf->offsets[i+1]; + _seek_helper(vf,end); + + while(1){ + ret=_get_prev_page(vf,&og); + if(ret<0){ + /* this should not be possible */ + vorbis_info_clear(vf->vi+i); + vorbis_comment_clear(vf->vc+i); + break; + } + if(ogg_page_granulepos(&og)!=-1){ + vf->pcmlengths[i*2+1]=ogg_page_granulepos(&og)-vf->pcmlengths[i*2]; + break; + } + vf->offset=ret; + } + } + } + ogg_page_release(&og); +} + +static void _make_decode_ready(OggVorbis_File *vf){ + if(vf->ready_state!=STREAMSET)return; + if(vf->seekable){ + vorbis_synthesis_init(&vf->vd,vf->vi+vf->current_link); + }else{ + vorbis_synthesis_init(&vf->vd,vf->vi); + } + vorbis_block_init(&vf->vd,&vf->vb); + vf->ready_state=INITSET; + vf->bittrack=0; + vf->samptrack=0; + return; +} + +static int _open_seekable2(OggVorbis_File *vf){ + ogg_uint32_t serialno=vf->current_serialno; + ogg_uint32_t tempserialno; + ogg_int64_t dataoffset=vf->offset, end; + ogg_page og={0,0,0,0}; + + /* we're partially open and have a first link header state in + storage in vf */ + /* we can seek, so set out learning all about this file */ + (vf->callbacks.seek_func)(vf->datasource,0,SEEK_END); + vf->offset=vf->end=(vf->callbacks.tell_func)(vf->datasource); + + /* We get the offset for the last page of the physical bitstream. + Most OggVorbis files will contain a single logical bitstream */ + end=_get_prev_page(vf,&og); + if(end<0)return(end); + + /* more than one logical bitstream? */ + tempserialno=ogg_page_serialno(&og); + ogg_page_release(&og); + + if(tempserialno!=serialno){ + + /* Chained bitstream. Bisect-search each logical bitstream + section. Do so based on serial number only */ + if(_bisect_forward_serialno(vf,0,0,end+1,serialno,0)<0)return(OV_EREAD); + + }else{ + + /* Only one logical bitstream */ + if(_bisect_forward_serialno(vf,0,end,end+1,serialno,0))return(OV_EREAD); + + } + + /* the initial header memory is referenced by vf after; don't free it */ + _prefetch_all_headers(vf,dataoffset); + return(ov_raw_seek(vf,0)); +} + +/* clear out the current logical bitstream decoder */ +static void _decode_clear(OggVorbis_File *vf){ + vorbis_dsp_clear(&vf->vd); + vorbis_block_clear(&vf->vb); + vf->ready_state=OPENED; +} + +/* fetch and process a packet. Handles the case where we're at a + bitstream boundary and dumps the decoding machine. If the decoding + machine is unloaded, it loads it. It also keeps pcm_offset up to + date (seek and read both use this. seek uses a special hack with + readp). + + return: <0) error, OV_HOLE (lost packet) or OV_EOF + 0) need more data (only if readp==0) + 1) got a packet +*/ + +static int _fetch_and_process_packet(OggVorbis_File *vf, + int readp, + int spanp){ + ogg_page og={0,0,0,0}; + ogg_packet op={0,0,0,0,0,0}; + int ret=0; + + /* handle one packet. Try to fetch it from current stream state */ + /* extract packets from page */ + while(1){ + + /* process a packet if we can. If the machine isn't loaded, + neither is a page */ + if(vf->ready_state==INITSET){ + while(1) { + int result=ogg_stream_packetout(vf->os,&op); + ogg_int64_t granulepos; + + if(result<0){ + ret=OV_HOLE; /* hole in the data. */ + goto cleanup; + } + if(result>0){ + /* got a packet. process it */ + granulepos=op.granulepos; + if(!vorbis_synthesis(&vf->vb,&op,1)){ /* lazy check for lazy + header handling. The + header packets aren't + audio, so if/when we + submit them, + vorbis_synthesis will + reject them */ + + /* suck in the synthesis data and track bitrate */ + { + int oldsamples=vorbis_synthesis_pcmout(&vf->vd,NULL); + /* for proper use of libvorbis within libvorbisfile, + oldsamples will always be zero. */ + if(oldsamples){ + ret=OV_EFAULT; + goto cleanup; + } + + vorbis_synthesis_blockin(&vf->vd,&vf->vb); + vf->samptrack+=vorbis_synthesis_pcmout(&vf->vd,NULL)-oldsamples; + vf->bittrack+=op.bytes*8; + } + + /* update the pcm offset. */ + if(granulepos!=-1 && !op.e_o_s){ + int link=(vf->seekable?vf->current_link:0); + int i,samples; + + /* this packet has a pcm_offset on it (the last packet + completed on a page carries the offset) After processing + (above), we know the pcm position of the *last* sample + ready to be returned. Find the offset of the *first* + + As an aside, this trick is inaccurate if we begin + reading anew right at the last page; the end-of-stream + granulepos declares the last frame in the stream, and the + last packet of the last page may be a partial frame. + So, we need a previous granulepos from an in-sequence page + to have a reference point. Thus the !op.e_o_s clause + above */ + + if(vf->seekable && link>0) + granulepos-=vf->pcmlengths[link*2]; + if(granulepos<0)granulepos=0; /* actually, this + shouldn't be possible + here unless the stream + is very broken */ + + samples=vorbis_synthesis_pcmout(&vf->vd,NULL); + + granulepos-=samples; + for(i=0;ipcmlengths[i*2+1]; + vf->pcm_offset=granulepos; + } + ret=1; + goto cleanup; + } + } + else + break; + } + } + + if(vf->ready_state>=OPENED){ + int ret; + if(!readp){ + ret=0; + goto cleanup; + } + if((ret=_get_next_page(vf,&og,-1))<0){ + ret=OV_EOF; /* eof. leave unitialized */ + goto cleanup; + } + + /* bitrate tracking; add the header's bytes here, the body bytes + are done by packet above */ + vf->bittrack+=og.header_len*8; + + /* has our decoding just traversed a bitstream boundary? */ + if(vf->ready_state==INITSET){ + if(vf->current_serialno!=ogg_page_serialno(&og)){ + if(!spanp){ + ret=OV_EOF; + goto cleanup; + } + + _decode_clear(vf); + + if(!vf->seekable){ + vorbis_info_clear(vf->vi); + vorbis_comment_clear(vf->vc); + } + } + } + } + + /* Do we need to load a new machine before submitting the page? */ + /* This is different in the seekable and non-seekable cases. + + In the seekable case, we already have all the header + information loaded and cached; we just initialize the machine + with it and continue on our merry way. + + In the non-seekable (streaming) case, we'll only be at a + boundary if we just left the previous logical bitstream and + we're now nominally at the header of the next bitstream + */ + + if(vf->ready_state!=INITSET){ + int link; + + if(vf->ready_stateseekable){ + vf->current_serialno=ogg_page_serialno(&og); + + /* match the serialno to bitstream section. We use this rather than + offset positions to avoid problems near logical bitstream + boundaries */ + for(link=0;linklinks;link++) + if(vf->serialnos[link]==vf->current_serialno)break; + if(link==vf->links){ + ret=OV_EBADLINK; /* sign of a bogus stream. error out, + leave machine uninitialized */ + goto cleanup; + } + + vf->current_link=link; + + ogg_stream_reset_serialno(vf->os,vf->current_serialno); + vf->ready_state=STREAMSET; + + }else{ + /* we're streaming */ + /* fetch the three header packets, build the info struct */ + + int ret=_fetch_headers(vf,vf->vi,vf->vc,&vf->current_serialno,&og); + if(ret) goto cleanup; + vf->current_link++; + link=0; + } + } + + _make_decode_ready(vf); + } + ogg_stream_pagein(vf->os,&og); + } + cleanup: + ogg_packet_release(&op); + ogg_page_release(&og); + return ret; +} + +/* if, eg, 64 bit stdio is configured by default, this will build with + fseek64 */ +static int _fseek64_wrap(FILE *f,ogg_int64_t off,int whence){ + if(f==NULL)return(-1); + return fseek(f,off,whence); +} + +static int _ov_open1(void *f,OggVorbis_File *vf,char *initial, + long ibytes, ov_callbacks callbacks){ + int offsettest=(f?callbacks.seek_func(f,0,SEEK_CUR):-1); + int ret; + + memset(vf,0,sizeof(*vf)); + vf->datasource=f; + vf->callbacks = callbacks; + + /* init the framing state */ + vf->oy=ogg_sync_create(); + + /* perhaps some data was previously read into a buffer for testing + against other stream types. Allow initialization from this + previously read data (as we may be reading from a non-seekable + stream) */ + if(initial){ + unsigned char *buffer=ogg_sync_bufferin(vf->oy,ibytes); + memcpy(buffer,initial,ibytes); + ogg_sync_wrote(vf->oy,ibytes); + } + + /* can we seek? Stevens suggests the seek test was portable */ + if(offsettest!=-1)vf->seekable=1; + + /* No seeking yet; Set up a 'single' (current) logical bitstream + entry for partial open */ + vf->links=1; + vf->vi=_ogg_calloc(vf->links,sizeof(*vf->vi)); + vf->vc=_ogg_calloc(vf->links,sizeof(*vf->vc)); + vf->os=ogg_stream_create(-1); /* fill in the serialno later */ + + /* Try to fetch the headers, maintaining all the storage */ + if((ret=_fetch_headers(vf,vf->vi,vf->vc,&vf->current_serialno,NULL))<0){ + vf->datasource=NULL; + ov_clear(vf); + }else if(vf->ready_state < PARTOPEN) + vf->ready_state=PARTOPEN; + return(ret); +} + +static int _ov_open2(OggVorbis_File *vf){ + if(vf->ready_state < OPENED) + vf->ready_state=OPENED; + if(vf->seekable){ + int ret=_open_seekable2(vf); + if(ret){ + vf->datasource=NULL; + ov_clear(vf); + } + return(ret); + } + return 0; +} + + +/* clear out the OggVorbis_File struct */ +int ov_clear(OggVorbis_File *vf){ + if(vf){ + vorbis_block_clear(&vf->vb); + vorbis_dsp_clear(&vf->vd); + ogg_stream_destroy(vf->os); + + if(vf->vi && vf->links){ + int i; + for(i=0;ilinks;i++){ + vorbis_info_clear(vf->vi+i); + vorbis_comment_clear(vf->vc+i); + } + _ogg_free(vf->vi); + _ogg_free(vf->vc); + } + if(vf->dataoffsets)_ogg_free(vf->dataoffsets); + if(vf->pcmlengths)_ogg_free(vf->pcmlengths); + if(vf->serialnos)_ogg_free(vf->serialnos); + if(vf->offsets)_ogg_free(vf->offsets); + ogg_sync_destroy(vf->oy); + + if(vf->datasource)(vf->callbacks.close_func)(vf->datasource); + memset(vf,0,sizeof(*vf)); + } +#ifdef DEBUG_LEAKS + _VDBG_dump(); +#endif + return(0); +} + +/* inspects the OggVorbis file and finds/documents all the logical + bitstreams contained in it. Tries to be tolerant of logical + bitstream sections that are truncated/woogie. + + return: -1) error + 0) OK +*/ + +int ov_open_callbacks(void *f,OggVorbis_File *vf,char *initial,long ibytes, + ov_callbacks callbacks){ + int ret=_ov_open1(f,vf,initial,ibytes,callbacks); + if(ret)return ret; + return _ov_open2(vf); +} + +int ov_open(FILE *f,OggVorbis_File *vf,char *initial,long ibytes){ + ov_callbacks callbacks = { + (size_t (*)(void *, size_t, size_t, void *)) fread, + (int (*)(void *, ogg_int64_t, int)) _fseek64_wrap, + (int (*)(void *)) fclose, + (long (*)(void *)) ftell + }; + + return ov_open_callbacks((void *)f, vf, initial, ibytes, callbacks); +} + +/* Only partially open the vorbis file; test for Vorbisness, and load + the headers for the first chain. Do not seek (although test for + seekability). Use ov_test_open to finish opening the file, else + ov_clear to close/free it. Same return codes as open. */ + +int ov_test_callbacks(void *f,OggVorbis_File *vf,char *initial,long ibytes, + ov_callbacks callbacks) +{ + return _ov_open1(f,vf,initial,ibytes,callbacks); +} + +int ov_test(FILE *f,OggVorbis_File *vf,char *initial,long ibytes){ + ov_callbacks callbacks = { + (size_t (*)(void *, size_t, size_t, void *)) fread, + (int (*)(void *, ogg_int64_t, int)) _fseek64_wrap, + (int (*)(void *)) fclose, + (long (*)(void *)) ftell + }; + + return ov_test_callbacks((void *)f, vf, initial, ibytes, callbacks); +} + +int ov_test_open(OggVorbis_File *vf){ + if(vf->ready_state!=PARTOPEN)return(OV_EINVAL); + return _ov_open2(vf); +} + +/* How many logical bitstreams in this physical bitstream? */ +long ov_streams(OggVorbis_File *vf){ + return vf->links; +} + +/* Is the FILE * associated with vf seekable? */ +long ov_seekable(OggVorbis_File *vf){ + return vf->seekable; +} + +/* returns the bitrate for a given logical bitstream or the entire + physical bitstream. If the file is open for random access, it will + find the *actual* average bitrate. If the file is streaming, it + returns the nominal bitrate (if set) else the average of the + upper/lower bounds (if set) else -1 (unset). + + If you want the actual bitrate field settings, get them from the + vorbis_info structs */ + +long ov_bitrate(OggVorbis_File *vf,int i){ + if(vf->ready_state=vf->links)return(OV_EINVAL); + if(!vf->seekable && i!=0)return(ov_bitrate(vf,0)); + if(i<0){ + ogg_int64_t bits=0; + int i; + for(i=0;ilinks;i++) + bits+=(vf->offsets[i+1]-vf->dataoffsets[i])*8; + /* This once read: return(rint(bits/ov_time_total(vf,-1))); + * gcc 3.x on x86 miscompiled this at optimisation level 2 and above, + * so this is slightly transformed to make it work. + */ + return(bits*1000/ov_time_total(vf,-1)); + }else{ + if(vf->seekable){ + /* return the actual bitrate */ + return((vf->offsets[i+1]-vf->dataoffsets[i])*8000/ov_time_total(vf,i)); + }else{ + /* return nominal if set */ + if(vf->vi[i].bitrate_nominal>0){ + return vf->vi[i].bitrate_nominal; + }else{ + if(vf->vi[i].bitrate_upper>0){ + if(vf->vi[i].bitrate_lower>0){ + return (vf->vi[i].bitrate_upper+vf->vi[i].bitrate_lower)/2; + }else{ + return vf->vi[i].bitrate_upper; + } + } + return(OV_FALSE); + } + } + } +} + +/* returns the actual bitrate since last call. returns -1 if no + additional data to offer since last call (or at beginning of stream), + EINVAL if stream is only partially open +*/ +long ov_bitrate_instant(OggVorbis_File *vf){ + int link=(vf->seekable?vf->current_link:0); + long ret; + if(vf->ready_statesamptrack==0)return(OV_FALSE); + ret=vf->bittrack/vf->samptrack*vf->vi[link].rate; + vf->bittrack=0; + vf->samptrack=0; + return(ret); +} + +/* Guess */ +long ov_serialnumber(OggVorbis_File *vf,int i){ + if(i>=vf->links)return(ov_serialnumber(vf,vf->links-1)); + if(!vf->seekable && i>=0)return(ov_serialnumber(vf,-1)); + if(i<0){ + return(vf->current_serialno); + }else{ + return(vf->serialnos[i]); + } +} + +/* returns: total raw (compressed) length of content if i==-1 + raw (compressed) length of that logical bitstream for i==0 to n + OV_EINVAL if the stream is not seekable (we can't know the length) + or if stream is only partially open +*/ +ogg_int64_t ov_raw_total(OggVorbis_File *vf,int i){ + if(vf->ready_stateseekable || i>=vf->links)return(OV_EINVAL); + if(i<0){ + ogg_int64_t acc=0; + int i; + for(i=0;ilinks;i++) + acc+=ov_raw_total(vf,i); + return(acc); + }else{ + return(vf->offsets[i+1]-vf->offsets[i]); + } +} + +/* returns: total PCM length (samples) of content if i==-1 PCM length + (samples) of that logical bitstream for i==0 to n + OV_EINVAL if the stream is not seekable (we can't know the + length) or only partially open +*/ +ogg_int64_t ov_pcm_total(OggVorbis_File *vf,int i){ + if(vf->ready_stateseekable || i>=vf->links)return(OV_EINVAL); + if(i<0){ + ogg_int64_t acc=0; + int i; + for(i=0;ilinks;i++) + acc+=ov_pcm_total(vf,i); + return(acc); + }else{ + return(vf->pcmlengths[i*2+1]); + } +} + +/* returns: total milliseconds of content if i==-1 + milliseconds in that logical bitstream for i==0 to n + OV_EINVAL if the stream is not seekable (we can't know the + length) or only partially open +*/ +ogg_int64_t ov_time_total(OggVorbis_File *vf,int i){ + if(vf->ready_stateseekable || i>=vf->links)return(OV_EINVAL); + if(i<0){ + ogg_int64_t acc=0; + int i; + for(i=0;ilinks;i++) + acc+=ov_time_total(vf,i); + return(acc); + }else{ + return(((ogg_int64_t)vf->pcmlengths[i*2+1])*1000/vf->vi[i].rate); + } +} + +/* seek to an offset relative to the *compressed* data. This also + scans packets to update the PCM cursor. It will cross a logical + bitstream boundary, but only if it can't get any packets out of the + tail of the bitstream we seek to (so no surprises). + + returns zero on success, nonzero on failure */ + +int ov_raw_seek(OggVorbis_File *vf,ogg_int64_t pos){ + ogg_stream_state *work_os=NULL; + ogg_page og={0,0,0,0}; + ogg_packet op={0,0,0,0,0,0}; + + if(vf->ready_stateseekable) + return(OV_ENOSEEK); /* don't dump machine if we can't seek */ + + if(pos<0 || pos>vf->end)return(OV_EINVAL); + + /* don't yet clear out decoding machine (if it's initialized), in + the case we're in the same link. Restart the decode lapping, and + let _fetch_and_process_packet deal with a potential bitstream + boundary */ + vf->pcm_offset=-1; + ogg_stream_reset_serialno(vf->os, + vf->current_serialno); /* must set serialno */ + vorbis_synthesis_restart(&vf->vd); + + _seek_helper(vf,pos); + + /* we need to make sure the pcm_offset is set, but we don't want to + advance the raw cursor past good packets just to get to the first + with a granulepos. That's not equivalent behavior to beginning + decoding as immediately after the seek position as possible. + + So, a hack. We use two stream states; a local scratch state and + the shared vf->os stream state. We use the local state to + scan, and the shared state as a buffer for later decode. + + Unfortuantely, on the last page we still advance to last packet + because the granulepos on the last page is not necessarily on a + packet boundary, and we need to make sure the granpos is + correct. + */ + + { + int lastblock=0; + int accblock=0; + int thisblock; + int eosflag=0; + + work_os=ogg_stream_create(vf->current_serialno); /* get the memory ready */ + while(1){ + if(vf->ready_state>=STREAMSET){ + /* snarf/scan a packet if we can */ + int result=ogg_stream_packetout(work_os,&op); + + if(result>0){ + + if(vf->vi[vf->current_link].codec_setup){ + thisblock=vorbis_packet_blocksize(vf->vi+vf->current_link,&op); + if(thisblock<0){ + ogg_stream_packetout(vf->os,NULL); + thisblock=0; + }else{ + + if(eosflag) + ogg_stream_packetout(vf->os,NULL); + else + if(lastblock)accblock+=(lastblock+thisblock)>>2; + } + + if(op.granulepos!=-1){ + int i,link=vf->current_link; + ogg_int64_t granulepos=op.granulepos-vf->pcmlengths[link*2]; + if(granulepos<0)granulepos=0; + + for(i=0;ipcmlengths[i*2+1]; + vf->pcm_offset=granulepos-accblock; + break; + } + lastblock=thisblock; + continue; + }else + ogg_stream_packetout(vf->os,NULL); + } + } + + if(!lastblock){ + if(_get_next_page(vf,&og,-1)<0){ + vf->pcm_offset=ov_pcm_total(vf,-1); + break; + } + }else{ + /* huh? Bogus stream with packets but no granulepos */ + vf->pcm_offset=-1; + break; + } + + /* has our decoding just traversed a bitstream boundary? */ + if(vf->ready_state>=STREAMSET) + if(vf->current_serialno!=ogg_page_serialno(&og)){ + _decode_clear(vf); /* clear out stream state */ + ogg_stream_destroy(work_os); + } + + if(vf->ready_statecurrent_serialno=ogg_page_serialno(&og); + for(link=0;linklinks;link++) + if(vf->serialnos[link]==vf->current_serialno)break; + if(link==vf->links) + goto seek_error; /* sign of a bogus stream. error out, + leave machine uninitialized */ + + vf->current_link=link; + + ogg_stream_reset_serialno(vf->os,vf->current_serialno); + ogg_stream_reset_serialno(work_os,vf->current_serialno); + vf->ready_state=STREAMSET; + + } + + { + ogg_page dup; + ogg_page_dup(&dup,&og); + eosflag=ogg_page_eos(&og); + ogg_stream_pagein(vf->os,&og); + ogg_stream_pagein(work_os,&dup); + } + } + } + + ogg_packet_release(&op); + ogg_page_release(&og); + ogg_stream_destroy(work_os); + vf->bittrack=0; + vf->samptrack=0; + return(0); + + seek_error: + ogg_packet_release(&op); + ogg_page_release(&og); + + /* dump the machine so we're in a known state */ + vf->pcm_offset=-1; + ogg_stream_destroy(work_os); + _decode_clear(vf); + return OV_EBADLINK; +} + +/* Page granularity seek (faster than sample granularity because we + don't do the last bit of decode to find a specific sample). + + Seek to the last [granule marked] page preceeding the specified pos + location, such that decoding past the returned point will quickly + arrive at the requested position. */ +int ov_pcm_seek_page(OggVorbis_File *vf,ogg_int64_t pos){ + int link=-1; + ogg_int64_t result=0; + ogg_int64_t total=ov_pcm_total(vf,-1); + ogg_page og={0,0,0,0}; + ogg_packet op={0,0,0,0,0,0}; + + if(vf->ready_stateseekable)return(OV_ENOSEEK); + if(pos<0 || pos>total)return(OV_EINVAL); + + /* which bitstream section does this pcm offset occur in? */ + for(link=vf->links-1;link>=0;link--){ + total-=vf->pcmlengths[link*2+1]; + if(pos>=total)break; + } + + /* search within the logical bitstream for the page with the highest + pcm_pos preceeding (or equal to) pos. There is a danger here; + missing pages or incorrect frame number information in the + bitstream could make our task impossible. Account for that (it + would be an error condition) */ + + /* new search algorithm by HB (Nicholas Vinen) */ + { + ogg_int64_t end=vf->offsets[link+1]; + ogg_int64_t begin=vf->offsets[link]; + ogg_int64_t begintime = vf->pcmlengths[link*2]; + ogg_int64_t endtime = vf->pcmlengths[link*2+1]+begintime; + ogg_int64_t target=pos-total+begintime; + ogg_int64_t best=begin; + + while(beginoffset); + if(result==OV_EREAD) goto seek_error; + if(result<0){ + if(bisect<=begin+1) + end=begin; /* found it */ + else{ + if(bisect==0) goto seek_error; + bisect-=CHUNKSIZE; + if(bisect<=begin)bisect=begin+1; + _seek_helper(vf,bisect); + } + }else{ + ogg_int64_t granulepos=ogg_page_granulepos(&og); + if(granulepos==-1)continue; + if(granuleposoffset; /* raw offset of next page */ + begintime=granulepos; + + if(target-begintime>44100)break; + bisect=begin; /* *not* begin + 1 */ + }else{ + if(bisect<=begin+1) + end=begin; /* found it */ + else{ + if(end==vf->offset){ /* we're pretty close - we'd be stuck in */ + end=result; + bisect-=CHUNKSIZE; /* an endless loop otherwise. */ + if(bisect<=begin)bisect=begin+1; + _seek_helper(vf,bisect); + }else{ + end=result; + endtime=granulepos; + break; + } + } + } + } + } + } + + /* found our page. seek to it, update pcm offset. Easier case than + raw_seek, don't keep packets preceeding granulepos. */ + { + + /* seek */ + _seek_helper(vf,best); + vf->pcm_offset=-1; + + if(_get_next_page(vf,&og,-1)<0){ + ogg_page_release(&og); + return(OV_EOF); /* shouldn't happen */ + } + + if(link!=vf->current_link){ + /* Different link; dump entire decode machine */ + _decode_clear(vf); + + vf->current_link=link; + vf->current_serialno=ogg_page_serialno(&og); + vf->ready_state=STREAMSET; + + }else{ + vorbis_synthesis_restart(&vf->vd); + } + + ogg_stream_reset_serialno(vf->os,vf->current_serialno); + ogg_stream_pagein(vf->os,&og); + + /* pull out all but last packet; the one with granulepos */ + while(1){ + result=ogg_stream_packetpeek(vf->os,&op); + if(result==0){ + /* !!! the packet finishing this page originated on a + preceeding page. Keep fetching previous pages until we + get one with a granulepos or without the 'continued' flag + set. Then just use raw_seek for simplicity. */ + + _seek_helper(vf,best); + + while(1){ + result=_get_prev_page(vf,&og); + if(result<0) goto seek_error; + if(ogg_page_granulepos(&og)>-1 || + !ogg_page_continued(&og)){ + return ov_raw_seek(vf,result); + } + vf->offset=result; + } + } + if(result<0){ + result = OV_EBADPACKET; + goto seek_error; + } + if(op.granulepos!=-1){ + vf->pcm_offset=op.granulepos-vf->pcmlengths[vf->current_link*2]; + if(vf->pcm_offset<0)vf->pcm_offset=0; + vf->pcm_offset+=total; + break; + }else + result=ogg_stream_packetout(vf->os,NULL); + } + } + } + + /* verify result */ + if(vf->pcm_offset>pos || pos>ov_pcm_total(vf,-1)){ + result=OV_EFAULT; + goto seek_error; + } + vf->bittrack=0; + vf->samptrack=0; + + ogg_page_release(&og); + ogg_packet_release(&op); + return(0); + + seek_error: + + ogg_page_release(&og); + ogg_packet_release(&op); + + /* dump machine so we're in a known state */ + vf->pcm_offset=-1; + _decode_clear(vf); + return (int)result; +} + +/* seek to a sample offset relative to the decompressed pcm stream + returns zero on success, nonzero on failure */ + +int ov_pcm_seek(OggVorbis_File *vf,ogg_int64_t pos){ + ogg_packet op={0,0,0,0,0,0}; + ogg_page og={0,0,0,0}; + int thisblock,lastblock=0; + int ret=ov_pcm_seek_page(vf,pos); + if(ret<0)return(ret); + _make_decode_ready(vf); + + /* discard leading packets we don't need for the lapping of the + position we want; don't decode them */ + + while(1){ + + int ret=ogg_stream_packetpeek(vf->os,&op); + if(ret>0){ + thisblock=vorbis_packet_blocksize(vf->vi+vf->current_link,&op); + if(thisblock<0){ + ogg_stream_packetout(vf->os,NULL); + continue; /* non audio packet */ + } + if(lastblock)vf->pcm_offset+=(lastblock+thisblock)>>2; + + if(vf->pcm_offset+((thisblock+ + vorbis_info_blocksize(vf->vi,1))>>2)>=pos)break; + + /* remove the packet from packet queue and track its granulepos */ + ogg_stream_packetout(vf->os,NULL); + vorbis_synthesis(&vf->vb,&op,0); /* set up a vb with + only tracking, no + pcm_decode */ + vorbis_synthesis_blockin(&vf->vd,&vf->vb); + + /* end of logical stream case is hard, especially with exact + length positioning. */ + + if(op.granulepos>-1){ + int i; + /* always believe the stream markers */ + vf->pcm_offset=op.granulepos-vf->pcmlengths[vf->current_link*2]; + if(vf->pcm_offset<0)vf->pcm_offset=0; + for(i=0;icurrent_link;i++) + vf->pcm_offset+=vf->pcmlengths[i*2+1]; + } + + lastblock=thisblock; + + }else{ + if(ret<0 && ret!=OV_HOLE)break; + + /* suck in a new page */ + if(_get_next_page(vf,&og,-1)<0)break; + if(vf->current_serialno!=ogg_page_serialno(&og))_decode_clear(vf); + + if(vf->ready_statecurrent_serialno=ogg_page_serialno(&og); + for(link=0;linklinks;link++) + if(vf->serialnos[link]==vf->current_serialno)break; + if(link==vf->links){ + ogg_page_release(&og); + ogg_packet_release(&op); + return(OV_EBADLINK); + } + vf->current_link=link; + + ogg_stream_reset_serialno(vf->os,vf->current_serialno); + vf->ready_state=STREAMSET; + _make_decode_ready(vf); + lastblock=0; + } + + ogg_stream_pagein(vf->os,&og); + } + } + + vf->bittrack=0; + vf->samptrack=0; + /* discard samples until we reach the desired position. Crossing a + logical bitstream boundary with abandon is OK. */ + while(vf->pcm_offsetpcm_offset; + long samples=vorbis_synthesis_pcmout(&vf->vd,NULL); + + if(samples>target)samples=target; + vorbis_synthesis_read(&vf->vd,samples); + vf->pcm_offset+=samples; + + if(samplespcm_offset=ov_pcm_total(vf,-1); /* eof */ + } + + ogg_page_release(&og); + ogg_packet_release(&op); + return 0; +} + +/* seek to a playback time relative to the decompressed pcm stream + returns zero on success, nonzero on failure */ +int ov_time_seek(OggVorbis_File *vf,ogg_int64_t milliseconds){ + /* translate time to PCM position and call ov_pcm_seek */ + + int link=-1; + ogg_int64_t pcm_total=ov_pcm_total(vf,-1); + ogg_int64_t time_total=ov_time_total(vf,-1); + + if(vf->ready_stateseekable)return(OV_ENOSEEK); + if(milliseconds<0 || milliseconds>time_total)return(OV_EINVAL); + + /* which bitstream section does this time offset occur in? */ + for(link=vf->links-1;link>=0;link--){ + pcm_total-=vf->pcmlengths[link*2+1]; + time_total-=ov_time_total(vf,link); + if(milliseconds>=time_total)break; + } + + /* enough information to convert time offset to pcm offset */ + { + ogg_int64_t target=pcm_total+(milliseconds-time_total)*vf->vi[link].rate/1000; + return(ov_pcm_seek(vf,target)); + } +} + +/* page-granularity version of ov_time_seek + returns zero on success, nonzero on failure */ +int ov_time_seek_page(OggVorbis_File *vf,ogg_int64_t milliseconds){ + /* translate time to PCM position and call ov_pcm_seek */ + + int link=-1; + ogg_int64_t pcm_total=ov_pcm_total(vf,-1); + ogg_int64_t time_total=ov_time_total(vf,-1); + + if(vf->ready_stateseekable)return(OV_ENOSEEK); + if(milliseconds<0 || milliseconds>time_total)return(OV_EINVAL); + + /* which bitstream section does this time offset occur in? */ + for(link=vf->links-1;link>=0;link--){ + pcm_total-=vf->pcmlengths[link*2+1]; + time_total-=ov_time_total(vf,link); + if(milliseconds>=time_total)break; + } + + /* enough information to convert time offset to pcm offset */ + { + ogg_int64_t target=pcm_total+(milliseconds-time_total)*vf->vi[link].rate/1000; + return(ov_pcm_seek_page(vf,target)); + } +} + +/* tell the current stream offset cursor. Note that seek followed by + tell will likely not give the set offset due to caching */ +ogg_int64_t ov_raw_tell(OggVorbis_File *vf){ + if(vf->ready_stateoffset); +} + +/* return PCM offset (sample) of next PCM sample to be read */ +ogg_int64_t ov_pcm_tell(OggVorbis_File *vf){ + if(vf->ready_statepcm_offset); +} + +/* return time offset (milliseconds) of next PCM sample to be read */ +ogg_int64_t ov_time_tell(OggVorbis_File *vf){ + int link=0; + ogg_int64_t pcm_total=0; + ogg_int64_t time_total=0; + + if(vf->ready_stateseekable){ + pcm_total=ov_pcm_total(vf,-1); + time_total=ov_time_total(vf,-1); + + /* which bitstream section does this time offset occur in? */ + for(link=vf->links-1;link>=0;link--){ + pcm_total-=vf->pcmlengths[link*2+1]; + time_total-=ov_time_total(vf,link); + if(vf->pcm_offset>=pcm_total)break; + } + } + + return(time_total+(1000*vf->pcm_offset-pcm_total)/vf->vi[link].rate); +} + +/* link: -1) return the vorbis_info struct for the bitstream section + currently being decoded + 0-n) to request information for a specific bitstream section + + In the case of a non-seekable bitstream, any call returns the + current bitstream. NULL in the case that the machine is not + initialized */ + +vorbis_info *ov_info(OggVorbis_File *vf,int link){ + if(vf->seekable){ + if(link<0) + if(vf->ready_state>=STREAMSET) + return vf->vi+vf->current_link; + else + return vf->vi; + else + if(link>=vf->links) + return NULL; + else + return vf->vi+link; + }else{ + return vf->vi; + } +} + +/* grr, strong typing, grr, no templates/inheritence, grr */ +vorbis_comment *ov_comment(OggVorbis_File *vf,int link){ + if(vf->seekable){ + if(link<0) + if(vf->ready_state>=STREAMSET) + return vf->vc+vf->current_link; + else + return vf->vc; + else + if(link>=vf->links) + return NULL; + else + return vf->vc+link; + }else{ + return vf->vc; + } +} + +/* up to this point, everything could more or less hide the multiple + logical bitstream nature of chaining from the toplevel application + if the toplevel application didn't particularly care. However, at + the point that we actually read audio back, the multiple-section + nature must surface: Multiple bitstream sections do not necessarily + have to have the same number of channels or sampling rate. + + ov_read returns the sequential logical bitstream number currently + being decoded along with the PCM data in order that the toplevel + application can take action on channel/sample rate changes. This + number will be incremented even for streamed (non-seekable) streams + (for seekable streams, it represents the actual logical bitstream + index within the physical bitstream. Note that the accessor + functions above are aware of this dichotomy). + + input values: buffer) a buffer to hold packed PCM data for return + length) the byte length requested to be placed into buffer + + return values: <0) error/hole in data (OV_HOLE), partial open (OV_EINVAL) + 0) EOF + n) number of bytes of PCM actually returned. The + below works on a packet-by-packet basis, so the + return length is not related to the 'length' passed + in, just guaranteed to fit. + + *section) set to the logical bitstream number */ + +long ov_read(OggVorbis_File *vf,char *buffer,int bytes_req,int *bitstream){ + int i,j; + + ogg_int32_t **pcm; + long samples; + + if(vf->ready_stateready_state==INITSET){ + samples=vorbis_synthesis_pcmout(&vf->vd,&pcm); + if(samples)break; + } + + /* suck in another packet */ + { + int ret=_fetch_and_process_packet(vf,1,1); + if(ret==OV_EOF) + return(0); + if(ret<=0) + return(ret); + } + + } + + if(samples>0){ + + /* yay! proceed to pack data into the byte buffer */ + + long channels=ov_info(vf,-1)->channels; + + if(samples>(bytes_req/(2*channels))) + samples=bytes_req/(2*channels); + + for(i=0;i>9); + dest+=channels; + } + } + + vorbis_synthesis_read(&vf->vd,samples); + vf->pcm_offset+=samples; + if(bitstream)*bitstream=vf->current_link; + return(samples*2*channels); + }else{ + return(samples); + } +} diff --git a/genplus-gx/core/tremor/window.c b/genplus-gx/core/tremor/window.c new file mode 100644 index 0000000000..44a3812213 --- /dev/null +++ b/genplus-gx/core/tremor/window.c @@ -0,0 +1,86 @@ +/******************************************************************** + * * + * THIS FILE IS PART OF THE OggVorbis 'TREMOR' CODEC SOURCE CODE. * + * * + * USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS * + * GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE * + * IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. * + * * + * THE OggVorbis 'TREMOR' SOURCE CODE IS (C) COPYRIGHT 1994-2002 * + * BY THE Xiph.Org FOUNDATION http://www.xiph.org/ * + * * + ******************************************************************** + + function: window functions + + ********************************************************************/ + +#include +#include +#include "misc.h" +#include "window.h" +#include "window_lookup.h" + +const void *_vorbis_window(int type, int left){ + + switch(type){ + case 0: + + switch(left){ + case 32: + return vwin64; + case 64: + return vwin128; + case 128: + return vwin256; + case 256: + return vwin512; + case 512: + return vwin1024; + case 1024: + return vwin2048; + case 2048: + return vwin4096; + case 4096: + return vwin8192; + default: + return(0); + } + break; + default: + return(0); + } +} + +void _vorbis_apply_window(ogg_int32_t *d,const void *window_p[2], + long *blocksizes, + int lW,int W,int nW){ + + LOOKUP_T *window[2]; + long n=blocksizes[W]; + long ln=blocksizes[lW]; + long rn=blocksizes[nW]; + + long leftbegin=n/4-ln/4; + long leftend=leftbegin+ln/2; + + long rightbegin=n/2+n/4-rn/4; + long rightend=rightbegin+rn/2; + + int i,p; + + window[0]=window_p[0]; + window[1]=window_p[1]; + + for(i=0;i> 5) & 0x7FF; \ + if(bg_name_dirty[name] == 0) \ + { \ + bg_name_list[bg_list_index++] = name; \ + } \ + bg_name_dirty[name] |= (1 << ((addr >> 2) & 7)); \ +} + +/* VDP context */ +uint8 sat[0x400]; /* Internal copy of sprite attribute table */ +uint8 vram[0x10000]; /* Video RAM (64K x 8-bit) */ +uint8 cram[0x80]; /* On-chip color RAM (64 x 9-bit) */ +uint8 vsram[0x80]; /* On-chip vertical scroll RAM (40 x 11-bit) */ +uint8 reg[0x20]; /* Internal VDP registers (23 x 8-bit) */ +uint8 hint_pending; /* 0= Line interrupt is pending */ +uint8 vint_pending; /* 1= Frame interrupt is pending */ +uint16 status; /* VDP status flags */ +uint32 dma_length; /* DMA remaining length */ + +/* Global variables */ +uint16 ntab; /* Name table A base address */ +uint16 ntbb; /* Name table B base address */ +uint16 ntwb; /* Name table W base address */ +uint16 satb; /* Sprite attribute table base address */ +uint16 hscb; /* Horizontal scroll table base address */ +uint8 bg_name_dirty[0x800]; /* 1= This pattern is dirty */ +uint16 bg_name_list[0x800]; /* List of modified pattern indices */ +uint16 bg_list_index; /* # of modified patterns in list */ +uint8 hscroll_mask; /* Horizontal Scrolling line mask */ +uint8 playfield_shift; /* Width of planes A, B (in bits) */ +uint8 playfield_col_mask; /* Playfield column mask */ +uint16 playfield_row_mask; /* Playfield row mask */ +uint16 vscroll; /* Latched vertical scroll value */ +uint8 odd_frame; /* 1: odd field, 0: even field */ +uint8 im2_flag; /* 1= Interlace mode 2 is being used */ +uint8 interlaced; /* 1: Interlaced mode 1 or 2 */ +uint8 vdp_pal; /* 1: PAL , 0: NTSC (default) */ +uint16 v_counter; /* Vertical counter */ +uint16 vc_max; /* Vertical counter overflow value */ +uint16 lines_per_frame; /* PAL: 313 lines, NTSC: 262 lines */ +uint16 max_sprite_pixels; /* Max. sprites pixels per line (parsing & rendering) */ +int32 fifo_write_cnt; /* VDP FIFO write count */ +uint32 fifo_slots; /* VDP FIFO access slot count */ +uint32 hvc_latch; /* latched HV counter */ +const uint8 *hctab; /* pointer to H Counter table */ + +/* Function pointers */ +void (*vdp_68k_data_w)(unsigned int data); +void (*vdp_z80_data_w)(unsigned int data); +unsigned int (*vdp_68k_data_r)(void); +unsigned int (*vdp_z80_data_r)(void); + +/* Function prototypes */ +static void vdp_68k_data_w_m4(unsigned int data); +static void vdp_68k_data_w_m5(unsigned int data); +static unsigned int vdp_68k_data_r_m4(void); +static unsigned int vdp_68k_data_r_m5(void); +static void vdp_z80_data_w_m4(unsigned int data); +static void vdp_z80_data_w_m5(unsigned int data); +static unsigned int vdp_z80_data_r_m4(void); +static unsigned int vdp_z80_data_r_m5(void); +static void vdp_z80_data_w_ms(unsigned int data); +static void vdp_z80_data_w_gg(unsigned int data); +static void vdp_z80_data_w_sg(unsigned int data); +static void vdp_bus_w(unsigned int data); +static void vdp_fifo_update(unsigned int cycles); +static void vdp_reg_w(unsigned int r, unsigned int d, unsigned int cycles); +static void vdp_dma_68k_ext(unsigned int length); +static void vdp_dma_68k_ram(unsigned int length); +static void vdp_dma_68k_io(unsigned int length); +static void vdp_dma_copy(unsigned int length); +static void vdp_dma_fill(unsigned int length); + +/* Tables that define the playfield layout */ +static const uint8 hscroll_mask_table[] = { 0x00, 0x07, 0xF8, 0xFF }; +static const uint8 shift_table[] = { 6, 7, 0, 8 }; +static const uint8 col_mask_table[] = { 0x0F, 0x1F, 0x0F, 0x3F }; +static const uint16 row_mask_table[] = { 0x0FF, 0x1FF, 0x2FF, 0x3FF }; + +static uint8 border; /* Border color index */ +static uint8 pending; /* Pending write flag */ +static uint8 code; /* Code register */ +static uint8 dma_type; /* DMA mode */ +static uint16 addr; /* Address register */ +static uint16 addr_latch; /* Latched A15, A14 of address */ +static uint16 sat_base_mask; /* Base bits of SAT */ +static uint16 sat_addr_mask; /* Index bits of SAT */ +static uint16 dma_src; /* DMA source address */ +static uint32 dma_endCycles; /* 68k cycles to DMA end */ +static int dmafill; /* DMA Fill pending flag */ +static int cached_write; /* 2nd part of 32-bit CTRL port write (Genesis mode) or LSB of CRAM data (Game Gear mode) */ +static uint16 fifo[4]; /* FIFO ring-buffer */ +static int fifo_idx; /* FIFO write index */ +static int fifo_byte_access; /* FIFO byte access flag */ +static uint32 fifo_cycles; /* FIFO next access cycle */ + + /* set Z80 or 68k interrupt lines */ +static void (*set_irq_line)(unsigned int level); +static void (*set_irq_line_delay)(unsigned int level); + +/* Vertical counter overflow values (see hvc.h) */ +static const uint16 vc_table[4][2] = +{ + /* NTSC, PAL */ + {0xDA , 0xF2}, /* Mode 4 (192 lines) */ + {0xEA , 0x102}, /* Mode 5 (224 lines) */ + {0xDA , 0xF2}, /* Mode 4 (192 lines) */ + {0x106, 0x10A} /* Mode 5 (240 lines) */ +}; + +/* DMA Timings (number of access slots per line) */ +static const uint8 dma_timing[2][2] = +{ +/* H32, H40 */ + {16 , 18}, /* active display */ + {167, 205} /* blank display */ +}; + +/* DMA processing functions (set by VDP register 23 high nibble) */ +static void (*const dma_func[16])(unsigned int length) = +{ + /* 0x0-0x3 : DMA from 68k bus $000000-$7FFFFF (external area) */ + vdp_dma_68k_ext,vdp_dma_68k_ext,vdp_dma_68k_ext,vdp_dma_68k_ext, + + /* 0x4-0x7 : DMA from 68k bus $800000-$FFFFFF (internal RAM & I/O) */ + vdp_dma_68k_ram, vdp_dma_68k_io,vdp_dma_68k_ram,vdp_dma_68k_ram, + + /* 0x8-0xB : DMA Fill */ + vdp_dma_fill,vdp_dma_fill,vdp_dma_fill,vdp_dma_fill, + + /* 0xC-0xF : DMA Copy */ + vdp_dma_copy,vdp_dma_copy,vdp_dma_copy,vdp_dma_copy +}; + + +/*--------------------------------------------------------------------------*/ +/* Init, reset, context functions */ +/*--------------------------------------------------------------------------*/ + +void vdp_init(void) +{ + /* PAL/NTSC timings */ + lines_per_frame = vdp_pal ? 313: 262; + + /* CPU interrupt line(s)*/ + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + /* 68k cpu */ + set_irq_line = m68k_set_irq; + set_irq_line_delay = m68k_set_irq_delay; + } + else + { + /* Z80 cpu */ + set_irq_line = z80_set_irq_line; + set_irq_line_delay = z80_set_irq_line; + } +} + +void vdp_reset(void) +{ + int i; + + memset ((char *) sat, 0, sizeof (sat)); + memset ((char *) vram, 0, sizeof (vram)); + memset ((char *) cram, 0, sizeof (cram)); + memset ((char *) vsram, 0, sizeof (vsram)); + memset ((char *) reg, 0, sizeof (reg)); + + addr = 0; + addr_latch = 0; + code = 0; + pending = 0; + border = 0; + hint_pending = 0; + vint_pending = 0; + dmafill = 0; + dma_src = 0; + dma_type = 0; + dma_length = 0; + dma_endCycles = 0; + odd_frame = 0; + im2_flag = 0; + interlaced = 0; + fifo_write_cnt = 0; + fifo_cycles = 0; + fifo_slots = 0; + fifo_idx = 0; + cached_write = -1; + fifo_byte_access = 1; + + ntab = 0; + ntbb = 0; + ntwb = 0; + satb = 0; + hscb = 0; + + vscroll = 0; + + hscroll_mask = 0x00; + playfield_shift = 6; + playfield_col_mask = 0x0F; + playfield_row_mask = 0x0FF; + sat_base_mask = 0xFE00; + sat_addr_mask = 0x01FF; + + /* reset pattern cache changes */ + bg_list_index = 0; + memset ((char *) bg_name_dirty, 0, sizeof (bg_name_dirty)); + memset ((char *) bg_name_list, 0, sizeof (bg_name_list)); + + /* default HVC */ + hvc_latch = 0x10000; + hctab = cycle2hc32; + vc_max = vc_table[0][vdp_pal]; + v_counter = lines_per_frame - 1; + + /* default Window clipping */ + window_clip(0,0); + + /* reset VDP status (FIFO empty flag is set) */ + if (system_hw & SYSTEM_MD) + { + status = vdp_pal | 0x200; + } + else + { + status = 0; + } + + /* default display area */ + bitmap.viewport.w = 256; + bitmap.viewport.h = 192; + bitmap.viewport.ow = 256; + bitmap.viewport.oh = 192; + + /* default sprite pixel width */ + max_sprite_pixels = 256; + + /* default overscan area */ + if ((system_hw == SYSTEM_GG) && !config.gg_extra) + { + /* Display area reduced to 160x144 if overscan is disabled */ + bitmap.viewport.x = (config.overscan & 2) ? 14 : -48; + bitmap.viewport.y = (config.overscan & 1) ? (24 * (vdp_pal + 1)) : -24; + } + else + { + bitmap.viewport.x = (config.overscan & 2) * 7; + bitmap.viewport.y = (config.overscan & 1) * 24 * (vdp_pal + 1); + } + + /* default rendering mode */ + update_bg_pattern_cache = update_bg_pattern_cache_m4; + if (system_hw < SYSTEM_MD) + { + /* Mode 0 */ + render_bg = render_bg_m0; + render_obj = render_obj_tms; + parse_satb = parse_satb_tms; + } + else + { + /* Mode 4 */ + render_bg = render_bg_m4; + render_obj = render_obj_m4; + parse_satb = parse_satb_m4; + } + + /* default 68k bus interface (Mega Drive VDP only) */ + vdp_68k_data_w = vdp_68k_data_w_m4; + vdp_68k_data_r = vdp_68k_data_r_m4; + + /* default Z80 bus interface */ + switch (system_hw) + { + case SYSTEM_SG: + { + /* SG-1000 VDP (TMS99xx) */ + vdp_z80_data_w = vdp_z80_data_w_sg; + vdp_z80_data_r = vdp_z80_data_r_m4; + break; + } + + case SYSTEM_GG: + { + /* Game Gear VDP */ + vdp_z80_data_w = vdp_z80_data_w_gg; + vdp_z80_data_r = vdp_z80_data_r_m4; + break; + } + + case SYSTEM_MARKIII: + case SYSTEM_SMS: + case SYSTEM_SMS2: + case SYSTEM_GGMS: + { + /* Master System or Game Gear (in MS compatibility mode) VDP */ + vdp_z80_data_w = vdp_z80_data_w_ms; + vdp_z80_data_r = vdp_z80_data_r_m4; + break; + } + + default: + { + /* Mega Drive VDP (in MS compatibility mode) */ + vdp_z80_data_w = vdp_z80_data_w_m4; + vdp_z80_data_r = vdp_z80_data_r_m4; + break; + } + } + + /* SG-1000 specific */ + if (system_hw == SYSTEM_SG) + { + /* 16k address decoding by default (Magical Kid Wiz) */ + vdp_reg_w(1, 0x80, 0); + + /* no H-INT on TMS99xx */ + vdp_reg_w(10, 0xFF, 0); + } + + /* Master System specific */ + else if ((system_hw & SYSTEM_SMS) && (!(config.bios & 1) || !(system_bios & SYSTEM_SMS))) + { + /* force registers initialization (only if Master System BIOS is disabled or not loaded) */ + vdp_reg_w(0 , 0x36, 0); + vdp_reg_w(1 , 0x80, 0); + vdp_reg_w(2 , 0xFF, 0); + vdp_reg_w(3 , 0xFF, 0); + vdp_reg_w(4 , 0xFF, 0); + vdp_reg_w(5 , 0xFF, 0); + vdp_reg_w(6 , 0xFF, 0); + vdp_reg_w(10, 0xFF, 0); + + /* Mode 4 */ + render_bg = render_bg_m4; + render_obj = render_obj_m4; + parse_satb = parse_satb_m4; + } + + /* Mega Drive specific */ + else if (((system_hw == SYSTEM_MD) || (system_hw == SYSTEM_MCD)) && (config.bios & 1) && !(system_bios & SYSTEM_MD)) + { + /* force registers initialization (only if TMSS model is emulated and BOOT ROM is not loaded) */ + vdp_reg_w(0 , 0x04, 0); + vdp_reg_w(1 , 0x04, 0); + vdp_reg_w(10, 0xFF, 0); + vdp_reg_w(12, 0x81, 0); + vdp_reg_w(15, 0x02, 0); + } + + /* reset color palette */ + for(i = 0; i < 0x20; i ++) + { + color_update_m4(i, 0x00); + } + color_update_m4(0x40, 0x00); +} + +int vdp_context_save(uint8 *state) +{ + int bufferptr = 0; + + save_param(sat, sizeof(sat)); + save_param(vram, sizeof(vram)); + save_param(cram, sizeof(cram)); + save_param(vsram, sizeof(vsram)); + save_param(reg, sizeof(reg)); + save_param(&addr, sizeof(addr)); + save_param(&addr_latch, sizeof(addr_latch)); + save_param(&code, sizeof(code)); + save_param(&pending, sizeof(pending)); + save_param(&status, sizeof(status)); + save_param(&dmafill, sizeof(dmafill)); + save_param(&fifo_idx, sizeof(fifo_idx)); + save_param(&fifo, sizeof(fifo)); + save_param(&hint_pending, sizeof(hint_pending)); + save_param(&vint_pending, sizeof(vint_pending)); + save_param(&dma_length, sizeof(dma_length)); + save_param(&dma_type, sizeof(dma_type)); + save_param(&dma_src, sizeof(dma_src)); + save_param(&cached_write, sizeof(cached_write)); + return bufferptr; +} + +int vdp_context_load(uint8 *state, uint8 version) +{ + int i, bufferptr = 0; + uint8 temp_reg[0x20]; + + load_param(sat, sizeof(sat)); + load_param(vram, sizeof(vram)); + load_param(cram, sizeof(cram)); + load_param(vsram, sizeof(vsram)); + load_param(temp_reg, sizeof(temp_reg)); + + /* restore VDP registers */ + if (system_hw < SYSTEM_MD) + { + if (system_hw > SYSTEM_SG) + { + for (i=0;i<0x10;i++) + { + pending = 1; + addr_latch = temp_reg[i]; + vdp_sms_ctrl_w(0x80 | i); + } + } + else + { + for (i=0;i<0x08;i++) + { + pending = 1; + addr_latch = temp_reg[i]; + vdp_tms_ctrl_w(0x80 | i); + } + } + } + else + { + for (i=0;i<0x20;i++) + { + vdp_reg_w(i, temp_reg[i], 0); + } + } + + load_param(&addr, sizeof(addr)); + load_param(&addr_latch, sizeof(addr_latch)); + load_param(&code, sizeof(code)); + load_param(&pending, sizeof(pending)); + load_param(&status, sizeof(status)); + + /* 1.7.1 state compatibility */ + if (version < 0x35) + { + uint16 temp; + load_param(&temp, 2); + dmafill = temp >> 8; + temp &= 0xff; + fifo_idx = 0; + fifo[0] = fifo[1] = fifo[2] = fifo[3] = (temp << 8) | temp; + } + else + { + load_param(&dmafill, sizeof(dmafill)); + load_param(&fifo_idx, sizeof(fifo_idx)); + load_param(&fifo, sizeof(fifo)); + } + + load_param(&hint_pending, sizeof(hint_pending)); + load_param(&vint_pending, sizeof(vint_pending)); + load_param(&dma_length, sizeof(dma_length)); + load_param(&dma_type, sizeof(dma_type)); + load_param(&dma_src, sizeof(dma_src)); + load_param(&cached_write, sizeof(cached_write)); + + /* restore FIFO byte access flag */ + fifo_byte_access = ((code & 0x0F) < 0x03); + + /* restore current NTSC/PAL mode */ + if (system_hw & SYSTEM_MD) + { + status = (status & ~1) | vdp_pal; + } + + if (reg[1] & 0x04) + { + /* Mode 5 */ + bg_list_index = 0x800; + + /* reinitialize palette */ + color_update_m5(0, *(uint16 *)&cram[border << 1]); + for(i = 1; i < 0x40; i++) + { + color_update_m5(i, *(uint16 *)&cram[i << 1]); + } + } + else + { + /* Modes 0,1,2,3,4 */ + bg_list_index = 0x200; + + /* reinitialize palette */ + for(i = 0; i < 0x20; i ++) + { + color_update_m4(i, *(uint16 *)&cram[i << 1]); + } + color_update_m4(0x40, *(uint16 *)&cram[(0x10 | (border & 0x0F)) << 1]); + } + + /* invalidate cache */ + for (i=0;i VDP 32-cell Active 16 + Blanking 167 + 40-cell Active 18 + Blanking 205 + VRAM Fill 32-cell Active 15 + Blanking 166 + 40-cell Active 17 + Blanking 204 + VRAM Copy 32-cell Active 8 + Blanking 83 + 40-cell Active 9 + Blanking 102 + + 'Active' is the active display period, 'Blanking' is either the vertical + blanking period or when the display is forcibly blanked via register #1. + + The above transfer counts are all in bytes, unless the destination is + CRAM or VSRAM for a 68K > VDP transfer, in which case it is in words. + */ + unsigned int rate = dma_timing[(status & 8) || !(reg[1] & 0x40)][reg[12] & 1]; + + /* Adjust for 68k bus DMA to VRAM (one word = 2 access) or DMA Copy (one read + one write = 2 access) */ + rate = rate >> (dma_type & 1); + + /* Remaining DMA cycles */ + if (status & 8) + { + /* Process DMA until the end of VBLANK */ + /* NOTE: DMA timings can not change during VBLANK because active display width cannot be modified. */ + /* Indeed, writing VDP registers during DMA is either impossible (when doing DMA from 68k bus, CPU */ + /* is locked) or will abort DMA operation (in case of DMA Fill or Copy). */ + dma_cycles = (lines_per_frame * MCYCLES_PER_LINE) - cycles; + } + else + { + /* Process DMA until the end of current line */ + dma_cycles = (mcycles_vdp + MCYCLES_PER_LINE) - cycles; + } + + /* Remaining DMA bytes for that line */ + dma_bytes = (dma_cycles * rate) / MCYCLES_PER_LINE; + +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] DMA type %d (%d access/line)(%d cycles left)-> %d access (%d remaining) (%x)\n", v_counter, m68k.cycles/MCYCLES_PER_LINE, m68k.cycles, m68k.cycles%MCYCLES_PER_LINE,dma_type, rate, dma_cycles, dma_bytes, dma_length, m68k_get_reg(M68K_REG_PC)); +#endif + + /* Check if DMA can be finished before the end of current line */ + if (dma_length < dma_bytes) + { + /* Adjust remaining DMA bytes */ + dma_bytes = dma_length; + dma_cycles = (dma_bytes * MCYCLES_PER_LINE) / rate; + } + + /* Update DMA timings */ + if (dma_type < 2) + { + /* 68K is frozen during DMA from 68k bus */ + m68k.cycles = cycles + dma_cycles; +#ifdef LOGVDP + error("-->CPU frozen for %d cycles\n", dma_cycles); +#endif + } + else + { + /* Set DMA Busy flag */ + status |= 0x02; + + /* 68K is still running, set DMA end cycle */ + dma_endCycles = cycles + dma_cycles; +#ifdef LOGVDP + error("-->DMA ends in %d cycles\n", dma_cycles); +#endif + } + + /* Process DMA */ + if (dma_bytes > 0) + { + /* Update DMA length */ + dma_length -= dma_bytes; + + /* Process DMA operation */ + dma_func[reg[23] >> 4](dma_bytes); + + /* Check if DMA is finished */ + if (!dma_length) + { + /* DMA source address registers are incremented during DMA (even DMA Fill) */ + uint16 end = reg[21] + (reg[22] << 8) + reg[19] + (reg[20] << 8); + reg[21] = end & 0xff; + reg[22] = end >> 8; + + /* DMA length registers are decremented during DMA */ + reg[19] = reg[20] = 0; + + /* perform cached write, if any */ + if (cached_write >= 0) + { + vdp_68k_ctrl_w(cached_write); + cached_write = -1; + } + } + } +} + + +/*--------------------------------------------------------------------------*/ +/* Control port access functions */ +/*--------------------------------------------------------------------------*/ + +void vdp_68k_ctrl_w(unsigned int data) +{ + /* Check pending flag */ + if (pending == 0) + { + /* A single long word write instruction could have started DMA with the first word */ + if (dma_length) + { + /* 68k is frozen during 68k bus DMA */ + /* Second word should be written after DMA completion */ + /* See Formula One & Kawasaki Superbike Challenge */ + if (dma_type < 2) + { + /* Latch second control word for later */ + cached_write = data; + return; + } + } + + /* Check CD0-CD1 bits */ + if ((data & 0xC000) == 0x8000) + { + /* VDP register write */ + vdp_reg_w((data >> 8) & 0x1F, data & 0xFF, m68k.cycles); + } + else + { + /* Set pending flag (Mode 5 only) */ + pending = reg[1] & 4; + } + + /* Update address and code registers */ + addr = addr_latch | (data & 0x3FFF); + code = ((code & 0x3C) | ((data >> 14) & 0x03)); + } + else + { + /* Clear pending flag */ + pending = 0; + + /* Save address bits A15 and A14 */ + addr_latch = (data & 3) << 14; + + /* Update address and code registers */ + addr = addr_latch | (addr & 0x3FFF); + code = ((code & 0x03) | ((data >> 2) & 0x3C)); + + /* Detect DMA operation (CD5 bit set) */ + if (code & 0x20) + { + /* DMA must be enabled */ + if (reg[1] & 0x10) + { + /* DMA type */ + switch (reg[23] >> 6) + { + case 2: + { + /* DMA Fill */ + dma_type = 2; + + /* DMA is pending until next DATA port write */ + dmafill = 1; + + /* Set DMA Busy flag */ + status |= 0x02; + + /* DMA end cycle is not initialized yet (this prevents DMA Busy flag from being cleared on VDP status read) */ + dma_endCycles = 0xffffffff; + break; + } + + case 3: + { + /* DMA Copy */ + dma_type = 3; + + /* DMA length */ + dma_length = (reg[20] << 8) | reg[19]; + + /* Zero DMA length (pre-decrementing counter) */ + if (!dma_length) + { + dma_length = 0x10000; + } + + /* DMA source address */ + dma_src = (reg[22] << 8) | reg[21]; + + /* Trigger DMA */ + vdp_dma_update(m68k.cycles); + break; + } + + default: + { + /* DMA from 68k bus */ + dma_type = (code & 0x06) ? 0 : 1; + + /* DMA length */ + dma_length = (reg[20] << 8) | reg[19]; + + /* Zero DMA length (pre-decrementing counter) */ + if (!dma_length) + { + dma_length = 0x10000; + } + + /* DMA source address */ + dma_src = (reg[22] << 8) | reg[21]; + + /* Transfer from SVP ROM/RAM ($000000-$3fffff) or CD Word-RAM ($200000-$3fffff/$600000-$7fffff) */ + if (((system_hw == SYSTEM_MCD) && ((reg[23] & 0x70) == ((scd.cartridge.boot >> 1) + 0x10))) || (svp && !(reg[23] & 0x60))) + { + /* source data is available with one cycle delay, i.e first word written by VDP is */ + /* previous data being held on 68k bus at that time, then source words are written */ + /* normally to VDP RAM, with only last source word being ignored */ + addr += reg[15]; + dma_length--; + } + + /* Trigger DMA */ + vdp_dma_update(m68k.cycles); + break; + } + } + } + } + } + + /* + FIFO emulation (Chaos Engine/Soldier of Fortune, Double Clutch, Sol Deace) + -------------------------------------------------------------------------- + Each VRAM access is byte wide, so one VRAM write (word) need two slot access. + + NOTE: Invalid code 0x02 (register write) should not behave the same as VRAM + access, i.e data is ignored and only one access slot is used for each word, + BUT a few games ("Clue", "Microcosm") which accidentally corrupt code value + will have issues when emulating FIFO timings. They likely work fine on real + hardware because of periodical 68k wait-states which have been observed and + would naturaly add some delay between writes. Until those wait-states are + accurately measured and emulated, delay is forced when invalid code value + is being used. + */ + fifo_byte_access = ((code & 0x0F) <= 0x02); +} + +/* Mega Drive VDP control port specific (MS compatibility mode) */ +void vdp_z80_ctrl_w(unsigned int data) +{ + switch (pending) + { + case 0: + { + /* Latch LSB */ + addr_latch = data; + + /* Set LSB pending flag */ + pending = 1; + return; + } + + case 1: + { + /* Update address and code registers */ + addr = (addr & 0xC000) | ((data & 0x3F) << 8) | addr_latch ; + code = ((code & 0x3C) | ((data >> 6) & 0x03)); + + if ((code & 0x03) == 0x02) + { + /* VDP register write */ + vdp_reg_w(data & 0x1F, addr_latch, Z80.cycles); + + /* Clear pending flag */ + pending = 0; + return; + } + + /* Set Mode 5 pending flag */ + pending = (reg[1] & 4) >> 1; + + if (!pending && !(code & 0x03)) + { + /* Process VRAM read */ + fifo[0] = vram[addr & 0x3FFF]; + + /* Increment address register */ + addr += (reg[15] + 1); + } + return; + } + + case 2: + { + /* Latch LSB */ + addr_latch = data; + + /* Set LSB pending flag */ + pending = 3; + return; + } + + case 3: + { + /* Clear pending flag */ + pending = 0; + + /* Update address and code registers */ + addr = ((addr_latch & 3) << 14) | (addr & 0x3FFF); + code = ((code & 0x03) | ((addr_latch >> 2) & 0x3C)); + + /* Detect DMA operation (CD5 bit set) */ + if (code & 0x20) + { + /* DMA should be enabled */ + if (reg[1] & 0x10) + { + /* DMA type */ + switch (reg[23] >> 6) + { + case 2: + { + /* DMA Fill will be triggered by next write to DATA port */ + dmafill = 1; + + /* Set DMA Busy flag */ + status |= 0x02; + + /* DMA end cycle is not initialized yet (this prevents DMA Busy flag from being cleared on VDP status read) */ + dma_endCycles = 0xffffffff; + break; + } + + case 3: + { + /* DMA copy */ + dma_type = 3; + + /* DMA length */ + dma_length = (reg[20] << 8) | reg[19]; + + /* Zero DMA length (pre-decrementing counter) */ + if (!dma_length) + { + dma_length = 0x10000; + } + + /* DMA source address */ + dma_src = (reg[22] << 8) | reg[21]; + + /* Trigger DMA */ + vdp_dma_update(Z80.cycles); + break; + } + + default: + { + /* DMA from 68k bus does not work when Z80 is in control */ + break; + } + } + } + } + } + return; + } +} + +/* Master System & Game Gear VDP control port specific */ +void vdp_sms_ctrl_w(unsigned int data) +{ + if(pending == 0) + { + /* Update address register LSB */ + addr = (addr & 0x3F00) | (data & 0xFF); + + /* Latch LSB */ + addr_latch = data; + + /* Set LSB pending flag */ + pending = 1; + } + else + { + /* Update address and code registers */ + code = (data >> 6) & 3; + addr = (data << 8 | addr_latch) & 0x3FFF; + + /* Clear pending flag */ + pending = 0; + + if (code == 0) + { + /* Process VRAM read */ + fifo[0] = vram[addr & 0x3FFF]; + + /* Increment address register */ + addr = (addr + 1) & 0x3FFF; + return; + } + + if (code == 2) + { + /* Save current VDP mode */ + int mode, prev = (reg[0] & 0x06) | (reg[1] & 0x18); + + /* Write VDP register 0-15 */ + vdp_reg_w(data & 0x0F, addr_latch, Z80.cycles); + + /* Check VDP mode changes */ + mode = (reg[0] & 0x06) | (reg[1] & 0x18); + prev ^= mode; + + if (prev) + { + /* Check for extended modes */ + if (system_hw > SYSTEM_SMS) + { + int height; + + if (mode == 0x0E) /* M1=0,M2=1,M3=1,M4=1 */ + { + /* Mode 4 extended (240 lines) */ + height = 240; + + /* Update vertical counter max value */ + vc_max = vc_table[3][vdp_pal]; + } + else if (mode == 0x16) /* M1=1,M2=1,M3=0,M4=1 */ + { + /* Mode 4 extended (224 lines) */ + height = 224; + + /* Update vertical counter max value */ + vc_max = vc_table[1][vdp_pal]; + } + else + { + /* Mode 4 default (224 lines) */ + height = 192; + + /* Default vertical counter max value */ + vc_max = vc_table[0][vdp_pal]; + } + + if (height != bitmap.viewport.h) + { + if (status & 8) + { + /* viewport changes should be applied on next frame */ + bitmap.viewport.changed |= 2; + } + else + { + /* update active display */ + bitmap.viewport.h = height; + + /* update vertical overscan */ + if (config.overscan & 1) + { + bitmap.viewport.y = (240 + 48*vdp_pal - height) >> 1; + } + else + { + if ((system_hw == SYSTEM_GG) && !config.gg_extra) + { + /* Display area reduced to 160x144 */ + bitmap.viewport.y = (144 - height) / 2; + } + else + { + bitmap.viewport.y = 0; + } + } + } + } + } + + /* Rendering mode */ + switch (mode) + { + case 0x00: /* Graphics I */ + { + render_bg = render_bg_m0; + break; + } + + case 0x10: /* Text */ + { + render_bg = render_bg_m1; + break; + } + + case 0x02: /* Graphics II */ + { + render_bg = render_bg_m2; + break; + } + + case 0x12: /* Text (Extended PG) */ + { + render_bg = render_bg_m1x; + break; + } + + case 0x08: /* Multicolor */ + { + render_bg = render_bg_m3; + break; + } + + case 0x18: /* Invalid (1+3) */ + { + render_bg = render_bg_inv; + break; + } + + case 0x0A: /* Multicolor (Extended PG) */ + { + render_bg = render_bg_m3x; + break; + } + + case 0x1A: /* Invalid (1+2+3) */ + { + render_bg = render_bg_inv; + break; + } + + default: /* Mode 4 */ + { + render_bg = render_bg_m4; + break; + } + } + + /* Mode switching */ + if (prev & 0x04) + { + int i; + + if (mode & 0x04) + { + /* Mode 4 sprites */ + parse_satb = parse_satb_m4; + render_obj = render_obj_m4; + + /* force BG cache update*/ + bg_list_index = 0x200; + } + else + { + /* TMS-mode sprites */ + parse_satb = parse_satb_tms; + render_obj = render_obj_tms; + + /* BG cache is not used */ + bg_list_index = 0; + } + + /* reinitialize palette */ + for(i = 0; i < 0x20; i ++) + { + color_update_m4(i, *(uint16 *)&cram[i << 1]); + } + color_update_m4(0x40, *(uint16 *)&cram[(0x10 | (border & 0x0F)) << 1]); + } + } + } + } +} + +/* SG-1000 VDP (TMS99xx) control port specific */ +void vdp_tms_ctrl_w(unsigned int data) +{ + if(pending == 0) + { + /* Latch LSB */ + addr_latch = data; + + /* Set LSB pending flag */ + pending = 1; + } + else + { + /* Update address and code registers */ + code = (data >> 6) & 3; + addr = (data << 8 | addr_latch) & 0x3FFF; + + /* Clear pending flag */ + pending = 0; + + if (code == 0) + { + /* Process VRAM read */ + fifo[0] = vram[addr & 0x3FFF]; + + /* Increment address register */ + addr = (addr + 1) & 0x3FFF; + return; + } + + if (code & 2) + { + /* VDP register index (0-7) */ + data &= 0x07; + + /* Write VDP register */ + vdp_reg_w(data, addr_latch, Z80.cycles); + + /* Check VDP mode changes */ + if (data < 2) + { + int mode = (reg[0] & 0x02) | (reg[1] & 0x18); + + /* Rendering mode */ + switch (mode) + { + case 0x00: /* Graphics I */ + { + render_bg = render_bg_m0; + break; + } + + case 0x10: /* Text */ + { + render_bg = render_bg_m1; + break; + } + + case 0x02: /* Graphics II */ + { + render_bg = render_bg_m2; + break; + } + + case 0x12: /* Text (Extended PG) */ + { + render_bg = render_bg_m1x; + break; + } + + case 0x08: /* Multicolor */ + { + render_bg = render_bg_m3; + break; + } + + case 0x18: /* Invalid (1+3) */ + { + render_bg = render_bg_inv; + break; + } + + case 0x0A: /* Multicolor (Extended PG) */ + { + render_bg = render_bg_m3x; + break; + } + + case 0x1A: /* Invalid (1+2+3) */ + { + render_bg = render_bg_inv; + break; + } + } + } + } + } +} + + /* + * Status register + * + * Bits + * 0 NTSC(0)/PAL(1) + * 1 DMA Busy + * 2 During HBlank + * 3 During VBlank + * 4 0:1 even:odd field (interlaced modes only) + * 5 Sprite collision + * 6 Too many sprites per line + * 7 v interrupt occurred + * 8 Write FIFO full + * 9 Write FIFO empty + * 10 - 15 Open Bus + */ +unsigned int vdp_68k_ctrl_r(unsigned int cycles) +{ + unsigned int temp; + + /* Update FIFO status flags if not empty */ + if (fifo_write_cnt) + { + vdp_fifo_update(cycles); + } + + /* Check if DMA Busy flag is set */ + if (status & 2) + { + /* Check if DMA is finished */ + if (!dma_length && (cycles >= dma_endCycles)) + { + /* Clear DMA Busy flag */ + status &= 0xFFFD; + } + } + + /* Return VDP status */ + temp = status; + + /* Clear pending flag */ + pending = 0; + + /* Clear SOVR & SCOL flags */ + status &= 0xFF9F; + + /* Display OFF: VBLANK flag is set */ + if (!(reg[1] & 0x40)) + { + temp |= 0x08; + } + + /* HBLANK flag (Sonic 3 and Sonic 2 "VS Modes", Lemmings 2, Mega Turrican, V.R Troopers, Gouketsuji Ichizoku,...) */ + /* NB: this is not 100% accurate and need to be verified on real hardware */ + if ((cycles % MCYCLES_PER_LINE) < 588) + { + temp |= 0x04; + } + +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] VDP 68k status read -> 0x%x (0x%x) (%x)\n", v_counter, cycles/MCYCLES_PER_LINE-1, cycles, cycles%MCYCLES_PER_LINE, temp, status, m68k_get_reg(M68K_REG_PC)); +#endif + return (temp); +} + +unsigned int vdp_z80_ctrl_r(unsigned int cycles) +{ + unsigned int temp; + + /* Cycle-accurate SOVR & VINT flags */ + int line = (lines_per_frame + (cycles / MCYCLES_PER_LINE) - 1) % lines_per_frame; + + /* Check if DMA busy flag is set (Mega Drive VDP specific) */ + if (status & 2) + { + /* Check if DMA is finished */ + if (!dma_length && (cycles >= dma_endCycles)) + { + /* Clear DMA Busy flag */ + status &= 0xFD; + } + } + + /* Check if we are already on next line */ + if (line > v_counter) + { + v_counter = line; + if (line == (bitmap.viewport.h + 1)) + { + /* set VINT flag (immediately cleared after) */ + status |= 0x80; + } + else if ((line >= 0) && (line < bitmap.viewport.h) && !(work_ram[0x1ffb] & cart.special)) + { + /* render next line to check sprites overflow & collision */ + render_line(line); + } + } + + /* Return VDP status */ + temp = status; + + /* Clear pending flag */ + pending = 0; + + /* Clear VINT, SOVR & SCOL flags */ + status &= 0xFF1F; + + /* Mega Drive VDP specific */ + if (system_hw & SYSTEM_MD) + { + /* Display OFF: VBLANK flag is set */ + if (!(reg[1] & 0x40)) + { + temp |= 0x08; + } + + /* HBLANK flag */ + if ((cycles % MCYCLES_PER_LINE) < 588) + { + temp |= 0x04; + } + } + else if (reg[0] & 0x04) + { + /* Mode 4 unused bits (fixes PGA Tour Golf) */ + temp |= 0x1F; + } + + /* Cycle-accurate SCOL flag */ + if ((temp & 0x20) && (line == (spr_col >> 8))) + { + if (system_hw & SYSTEM_MD) + { + /* COL flag is set at HCount 0xFF on MD */ + if ((cycles % MCYCLES_PER_LINE) < 105) + { + status |= 0x20; + temp &= ~0x20; + } + } + else + { + /* COL flag is set at the pixel it occurs */ + uint8 hc = hctab[(cycles + SMS_CYCLE_OFFSET + 15) % MCYCLES_PER_LINE]; + if ((hc < (spr_col & 0xff)) || (hc > 0xf3)) + { + status |= 0x20; + temp &= ~0x20; + } + } + } + + /* Clear HINT & VINT pending flags */ + hint_pending = vint_pending = 0; + + /* Clear Z80 interrupt */ + Z80.irq_state = CLEAR_LINE; + +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] VDP Z80 status read -> 0x%x (0x%x) (%x)\n", v_counter, cycles/MCYCLES_PER_LINE-1, cycles, cycles%MCYCLES_PER_LINE, temp, status, Z80.pc.w.l); +#endif + return (temp); +} + +/*--------------------------------------------------------------------------*/ +/* HV Counters */ +/*--------------------------------------------------------------------------*/ + +unsigned int vdp_hvc_r(unsigned int cycles) +{ + int vc; + unsigned int data = hvc_latch; + + /* Check if HVC latch is enabled */ + if (data) + { + /* Mode 5: HV-counters are frozen (cf. lightgun games, Sunset Riders logo) */ + if (reg[1] & 0x04) + { +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] HVC latch read -> 0x%x (%x)\n", v_counter, (cycles/MCYCLES_PER_LINE-1)%lines_per_frame, cycles, cycles%MCYCLES_PER_LINE, data & 0xffff, m68k_get_reg(M68K_REG_PC)); +#endif + /* return latched HVC value */ + return (data & 0xffff); + } + else + { + /* Mode 4: by default, V-counter runs normally & H counter is frozen */ + data &= 0xff; + } + } + else + { + /* Cycle-accurate H-Counter (Striker, Mickey Mania, Skitchin, Road Rash I,II,III, Sonic 3D Blast...) */ + data = hctab[cycles % MCYCLES_PER_LINE]; + } + + /* Cycle-accurate V-Counter (cycle counter starts from line -1) */ + vc = (cycles / MCYCLES_PER_LINE) - 1; + + /* V-Counter overflow */ + if (vc > vc_max) + { + vc -= lines_per_frame; + } + + /* Interlaced modes */ + if (interlaced) + { + /* Interlace mode 2 (Sonic the Hedgehog 2, Combat Cars) */ + vc <<= im2_flag; + + /* Replace bit 0 with bit 8 */ + vc = (vc & ~1) | ((vc >> 8) & 1); + } + + /* return H-Counter in LSB & V-Counter in MSB */ + data |= ((vc & 0xff) << 8); + +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] HVC read -> 0x%x (%x)\n", v_counter, (cycles/MCYCLES_PER_LINE-1)%lines_per_frame, cycles, cycles%MCYCLES_PER_LINE, data, m68k_get_reg(M68K_REG_PC)); +#endif + return (data); +} + + +/*--------------------------------------------------------------------------*/ +/* Test registers */ +/*--------------------------------------------------------------------------*/ + +void vdp_test_w(unsigned int data) +{ +#ifdef LOGERROR + error("Unused VDP Write 0x%x (%08x)\n", data, m68k_get_reg(M68K_REG_PC)); +#endif +} + + +/*--------------------------------------------------------------------------*/ +/* 68k interrupt handler (TODO: check how interrupts are handled in Mode 4) */ +/*--------------------------------------------------------------------------*/ + +int vdp_68k_irq_ack(int int_level) +{ +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] INT Level %d ack (%x)\n", v_counter, m68k.cycles/MCYCLES_PER_LINE-1, m68k.cycles, m68k.cycles%MCYCLES_PER_LINE,int_level, m68k_get_reg(M68K_REG_PC)); +#endif + + /* VINT has higher priority (Fatal Rewind) */ + if (vint_pending & reg[1]) + { +#ifdef LOGVDP + error("---> VINT cleared\n"); +#endif + + /* Clear VINT pending flag */ + vint_pending = 0; + status &= ~0x80; + + /* Update IRQ status */ + if (hint_pending & reg[0]) + { + m68k_set_irq(4); + } + else + { + m68k_set_irq(0); + } + } + else + { +#ifdef LOGVDP + error("---> HINT cleared\n"); +#endif + + /* Clear HINT pending flag */ + hint_pending = 0; + + /* Update IRQ status */ + m68k_set_irq(0); + } + + return M68K_INT_ACK_AUTOVECTOR; +} + + +/*--------------------------------------------------------------------------*/ +/* VDP registers update function */ +/*--------------------------------------------------------------------------*/ + +static void vdp_reg_w(unsigned int r, unsigned int d, unsigned int cycles) +{ +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] VDP register %d write -> 0x%x (%x)\n", v_counter, cycles/MCYCLES_PER_LINE-1, cycles, cycles%MCYCLES_PER_LINE, r, d, m68k_get_reg(M68K_REG_PC)); +#endif + + /* VDP registers #11 to #23 cannot be updated in Mode 4 (Captain Planet & Avengers, Bass Master Classic Pro Edition) */ + if (!(reg[1] & 4) && (r > 10)) + { + return; + } + + switch(r) + { + case 0: /* CTRL #1 */ + { + /* Look for changed bits */ + r = d ^ reg[0]; + reg[0] = d; + + /* Line Interrupt */ + if ((r & 0x10) && hint_pending) + { + /* Update IRQ status */ + if (vint_pending & reg[1]) + { + set_irq_line(6); + } + else if (d & 0x10) + { + set_irq_line_delay(4); + } + else + { + set_irq_line(0); + } + } + + /* Palette selection */ + if (r & 0x04) + { + /* Mega Drive VDP only */ + if (system_hw & SYSTEM_MD) + { + /* Reset color palette */ + int i; + if (reg[1] & 0x04) + { + /* Mode 5 */ + color_update_m5(0x00, *(uint16 *)&cram[border << 1]); + for (i = 1; i < 0x40; i++) + { + color_update_m5(i, *(uint16 *)&cram[i << 1]); + } + } + else + { + /* Mode 4 */ + for (i = 0; i < 0x20; i++) + { + color_update_m4(i, *(uint16 *)&cram[i << 1]); + } + color_update_m4(0x40, *(uint16 *)&cram[(0x10 | (border & 0x0F)) << 1]); + } + } + } + + /* HVC latch (Sunset Riders, Lightgun games) */ + if (r & 0x02) + { + /* Mega Drive VDP only */ + if (system_hw & SYSTEM_MD) + { + /* Mode 5 only */ + if (reg[1] & 0x04) + { + if (d & 0x02) + { + /* Latch current HVC */ + hvc_latch = vdp_hvc_r(cycles) | 0x10000; + } + else + { + /* Free-running HVC */ + hvc_latch = 0; + } + } + } + } + break; + } + + case 1: /* CTRL #2 */ + { + /* Look for changed bits */ + r = d ^ reg[1]; + reg[1] = d; + + /* Display status (modified during active display) */ + if ((r & 0x40) && (v_counter < bitmap.viewport.h)) + { + /* Cycle offset vs HBLANK */ + int offset = cycles - mcycles_vdp; + if (offset <= 860) + { + /* Sprite rendering is limited if display was disabled during HBLANK (Mickey Mania 3d level, Overdrive Demo) */ + if (d & 0x40) + { + /* NB: This is not 100% accurate. On real hardware, the maximal number of rendered sprites pixels */ + /* for the current line (normally 256 or 320 pixels) but also the maximal number of pre-processed */ + /* sprites for the next line (normally 64 or 80 sprites) are both reduced depending on the amount */ + /* of cycles spent with display disabled. Here we only reduce them by a fixed amount when display */ + /* has been reenabled after a specific point within HBLANK. */ + if (offset > 360) + { + max_sprite_pixels = 128; + } + } + + /* Redraw entire line (Legend of Galahad, Lemmings 2, Formula One, Kawasaki Super Bike, Deadly Moves,...) */ + render_line(v_counter); + + /* Restore default */ + max_sprite_pixels = 256 + ((reg[12] & 1) << 6); + } + else if (system_hw & SYSTEM_MD) + { + /* Active pixel offset */ + if (reg[12] & 1) + { + /* dot clock = MCLK / 8 */ + offset = ((offset - 860) / 8) + 16; + } + else + { + /* dot clock = MCLK / 10 */ + offset = ((offset - 860) / 10) + 16; + } + + /* Line is partially blanked (Nigel Mansell's World Championship Racing , Ren & Stimpy Show, ...) */ + if (offset < bitmap.viewport.w) + { + if (d & 0x40) + { + render_line(v_counter); + blank_line(v_counter, 0, offset); + } + else + { + blank_line(v_counter, offset, bitmap.viewport.w - offset); + } + } + } + } + + /* Frame Interrupt */ + if ((r & 0x20) && vint_pending) + { + /* Update IRQ status */ + if (d & 0x20) + { + set_irq_line_delay(6); + } + else if (hint_pending & reg[0]) + { + set_irq_line(4); + } + else + { + set_irq_line(0); + } + } + + /* Active display height */ + if (r & 0x08) + { + /* Mega Drive VDP only */ + if (system_hw & SYSTEM_MD) + { + /* Mode 5 only */ + if (d & 0x04) + { + /* Changes should be applied on next frame */ + bitmap.viewport.changed |= 2; + + /* Update vertical counter max value */ + vc_max = vc_table[(d >> 2) & 3][vdp_pal]; + } + } + } + + /* Rendering mode */ + if (r & 0x04) + { + /* Mega Drive VDP only */ + if (system_hw & SYSTEM_MD) + { + int i; + if (d & 0x04) + { + /* Mode 5 rendering */ + parse_satb = parse_satb_m5; + update_bg_pattern_cache = update_bg_pattern_cache_m5; + if (im2_flag) + { + render_bg = (reg[11] & 0x04) ? render_bg_m5_im2_vs : render_bg_m5_im2; + render_obj = (reg[12] & 0x08) ? render_obj_m5_im2_ste : render_obj_m5_im2; + } + else + { + render_bg = (reg[11] & 0x04) ? render_bg_m5_vs : render_bg_m5; + render_obj = (reg[12] & 0x08) ? render_obj_m5_ste : render_obj_m5; + } + + /* Reset color palette */ + color_update_m5(0x00, *(uint16 *)&cram[border << 1]); + for (i = 1; i < 0x40; i++) + { + color_update_m5(i, *(uint16 *)&cram[i << 1]); + } + + /* Mode 5 bus access */ + vdp_68k_data_w = vdp_68k_data_w_m5; + vdp_z80_data_w = vdp_z80_data_w_m5; + vdp_68k_data_r = vdp_68k_data_r_m5; + vdp_z80_data_r = vdp_z80_data_r_m5; + + /* Change display height */ + if (status & 8) + { + /* viewport changes should be applied on next frame */ + bitmap.viewport.changed |= 2; + } + else + { + /* Update current frame active display height */ + bitmap.viewport.h = 224 + ((d & 8) << 1); + bitmap.viewport.y = (config.overscan & 1) * (8 - (d & 8) + 24*vdp_pal); + } + + /* Clear HVC latched value */ + hvc_latch = 0; + + /* Check if HVC latch bit is set */ + if (reg[0] & 0x02) + { + /* Latch current HVC */ + hvc_latch = vdp_hvc_r(cycles) | 0x10000; + } + + /* max tiles to invalidate */ + bg_list_index = 0x800; + } + else + { + /* Mode 4 rendering */ + parse_satb = parse_satb_m4; + update_bg_pattern_cache = update_bg_pattern_cache_m4; + render_bg = render_bg_m4; + render_obj = render_obj_m4; + + /* Reset color palette */ + for (i = 0; i < 0x20; i++) + { + color_update_m4(i, *(uint16 *)&cram[i << 1]); + } + color_update_m4(0x40, *(uint16 *)&cram[(0x10 | (border & 0x0F)) << 1]); + + /* Mode 4 bus access */ + vdp_68k_data_w = vdp_68k_data_w_m4; + vdp_z80_data_w = vdp_z80_data_w_m4; + vdp_68k_data_r = vdp_68k_data_r_m4; + vdp_z80_data_r = vdp_z80_data_r_m4; + + if (status & 8) + { + /* viewport changes should be applied on next frame */ + bitmap.viewport.changed |= 2; + } + else + { + /* Update current frame active display */ + bitmap.viewport.h = 192; + bitmap.viewport.y = (config.overscan & 1) * 24 * (vdp_pal + 1); + } + + /* Latch current HVC */ + hvc_latch = vdp_hvc_r(cycles) | 0x10000; + + /* max tiles to invalidate */ + bg_list_index = 0x200; + } + + /* Invalidate pattern cache */ + for (i=0;i> 2) & 3][vdp_pal]; + } + else + { + /* No effect (cleared to avoid mode 5 detection elsewhere) */ + reg[1] &= ~0x04; + } + } + break; + } + + case 2: /* Plane A Name Table Base */ + { + reg[2] = d; + ntab = (d << 10) & 0xE000; + + /* Plane A Name Table Base changed during HBLANK */ + if ((v_counter < bitmap.viewport.h) && (reg[1] & 0x40) && (cycles <= (mcycles_vdp + 860))) + { + /* render entire line */ + render_line(v_counter); + } + break; + } + + case 3: /* Window Plane Name Table Base */ + { + reg[3] = d; + if (reg[12] & 0x01) + { + ntwb = (d << 10) & 0xF000; + } + else + { + ntwb = (d << 10) & 0xF800; + } + + /* Window Plane Name Table Base changed during HBLANK */ + if ((v_counter < bitmap.viewport.h) && (reg[1] & 0x40) && (cycles <= (mcycles_vdp + 860))) + { + /* render entire line */ + render_line(v_counter); + } + break; + } + + case 4: /* Plane B Name Table Base */ + { + reg[4] = d; + ntbb = (d << 13) & 0xE000; + + /* Plane B Name Table Base changed during HBLANK (Adventures of Batman & Robin) */ + if ((v_counter < bitmap.viewport.h) && (reg[1] & 0x40) && (cycles <= (mcycles_vdp + 860))) + { + /* render entire line */ + render_line(v_counter); + } + + break; + } + + case 5: /* Sprite Attribute Table Base */ + { + reg[5] = d; + satb = (d << 9) & sat_base_mask; + break; + } + + case 7: /* Backdrop color */ + { + reg[7] = d; + + /* Check if backdrop color changed */ + d &= 0x3F; + + if (d != border) + { + /* Update backdrop color */ + border = d; + + /* Reset palette entry */ + if (reg[1] & 4) + { + /* Mode 5 */ + color_update_m5(0x00, *(uint16 *)&cram[d << 1]); + } + else + { + /* Mode 4 */ + color_update_m4(0x40, *(uint16 *)&cram[(0x10 | (d & 0x0F)) << 1]); + } + + /* Backdrop color modified during HBLANK (Road Rash 1,2,3)*/ + if ((v_counter < bitmap.viewport.h) && (cycles <= (mcycles_vdp + 860))) + { + /* remap entire line */ + remap_line(v_counter); + } + } + break; + } + + case 8: /* Horizontal Scroll (Mode 4 only) */ + { + int line; + + /* Hscroll is latched at HCount 0xF3, HCount 0xF6 on MD */ + /* Line starts at HCount 0xF4, HCount 0xF6 on MD */ + if (system_hw < SYSTEM_MD) + { + cycles = cycles + 15; + } + + /* Make sure Hscroll has not already been latched */ + line = (lines_per_frame + (cycles / MCYCLES_PER_LINE) - 1) % lines_per_frame; + if ((line > v_counter) && (line < bitmap.viewport.h) && !(work_ram[0x1ffb] & cart.special)) + { + v_counter = line; + render_line(line); + } + + reg[8] = d; + break; + } + + case 11: /* CTRL #3 */ + { + reg[11] = d; + + /* Horizontal scrolling mode */ + hscroll_mask = hscroll_mask_table[d & 0x03]; + + /* Vertical Scrolling mode */ + if (d & 0x04) + { + render_bg = im2_flag ? render_bg_m5_im2_vs : render_bg_m5_vs; + } + else + { + render_bg = im2_flag ? render_bg_m5_im2 : render_bg_m5; + } + break; + } + + case 12: /* CTRL #4 */ + { + /* Look for changed bits */ + r = d ^ reg[12]; + reg[12] = d; + + /* Shadow & Highlight mode */ + if (r & 0x08) + { + /* Reset color palette */ + int i; + color_update_m5(0x00, *(uint16 *)&cram[border << 1]); + for (i = 1; i < 0x40; i++) + { + color_update_m5(i, *(uint16 *)&cram[i << 1]); + } + + /* Update sprite rendering function */ + if (d & 0x08) + { + render_obj = im2_flag ? render_obj_m5_im2_ste : render_obj_m5_ste; + } + else + { + render_obj = im2_flag ? render_obj_m5_im2 : render_obj_m5; + } + } + + /* Interlaced modes */ + if (r & 0x06) + { + /* changes should be applied on next frame */ + bitmap.viewport.changed |= 2; + } + + /* Active display width */ + if (r & 0x01) + { + if (d & 0x01) + { + /* Update display-dependant registers */ + ntwb = (reg[3] << 10) & 0xF000; + satb = (reg[5] << 9) & 0xFC00; + sat_base_mask = 0xFC00; + sat_addr_mask = 0x03FF; + + /* Update HC table */ + hctab = cycle2hc40; + + /* Update clipping */ + window_clip(reg[17], 1); + + /* Max. sprite pixels per line */ + max_sprite_pixels = 320; + } + else + { + /* Update display-dependant registers */ + ntwb = (reg[3] << 10) & 0xF800; + satb = (reg[5] << 9) & 0xFE00; + sat_base_mask = 0xFE00; + sat_addr_mask = 0x01FF; + + /* Update HC table */ + hctab = cycle2hc32; + + /* Update clipping */ + window_clip(reg[17], 0); + + /* Max. sprite pixels per line */ + max_sprite_pixels = 256; + } + + /* Active display width modified during HBLANK (Bugs Bunny Double Trouble) */ + if ((v_counter < bitmap.viewport.h) && (cycles <= (mcycles_vdp + 860))) + { + /* Update active display width */ + bitmap.viewport.w = 256 + ((d & 1) << 6); + + /* Redraw entire line */ + render_line(v_counter); + } + else if (v_counter == (lines_per_frame - 1)) + { + /* Update starting frame active display width */ + bitmap.viewport.w = 256 + ((d & 1) << 6); + } + else + { + /* Changes should be applied on next frame (Golden Axe III intro) */ + /* NB: not 100% accurate but required since backend framebuffer width cannot be modified mid-frame. */ + /* This would require a fixed framebuffer width (based on TV screen aspect ratio) and pixel scaling */ + /* to be done during rendering (depending on active display pixel aspect ratio in H32 or H40 mode). */ + /* Display is generally disabled when this is modified so it shouldn't be really noticeable anyway. */ + bitmap.viewport.changed |= 2; + } + } + break; + } + + case 13: /* HScroll Base Address */ + { + reg[13] = d; + hscb = (d << 10) & 0xFC00; + break; + } + + case 16: /* Playfield size */ + { + reg[16] = d; + playfield_shift = shift_table[(d & 3)]; + playfield_col_mask = col_mask_table[(d & 3)]; + playfield_row_mask = row_mask_table[(d >> 4) & 3]; + break; + } + + case 17: /* Window/Plane A vertical clipping */ + { + reg[17] = d; + window_clip(d, reg[12] & 1); + break; + } + + default: + { + reg[r] = d; + break; + } + } +} + +/*--------------------------------------------------------------------------*/ +/* FIFO emulation (Mega Drive VDP specific) */ +/* ---------------------------------------- */ +/* */ +/* CPU access to VRAM, CRAM & VSRAM is limited during active display: */ +/* H32 mode -> 16 access per line */ +/* H40 mode -> 18 access per line */ +/* */ +/* with fixed access slots timings detailled below. */ +/* */ +/* Each VRAM access is byte wide, so one VRAM write (word) need two slots. */ +/* */ +/*--------------------------------------------------------------------------*/ + +static void vdp_fifo_update(unsigned int cycles) +{ + int slots, count = 0; + + const int *fifo_timing; + + const int fifo_cycles_h32[16+2] = + { + 230, 510, 810, 970, 1130, 1450, 1610, 1770, 2090, 2250, 2410, 2730, 2890, 3050, 3350, 3370, + MCYCLES_PER_LINE + 230, MCYCLES_PER_LINE + 510 + }; + + const int fifo_cycles_h40[18+2] = + { + 352, 820, 948, 1076, 1332, 1460, 1588, 1844, 1972, 2100, 2356, 2484, 2612, 2868, 2996, 3124, 3364, 3380, + MCYCLES_PER_LINE + 352, MCYCLES_PER_LINE + 820 + }; + + + /* number of access slots up to current line */ + if (reg[12] & 0x01) + { + fifo_timing = fifo_cycles_h40; + slots = 18 * (cycles / MCYCLES_PER_LINE); + } + else + { + fifo_timing = fifo_cycles_h32; + slots = 16 * (cycles / MCYCLES_PER_LINE); + } + + /* number of access slots within current line */ + cycles = cycles % MCYCLES_PER_LINE; + while (fifo_timing[count] <= cycles) + { + count++; + } + + /* number of processed FIFO entries since last access */ + slots = (slots + count - fifo_slots) >> fifo_byte_access; + + if (slots > 0) + { + /* process FIFO entries */ + fifo_write_cnt -= slots; + + /* Clear FIFO full flag */ + status &= 0xFEFF; + + if (fifo_write_cnt <= 0) + { + /* No more FIFO entries */ + fifo_write_cnt = 0; + + /* Set FIFO empty flag */ + status |= 0x200; + } + + /* Update FIFO access slot counter */ + fifo_slots += (slots << fifo_byte_access); + } + + /* next FIFO update cycle */ + fifo_cycles = mcycles_vdp + fifo_timing[count | fifo_byte_access]; +} + + +/*--------------------------------------------------------------------------*/ +/* Internal 16-bit data bus access function (Mode 5 only) */ +/*--------------------------------------------------------------------------*/ +static void vdp_bus_w(unsigned int data) +{ + /* write data to next FIFO entry */ + fifo[fifo_idx] = data; + + /* increment FIFO write pointer */ + fifo_idx = (fifo_idx + 1) & 3; + + /* Check destination code (CD0-CD3) */ + switch (code & 0x0F) + { + case 0x01: /* VRAM */ + { + /* VRAM address */ + int index = addr & 0xFFFE; + + /* Pointer to VRAM */ + uint16 *p = (uint16 *)&vram[index]; + + /* Byte-swap data if A0 is set */ + if (addr & 1) + { + data = ((data >> 8) | (data << 8)) & 0xFFFF; + } + + /* Intercept writes to Sprite Attribute Table */ + if ((index & sat_base_mask) == satb) + { + /* Update internal SAT */ + *(uint16 *) &sat[index & sat_addr_mask] = data; + } + + /* Only write unique data to VRAM */ + if (data != *p) + { + int name; + + /* Write data to VRAM */ + *p = data; + + /* Update pattern cache */ + MARK_BG_DIRTY (index); + } + +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] VRAM 0x%x write -> 0x%x (%x)\n", v_counter, m68k.cycles/MCYCLES_PER_LINE-1, m68k.cycles, m68k.cycles%MCYCLES_PER_LINE, addr, data, m68k_get_reg(M68K_REG_PC)); +#endif + break; + } + + case 0x03: /* CRAM */ + { + /* Pointer to CRAM 9-bit word */ + uint16 *p = (uint16 *)&cram[addr & 0x7E]; + + /* Pack 16-bit bus data (BBB0GGG0RRR0) to 9-bit CRAM data (BBBGGGRRR) */ + data = ((data & 0xE00) >> 3) | ((data & 0x0E0) >> 2) | ((data & 0x00E) >> 1); + + /* Check if CRAM data is being modified */ + if (data != *p) + { + /* CRAM index (64 words) */ + int index = (addr >> 1) & 0x3F; + + /* Write CRAM data */ + *p = data; + + /* Color entry 0 of each palette is never displayed (transparent pixel) */ + if (index & 0x0F) + { + /* Update color palette */ + color_update_m5(index, data); + } + + /* Update backdrop color */ + if (index == border) + { + color_update_m5(0x00, data); + } + + /* CRAM modified during HBLANK (Striker, Zero the Kamikaze, etc) */ + if ((v_counter < bitmap.viewport.h) && (reg[1]& 0x40) && (m68k.cycles <= (mcycles_vdp + 860))) + { + /* Remap current line */ + remap_line(v_counter); + } + } +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] CRAM 0x%x write -> 0x%x (%x)\n", v_counter, m68k.cycles/MCYCLES_PER_LINE-1, m68k.cycles, m68k.cycles%MCYCLES_PER_LINE, addr, data, m68k_get_reg(M68K_REG_PC)); +#endif + break; + } + + case 0x05: /* VSRAM */ + { + *(uint16 *)&vsram[addr & 0x7E] = data; + + /* 2-cell Vscroll mode */ + if (reg[11] & 0x04) + { + /* VSRAM writes during HBLANK (Adventures of Batman & Robin) */ + if ((v_counter < bitmap.viewport.h) && (reg[1] & 0x40) && (m68k.cycles <= (mcycles_vdp + 860))) + { + /* Remap current line */ + render_line(v_counter); + } + } +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] VSRAM 0x%x write -> 0x%x (%x)\n", v_counter, m68k.cycles/MCYCLES_PER_LINE-1, m68k.cycles, m68k.cycles%MCYCLES_PER_LINE, addr, data, m68k_get_reg(M68K_REG_PC)); +#endif + break; + } + + default: + { + /* add some delay until 68k periodical wait-states are accurately emulated ("Clue", "Microcosm") */ + m68k.cycles += 2; +#ifdef LOGERROR + error("[%d(%d)][%d(%d)] Invalid (%d) 0x%x write -> 0x%x (%x)\n", v_counter, m68k.cycles/MCYCLES_PER_LINE-1, m68k.cycles, m68k.cycles%MCYCLES_PER_LINE, code, addr, data, m68k_get_reg(M68K_REG_PC)); +#endif + break; + } + } + + /* Increment address register */ + addr += reg[15]; +} + + +/*--------------------------------------------------------------------------*/ +/* 68k bus interface (Mega Drive VDP only) */ +/*--------------------------------------------------------------------------*/ + +static void vdp_68k_data_w_m4(unsigned int data) +{ + /* Clear pending flag */ + pending = 0; + + /* Restricted VDP writes during active display */ + if (!(status & 8) && (reg[1] & 0x40)) + { + /* Update VDP FIFO */ + vdp_fifo_update(m68k.cycles); + + /* Clear FIFO empty flag */ + status &= 0xFDFF; + + /* up to 4 words can be stored */ + if (fifo_write_cnt < 4) + { + /* Increment FIFO counter */ + fifo_write_cnt++; + + /* Set FIFO full flag if 4 words are stored */ + status |= ((fifo_write_cnt & 4) << 6); + } + else + { + /* CPU is halted until next FIFO entry processing */ + m68k.cycles = fifo_cycles; + + /* Update FIFO access slot counter */ + fifo_slots = fifo_slots + 1 + fifo_byte_access; + } + } + + /* Check destination code */ + if (code & 0x02) + { + /* CRAM index (32 words) */ + int index = addr & 0x1F; + + /* Pointer to CRAM 9-bit word */ + uint16 *p = (uint16 *)&cram[index << 1]; + + /* Pack 16-bit data (xxx000BBGGRR) to 9-bit CRAM data (xxxBBGGRR) */ + data = ((data & 0xE00) >> 3) | (data & 0x3F); + + /* Check if CRAM data is being modified */ + if (data != *p) + { + /* Write CRAM data */ + *p = data; + + /* Update color palette */ + color_update_m4(index, data); + + /* Update backdrop color */ + if (index == (0x10 | (border & 0x0F))) + { + color_update_m4(0x40, data); + } + } + } + else + { + /* VRAM address (interleaved format) */ + int index = ((addr << 1) & 0x3FC) | ((addr & 0x200) >> 8) | (addr & 0x3C00); + + /* Pointer to VRAM */ + uint16 *p = (uint16 *)&vram[index]; + + /* Byte-swap data if A0 is set */ + if (addr & 1) + { + data = ((data >> 8) | (data << 8)) & 0xFFFF; + } + + /* Only write unique data to VRAM */ + if (data != *p) + { + int name; + + /* Write data to VRAM */ + *p = data; + + /* Update the pattern cache */ + MARK_BG_DIRTY (index); + } + } + + /* Increment address register (TODO: check how address is incremented in Mode 4) */ + addr += (reg[15] + 1); +} + +static void vdp_68k_data_w_m5(unsigned int data) +{ + /* Clear pending flag */ + pending = 0; + + /* Restricted VDP writes during active display */ + if (!(status & 8) && (reg[1] & 0x40)) + { + /* Update VDP FIFO */ + vdp_fifo_update(m68k.cycles); + + /* Clear FIFO empty flag */ + status &= 0xFDFF; + + /* up to 4 words can be stored */ + if (fifo_write_cnt < 4) + { + /* Increment FIFO counter */ + fifo_write_cnt++; + + /* Set FIFO full flag if 4 words are stored */ + status |= ((fifo_write_cnt & 4) << 6); + } + else + { + /* CPU is halted until next FIFO entry processing (Chaos Engine / Soldiers of Fortune, Double Clutch, Titan Overdrive Demo) */ + m68k.cycles = fifo_cycles; + + /* Update FIFO access slot counter */ + fifo_slots += (1 + fifo_byte_access); + } + } + + /* Write data */ + vdp_bus_w(data); + + /* Check if DMA Fill is pending */ + if (dmafill) + { + /* Clear DMA Fill pending flag */ + dmafill = 0; + + /* DMA length */ + dma_length = (reg[20] << 8) | reg[19]; + + /* Zero DMA length (pre-decrementing counter) */ + if (!dma_length) + { + dma_length = 0x10000; + } + + /* Trigger DMA */ + vdp_dma_update(m68k.cycles); + } +} + +static unsigned int vdp_68k_data_r_m4(void) +{ + /* VRAM address (interleaved format) */ + int index = ((addr << 1) & 0x3FC) | ((addr & 0x200) >> 8) | (addr & 0x3C00); + + /* Clear pending flag */ + pending = 0; + + /* Increment address register (TODO: check how address is incremented in Mode 4) */ + addr += (reg[15] + 1); + + /* Read VRAM data */ + return *(uint16 *) &vram[index]; +} + +static unsigned int vdp_68k_data_r_m5(void) +{ + uint16 data = 0; + + /* Clear pending flag */ + pending = 0; + + /* Check destination code (CD0-CD3) & CD4 */ + switch (code & 0x1F) + { + case 0x00: + { + /* read two bytes from VRAM */ + data = *(uint16 *)&vram[addr & 0xFFFE]; + +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] VRAM 0x%x read -> 0x%x (%x)\n", v_counter, m68k.cycles/MCYCLES_PER_LINE-1, m68k.cycles, m68k.cycles%MCYCLES_PER_LINE, addr, data, m68k_get_reg(M68K_REG_PC)); +#endif + break; + } + + case 0x04: + { + /* VSRAM index */ + int index = addr & 0x7E; + + /* Check against VSRAM max size (80 x 11-bits) */ + if (index >= 0x50) + { + /* Wrap to address 0 (TODO: check if still true with Genesis 3 model) */ + index = 0; + } + + /* Read 11-bit word from VSRAM */ + data = *(uint16 *)&vsram[index] & 0x7FF; + + /* Unused bits are set using data from next available FIFO entry */ + data |= (fifo[fifo_idx] & ~0x7FF); + +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] VSRAM 0x%x read -> 0x%x (%x)\n", v_counter, m68k.cycles/MCYCLES_PER_LINE-1, m68k.cycles, m68k.cycles%MCYCLES_PER_LINE, addr, data, m68k_get_reg(M68K_REG_PC)); +#endif + break; + } + + case 0x08: + { + /* Read 9-bit word from CRAM */ + data = *(uint16 *)&cram[addr & 0x7E]; + + /* Unpack 9-bit CRAM data (BBBGGGRRR) to 16-bit bus data (BBB0GGG0RRR0) */ + data = ((data & 0x1C0) << 3) | ((data & 0x038) << 2) | ((data & 0x007) << 1); + + /* Unused bits are set using data from next available FIFO entry */ + data |= (fifo[fifo_idx] & ~0xEEE); + +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] CRAM 0x%x read -> 0x%x (%x)\n", v_counter, m68k.cycles/MCYCLES_PER_LINE-1, m68k.cycles, m68k.cycles%MCYCLES_PER_LINE, addr, data, m68k_get_reg(M68K_REG_PC)); +#endif + break; + } + + case 0x0c: /* undocumented 8-bit VRAM read */ + { + /* Read one byte from VRAM adjacent address */ + data = READ_BYTE(vram, addr ^ 1); + + /* Unused bits are set using data from next available FIFO entry */ + data |= (fifo[fifo_idx] & ~0xFF); + +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] 8-bit VRAM 0x%x read -> 0x%x (%x)\n", v_counter, m68k.cycles/MCYCLES_PER_LINE-1, m68k.cycles, m68k.cycles%MCYCLES_PER_LINE, addr, data, m68k_get_reg(M68K_REG_PC)); +#endif + break; + } + + default: + { + /* Invalid code value (normally locks VDP, hard reset required) */ +#ifdef LOGERROR + error("[%d(%d)][%d(%d)] Invalid (%d) 0x%x read (%x)\n", v_counter, m68k.cycles/MCYCLES_PER_LINE-1, m68k.cycles, m68k.cycles%MCYCLES_PER_LINE, code, addr, m68k_get_reg(M68K_REG_PC)); +#endif + break; + } + } + + /* Increment address register */ + addr += reg[15]; + + /* Return data */ + return data; +} + + +/*--------------------------------------------------------------------------*/ +/* Z80 bus interface (Mega Drive VDP in Master System compatibility mode) */ +/*--------------------------------------------------------------------------*/ + +static void vdp_z80_data_w_m4(unsigned int data) +{ + /* Clear pending flag */ + pending = 0; + + /* Check destination code */ + if (code & 0x02) + { + /* CRAM index (32 words) */ + int index = addr & 0x1F; + + /* Pointer to CRAM word */ + uint16 *p = (uint16 *)&cram[index << 1]; + + /* Check if CRAM data is being modified */ + if (data != *p) + { + /* Write CRAM data */ + *p = data; + + /* Update color palette */ + color_update_m4(index, data); + + /* Update backdrop color */ + if (index == (0x10 | (border & 0x0F))) + { + color_update_m4(0x40, data); + } + } + } + else + { + /* VRAM address */ + int index = addr & 0x3FFF; + + /* Only write unique data to VRAM */ + if (data != vram[index]) + { + int name; + + /* Write data */ + vram[index] = data; + + /* Update pattern cache */ + MARK_BG_DIRTY(index); + } + } + + /* Increment address register (TODO: check how address is incremented in Mode 4) */ + addr += (reg[15] + 1); +} + +static void vdp_z80_data_w_m5(unsigned int data) +{ + /* Clear pending flag */ + pending = 0; + + /* Push byte into FIFO */ + fifo[fifo_idx] = data << 8; + fifo_idx = (fifo_idx + 1) & 3; + + /* Check destination code (CD0-CD3) */ + switch (code & 0x0F) + { + case 0x01: /* VRAM */ + { + /* VRAM address (write low byte to even address & high byte to odd address) */ + int index = addr ^ 1; + + /* Intercept writes to Sprite Attribute Table */ + if ((index & sat_base_mask) == satb) + { + /* Update internal SAT */ + WRITE_BYTE(sat, index & sat_addr_mask, data); + } + + /* Only write unique data to VRAM */ + if (data != READ_BYTE(vram, index)) + { + int name; + + /* Write data */ + WRITE_BYTE(vram, index, data); + + /* Update pattern cache */ + MARK_BG_DIRTY (index); + } + break; + } + + case 0x03: /* CRAM */ + { + /* Pointer to CRAM word */ + uint16 *p = (uint16 *)&cram[addr & 0x7E]; + + /* Pack 8-bit value into 9-bit CRAM data */ + if (addr & 1) + { + /* Write high byte (0000BBB0 -> BBBxxxxxx) */ + data = (*p & 0x3F) | ((data & 0x0E) << 5); + } + else + { + /* Write low byte (GGG0RRR0 -> xxxGGGRRR) */ + data = (*p & 0x1C0) | ((data & 0x0E) >> 1)| ((data & 0xE0) >> 2); + } + + /* Check if CRAM data is being modified */ + if (data != *p) + { + /* CRAM index (64 words) */ + int index = (addr >> 1) & 0x3F; + + /* Write CRAM data */ + *p = data; + + /* Color entry 0 of each palette is never displayed (transparent pixel) */ + if (index & 0x0F) + { + /* Update color palette */ + color_update_m5(index, data); + } + + /* Update backdrop color */ + if (index == border) + { + color_update_m5(0x00, data); + } + } + break; + } + + case 0x05: /* VSRAM */ + { + /* Write low byte to even address & high byte to odd address */ + WRITE_BYTE(vsram, (addr & 0x7F) ^ 1, data); + break; + } + } + + /* Increment address register */ + addr += reg[15]; + + /* Check if DMA Fill is pending */ + if (dmafill) + { + /* Clear DMA Fill pending flag */ + dmafill = 0; + + /* DMA length */ + dma_length = (reg[20] << 8) | reg[19]; + + /* Zero DMA length (pre-decrementing counter) */ + if (!dma_length) + { + dma_length = 0x10000; + } + + /* Trigger DMA */ + vdp_dma_update(Z80.cycles); + } +} + +static unsigned int vdp_z80_data_r_m4(void) +{ + /* Read buffer */ + unsigned int data = fifo[0]; + + /* Clear pending flag */ + pending = 0; + + /* Process next read */ + fifo[0] = vram[addr & 0x3FFF]; + + /* Increment address register (TODO: check how address is incremented in Mode 4) */ + addr += (reg[15] + 1); + + /* Return data */ + return data; +} + +static unsigned int vdp_z80_data_r_m5(void) +{ + unsigned int data = 0; + + /* Clear pending flag */ + pending = 0; + + /* Check destination code (CD0-CD3) & CD4 */ + switch (code & 0x1F) + { + case 0x00: /* VRAM */ + { + /* Return low byte from even address & high byte from odd address */ + data = READ_BYTE(vram, addr ^ 1); + break; + } + + case 0x04: /* VSRAM */ + { + /* Return low byte from even address & high byte from odd address */ + data = READ_BYTE(vsram, (addr & 0x7F) ^ 1); + break; + } + + case 0x08: /* CRAM */ + { + /* Read CRAM data */ + data = *(uint16 *)&cram[addr & 0x7E]; + + /* Unpack 9-bit CRAM data (BBBGGGRRR) to 16-bit data (BBB0GGG0RRR0) */ + data = ((data & 0x1C0) << 3) | ((data & 0x038) << 2) | ((data & 0x007) << 1); + + /* Return low byte from even address & high byte from odd address */ + if (addr & 1) + { + data = data >> 8; + } + + data &= 0xFF; + break; + } + } + + /* Increment address register */ + addr += reg[15]; + + /* Return data */ + return data; +} + + +/*-----------------------------------------------------------------------------*/ +/* Z80 bus interface (Master System, Game Gear & SG-1000 VDP) */ +/*-----------------------------------------------------------------------------*/ + +static void vdp_z80_data_w_ms(unsigned int data) +{ + /* Clear pending flag */ + pending = 0; + + if (code < 3) + { + int index; + + /* Check if we are already on next line */ + int line = (lines_per_frame + (Z80.cycles / MCYCLES_PER_LINE) - 1) % lines_per_frame; + if ((line > v_counter) && (line < bitmap.viewport.h) && !(work_ram[0x1ffb] & cart.special)) + { + /* Render next line */ + v_counter = line; + render_line(line); + } + + /* VRAM address */ + index = addr & 0x3FFF; + + /* VRAM write */ + if (data != vram[index]) + { + int name; + vram[index] = data; + MARK_BG_DIRTY(index); + } + +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] VRAM 0x%x write -> 0x%x (%x)\n", v_counter, Z80.cycles/MCYCLES_PER_LINE-1, Z80.cycles, Z80.cycles%MCYCLES_PER_LINE, index, data, Z80.pc.w.l); +#endif + } + else + { + /* CRAM address */ + int index = addr & 0x1F; + + /* Pointer to CRAM word */ + uint16 *p = (uint16 *)&cram[index << 1]; + + /* Check if CRAM data is being modified */ + if (data != *p) + { + /* Write CRAM data */ + *p = data; + + /* Update color palette */ + color_update_m4(index, data); + + /* Update backdrop color */ + if (index == (0x10 | (border & 0x0F))) + { + color_update_m4(0x40, data); + } + } +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] CRAM 0x%x write -> 0x%x (%x)\n", v_counter, Z80.cycles/MCYCLES_PER_LINE-1, Z80.cycles, Z80.cycles%MCYCLES_PER_LINE, addr, data, Z80.pc.w.l); +#endif + } + + /* Update read buffer */ + fifo[0] = data; + + /* Update address register */ + addr++; +} + +static void vdp_z80_data_w_gg(unsigned int data) +{ + /* Clear pending flag */ + pending = 0; + + if (code < 3) + { + int index; + + /* Check if we are already on next line*/ + int line = (lines_per_frame + (Z80.cycles / MCYCLES_PER_LINE) - 1) % lines_per_frame; + if ((line > v_counter) && (line < bitmap.viewport.h) && !(work_ram[0x1ffb] & cart.special)) + { + /* Render next line */ + v_counter = line; + render_line(line); + } + + /* VRAM address */ + index = addr & 0x3FFF; + + /* VRAM write */ + if (data != vram[index]) + { + int name; + vram[index] = data; + MARK_BG_DIRTY(index); + } +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] VRAM 0x%x write -> 0x%x (%x)\n", v_counter, Z80.cycles/MCYCLES_PER_LINE-1, Z80.cycles, Z80.cycles%MCYCLES_PER_LINE, index, data, Z80.pc.w.l); +#endif + } + else + { + if (addr & 1) + { + /* Pointer to CRAM word */ + uint16 *p = (uint16 *)&cram[addr & 0x3E]; + + /* 12-bit data word */ + data = (data << 8) | cached_write; + + /* Check if CRAM data is being modified */ + if (data != *p) + { + /* Color index (0-31) */ + int index = (addr >> 1) & 0x1F; + + /* Write CRAM data */ + *p = data; + + /* Update color palette */ + color_update_m4(index, data); + + /* Update backdrop color */ + if (index == (0x10 | (border & 0x0F))) + { + color_update_m4(0x40, data); + } + } + } + else + { + /* Latch LSB */ + cached_write = data; + } +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] CRAM 0x%x write -> 0x%x (%x)\n", v_counter, Z80.cycles/MCYCLES_PER_LINE-1, Z80.cycles, Z80.cycles%MCYCLES_PER_LINE, addr, data, Z80.pc.w.l); +#endif + } + + /* Update read buffer */ + fifo[0] = data; + + /* Update address register */ + addr++; +} + +static void vdp_z80_data_w_sg(unsigned int data) +{ + /* VRAM address */ + int index = addr & 0x3FFF; + + /* Clear pending flag */ + pending = 0; + + /* 4K address decoding (cf. tms9918a.txt) */ + if (!(reg[1] & 0x80)) + { + index = (index & 0x203F) | ((index >> 6) & 0x40) | ((index << 1) & 0x1F80); + } + + /* VRAM write */ + vram[index] = data; + + /* Update address register */ + addr++; + +#ifdef LOGVDP + error("[%d(%d)][%d(%d)] VRAM 0x%x write -> 0x%x (%x)\n", v_counter, Z80.cycles/MCYCLES_PER_LINE-1, Z80.cycles, Z80.cycles%MCYCLES_PER_LINE, index, data, Z80.pc.w.l); +#endif +} + +/*--------------------------------------------------------------------------*/ +/* DMA operations (Mega Drive VDP only) */ +/*--------------------------------------------------------------------------*/ + +/* DMA from 68K bus: $000000-$7FFFFF (external area) */ +static void vdp_dma_68k_ext(unsigned int length) +{ + uint16 data; + + /* 68k bus source address */ + uint32 source = (reg[23] << 17) | (dma_src << 1); + + do + { + /* Read data word from 68k bus */ + if (m68k.memory_map[source>>16].read16) + { + data = m68k.memory_map[source>>16].read16(source); + } + else + { + data = *(uint16 *)(m68k.memory_map[source>>16].base + (source & 0xFFFF)); + } + + /* Increment source address */ + source += 2; + + /* 128k DMA window */ + source = (reg[23] << 17) | (source & 0x1FFFF); + + /* Write data word to VRAM, CRAM or VSRAM */ + vdp_bus_w(data); + } + while (--length); + + /* Update DMA source address */ + dma_src = (source >> 1) & 0xffff; +} + +/* DMA from 68K bus: $800000-$FFFFFF (internal area) except I/O area */ +static void vdp_dma_68k_ram(unsigned int length) +{ + uint16 data; + + /* 68k bus source address */ + uint32 source = (reg[23] << 17) | (dma_src << 1); + + do + { + /* access Work-RAM by default */ + data = *(uint16 *)(work_ram + (source & 0xFFFF)); + + /* Increment source address */ + source += 2; + + /* 128k DMA window */ + source = (reg[23] << 17) | (source & 0x1FFFF); + + /* Write data word to VRAM, CRAM or VSRAM */ + vdp_bus_w(data); + } + while (--length); + + /* Update DMA source address */ + dma_src = (source >> 1) & 0xffff; +} + +/* DMA from 68K bus: $A00000-$A1FFFF (I/O area) specific */ +static void vdp_dma_68k_io(unsigned int length) +{ + uint16 data; + + /* 68k bus source address */ + uint32 source = (reg[23] << 17) | (dma_src << 1); + + do + { + /* Z80 area */ + if (source <= 0xA0FFFF) + { + /* Return $FFFF only when the Z80 isn't hogging the Z-bus. + (e.g. Z80 isn't reset and 68000 has the bus) */ + data = ((zstate ^ 3) ? *(uint16 *)(work_ram + (source & 0xFFFF)) : 0xFFFF); + } + + /* The I/O chip and work RAM try to drive the data bus which results + in both values being combined in random ways when read. + We return the I/O chip values which seem to have precedence, */ + else if (source <= 0xA1001F) + { + data = io_68k_read((source >> 1) & 0x0F); + data = (data << 8 | data); + } + + /* All remaining locations access work RAM */ + else + { + data = *(uint16 *)(work_ram + (source & 0xFFFF)); + } + + /* Increment source address */ + source += 2; + + /* 128k DMA window */ + source = (reg[23] << 17) | (source & 0x1FFFF); + + /* Write data to VRAM, CRAM or VSRAM */ + vdp_bus_w(data); + } + while (--length); + + /* Update DMA source address */ + dma_src = (source >> 1) & 0xffff; +} + +/* VRAM Copy */ +static void vdp_dma_copy(unsigned int length) +{ + /* CD4 should be set (CD0-CD3 ignored) otherwise VDP locks (hard reset needed) */ + if (code & 0x10) + { + int name; + uint8 data; + + /* VRAM source address */ + uint16 source = dma_src; + + do + { + /* Read byte from adjacent VRAM source address */ + data = READ_BYTE(vram, source ^ 1); + + /* Intercept writes to Sprite Attribute Table */ + if ((addr & sat_base_mask) == satb) + { + /* Update internal SAT */ + WRITE_BYTE(sat, (addr & sat_addr_mask) ^ 1, data); + } + + /* Write byte to adjacent VRAM destination address */ + WRITE_BYTE(vram, addr ^ 1, data); + + /* Update pattern cache */ + MARK_BG_DIRTY(addr); + + /* Increment VRAM source address */ + source++; + + /* Increment VRAM destination address */ + addr += reg[15]; + } + while (--length); + + /* Update DMA source address */ + dma_src = source; + } +} + +/* DMA Fill */ +static void vdp_dma_fill(unsigned int length) +{ + /* Check destination code (CD0-CD3) */ + switch (code & 0x0F) + { + case 0x01: /* VRAM */ + { + int name; + + /* Get source data from last written FIFO entry */ + uint8 data = fifo[(fifo_idx+3)&3] >> 8; + + do + { + /* Intercept writes to Sprite Attribute Table */ + if ((addr & sat_base_mask) == satb) + { + /* Update internal SAT */ + WRITE_BYTE(sat, (addr & sat_addr_mask) ^ 1, data); + } + + /* Write byte to adjacent VRAM address */ + WRITE_BYTE(vram, addr ^ 1, data); + + /* Update pattern cache */ + MARK_BG_DIRTY (addr); + + /* Increment VRAM address */ + addr += reg[15]; + } + while (--length); + break; + } + + case 0x03: /* CRAM */ + { + /* Get source data from next available FIFO entry */ + uint16 data = fifo[fifo_idx]; + + /* Pack 16-bit bus data (BBB0GGG0RRR0) to 9-bit CRAM data (BBBGGGRRR) */ + data = ((data & 0xE00) >> 3) | ((data & 0x0E0) >> 2) | ((data & 0x00E) >> 1); + + do + { + /* Pointer to CRAM 9-bit word */ + uint16 *p = (uint16 *)&cram[addr & 0x7E]; + + /* Check if CRAM data is being modified */ + if (data != *p) + { + /* CRAM index (64 words) */ + int index = (addr >> 1) & 0x3F; + + /* Write CRAM data */ + *p = data; + + /* Color entry 0 of each palette is never displayed (transparent pixel) */ + if (index & 0x0F) + { + /* Update color palette */ + color_update_m5(index, data); + } + + /* Update backdrop color */ + if (index == border) + { + color_update_m5(0x00, data); + } + } + + /* Increment CRAM address */ + addr += reg[15]; + } + while (--length); + break; + } + + case 0x05: /* VSRAM */ + { + /* Get source data from next available FIFO entry */ + uint16 data = fifo[fifo_idx]; + + do + { + /* Write VSRAM data */ + *(uint16 *)&vsram[addr & 0x7E] = data; + + /* Increment VSRAM address */ + addr += reg[15]; + } + while (--length); + break; + } + + default: + { + /* invalid destination does nothing (Williams Greatest Hits after soft reset) */ + + /* address is still incremented */ + addr += reg[15] * length; + } + } +} diff --git a/genplus-gx/core/vdp_ctrl.h b/genplus-gx/core/vdp_ctrl.h new file mode 100644 index 0000000000..8a8ee8d7df --- /dev/null +++ b/genplus-gx/core/vdp_ctrl.h @@ -0,0 +1,105 @@ +/*************************************************************************************** + * Genesis Plus + * Video Display Processor (68k & Z80 CPU interface) + * + * Support for SG-1000, Master System (315-5124 & 315-5246), Game Gear & Mega Drive VDP + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code) + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _VDP_H_ +#define _VDP_H_ + +/* VDP context */ +extern uint8 reg[0x20]; +extern uint8 sat[0x400]; +extern uint8 vram[0x10000]; +extern uint8 cram[0x80]; +extern uint8 vsram[0x80]; +extern uint8 hint_pending; +extern uint8 vint_pending; +extern uint16 status; +extern uint32 dma_length; + +/* Global variables */ +extern uint16 ntab; +extern uint16 ntbb; +extern uint16 ntwb; +extern uint16 satb; +extern uint16 hscb; +extern uint8 bg_name_dirty[0x800]; +extern uint16 bg_name_list[0x800]; +extern uint16 bg_list_index; +extern uint8 hscroll_mask; +extern uint8 playfield_shift; +extern uint8 playfield_col_mask; +extern uint16 playfield_row_mask; +extern uint8 odd_frame; +extern uint8 im2_flag; +extern uint8 interlaced; +extern uint8 vdp_pal; +extern uint16 v_counter; +extern uint16 vc_max; +extern uint16 vscroll; +extern uint16 lines_per_frame; +extern uint16 max_sprite_pixels; +extern int32 fifo_write_cnt; +extern uint32 fifo_slots; +extern uint32 hvc_latch; +extern const uint8 *hctab; + +/* Function pointers */ +extern void (*vdp_68k_data_w)(unsigned int data); +extern void (*vdp_z80_data_w)(unsigned int data); +extern unsigned int (*vdp_68k_data_r)(void); +extern unsigned int (*vdp_z80_data_r)(void); + +/* Function prototypes */ +extern void vdp_init(void); +extern void vdp_reset(void); +extern int vdp_context_save(uint8 *state); +extern int vdp_context_load(uint8 *state, uint8 version); +extern void vdp_dma_update(unsigned int cycles); +extern void vdp_68k_ctrl_w(unsigned int data); +extern void vdp_z80_ctrl_w(unsigned int data); +extern void vdp_sms_ctrl_w(unsigned int data); +extern void vdp_tms_ctrl_w(unsigned int data); +extern unsigned int vdp_68k_ctrl_r(unsigned int cycles); +extern unsigned int vdp_z80_ctrl_r(unsigned int cycles); +extern unsigned int vdp_hvc_r(unsigned int cycles); +extern void vdp_test_w(unsigned int data); +extern int vdp_68k_irq_ack(int int_level); + +#endif /* _VDP_H_ */ diff --git a/genplus-gx/core/vdp_render.c b/genplus-gx/core/vdp_render.c new file mode 100644 index 0000000000..9496e51ab0 --- /dev/null +++ b/genplus-gx/core/vdp_render.c @@ -0,0 +1,4206 @@ +/*************************************************************************************** + * Genesis Plus + * Video Display Processor (Modes 0, 1, 2, 3, 4 & 5 rendering) + * + * Support for SG-1000, Master System (315-5124 & 315-5246), Game Gear & Mega Drive VDP + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald (original code) + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "md_ntsc.h" +#include "sms_ntsc.h" + +/*** NTSC Filters ***/ +extern md_ntsc_t *md_ntsc; +extern sms_ntsc_t *sms_ntsc; + + +/* Output pixels type*/ +#if defined(USE_8BPP_RENDERING) +#define PIXEL_OUT_T uint8 +#elif defined(USE_32BPP_RENDERING) +#define PIXEL_OUT_T uint32 +#else +#define PIXEL_OUT_T uint16 +#endif + + +/* Pixel priority look-up tables information */ +#define LUT_MAX (6) +#define LUT_SIZE (0x10000) + + +#ifdef ALIGN_LONG +#undef READ_LONG +#undef WRITE_LONG + +INLINE uint32 READ_LONG(void *address) +{ + if ((uint32)address & 3) + { +#ifdef LSB_FIRST /* little endian version */ + return ( *((uint8 *)address) + + (*((uint8 *)address+1) << 8) + + (*((uint8 *)address+2) << 16) + + (*((uint8 *)address+3) << 24) ); +#else /* big endian version */ + return ( *((uint8 *)address+3) + + (*((uint8 *)address+2) << 8) + + (*((uint8 *)address+1) << 16) + + (*((uint8 *)address) << 24) ); +#endif /* LSB_FIRST */ + } + else return *(uint32 *)address; +} + +INLINE void WRITE_LONG(void *address, uint32 data) +{ + if ((uint32)address & 3) + { +#ifdef LSB_FIRST + *((uint8 *)address) = data; + *((uint8 *)address+1) = (data >> 8); + *((uint8 *)address+2) = (data >> 16); + *((uint8 *)address+3) = (data >> 24); +#else + *((uint8 *)address+3) = data; + *((uint8 *)address+2) = (data >> 8); + *((uint8 *)address+1) = (data >> 16); + *((uint8 *)address) = (data >> 24); +#endif /* LSB_FIRST */ + return; + } + else *(uint32 *)address = data; +} + +#endif /* ALIGN_LONG */ + + +/* Draw 2-cell column (8-pixels high) */ +/* + Pattern cache base address: VHN NNNNNNNN NNYYYxxx + with : + x = Pattern Pixel (0-7) + Y = Pattern Row (0-7) + N = Pattern Number (0-2047) from pattern attribute + H = Horizontal Flip bit from pattern attribute + V = Vertical Flip bit from pattern attribute +*/ +#define GET_LSB_TILE(ATTR, LINE) \ + atex = atex_table[(ATTR >> 13) & 7]; \ + src = (uint32 *)&bg_pattern_cache[(ATTR & 0x00001FFF) << 6 | (LINE)]; +#define GET_MSB_TILE(ATTR, LINE) \ + atex = atex_table[(ATTR >> 29) & 7]; \ + src = (uint32 *)&bg_pattern_cache[(ATTR & 0x1FFF0000) >> 10 | (LINE)]; + +/* Draw 2-cell column (16 pixels high) */ +/* + Pattern cache base address: VHN NNNNNNNN NYYYYxxx + with : + x = Pattern Pixel (0-7) + Y = Pattern Row (0-15) + N = Pattern Number (0-1023) + H = Horizontal Flip bit + V = Vertical Flip bit +*/ +#define GET_LSB_TILE_IM2(ATTR, LINE) \ + atex = atex_table[(ATTR >> 13) & 7]; \ + src = (uint32 *)&bg_pattern_cache[((ATTR & 0x000003FF) << 7 | (ATTR & 0x00001800) << 6 | (LINE)) ^ ((ATTR & 0x00001000) >> 6)]; +#define GET_MSB_TILE_IM2(ATTR, LINE) \ + atex = atex_table[(ATTR >> 29) & 7]; \ + src = (uint32 *)&bg_pattern_cache[((ATTR & 0x03FF0000) >> 9 | (ATTR & 0x18000000) >> 10 | (LINE)) ^ ((ATTR & 0x10000000) >> 22)]; + +/* + One column = 2 tiles + Two pattern attributes are written in VRAM as two consecutives 16-bit words: + + P = priority bit + C = color palette (2 bits) + V = Vertical Flip bit + H = Horizontal Flip bit + N = Pattern Number (11 bits) + + (MSB) PCCVHNNN NNNNNNNN (LSB) (MSB) PCCVHNNN NNNNNNNN (LSB) + PATTERN1 PATTERN2 + + Both pattern attributes are read from VRAM as one 32-bit word: + + LIT_ENDIAN: (MSB) PCCVHNNN NNNNNNNN PCCVHNNN NNNNNNNN (LSB) + PATTERN2 PATTERN1 + + BIG_ENDIAN: (MSB) PCCVHNNN NNNNNNNN PCCVHNNN NNNNNNNN (LSB) + PATTERN1 PATTERN2 + + + In line buffers, one pixel = one byte: (msb) 0Pppcccc (lsb) + with: + P = priority bit (from pattern attribute) + p = color palette (from pattern attribute) + c = color data (from pattern cache) + + One pattern = 8 pixels = 8 bytes = two 32-bit writes per pattern +*/ + +#ifdef ALIGN_LONG +#ifdef LSB_FIRST +#define DRAW_COLUMN(ATTR, LINE) \ + GET_LSB_TILE(ATTR, LINE) \ + WRITE_LONG(dst, src[0] | atex); \ + dst++; \ + WRITE_LONG(dst, src[1] | atex); \ + dst++; \ + GET_MSB_TILE(ATTR, LINE) \ + WRITE_LONG(dst, src[0] | atex); \ + dst++; \ + WRITE_LONG(dst, src[1] | atex); \ + dst++; +#define DRAW_COLUMN_IM2(ATTR, LINE) \ + GET_LSB_TILE_IM2(ATTR, LINE) \ + WRITE_LONG(dst, src[0] | atex); \ + dst++; \ + WRITE_LONG(dst, src[1] | atex); \ + dst++; \ + GET_MSB_TILE_IM2(ATTR, LINE) \ + WRITE_LONG(dst, src[0] | atex); \ + dst++; \ + WRITE_LONG(dst, src[1] | atex); \ + dst++; +#else +#define DRAW_COLUMN(ATTR, LINE) \ + GET_MSB_TILE(ATTR, LINE) \ + WRITE_LONG(dst, src[0] | atex); \ + dst++; \ + WRITE_LONG(dst, src[1] | atex); \ + dst++; \ + GET_LSB_TILE(ATTR, LINE) \ + WRITE_LONG(dst, src[0] | atex); \ + dst++; \ + WRITE_LONG(dst, src[1] | atex); \ + dst++; +#define DRAW_COLUMN_IM2(ATTR, LINE) \ + GET_MSB_TILE_IM2(ATTR, LINE) \ + WRITE_LONG(dst, src[0] | atex); \ + dst++; \ + WRITE_LONG(dst, src[1] | atex); \ + dst++; \ + GET_LSB_TILE_IM2(ATTR, LINE) \ + WRITE_LONG(dst, src[0] | atex); \ + dst++; \ + WRITE_LONG(dst, src[1] | atex); \ + dst++; +#endif +#else /* NOT ALIGNED */ +#ifdef LSB_FIRST +#define DRAW_COLUMN(ATTR, LINE) \ + GET_LSB_TILE(ATTR, LINE) \ + *dst++ = (src[0] | atex); \ + *dst++ = (src[1] | atex); \ + GET_MSB_TILE(ATTR, LINE) \ + *dst++ = (src[0] | atex); \ + *dst++ = (src[1] | atex); +#define DRAW_COLUMN_IM2(ATTR, LINE) \ + GET_LSB_TILE_IM2(ATTR, LINE) \ + *dst++ = (src[0] | atex); \ + *dst++ = (src[1] | atex); \ + GET_MSB_TILE_IM2(ATTR, LINE) \ + *dst++ = (src[0] | atex); \ + *dst++ = (src[1] | atex); +#else +#define DRAW_COLUMN(ATTR, LINE) \ + GET_MSB_TILE(ATTR, LINE) \ + *dst++ = (src[0] | atex); \ + *dst++ = (src[1] | atex); \ + GET_LSB_TILE(ATTR, LINE) \ + *dst++ = (src[0] | atex); \ + *dst++ = (src[1] | atex); +#define DRAW_COLUMN_IM2(ATTR, LINE) \ + GET_MSB_TILE_IM2(ATTR, LINE) \ + *dst++ = (src[0] | atex); \ + *dst++ = (src[1] | atex); \ + GET_LSB_TILE_IM2(ATTR, LINE) \ + *dst++ = (src[0] | atex); \ + *dst++ = (src[1] | atex); +#endif +#endif /* ALIGN_LONG */ + +#ifdef ALT_RENDERER +/* Draw background tiles directly using priority look-up table */ +/* SRC_A = layer A rendered pixel line (4 bytes = 4 pixels at once) */ +/* SRC_B = layer B cached pixel line (4 bytes = 4 pixels at once) */ +/* Note: cache address is always aligned so no need to use READ_LONG macro */ +/* This might be faster or slower than original method, depending on */ +/* architecture (x86, PowerPC), cache size, memory access speed, etc... */ + +#ifdef LSB_FIRST +#define DRAW_BG_TILE(SRC_A, SRC_B) \ + *lb++ = table[((SRC_B << 8) & 0xff00) | (SRC_A & 0xff)]; \ + *lb++ = table[(SRC_B & 0xff00) | ((SRC_A >> 8) & 0xff)]; \ + *lb++ = table[((SRC_B >> 8) & 0xff00) | ((SRC_A >> 16) & 0xff)]; \ + *lb++ = table[((SRC_B >> 16) & 0xff00) | ((SRC_A >> 24) & 0xff)]; +#else +#define DRAW_BG_TILE(SRC_A, SRC_B) \ + *lb++ = table[((SRC_B >> 16) & 0xff00) | ((SRC_A >> 24) & 0xff)]; \ + *lb++ = table[((SRC_B >> 8) & 0xff00) | ((SRC_A >> 16) & 0xff)]; \ + *lb++ = table[(SRC_B & 0xff00) | ((SRC_A >> 8) & 0xff)]; \ + *lb++ = table[((SRC_B << 8) & 0xff00) | (SRC_A & 0xff)]; +#endif + +#ifdef ALIGN_LONG +#ifdef LSB_FIRST +#define DRAW_BG_COLUMN(ATTR, LINE, SRC_A, SRC_B) \ + GET_LSB_TILE(ATTR, LINE) \ + SRC_A = READ_LONG((uint32 *)lb); \ + SRC_B = (src[0] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + SRC_A = READ_LONG((uint32 *)lb); \ + SRC_B = (src[1] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + GET_MSB_TILE(ATTR, LINE) \ + SRC_A = READ_LONG((uint32 *)lb); \ + SRC_B = (src[0] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + SRC_A = READ_LONG((uint32 *)lb); \ + SRC_B = (src[1] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) +#define DRAW_BG_COLUMN_IM2(ATTR, LINE, SRC_A, SRC_B) \ + GET_LSB_TILE_IM2(ATTR, LINE) \ + SRC_A = READ_LONG((uint32 *)lb); \ + SRC_B = (src[0] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + SRC_A = READ_LONG((uint32 *)lb); \ + SRC_B = (src[1] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + GET_MSB_TILE_IM2(ATTR, LINE) \ + SRC_A = READ_LONG((uint32 *)lb); \ + SRC_B = (src[0] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + SRC_A = READ_LONG((uint32 *)lb); \ + SRC_B = (src[1] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) +#else +#define DRAW_BG_COLUMN(ATTR, LINE, SRC_A, SRC_B) \ + GET_MSB_TILE(ATTR, LINE) \ + SRC_A = READ_LONG((uint32 *)lb); \ + SRC_B = (src[0] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + SRC_A = READ_LONG((uint32 *)lb); \ + SRC_B = (src[1] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + GET_LSB_TILE(ATTR, LINE) \ + SRC_A = READ_LONG((uint32 *)lb); \ + SRC_B = (src[0] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + SRC_A = READ_LONG((uint32 *)lb); \ + SRC_B = (src[1] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) +#define DRAW_BG_COLUMN_IM2(ATTR, LINE, SRC_A, SRC_B) \ + GET_MSB_TILE_IM2(ATTR, LINE) \ + SRC_A = READ_LONG((uint32 *)lb); \ + SRC_B = (src[0] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + SRC_A = READ_LONG((uint32 *)lb); \ + SRC_B = (src[1] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + GET_LSB_TILE_IM2(ATTR, LINE) \ + SRC_A = READ_LONG((uint32 *)lb); \ + SRC_B = (src[0] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + SRC_A = READ_LONG((uint32 *)lb); \ + SRC_B = (src[1] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) +#endif +#else /* NOT ALIGNED */ +#ifdef LSB_FIRST +#define DRAW_BG_COLUMN(ATTR, LINE, SRC_A, SRC_B) \ + GET_LSB_TILE(ATTR, LINE) \ + SRC_A = *(uint32 *)(lb); \ + SRC_B = (src[0] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + SRC_A = *(uint32 *)(lb); \ + SRC_B = (src[1] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + GET_MSB_TILE(ATTR, LINE) \ + SRC_A = *(uint32 *)(lb); \ + SRC_B = (src[0] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + SRC_A = *(uint32 *)(lb); \ + SRC_B = (src[1] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) +#define DRAW_BG_COLUMN_IM2(ATTR, LINE, SRC_A, SRC_B) \ + GET_LSB_TILE_IM2(ATTR, LINE) \ + SRC_A = *(uint32 *)(lb); \ + SRC_B = (src[0] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + SRC_A = *(uint32 *)(lb); \ + SRC_B = (src[1] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + GET_MSB_TILE_IM2(ATTR, LINE) \ + SRC_A = *(uint32 *)(lb); \ + SRC_B = (src[0] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + SRC_A = *(uint32 *)(lb); \ + SRC_B = (src[1] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) +#else +#define DRAW_BG_COLUMN(ATTR, LINE, SRC_A, SRC_B) \ + GET_MSB_TILE(ATTR, LINE) \ + SRC_A = *(uint32 *)(lb); \ + SRC_B = (src[0] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + SRC_A = *(uint32 *)(lb); \ + SRC_B = (src[1] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + GET_LSB_TILE(ATTR, LINE) \ + SRC_A = *(uint32 *)(lb); \ + SRC_B = (src[0] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + SRC_A = *(uint32 *)(lb); \ + SRC_B = (src[1] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) +#define DRAW_BG_COLUMN_IM2(ATTR, LINE, SRC_A, SRC_B) \ + GET_MSB_TILE_IM2(ATTR, LINE) \ + SRC_A = *(uint32 *)(lb); \ + SRC_B = (src[0] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + SRC_A = *(uint32 *)(lb); \ + SRC_B = (src[1] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + GET_LSB_TILE_IM2(ATTR, LINE) \ + SRC_A = *(uint32 *)(lb); \ + SRC_B = (src[0] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) \ + SRC_A = *(uint32 *)(lb); \ + SRC_B = (src[1] | atex); \ + DRAW_BG_TILE(SRC_A, SRC_B) +#endif +#endif /* ALIGN_LONG */ +#endif /* ALT_RENDERER */ + +#define DRAW_SPRITE_TILE(WIDTH,ATTR,TABLE) \ + for (i=0;i> 10); \ + } \ + } + +#define DRAW_SPRITE_TILE_ACCURATE(WIDTH,ATTR,TABLE) \ + for (i=0;i> 1); \ + status |= 0x20; \ + } \ + } \ + } + +#define DRAW_SPRITE_TILE_ACCURATE_2X(WIDTH,ATTR,TABLE) \ + for (i=0;i> 1); \ + status |= 0x20; \ + } \ + temp &= 0x00FF; \ + temp |= (lb[i+1] << 8); \ + lb[i+1] = TABLE[temp | ATTR]; \ + if ((temp & 0x8000) && !(status & 0x20)) \ + { \ + spr_col = (v_counter << 8) | ((xpos + i + 1 + 13) >> 1); \ + status |= 0x20; \ + } \ + } \ + } + + +/* Pixels conversion macro */ +/* 4-bit color channels are either compressed to 2/3-bit or dithered to 5/6/8-bit equivalents */ +/* 3:3:2 RGB */ +#if defined(USE_8BPP_RENDERING) +#define MAKE_PIXEL(r,g,b) (((r) >> 1) << 5 | ((g) >> 1) << 2 | (b) >> 2) + +/* 5:5:5 RGB */ +#elif defined(USE_15BPP_RENDERING) +#define MAKE_PIXEL(r,g,b) ((r) << 11 | ((r) >> 3) << 10 | (g) << 6 | ((g) >> 3) << 5 | (b) << 1 | (b) >> 3) + +/* 5:6:5 RGB */ +#elif defined(USE_16BPP_RENDERING) +#define MAKE_PIXEL(r,g,b) ((r) << 12 | ((r) >> 3) << 11 | (g) << 7 | ((g) >> 2) << 5 | (b) << 1 | (b) >> 3) + +/* 8:8:8 RGB */ +#elif defined(USE_32BPP_RENDERING) +#define MAKE_PIXEL(r,g,b) ((r) << 20 | (r) << 16 | (g) << 12 | (g) << 8 | (b) << 4 | (b)) +#endif + +/* Window & Plane A clipping */ +static struct clip_t +{ + uint8 left; + uint8 right; + uint8 enable; +} clip[2]; + +/* Pattern attribute (priority + palette bits) expansion table */ +static const uint32 atex_table[] = +{ + 0x00000000, + 0x10101010, + 0x20202020, + 0x30303030, + 0x40404040, + 0x50505050, + 0x60606060, + 0x70707070 +}; + +/* fixed Master System palette for Modes 0,1,2,3 */ +static const uint8 tms_crom[16] = +{ + 0x00, 0x00, 0x08, 0x0C, + 0x10, 0x30, 0x01, 0x3C, + 0x02, 0x03, 0x05, 0x0F, + 0x04, 0x33, 0x15, 0x3F +}; + +/* original SG-1000 palette */ +#if defined(USE_8BPP_RENDERING) +static const uint8 tms_palette[16] = +{ + 0x00, 0x00, 0x39, 0x79, + 0x4B, 0x6F, 0xC9, 0x5B, + 0xE9, 0xED, 0xD5, 0xD9, + 0x35, 0xCE, 0xDA, 0xFF +}; + +#elif defined(USE_15BPP_RENDERING) +static const uint16 tms_palette[16] = +{ + 0x0000, 0x0000, 0x1308, 0x2F6F, + 0x295D, 0x3DDF, 0x6949, 0x23BE, + 0x7D4A, 0x7DEF, 0x6B0A, 0x7330, + 0x12A7, 0x6177, 0x6739, 0x7FFF +}; + +#elif defined(USE_16BPP_RENDERING) +static const uint16 tms_palette[16] = +{ + 0x0000, 0x0000, 0x2648, 0x5ECF, + 0x52BD, 0x7BBE, 0xD289, 0x475E, + 0xF2AA, 0xFBCF, 0xD60A, 0xE670, + 0x2567, 0xC2F7, 0xCE59, 0xFFFF +}; + +#elif defined(USE_32BPP_RENDERING) +static const uint32 tms_palette[16] = +{ + 0x000000, 0x000000, 0x21C842, 0x5EDC78, + 0x5455ED, 0x7D76FC, 0xD4524D, 0x42EBF5, + 0xFC5554, 0xFF7978, 0xD4C154, 0xE6CE80, + 0x21B03B, 0xC95BB4, 0xCCCCCC, 0xFFFFFF +}; +#endif + +/* Cached and flipped patterns */ +static uint8 bg_pattern_cache[0x80000]; + +/* Sprite pattern name offset look-up table (Mode 5) */ +static uint8 name_lut[0x400]; + +/* Bitplane to packed pixel look-up table (Mode 4) */ +static uint32 bp_lut[0x10000]; + +/* Layer priority pixel look-up tables */ +static uint8 lut[LUT_MAX][LUT_SIZE]; + +/* Output pixel data look-up tables*/ +static PIXEL_OUT_T pixel[0x100]; +static PIXEL_OUT_T pixel_lut[3][0x200]; +static PIXEL_OUT_T pixel_lut_m4[0x40]; + +/* Background & Sprite line buffers */ +static uint8 linebuf[2][0x200]; + +/* Sprite limit flag */ +static uint8 spr_ovr; + +/* Sprite parsing lists */ +typedef struct +{ + uint16 ypos; + uint16 xpos; + uint16 attr; + uint16 size; +} object_info_t; + +static object_info_t obj_info[2][20]; + +/* Sprite Counter */ +static uint8 object_count[2]; + +/* Sprite Collision Info */ +uint16 spr_col; + +/* Function pointers */ +void (*render_bg)(int line); +void (*render_obj)(int line); +void (*parse_satb)(int line); +void (*update_bg_pattern_cache)(int index); + + +/*--------------------------------------------------------------------------*/ +/* Sprite pattern name offset look-up table function (Mode 5) */ +/*--------------------------------------------------------------------------*/ + +static void make_name_lut(void) +{ + int vcol, vrow; + int width, height; + int flipx, flipy; + int i; + + for (i = 0; i < 0x400; i += 1) + { + /* Sprite settings */ + vcol = i & 3; + vrow = (i >> 2) & 3; + height = (i >> 4) & 3; + width = (i >> 6) & 3; + flipx = (i >> 8) & 1; + flipy = (i >> 9) & 1; + + if ((vrow > height) || vcol > width) + { + /* Invalid settings (unused) */ + name_lut[i] = -1; + } + else + { + /* Adjust column & row index if sprite is flipped */ + if(flipx) vcol = (width - vcol); + if(flipy) vrow = (height - vrow); + + /* Pattern offset (pattern order is up->down->left->right) */ + name_lut[i] = vrow + (vcol * (height + 1)); + } + } +} + + +/*--------------------------------------------------------------------------*/ +/* Bitplane to packed pixel look-up table function (Mode 4) */ +/*--------------------------------------------------------------------------*/ + +static void make_bp_lut(void) +{ + int x,i,j; + uint32 out; + + /* ---------------------- */ + /* Pattern color encoding */ + /* -------------------------------------------------------------------------*/ + /* 4 byteplanes are required to define one pattern line (8 pixels) */ + /* A single pixel color is coded with 4 bits (c3 c2 c1 c0) */ + /* Each bit is coming from byteplane bits, as explained below: */ + /* pixel 0: c3 = bp3 bit 7, c2 = bp2 bit 7, c1 = bp1 bit 7, c0 = bp0 bit 7 */ + /* pixel 1: c3 = bp3 bit 6, c2 = bp2 bit 6, c1 = bp1 bit 6, c0 = bp0 bit 6 */ + /* ... */ + /* pixel 7: c3 = bp3 bit 0, c2 = bp2 bit 0, c1 = bp1 bit 0, c0 = bp0 bit 0 */ + /* -------------------------------------------------------------------------*/ + + for(i = 0; i < 0x100; i++) + for(j = 0; j < 0x100; j++) + { + out = 0; + for(x = 0; x < 8; x++) + { + /* pixel line data = hh00gg00ff00ee00dd00cc00bb00aa00 (32-bit) */ + /* aa-hh = upper or lower 2-bit values of pixels 0-7 (shifted) */ + out |= (j & (0x80 >> x)) ? (uint32)(8 << (x << 2)) : 0; + out |= (i & (0x80 >> x)) ? (uint32)(4 << (x << 2)) : 0; + } + + /* i = low byte in VRAM (bp0 or bp2) */ + /* j = high byte in VRAM (bp1 or bp3) */ + #ifdef LSB_FIRST + bp_lut[(j << 8) | (i)] = out; + #else + bp_lut[(i << 8) | (j)] = out; + #endif + } +} + + +/*--------------------------------------------------------------------------*/ +/* Layers priority pixel look-up tables functions */ +/*--------------------------------------------------------------------------*/ + +/* Input (bx): d5-d0=color, d6=priority, d7=unused */ +/* Input (ax): d5-d0=color, d6=priority, d7=unused */ +/* Output: d5-d0=color, d6=priority, d7=zero */ +static uint32 make_lut_bg(uint32 bx, uint32 ax) +{ + int bf = (bx & 0x7F); + int bp = (bx & 0x40); + int b = (bx & 0x0F); + + int af = (ax & 0x7F); + int ap = (ax & 0x40); + int a = (ax & 0x0F); + + int c = (ap ? (a ? af : bf) : (bp ? (b ? bf : af) : (a ? af : bf))); + + /* Strip palette & priority bits from transparent pixels */ + if((c & 0x0F) == 0x00) c &= 0x80; + + return (c); +} + +/* Input (bx): d5-d0=color, d6=priority, d7=unused */ +/* Input (sx): d5-d0=color, d6=priority, d7=unused */ +/* Output: d5-d0=color, d6=priority, d7=intensity select (0=half/1=normal) */ +static uint32 make_lut_bg_ste(uint32 bx, uint32 ax) +{ + int bf = (bx & 0x7F); + int bp = (bx & 0x40); + int b = (bx & 0x0F); + + int af = (ax & 0x7F); + int ap = (ax & 0x40); + int a = (ax & 0x0F); + + int c = (ap ? (a ? af : bf) : (bp ? (b ? bf : af) : (a ? af : bf))); + + /* Half intensity when both pixels are low priority */ + c |= ((ap | bp) << 1); + + /* Strip palette & priority bits from transparent pixels */ + if((c & 0x0F) == 0x00) c &= 0x80; + + return (c); +} + +/* Input (bx): d5-d0=color, d6=priority/1, d7=sprite pixel marker */ +/* Input (sx): d5-d0=color, d6=priority, d7=unused */ +/* Output: d5-d0=color, d6=priority, d7=sprite pixel marker */ +static uint32 make_lut_obj(uint32 bx, uint32 sx) +{ + int c; + + int bf = (bx & 0x7F); + int bs = (bx & 0x80); + int sf = (sx & 0x7F); + + if((sx & 0x0F) == 0) return bx; + + c = (bs ? bf : sf); + + /* Strip palette bits from transparent pixels */ + if((c & 0x0F) == 0x00) c &= 0xC0; + + return (c | 0x80); +} + + +/* Input (bx): d5-d0=color, d6=priority, d7=opaque sprite pixel marker */ +/* Input (sx): d5-d0=color, d6=priority, d7=unused */ +/* Output: d5-d0=color, d6=zero/priority, d7=opaque sprite pixel marker */ +static uint32 make_lut_bgobj(uint32 bx, uint32 sx) +{ + int c; + + int bf = (bx & 0x3F); + int bs = (bx & 0x80); + int bp = (bx & 0x40); + int b = (bx & 0x0F); + + int sf = (sx & 0x3F); + int sp = (sx & 0x40); + int s = (sx & 0x0F); + + if(s == 0) return bx; + + /* Previous sprite has higher priority */ + if(bs) return bx; + + c = (sp ? sf : (bp ? (b ? bf : sf) : sf)); + + /* Strip palette & priority bits from transparent pixels */ + if((c & 0x0F) == 0x00) c &= 0x80; + + return (c | 0x80); +} + +/* Input (bx): d5-d0=color, d6=priority, d7=intensity (half/normal) */ +/* Input (sx): d5-d0=color, d6=priority, d7=sprite marker */ +/* Output: d5-d0=color, d6=intensity (half/normal), d7=(double/invalid) */ +static uint32 make_lut_bgobj_ste(uint32 bx, uint32 sx) +{ + int c; + + int bf = (bx & 0x3F); + int bp = (bx & 0x40); + int b = (bx & 0x0F); + int bi = (bx & 0x80) >> 1; + + int sf = (sx & 0x3F); + int sp = (sx & 0x40); + int s = (sx & 0x0F); + int si = sp | bi; + + if(sp) + { + if(s) + { + if((sf & 0x3E) == 0x3E) + { + if(sf & 1) + { + c = (bf | 0x00); + } + else + { + c = (bx & 0x80) ? (bf | 0x80) : (bf | 0x40); + } + } + else + { + if(sf == 0x0E || sf == 0x1E || sf == 0x2E) + { + c = (sf | 0x40); + } + else + { + c = (sf | si); + } + } + } + else + { + c = (bf | bi); + } + } + else + { + if(bp) + { + if(b) + { + c = (bf | bi); + } + else + { + if(s) + { + if((sf & 0x3E) == 0x3E) + { + if(sf & 1) + { + c = (bf | 0x00); + } + else + { + c = (bx & 0x80) ? (bf | 0x80) : (bf | 0x40); + } + } + else + { + if(sf == 0x0E || sf == 0x1E || sf == 0x2E) + { + c = (sf | 0x40); + } + else + { + c = (sf | si); + } + } + } + else + { + c = (bf | bi); + } + } + } + else + { + if(s) + { + if((sf & 0x3E) == 0x3E) + { + if(sf & 1) + { + c = (bf | 0x00); + } + else + { + c = (bx & 0x80) ? (bf | 0x80) : (bf | 0x40); + } + } + else + { + if(sf == 0x0E || sf == 0x1E || sf == 0x2E) + { + c = (sf | 0x40); + } + else + { + c = (sf | si); + } + } + } + else + { + c = (bf | bi); + } + } + } + + if((c & 0x0f) == 0x00) c &= 0xC0; + + return (c); +} + +/* Input (bx): d3-d0=color, d4=palette, d5=priority, d6=zero, d7=sprite pixel marker */ +/* Input (sx): d3-d0=color, d7-d4=zero */ +/* Output: d3-d0=color, d4=palette, d5=zero/priority, d6=zero, d7=sprite pixel marker */ +static uint32 make_lut_bgobj_m4(uint32 bx, uint32 sx) +{ + int c; + + int bf = (bx & 0x3F); + int bs = (bx & 0x80); + int bp = (bx & 0x20); + int b = (bx & 0x0F); + + int s = (sx & 0x0F); + int sf = (s | 0x10); /* force palette bit */ + + /* Transparent sprite pixel */ + if(s == 0) return bx; + + /* Previous sprite has higher priority */ + if(bs) return bx; + + /* note: priority bit is always 0 for Modes 0,1,2,3 */ + c = (bp ? (b ? bf : sf) : sf); + + return (c | 0x80); +} + + +/*--------------------------------------------------------------------------*/ +/* Pixel layer merging function */ +/*--------------------------------------------------------------------------*/ + +INLINE void merge(uint8 *srca, uint8 *srcb, uint8 *dst, uint8 *table, int width) +{ + do + { + *dst++ = table[(*srcb++ << 8) | (*srca++)]; + } + while (--width); +} + + +/*--------------------------------------------------------------------------*/ +/* Pixel color lookup tables initialization */ +/*--------------------------------------------------------------------------*/ + +static void palette_init(void) +{ + int r, g, b, i; + + /************************************************/ + /* Each R,G,B color channel is 4-bit with a */ + /* total of 15 different intensity levels. */ + /* */ + /* Color intensity depends on the mode: */ + /* */ + /* normal : xxx0 (0-14) */ + /* shadow : 0xxx (0-7) */ + /* highlight: 1xxx - 1 (7-14) */ + /* mode4 : xxxx(*) (0-15) */ + /* GG mode : xxxx (0-15) */ + /* */ + /* with x = original CRAM value (2, 3 or 4-bit) */ + /* (*) 2-bit CRAM value is expanded to 4-bit */ + /************************************************/ + + /* Initialize Mode 5 pixel color look-up tables */ + for (i = 0; i < 0x200; i++) + { + /* CRAM 9-bit value (BBBGGGRRR) */ + r = (i >> 0) & 7; + g = (i >> 3) & 7; + b = (i >> 6) & 7; + + /* Convert to output pixel format */ + pixel_lut[0][i] = MAKE_PIXEL(r,g,b); + pixel_lut[1][i] = MAKE_PIXEL(r<<1,g<<1,b<<1); + pixel_lut[2][i] = MAKE_PIXEL(r+7,g+7,b+7); + } + + /* Initialize Mode 4 pixel color look-up table */ + for (i = 0; i < 0x40; i++) + { + /* CRAM 6-bit value (000BBGGRR) */ + r = (i >> 0) & 3; + g = (i >> 2) & 3; + b = (i >> 4) & 3; + + /* Expand to full range & convert to output pixel format */ + pixel_lut_m4[i] = MAKE_PIXEL((r << 2) | r, (g << 2) | g, (b << 2) | b); + } +} + + +/*--------------------------------------------------------------------------*/ +/* Color palette update functions */ +/*--------------------------------------------------------------------------*/ + +void color_update_m4(int index, unsigned int data) +{ + switch (system_hw) + { + case SYSTEM_GG: + { + /* CRAM value (BBBBGGGGRRRR) */ + int r = (data >> 0) & 0x0F; + int g = (data >> 4) & 0x0F; + int b = (data >> 8) & 0x0F; + + /* Convert to output pixel */ + data = MAKE_PIXEL(r,g,b); + break; + } + + case SYSTEM_SG: + { + /* Fixed TMS99xx palette */ + if (index & 0x0F) + { + /* Colors 1-15 */ + data = tms_palette[index & 0x0F]; + } + else + { + /* Backdrop color */ + data = tms_palette[reg[7] & 0x0F]; + } + break; + } + + default: + { + /* Test M4 bit */ + if (!(reg[0] & 0x04)) + { + if (system_hw & SYSTEM_MD) + { + /* Invalid Mode (black screen) */ + data = 0x00; + } + else if (system_hw != SYSTEM_GGMS) + { + /* Fixed CRAM palette */ + if (index & 0x0F) + { + /* Colors 1-15 */ + data = tms_crom[index & 0x0F]; + } + else + { + /* Backdrop color */ + data = tms_crom[reg[7] & 0x0F]; + } + } + } + + /* Mode 4 palette */ + data = pixel_lut_m4[data & 0x3F]; + break; + } + } + + + /* Input pixel: x0xiiiii (normal) or 01000000 (backdrop) */ + if (reg[0] & 0x04) + { + /* Mode 4 */ + pixel[0x00 | index] = data; + pixel[0x20 | index] = data; + pixel[0x80 | index] = data; + pixel[0xA0 | index] = data; + } + else + { + /* TMS99xx modes (palette bit forced to 1 because Game Gear uses CRAM palette #1) */ + if ((index == 0x40) || (index == (0x10 | (reg[7] & 0x0F)))) + { + /* Update backdrop color */ + pixel[0x40] = data; + + /* Update transparent color */ + pixel[0x10] = data; + pixel[0x30] = data; + pixel[0x90] = data; + pixel[0xB0] = data; + } + + if (index & 0x0F) + { + /* update non-transparent colors */ + pixel[0x00 | index] = data; + pixel[0x20 | index] = data; + pixel[0x80 | index] = data; + pixel[0xA0 | index] = data; + } + } +} + +void color_update_m5(int index, unsigned int data) +{ + /* Palette Mode */ + if (!(reg[0] & 0x04)) + { + /* Color value is limited to 00X00X00X */ + data &= 0x49; + } + + if(reg[12] & 0x08) + { + /* Mode 5 (Shadow/Normal/Highlight) */ + pixel[0x00 | index] = pixel_lut[0][data]; + pixel[0x40 | index] = pixel_lut[1][data]; + pixel[0x80 | index] = pixel_lut[2][data]; + } + else + { + /* Mode 5 (Normal) */ + data = pixel_lut[1][data]; + + /* Input pixel: xxiiiiii */ + pixel[0x00 | index] = data; + pixel[0x40 | index] = data; + pixel[0x80 | index] = data; + } +} + + +/*--------------------------------------------------------------------------*/ +/* Background layers rendering functions */ +/*--------------------------------------------------------------------------*/ + +/* Graphics I */ +void render_bg_m0(int line) +{ + uint8 color, pattern; + uint16 name; + + uint8 *lb = &linebuf[0][0x20]; + uint8 *nt = &vram[((reg[2] << 10) & 0x3C00) + ((line & 0xF8) << 2)]; + uint8 *ct = &vram[((reg[3] << 6) & 0x3FC0)]; + uint8 *pg = &vram[((reg[4] << 11) & 0x3800) + (line & 7)]; + + /* 32 x 8 pixels */ + int width = 32; + + do + { + name = *nt++; + color = ct[name >> 3]; + pattern = pg[name << 3]; + + *lb++ = 0x10 | ((color >> (((pattern >> 7) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 6) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 5) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 4) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 3) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 2) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 1) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 0) & 1) << 2)) & 0x0F); + } + while (--width); +} + +/* Text */ +void render_bg_m1(int line) +{ + uint8 pattern; + uint8 color = reg[7]; + + uint8 *lb = &linebuf[0][0x20]; + uint8 *nt = &vram[((reg[2] << 10) & 0x3C00) + ((line >> 3) * 40)]; + uint8 *pg = &vram[((reg[4] << 11) & 0x3800) + (line & 7)]; + + /* 40 x 6 pixels */ + int width = 40; + + /* Left border (8 pixels) */ + memset (lb, 0x40, 8); + lb += 8; + + do + { + pattern = pg[*nt++]; + + *lb++ = 0x10 | ((color >> (((pattern >> 7) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 6) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 5) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 4) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 3) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 2) & 1) << 2)) & 0x0F); + } + while (--width); + + /* Right borders (8 pixels) */ + memset(lb, 0x40, 8); +} + +/* Text + extended PG */ +void render_bg_m1x(int line) +{ + uint8 pattern; + uint8 *pg; + + uint8 color = reg[7]; + + uint8 *lb = &linebuf[0][0x20]; + uint8 *nt = &vram[((reg[2] << 10) & 0x3C00) + ((line >> 3) * 40)]; + + uint16 pg_mask = ~0x3800 ^ (reg[4] << 11); + + /* 40 x 6 pixels */ + int width = 40; + + /* Unused bits used as a mask on TMS99xx & 315-5124 VDP only */ + if (system_hw > SYSTEM_SMS) + { + pg_mask |= 0x1800; + } + + pg = &vram[((0x2000 + ((line & 0xC0) << 5)) & pg_mask) + (line & 7)]; + + /* Left border (8 pixels) */ + memset (lb, 0x40, 8); + lb += 8; + + do + { + pattern = pg[*nt++ << 3]; + + *lb++ = 0x10 | ((color >> (((pattern >> 7) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 6) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 5) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 4) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 3) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 2) & 1) << 2)) & 0x0F); + } + while (--width); + + /* Right borders (8 pixels) */ + memset(lb, 0x40, 8); +} + +/* Graphics II */ +void render_bg_m2(int line) +{ + uint8 color, pattern; + uint16 name; + uint8 *ct, *pg; + + uint8 *lb = &linebuf[0][0x20]; + uint8 *nt = &vram[((reg[2] << 10) & 0x3C00) + ((line & 0xF8) << 2)]; + + uint16 ct_mask = ~0x3FC0 ^ (reg[3] << 6); + uint16 pg_mask = ~0x3800 ^ (reg[4] << 11); + + /* 32 x 8 pixels */ + int width = 32; + + /* Unused bits used as a mask on TMS99xx & 315-5124 VDP only */ + if (system_hw > SYSTEM_SMS) + { + ct_mask |= 0x1FC0; + pg_mask |= 0x1800; + } + + ct = &vram[((0x2000 + ((line & 0xC0) << 5)) & ct_mask) + (line & 7)]; + pg = &vram[((0x2000 + ((line & 0xC0) << 5)) & pg_mask) + (line & 7)]; + + do + { + name = *nt++ << 3 ; + color = ct[name & ct_mask]; + pattern = pg[name]; + + *lb++ = 0x10 | ((color >> (((pattern >> 7) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 6) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 5) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 4) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 3) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 2) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 1) & 1) << 2)) & 0x0F); + *lb++ = 0x10 | ((color >> (((pattern >> 0) & 1) << 2)) & 0x0F); + } + while (--width); +} + +/* Multicolor */ +void render_bg_m3(int line) +{ + uint8 color; + uint16 name; + + uint8 *lb = &linebuf[0][0x20]; + uint8 *nt = &vram[((reg[2] << 10) & 0x3C00) + ((line & 0xF8) << 2)]; + uint8 *pg = &vram[((reg[4] << 11) & 0x3800) + ((line >> 2) & 7)]; + + /* 32 x 8 pixels */ + int width = 32; + + do + { + name = *nt++; + color = pg[name << 3]; + + *lb++ = 0x10 | ((color >> 4) & 0x0F); + *lb++ = 0x10 | ((color >> 4) & 0x0F); + *lb++ = 0x10 | ((color >> 4) & 0x0F); + *lb++ = 0x10 | ((color >> 4) & 0x0F); + *lb++ = 0x10 | ((color >> 0) & 0x0F); + *lb++ = 0x10 | ((color >> 0) & 0x0F); + *lb++ = 0x10 | ((color >> 0) & 0x0F); + *lb++ = 0x10 | ((color >> 0) & 0x0F); + } + while (--width); +} + +/* Multicolor + extended PG */ +void render_bg_m3x(int line) +{ + uint8 color; + uint16 name; + uint8 *pg; + + uint8 *lb = &linebuf[0][0x20]; + uint8 *nt = &vram[((reg[2] << 10) & 0x3C00) + ((line & 0xF8) << 2)]; + + uint16 pg_mask = ~0x3800 ^ (reg[4] << 11); + + /* 32 x 8 pixels */ + int width = 32; + + /* Unused bits used as a mask on TMS99xx & 315-5124 VDP only */ + if (system_hw > SYSTEM_SMS) + { + pg_mask |= 0x1800; + } + + pg = &vram[((0x2000 + ((line & 0xC0) << 5)) & pg_mask) + ((line >> 2) & 7)]; + + do + { + name = *nt++; + color = pg[name << 3]; + + *lb++ = 0x10 | ((color >> 4) & 0x0F); + *lb++ = 0x10 | ((color >> 4) & 0x0F); + *lb++ = 0x10 | ((color >> 4) & 0x0F); + *lb++ = 0x10 | ((color >> 4) & 0x0F); + *lb++ = 0x10 | ((color >> 0) & 0x0F); + *lb++ = 0x10 | ((color >> 0) & 0x0F); + *lb++ = 0x10 | ((color >> 0) & 0x0F); + *lb++ = 0x10 | ((color >> 0) & 0x0F); + } + while (--width); +} + +/* Invalid (2+3/1+2+3) */ +void render_bg_inv(int line) +{ + uint8 color = reg[7]; + + uint8 *lb = &linebuf[0][0x20]; + + /* 40 x 6 pixels */ + int width = 40; + + /* Left border (8 pixels) */ + memset (lb, 0x40, 8); + lb += 8; + + do + { + *lb++ = 0x10 | ((color >> 4) & 0x0F); + *lb++ = 0x10 | ((color >> 4) & 0x0F); + *lb++ = 0x10 | ((color >> 4) & 0x0F); + *lb++ = 0x10 | ((color >> 4) & 0x0F); + *lb++ = 0x10 | ((color >> 0) & 0x0F); + *lb++ = 0x10 | ((color >> 0) & 0x0F); + } + while (--width); + + /* Right borders (8 pixels) */ + memset(lb, 0x40, 8); +} + +/* Mode 4 */ +void render_bg_m4(int line) +{ + int column; + uint16 *nt; + uint32 attr, atex, *src; + + /* 32 x 8 pixels */ + int width = 32; + + /* Horizontal scrolling */ + int index = ((reg[0] & 0x40) && (line < 0x10)) ? 0x100 : reg[0x08]; + int shift = index & 7; + + /* Background line buffer */ + uint32 *dst = (uint32 *)&linebuf[0][0x20 + shift]; + + /* Vertical scrolling */ + int v_line = line + vscroll; + + /* Pattern name table mask */ + uint16 nt_mask = ~0x3C00 ^ (reg[2] << 10); + + /* Unused bits used as a mask on TMS99xx & 315-5124 VDP only */ + if (system_hw > SYSTEM_SMS) + { + nt_mask |= 0x400; + } + + /* Test for extended modes (Master System II & Game gear VDP only) */ + if (bitmap.viewport.h > 192) + { + /* Vertical scroll mask */ + v_line = v_line % 256; + + /* Pattern name Table */ + nt = (uint16 *)&vram[(0x3700 & nt_mask) + ((v_line >> 3) << 6)]; + } + else + { + /* Vertical scroll mask */ + v_line = v_line % 224; + + /* Pattern name Table */ + nt = (uint16 *)&vram[(0x3800 + ((v_line >> 3) << 6)) & nt_mask]; + } + + /* Pattern row index */ + v_line = (v_line & 7) << 3; + + /* Tile column index */ + index = (0x100 - index) >> 3; + + /* Clip left-most column if required */ + if (shift) + { + memset(&linebuf[0][0x20], 0, shift); + index++; + } + + /* Draw tiles */ + for(column = 0; column < width; column++, index++) + { + /* Stop vertical scrolling for rightmost eight tiles */ + if((column == 24) && (reg[0] & 0x80)) + { + /* Clear Pattern name table start address */ + if (bitmap.viewport.h > 192) + { + nt = (uint16 *)&vram[(0x3700 & nt_mask) + ((line >> 3) << 6)]; + } + else + { + nt = (uint16 *)&vram[(0x3800 + ((line >> 3) << 6)) & nt_mask]; + } + + /* Clear Pattern row index */ + v_line = (line & 7) << 3; + } + + /* Read name table attribute word */ + attr = nt[index % width]; +#ifndef LSB_FIRST + attr = (((attr & 0xFF) << 8) | ((attr & 0xFF00) >> 8)); +#endif + + /* Expand priority and palette bits */ + atex = atex_table[(attr >> 11) & 3]; + + /* Cached pattern data line (4 bytes = 4 pixels at once) */ + src = (uint32 *)&bg_pattern_cache[((attr & 0x7FF) << 6) | (v_line)]; + + /* Copy left & right half, adding the attribute bits in */ +#ifdef ALIGN_DWORD + WRITE_LONG(dst, src[0] | atex); + dst++; + WRITE_LONG(dst, src[1] | atex); + dst++; +#else + *dst++ = (src[0] | atex); + *dst++ = (src[1] | atex); +#endif + } +} + +/* Mode 5 */ +#ifndef ALT_RENDERER +void render_bg_m5(int line) +{ + int column; + uint32 atex, atbuf, *src, *dst; + + /* Common data */ + uint32 xscroll = *(uint32 *)&vram[hscb + ((line & hscroll_mask) << 2)]; + uint32 yscroll = *(uint32 *)&vsram[0]; + uint32 pf_col_mask = playfield_col_mask; + uint32 pf_row_mask = playfield_row_mask; + uint32 pf_shift = playfield_shift; + + /* Window & Plane A */ + int a = (reg[18] & 0x1F) << 3; + int w = (reg[18] >> 7) & 1; + + /* Plane B width */ + int start = 0; + int end = bitmap.viewport.w >> 4; + + /* Plane B scroll */ +#ifdef LSB_FIRST + uint32 shift = (xscroll >> 16) & 0x0F; + uint32 index = pf_col_mask + 1 - ((xscroll >> 20) & pf_col_mask); + uint32 v_line = (line + (yscroll >> 16)) & pf_row_mask; +#else + uint32 shift = (xscroll & 0x0F); + uint32 index = pf_col_mask + 1 - ((xscroll >> 4) & pf_col_mask); + uint32 v_line = (line + yscroll) & pf_row_mask; +#endif + + /* Plane B name table */ + uint32 *nt = (uint32 *)&vram[ntbb + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (v_line & 7) << 3; + + if(shift) + { + /* Plane B line buffer */ + dst = (uint32 *)&linebuf[0][0x10 + shift]; + + atbuf = nt[(index - 1) & pf_col_mask]; + DRAW_COLUMN(atbuf, v_line) + } + else + { + /* Plane B line buffer */ + dst = (uint32 *)&linebuf[0][0x20]; + } + + for(column = 0; column < end; column++, index++) + { + atbuf = nt[index & pf_col_mask]; + DRAW_COLUMN(atbuf, v_line) + } + + if (w == (line >= a)) + { + /* Window takes up entire line */ + a = 0; + w = 1; + } + else + { + /* Window and Plane A share the line */ + a = clip[0].enable; + w = clip[1].enable; + } + + /* Plane A */ + if (a) + { + /* Plane A width */ + start = clip[0].left; + end = clip[0].right; + + /* Plane A scroll */ +#ifdef LSB_FIRST + shift = (xscroll & 0x0F); + index = pf_col_mask + start + 1 - ((xscroll >> 4) & pf_col_mask); + v_line = (line + yscroll) & pf_row_mask; +#else + shift = (xscroll >> 16) & 0x0F; + index = pf_col_mask + start + 1 - ((xscroll >> 20) & pf_col_mask); + v_line = (line + (yscroll >> 16)) & pf_row_mask; +#endif + + /* Plane A name table */ + nt = (uint32 *)&vram[ntab + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (v_line & 7) << 3; + + if(shift) + { + /* Plane A line buffer */ + dst = (uint32 *)&linebuf[1][0x10 + shift + (start << 4)]; + + /* Window bug */ + if (start) + { + atbuf = nt[index & pf_col_mask]; + } + else + { + atbuf = nt[(index - 1) & pf_col_mask]; + } + + DRAW_COLUMN(atbuf, v_line) + } + else + { + /* Plane A line buffer */ + dst = (uint32 *)&linebuf[1][0x20 + (start << 4)]; + } + + for(column = start; column < end; column++, index++) + { + atbuf = nt[index & pf_col_mask]; + DRAW_COLUMN(atbuf, v_line) + } + + /* Window width */ + start = clip[1].left; + end = clip[1].right; + } + + /* Window */ + if (w) + { + /* Window name table */ + nt = (uint32 *)&vram[ntwb | ((line >> 3) << (6 + (reg[12] & 1)))]; + + /* Pattern row index */ + v_line = (line & 7) << 3; + + /* Plane A line buffer */ + dst = (uint32 *)&linebuf[1][0x20 + (start << 4)]; + + for(column = start; column < end; column++) + { + atbuf = nt[column]; + DRAW_COLUMN(atbuf, v_line) + } + } + + /* Merge background layers */ + merge(&linebuf[1][0x20], &linebuf[0][0x20], &linebuf[0][0x20], lut[(reg[12] & 0x08) >> 2], bitmap.viewport.w); +} + +void render_bg_m5_vs(int line) +{ + int column; + uint32 atex, atbuf, *src, *dst; + uint32 v_line, *nt; + + /* Common data */ + uint32 xscroll = *(uint32 *)&vram[hscb + ((line & hscroll_mask) << 2)]; + uint32 yscroll = 0; + uint32 pf_col_mask = playfield_col_mask; + uint32 pf_row_mask = playfield_row_mask; + uint32 pf_shift = playfield_shift; + uint32 *vs = (uint32 *)&vsram[0]; + + /* Window & Plane A */ + int a = (reg[18] & 0x1F) << 3; + int w = (reg[18] >> 7) & 1; + + /* Plane B width */ + int start = 0; + int end = bitmap.viewport.w >> 4; + + /* Plane B horizontal scroll */ +#ifdef LSB_FIRST + uint32 shift = (xscroll >> 16) & 0x0F; + uint32 index = pf_col_mask + 1 - ((xscroll >> 20) & pf_col_mask); +#else + uint32 shift = (xscroll & 0x0F); + uint32 index = pf_col_mask + 1 - ((xscroll >> 4) & pf_col_mask); +#endif + + /* Left-most column vertical scrolling when partially shown horizontally (verified on PAL MD2) */ + /* TODO: check on Genesis 3 models since it apparently behaves differently */ + /* In H32 mode, vertical scrolling is disabled, in H40 mode, same value is used for both planes */ + /* See Formula One / Kawasaki Superbike Challenge (H32) & Gynoug / Cutie Suzuki no Ringside Angel (H40) */ + if (reg[12] & 1) + { + yscroll = vs[19] & (vs[19] >> 16); + } + + if(shift) + { + /* Plane B vertical scroll */ + v_line = (line + yscroll) & pf_row_mask; + + /* Plane B name table */ + nt = (uint32 *)&vram[ntbb + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (v_line & 7) << 3; + + /* Plane B line buffer */ + dst = (uint32 *)&linebuf[0][0x10 + shift]; + + atbuf = nt[(index - 1) & pf_col_mask]; + DRAW_COLUMN(atbuf, v_line) + } + else + { + /* Plane B line buffer */ + dst = (uint32 *)&linebuf[0][0x20]; + } + + for(column = 0; column < end; column++, index++) + { + /* Plane B vertical scroll */ +#ifdef LSB_FIRST + v_line = (line + (vs[column] >> 16)) & pf_row_mask; +#else + v_line = (line + vs[column]) & pf_row_mask; +#endif + + /* Plane B name table */ + nt = (uint32 *)&vram[ntbb + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (v_line & 7) << 3; + + atbuf = nt[index & pf_col_mask]; + DRAW_COLUMN(atbuf, v_line) + } + + if (w == (line >= a)) + { + /* Window takes up entire line */ + a = 0; + w = 1; + } + else + { + /* Window and Plane A share the line */ + a = clip[0].enable; + w = clip[1].enable; + } + + /* Plane A */ + if (a) + { + /* Plane A width */ + start = clip[0].left; + end = clip[0].right; + + /* Plane A horizontal scroll */ +#ifdef LSB_FIRST + shift = (xscroll & 0x0F); + index = pf_col_mask + start + 1 - ((xscroll >> 4) & pf_col_mask); +#else + shift = (xscroll >> 16) & 0x0F; + index = pf_col_mask + start + 1 - ((xscroll >> 20) & pf_col_mask); +#endif + + if(shift) + { + /* Plane A vertical scroll */ + v_line = (line + yscroll) & pf_row_mask; + + /* Plane A name table */ + nt = (uint32 *)&vram[ntab + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (v_line & 7) << 3; + + /* Plane A line buffer */ + dst = (uint32 *)&linebuf[1][0x10 + shift + (start << 4)]; + + /* Window bug */ + if (start) + { + atbuf = nt[index & pf_col_mask]; + } + else + { + atbuf = nt[(index - 1) & pf_col_mask]; + } + + DRAW_COLUMN(atbuf, v_line) + } + else + { + /* Plane A line buffer */ + dst = (uint32 *)&linebuf[1][0x20 + (start << 4)]; + } + + for(column = start; column < end; column++, index++) + { + /* Plane A vertical scroll */ +#ifdef LSB_FIRST + v_line = (line + vs[column]) & pf_row_mask; +#else + v_line = (line + (vs[column] >> 16)) & pf_row_mask; +#endif + + /* Plane A name table */ + nt = (uint32 *)&vram[ntab + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (v_line & 7) << 3; + + atbuf = nt[index & pf_col_mask]; + DRAW_COLUMN(atbuf, v_line) + } + + /* Window width */ + start = clip[1].left; + end = clip[1].right; + } + + /* Window */ + if (w) + { + /* Window name table */ + nt = (uint32 *)&vram[ntwb | ((line >> 3) << (6 + (reg[12] & 1)))]; + + /* Pattern row index */ + v_line = (line & 7) << 3; + + /* Plane A line buffer */ + dst = (uint32 *)&linebuf[1][0x20 + (start << 4)]; + + for(column = start; column < end; column++) + { + atbuf = nt[column]; + DRAW_COLUMN(atbuf, v_line) + } + } + + /* Merge background layers */ + merge(&linebuf[1][0x20], &linebuf[0][0x20], &linebuf[0][0x20], lut[(reg[12] & 0x08) >> 2], bitmap.viewport.w); +} + +void render_bg_m5_im2(int line) +{ + int column; + uint32 atex, atbuf, *src, *dst; + + /* Common data */ + int odd = odd_frame; + uint32 xscroll = *(uint32 *)&vram[hscb + ((line & hscroll_mask) << 2)]; + uint32 yscroll = *(uint32 *)&vsram[0]; + uint32 pf_col_mask = playfield_col_mask; + uint32 pf_row_mask = playfield_row_mask; + uint32 pf_shift = playfield_shift; + + /* Window & Plane A */ + int a = (reg[18] & 0x1F) << 3; + int w = (reg[18] >> 7) & 1; + + /* Plane B width */ + int start = 0; + int end = bitmap.viewport.w >> 4; + + /* Plane B scroll */ +#ifdef LSB_FIRST + uint32 shift = (xscroll >> 16) & 0x0F; + uint32 index = pf_col_mask + 1 - ((xscroll >> 20) & pf_col_mask); + uint32 v_line = (line + (yscroll >> 17)) & pf_row_mask; +#else + uint32 shift = (xscroll & 0x0F); + uint32 index = pf_col_mask + 1 - ((xscroll >> 4) & pf_col_mask); + uint32 v_line = (line + (yscroll >> 1)) & pf_row_mask; +#endif + + /* Plane B name table */ + uint32 *nt = (uint32 *)&vram[ntbb + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (((v_line & 7) << 1) | odd) << 3; + + if(shift) + { + /* Plane B line buffer */ + dst = (uint32 *)&linebuf[0][0x10 + shift]; + + atbuf = nt[(index - 1) & pf_col_mask]; + DRAW_COLUMN_IM2(atbuf, v_line) + } + else + { + /* Plane B line buffer */ + dst = (uint32 *)&linebuf[0][0x20]; + } + + for(column = 0; column < end; column++, index++) + { + atbuf = nt[index & pf_col_mask]; + DRAW_COLUMN_IM2(atbuf, v_line) + } + + if (w == (line >= a)) + { + /* Window takes up entire line */ + a = 0; + w = 1; + } + else + { + /* Window and Plane A share the line */ + a = clip[0].enable; + w = clip[1].enable; + } + + /* Plane A */ + if (a) + { + /* Plane A width */ + start = clip[0].left; + end = clip[0].right; + + /* Plane A scroll */ +#ifdef LSB_FIRST + shift = (xscroll & 0x0F); + index = pf_col_mask + start + 1 - ((xscroll >> 4) & pf_col_mask); + v_line = (line + (yscroll >> 1)) & pf_row_mask; +#else + shift = (xscroll >> 16) & 0x0F; + index = pf_col_mask + start + 1 - ((xscroll >> 20) & pf_col_mask); + v_line = (line + (yscroll >> 17)) & pf_row_mask; +#endif + + /* Plane A name table */ + nt = (uint32 *)&vram[ntab + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (((v_line & 7) << 1) | odd) << 3; + + if(shift) + { + /* Plane A line buffer */ + dst = (uint32 *)&linebuf[1][0x10 + shift + (start << 4)]; + + /* Window bug */ + if (start) + { + atbuf = nt[index & pf_col_mask]; + } + else + { + atbuf = nt[(index - 1) & pf_col_mask]; + } + + DRAW_COLUMN_IM2(atbuf, v_line) + } + else + { + /* Plane A line buffer */ + dst = (uint32 *)&linebuf[1][0x20 + (start << 4)]; + } + + for(column = start; column < end; column++, index++) + { + atbuf = nt[index & pf_col_mask]; + DRAW_COLUMN_IM2(atbuf, v_line) + } + + /* Window width */ + start = clip[1].left; + end = clip[1].right; + } + + /* Window */ + if (w) + { + /* Window name table */ + nt = (uint32 *)&vram[ntwb | ((line >> 3) << (6 + (reg[12] & 1)))]; + + /* Pattern row index */ + v_line = ((line & 7) << 1 | odd) << 3; + + /* Plane A line buffer */ + dst = (uint32 *)&linebuf[1][0x20 + (start << 4)]; + + for(column = start; column < end; column++) + { + atbuf = nt[column]; + DRAW_COLUMN_IM2(atbuf, v_line) + } + } + + /* Merge background layers */ + merge(&linebuf[1][0x20], &linebuf[0][0x20], &linebuf[0][0x20], lut[(reg[12] & 0x08) >> 2], bitmap.viewport.w); +} + +void render_bg_m5_im2_vs(int line) +{ + int column; + uint32 atex, atbuf, *src, *dst; + uint32 v_line, *nt; + + /* Common data */ + int odd = odd_frame; + uint32 xscroll = *(uint32 *)&vram[hscb + ((line & hscroll_mask) << 2)]; + uint32 yscroll = 0; + uint32 pf_col_mask = playfield_col_mask; + uint32 pf_row_mask = playfield_row_mask; + uint32 pf_shift = playfield_shift; + uint32 *vs = (uint32 *)&vsram[0]; + + /* Window & Plane A */ + int a = (reg[18] & 0x1F) << 3; + int w = (reg[18] >> 7) & 1; + + /* Plane B width */ + int start = 0; + int end = bitmap.viewport.w >> 4; + + /* Plane B horizontal scroll */ +#ifdef LSB_FIRST + uint32 shift = (xscroll >> 16) & 0x0F; + uint32 index = pf_col_mask + 1 - ((xscroll >> 20) & pf_col_mask); +#else + uint32 shift = (xscroll & 0x0F); + uint32 index = pf_col_mask + 1 - ((xscroll >> 4) & pf_col_mask); +#endif + + /* Left-most column vertical scrolling when partially shown horizontally (verified on PAL MD2) */ + /* TODO: check on Genesis 3 models since it apparently behaves differently */ + /* In H32 mode, vertical scrolling is disabled, in H40 mode, same value is used for both planes */ + /* See Formula One / Kawasaki Superbike Challenge (H32) & Gynoug / Cutie Suzuki no Ringside Angel (H40) */ + if (reg[12] & 1) + { + yscroll = (vs[19] >> 1) & (vs[19] >> 17); + } + + if(shift) + { + /* Plane B vertical scroll */ + v_line = (line + yscroll) & pf_row_mask; + + /* Plane B name table */ + nt = (uint32 *)&vram[ntbb + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (((v_line & 7) << 1) | odd) << 3; + + /* Plane B line buffer */ + dst = (uint32 *)&linebuf[0][0x10 + shift]; + + atbuf = nt[(index - 1) & pf_col_mask]; + DRAW_COLUMN_IM2(atbuf, v_line) + } + else + { + /* Plane B line buffer */ + dst = (uint32 *)&linebuf[0][0x20]; + } + + for(column = 0; column < end; column++, index++) + { + /* Plane B vertical scroll */ +#ifdef LSB_FIRST + v_line = (line + (vs[column] >> 17)) & pf_row_mask; +#else + v_line = (line + (vs[column] >> 1)) & pf_row_mask; +#endif + + /* Plane B name table */ + nt = (uint32 *)&vram[ntbb + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (((v_line & 7) << 1) | odd) << 3; + + atbuf = nt[index & pf_col_mask]; + DRAW_COLUMN_IM2(atbuf, v_line) + } + + if (w == (line >= a)) + { + /* Window takes up entire line */ + a = 0; + w = 1; + } + else + { + /* Window and Plane A share the line */ + a = clip[0].enable; + w = clip[1].enable; + } + + /* Plane A */ + if (a) + { + /* Plane A width */ + start = clip[0].left; + end = clip[0].right; + + /* Plane A horizontal scroll */ +#ifdef LSB_FIRST + shift = (xscroll & 0x0F); + index = pf_col_mask + start + 1 - ((xscroll >> 4) & pf_col_mask); +#else + shift = (xscroll >> 16) & 0x0F; + index = pf_col_mask + start + 1 - ((xscroll >> 20) & pf_col_mask); +#endif + + if(shift) + { + /* Plane A vertical scroll */ + v_line = (line + yscroll) & pf_row_mask; + + /* Plane A name table */ + nt = (uint32 *)&vram[ntab + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (((v_line & 7) << 1) | odd) << 3; + + /* Plane A line buffer */ + dst = (uint32 *)&linebuf[1][0x10 + shift + (start << 4)]; + + /* Window bug */ + if (start) + { + atbuf = nt[index & pf_col_mask]; + } + else + { + atbuf = nt[(index - 1) & pf_col_mask]; + } + + DRAW_COLUMN_IM2(atbuf, v_line) + } + else + { + /* Plane A line buffer */ + dst = (uint32 *)&linebuf[1][0x20 + (start << 4)]; + } + + for(column = start; column < end; column++, index++) + { + /* Plane A vertical scroll */ +#ifdef LSB_FIRST + v_line = (line + (vs[column] >> 1)) & pf_row_mask; +#else + v_line = (line + (vs[column] >> 17)) & pf_row_mask; +#endif + + /* Plane A name table */ + nt = (uint32 *)&vram[ntab + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (((v_line & 7) << 1) | odd) << 3; + + atbuf = nt[index & pf_col_mask]; + DRAW_COLUMN_IM2(atbuf, v_line) + } + + /* Window width */ + start = clip[1].left; + end = clip[1].right; + } + + /* Window */ + if (w) + { + /* Window name table */ + nt = (uint32 *)&vram[ntwb | ((line >> 3) << (6 + (reg[12] & 1)))]; + + /* Pattern row index */ + v_line = ((line & 7) << 1 | odd) << 3; + + /* Plane A line buffer */ + dst = (uint32 *)&linebuf[1][0x20 + (start << 4)]; + + for(column = start; column < end; column++) + { + atbuf = nt[column]; + DRAW_COLUMN_IM2(atbuf, v_line) + } + } + + /* Merge background layers */ + merge(&linebuf[1][0x20], &linebuf[0][0x20], &linebuf[0][0x20], lut[(reg[12] & 0x08) >> 2], bitmap.viewport.w); +} + +#else + +void render_bg_m5(int line) +{ + int column, start, end; + uint32 atex, atbuf, *src, *dst; + uint32 shift, index, v_line, *nt; + uint8 *lb; + + /* Scroll Planes common data */ + uint32 xscroll = *(uint32 *)&vram[hscb + ((line & hscroll_mask) << 2)]; + uint32 yscroll = *(uint32 *)&vsram[0]; + uint32 pf_col_mask = playfield_col_mask; + uint32 pf_row_mask = playfield_row_mask; + uint32 pf_shift = playfield_shift; + + /* Number of columns to draw */ + int width = bitmap.viewport.w >> 4; + + /* Layer priority table */ + uint8 *table = lut[(reg[12] & 8) >> 2]; + + /* Window vertical range (cell 0-31) */ + int a = (reg[18] & 0x1F) << 3; + + /* Window position (0=top, 1=bottom) */ + int w = (reg[18] >> 7) & 1; + + /* Test against current line */ + if (w == (line >= a)) + { + /* Window takes up entire line */ + a = 0; + w = 1; + } + else + { + /* Window and Plane A share the line */ + a = clip[0].enable; + w = clip[1].enable; + } + + /* Plane A */ + if (a) + { + /* Plane A width */ + start = clip[0].left; + end = clip[0].right; + + /* Plane A scroll */ +#ifdef LSB_FIRST + shift = (xscroll & 0x0F); + index = pf_col_mask + start + 1 - ((xscroll >> 4) & pf_col_mask); + v_line = (line + yscroll) & pf_row_mask; +#else + shift = (xscroll >> 16) & 0x0F; + index = pf_col_mask + start + 1 - ((xscroll >> 20) & pf_col_mask); + v_line = (line + (yscroll >> 16)) & pf_row_mask; +#endif + + /* Background line buffer */ + dst = (uint32 *)&linebuf[0][0x20 + (start << 4) + shift]; + + /* Plane A name table */ + nt = (uint32 *)&vram[ntab + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (v_line & 7) << 3; + + if(shift) + { + /* Left-most column is partially shown */ + dst -= 4; + + /* Window bug */ + if (start) + { + atbuf = nt[index & pf_col_mask]; + } + else + { + atbuf = nt[(index-1) & pf_col_mask]; + } + + DRAW_COLUMN(atbuf, v_line) + } + + for(column = start; column < end; column++, index++) + { + atbuf = nt[index & pf_col_mask]; + DRAW_COLUMN(atbuf, v_line) + } + + /* Window width */ + start = clip[1].left; + end = clip[1].right; + } + else + { + /* Window width */ + start = 0; + end = width; + } + + /* Window Plane */ + if (w) + { + /* Background line buffer */ + dst = (uint32 *)&linebuf[0][0x20 + (start << 4)]; + + /* Window name table */ + nt = (uint32 *)&vram[ntwb | ((line >> 3) << (6 + (reg[12] & 1)))]; + + /* Pattern row index */ + v_line = (line & 7) << 3; + + for(column = start; column < end; column++) + { + atbuf = nt[column]; + DRAW_COLUMN(atbuf, v_line) + } + } + + /* Plane B scroll */ +#ifdef LSB_FIRST + shift = (xscroll >> 16) & 0x0F; + index = pf_col_mask + 1 - ((xscroll >> 20) & pf_col_mask); + v_line = (line + (yscroll >> 16)) & pf_row_mask; +#else + shift = (xscroll & 0x0F); + index = pf_col_mask + 1 - ((xscroll >> 4) & pf_col_mask); + v_line = (line + yscroll) & pf_row_mask; +#endif + + /* Plane B name table */ + nt = (uint32 *)&vram[ntbb + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (v_line & 7) << 3; + + /* Background line buffer */ + lb = &linebuf[0][0x20]; + + if(shift) + { + /* Left-most column is partially shown */ + lb -= (0x10 - shift); + + atbuf = nt[(index-1) & pf_col_mask]; + DRAW_BG_COLUMN(atbuf, v_line, xscroll, yscroll) + } + + for(column = 0; column < width; column++, index++) + { + atbuf = nt[index & pf_col_mask]; + DRAW_BG_COLUMN(atbuf, v_line, xscroll, yscroll) + } +} + +void render_bg_m5_vs(int line) +{ + int column, start, end; + uint32 atex, atbuf, *src, *dst; + uint32 shift, index, v_line, *nt; + uint8 *lb; + + /* Scroll Planes common data */ + uint32 xscroll = *(uint32 *)&vram[hscb + ((line & hscroll_mask) << 2)]; + uint32 yscroll = 0; + uint32 pf_col_mask = playfield_col_mask; + uint32 pf_row_mask = playfield_row_mask; + uint32 pf_shift = playfield_shift; + uint32 *vs = (uint32 *)&vsram[0]; + + /* Number of columns to draw */ + int width = bitmap.viewport.w >> 4; + + /* Layer priority table */ + uint8 *table = lut[(reg[12] & 8) >> 2]; + + /* Window vertical range (cell 0-31) */ + int a = (reg[18] & 0x1F) << 3; + + /* Window position (0=top, 1=bottom) */ + int w = (reg[18] >> 7) & 1; + + /* Test against current line */ + if (w == (line >= a)) + { + /* Window takes up entire line */ + a = 0; + w = 1; + } + else + { + /* Window and Plane A share the line */ + a = clip[0].enable; + w = clip[1].enable; + } + + /* Left-most column vertical scrolling when partially shown horizontally */ + /* Same value for both planes, only in 40-cell mode, verified on PAL MD2 */ + /* See Gynoug, Cutie Suzuki no Ringside Angel, Formula One, Kawasaki Superbike Challenge */ + if (reg[12] & 1) + { + yscroll = vs[19] & (vs[19] >> 16); + } + + /* Plane A*/ + if (a) + { + /* Plane A width */ + start = clip[0].left; + end = clip[0].right; + + /* Plane A horizontal scroll */ +#ifdef LSB_FIRST + shift = (xscroll & 0x0F); + index = pf_col_mask + start + 1 - ((xscroll >> 4) & pf_col_mask); +#else + shift = (xscroll >> 16) & 0x0F; + index = pf_col_mask + start + 1 - ((xscroll >> 20) & pf_col_mask); +#endif + + /* Background line buffer */ + dst = (uint32 *)&linebuf[0][0x20 + (start << 4) + shift]; + + if(shift) + { + /* Left-most column is partially shown */ + dst -= 4; + + /* Plane A vertical scroll */ + v_line = (line + yscroll) & pf_row_mask; + + /* Plane A name table */ + nt = (uint32 *)&vram[ntab + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (v_line & 7) << 3; + + /* Window bug */ + if (start) + { + atbuf = nt[index & pf_col_mask]; + } + else + { + atbuf = nt[(index-1) & pf_col_mask]; + } + + DRAW_COLUMN(atbuf, v_line) + } + + for(column = start; column < end; column++, index++) + { + /* Plane A vertical scroll */ +#ifdef LSB_FIRST + v_line = (line + vs[column]) & pf_row_mask; +#else + v_line = (line + (vs[column] >> 16)) & pf_row_mask; +#endif + + /* Plane A name table */ + nt = (uint32 *)&vram[ntab + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (v_line & 7) << 3; + + atbuf = nt[index & pf_col_mask]; + DRAW_COLUMN(atbuf, v_line) + } + + /* Window width */ + start = clip[1].left; + end = clip[1].right; + } + else + { + /* Window width */ + start = 0; + end = width; + } + + /* Window Plane */ + if (w) + { + /* Background line buffer */ + dst = (uint32 *)&linebuf[0][0x20 + (start << 4)]; + + /* Window name table */ + nt = (uint32 *)&vram[ntwb | ((line >> 3) << (6 + (reg[12] & 1)))]; + + /* Pattern row index */ + v_line = (line & 7) << 3; + + for(column = start; column < end; column++) + { + atbuf = nt[column]; + DRAW_COLUMN(atbuf, v_line) + } + } + + /* Plane B horizontal scroll */ +#ifdef LSB_FIRST + shift = (xscroll >> 16) & 0x0F; + index = pf_col_mask + 1 - ((xscroll >> 20) & pf_col_mask); +#else + shift = (xscroll & 0x0F); + index = pf_col_mask + 1 - ((xscroll >> 4) & pf_col_mask); +#endif + + /* Background line buffer */ + lb = &linebuf[0][0x20]; + + if(shift) + { + /* Left-most column is partially shown */ + lb -= (0x10 - shift); + + /* Plane B vertical scroll */ + v_line = (line + yscroll) & pf_row_mask; + + /* Plane B name table */ + nt = (uint32 *)&vram[ntbb + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (v_line & 7) << 3; + + atbuf = nt[(index-1) & pf_col_mask]; + DRAW_BG_COLUMN(atbuf, v_line, xscroll, yscroll) + } + + for(column = 0; column < width; column++, index++) + { + /* Plane B vertical scroll */ +#ifdef LSB_FIRST + v_line = (line + (vs[column] >> 16)) & pf_row_mask; +#else + v_line = (line + vs[column]) & pf_row_mask; +#endif + + /* Plane B name table */ + nt = (uint32 *)&vram[ntbb + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (v_line & 7) << 3; + + atbuf = nt[index & pf_col_mask]; + DRAW_BG_COLUMN(atbuf, v_line, xscroll, yscroll) + } +} + +void render_bg_m5_im2(int line) +{ + int column, start, end; + uint32 atex, atbuf, *src, *dst; + uint32 shift, index, v_line, *nt; + uint8 *lb; + + /* Scroll Planes common data */ + int odd = odd_frame; + uint32 xscroll = *(uint32 *)&vram[hscb + ((line & hscroll_mask) << 2)]; + uint32 yscroll = *(uint32 *)&vsram[0]; + uint32 pf_col_mask = playfield_col_mask; + uint32 pf_row_mask = playfield_row_mask; + uint32 pf_shift = playfield_shift; + + /* Number of columns to draw */ + int width = bitmap.viewport.w >> 4; + + /* Layer priority table */ + uint8 *table = lut[(reg[12] & 8) >> 2]; + + /* Window vertical range (cell 0-31) */ + int a = (reg[18] & 0x1F) << 3; + + /* Window position (0=top, 1=bottom) */ + int w = (reg[18] >> 7) & 1; + + /* Test against current line */ + if (w == (line >= a)) + { + /* Window takes up entire line */ + a = 0; + w = 1; + } + else + { + /* Window and Plane A share the line */ + a = clip[0].enable; + w = clip[1].enable; + } + + /* Plane A */ + if (a) + { + /* Plane A width */ + start = clip[0].left; + end = clip[0].right; + + /* Plane A scroll */ +#ifdef LSB_FIRST + shift = (xscroll & 0x0F); + index = pf_col_mask + start + 1 - ((xscroll >> 4) & pf_col_mask); + v_line = (line + (yscroll >> 1)) & pf_row_mask; +#else + shift = (xscroll >> 16) & 0x0F; + index = pf_col_mask + start + 1 - ((xscroll >> 20) & pf_col_mask); + v_line = (line + (yscroll >> 17)) & pf_row_mask; +#endif + + /* Background line buffer */ + dst = (uint32 *)&linebuf[0][0x20 + (start << 4) + shift]; + + /* Plane A name table */ + nt = (uint32 *)&vram[ntab + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (((v_line & 7) << 1) | odd) << 3; + + if(shift) + { + /* Left-most column is partially shown */ + dst -= 4; + + /* Window bug */ + if (start) + { + atbuf = nt[index & pf_col_mask]; + } + else + { + atbuf = nt[(index-1) & pf_col_mask]; + } + + DRAW_COLUMN_IM2(atbuf, v_line) + } + + for(column = start; column < end; column++, index++) + { + atbuf = nt[index & pf_col_mask]; + DRAW_COLUMN_IM2(atbuf, v_line) + } + + /* Window width */ + start = clip[1].left; + end = clip[1].right; + } + else + { + /* Window width */ + start = 0; + end = width; + } + + /* Window Plane */ + if (w) + { + /* Background line buffer */ + dst = (uint32 *)&linebuf[0][0x20 + (start << 4)]; + + /* Window name table */ + nt = (uint32 *)&vram[ntwb | ((line >> 3) << (6 + (reg[12] & 1)))]; + + /* Pattern row index */ + v_line = ((line & 7) << 1 | odd) << 3; + + for(column = start; column < end; column++) + { + atbuf = nt[column]; + DRAW_COLUMN_IM2(atbuf, v_line) + } + } + + /* Plane B scroll */ +#ifdef LSB_FIRST + shift = (xscroll >> 16) & 0x0F; + index = pf_col_mask + 1 - ((xscroll >> 20) & pf_col_mask); + v_line = (line + (yscroll >> 17)) & pf_row_mask; +#else + shift = (xscroll & 0x0F); + index = pf_col_mask + 1 - ((xscroll >> 4) & pf_col_mask); + v_line = (line + (yscroll >> 1)) & pf_row_mask; +#endif + + /* Plane B name table */ + nt = (uint32 *)&vram[ntbb + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (((v_line & 7) << 1) | odd) << 3; + + /* Background line buffer */ + lb = &linebuf[0][0x20]; + + if(shift) + { + /* Left-most column is partially shown */ + lb -= (0x10 - shift); + + atbuf = nt[(index-1) & pf_col_mask]; + DRAW_BG_COLUMN_IM2(atbuf, v_line, xscroll, yscroll) + } + + for(column = 0; column < width; column++, index++) + { + atbuf = nt[index & pf_col_mask]; + DRAW_BG_COLUMN_IM2(atbuf, v_line, xscroll, yscroll) + } +} + +void render_bg_m5_im2_vs(int line) +{ + int column, start, end; + uint32 atex, atbuf, *src, *dst; + uint32 shift, index, v_line, *nt; + uint8 *lb; + + /* common data */ + int odd = odd_frame; + uint32 xscroll = *(uint32 *)&vram[hscb + ((line & hscroll_mask) << 2)]; + uint32 yscroll = 0; + uint32 pf_col_mask = playfield_col_mask; + uint32 pf_row_mask = playfield_row_mask; + uint32 pf_shift = playfield_shift; + uint32 *vs = (uint32 *)&vsram[0]; + + /* Number of columns to draw */ + int width = bitmap.viewport.w >> 4; + + /* Layer priority table */ + uint8 *table = lut[(reg[12] & 8) >> 2]; + + /* Window vertical range (cell 0-31) */ + uint32 a = (reg[18] & 0x1F) << 3; + + /* Window position (0=top, 1=bottom) */ + uint32 w = (reg[18] >> 7) & 1; + + /* Test against current line */ + if (w == (line >= a)) + { + /* Window takes up entire line */ + a = 0; + w = 1; + } + else + { + /* Window and Plane A share the line */ + a = clip[0].enable; + w = clip[1].enable; + } + + /* Left-most column vertical scrolling when partially shown horizontally */ + /* Same value for both planes, only in 40-cell mode, verified on PAL MD2 */ + /* See Gynoug, Cutie Suzuki no Ringside Angel, Formula One, Kawasaki Superbike Challenge */ + if (reg[12] & 1) + { + /* only in 40-cell mode, verified on MD2 */ + yscroll = (vs[19] >> 1) & (vs[19] >> 17); + } + + /* Plane A */ + if (a) + { + /* Plane A width */ + start = clip[0].left; + end = clip[0].right; + + /* Plane A horizontal scroll */ +#ifdef LSB_FIRST + shift = (xscroll & 0x0F); + index = pf_col_mask + start + 1 - ((xscroll >> 4) & pf_col_mask); +#else + shift = (xscroll >> 16) & 0x0F; + index = pf_col_mask + start + 1 - ((xscroll >> 20) & pf_col_mask); +#endif + + /* Background line buffer */ + dst = (uint32 *)&linebuf[0][0x20 + (start << 4) + shift]; + + if(shift) + { + /* Left-most column is partially shown */ + dst -= 4; + + /* Plane A vertical scroll */ + v_line = (line + yscroll) & pf_row_mask; + + /* Plane A name table */ + nt = (uint32 *)&vram[ntab + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (((v_line & 7) << 1) | odd) << 3; + + /* Window bug */ + if (start) + { + atbuf = nt[index & pf_col_mask]; + } + else + { + atbuf = nt[(index-1) & pf_col_mask]; + } + + DRAW_COLUMN_IM2(atbuf, v_line) + } + + for(column = start; column < end; column++, index++) + { + /* Plane A vertical scroll */ +#ifdef LSB_FIRST + v_line = (line + (vs[column] >> 1)) & pf_row_mask; +#else + v_line = (line + (vs[column] >> 17)) & pf_row_mask; +#endif + + /* Plane A name table */ + nt = (uint32 *)&vram[ntab + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (((v_line & 7) << 1) | odd) << 3; + + atbuf = nt[index & pf_col_mask]; + DRAW_COLUMN_IM2(atbuf, v_line) + } + + /* Window width */ + start = clip[1].left; + end = clip[1].right; + } + else + { + /* Window width */ + start = 0; + end = width; + } + + /* Window Plane */ + if (w) + { + /* Background line buffer */ + dst = (uint32 *)&linebuf[0][0x20 + (start << 4)]; + + /* Window name table */ + nt = (uint32 *)&vram[ntwb | ((line >> 3) << (6 + (reg[12] & 1)))]; + + /* Pattern row index */ + v_line = ((line & 7) << 1 | odd) << 3; + + for(column = start; column < end; column++) + { + atbuf = nt[column]; + DRAW_COLUMN_IM2(atbuf, v_line) + } + } + + /* Plane B horizontal scroll */ +#ifdef LSB_FIRST + shift = (xscroll >> 16) & 0x0F; + index = pf_col_mask + 1 - ((xscroll >> 20) & pf_col_mask); +#else + shift = (xscroll & 0x0F); + index = pf_col_mask + 1 - ((xscroll >> 4) & pf_col_mask); +#endif + + /* Background line buffer */ + lb = &linebuf[0][0x20]; + + if(shift) + { + /* Left-most column is partially shown */ + lb -= (0x10 - shift); + + /* Plane B vertical scroll */ + v_line = (line + yscroll) & pf_row_mask; + + /* Plane B name table */ + nt = (uint32 *)&vram[ntbb + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (((v_line & 7) << 1) | odd) << 3; + + atbuf = nt[(index-1) & pf_col_mask]; + DRAW_BG_COLUMN_IM2(atbuf, v_line, xscroll, yscroll) + } + + for(column = 0; column < width; column++, index++) + { + /* Plane B vertical scroll */ +#ifdef LSB_FIRST + v_line = (line + (vs[column] >> 17)) & pf_row_mask; +#else + v_line = (line + (vs[column] >> 1)) & pf_row_mask; +#endif + + /* Plane B name table */ + nt = (uint32 *)&vram[ntbb + (((v_line >> 3) << pf_shift) & 0x1FC0)]; + + /* Pattern row index */ + v_line = (((v_line & 7) << 1) | odd) << 3; + + atbuf = nt[index & pf_col_mask]; + DRAW_BG_COLUMN_IM2(atbuf, v_line, xscroll, yscroll) + } +} +#endif + + +/*--------------------------------------------------------------------------*/ +/* Sprite layer rendering functions */ +/*--------------------------------------------------------------------------*/ + +void render_obj_tms(int line) +{ + int x, start, end; + uint8 *lb, *sg; + uint8 color, pattern[2]; + uint16 temp; + + /* Sprite list for current line */ + object_info_t *object_info = obj_info[line]; + int count = object_count[line]; + + /* Default sprite width (8 pixels) */ + int width = 8; + + /* Adjust width for 16x16 sprites */ + width <<= ((reg[1] & 0x02) >> 1); + + /* Adjust width for zoomed sprites */ + width <<= (reg[1] & 0x01); + + /* Latch SOVR flag from previous line to VDP status */ + status |= spr_ovr; + + /* Clear SOVR flag for current line */ + spr_ovr = 0; + + /* Draw sprites in front-to-back order */ + while (count--) + { + /* Sprite X position */ + start = object_info->xpos; + + /* Sprite Color + Early Clock bit */ + color = object_info->size; + + /* X position shift (32 pixels) */ + start -= ((color & 0x80) >> 2); + + /* Pointer to line buffer */ + lb = &linebuf[0][0x20 + start]; + + if ((start + width) > 256) + { + /* Clip sprites on right edge */ + end = 256 - start; + start = 0; + } + else + { + end = width; + + if (start < 0) + { + /* Clip sprites on left edge */ + start = 0 - start; + } + else + { + start = 0; + } + } + + /* Sprite Color (0-15) */ + color &= 0x0F; + + /* Sprite Pattern Name */ + temp = object_info->attr; + + /* Mask two LSB for 16x16 sprites */ + temp &= ~((reg[1] & 0x02) >> 0); + temp &= ~((reg[1] & 0x02) >> 1); + + /* Pointer to sprite generator table */ + sg = (uint8 *)&vram[((reg[6] << 11) & 0x3800) | (temp << 3) | object_info->ypos]; + + /* Sprite Pattern data (2 x 8 pixels) */ + pattern[0] = sg[0x00]; + pattern[1] = sg[0x10]; + + if (reg[1] & 0x01) + { + /* Zoomed sprites are rendered at half speed */ + for (x=start; x> 4) & 1]; + temp = (temp >> (7 - ((x >> 1) & 7))) & 0x01; + temp = temp * color; + temp |= (lb[x] << 8); + lb[x] = lut[5][temp]; + status |= ((temp & 0x8000) >> 10); + temp &= 0x00FF; + temp |= (lb[x+1] << 8); + lb[x+1] = lut[5][temp]; + status |= ((temp & 0x8000) >> 10); + } + } + else + { + /* Normal sprites */ + for (x=start; x> 3) & 1]; + temp = (temp >> (7 - (x & 7))) & 0x01; + temp = temp * color; + temp |= (lb[x] << 8); + lb[x] = lut[5][temp]; + status |= ((temp & 0x8000) >> 10); + } + } + + /* Next sprite entry */ + object_info++; + } + + /* handle Game Gear reduced screen (160x144) */ + if ((system_hw == SYSTEM_GG) && !config.gg_extra && (v_counter < bitmap.viewport.h)) + { + int line = v_counter - (bitmap.viewport.h - 144) / 2; + if ((line < 0) || (line >= 144)) + { + memset(&linebuf[0][0x20], 0x40, 256); + } + else + { + if (bitmap.viewport.x > 0) + { + memset(&linebuf[0][0x20], 0x40, 48); + memset(&linebuf[0][0x20+48+160], 0x40, 48); + } + } + } +} + +void render_obj_m4(int line) +{ + int i, xpos, end; + uint8 *src, *lb; + uint16 temp; + + /* Sprite list for current line */ + object_info_t *object_info = obj_info[line]; + int count = object_count[line]; + + /* Default sprite width */ + int width = 8; + + /* Sprite Generator address mask (LSB is masked for 8x16 sprites) */ + uint16 sg_mask = (~0x1C0 ^ (reg[6] << 6)) & (~((reg[1] & 0x02) >> 1)); + + /* Zoomed sprites (not working on Genesis VDP) */ + if (system_hw < SYSTEM_MD) + { + width <<= (reg[1] & 0x01); + } + + /* Unused bits used as a mask on 315-5124 VDP only */ + if (system_hw > SYSTEM_SMS) + { + sg_mask |= 0xC0; + } + + /* Latch SOVR flag from previous line to VDP status */ + status |= spr_ovr; + + /* Clear SOVR flag for current line */ + spr_ovr = 0; + + /* Draw sprites in front-to-back order */ + while (count--) + { + /* Sprite pattern index */ + temp = (object_info->attr | 0x100) & sg_mask; + + /* Pointer to pattern cache line */ + src = (uint8 *)&bg_pattern_cache[(temp << 6) | (object_info->ypos << 3)]; + + /* Sprite X position */ + xpos = object_info->xpos; + + /* X position shift */ + xpos -= (reg[0] & 0x08); + + if (xpos < 0) + { + /* Clip sprites on left edge */ + src = src - xpos; + end = xpos + width; + xpos = 0; + } + else if ((xpos + width) > 256) + { + /* Clip sprites on right edge */ + end = 256 - xpos; + } + else + { + /* Sprite maximal width */ + end = width; + } + + /* Pointer to line buffer */ + lb = &linebuf[0][0x20 + xpos]; + + if (width > 8) + { + /* Draw sprite pattern (zoomed sprites are rendered at half speed) */ + DRAW_SPRITE_TILE_ACCURATE_2X(end,0,lut[5]) + + /* 315-5124 VDP specific */ + if (system_hw < SYSTEM_SMS2) + { + /* only 4 first sprites can be zoomed */ + if (count == (object_count[line] - 4)) + { + /* Set default width for remaining sprites */ + width = 8; + } + } + } + else + { + /* Draw sprite pattern */ + DRAW_SPRITE_TILE_ACCURATE(end,0,lut[5]) + } + + /* Next sprite entry */ + object_info++; + } + + /* handle Game Gear reduced screen (160x144) */ + if ((system_hw == SYSTEM_GG) && !config.gg_extra && (v_counter < bitmap.viewport.h)) + { + int line = v_counter - (bitmap.viewport.h - 144) / 2; + if ((line < 0) || (line >= 144)) + { + memset(&linebuf[0][0x20], 0x40, 256); + } + else + { + if (bitmap.viewport.x > 0) + { + memset(&linebuf[0][0x20], 0x40, 48); + memset(&linebuf[0][0x20+48+160], 0x40, 48); + } + } + } +} + +void render_obj_m5(int line) +{ + int i, column; + int xpos, width; + int pixelcount = 0; + int masked = 0; + + uint8 *src, *s, *lb; + uint32 temp, v_line; + uint32 attr, name, atex; + + /* Sprite list for current line */ + object_info_t *object_info = obj_info[line]; + int count = object_count[line]; + + /* Draw sprites in front-to-back order */ + while (count--) + { + /* Sprite X position */ + xpos = object_info->xpos; + + /* Sprite masking */ + if (xpos) + { + /* Requires at least one sprite with xpos > 0 */ + spr_ovr = 1; + } + else if (spr_ovr) + { + /* Remaining sprites are not drawn */ + masked = 1; + } + + /* Display area offset */ + xpos = xpos - 0x80; + + /* Sprite size */ + temp = object_info->size; + + /* Sprite width */ + width = 8 + ((temp & 0x0C) << 1); + + /* Update pixel count (off-screen sprites are included) */ + pixelcount += width; + + /* Is sprite across visible area ? */ + if (((xpos + width) > 0) && (xpos < bitmap.viewport.w) && !masked) + { + /* Sprite attributes */ + attr = object_info->attr; + + /* Sprite vertical offset */ + v_line = object_info->ypos; + + /* Sprite priority + palette bits */ + atex = (attr >> 9) & 0x70; + + /* Pattern name base */ + name = attr & 0x07FF; + + /* Mask vflip/hflip */ + attr &= 0x1800; + + /* Pointer into pattern name offset look-up table */ + s = &name_lut[((attr >> 3) & 0x300) | (temp << 4) | ((v_line & 0x18) >> 1)]; + + /* Pointer into line buffer */ + lb = &linebuf[0][0x20 + xpos]; + + /* Max. number of sprite pixels rendered per line */ + if (pixelcount > max_sprite_pixels) + { + /* Adjust number of pixels to draw */ + width -= (pixelcount - max_sprite_pixels); + } + + /* Number of tiles to draw */ + width = width >> 3; + + /* Pattern row index */ + v_line = (v_line & 7) << 3; + + /* Draw sprite patterns */ + for (column = 0; column < width; column++, lb+=8) + { + temp = attr | ((name + s[column]) & 0x07FF); + src = &bg_pattern_cache[(temp << 6) | (v_line)]; + DRAW_SPRITE_TILE(8,atex,lut[1]) + } + } + + /* Sprite limit */ + if (pixelcount >= max_sprite_pixels) + { + /* Sprite masking is effective on next line if max pixel width is reached */ + spr_ovr = (pixelcount >= bitmap.viewport.w); + + /* Stop sprite rendering */ + return; + } + + /* Next sprite entry */ + object_info++; + } + + /* Clear sprite masking for next line */ + spr_ovr = 0; +} + +void render_obj_m5_ste(int line) +{ + int i, column; + int xpos, width; + int pixelcount = 0; + int masked = 0; + + uint8 *src, *s, *lb; + uint32 temp, v_line; + uint32 attr, name, atex; + + /* Sprite list for current line */ + object_info_t *object_info = obj_info[line]; + int count = object_count[line]; + + /* Clear sprite line buffer */ + memset(&linebuf[1][0], 0, bitmap.viewport.w + 0x40); + + /* Draw sprites in front-to-back order */ + while (count--) + { + /* Sprite X position */ + xpos = object_info->xpos; + + /* Sprite masking */ + if (xpos) + { + /* Requires at least one sprite with xpos > 0 */ + spr_ovr = 1; + } + else if (spr_ovr) + { + /* Remaining sprites are not drawn */ + masked = 1; + } + + /* Display area offset */ + xpos = xpos - 0x80; + + /* Sprite size */ + temp = object_info->size; + + /* Sprite width */ + width = 8 + ((temp & 0x0C) << 1); + + /* Update pixel count (off-screen sprites are included) */ + pixelcount += width; + + /* Is sprite across visible area ? */ + if (((xpos + width) > 0) && (xpos < bitmap.viewport.w) && !masked) + { + /* Sprite attributes */ + attr = object_info->attr; + + /* Sprite vertical offset */ + v_line = object_info->ypos; + + /* Sprite priority + palette bits */ + atex = (attr >> 9) & 0x70; + + /* Pattern name base */ + name = attr & 0x07FF; + + /* Mask vflip/hflip */ + attr &= 0x1800; + + /* Pointer into pattern name offset look-up table */ + s = &name_lut[((attr >> 3) & 0x300) | (temp << 4) | ((v_line & 0x18) >> 1)]; + + /* Pointer into line buffer */ + lb = &linebuf[1][0x20 + xpos]; + + /* Adjust number of pixels to draw for sprite limit */ + if (pixelcount > max_sprite_pixels) + { + width -= (pixelcount - max_sprite_pixels); + } + + /* Number of tiles to draw */ + width = width >> 3; + + /* Pattern row index */ + v_line = (v_line & 7) << 3; + + /* Draw sprite patterns */ + for (column = 0; column < width; column++, lb+=8) + { + temp = attr | ((name + s[column]) & 0x07FF); + src = &bg_pattern_cache[(temp << 6) | (v_line)]; + DRAW_SPRITE_TILE(8,atex,lut[3]) + } + } + + /* Sprite limit */ + if (pixelcount >= max_sprite_pixels) + { + /* Sprite masking is effective on next line if max pixel width is reached */ + spr_ovr = (pixelcount >= bitmap.viewport.w); + + /* Merge background & sprite layers */ + merge(&linebuf[1][0x20], &linebuf[0][0x20], &linebuf[0][0x20], lut[4], bitmap.viewport.w); + + /* Stop sprite rendering */ + return; + } + + /* Next sprite entry */ + object_info++; + } + + /* Clear sprite masking for next line */ + spr_ovr = 0; + + /* Merge background & sprite layers */ + merge(&linebuf[1][0x20], &linebuf[0][0x20], &linebuf[0][0x20], lut[4], bitmap.viewport.w); +} + +void render_obj_m5_im2(int line) +{ + int i, column; + int xpos, width; + int pixelcount = 0; + int masked = 0; + int odd = odd_frame; + + uint8 *src, *s, *lb; + uint32 temp, v_line; + uint32 attr, name, atex; + + /* Sprite list for current line */ + object_info_t *object_info = obj_info[line]; + int count = object_count[line]; + + /* Draw sprites in front-to-back order */ + while (count--) + { + /* Sprite X position */ + xpos = object_info->xpos; + + /* Sprite masking */ + if (xpos) + { + /* Requires at least one sprite with xpos > 0 */ + spr_ovr = 1; + } + else if (spr_ovr) + { + /* Remaining sprites are not drawn */ + masked = 1; + } + + /* Display area offset */ + xpos = xpos - 0x80; + + /* Sprite size */ + temp = object_info->size; + + /* Sprite width */ + width = 8 + ((temp & 0x0C) << 1); + + /* Update pixel count (off-screen sprites are included) */ + pixelcount += width; + + /* Is sprite across visible area ? */ + if (((xpos + width) > 0) && (xpos < bitmap.viewport.w) && !masked) + { + /* Sprite attributes */ + attr = object_info->attr; + + /* Sprite y offset */ + v_line = object_info->ypos; + + /* Sprite priority + palette bits */ + atex = (attr >> 9) & 0x70; + + /* Pattern name base */ + name = attr & 0x03FF; + + /* Mask vflip/hflip */ + attr &= 0x1800; + + /* Pattern name offset lookup table */ + s = &name_lut[((attr >> 3) & 0x300) | (temp << 4) | ((v_line & 0x18) >> 1)]; + + /* Pointer into line buffer */ + lb = &linebuf[0][0x20 + xpos]; + + /* Adjust width for sprite limit */ + if (pixelcount > max_sprite_pixels) + { + width -= (pixelcount - max_sprite_pixels); + } + + /* Number of tiles to draw */ + width = width >> 3; + + /* Pattern row index */ + v_line = (((v_line & 7) << 1) | odd) << 3; + + /* Render sprite patterns */ + for(column = 0; column < width; column ++, lb+=8) + { + temp = attr | (((name + s[column]) & 0x3ff) << 1); + src = &bg_pattern_cache[((temp << 6) | (v_line)) ^ ((attr & 0x1000) >> 6)]; + DRAW_SPRITE_TILE(8,atex,lut[1]) + } + } + + /* Sprite Limit */ + if (pixelcount >= max_sprite_pixels) + { + /* Sprite masking is effective on next line if max pixel width is reached */ + spr_ovr = (pixelcount >= bitmap.viewport.w); + + /* Stop sprite rendering */ + return; + } + + /* Next sprite entry */ + object_info++; + } + + /* Clear sprite masking for next line */ + spr_ovr = 0; +} + +void render_obj_m5_im2_ste(int line) +{ + int i, column; + int xpos, width; + int pixelcount = 0; + int masked = 0; + int odd = odd_frame; + + uint8 *src, *s, *lb; + uint32 temp, v_line; + uint32 attr, name, atex; + + /* Sprite list for current line */ + object_info_t *object_info = obj_info[line]; + int count = object_count[line]; + + /* Clear sprite line buffer */ + memset(&linebuf[1][0], 0, bitmap.viewport.w + 0x40); + + /* Draw sprites in front-to-back order */ + while (count--) + { + /* Sprite X position */ + xpos = object_info->xpos; + + /* Sprite masking */ + if (xpos) + { + /* Requires at least one sprite with xpos > 0 */ + spr_ovr = 1; + } + else if (spr_ovr) + { + /* Remaining sprites are not drawn */ + masked = 1; + } + + /* Display area offset */ + xpos = xpos - 0x80; + + /* Sprite size */ + temp = object_info->size; + + /* Sprite width */ + width = 8 + ((temp & 0x0C) << 1); + + /* Update pixel count (off-screen sprites are included) */ + pixelcount += width; + + /* Is sprite across visible area ? */ + if (((xpos + width) > 0) && (xpos < bitmap.viewport.w) && !masked) + { + /* Sprite attributes */ + attr = object_info->attr; + + /* Sprite y offset */ + v_line = object_info->ypos; + + /* Sprite priority + palette bits */ + atex = (attr >> 9) & 0x70; + + /* Pattern name base */ + name = attr & 0x03FF; + + /* Mask vflip/hflip */ + attr &= 0x1800; + + /* Pattern name offset lookup table */ + s = &name_lut[((attr >> 3) & 0x300) | (temp << 4) | ((v_line & 0x18) >> 1)]; + + /* Pointer into line buffer */ + lb = &linebuf[1][0x20 + xpos]; + + /* Adjust width for sprite limit */ + if (pixelcount > max_sprite_pixels) + { + width -= (pixelcount - max_sprite_pixels); + } + + /* Number of tiles to draw */ + width = width >> 3; + + /* Pattern row index */ + v_line = (((v_line & 7) << 1) | odd) << 3; + + /* Render sprite patterns */ + for(column = 0; column < width; column ++, lb+=8) + { + temp = attr | (((name + s[column]) & 0x3ff) << 1); + src = &bg_pattern_cache[((temp << 6) | (v_line)) ^ ((attr & 0x1000) >> 6)]; + DRAW_SPRITE_TILE(8,atex,lut[3]) + } + } + + /* Sprite Limit */ + if (pixelcount >= max_sprite_pixels) + { + /* Sprite masking is effective on next line if max pixel width is reached */ + spr_ovr = (pixelcount >= bitmap.viewport.w); + + /* Merge background & sprite layers */ + merge(&linebuf[1][0x20], &linebuf[0][0x20], &linebuf[0][0x20], lut[4], bitmap.viewport.w); + + /* Stop sprite rendering */ + return; + } + + /* Next sprite entry */ + object_info++; + } + + /* Clear sprite masking for next line */ + spr_ovr = 0; + + /* Merge background & sprite layers */ + merge(&linebuf[1][0x20], &linebuf[0][0x20], &linebuf[0][0x20], lut[4], bitmap.viewport.w); +} + + +/*--------------------------------------------------------------------------*/ +/* Sprites Parsing functions */ +/*--------------------------------------------------------------------------*/ + +void parse_satb_tms(int line) +{ + int i = 0; + + /* Sprite counter (4 max. per line) */ + int count = 0; + + /* no sprites in Text modes */ + if (!(reg[1] & 0x10)) + { + /* Y position */ + int ypos; + + /* Sprite list for next line */ + object_info_t *object_info = obj_info[(line + 1) & 1]; + + /* Pointer to sprite attribute table */ + uint8 *st = &vram[(reg[5] << 7) & 0x3F80]; + + /* Sprite height (8 pixels by default) */ + int height = 8; + + /* Adjust height for 16x16 sprites */ + height <<= ((reg[1] & 0x02) >> 1); + + /* Adjust height for zoomed sprites */ + height <<= (reg[1] & 0x01); + + /* Parse Sprite Table (32 entries) */ + do + { + /* Sprite Y position */ + ypos = st[i << 2]; + + /* Check end of sprite list marker */ + if (ypos == 0xD0) + { + break; + } + + /* Wrap Y coordinate for sprites > 256-32 */ + if (ypos >= 224) + { + ypos -= 256; + } + + /* Y range */ + ypos = line - ypos; + + /* Sprite is visible on this line ? */ + if ((ypos >= 0) && (ypos < height)) + { + /* Sprite overflow */ + if (count == 4) + { + /* Flag is set only during active area */ + if (line < bitmap.viewport.h) + { + spr_ovr = 0x40; + } + break; + } + + /* Adjust Y range back for zoomed sprites */ + ypos >>= (reg[1] & 0x01); + + /* Store sprite attributes for later processing */ + object_info->ypos = ypos; + object_info->xpos = st[(i << 2) + 1]; + object_info->attr = st[(i << 2) + 2]; + object_info->size = st[(i << 2) + 3]; + + /* Increment Sprite count */ + ++count; + + /* Next sprite entry */ + object_info++; + } + } + while (++i < 32); + } + + /* Update sprite count for next line */ + object_count[(line + 1) & 1] = count; + + /* Insert number of last sprite entry processed */ + status = (status & 0xE0) | (i & 0x1F); +} + +void parse_satb_m4(int line) +{ + int i = 0; + uint8 *st; + + /* Sprite counter (8 max. per line) */ + int count = 0; + + /* Y position */ + int ypos; + + /* Sprite list for next line */ + object_info_t *object_info = obj_info[(line + 1) & 1]; + + /* Sprite height (8x8 or 8x16) */ + int height = 8 + ((reg[1] & 0x02) << 2); + + /* Sprite attribute table address mask */ + uint16 st_mask = ~0x3F80 ^ (reg[5] << 7); + + /* Unused bits used as a mask on 315-5124 VDP only */ + if (system_hw > SYSTEM_SMS) + { + st_mask |= 0x80; + } + + /* Pointer to sprite attribute table */ + st = &vram[st_mask & 0x3F00]; + + /* Parse Sprite Table (64 entries) */ + do + { + /* Sprite Y position */ + ypos = st[i]; + + /* Check end of sprite list marker */ + if (ypos == (bitmap.viewport.h + 16)) + { + break; + } + + /* Wrap Y coordinate for sprites > 256-16 */ + if (ypos >= 240) + { + ypos -= 256; + } + + /* Y range */ + ypos = line - ypos; + + /* Adjust Y range for zoomed sprites (not working on Mega Drive VDP) */ + if (system_hw < SYSTEM_MD) + { + ypos >>= (reg[1] & 0x01); + } + + /* Check if sprite is visible on this line */ + if ((ypos >= 0) && (ypos < height)) + { + /* Sprite overflow */ + if (count == 8) + { + /* Flag is set only during active area */ + if ((line >= 0) && (line < bitmap.viewport.h)) + { + spr_ovr = 0x40; + } + break; + } + + /* Store sprite attributes for later processing */ + object_info->ypos = ypos; + object_info->xpos = st[(0x80 + (i << 1)) & st_mask]; + object_info->attr = st[(0x81 + (i << 1)) & st_mask]; + + /* Increment Sprite count */ + ++count; + + /* Next sprite entry */ + object_info++; + } + } + while (++i < 64); + + /* Update sprite count for next line */ + object_count[(line + 1) & 1] = count; +} + +void parse_satb_m5(int line) +{ + /* Y position */ + int ypos; + + /* Sprite height (8,16,24,32 pixels)*/ + int height; + + /* Sprite size data */ + int size; + + /* Sprite link data */ + int link = 0; + + /* Sprite counter */ + int count = 0; + + /* max. number of rendered sprites (16 or 20 sprites per line by default) */ + int max = bitmap.viewport.w >> 4; + + /* max. number of parsed sprites (64 or 80 sprites per line by default) */ + int total = max_sprite_pixels >> 2; + + /* Pointer to sprite attribute table */ + uint16 *p = (uint16 *) &vram[satb]; + + /* Pointer to internal RAM */ + uint16 *q = (uint16 *) &sat[0]; + + /* Sprite list for next line */ + object_info_t *object_info = obj_info[(line + 1) & 1]; + + /* Adjust line offset */ + line += 0x81; + + do + { + /* Read Y position & size from internal SAT */ + ypos = (q[link] >> im2_flag) & 0x1FF; + size = q[link + 1] >> 8; + + /* Sprite height */ + height = 8 + ((size & 3) << 3); + + /* Y range */ + ypos = line - ypos; + + /* Sprite is visble on this line ? */ + if ((ypos >= 0) && (ypos < height)) + { + /* Sprite overflow */ + if (count == max) + { + status |= 0x40; + break; + } + + /* Update sprite list (only name, attribute & xpos are parsed from VRAM) */ + object_info->attr = p[link + 2]; + object_info->xpos = p[link + 3] & 0x1ff; + object_info->ypos = ypos; + object_info->size = size & 0x0f; + + /* Increment Sprite count */ + ++count; + + /* Next sprite entry */ + object_info++; + } + + /* Read link data from internal SAT */ + link = (q[link + 1] & 0x7F) << 2; + + /* Last sprite */ + if (link == 0) break; + } + while (--total); + + /* Update sprite count for next line (line value already incremented) */ + object_count[line & 1] = count; +} + + +/*--------------------------------------------------------------------------*/ +/* Pattern cache update function */ +/*--------------------------------------------------------------------------*/ + +void update_bg_pattern_cache_m4(int index) +{ + int i; + uint8 x, y, c; + uint8 *dst; + uint16 name, bp01, bp23; + uint32 bp; + + for(i = 0; i < index; i++) + { + /* Get modified pattern name index */ + name = bg_name_list[i]; + + /* Check modified lines */ + for(y = 0; y < 8; y++) + { + if(bg_name_dirty[name] & (1 << y)) + { + /* Pattern cache base address */ + dst = &bg_pattern_cache[name << 6]; + + /* Byteplane data */ + bp01 = *(uint16 *)&vram[(name << 5) | (y << 2) | (0)]; + bp23 = *(uint16 *)&vram[(name << 5) | (y << 2) | (2)]; + + /* Convert to pixel line data (4 bytes = 8 pixels)*/ + /* (msb) p7p6 p5p4 p3p2 p1p0 (lsb) */ + bp = (bp_lut[bp01] >> 2) | (bp_lut[bp23]); + + /* Update cached line (8 pixels = 8 bytes) */ + for(x = 0; x < 8; x++) + { + /* Extract pixel data */ + c = bp & 0x0F; + + /* Pattern cache data (one pattern = 8 bytes) */ + /* byte0 <-> p0 p1 p2 p3 p4 p5 p6 p7 <-> byte7 (hflip = 0) */ + /* byte0 <-> p7 p6 p5 p4 p3 p2 p1 p0 <-> byte7 (hflip = 1) */ + dst[0x00000 | (y << 3) | (x)] = (c); /* vflip=0 & hflip=0 */ + dst[0x08000 | (y << 3) | (x ^ 7)] = (c); /* vflip=0 & hflip=1 */ + dst[0x10000 | ((y ^ 7) << 3) | (x)] = (c); /* vflip=1 & hflip=0 */ + dst[0x18000 | ((y ^ 7) << 3) | (x ^ 7)] = (c); /* vflip=1 & hflip=1 */ + + /* Next pixel */ + bp = bp >> 4; + } + } + } + + /* Clear modified pattern flag */ + bg_name_dirty[name] = 0; + } +} + +void update_bg_pattern_cache_m5(int index) +{ + int i; + uint8 x, y, c; + uint8 *dst; + uint16 name; + uint32 bp; + + for(i = 0; i < index; i++) + { + /* Get modified pattern name index */ + name = bg_name_list[i]; + + /* Check modified lines */ + for(y = 0; y < 8; y ++) + { + if(bg_name_dirty[name] & (1 << y)) + { + /* Pattern cache base address */ + dst = &bg_pattern_cache[name << 6]; + + /* Byteplane data (one pattern = 4 bytes) */ + /* LIT_ENDIAN: byte0 (lsb) p2p3 p0p1 p6p7 p4p5 (msb) byte3 */ + /* BIG_ENDIAN: byte0 (msb) p0p1 p2p3 p4p5 p6p7 (lsb) byte3 */ + bp = *(uint32 *)&vram[(name << 5) | (y << 2)]; + + /* Update cached line (8 pixels = 8 bytes) */ + for(x = 0; x < 8; x ++) + { + /* Extract pixel data */ + c = bp & 0x0F; + + /* Pattern cache data (one pattern = 8 bytes) */ + /* byte0 <-> p0 p1 p2 p3 p4 p5 p6 p7 <-> byte7 (hflip = 0) */ + /* byte0 <-> p7 p6 p5 p4 p3 p2 p1 p0 <-> byte7 (hflip = 1) */ +#ifdef LSB_FIRST + /* Byteplane data = (msb) p4p5 p6p7 p0p1 p2p3 (lsb) */ + dst[0x00000 | (y << 3) | (x ^ 3)] = (c); /* vflip=0, hflip=0 */ + dst[0x20000 | (y << 3) | (x ^ 4)] = (c); /* vflip=0, hflip=1 */ + dst[0x40000 | ((y ^ 7) << 3) | (x ^ 3)] = (c); /* vflip=1, hflip=0 */ + dst[0x60000 | ((y ^ 7) << 3) | (x ^ 4)] = (c); /* vflip=1, hflip=1 */ +#else + /* Byteplane data = (msb) p0p1 p2p3 p4p5 p6p7 (lsb) */ + dst[0x00000 | (y << 3) | (x ^ 7)] = (c); /* vflip=0, hflip=0 */ + dst[0x20000 | (y << 3) | (x)] = (c); /* vflip=0, hflip=1 */ + dst[0x40000 | ((y ^ 7) << 3) | (x ^ 7)] = (c); /* vflip=1, hflip=0 */ + dst[0x60000 | ((y ^ 7) << 3) | (x)] = (c); /* vflip=1, hflip=1 */ +#endif + /* Next pixel */ + bp = bp >> 4; + } + } + } + + /* Clear modified pattern flag */ + bg_name_dirty[name] = 0; + } +} + + +/*--------------------------------------------------------------------------*/ +/* Window & Plane A clipping update function (Mode 5) */ +/*--------------------------------------------------------------------------*/ + +void window_clip(unsigned int data, unsigned int sw) +{ + /* Window size and invert flags */ + int hp = (data & 0x1f); + int hf = (data >> 7) & 1; + + /* Perform horizontal clipping; the results are applied in reverse + if the horizontal inversion flag is set + */ + int a = hf; + int w = hf ^ 1; + + /* Display width (16 or 20 columns) */ + sw = 16 + (sw << 2); + + if(hp) + { + if(hp > sw) + { + /* Plane W takes up entire line */ + clip[w].left = 0; + clip[w].right = sw; + clip[w].enable = 1; + clip[a].enable = 0; + } + else + { + /* Plane W takes left side, Plane A takes right side */ + clip[w].left = 0; + clip[a].right = sw; + clip[a].left = clip[w].right = hp; + clip[0].enable = clip[1].enable = 1; + } + } + else + { + /* Plane A takes up entire line */ + clip[a].left = 0; + clip[a].right = sw; + clip[a].enable = 1; + clip[w].enable = 0; + } +} + + +/*--------------------------------------------------------------------------*/ +/* Init, reset routines */ +/*--------------------------------------------------------------------------*/ + +void render_init(void) +{ + int bx, ax; + + /* Initialize layers priority pixel look-up tables */ + uint16 index; + for (bx = 0; bx < 0x100; bx++) + { + for (ax = 0; ax < 0x100; ax++) + { + index = (bx << 8) | (ax); + + lut[0][index] = make_lut_bg(bx, ax); + lut[1][index] = make_lut_bgobj(bx, ax); + lut[2][index] = make_lut_bg_ste(bx, ax); + lut[3][index] = make_lut_obj(bx, ax); + lut[4][index] = make_lut_bgobj_ste(bx, ax); + lut[5][index] = make_lut_bgobj_m4(bx,ax); + } + } + + /* Initialize pixel color look-up tables */ + palette_init(); + + /* Make sprite pattern name index look-up table (Mode 5) */ + make_name_lut(); + + /* Make bitplane to pixel look-up table (Mode 4) */ + make_bp_lut(); +} + +void render_reset(void) +{ + /* Clear display bitmap */ + memset(bitmap.data, 0, bitmap.pitch * bitmap.height); + + /* Clear line buffers */ + memset(linebuf, 0, sizeof(linebuf)); + + /* Clear color palettes */ + memset(pixel, 0, sizeof(pixel)); + + /* Clear pattern cache */ + memset ((char *) bg_pattern_cache, 0, sizeof (bg_pattern_cache)); + + /* Reset Sprite infos */ + spr_ovr = spr_col = object_count[0] = object_count[1] = 0; +} + + +/*--------------------------------------------------------------------------*/ +/* Line rendering functions */ +/*--------------------------------------------------------------------------*/ + +void render_line(int line) +{ + /* Check display status */ + if (reg[1] & 0x40) + { + /* Update pattern cache */ + if (bg_list_index) + { + update_bg_pattern_cache(bg_list_index); + bg_list_index = 0; + } + + /* Render BG layer(s) */ + render_bg(line); + + /* Render sprite layer */ + render_obj(line & 1); + + /* Left-most column blanking */ + if (reg[0] & 0x20) + { + if (system_hw > SYSTEM_SG) + { + memset(&linebuf[0][0x20], 0x40, 8); + } + } + + /* Parse sprites for next line */ + if (line < (bitmap.viewport.h - 1)) + { + parse_satb(line); + } + + /* Horizontal borders */ + if (bitmap.viewport.x > 0) + { + memset(&linebuf[0][0x20 - bitmap.viewport.x], 0x40, bitmap.viewport.x); + memset(&linebuf[0][0x20 + bitmap.viewport.w], 0x40, bitmap.viewport.x); + } + } + else + { + /* Master System & Game Gear VDP specific */ + if (system_hw < SYSTEM_MD) + { + /* Update SOVR flag */ + status |= spr_ovr; + spr_ovr = 0; + + /* Sprites are still parsed when display is disabled */ + parse_satb(line); + } + + /* Blanked line */ + memset(&linebuf[0][0x20 - bitmap.viewport.x], 0x40, bitmap.viewport.w + 2*bitmap.viewport.x); + } + + /* Pixel color remapping */ + remap_line(line); +} + +void blank_line(int line, int offset, int width) +{ + memset(&linebuf[0][0x20 + offset], 0x40, width); + remap_line(line); +} + +void remap_line(int line) +{ + /* Line width */ + int width = bitmap.viewport.w + 2*bitmap.viewport.x; + + /* Pixel line buffer */ + uint8 *src = &linebuf[0][0x20 - bitmap.viewport.x]; + + /* Adjust line offset in framebuffer */ + line = (line + bitmap.viewport.y) % lines_per_frame; + + /* Take care of Game Gear reduced screen when overscan is disabled */ + if (line < 0) return; + + /* Adjust for interlaced output */ + if (interlaced && config.render) + { + line = (line * 2) + odd_frame; + } + + /* NTSC Filter (only supported for 15 or 16-bit pixels rendering) */ +#if defined(USE_15BPP_RENDERING) || defined(USE_16BPP_RENDERING) + if (config.ntsc) + { + if (reg[12] & 0x01) + { + md_ntsc_blit(md_ntsc, ( MD_NTSC_IN_T const * )pixel, src, width, line); + } + else + { + sms_ntsc_blit(sms_ntsc, ( SMS_NTSC_IN_T const * )pixel, src, width, line); + } + } + else +#endif + { + /* Convert VDP pixel data to output pixel format */ +#ifdef CUSTOM_BLITTER + CUSTOM_BLITTER(line, width, pixel, src) +#else + PIXEL_OUT_T *dst =((PIXEL_OUT_T *)&bitmap.data[(line * bitmap.pitch)]); + do + { + *dst++ = pixel[*src++]; + } + while (--width); +#endif + } +} diff --git a/genplus-gx/core/vdp_render.h b/genplus-gx/core/vdp_render.h new file mode 100644 index 0000000000..9ce924c84a --- /dev/null +++ b/genplus-gx/core/vdp_render.h @@ -0,0 +1,88 @@ +/*************************************************************************************** + * Genesis Plus + * Video Display Processor (Modes 0, 1, 2, 3, 4 & 5 rendering) + * + * Support for SG-1000, Master System (315-5124 & 315-5246), Game Gear & Mega Drive VDP + * + * Copyright (C) 1998-2007 Charles Mac Donald (original code) + * Copyright (C) 2007-2013 Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _RENDER_H_ +#define _RENDER_H_ + +/* Global variables */ +extern uint16 spr_col; + +/* Function prototypes */ +extern void render_init(void); +extern void render_reset(void); +extern void render_line(int line); +extern void blank_line(int line, int offset, int width); +extern void remap_line(int line); +extern void window_clip(unsigned int data, unsigned int sw); +extern void render_bg_m0(int line); +extern void render_bg_m1(int line); +extern void render_bg_m1x(int line); +extern void render_bg_m2(int line); +extern void render_bg_m3(int line); +extern void render_bg_m3x(int line); +extern void render_bg_inv(int line); +extern void render_bg_m4(int line); +extern void render_bg_m5(int line); +extern void render_bg_m5_vs(int line); +extern void render_bg_m5_im2(int line); +extern void render_bg_m5_im2_vs(int line); +extern void render_obj_tms(int line); +extern void render_obj_m4(int line); +extern void render_obj_m5(int line); +extern void render_obj_m5_ste(int line); +extern void render_obj_m5_im2(int line); +extern void render_obj_m5_im2_ste(int line); +extern void parse_satb_tms(int line); +extern void parse_satb_m4(int line); +extern void parse_satb_m5(int line); +extern void update_bg_pattern_cache_m4(int index); +extern void update_bg_pattern_cache_m5(int index); +extern void color_update_m4(int index, unsigned int data); +extern void color_update_m5(int index, unsigned int data); + +/* Function pointers */ +extern void (*render_bg)(int line); +extern void (*render_obj)(int line); +extern void (*parse_satb)(int line); +extern void (*update_bg_pattern_cache)(int index); + +#endif /* _RENDER_H_ */ + diff --git a/genplus-gx/core/z80/osd_cpu.h b/genplus-gx/core/z80/osd_cpu.h new file mode 100644 index 0000000000..5f5e5af834 --- /dev/null +++ b/genplus-gx/core/z80/osd_cpu.h @@ -0,0 +1,47 @@ +/******************************************************************************* +* * +* Define size independent data types and operations. * +* * +* The following types must be supported by all platforms: * +* * +* UINT8 - Unsigned 8-bit Integer INT8 - Signed 8-bit integer * +* UINT16 - Unsigned 16-bit Integer INT16 - Signed 16-bit integer * +* UINT32 - Unsigned 32-bit Integer INT32 - Signed 32-bit integer * +* * +*******************************************************************************/ + +#ifndef OSD_CPU_H +#define OSD_CPU_H + +#undef TRUE +#undef FALSE +#define TRUE 1 +#define FALSE 0 + +typedef unsigned char UINT8; +typedef unsigned short UINT16; +typedef unsigned int UINT32; +typedef signed char INT8; +typedef signed short INT16; +typedef signed int INT32; + +/****************************************************************************** + * Union of UINT8, UINT16 and UINT32 in native endianess of the target + * This is used to access bytes and words in a machine independent manner. + * The upper bytes h2 and h3 normally contain zero (16 bit CPU cores) + * thus PAIR.d can be used to pass arguments to the memory system + * which expects 'int' really. + ******************************************************************************/ + +typedef union { +#ifdef LSB_FIRST + struct { UINT8 l,h,h2,h3; } b; + struct { UINT16 l,h; } w; +#else + struct { UINT8 h3,h2,h,l; } b; + struct { UINT16 h,l; } w; +#endif + UINT32 d; +} PAIR; + +#endif /* defined OSD_CPU_H */ diff --git a/genplus-gx/core/z80/z80.c b/genplus-gx/core/z80/z80.c new file mode 100644 index 0000000000..7a1754df46 --- /dev/null +++ b/genplus-gx/core/z80/z80.c @@ -0,0 +1,3457 @@ +/***************************************************************************** + * + * z80.c + * Portable Z80 emulator V3.9 + * + * Copyright Juergen Buchmueller, all rights reserved. + * + * - This source code is released as freeware for non-commercial purposes. + * - You are free to use and redistribute this code in modified or + * unmodified form, provided you list me in the credits. + * - If you modify this source code, you must add a notice to each modified + * source file that it has been changed. If you're a nice person, you + * will clearly mark each change too. :) + * - If you wish to use this for commercial purposes, please contact me at + * pullmoll@t-online.de + * - The author of this copywritten work reserves the right to change the + * terms of its usage and license at any time, including retroactively + * - This entire notice must remain in the source code. + * + * TODO: + * - If LD A,I or LD A,R is interrupted, P/V flag gets reset, even if IFF2 + * was set before this instruction + * - Ideally, the tiny differences between Z80 types should be supported, + * currently known differences: + * - LD A,I/R P/V flag reset glitch is fixed on CMOS Z80 + * - OUT (C),0 outputs 0 on NMOS Z80, $FF on CMOS Z80 + * - SCF/CCF X/Y flags is ((flags | A) & 0x28) on SGS/SHARP/ZiLOG NMOS Z80, + * (flags & A & 0x28) on NEC NMOS Z80, other models unknown. + * However, people from the Speccy scene mention that SCF/CCF X/Y results + * are inconsistant and may be influenced by I and R registers. + * This Z80 emulator assumes a ZiLOG NMOS model. + * + * Additional changes [Eke-Eke]: + * - Removed z80_burn function (unused) + * - Discarded multi-chip support (unused) + * - Fixed cycle counting for FD and DD prefixed instructions + * - Fixed behavior of chained FD and DD prefixes (R register should be only incremented by one + * - Implemented cycle-accurate INI/IND (needed by SMS emulation) + * - Fixed Z80 reset + * - Made SZHVC_add & SZHVC_sub tables statically allocated + * Changes in 3.9: + * - Fixed cycle counts for LD IYL/IXL/IYH/IXH,n [Marshmellow] + * - Fixed X/Y flags in CCF/SCF/BIT, ZEXALL is happy now [hap] + * - Simplified DAA, renamed MEMPTR (3.8) to WZ, added TODO [hap] + * - Fixed IM2 interrupt cycles [eke] + * Changes in 3.8 [Miodrag Milanovic]: + * - Added MEMPTR register (according to informations provided + * by Vladimir Kladov + * - BIT n,(HL) now return valid values due to use of MEMPTR + * - Fixed BIT 6,(XY+o) undocumented instructions + * Changes in 3.7 [Aaron Giles]: + * - Changed NMI handling. NMIs are now latched in set_irq_state + * but are not taken there. Instead they are taken at the start of the + * execute loop. + * - Changed IRQ handling. IRQ state is set in set_irq_state but not taken + * except during the inner execute loop. + * - Removed x86 assembly hacks and obsolete timing loop catchers. + * Changes in 3.6: + * - Got rid of the code that would inexactly emulate a Z80, i.e. removed + * all the #if Z80_EXACT #else branches. + * - Removed leading underscores from local register name shortcuts as + * this violates the C99 standard. + * - Renamed the registers inside the Z80 context to lower case to avoid + * ambiguities (shortcuts would have had the same names as the fields + * of the structure). + * Changes in 3.5: + * - Implemented OTIR, INIR, etc. without look-up table for PF flag. + * [Ramsoft, Sean Young] + * Changes in 3.4: + * - Removed Z80-MSX specific code as it's not needed any more. + * - Implemented DAA without look-up table [Ramsoft, Sean Young] + * Changes in 3.3: + * - Fixed undocumented flags XF & YF in the non-asm versions of CP, + * and all the 16 bit arithmetic instructions. [Sean Young] + * Changes in 3.2: + * - Fixed undocumented flags XF & YF of RRCA, and CF and HF of + * INI/IND/OUTI/OUTD/INIR/INDR/OTIR/OTDR [Sean Young] + * Changes in 3.1: + * - removed the REPEAT_AT_ONCE execution of LDIR/CPIR etc. opcodes + * for readabilities sake and because the implementation was buggy + * (and I was not able to find the difference) + * Changes in 3.0: + * - 'finished' switch to dynamically overrideable cycle count tables + * Changes in 2.9: + * - added methods to access and override the cycle count tables + * - fixed handling and timing of multiple DD/FD prefixed opcodes + * Changes in 2.8: + * - OUTI/OUTD/OTIR/OTDR also pre-decrement the B register now. + * This was wrong because of a bug fix on the wrong side + * (astrocade sound driver). + * Changes in 2.7: + * - removed z80_vm specific code, it's not needed (and never was). + * Changes in 2.6: + * - BUSY_LOOP_HACKS needed to call change_pc() earlier, before + * checking the opcodes at the new address, because otherwise they + * might access the old (wrong or even NULL) banked memory region. + * Thanks to Sean Young for finding this nasty bug. + * Changes in 2.5: + * - Burning cycles always adjusts the ICount by a multiple of 4. + * - In REPEAT_AT_ONCE cases the R register wasn't incremented twice + * per repetition as it should have been. Those repeated opcodes + * could also underflow the ICount. + * - Simplified TIME_LOOP_HACKS for BC and added two more for DE + HL + * timing loops. I think those hacks weren't endian safe before too. + * Changes in 2.4: + * - z80_reset zaps the entire context, sets IX and IY to 0xffff(!) and + * sets the Z flag. With these changes the Tehkan World Cup driver + * _seems_ to work again. + * Changes in 2.3: + * - External termination of the execution loop calls z80_burn() and + * z80_vm_burn() to burn an amount of cycles (R adjustment) + * - Shortcuts which burn CPU cycles (BUSY_LOOP_HACKS and TIME_LOOP_HACKS) + * now also adjust the R register depending on the skipped opcodes. + * Changes in 2.2: + * - Fixed bugs in CPL, SCF and CCF instructions flag handling. + * - Changed variable EA and ARG16() function to UINT32; this + * produces slightly more efficient code. + * - The DD/FD XY CB opcodes where XY is 40-7F and Y is not 6/E + * are changed to calls to the X6/XE opcodes to reduce object size. + * They're hardly ever used so this should not yield a speed penalty. + * New in 2.0: + * - Optional more exact Z80 emulation (#define Z80_EXACT 1) according + * to a detailed description by Sean Young which can be found at: + * http://www.msxnet.org/tech/z80-documented.pdf + *****************************************************************************/ +#include "shared.h" +#include "z80.h" + +/* execute main opcodes inside a big switch statement */ +#define BIG_SWITCH 1 + +#define VERBOSE 0 + +#if VERBOSE +#define LOG(x) logerror x +#else +#define LOG(x) +#endif + +#define cpu_readop(a) z80_readmap[(a) >> 10][(a) & 0x03FF] +#define cpu_readop_arg(a) z80_readmap[(a) >> 10][(a) & 0x03FF] + +#define CF 0x01 +#define NF 0x02 +#define PF 0x04 +#define VF PF +#define XF 0x08 +#define HF 0x10 +#define YF 0x20 +#define ZF 0x40 +#define SF 0x80 + +#define INT_IRQ 0x01 +#define NMI_IRQ 0x02 + +#define PCD Z80.pc.d +#define PC Z80.pc.w.l + +#define SPD Z80.sp.d +#define SP Z80.sp.w.l + +#define AFD Z80.af.d +#define AF Z80.af.w.l +#define A Z80.af.b.h +#define F Z80.af.b.l + +#define BCD Z80.bc.d +#define BC Z80.bc.w.l +#define B Z80.bc.b.h +#define C Z80.bc.b.l + +#define DED Z80.de.d +#define DE Z80.de.w.l +#define D Z80.de.b.h +#define E Z80.de.b.l + +#define HLD Z80.hl.d +#define HL Z80.hl.w.l +#define H Z80.hl.b.h +#define L Z80.hl.b.l + +#define IXD Z80.ix.d +#define IX Z80.ix.w.l +#define HX Z80.ix.b.h +#define LX Z80.ix.b.l + +#define IYD Z80.iy.d +#define IY Z80.iy.w.l +#define HY Z80.iy.b.h +#define LY Z80.iy.b.l + +#define WZ Z80.wz.w.l +#define WZ_H Z80.wz.b.h +#define WZ_L Z80.wz.b.l + +#define I Z80.i +#define R Z80.r +#define R2 Z80.r2 +#define IM Z80.im +#define IFF1 Z80.iff1 +#define IFF2 Z80.iff2 +#define HALT Z80.halt + +Z80_Regs Z80; + +unsigned char *z80_readmap[64]; +unsigned char *z80_writemap[64]; + +void (*z80_writemem)(unsigned int address, unsigned char data); +unsigned char (*z80_readmem)(unsigned int address); +void (*z80_writeport)(unsigned int port, unsigned char data); +unsigned char (*z80_readport)(unsigned int port); + +static UINT32 EA; + +static UINT8 SZ[256]; /* zero and sign flags */ +static UINT8 SZ_BIT[256]; /* zero, sign and parity/overflow (=zero) flags for BIT opcode */ +static UINT8 SZP[256]; /* zero, sign and parity flags */ +static UINT8 SZHV_inc[256]; /* zero, sign, half carry and overflow flags INC r8 */ +static UINT8 SZHV_dec[256]; /* zero, sign, half carry and overflow flags DEC r8 */ + +static UINT8 SZHVC_add[2*256*256]; /* flags for ADD opcode */ +static UINT8 SZHVC_sub[2*256*256]; /* flags for SUB opcode */ + +static const UINT16 cc_op[0x100] = { + 4*15,10*15, 7*15, 6*15, 4*15, 4*15, 7*15, 4*15, 4*15,11*15, 7*15, 6*15, 4*15, 4*15, 7*15, 4*15, + 8*15,10*15, 7*15, 6*15, 4*15, 4*15, 7*15, 4*15,12*15,11*15, 7*15, 6*15, 4*15, 4*15, 7*15, 4*15, + 7*15,10*15,16*15, 6*15, 4*15, 4*15, 7*15, 4*15, 7*15,11*15,16*15, 6*15, 4*15, 4*15, 7*15, 4*15, + 7*15,10*15,13*15, 6*15,11*15,11*15,10*15, 4*15, 7*15,11*15,13*15, 6*15, 4*15, 4*15, 7*15, 4*15, + 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 7*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 7*15, 4*15, + 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 7*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 7*15, 4*15, + 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 7*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 7*15, 4*15, + 7*15, 7*15, 7*15, 7*15, 7*15, 7*15, 4*15, 7*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 7*15, 4*15, + 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 7*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 7*15, 4*15, + 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 7*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 7*15, 4*15, + 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 7*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 7*15, 4*15, + 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 7*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 7*15, 4*15, + 5*15,10*15,10*15,10*15,10*15,11*15, 7*15,11*15, 5*15,10*15,10*15, 0*15,10*15,17*15, 7*15,11*15, + 5*15,10*15,10*15,11*15,10*15,11*15, 7*15,11*15, 5*15, 4*15,10*15,11*15,10*15, 0*15, 7*15,11*15, + 5*15,10*15,10*15,19*15,10*15,11*15, 7*15,11*15, 5*15, 4*15,10*15, 4*15,10*15, 0*15, 7*15,11*15, + 5*15,10*15,10*15, 4*15,10*15,11*15, 7*15,11*15, 5*15, 6*15,10*15, 4*15,10*15, 0*15, 7*15,11*15}; + +static const UINT16 cc_cb[0x100] = { + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,12*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,12*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,12*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,12*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,12*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,12*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,12*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,12*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15,15*15, 8*15}; + +static const UINT16 cc_ed[0x100] = { + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, + 12*15,12*15,15*15,20*15, 8*15,14*15, 8*15, 9*15,12*15,12*15,15*15,20*15, 8*15,14*15, 8*15, 9*15, + 12*15,12*15,15*15,20*15, 8*15,14*15, 8*15, 9*15,12*15,12*15,15*15,20*15, 8*15,14*15, 8*15, 9*15, + 12*15,12*15,15*15,20*15, 8*15,14*15, 8*15,18*15,12*15,12*15,15*15,20*15, 8*15,14*15, 8*15,18*15, + 12*15,12*15,15*15,20*15, 8*15,14*15, 8*15, 8*15,12*15,12*15,15*15,20*15, 8*15,14*15, 8*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, + 16*15,16*15,16*15,16*15, 8*15, 8*15, 8*15, 8*15,16*15,16*15,16*15,16*15, 8*15, 8*15, 8*15, 8*15, + 16*15,16*15,16*15,16*15, 8*15, 8*15, 8*15, 8*15,16*15,16*15,16*15,16*15, 8*15, 8*15, 8*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15, 8*15}; + +/*static const UINT8 cc_xy[0x100] = { + 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15,15*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, + 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15,15*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, + 4*15,14*15,20*15,10*15, 9*15, 9*15,11*15, 4*15, 4*15,15*15,20*15,10*15, 9*15, 9*15,11*15, 4*15, + 4*15, 4*15, 4*15, 4*15,23*15,23*15,19*15, 4*15, 4*15,15*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, + 4*15, 4*15, 4*15, 4*15, 9*15, 9*15,19*15, 4*15, 4*15, 4*15, 4*15, 4*15, 9*15, 9*15,19*15, 4*15, + 4*15, 4*15, 4*15, 4*15, 9*15, 9*15,19*15, 4*15, 4*15, 4*15, 4*15, 4*15, 9*15, 9*15,19*15, 4*15, + 9*15, 9*15, 9*15, 9*15, 9*15, 9*15,19*15, 9*15, 9*15, 9*15, 9*15, 9*15, 9*15, 9*15,19*15, 9*15, +19*15,19*15,19*15,19*15,19*15,19*15, 4*15,19*15, 4*15, 4*15, 4*15, 4*15, 9*15, 9*15,19*15, 4*15, + 4*15, 4*15, 4*15, 4*15, 9*15, 9*15,19*15, 4*15, 4*15, 4*15, 4*15, 4*15, 9*15, 9*15,19*15, 4*15, + 4*15, 4*15, 4*15, 4*15, 9*15, 9*15,19*15, 4*15, 4*15, 4*15, 4*15, 4*15, 9*15, 9*15,19*15, 4*15, + 4*15, 4*15, 4*15, 4*15, 9*15, 9*15,19*15, 4*15, 4*15, 4*15, 4*15, 4*15, 9*15, 9*15,19*15, 4*15, + 4*15, 4*15, 4*15, 4*15, 9*15, 9*15,19*15, 4*15, 4*15, 4*15, 4*15, 4*15, 9*15, 9*15,19*15, 4*15, + 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 0*15, 4*15, 4*15, 4*15, 4*15, + 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, + 4*15,14*15, 4*15,23*15, 4*15,15*15, 4*15, 4*15, 4*15, 8*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, + 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15,10*15, 4*15, 4*15, 4*15, 4*15, 4*15, 4*15}; +*/ + +/* illegal combo should return 4 + cc_op[i] */ +static const UINT16 cc_xy[0x100] ={ + 8*15,14*15,11*15,10*15, 8*15, 8*15,11*15, 8*15, 8*15,15*15,11*15,10*15, 8*15, 8*15,11*15, 8*15, + 12*15,14*15,11*15,10*15, 8*15, 8*15,11*15, 8*15,16*15,15*15,11*15,10*15, 8*15, 8*15,11*15, 8*15, + 11*15,14*15,20*15,10*15, 9*15, 9*15,12*15, 8*15,11*15,15*15,20*15,10*15, 9*15, 9*15,12*15, 8*15, + 11*15,14*15,17*15,10*15,23*15,23*15,19*15, 8*15,11*15,15*15,17*15,10*15, 8*15, 8*15,11*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 9*15, 9*15,19*15, 8*15, 8*15, 8*15, 8*15, 8*15, 9*15, 9*15,19*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 9*15, 9*15,19*15, 8*15, 8*15, 8*15, 8*15, 8*15, 9*15, 9*15,19*15, 8*15, + 9*15, 9*15, 9*15, 9*15, 9*15, 9*15,19*15, 9*15, 9*15, 9*15, 9*15, 9*15, 9*15, 9*15,19*15, 9*15, + 19*15,19*15,19*15,19*15,19*15,19*15, 8*15,19*15, 8*15, 8*15, 8*15, 8*15, 9*15, 9*15,19*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 9*15, 9*15,19*15, 8*15, 8*15, 8*15, 8*15, 8*15, 9*15, 9*15,19*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 9*15, 9*15,19*15, 8*15, 8*15, 8*15, 8*15, 8*15, 9*15, 9*15,19*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 9*15, 9*15,19*15, 8*15, 8*15, 8*15, 8*15, 8*15, 9*15, 9*15,19*15, 8*15, + 8*15, 8*15, 8*15, 8*15, 9*15, 9*15,19*15, 8*15, 8*15, 8*15, 8*15, 8*15, 9*15, 9*15,19*15, 8*15, + 9*15,14*15,14*15,14*15,14*15,15*15,11*15,15*15, 9*15,14*15,14*15, 0*15,14*15,21*15,11*15,15*15, + 9*15,14*15,14*15,15*15,14*15,15*15,11*15,15*15, 9*15, 8*15,14*15,15*15,14*15, 4*15,11*15,15*15, + 9*15,14*15,14*15,23*15,14*15,15*15,11*15,15*15, 9*15, 8*15,14*15, 8*15,14*15, 4*15,11*15,15*15, + 9*15,14*15,14*15, 8*15,14*15,15*15,11*15,15*15, 9*15,10*15,14*15, 8*15,14*15, 4*15,11*15,15*15}; + +static const UINT16 cc_xycb[0x100] = { + 23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15, + 23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15, + 23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15, + 23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15, + 20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15, + 20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15, + 20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15, + 20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15,20*15, + 23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15, + 23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15, + 23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15, + 23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15, + 23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15, + 23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15, + 23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15, + 23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15,23*15}; + +/* extra cycles if jr/jp/call taken and 'interrupt latency' on rst 0-7 */ +static const UINT16 cc_ex[0x100] = { + 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, + 5*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, /* DJNZ */ + 5*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 5*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, /* JR NZ/JR Z */ + 5*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 5*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, /* JR NC/JR C */ + 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, + 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, + 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, + 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, + 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, + 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, + 0*15, 0*15, 4*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 0*15, 4*15, 0*15, 0*15, 0*15, 0*15, 0*15, /* INI/IND (cycle-accurate I/O port reads) */ + 5*15, 5*15, 5*15, 5*15, 0*15, 0*15, 0*15, 0*15, 5*15, 5*15, 5*15, 5*15, 0*15, 0*15, 0*15, 0*15, /* LDIR/CPIR/INIR/OTIR LDDR/CPDR/INDR/OTDR */ + 6*15, 0*15, 0*15, 0*15, 7*15, 0*15, 0*15, 2*15, 6*15, 0*15, 0*15, 0*15, 7*15, 0*15, 0*15, 2*15, + 6*15, 0*15, 0*15, 0*15, 7*15, 0*15, 0*15, 2*15, 6*15, 0*15, 0*15, 0*15, 7*15, 0*15, 0*15, 2*15, + 6*15, 0*15, 0*15, 0*15, 7*15, 0*15, 0*15, 2*15, 6*15, 0*15, 0*15, 0*15, 7*15, 0*15, 0*15, 2*15, + 6*15, 0*15, 0*15, 0*15, 7*15, 0*15, 0*15, 2*15, 6*15, 0*15, 0*15, 0*15, 7*15, 0*15, 0*15, 2*15}; + +static const UINT16 *cc[6]; +#define Z80_TABLE_dd Z80_TABLE_xy +#define Z80_TABLE_fd Z80_TABLE_xy + +typedef void (*funcptr)(void); + +#define PROTOTYPES(tablename,prefix) \ + INLINE void prefix##_00(void); INLINE void prefix##_01(void); INLINE void prefix##_02(void); INLINE void prefix##_03(void); \ + INLINE void prefix##_04(void); INLINE void prefix##_05(void); INLINE void prefix##_06(void); INLINE void prefix##_07(void); \ + INLINE void prefix##_08(void); INLINE void prefix##_09(void); INLINE void prefix##_0a(void); INLINE void prefix##_0b(void); \ + INLINE void prefix##_0c(void); INLINE void prefix##_0d(void); INLINE void prefix##_0e(void); INLINE void prefix##_0f(void); \ + INLINE void prefix##_10(void); INLINE void prefix##_11(void); INLINE void prefix##_12(void); INLINE void prefix##_13(void); \ + INLINE void prefix##_14(void); INLINE void prefix##_15(void); INLINE void prefix##_16(void); INLINE void prefix##_17(void); \ + INLINE void prefix##_18(void); INLINE void prefix##_19(void); INLINE void prefix##_1a(void); INLINE void prefix##_1b(void); \ + INLINE void prefix##_1c(void); INLINE void prefix##_1d(void); INLINE void prefix##_1e(void); INLINE void prefix##_1f(void); \ + INLINE void prefix##_20(void); INLINE void prefix##_21(void); INLINE void prefix##_22(void); INLINE void prefix##_23(void); \ + INLINE void prefix##_24(void); INLINE void prefix##_25(void); INLINE void prefix##_26(void); INLINE void prefix##_27(void); \ + INLINE void prefix##_28(void); INLINE void prefix##_29(void); INLINE void prefix##_2a(void); INLINE void prefix##_2b(void); \ + INLINE void prefix##_2c(void); INLINE void prefix##_2d(void); INLINE void prefix##_2e(void); INLINE void prefix##_2f(void); \ + INLINE void prefix##_30(void); INLINE void prefix##_31(void); INLINE void prefix##_32(void); INLINE void prefix##_33(void); \ + INLINE void prefix##_34(void); INLINE void prefix##_35(void); INLINE void prefix##_36(void); INLINE void prefix##_37(void); \ + INLINE void prefix##_38(void); INLINE void prefix##_39(void); INLINE void prefix##_3a(void); INLINE void prefix##_3b(void); \ + INLINE void prefix##_3c(void); INLINE void prefix##_3d(void); INLINE void prefix##_3e(void); INLINE void prefix##_3f(void); \ + INLINE void prefix##_40(void); INLINE void prefix##_41(void); INLINE void prefix##_42(void); INLINE void prefix##_43(void); \ + INLINE void prefix##_44(void); INLINE void prefix##_45(void); INLINE void prefix##_46(void); INLINE void prefix##_47(void); \ + INLINE void prefix##_48(void); INLINE void prefix##_49(void); INLINE void prefix##_4a(void); INLINE void prefix##_4b(void); \ + INLINE void prefix##_4c(void); INLINE void prefix##_4d(void); INLINE void prefix##_4e(void); INLINE void prefix##_4f(void); \ + INLINE void prefix##_50(void); INLINE void prefix##_51(void); INLINE void prefix##_52(void); INLINE void prefix##_53(void); \ + INLINE void prefix##_54(void); INLINE void prefix##_55(void); INLINE void prefix##_56(void); INLINE void prefix##_57(void); \ + INLINE void prefix##_58(void); INLINE void prefix##_59(void); INLINE void prefix##_5a(void); INLINE void prefix##_5b(void); \ + INLINE void prefix##_5c(void); INLINE void prefix##_5d(void); INLINE void prefix##_5e(void); INLINE void prefix##_5f(void); \ + INLINE void prefix##_60(void); INLINE void prefix##_61(void); INLINE void prefix##_62(void); INLINE void prefix##_63(void); \ + INLINE void prefix##_64(void); INLINE void prefix##_65(void); INLINE void prefix##_66(void); INLINE void prefix##_67(void); \ + INLINE void prefix##_68(void); INLINE void prefix##_69(void); INLINE void prefix##_6a(void); INLINE void prefix##_6b(void); \ + INLINE void prefix##_6c(void); INLINE void prefix##_6d(void); INLINE void prefix##_6e(void); INLINE void prefix##_6f(void); \ + INLINE void prefix##_70(void); INLINE void prefix##_71(void); INLINE void prefix##_72(void); INLINE void prefix##_73(void); \ + INLINE void prefix##_74(void); INLINE void prefix##_75(void); INLINE void prefix##_76(void); INLINE void prefix##_77(void); \ + INLINE void prefix##_78(void); INLINE void prefix##_79(void); INLINE void prefix##_7a(void); INLINE void prefix##_7b(void); \ + INLINE void prefix##_7c(void); INLINE void prefix##_7d(void); INLINE void prefix##_7e(void); INLINE void prefix##_7f(void); \ + INLINE void prefix##_80(void); INLINE void prefix##_81(void); INLINE void prefix##_82(void); INLINE void prefix##_83(void); \ + INLINE void prefix##_84(void); INLINE void prefix##_85(void); INLINE void prefix##_86(void); INLINE void prefix##_87(void); \ + INLINE void prefix##_88(void); INLINE void prefix##_89(void); INLINE void prefix##_8a(void); INLINE void prefix##_8b(void); \ + INLINE void prefix##_8c(void); INLINE void prefix##_8d(void); INLINE void prefix##_8e(void); INLINE void prefix##_8f(void); \ + INLINE void prefix##_90(void); INLINE void prefix##_91(void); INLINE void prefix##_92(void); INLINE void prefix##_93(void); \ + INLINE void prefix##_94(void); INLINE void prefix##_95(void); INLINE void prefix##_96(void); INLINE void prefix##_97(void); \ + INLINE void prefix##_98(void); INLINE void prefix##_99(void); INLINE void prefix##_9a(void); INLINE void prefix##_9b(void); \ + INLINE void prefix##_9c(void); INLINE void prefix##_9d(void); INLINE void prefix##_9e(void); INLINE void prefix##_9f(void); \ + INLINE void prefix##_a0(void); INLINE void prefix##_a1(void); INLINE void prefix##_a2(void); INLINE void prefix##_a3(void); \ + INLINE void prefix##_a4(void); INLINE void prefix##_a5(void); INLINE void prefix##_a6(void); INLINE void prefix##_a7(void); \ + INLINE void prefix##_a8(void); INLINE void prefix##_a9(void); INLINE void prefix##_aa(void); INLINE void prefix##_ab(void); \ + INLINE void prefix##_ac(void); INLINE void prefix##_ad(void); INLINE void prefix##_ae(void); INLINE void prefix##_af(void); \ + INLINE void prefix##_b0(void); INLINE void prefix##_b1(void); INLINE void prefix##_b2(void); INLINE void prefix##_b3(void); \ + INLINE void prefix##_b4(void); INLINE void prefix##_b5(void); INLINE void prefix##_b6(void); INLINE void prefix##_b7(void); \ + INLINE void prefix##_b8(void); INLINE void prefix##_b9(void); INLINE void prefix##_ba(void); INLINE void prefix##_bb(void); \ + INLINE void prefix##_bc(void); INLINE void prefix##_bd(void); INLINE void prefix##_be(void); INLINE void prefix##_bf(void); \ + INLINE void prefix##_c0(void); INLINE void prefix##_c1(void); INLINE void prefix##_c2(void); INLINE void prefix##_c3(void); \ + INLINE void prefix##_c4(void); INLINE void prefix##_c5(void); INLINE void prefix##_c6(void); INLINE void prefix##_c7(void); \ + INLINE void prefix##_c8(void); INLINE void prefix##_c9(void); INLINE void prefix##_ca(void); INLINE void prefix##_cb(void); \ + INLINE void prefix##_cc(void); INLINE void prefix##_cd(void); INLINE void prefix##_ce(void); INLINE void prefix##_cf(void); \ + INLINE void prefix##_d0(void); INLINE void prefix##_d1(void); INLINE void prefix##_d2(void); INLINE void prefix##_d3(void); \ + INLINE void prefix##_d4(void); INLINE void prefix##_d5(void); INLINE void prefix##_d6(void); INLINE void prefix##_d7(void); \ + INLINE void prefix##_d8(void); INLINE void prefix##_d9(void); INLINE void prefix##_da(void); INLINE void prefix##_db(void); \ + INLINE void prefix##_dc(void); INLINE void prefix##_dd(void); INLINE void prefix##_de(void); INLINE void prefix##_df(void); \ + INLINE void prefix##_e0(void); INLINE void prefix##_e1(void); INLINE void prefix##_e2(void); INLINE void prefix##_e3(void); \ + INLINE void prefix##_e4(void); INLINE void prefix##_e5(void); INLINE void prefix##_e6(void); INLINE void prefix##_e7(void); \ + INLINE void prefix##_e8(void); INLINE void prefix##_e9(void); INLINE void prefix##_ea(void); INLINE void prefix##_eb(void); \ + INLINE void prefix##_ec(void); INLINE void prefix##_ed(void); INLINE void prefix##_ee(void); INLINE void prefix##_ef(void); \ + INLINE void prefix##_f0(void); INLINE void prefix##_f1(void); INLINE void prefix##_f2(void); INLINE void prefix##_f3(void); \ + INLINE void prefix##_f4(void); INLINE void prefix##_f5(void); INLINE void prefix##_f6(void); INLINE void prefix##_f7(void); \ + INLINE void prefix##_f8(void); INLINE void prefix##_f9(void); INLINE void prefix##_fa(void); INLINE void prefix##_fb(void); \ + INLINE void prefix##_fc(void); INLINE void prefix##_fd(void); INLINE void prefix##_fe(void); INLINE void prefix##_ff(void); \ +static const funcptr tablename[0x100] = { \ + prefix##_00,prefix##_01,prefix##_02,prefix##_03,prefix##_04,prefix##_05,prefix##_06,prefix##_07, \ + prefix##_08,prefix##_09,prefix##_0a,prefix##_0b,prefix##_0c,prefix##_0d,prefix##_0e,prefix##_0f, \ + prefix##_10,prefix##_11,prefix##_12,prefix##_13,prefix##_14,prefix##_15,prefix##_16,prefix##_17, \ + prefix##_18,prefix##_19,prefix##_1a,prefix##_1b,prefix##_1c,prefix##_1d,prefix##_1e,prefix##_1f, \ + prefix##_20,prefix##_21,prefix##_22,prefix##_23,prefix##_24,prefix##_25,prefix##_26,prefix##_27, \ + prefix##_28,prefix##_29,prefix##_2a,prefix##_2b,prefix##_2c,prefix##_2d,prefix##_2e,prefix##_2f, \ + prefix##_30,prefix##_31,prefix##_32,prefix##_33,prefix##_34,prefix##_35,prefix##_36,prefix##_37, \ + prefix##_38,prefix##_39,prefix##_3a,prefix##_3b,prefix##_3c,prefix##_3d,prefix##_3e,prefix##_3f, \ + prefix##_40,prefix##_41,prefix##_42,prefix##_43,prefix##_44,prefix##_45,prefix##_46,prefix##_47, \ + prefix##_48,prefix##_49,prefix##_4a,prefix##_4b,prefix##_4c,prefix##_4d,prefix##_4e,prefix##_4f, \ + prefix##_50,prefix##_51,prefix##_52,prefix##_53,prefix##_54,prefix##_55,prefix##_56,prefix##_57, \ + prefix##_58,prefix##_59,prefix##_5a,prefix##_5b,prefix##_5c,prefix##_5d,prefix##_5e,prefix##_5f, \ + prefix##_60,prefix##_61,prefix##_62,prefix##_63,prefix##_64,prefix##_65,prefix##_66,prefix##_67, \ + prefix##_68,prefix##_69,prefix##_6a,prefix##_6b,prefix##_6c,prefix##_6d,prefix##_6e,prefix##_6f, \ + prefix##_70,prefix##_71,prefix##_72,prefix##_73,prefix##_74,prefix##_75,prefix##_76,prefix##_77, \ + prefix##_78,prefix##_79,prefix##_7a,prefix##_7b,prefix##_7c,prefix##_7d,prefix##_7e,prefix##_7f, \ + prefix##_80,prefix##_81,prefix##_82,prefix##_83,prefix##_84,prefix##_85,prefix##_86,prefix##_87, \ + prefix##_88,prefix##_89,prefix##_8a,prefix##_8b,prefix##_8c,prefix##_8d,prefix##_8e,prefix##_8f, \ + prefix##_90,prefix##_91,prefix##_92,prefix##_93,prefix##_94,prefix##_95,prefix##_96,prefix##_97, \ + prefix##_98,prefix##_99,prefix##_9a,prefix##_9b,prefix##_9c,prefix##_9d,prefix##_9e,prefix##_9f, \ + prefix##_a0,prefix##_a1,prefix##_a2,prefix##_a3,prefix##_a4,prefix##_a5,prefix##_a6,prefix##_a7, \ + prefix##_a8,prefix##_a9,prefix##_aa,prefix##_ab,prefix##_ac,prefix##_ad,prefix##_ae,prefix##_af, \ + prefix##_b0,prefix##_b1,prefix##_b2,prefix##_b3,prefix##_b4,prefix##_b5,prefix##_b6,prefix##_b7, \ + prefix##_b8,prefix##_b9,prefix##_ba,prefix##_bb,prefix##_bc,prefix##_bd,prefix##_be,prefix##_bf, \ + prefix##_c0,prefix##_c1,prefix##_c2,prefix##_c3,prefix##_c4,prefix##_c5,prefix##_c6,prefix##_c7, \ + prefix##_c8,prefix##_c9,prefix##_ca,prefix##_cb,prefix##_cc,prefix##_cd,prefix##_ce,prefix##_cf, \ + prefix##_d0,prefix##_d1,prefix##_d2,prefix##_d3,prefix##_d4,prefix##_d5,prefix##_d6,prefix##_d7, \ + prefix##_d8,prefix##_d9,prefix##_da,prefix##_db,prefix##_dc,prefix##_dd,prefix##_de,prefix##_df, \ + prefix##_e0,prefix##_e1,prefix##_e2,prefix##_e3,prefix##_e4,prefix##_e5,prefix##_e6,prefix##_e7, \ + prefix##_e8,prefix##_e9,prefix##_ea,prefix##_eb,prefix##_ec,prefix##_ed,prefix##_ee,prefix##_ef, \ + prefix##_f0,prefix##_f1,prefix##_f2,prefix##_f3,prefix##_f4,prefix##_f5,prefix##_f6,prefix##_f7, \ + prefix##_f8,prefix##_f9,prefix##_fa,prefix##_fb,prefix##_fc,prefix##_fd,prefix##_fe,prefix##_ff \ +} + +PROTOTYPES(Z80op,op); +PROTOTYPES(Z80cb,cb); +PROTOTYPES(Z80dd,dd); +PROTOTYPES(Z80ed,ed); +PROTOTYPES(Z80fd,fd); +PROTOTYPES(Z80xycb,xycb); + +/****************************************************************************/ +/* Burn an odd amount of cycles, that is instructions taking something */ +/* different from 4 T-states per opcode (and R increment) */ +/****************************************************************************/ +INLINE void BURNODD(int cycles, int opcodes, int cyclesum) +{ + if( cycles > 0 ) + { + R += (cycles / cyclesum) * opcodes; + Z80.cycles += (cycles / cyclesum) * cyclesum * 15; + } +} + +/*************************************************************** + * define an opcode function + ***************************************************************/ +#define OP(prefix,opcode) INLINE void prefix##_##opcode(void) + +/*************************************************************** + * adjust cycle count by n T-states + ***************************************************************/ +#define CC(prefix,opcode) Z80.cycles += cc[Z80_TABLE_##prefix][opcode] + +/*************************************************************** + * execute an opcode + ***************************************************************/ +#define EXEC(prefix,opcode) \ +{ \ + unsigned op = opcode; \ + CC(prefix,op); \ + (*Z80##prefix[op])(); \ +} + +#if BIG_SWITCH +#define EXEC_INLINE(prefix,opcode) \ +{ \ + unsigned op = opcode; \ + CC(prefix,op); \ + switch(op) \ + { \ + case 0x00:prefix##_##00();break; case 0x01:prefix##_##01();break; case 0x02:prefix##_##02();break; case 0x03:prefix##_##03();break; \ + case 0x04:prefix##_##04();break; case 0x05:prefix##_##05();break; case 0x06:prefix##_##06();break; case 0x07:prefix##_##07();break; \ + case 0x08:prefix##_##08();break; case 0x09:prefix##_##09();break; case 0x0a:prefix##_##0a();break; case 0x0b:prefix##_##0b();break; \ + case 0x0c:prefix##_##0c();break; case 0x0d:prefix##_##0d();break; case 0x0e:prefix##_##0e();break; case 0x0f:prefix##_##0f();break; \ + case 0x10:prefix##_##10();break; case 0x11:prefix##_##11();break; case 0x12:prefix##_##12();break; case 0x13:prefix##_##13();break; \ + case 0x14:prefix##_##14();break; case 0x15:prefix##_##15();break; case 0x16:prefix##_##16();break; case 0x17:prefix##_##17();break; \ + case 0x18:prefix##_##18();break; case 0x19:prefix##_##19();break; case 0x1a:prefix##_##1a();break; case 0x1b:prefix##_##1b();break; \ + case 0x1c:prefix##_##1c();break; case 0x1d:prefix##_##1d();break; case 0x1e:prefix##_##1e();break; case 0x1f:prefix##_##1f();break; \ + case 0x20:prefix##_##20();break; case 0x21:prefix##_##21();break; case 0x22:prefix##_##22();break; case 0x23:prefix##_##23();break; \ + case 0x24:prefix##_##24();break; case 0x25:prefix##_##25();break; case 0x26:prefix##_##26();break; case 0x27:prefix##_##27();break; \ + case 0x28:prefix##_##28();break; case 0x29:prefix##_##29();break; case 0x2a:prefix##_##2a();break; case 0x2b:prefix##_##2b();break; \ + case 0x2c:prefix##_##2c();break; case 0x2d:prefix##_##2d();break; case 0x2e:prefix##_##2e();break; case 0x2f:prefix##_##2f();break; \ + case 0x30:prefix##_##30();break; case 0x31:prefix##_##31();break; case 0x32:prefix##_##32();break; case 0x33:prefix##_##33();break; \ + case 0x34:prefix##_##34();break; case 0x35:prefix##_##35();break; case 0x36:prefix##_##36();break; case 0x37:prefix##_##37();break; \ + case 0x38:prefix##_##38();break; case 0x39:prefix##_##39();break; case 0x3a:prefix##_##3a();break; case 0x3b:prefix##_##3b();break; \ + case 0x3c:prefix##_##3c();break; case 0x3d:prefix##_##3d();break; case 0x3e:prefix##_##3e();break; case 0x3f:prefix##_##3f();break; \ + case 0x40:prefix##_##40();break; case 0x41:prefix##_##41();break; case 0x42:prefix##_##42();break; case 0x43:prefix##_##43();break; \ + case 0x44:prefix##_##44();break; case 0x45:prefix##_##45();break; case 0x46:prefix##_##46();break; case 0x47:prefix##_##47();break; \ + case 0x48:prefix##_##48();break; case 0x49:prefix##_##49();break; case 0x4a:prefix##_##4a();break; case 0x4b:prefix##_##4b();break; \ + case 0x4c:prefix##_##4c();break; case 0x4d:prefix##_##4d();break; case 0x4e:prefix##_##4e();break; case 0x4f:prefix##_##4f();break; \ + case 0x50:prefix##_##50();break; case 0x51:prefix##_##51();break; case 0x52:prefix##_##52();break; case 0x53:prefix##_##53();break; \ + case 0x54:prefix##_##54();break; case 0x55:prefix##_##55();break; case 0x56:prefix##_##56();break; case 0x57:prefix##_##57();break; \ + case 0x58:prefix##_##58();break; case 0x59:prefix##_##59();break; case 0x5a:prefix##_##5a();break; case 0x5b:prefix##_##5b();break; \ + case 0x5c:prefix##_##5c();break; case 0x5d:prefix##_##5d();break; case 0x5e:prefix##_##5e();break; case 0x5f:prefix##_##5f();break; \ + case 0x60:prefix##_##60();break; case 0x61:prefix##_##61();break; case 0x62:prefix##_##62();break; case 0x63:prefix##_##63();break; \ + case 0x64:prefix##_##64();break; case 0x65:prefix##_##65();break; case 0x66:prefix##_##66();break; case 0x67:prefix##_##67();break; \ + case 0x68:prefix##_##68();break; case 0x69:prefix##_##69();break; case 0x6a:prefix##_##6a();break; case 0x6b:prefix##_##6b();break; \ + case 0x6c:prefix##_##6c();break; case 0x6d:prefix##_##6d();break; case 0x6e:prefix##_##6e();break; case 0x6f:prefix##_##6f();break; \ + case 0x70:prefix##_##70();break; case 0x71:prefix##_##71();break; case 0x72:prefix##_##72();break; case 0x73:prefix##_##73();break; \ + case 0x74:prefix##_##74();break; case 0x75:prefix##_##75();break; case 0x76:prefix##_##76();break; case 0x77:prefix##_##77();break; \ + case 0x78:prefix##_##78();break; case 0x79:prefix##_##79();break; case 0x7a:prefix##_##7a();break; case 0x7b:prefix##_##7b();break; \ + case 0x7c:prefix##_##7c();break; case 0x7d:prefix##_##7d();break; case 0x7e:prefix##_##7e();break; case 0x7f:prefix##_##7f();break; \ + case 0x80:prefix##_##80();break; case 0x81:prefix##_##81();break; case 0x82:prefix##_##82();break; case 0x83:prefix##_##83();break; \ + case 0x84:prefix##_##84();break; case 0x85:prefix##_##85();break; case 0x86:prefix##_##86();break; case 0x87:prefix##_##87();break; \ + case 0x88:prefix##_##88();break; case 0x89:prefix##_##89();break; case 0x8a:prefix##_##8a();break; case 0x8b:prefix##_##8b();break; \ + case 0x8c:prefix##_##8c();break; case 0x8d:prefix##_##8d();break; case 0x8e:prefix##_##8e();break; case 0x8f:prefix##_##8f();break; \ + case 0x90:prefix##_##90();break; case 0x91:prefix##_##91();break; case 0x92:prefix##_##92();break; case 0x93:prefix##_##93();break; \ + case 0x94:prefix##_##94();break; case 0x95:prefix##_##95();break; case 0x96:prefix##_##96();break; case 0x97:prefix##_##97();break; \ + case 0x98:prefix##_##98();break; case 0x99:prefix##_##99();break; case 0x9a:prefix##_##9a();break; case 0x9b:prefix##_##9b();break; \ + case 0x9c:prefix##_##9c();break; case 0x9d:prefix##_##9d();break; case 0x9e:prefix##_##9e();break; case 0x9f:prefix##_##9f();break; \ + case 0xa0:prefix##_##a0();break; case 0xa1:prefix##_##a1();break; case 0xa2:prefix##_##a2();break; case 0xa3:prefix##_##a3();break; \ + case 0xa4:prefix##_##a4();break; case 0xa5:prefix##_##a5();break; case 0xa6:prefix##_##a6();break; case 0xa7:prefix##_##a7();break; \ + case 0xa8:prefix##_##a8();break; case 0xa9:prefix##_##a9();break; case 0xaa:prefix##_##aa();break; case 0xab:prefix##_##ab();break; \ + case 0xac:prefix##_##ac();break; case 0xad:prefix##_##ad();break; case 0xae:prefix##_##ae();break; case 0xaf:prefix##_##af();break; \ + case 0xb0:prefix##_##b0();break; case 0xb1:prefix##_##b1();break; case 0xb2:prefix##_##b2();break; case 0xb3:prefix##_##b3();break; \ + case 0xb4:prefix##_##b4();break; case 0xb5:prefix##_##b5();break; case 0xb6:prefix##_##b6();break; case 0xb7:prefix##_##b7();break; \ + case 0xb8:prefix##_##b8();break; case 0xb9:prefix##_##b9();break; case 0xba:prefix##_##ba();break; case 0xbb:prefix##_##bb();break; \ + case 0xbc:prefix##_##bc();break; case 0xbd:prefix##_##bd();break; case 0xbe:prefix##_##be();break; case 0xbf:prefix##_##bf();break; \ + case 0xc0:prefix##_##c0();break; case 0xc1:prefix##_##c1();break; case 0xc2:prefix##_##c2();break; case 0xc3:prefix##_##c3();break; \ + case 0xc4:prefix##_##c4();break; case 0xc5:prefix##_##c5();break; case 0xc6:prefix##_##c6();break; case 0xc7:prefix##_##c7();break; \ + case 0xc8:prefix##_##c8();break; case 0xc9:prefix##_##c9();break; case 0xca:prefix##_##ca();break; case 0xcb:prefix##_##cb();break; \ + case 0xcc:prefix##_##cc();break; case 0xcd:prefix##_##cd();break; case 0xce:prefix##_##ce();break; case 0xcf:prefix##_##cf();break; \ + case 0xd0:prefix##_##d0();break; case 0xd1:prefix##_##d1();break; case 0xd2:prefix##_##d2();break; case 0xd3:prefix##_##d3();break; \ + case 0xd4:prefix##_##d4();break; case 0xd5:prefix##_##d5();break; case 0xd6:prefix##_##d6();break; case 0xd7:prefix##_##d7();break; \ + case 0xd8:prefix##_##d8();break; case 0xd9:prefix##_##d9();break; case 0xda:prefix##_##da();break; case 0xdb:prefix##_##db();break; \ + case 0xdc:prefix##_##dc();break; case 0xdd:prefix##_##dd();break; case 0xde:prefix##_##de();break; case 0xdf:prefix##_##df();break; \ + case 0xe0:prefix##_##e0();break; case 0xe1:prefix##_##e1();break; case 0xe2:prefix##_##e2();break; case 0xe3:prefix##_##e3();break; \ + case 0xe4:prefix##_##e4();break; case 0xe5:prefix##_##e5();break; case 0xe6:prefix##_##e6();break; case 0xe7:prefix##_##e7();break; \ + case 0xe8:prefix##_##e8();break; case 0xe9:prefix##_##e9();break; case 0xea:prefix##_##ea();break; case 0xeb:prefix##_##eb();break; \ + case 0xec:prefix##_##ec();break; case 0xed:prefix##_##ed();break; case 0xee:prefix##_##ee();break; case 0xef:prefix##_##ef();break; \ + case 0xf0:prefix##_##f0();break; case 0xf1:prefix##_##f1();break; case 0xf2:prefix##_##f2();break; case 0xf3:prefix##_##f3();break; \ + case 0xf4:prefix##_##f4();break; case 0xf5:prefix##_##f5();break; case 0xf6:prefix##_##f6();break; case 0xf7:prefix##_##f7();break; \ + case 0xf8:prefix##_##f8();break; case 0xf9:prefix##_##f9();break; case 0xfa:prefix##_##fa();break; case 0xfb:prefix##_##fb();break; \ + case 0xfc:prefix##_##fc();break; case 0xfd:prefix##_##fd();break; case 0xfe:prefix##_##fe();break; case 0xff:prefix##_##ff();break; \ + } \ +} +#else +#define EXEC_INLINE EXEC +#endif + + +/*************************************************************** + * Enter HALT state; write 1 to fake port on first execution + ***************************************************************/ +#define ENTER_HALT { \ + PC--; \ + HALT = 1; \ +} + +/*************************************************************** + * Leave HALT state; write 0 to fake port + ***************************************************************/ +#define LEAVE_HALT { \ + if( HALT ) \ + { \ + HALT = 0; \ + PC++; \ + } \ +} + +/*************************************************************** + * Input a byte from given I/O port + ***************************************************************/ +#define IN(port) z80_readport(port) + +/*************************************************************** + * Output a byte to given I/O port + ***************************************************************/ +#define OUT(port,value) z80_writeport(port,value) + +/*************************************************************** + * Read a byte from given memory location + ***************************************************************/ +#define RM(addr) z80_readmem(addr) + +/*************************************************************** + * Write a byte to given memory location + ***************************************************************/ +#define WM(addr,value) z80_writemem(addr,value) + +/*************************************************************** + * Read a word from given memory location + ***************************************************************/ +INLINE void RM16( UINT32 addr, PAIR *r ) +{ + r->b.l = RM(addr); + r->b.h = RM((addr+1)&0xffff); +} + +/*************************************************************** + * Write a word to given memory location + ***************************************************************/ +INLINE void WM16( UINT32 addr, PAIR *r ) +{ + WM(addr,r->b.l); + WM((addr+1)&0xffff,r->b.h); +} + +/*************************************************************** + * ROP() is identical to RM() except it is used for + * reading opcodes. In case of system with memory mapped I/O, + * this function can be used to greatly speed up emulation + ***************************************************************/ +INLINE UINT8 ROP(void) +{ + unsigned pc = PCD; + PC++; + return cpu_readop(pc); +} + +/**************************************************************** + * ARG() is identical to ROP() except it is used + * for reading opcode arguments. This difference can be used to + * support systems that use different encoding mechanisms for + * opcodes and opcode arguments + ***************************************************************/ +INLINE UINT8 ARG(void) +{ + unsigned pc = PCD; + PC++; + return cpu_readop_arg(pc); +} + +INLINE UINT32 ARG16(void) +{ + unsigned pc = PCD; + PC += 2; + return cpu_readop_arg(pc) | (cpu_readop_arg((pc+1)&0xffff) << 8); +} + +/*************************************************************** + * Calculate the effective address EA of an opcode using + * IX+offset resp. IY+offset addressing. + ***************************************************************/ +#define EAX do { EA = (UINT32)(UINT16)(IX + (INT8)ARG()); WZ = EA; } while (0) +#define EAY do { EA = (UINT32)(UINT16)(IY + (INT8)ARG()); WZ = EA; } while (0) + +/*************************************************************** + * POP + ***************************************************************/ +#define POP(DR) do { RM16( SPD, &Z80.DR ); SP += 2; } while (0) + +/*************************************************************** + * PUSH + ***************************************************************/ +#define PUSH(SR) do { SP -= 2; WM16( SPD, &Z80.SR ); } while (0) + +/*************************************************************** + * JP + ***************************************************************/ +#define JP { \ + PCD = ARG16(); \ + WZ = PCD; \ +} + +/*************************************************************** + * JP_COND + ***************************************************************/ +#define JP_COND(cond) { \ + if (cond) \ + { \ + PCD = ARG16(); \ + WZ = PCD; \ + } \ + else \ + { \ + WZ = ARG16(); /* implicit do PC += 2 */ \ + } \ +} + +/*************************************************************** + * JR + ***************************************************************/ +#define JR() { \ + INT8 arg = (INT8)ARG(); /* ARG() also increments PC */ \ + PC += arg; /* so don't do PC += ARG() */ \ + WZ = PC; \ +} + +/*************************************************************** + * JR_COND + ***************************************************************/ +#define JR_COND(cond, opcode) { \ + if (cond) \ + { \ + JR(); \ + CC(ex, opcode); \ + } \ + else PC++; \ +} + +/*************************************************************** + * CALL + ***************************************************************/ +#define CALL() { \ + EA = ARG16(); \ + WZ = EA; \ + PUSH(pc); \ + PCD = EA; \ +} + +/*************************************************************** + * CALL_COND + ***************************************************************/ +#define CALL_COND(cond, opcode) { \ + if (cond) \ + { \ + EA = ARG16(); \ + WZ = EA; \ + PUSH(pc); \ + PCD = EA; \ + CC(ex, opcode); \ + } \ + else \ + { \ + WZ = ARG16(); /* implicit call PC+=2; */ \ + } \ +} + +/*************************************************************** + * RET_COND + ***************************************************************/ +#define RET_COND(cond, opcode) do { \ + if (cond) \ + { \ + POP(pc); \ + WZ = PC; \ + CC(ex, opcode); \ + } \ +} while (0) + +/*************************************************************** + * RETN + ***************************************************************/ +#define RETN do { \ + LOG(("Z80 #%d RETN IFF1:%d IFF2:%d\n", cpu_getactivecpu(), IFF1, IFF2)); \ + POP( pc ); \ + WZ = PC; \ + IFF1 = IFF2; \ +} while (0) + +/*************************************************************** + * RETI + ***************************************************************/ +#define RETI { \ + POP( pc ); \ + WZ = PC; \ +/* according to http://www.msxnet.org/tech/z80-documented.pdf */ \ + IFF1 = IFF2; \ +} + +/*************************************************************** + * LD R,A + ***************************************************************/ +#define LD_R_A { \ + R = A; \ + R2 = A & 0x80; /* keep bit 7 of R */ \ +} + +/*************************************************************** + * LD A,R + ***************************************************************/ +#define LD_A_R { \ + A = (R & 0x7f) | R2; \ + F = (F & CF) | SZ[A] | ( IFF2 << 2 ); \ +} + +/*************************************************************** + * LD I,A + ***************************************************************/ +#define LD_I_A { \ + I = A; \ +} + +/*************************************************************** + * LD A,I + ***************************************************************/ +#define LD_A_I { \ + A = I; \ + F = (F & CF) | SZ[A] | ( IFF2 << 2 ); \ +} + +/*************************************************************** + * RST + ***************************************************************/ +#define RST(addr) \ + PUSH( pc ); \ + PCD = addr; \ + WZ = PC; \ + +/*************************************************************** + * INC r8 + ***************************************************************/ +INLINE UINT8 INC(UINT8 value) +{ + UINT8 res = value + 1; + F = (F & CF) | SZHV_inc[res]; + return (UINT8)res; +} + +/*************************************************************** + * DEC r8 + ***************************************************************/ +INLINE UINT8 DEC(UINT8 value) +{ + UINT8 res = value - 1; + F = (F & CF) | SZHV_dec[res]; + return res; +} + +/*************************************************************** + * RLCA + ***************************************************************/ +#define RLCA \ + A = (A << 1) | (A >> 7); \ + F = (F & (SF | ZF | PF)) | (A & (YF | XF | CF)) + +/*************************************************************** + * RRCA + ***************************************************************/ +#define RRCA \ + F = (F & (SF | ZF | PF)) | (A & CF); \ + A = (A >> 1) | (A << 7); \ + F |= (A & (YF | XF) ) + +/*************************************************************** + * RLA + ***************************************************************/ +#define RLA { \ + UINT8 res = (A << 1) | (F & CF); \ + UINT8 c = (A & 0x80) ? CF : 0; \ + F = (F & (SF | ZF | PF)) | c | (res & (YF | XF)); \ + A = res; \ +} + +/*************************************************************** + * RRA + ***************************************************************/ +#define RRA { \ + UINT8 res = (A >> 1) | (F << 7); \ + UINT8 c = (A & 0x01) ? CF : 0; \ + F = (F & (SF | ZF | PF)) | c | (res & (YF | XF)); \ + A = res; \ +} + +/*************************************************************** + * RRD + ***************************************************************/ +#define RRD { \ + UINT8 n = RM(HL); \ + WZ = HL+1; \ + WM( HL, (n >> 4) | (A << 4) ); \ + A = (A & 0xf0) | (n & 0x0f); \ + F = (F & CF) | SZP[A]; \ +} + +/*************************************************************** + * RLD + ***************************************************************/ +#define RLD { \ + UINT8 n = RM(HL); \ + WZ = HL+1; \ + WM( HL, (n << 4) | (A & 0x0f) ); \ + A = (A & 0xf0) | (n >> 4); \ + F = (F & CF) | SZP[A]; \ +} + +/*************************************************************** + * ADD A,n + ***************************************************************/ +#define ADD(value) \ +{ \ + UINT32 ah = AFD & 0xff00; \ + UINT32 res = (UINT8)((ah >> 8) + value); \ + F = SZHVC_add[ah | res]; \ + A = res; \ +} + +/*************************************************************** + * ADC A,n + ***************************************************************/ +#define ADC(value) \ +{ \ + UINT32 ah = AFD & 0xff00, c = AFD & 1; \ + UINT32 res = (UINT8)((ah >> 8) + value + c); \ + F = SZHVC_add[(c << 16) | ah | res]; \ + A = res; \ +} + +/*************************************************************** + * SUB n + ***************************************************************/ +#define SUB(value) \ +{ \ + UINT32 ah = AFD & 0xff00; \ + UINT32 res = (UINT8)((ah >> 8) - value); \ + F = SZHVC_sub[ah | res]; \ + A = res; \ +} + +/*************************************************************** + * SBC A,n + ***************************************************************/ +#define SBC(value) \ +{ \ + UINT32 ah = AFD & 0xff00, c = AFD & 1; \ + UINT32 res = (UINT8)((ah >> 8) - value - c); \ + F = SZHVC_sub[(c<<16) | ah | res]; \ + A = res; \ +} + +/*************************************************************** + * NEG + ***************************************************************/ +#define NEG { \ + UINT8 value = A; \ + A = 0; \ + SUB(value); \ +} + +/*************************************************************** + * DAA + ***************************************************************/ +#define DAA { \ + UINT8 a = A; \ + if (F & NF) { \ + if ((F&HF) | ((A&0xf)>9)) a-=6; \ + if ((F&CF) | (A>0x99)) a-=0x60; \ + } \ + else { \ + if ((F&HF) | ((A&0xf)>9)) a+=6; \ + if ((F&CF) | (A>0x99)) a+=0x60; \ + } \ + \ + F = (F&(CF|NF)) | (A>0x99) | ((A^a)&HF) | SZP[a]; \ + A = a; \ +} + +/*************************************************************** + * AND n + ***************************************************************/ +#define AND(value) \ + A &= value; \ + F = SZP[A] | HF + +/*************************************************************** + * OR n + ***************************************************************/ +#define OR(value) \ + A |= value; \ + F = SZP[A] + +/*************************************************************** + * XOR n + ***************************************************************/ +#define XOR(value) \ + A ^= value; \ + F = SZP[A] + +/*************************************************************** + * CP n + ***************************************************************/ +#define CP(value) \ +{ \ + unsigned val = value; \ + UINT32 ah = AFD & 0xff00; \ + UINT32 res = (UINT8)((ah >> 8) - val); \ + F = (SZHVC_sub[ah | res] & ~(YF | XF)) | (val & (YF | XF)); \ +} + +/*************************************************************** + * EX AF,AF' + ***************************************************************/ +#define EX_AF \ +{ \ + PAIR tmp; \ + tmp = Z80.af; Z80.af = Z80.af2; Z80.af2 = tmp; \ +} + +/*************************************************************** + * EX DE,HL + ***************************************************************/ +#define EX_DE_HL \ +{ \ + PAIR tmp; \ + tmp = Z80.de; Z80.de = Z80.hl; Z80.hl = tmp; \ +} + +/*************************************************************** + * EXX + ***************************************************************/ +#define EXX \ +{ \ + PAIR tmp; \ + tmp = Z80.bc; Z80.bc = Z80.bc2; Z80.bc2 = tmp; \ + tmp = Z80.de; Z80.de = Z80.de2; Z80.de2 = tmp; \ + tmp = Z80.hl; Z80.hl = Z80.hl2; Z80.hl2 = tmp; \ +} + +/*************************************************************** + * EX (SP),r16 + ***************************************************************/ +#define EXSP(DR) \ +{ \ + PAIR tmp = { { 0, 0, 0, 0 } }; \ + RM16( SPD, &tmp ); \ + WM16( SPD, &Z80.DR ); \ + Z80.DR = tmp; \ + WZ = Z80.DR.d; \ +} + + +/*************************************************************** + * ADD16 + ***************************************************************/ +#define ADD16(DR,SR) \ +{ \ + UINT32 res = Z80.DR.d + Z80.SR.d; \ + WZ = Z80.DR.d + 1; \ + F = (F & (SF | ZF | VF)) | \ + (((Z80.DR.d ^ res ^ Z80.SR.d) >> 8) & HF) | \ + ((res >> 16) & CF) | ((res >> 8) & (YF | XF)); \ + Z80.DR.w.l = (UINT16)res; \ +} + +/*************************************************************** + * ADC r16,r16 + ***************************************************************/ +#define ADC16(Reg) \ +{ \ + UINT32 res = HLD + Z80.Reg.d + (F & CF); \ + WZ = HL + 1; \ + F = (((HLD ^ res ^ Z80.Reg.d) >> 8) & HF) | \ + ((res >> 16) & CF) | \ + ((res >> 8) & (SF | YF | XF)) | \ + ((res & 0xffff) ? 0 : ZF) | \ + (((Z80.Reg.d ^ HLD ^ 0x8000) & (Z80.Reg.d ^ res) & 0x8000) >> 13); \ + HL = (UINT16)res; \ +} + +/*************************************************************** + * SBC r16,r16 + ***************************************************************/ +#define SBC16(Reg) \ +{ \ + UINT32 res = HLD - Z80.Reg.d - (F & CF); \ + WZ = HL + 1; \ + F = (((HLD ^ res ^ Z80.Reg.d) >> 8) & HF) | NF | \ + ((res >> 16) & CF) | \ + ((res >> 8) & (SF | YF | XF)) | \ + ((res & 0xffff) ? 0 : ZF) | \ + (((Z80.Reg.d ^ HLD) & (HLD ^ res) &0x8000) >> 13); \ + HL = (UINT16)res; \ +} + +/*************************************************************** + * RLC r8 + ***************************************************************/ +INLINE UINT8 RLC(UINT8 value) +{ + unsigned res = value; + unsigned c = (res & 0x80) ? CF : 0; + res = ((res << 1) | (res >> 7)) & 0xff; + F = SZP[res] | c; + return res; +} + +/*************************************************************** + * RRC r8 + ***************************************************************/ +INLINE UINT8 RRC(UINT8 value) +{ + unsigned res = value; + unsigned c = (res & 0x01) ? CF : 0; + res = ((res >> 1) | (res << 7)) & 0xff; + F = SZP[res] | c; + return res; +} + +/*************************************************************** + * RL r8 + ***************************************************************/ +INLINE UINT8 RL(UINT8 value) +{ + unsigned res = value; + unsigned c = (res & 0x80) ? CF : 0; + res = ((res << 1) | (F & CF)) & 0xff; + F = SZP[res] | c; + return res; +} + +/*************************************************************** + * RR r8 + ***************************************************************/ +INLINE UINT8 RR(UINT8 value) +{ + unsigned res = value; + unsigned c = (res & 0x01) ? CF : 0; + res = ((res >> 1) | (F << 7)) & 0xff; + F = SZP[res] | c; + return res; +} + +/*************************************************************** + * SLA r8 + ***************************************************************/ +INLINE UINT8 SLA(UINT8 value) +{ + unsigned res = value; + unsigned c = (res & 0x80) ? CF : 0; + res = (res << 1) & 0xff; + F = SZP[res] | c; + return res; +} + +/*************************************************************** + * SRA r8 + ***************************************************************/ +INLINE UINT8 SRA(UINT8 value) +{ + unsigned res = value; + unsigned c = (res & 0x01) ? CF : 0; + res = ((res >> 1) | (res & 0x80)) & 0xff; + F = SZP[res] | c; + return res; +} + +/*************************************************************** + * SLL r8 + ***************************************************************/ +INLINE UINT8 SLL(UINT8 value) +{ + unsigned res = value; + unsigned c = (res & 0x80) ? CF : 0; + res = ((res << 1) | 0x01) & 0xff; + F = SZP[res] | c; + return res; +} + +/*************************************************************** + * SRL r8 + ***************************************************************/ +INLINE UINT8 SRL(UINT8 value) +{ + unsigned res = value; + unsigned c = (res & 0x01) ? CF : 0; + res = (res >> 1) & 0xff; + F = SZP[res] | c; + return res; +} + +/*************************************************************** + * BIT bit,r8 + ***************************************************************/ +#undef BIT +#define BIT(bit,reg) \ + F = (F & CF) | HF | (SZ_BIT[reg & (1<>8) & (YF|XF)) + +/*************************************************************** + * RES bit,r8 + ***************************************************************/ +INLINE UINT8 RES(UINT8 bit, UINT8 value) +{ + return value & ~(1< flag 5 */ \ + if( (A + io) & 0x08 ) F |= XF; /* bit 3 -> flag 3 */ \ + HL++; DE++; BC--; \ + if( BC ) F |= VF; \ +} + +/*************************************************************** + * CPI + ***************************************************************/ +#define CPI { \ + UINT8 val = RM(HL); \ + UINT8 res = A - val; \ + WZ++; \ + HL++; BC--; \ + F = (F & CF) | (SZ[res]&~(YF|XF)) | ((A^val^res)&HF) | NF; \ + if( F & HF ) res -= 1; \ + if( res & 0x02 ) F |= YF; /* bit 1 -> flag 5 */ \ + if( res & 0x08 ) F |= XF; /* bit 3 -> flag 3 */ \ + if( BC ) F |= VF; \ +} + +/*************************************************************** + * INI + ***************************************************************/ +#define INI { \ + unsigned t; \ + UINT8 io = IN(BC); \ + WZ = BC + 1; \ + CC(ex,0xa2); \ + B--; \ + WM( HL, io ); \ + HL++; \ + F = SZ[B]; \ + t = (unsigned)((C + 1) & 0xff) + (unsigned)io; \ + if( io & SF ) F |= NF; \ + if( t & 0x100 ) F |= HF | CF; \ + F |= SZP[(UINT8)(t & 0x07) ^ B] & PF; \ +} + +/*************************************************************** + * OUTI + ***************************************************************/ +#define OUTI { \ + unsigned t; \ + UINT8 io = RM(HL); \ + B--; \ + WZ = BC + 1; \ + OUT( BC, io ); \ + HL++; \ + F = SZ[B]; \ + t = (unsigned)L + (unsigned)io; \ + if( io & SF ) F |= NF; \ + if( t & 0x100 ) F |= HF | CF; \ + F |= SZP[(UINT8)(t & 0x07) ^ B] & PF; \ +} + +/*************************************************************** + * LDD + ***************************************************************/ +#define LDD { \ + UINT8 io = RM(HL); \ + WM( DE, io ); \ + F &= SF | ZF | CF; \ + if( (A + io) & 0x02 ) F |= YF; /* bit 1 -> flag 5 */ \ + if( (A + io) & 0x08 ) F |= XF; /* bit 3 -> flag 3 */ \ + HL--; DE--; BC--; \ + if( BC ) F |= VF; \ +} + +/*************************************************************** + * CPD + ***************************************************************/ +#define CPD { \ + UINT8 val = RM(HL); \ + UINT8 res = A - val; \ + WZ--; \ + HL--; BC--; \ + F = (F & CF) | (SZ[res]&~(YF|XF)) | ((A^val^res)&HF) | NF; \ + if( F & HF ) res -= 1; \ + if( res & 0x02 ) F |= YF; /* bit 1 -> flag 5 */ \ + if( res & 0x08 ) F |= XF; /* bit 3 -> flag 3 */ \ + if( BC ) F |= VF; \ +} + +/*************************************************************** + * IND + ***************************************************************/ +#define IND { \ + unsigned t; \ + UINT8 io = IN(BC); \ + WZ = BC - 1; \ + CC(ex,0xaa); \ + B--; \ + WM( HL, io ); \ + HL--; \ + F = SZ[B]; \ + t = ((unsigned)(C - 1) & 0xff) + (unsigned)io; \ + if( io & SF ) F |= NF; \ + if( t & 0x100 ) F |= HF | CF; \ + F |= SZP[(UINT8)(t & 0x07) ^ B] & PF; \ +} + +/*************************************************************** + * OUTD + ***************************************************************/ +#define OUTD { \ + unsigned t; \ + UINT8 io = RM(HL); \ + B--; \ + WZ = BC - 1; \ + OUT( BC, io ); \ + HL--; \ + F = SZ[B]; \ + t = (unsigned)L + (unsigned)io; \ + if( io & SF ) F |= NF; \ + if( t & 0x100 ) F |= HF | CF; \ + F |= SZP[(UINT8)(t & 0x07) ^ B] & PF; \ +} + +/*************************************************************** + * LDIR + ***************************************************************/ +#define LDIR \ + LDI; \ + if( BC ) \ + { \ + PC -= 2; \ + WZ = PC + 1; \ + CC(ex,0xb0); \ + } + +/*************************************************************** + * CPIR + ***************************************************************/ +#define CPIR \ + CPI; \ + if( BC && !(F & ZF) ) \ + { \ + PC -= 2; \ + WZ = PC + 1; \ + CC(ex,0xb1); \ + } + +/*************************************************************** + * INIR + ***************************************************************/ +#define INIR \ + INI; \ + if( B ) \ + { \ + PC -= 2; \ + CC(ex,0xb2); \ + } + +/*************************************************************** + * OTIR + ***************************************************************/ +#define OTIR \ + OUTI; \ + if( B ) \ + { \ + PC -= 2; \ + CC(ex,0xb3); \ + } + +/*************************************************************** + * LDDR + ***************************************************************/ +#define LDDR \ + LDD; \ + if( BC ) \ + { \ + PC -= 2; \ + WZ = PC + 1; \ + CC(ex,0xb8); \ + } + +/*************************************************************** + * CPDR + ***************************************************************/ +#define CPDR \ + CPD; \ + if( BC && !(F & ZF) ) \ + { \ + PC -= 2; \ + WZ = PC + 1; \ + CC(ex,0xb9); \ + } + +/*************************************************************** + * INDR + ***************************************************************/ +#define INDR \ + IND; \ + if( B ) \ + { \ + PC -= 2; \ + CC(ex,0xba); \ + } + +/*************************************************************** + * OTDR + ***************************************************************/ +#define OTDR \ + OUTD; \ + if( B ) \ + { \ + PC -= 2; \ + CC(ex,0xbb); \ + } + +/*************************************************************** + * EI + ***************************************************************/ +#define EI { \ + IFF1 = IFF2 = 1; \ + Z80.after_ei = TRUE; \ +} + +/********************************************************** + * opcodes with CB prefix + * rotate, shift and bit operations + **********************************************************/ +OP(cb,00) { B = RLC(B); } /* RLC B */ +OP(cb,01) { C = RLC(C); } /* RLC C */ +OP(cb,02) { D = RLC(D); } /* RLC D */ +OP(cb,03) { E = RLC(E); } /* RLC E */ +OP(cb,04) { H = RLC(H); } /* RLC H */ +OP(cb,05) { L = RLC(L); } /* RLC L */ +OP(cb,06) { WM( HL, RLC(RM(HL)) ); } /* RLC (HL) */ +OP(cb,07) { A = RLC(A); } /* RLC A */ + +OP(cb,08) { B = RRC(B); } /* RRC B */ +OP(cb,09) { C = RRC(C); } /* RRC C */ +OP(cb,0a) { D = RRC(D); } /* RRC D */ +OP(cb,0b) { E = RRC(E); } /* RRC E */ +OP(cb,0c) { H = RRC(H); } /* RRC H */ +OP(cb,0d) { L = RRC(L); } /* RRC L */ +OP(cb,0e) { WM( HL, RRC(RM(HL)) ); } /* RRC (HL) */ +OP(cb,0f) { A = RRC(A); } /* RRC A */ + +OP(cb,10) { B = RL(B); } /* RL B */ +OP(cb,11) { C = RL(C); } /* RL C */ +OP(cb,12) { D = RL(D); } /* RL D */ +OP(cb,13) { E = RL(E); } /* RL E */ +OP(cb,14) { H = RL(H); } /* RL H */ +OP(cb,15) { L = RL(L); } /* RL L */ +OP(cb,16) { WM( HL, RL(RM(HL)) ); } /* RL (HL) */ +OP(cb,17) { A = RL(A); } /* RL A */ + +OP(cb,18) { B = RR(B); } /* RR B */ +OP(cb,19) { C = RR(C); } /* RR C */ +OP(cb,1a) { D = RR(D); } /* RR D */ +OP(cb,1b) { E = RR(E); } /* RR E */ +OP(cb,1c) { H = RR(H); } /* RR H */ +OP(cb,1d) { L = RR(L); } /* RR L */ +OP(cb,1e) { WM( HL, RR(RM(HL)) ); } /* RR (HL) */ +OP(cb,1f) { A = RR(A); } /* RR A */ + +OP(cb,20) { B = SLA(B); } /* SLA B */ +OP(cb,21) { C = SLA(C); } /* SLA C */ +OP(cb,22) { D = SLA(D); } /* SLA D */ +OP(cb,23) { E = SLA(E); } /* SLA E */ +OP(cb,24) { H = SLA(H); } /* SLA H */ +OP(cb,25) { L = SLA(L); } /* SLA L */ +OP(cb,26) { WM( HL, SLA(RM(HL)) ); } /* SLA (HL) */ +OP(cb,27) { A = SLA(A); } /* SLA A */ + +OP(cb,28) { B = SRA(B); } /* SRA B */ +OP(cb,29) { C = SRA(C); } /* SRA C */ +OP(cb,2a) { D = SRA(D); } /* SRA D */ +OP(cb,2b) { E = SRA(E); } /* SRA E */ +OP(cb,2c) { H = SRA(H); } /* SRA H */ +OP(cb,2d) { L = SRA(L); } /* SRA L */ +OP(cb,2e) { WM( HL, SRA(RM(HL)) ); } /* SRA (HL) */ +OP(cb,2f) { A = SRA(A); } /* SRA A */ + +OP(cb,30) { B = SLL(B); } /* SLL B */ +OP(cb,31) { C = SLL(C); } /* SLL C */ +OP(cb,32) { D = SLL(D); } /* SLL D */ +OP(cb,33) { E = SLL(E); } /* SLL E */ +OP(cb,34) { H = SLL(H); } /* SLL H */ +OP(cb,35) { L = SLL(L); } /* SLL L */ +OP(cb,36) { WM( HL, SLL(RM(HL)) ); } /* SLL (HL) */ +OP(cb,37) { A = SLL(A); } /* SLL A */ + +OP(cb,38) { B = SRL(B); } /* SRL B */ +OP(cb,39) { C = SRL(C); } /* SRL C */ +OP(cb,3a) { D = SRL(D); } /* SRL D */ +OP(cb,3b) { E = SRL(E); } /* SRL E */ +OP(cb,3c) { H = SRL(H); } /* SRL H */ +OP(cb,3d) { L = SRL(L); } /* SRL L */ +OP(cb,3e) { WM( HL, SRL(RM(HL)) ); } /* SRL (HL) */ +OP(cb,3f) { A = SRL(A); } /* SRL A */ + +OP(cb,40) { BIT(0,B); } /* BIT 0,B */ +OP(cb,41) { BIT(0,C); } /* BIT 0,C */ +OP(cb,42) { BIT(0,D); } /* BIT 0,D */ +OP(cb,43) { BIT(0,E); } /* BIT 0,E */ +OP(cb,44) { BIT(0,H); } /* BIT 0,H */ +OP(cb,45) { BIT(0,L); } /* BIT 0,L */ +OP(cb,46) { BIT_HL(0,RM(HL)); } /* BIT 0,(HL) */ +OP(cb,47) { BIT(0,A); } /* BIT 0,A */ + +OP(cb,48) { BIT(1,B); } /* BIT 1,B */ +OP(cb,49) { BIT(1,C); } /* BIT 1,C */ +OP(cb,4a) { BIT(1,D); } /* BIT 1,D */ +OP(cb,4b) { BIT(1,E); } /* BIT 1,E */ +OP(cb,4c) { BIT(1,H); } /* BIT 1,H */ +OP(cb,4d) { BIT(1,L); } /* BIT 1,L */ +OP(cb,4e) { BIT_HL(1,RM(HL)); } /* BIT 1,(HL) */ +OP(cb,4f) { BIT(1,A); } /* BIT 1,A */ + +OP(cb,50) { BIT(2,B); } /* BIT 2,B */ +OP(cb,51) { BIT(2,C); } /* BIT 2,C */ +OP(cb,52) { BIT(2,D); } /* BIT 2,D */ +OP(cb,53) { BIT(2,E); } /* BIT 2,E */ +OP(cb,54) { BIT(2,H); } /* BIT 2,H */ +OP(cb,55) { BIT(2,L); } /* BIT 2,L */ +OP(cb,56) { BIT_HL(2,RM(HL)); } /* BIT 2,(HL) */ +OP(cb,57) { BIT(2,A); } /* BIT 2,A */ + +OP(cb,58) { BIT(3,B); } /* BIT 3,B */ +OP(cb,59) { BIT(3,C); } /* BIT 3,C */ +OP(cb,5a) { BIT(3,D); } /* BIT 3,D */ +OP(cb,5b) { BIT(3,E); } /* BIT 3,E */ +OP(cb,5c) { BIT(3,H); } /* BIT 3,H */ +OP(cb,5d) { BIT(3,L); } /* BIT 3,L */ +OP(cb,5e) { BIT_HL(3,RM(HL)); } /* BIT 3,(HL) */ +OP(cb,5f) { BIT(3,A); } /* BIT 3,A */ + +OP(cb,60) { BIT(4,B); } /* BIT 4,B */ +OP(cb,61) { BIT(4,C); } /* BIT 4,C */ +OP(cb,62) { BIT(4,D); } /* BIT 4,D */ +OP(cb,63) { BIT(4,E); } /* BIT 4,E */ +OP(cb,64) { BIT(4,H); } /* BIT 4,H */ +OP(cb,65) { BIT(4,L); } /* BIT 4,L */ +OP(cb,66) { BIT_HL(4,RM(HL)); } /* BIT 4,(HL) */ +OP(cb,67) { BIT(4,A); } /* BIT 4,A */ + +OP(cb,68) { BIT(5,B); } /* BIT 5,B */ +OP(cb,69) { BIT(5,C); } /* BIT 5,C */ +OP(cb,6a) { BIT(5,D); } /* BIT 5,D */ +OP(cb,6b) { BIT(5,E); } /* BIT 5,E */ +OP(cb,6c) { BIT(5,H); } /* BIT 5,H */ +OP(cb,6d) { BIT(5,L); } /* BIT 5,L */ +OP(cb,6e) { BIT_HL(5,RM(HL)); } /* BIT 5,(HL) */ +OP(cb,6f) { BIT(5,A); } /* BIT 5,A */ + +OP(cb,70) { BIT(6,B); } /* BIT 6,B */ +OP(cb,71) { BIT(6,C); } /* BIT 6,C */ +OP(cb,72) { BIT(6,D); } /* BIT 6,D */ +OP(cb,73) { BIT(6,E); } /* BIT 6,E */ +OP(cb,74) { BIT(6,H); } /* BIT 6,H */ +OP(cb,75) { BIT(6,L); } /* BIT 6,L */ +OP(cb,76) { BIT_HL(6,RM(HL)); } /* BIT 6,(HL) */ +OP(cb,77) { BIT(6,A); } /* BIT 6,A */ + +OP(cb,78) { BIT(7,B); } /* BIT 7,B */ +OP(cb,79) { BIT(7,C); } /* BIT 7,C */ +OP(cb,7a) { BIT(7,D); } /* BIT 7,D */ +OP(cb,7b) { BIT(7,E); } /* BIT 7,E */ +OP(cb,7c) { BIT(7,H); } /* BIT 7,H */ +OP(cb,7d) { BIT(7,L); } /* BIT 7,L */ +OP(cb,7e) { BIT_HL(7,RM(HL)); } /* BIT 7,(HL) */ +OP(cb,7f) { BIT(7,A); } /* BIT 7,A */ + +OP(cb,80) { B = RES(0,B); } /* RES 0,B */ +OP(cb,81) { C = RES(0,C); } /* RES 0,C */ +OP(cb,82) { D = RES(0,D); } /* RES 0,D */ +OP(cb,83) { E = RES(0,E); } /* RES 0,E */ +OP(cb,84) { H = RES(0,H); } /* RES 0,H */ +OP(cb,85) { L = RES(0,L); } /* RES 0,L */ +OP(cb,86) { WM( HL, RES(0,RM(HL)) ); } /* RES 0,(HL) */ +OP(cb,87) { A = RES(0,A); } /* RES 0,A */ + +OP(cb,88) { B = RES(1,B); } /* RES 1,B */ +OP(cb,89) { C = RES(1,C); } /* RES 1,C */ +OP(cb,8a) { D = RES(1,D); } /* RES 1,D */ +OP(cb,8b) { E = RES(1,E); } /* RES 1,E */ +OP(cb,8c) { H = RES(1,H); } /* RES 1,H */ +OP(cb,8d) { L = RES(1,L); } /* RES 1,L */ +OP(cb,8e) { WM( HL, RES(1,RM(HL)) ); } /* RES 1,(HL) */ +OP(cb,8f) { A = RES(1,A); } /* RES 1,A */ + +OP(cb,90) { B = RES(2,B); } /* RES 2,B */ +OP(cb,91) { C = RES(2,C); } /* RES 2,C */ +OP(cb,92) { D = RES(2,D); } /* RES 2,D */ +OP(cb,93) { E = RES(2,E); } /* RES 2,E */ +OP(cb,94) { H = RES(2,H); } /* RES 2,H */ +OP(cb,95) { L = RES(2,L); } /* RES 2,L */ +OP(cb,96) { WM( HL, RES(2,RM(HL)) ); } /* RES 2,(HL) */ +OP(cb,97) { A = RES(2,A); } /* RES 2,A */ + +OP(cb,98) { B = RES(3,B); } /* RES 3,B */ +OP(cb,99) { C = RES(3,C); } /* RES 3,C */ +OP(cb,9a) { D = RES(3,D); } /* RES 3,D */ +OP(cb,9b) { E = RES(3,E); } /* RES 3,E */ +OP(cb,9c) { H = RES(3,H); } /* RES 3,H */ +OP(cb,9d) { L = RES(3,L); } /* RES 3,L */ +OP(cb,9e) { WM( HL, RES(3,RM(HL)) ); } /* RES 3,(HL) */ +OP(cb,9f) { A = RES(3,A); } /* RES 3,A */ + +OP(cb,a0) { B = RES(4,B); } /* RES 4,B */ +OP(cb,a1) { C = RES(4,C); } /* RES 4,C */ +OP(cb,a2) { D = RES(4,D); } /* RES 4,D */ +OP(cb,a3) { E = RES(4,E); } /* RES 4,E */ +OP(cb,a4) { H = RES(4,H); } /* RES 4,H */ +OP(cb,a5) { L = RES(4,L); } /* RES 4,L */ +OP(cb,a6) { WM( HL, RES(4,RM(HL)) ); } /* RES 4,(HL) */ +OP(cb,a7) { A = RES(4,A); } /* RES 4,A */ + +OP(cb,a8) { B = RES(5,B); } /* RES 5,B */ +OP(cb,a9) { C = RES(5,C); } /* RES 5,C */ +OP(cb,aa) { D = RES(5,D); } /* RES 5,D */ +OP(cb,ab) { E = RES(5,E); } /* RES 5,E */ +OP(cb,ac) { H = RES(5,H); } /* RES 5,H */ +OP(cb,ad) { L = RES(5,L); } /* RES 5,L */ +OP(cb,ae) { WM( HL, RES(5,RM(HL)) ); } /* RES 5,(HL) */ +OP(cb,af) { A = RES(5,A); } /* RES 5,A */ + +OP(cb,b0) { B = RES(6,B); } /* RES 6,B */ +OP(cb,b1) { C = RES(6,C); } /* RES 6,C */ +OP(cb,b2) { D = RES(6,D); } /* RES 6,D */ +OP(cb,b3) { E = RES(6,E); } /* RES 6,E */ +OP(cb,b4) { H = RES(6,H); } /* RES 6,H */ +OP(cb,b5) { L = RES(6,L); } /* RES 6,L */ +OP(cb,b6) { WM( HL, RES(6,RM(HL)) ); } /* RES 6,(HL) */ +OP(cb,b7) { A = RES(6,A); } /* RES 6,A */ + +OP(cb,b8) { B = RES(7,B); } /* RES 7,B */ +OP(cb,b9) { C = RES(7,C); } /* RES 7,C */ +OP(cb,ba) { D = RES(7,D); } /* RES 7,D */ +OP(cb,bb) { E = RES(7,E); } /* RES 7,E */ +OP(cb,bc) { H = RES(7,H); } /* RES 7,H */ +OP(cb,bd) { L = RES(7,L); } /* RES 7,L */ +OP(cb,be) { WM( HL, RES(7,RM(HL)) ); } /* RES 7,(HL) */ +OP(cb,bf) { A = RES(7,A); } /* RES 7,A */ + +OP(cb,c0) { B = SET(0,B); } /* SET 0,B */ +OP(cb,c1) { C = SET(0,C); } /* SET 0,C */ +OP(cb,c2) { D = SET(0,D); } /* SET 0,D */ +OP(cb,c3) { E = SET(0,E); } /* SET 0,E */ +OP(cb,c4) { H = SET(0,H); } /* SET 0,H */ +OP(cb,c5) { L = SET(0,L); } /* SET 0,L */ +OP(cb,c6) { WM( HL, SET(0,RM(HL)) ); } /* SET 0,(HL) */ +OP(cb,c7) { A = SET(0,A); } /* SET 0,A */ + +OP(cb,c8) { B = SET(1,B); } /* SET 1,B */ +OP(cb,c9) { C = SET(1,C); } /* SET 1,C */ +OP(cb,ca) { D = SET(1,D); } /* SET 1,D */ +OP(cb,cb) { E = SET(1,E); } /* SET 1,E */ +OP(cb,cc) { H = SET(1,H); } /* SET 1,H */ +OP(cb,cd) { L = SET(1,L); } /* SET 1,L */ +OP(cb,ce) { WM( HL, SET(1,RM(HL)) ); } /* SET 1,(HL) */ +OP(cb,cf) { A = SET(1,A); } /* SET 1,A */ + +OP(cb,d0) { B = SET(2,B); } /* SET 2,B */ +OP(cb,d1) { C = SET(2,C); } /* SET 2,C */ +OP(cb,d2) { D = SET(2,D); } /* SET 2,D */ +OP(cb,d3) { E = SET(2,E); } /* SET 2,E */ +OP(cb,d4) { H = SET(2,H); } /* SET 2,H */ +OP(cb,d5) { L = SET(2,L); } /* SET 2,L */ +OP(cb,d6) { WM( HL, SET(2,RM(HL)) ); } /* SET 2,(HL) */ +OP(cb,d7) { A = SET(2,A); } /* SET 2,A */ + +OP(cb,d8) { B = SET(3,B); } /* SET 3,B */ +OP(cb,d9) { C = SET(3,C); } /* SET 3,C */ +OP(cb,da) { D = SET(3,D); } /* SET 3,D */ +OP(cb,db) { E = SET(3,E); } /* SET 3,E */ +OP(cb,dc) { H = SET(3,H); } /* SET 3,H */ +OP(cb,dd) { L = SET(3,L); } /* SET 3,L */ +OP(cb,de) { WM( HL, SET(3,RM(HL)) ); } /* SET 3,(HL) */ +OP(cb,df) { A = SET(3,A); } /* SET 3,A */ + +OP(cb,e0) { B = SET(4,B); } /* SET 4,B */ +OP(cb,e1) { C = SET(4,C); } /* SET 4,C */ +OP(cb,e2) { D = SET(4,D); } /* SET 4,D */ +OP(cb,e3) { E = SET(4,E); } /* SET 4,E */ +OP(cb,e4) { H = SET(4,H); } /* SET 4,H */ +OP(cb,e5) { L = SET(4,L); } /* SET 4,L */ +OP(cb,e6) { WM( HL, SET(4,RM(HL)) ); } /* SET 4,(HL) */ +OP(cb,e7) { A = SET(4,A); } /* SET 4,A */ + +OP(cb,e8) { B = SET(5,B); } /* SET 5,B */ +OP(cb,e9) { C = SET(5,C); } /* SET 5,C */ +OP(cb,ea) { D = SET(5,D); } /* SET 5,D */ +OP(cb,eb) { E = SET(5,E); } /* SET 5,E */ +OP(cb,ec) { H = SET(5,H); } /* SET 5,H */ +OP(cb,ed) { L = SET(5,L); } /* SET 5,L */ +OP(cb,ee) { WM( HL, SET(5,RM(HL)) ); } /* SET 5,(HL) */ +OP(cb,ef) { A = SET(5,A); } /* SET 5,A */ + +OP(cb,f0) { B = SET(6,B); } /* SET 6,B */ +OP(cb,f1) { C = SET(6,C); } /* SET 6,C */ +OP(cb,f2) { D = SET(6,D); } /* SET 6,D */ +OP(cb,f3) { E = SET(6,E); } /* SET 6,E */ +OP(cb,f4) { H = SET(6,H); } /* SET 6,H */ +OP(cb,f5) { L = SET(6,L); } /* SET 6,L */ +OP(cb,f6) { WM( HL, SET(6,RM(HL)) ); } /* SET 6,(HL) */ +OP(cb,f7) { A = SET(6,A); } /* SET 6,A */ + +OP(cb,f8) { B = SET(7,B); } /* SET 7,B */ +OP(cb,f9) { C = SET(7,C); } /* SET 7,C */ +OP(cb,fa) { D = SET(7,D); } /* SET 7,D */ +OP(cb,fb) { E = SET(7,E); } /* SET 7,E */ +OP(cb,fc) { H = SET(7,H); } /* SET 7,H */ +OP(cb,fd) { L = SET(7,L); } /* SET 7,L */ +OP(cb,fe) { WM( HL, SET(7,RM(HL)) ); } /* SET 7,(HL) */ +OP(cb,ff) { A = SET(7,A); } /* SET 7,A */ + + +/********************************************************** +* opcodes with DD/FD CB prefix +* rotate, shift and bit operations with (IX+o) +**********************************************************/ +OP(xycb,00) { B = RLC( RM(EA) ); WM( EA,B ); } /* RLC B=(XY+o) */ +OP(xycb,01) { C = RLC( RM(EA) ); WM( EA,C ); } /* RLC C=(XY+o) */ +OP(xycb,02) { D = RLC( RM(EA) ); WM( EA,D ); } /* RLC D=(XY+o) */ +OP(xycb,03) { E = RLC( RM(EA) ); WM( EA,E ); } /* RLC E=(XY+o) */ +OP(xycb,04) { H = RLC( RM(EA) ); WM( EA,H ); } /* RLC H=(XY+o) */ +OP(xycb,05) { L = RLC( RM(EA) ); WM( EA,L ); } /* RLC L=(XY+o) */ +OP(xycb,06) { WM( EA, RLC( RM(EA) ) ); } /* RLC (XY+o) */ +OP(xycb,07) { A = RLC( RM(EA) ); WM( EA,A ); } /* RLC A=(XY+o) */ + +OP(xycb,08) { B = RRC( RM(EA) ); WM( EA,B ); } /* RRC B=(XY+o) */ +OP(xycb,09) { C = RRC( RM(EA) ); WM( EA,C ); } /* RRC C=(XY+o) */ +OP(xycb,0a) { D = RRC( RM(EA) ); WM( EA,D ); } /* RRC D=(XY+o) */ +OP(xycb,0b) { E = RRC( RM(EA) ); WM( EA,E ); } /* RRC E=(XY+o) */ +OP(xycb,0c) { H = RRC( RM(EA) ); WM( EA,H ); } /* RRC H=(XY+o) */ +OP(xycb,0d) { L = RRC( RM(EA) ); WM( EA,L ); } /* RRC L=(XY+o) */ +OP(xycb,0e) { WM( EA,RRC( RM(EA) ) ); } /* RRC (XY+o) */ +OP(xycb,0f) { A = RRC( RM(EA) ); WM( EA,A ); } /* RRC A=(XY+o) */ + +OP(xycb,10) { B = RL( RM(EA) ); WM( EA,B ); } /* RL B=(XY+o) */ +OP(xycb,11) { C = RL( RM(EA) ); WM( EA,C ); } /* RL C=(XY+o) */ +OP(xycb,12) { D = RL( RM(EA) ); WM( EA,D ); } /* RL D=(XY+o) */ +OP(xycb,13) { E = RL( RM(EA) ); WM( EA,E ); } /* RL E=(XY+o) */ +OP(xycb,14) { H = RL( RM(EA) ); WM( EA,H ); } /* RL H=(XY+o) */ +OP(xycb,15) { L = RL( RM(EA) ); WM( EA,L ); } /* RL L=(XY+o) */ +OP(xycb,16) { WM( EA,RL( RM(EA) ) ); } /* RL (XY+o) */ +OP(xycb,17) { A = RL( RM(EA) ); WM( EA,A ); } /* RL A=(XY+o) */ + +OP(xycb,18) { B = RR( RM(EA) ); WM( EA,B ); } /* RR B=(XY+o) */ +OP(xycb,19) { C = RR( RM(EA) ); WM( EA,C ); } /* RR C=(XY+o) */ +OP(xycb,1a) { D = RR( RM(EA) ); WM( EA,D ); } /* RR D=(XY+o) */ +OP(xycb,1b) { E = RR( RM(EA) ); WM( EA,E ); } /* RR E=(XY+o) */ +OP(xycb,1c) { H = RR( RM(EA) ); WM( EA,H ); } /* RR H=(XY+o) */ +OP(xycb,1d) { L = RR( RM(EA) ); WM( EA,L ); } /* RR L=(XY+o) */ +OP(xycb,1e) { WM( EA,RR( RM(EA) ) ); } /* RR (XY+o) */ +OP(xycb,1f) { A = RR( RM(EA) ); WM( EA,A ); } /* RR A=(XY+o) */ + +OP(xycb,20) { B = SLA( RM(EA) ); WM( EA,B ); } /* SLA B=(XY+o) */ +OP(xycb,21) { C = SLA( RM(EA) ); WM( EA,C ); } /* SLA C=(XY+o) */ +OP(xycb,22) { D = SLA( RM(EA) ); WM( EA,D ); } /* SLA D=(XY+o) */ +OP(xycb,23) { E = SLA( RM(EA) ); WM( EA,E ); } /* SLA E=(XY+o) */ +OP(xycb,24) { H = SLA( RM(EA) ); WM( EA,H ); } /* SLA H=(XY+o) */ +OP(xycb,25) { L = SLA( RM(EA) ); WM( EA,L ); } /* SLA L=(XY+o) */ +OP(xycb,26) { WM( EA,SLA( RM(EA) ) ); } /* SLA (XY+o) */ +OP(xycb,27) { A = SLA( RM(EA) ); WM( EA,A ); } /* SLA A=(XY+o) */ + +OP(xycb,28) { B = SRA( RM(EA) ); WM( EA,B ); } /* SRA B=(XY+o) */ +OP(xycb,29) { C = SRA( RM(EA) ); WM( EA,C ); } /* SRA C=(XY+o) */ +OP(xycb,2a) { D = SRA( RM(EA) ); WM( EA,D ); } /* SRA D=(XY+o) */ +OP(xycb,2b) { E = SRA( RM(EA) ); WM( EA,E ); } /* SRA E=(XY+o) */ +OP(xycb,2c) { H = SRA( RM(EA) ); WM( EA,H ); } /* SRA H=(XY+o) */ +OP(xycb,2d) { L = SRA( RM(EA) ); WM( EA,L ); } /* SRA L=(XY+o) */ +OP(xycb,2e) { WM( EA,SRA( RM(EA) ) ); } /* SRA (XY+o) */ +OP(xycb,2f) { A = SRA( RM(EA) ); WM( EA,A ); } /* SRA A=(XY+o) */ + +OP(xycb,30) { B = SLL( RM(EA) ); WM( EA,B ); } /* SLL B=(XY+o) */ +OP(xycb,31) { C = SLL( RM(EA) ); WM( EA,C ); } /* SLL C=(XY+o) */ +OP(xycb,32) { D = SLL( RM(EA) ); WM( EA,D ); } /* SLL D=(XY+o) */ +OP(xycb,33) { E = SLL( RM(EA) ); WM( EA,E ); } /* SLL E=(XY+o) */ +OP(xycb,34) { H = SLL( RM(EA) ); WM( EA,H ); } /* SLL H=(XY+o) */ +OP(xycb,35) { L = SLL( RM(EA) ); WM( EA,L ); } /* SLL L=(XY+o) */ +OP(xycb,36) { WM( EA,SLL( RM(EA) ) ); } /* SLL (XY+o) */ +OP(xycb,37) { A = SLL( RM(EA) ); WM( EA,A ); } /* SLL A=(XY+o) */ + +OP(xycb,38) { B = SRL( RM(EA) ); WM( EA,B ); } /* SRL B=(XY+o) */ +OP(xycb,39) { C = SRL( RM(EA) ); WM( EA,C ); } /* SRL C=(XY+o) */ +OP(xycb,3a) { D = SRL( RM(EA) ); WM( EA,D ); } /* SRL D=(XY+o) */ +OP(xycb,3b) { E = SRL( RM(EA) ); WM( EA,E ); } /* SRL E=(XY+o) */ +OP(xycb,3c) { H = SRL( RM(EA) ); WM( EA,H ); } /* SRL H=(XY+o) */ +OP(xycb,3d) { L = SRL( RM(EA) ); WM( EA,L ); } /* SRL L=(XY+o) */ +OP(xycb,3e) { WM( EA,SRL( RM(EA) ) ); } /* SRL (XY+o) */ +OP(xycb,3f) { A = SRL( RM(EA) ); WM( EA,A ); } /* SRL A=(XY+o) */ + +OP(xycb,40) { xycb_46(); } /* BIT 0,(XY+o) */ +OP(xycb,41) { xycb_46(); } /* BIT 0,(XY+o) */ +OP(xycb,42) { xycb_46(); } /* BIT 0,(XY+o) */ +OP(xycb,43) { xycb_46(); } /* BIT 0,(XY+o) */ +OP(xycb,44) { xycb_46(); } /* BIT 0,(XY+o) */ +OP(xycb,45) { xycb_46(); } /* BIT 0,(XY+o) */ +OP(xycb,46) { BIT_XY(0,RM(EA)); } /* BIT 0,(XY+o) */ +OP(xycb,47) { xycb_46(); } /* BIT 0,(XY+o) */ + +OP(xycb,48) { xycb_4e(); } /* BIT 1,(XY+o) */ +OP(xycb,49) { xycb_4e(); } /* BIT 1,(XY+o) */ +OP(xycb,4a) { xycb_4e(); } /* BIT 1,(XY+o) */ +OP(xycb,4b) { xycb_4e(); } /* BIT 1,(XY+o) */ +OP(xycb,4c) { xycb_4e(); } /* BIT 1,(XY+o) */ +OP(xycb,4d) { xycb_4e(); } /* BIT 1,(XY+o) */ +OP(xycb,4e) { BIT_XY(1,RM(EA)); } /* BIT 1,(XY+o) */ +OP(xycb,4f) { xycb_4e(); } /* BIT 1,(XY+o) */ + +OP(xycb,50) { xycb_56(); } /* BIT 2,(XY+o) */ +OP(xycb,51) { xycb_56(); } /* BIT 2,(XY+o) */ +OP(xycb,52) { xycb_56(); } /* BIT 2,(XY+o) */ +OP(xycb,53) { xycb_56(); } /* BIT 2,(XY+o) */ +OP(xycb,54) { xycb_56(); } /* BIT 2,(XY+o) */ +OP(xycb,55) { xycb_56(); } /* BIT 2,(XY+o) */ +OP(xycb,56) { BIT_XY(2,RM(EA)); } /* BIT 2,(XY+o) */ +OP(xycb,57) { xycb_56(); } /* BIT 2,(XY+o) */ + +OP(xycb,58) { xycb_5e(); } /* BIT 3,(XY+o) */ +OP(xycb,59) { xycb_5e(); } /* BIT 3,(XY+o) */ +OP(xycb,5a) { xycb_5e(); } /* BIT 3,(XY+o) */ +OP(xycb,5b) { xycb_5e(); } /* BIT 3,(XY+o) */ +OP(xycb,5c) { xycb_5e(); } /* BIT 3,(XY+o) */ +OP(xycb,5d) { xycb_5e(); } /* BIT 3,(XY+o) */ +OP(xycb,5e) { BIT_XY(3,RM(EA)); } /* BIT 3,(XY+o) */ +OP(xycb,5f) { xycb_5e(); } /* BIT 3,(XY+o) */ + +OP(xycb,60) { xycb_66(); } /* BIT 4,(XY+o) */ +OP(xycb,61) { xycb_66(); } /* BIT 4,(XY+o) */ +OP(xycb,62) { xycb_66(); } /* BIT 4,(XY+o) */ +OP(xycb,63) { xycb_66(); } /* BIT 4,(XY+o) */ +OP(xycb,64) { xycb_66(); } /* BIT 4,(XY+o) */ +OP(xycb,65) { xycb_66(); } /* BIT 4,(XY+o) */ +OP(xycb,66) { BIT_XY(4,RM(EA)); } /* BIT 4,(XY+o) */ +OP(xycb,67) { xycb_66(); } /* BIT 4,(XY+o) */ + +OP(xycb,68) { xycb_6e(); } /* BIT 5,(XY+o) */ +OP(xycb,69) { xycb_6e(); } /* BIT 5,(XY+o) */ +OP(xycb,6a) { xycb_6e(); } /* BIT 5,(XY+o) */ +OP(xycb,6b) { xycb_6e(); } /* BIT 5,(XY+o) */ +OP(xycb,6c) { xycb_6e(); } /* BIT 5,(XY+o) */ +OP(xycb,6d) { xycb_6e(); } /* BIT 5,(XY+o) */ +OP(xycb,6e) { BIT_XY(5,RM(EA)); } /* BIT 5,(XY+o) */ +OP(xycb,6f) { xycb_6e(); } /* BIT 5,(XY+o) */ + +OP(xycb,70) { xycb_76(); } /* BIT 6,(XY+o) */ +OP(xycb,71) { xycb_76(); } /* BIT 6,(XY+o) */ +OP(xycb,72) { xycb_76(); } /* BIT 6,(XY+o) */ +OP(xycb,73) { xycb_76(); } /* BIT 6,(XY+o) */ +OP(xycb,74) { xycb_76(); } /* BIT 6,(XY+o) */ +OP(xycb,75) { xycb_76(); } /* BIT 6,(XY+o) */ +OP(xycb,76) { BIT_XY(6,RM(EA)); } /* BIT 6,(XY+o) */ +OP(xycb,77) { xycb_76(); } /* BIT 6,(XY+o) */ + +OP(xycb,78) { xycb_7e(); } /* BIT 7,(XY+o) */ +OP(xycb,79) { xycb_7e(); } /* BIT 7,(XY+o) */ +OP(xycb,7a) { xycb_7e(); } /* BIT 7,(XY+o) */ +OP(xycb,7b) { xycb_7e(); } /* BIT 7,(XY+o) */ +OP(xycb,7c) { xycb_7e(); } /* BIT 7,(XY+o) */ +OP(xycb,7d) { xycb_7e(); } /* BIT 7,(XY+o) */ +OP(xycb,7e) { BIT_XY(7,RM(EA)); } /* BIT 7,(XY+o) */ +OP(xycb,7f) { xycb_7e(); } /* BIT 7,(XY+o) */ + +OP(xycb,80) { B = RES(0, RM(EA) ); WM( EA,B ); } /* RES 0,B=(XY+o) */ +OP(xycb,81) { C = RES(0, RM(EA) ); WM( EA,C ); } /* RES 0,C=(XY+o) */ +OP(xycb,82) { D = RES(0, RM(EA) ); WM( EA,D ); } /* RES 0,D=(XY+o) */ +OP(xycb,83) { E = RES(0, RM(EA) ); WM( EA,E ); } /* RES 0,E=(XY+o) */ +OP(xycb,84) { H = RES(0, RM(EA) ); WM( EA,H ); } /* RES 0,H=(XY+o) */ +OP(xycb,85) { L = RES(0, RM(EA) ); WM( EA,L ); } /* RES 0,L=(XY+o) */ +OP(xycb,86) { WM( EA, RES(0,RM(EA)) ); } /* RES 0,(XY+o) */ +OP(xycb,87) { A = RES(0, RM(EA) ); WM( EA,A ); } /* RES 0,A=(XY+o) */ + +OP(xycb,88) { B = RES(1, RM(EA) ); WM( EA,B ); } /* RES 1,B=(XY+o) */ +OP(xycb,89) { C = RES(1, RM(EA) ); WM( EA,C ); } /* RES 1,C=(XY+o) */ +OP(xycb,8a) { D = RES(1, RM(EA) ); WM( EA,D ); } /* RES 1,D=(XY+o) */ +OP(xycb,8b) { E = RES(1, RM(EA) ); WM( EA,E ); } /* RES 1,E=(XY+o) */ +OP(xycb,8c) { H = RES(1, RM(EA) ); WM( EA,H ); } /* RES 1,H=(XY+o) */ +OP(xycb,8d) { L = RES(1, RM(EA) ); WM( EA,L ); } /* RES 1,L=(XY+o) */ +OP(xycb,8e) { WM( EA, RES(1,RM(EA)) ); } /* RES 1,(XY+o) */ +OP(xycb,8f) { A = RES(1, RM(EA) ); WM( EA,A ); } /* RES 1,A=(XY+o) */ + +OP(xycb,90) { B = RES(2, RM(EA) ); WM( EA,B ); } /* RES 2,B=(XY+o) */ +OP(xycb,91) { C = RES(2, RM(EA) ); WM( EA,C ); } /* RES 2,C=(XY+o) */ +OP(xycb,92) { D = RES(2, RM(EA) ); WM( EA,D ); } /* RES 2,D=(XY+o) */ +OP(xycb,93) { E = RES(2, RM(EA) ); WM( EA,E ); } /* RES 2,E=(XY+o) */ +OP(xycb,94) { H = RES(2, RM(EA) ); WM( EA,H ); } /* RES 2,H=(XY+o) */ +OP(xycb,95) { L = RES(2, RM(EA) ); WM( EA,L ); } /* RES 2,L=(XY+o) */ +OP(xycb,96) { WM( EA, RES(2,RM(EA)) ); } /* RES 2,(XY+o) */ +OP(xycb,97) { A = RES(2, RM(EA) ); WM( EA,A ); } /* RES 2,A=(XY+o) */ + +OP(xycb,98) { B = RES(3, RM(EA) ); WM( EA,B ); } /* RES 3,B=(XY+o) */ +OP(xycb,99) { C = RES(3, RM(EA) ); WM( EA,C ); } /* RES 3,C=(XY+o) */ +OP(xycb,9a) { D = RES(3, RM(EA) ); WM( EA,D ); } /* RES 3,D=(XY+o) */ +OP(xycb,9b) { E = RES(3, RM(EA) ); WM( EA,E ); } /* RES 3,E=(XY+o) */ +OP(xycb,9c) { H = RES(3, RM(EA) ); WM( EA,H ); } /* RES 3,H=(XY+o) */ +OP(xycb,9d) { L = RES(3, RM(EA) ); WM( EA,L ); } /* RES 3,L=(XY+o) */ +OP(xycb,9e) { WM( EA, RES(3,RM(EA)) ); } /* RES 3,(XY+o) */ +OP(xycb,9f) { A = RES(3, RM(EA) ); WM( EA,A ); } /* RES 3,A=(XY+o) */ + +OP(xycb,a0) { B = RES(4, RM(EA) ); WM( EA,B ); } /* RES 4,B=(XY+o) */ +OP(xycb,a1) { C = RES(4, RM(EA) ); WM( EA,C ); } /* RES 4,C=(XY+o) */ +OP(xycb,a2) { D = RES(4, RM(EA) ); WM( EA,D ); } /* RES 4,D=(XY+o) */ +OP(xycb,a3) { E = RES(4, RM(EA) ); WM( EA,E ); } /* RES 4,E=(XY+o) */ +OP(xycb,a4) { H = RES(4, RM(EA) ); WM( EA,H ); } /* RES 4,H=(XY+o) */ +OP(xycb,a5) { L = RES(4, RM(EA) ); WM( EA,L ); } /* RES 4,L=(XY+o) */ +OP(xycb,a6) { WM( EA, RES(4,RM(EA)) ); } /* RES 4,(XY+o) */ +OP(xycb,a7) { A = RES(4, RM(EA) ); WM( EA,A ); } /* RES 4,A=(XY+o) */ + +OP(xycb,a8) { B = RES(5, RM(EA) ); WM( EA,B ); } /* RES 5,B=(XY+o) */ +OP(xycb,a9) { C = RES(5, RM(EA) ); WM( EA,C ); } /* RES 5,C=(XY+o) */ +OP(xycb,aa) { D = RES(5, RM(EA) ); WM( EA,D ); } /* RES 5,D=(XY+o) */ +OP(xycb,ab) { E = RES(5, RM(EA) ); WM( EA,E ); } /* RES 5,E=(XY+o) */ +OP(xycb,ac) { H = RES(5, RM(EA) ); WM( EA,H ); } /* RES 5,H=(XY+o) */ +OP(xycb,ad) { L = RES(5, RM(EA) ); WM( EA,L ); } /* RES 5,L=(XY+o) */ +OP(xycb,ae) { WM( EA, RES(5,RM(EA)) ); } /* RES 5,(XY+o) */ +OP(xycb,af) { A = RES(5, RM(EA) ); WM( EA,A ); } /* RES 5,A=(XY+o) */ + +OP(xycb,b0) { B = RES(6, RM(EA) ); WM( EA,B ); } /* RES 6,B=(XY+o) */ +OP(xycb,b1) { C = RES(6, RM(EA) ); WM( EA,C ); } /* RES 6,C=(XY+o) */ +OP(xycb,b2) { D = RES(6, RM(EA) ); WM( EA,D ); } /* RES 6,D=(XY+o) */ +OP(xycb,b3) { E = RES(6, RM(EA) ); WM( EA,E ); } /* RES 6,E=(XY+o) */ +OP(xycb,b4) { H = RES(6, RM(EA) ); WM( EA,H ); } /* RES 6,H=(XY+o) */ +OP(xycb,b5) { L = RES(6, RM(EA) ); WM( EA,L ); } /* RES 6,L=(XY+o) */ +OP(xycb,b6) { WM( EA, RES(6,RM(EA)) ); } /* RES 6,(XY+o) */ +OP(xycb,b7) { A = RES(6, RM(EA) ); WM( EA,A ); } /* RES 6,A=(XY+o) */ + +OP(xycb,b8) { B = RES(7, RM(EA) ); WM( EA,B ); } /* RES 7,B=(XY+o) */ +OP(xycb,b9) { C = RES(7, RM(EA) ); WM( EA,C ); } /* RES 7,C=(XY+o) */ +OP(xycb,ba) { D = RES(7, RM(EA) ); WM( EA,D ); } /* RES 7,D=(XY+o) */ +OP(xycb,bb) { E = RES(7, RM(EA) ); WM( EA,E ); } /* RES 7,E=(XY+o) */ +OP(xycb,bc) { H = RES(7, RM(EA) ); WM( EA,H ); } /* RES 7,H=(XY+o) */ +OP(xycb,bd) { L = RES(7, RM(EA) ); WM( EA,L ); } /* RES 7,L=(XY+o) */ +OP(xycb,be) { WM( EA, RES(7,RM(EA)) ); } /* RES 7,(XY+o) */ +OP(xycb,bf) { A = RES(7, RM(EA) ); WM( EA,A ); } /* RES 7,A=(XY+o) */ + +OP(xycb,c0) { B = SET(0, RM(EA) ); WM( EA,B ); } /* SET 0,B=(XY+o) */ +OP(xycb,c1) { C = SET(0, RM(EA) ); WM( EA,C ); } /* SET 0,C=(XY+o) */ +OP(xycb,c2) { D = SET(0, RM(EA) ); WM( EA,D ); } /* SET 0,D=(XY+o) */ +OP(xycb,c3) { E = SET(0, RM(EA) ); WM( EA,E ); } /* SET 0,E=(XY+o) */ +OP(xycb,c4) { H = SET(0, RM(EA) ); WM( EA,H ); } /* SET 0,H=(XY+o) */ +OP(xycb,c5) { L = SET(0, RM(EA) ); WM( EA,L ); } /* SET 0,L=(XY+o) */ +OP(xycb,c6) { WM( EA, SET(0,RM(EA)) ); } /* SET 0,(XY+o) */ +OP(xycb,c7) { A = SET(0, RM(EA) ); WM( EA,A ); } /* SET 0,A=(XY+o) */ + +OP(xycb,c8) { B = SET(1, RM(EA) ); WM( EA,B ); } /* SET 1,B=(XY+o) */ +OP(xycb,c9) { C = SET(1, RM(EA) ); WM( EA,C ); } /* SET 1,C=(XY+o) */ +OP(xycb,ca) { D = SET(1, RM(EA) ); WM( EA,D ); } /* SET 1,D=(XY+o) */ +OP(xycb,cb) { E = SET(1, RM(EA) ); WM( EA,E ); } /* SET 1,E=(XY+o) */ +OP(xycb,cc) { H = SET(1, RM(EA) ); WM( EA,H ); } /* SET 1,H=(XY+o) */ +OP(xycb,cd) { L = SET(1, RM(EA) ); WM( EA,L ); } /* SET 1,L=(XY+o) */ +OP(xycb,ce) { WM( EA, SET(1,RM(EA)) ); } /* SET 1,(XY+o) */ +OP(xycb,cf) { A = SET(1, RM(EA) ); WM( EA,A ); } /* SET 1,A=(XY+o) */ + +OP(xycb,d0) { B = SET(2, RM(EA) ); WM( EA,B ); } /* SET 2,B=(XY+o) */ +OP(xycb,d1) { C = SET(2, RM(EA) ); WM( EA,C ); } /* SET 2,C=(XY+o) */ +OP(xycb,d2) { D = SET(2, RM(EA) ); WM( EA,D ); } /* SET 2,D=(XY+o) */ +OP(xycb,d3) { E = SET(2, RM(EA) ); WM( EA,E ); } /* SET 2,E=(XY+o) */ +OP(xycb,d4) { H = SET(2, RM(EA) ); WM( EA,H ); } /* SET 2,H=(XY+o) */ +OP(xycb,d5) { L = SET(2, RM(EA) ); WM( EA,L ); } /* SET 2,L=(XY+o) */ +OP(xycb,d6) { WM( EA, SET(2,RM(EA)) ); } /* SET 2,(XY+o) */ +OP(xycb,d7) { A = SET(2, RM(EA) ); WM( EA,A ); } /* SET 2,A=(XY+o) */ + +OP(xycb,d8) { B = SET(3, RM(EA) ); WM( EA,B ); } /* SET 3,B=(XY+o) */ +OP(xycb,d9) { C = SET(3, RM(EA) ); WM( EA,C ); } /* SET 3,C=(XY+o) */ +OP(xycb,da) { D = SET(3, RM(EA) ); WM( EA,D ); } /* SET 3,D=(XY+o) */ +OP(xycb,db) { E = SET(3, RM(EA) ); WM( EA,E ); } /* SET 3,E=(XY+o) */ +OP(xycb,dc) { H = SET(3, RM(EA) ); WM( EA,H ); } /* SET 3,H=(XY+o) */ +OP(xycb,dd) { L = SET(3, RM(EA) ); WM( EA,L ); } /* SET 3,L=(XY+o) */ +OP(xycb,de) { WM( EA, SET(3,RM(EA)) ); } /* SET 3,(XY+o) */ +OP(xycb,df) { A = SET(3, RM(EA) ); WM( EA,A ); } /* SET 3,A=(XY+o) */ + +OP(xycb,e0) { B = SET(4, RM(EA) ); WM( EA,B ); } /* SET 4,B=(XY+o) */ +OP(xycb,e1) { C = SET(4, RM(EA) ); WM( EA,C ); } /* SET 4,C=(XY+o) */ +OP(xycb,e2) { D = SET(4, RM(EA) ); WM( EA,D ); } /* SET 4,D=(XY+o) */ +OP(xycb,e3) { E = SET(4, RM(EA) ); WM( EA,E ); } /* SET 4,E=(XY+o) */ +OP(xycb,e4) { H = SET(4, RM(EA) ); WM( EA,H ); } /* SET 4,H=(XY+o) */ +OP(xycb,e5) { L = SET(4, RM(EA) ); WM( EA,L ); } /* SET 4,L=(XY+o) */ +OP(xycb,e6) { WM( EA, SET(4,RM(EA)) ); } /* SET 4,(XY+o) */ +OP(xycb,e7) { A = SET(4, RM(EA) ); WM( EA,A ); } /* SET 4,A=(XY+o) */ + +OP(xycb,e8) { B = SET(5, RM(EA) ); WM( EA,B ); } /* SET 5,B=(XY+o) */ +OP(xycb,e9) { C = SET(5, RM(EA) ); WM( EA,C ); } /* SET 5,C=(XY+o) */ +OP(xycb,ea) { D = SET(5, RM(EA) ); WM( EA,D ); } /* SET 5,D=(XY+o) */ +OP(xycb,eb) { E = SET(5, RM(EA) ); WM( EA,E ); } /* SET 5,E=(XY+o) */ +OP(xycb,ec) { H = SET(5, RM(EA) ); WM( EA,H ); } /* SET 5,H=(XY+o) */ +OP(xycb,ed) { L = SET(5, RM(EA) ); WM( EA,L ); } /* SET 5,L=(XY+o) */ +OP(xycb,ee) { WM( EA, SET(5,RM(EA)) ); } /* SET 5,(XY+o) */ +OP(xycb,ef) { A = SET(5, RM(EA) ); WM( EA,A ); } /* SET 5,A=(XY+o) */ + +OP(xycb,f0) { B = SET(6, RM(EA) ); WM( EA,B ); } /* SET 6,B=(XY+o) */ +OP(xycb,f1) { C = SET(6, RM(EA) ); WM( EA,C ); } /* SET 6,C=(XY+o) */ +OP(xycb,f2) { D = SET(6, RM(EA) ); WM( EA,D ); } /* SET 6,D=(XY+o) */ +OP(xycb,f3) { E = SET(6, RM(EA) ); WM( EA,E ); } /* SET 6,E=(XY+o) */ +OP(xycb,f4) { H = SET(6, RM(EA) ); WM( EA,H ); } /* SET 6,H=(XY+o) */ +OP(xycb,f5) { L = SET(6, RM(EA) ); WM( EA,L ); } /* SET 6,L=(XY+o) */ +OP(xycb,f6) { WM( EA, SET(6,RM(EA)) ); } /* SET 6,(XY+o) */ +OP(xycb,f7) { A = SET(6, RM(EA) ); WM( EA,A ); } /* SET 6,A=(XY+o) */ + +OP(xycb,f8) { B = SET(7, RM(EA) ); WM( EA,B ); } /* SET 7,B=(XY+o) */ +OP(xycb,f9) { C = SET(7, RM(EA) ); WM( EA,C ); } /* SET 7,C=(XY+o) */ +OP(xycb,fa) { D = SET(7, RM(EA) ); WM( EA,D ); } /* SET 7,D=(XY+o) */ +OP(xycb,fb) { E = SET(7, RM(EA) ); WM( EA,E ); } /* SET 7,E=(XY+o) */ +OP(xycb,fc) { H = SET(7, RM(EA) ); WM( EA,H ); } /* SET 7,H=(XY+o) */ +OP(xycb,fd) { L = SET(7, RM(EA) ); WM( EA,L ); } /* SET 7,L=(XY+o) */ +OP(xycb,fe) { WM( EA, SET(7,RM(EA)) ); } /* SET 7,(XY+o) */ +OP(xycb,ff) { A = SET(7, RM(EA) ); WM( EA,A ); } /* SET 7,A=(XY+o) */ + +OP(illegal,1) { +#if VERBOSE + logerror("Z80 #%d ill. opcode $%02x $%02x\n", + cpu_getactivecpu(), cpu_readop((PCD-1)&0xffff), cpu_readop(PCD)); +#endif +} +/********************************************************** + * IX register related opcodes (DD prefix) + **********************************************************/ +OP(dd,00) { illegal_1(); op_00(); } /* DB DD */ +OP(dd,01) { illegal_1(); op_01(); } /* DB DD */ +OP(dd,02) { illegal_1(); op_02(); } /* DB DD */ +OP(dd,03) { illegal_1(); op_03(); } /* DB DD */ +OP(dd,04) { illegal_1(); op_04(); } /* DB DD */ +OP(dd,05) { illegal_1(); op_05(); } /* DB DD */ +OP(dd,06) { illegal_1(); op_06(); } /* DB DD */ +OP(dd,07) { illegal_1(); op_07(); } /* DB DD */ + +OP(dd,08) { illegal_1(); op_08(); } /* DB DD */ +OP(dd,09) { ADD16(ix,bc); } /* ADD IX,BC */ +OP(dd,0a) { illegal_1(); op_0a(); } /* DB DD */ +OP(dd,0b) { illegal_1(); op_0b(); } /* DB DD */ +OP(dd,0c) { illegal_1(); op_0c(); } /* DB DD */ +OP(dd,0d) { illegal_1(); op_0d(); } /* DB DD */ +OP(dd,0e) { illegal_1(); op_0e(); } /* DB DD */ +OP(dd,0f) { illegal_1(); op_0f(); } /* DB DD */ + +OP(dd,10) { illegal_1(); op_10(); } /* DB DD */ +OP(dd,11) { illegal_1(); op_11(); } /* DB DD */ +OP(dd,12) { illegal_1(); op_12(); } /* DB DD */ +OP(dd,13) { illegal_1(); op_13(); } /* DB DD */ +OP(dd,14) { illegal_1(); op_14(); } /* DB DD */ +OP(dd,15) { illegal_1(); op_15(); } /* DB DD */ +OP(dd,16) { illegal_1(); op_16(); } /* DB DD */ +OP(dd,17) { illegal_1(); op_17(); } /* DB DD */ + +OP(dd,18) { illegal_1(); op_18(); } /* DB DD */ +OP(dd,19) { ADD16(ix,de); } /* ADD IX,DE */ +OP(dd,1a) { illegal_1(); op_1a(); } /* DB DD */ +OP(dd,1b) { illegal_1(); op_1b(); } /* DB DD */ +OP(dd,1c) { illegal_1(); op_1c(); } /* DB DD */ +OP(dd,1d) { illegal_1(); op_1d(); } /* DB DD */ +OP(dd,1e) { illegal_1(); op_1e(); } /* DB DD */ +OP(dd,1f) { illegal_1(); op_1f(); } /* DB DD */ + +OP(dd,20) { illegal_1(); op_20(); } /* DB DD */ +OP(dd,21) { IX = ARG16(); } /* LD IX,w */ +OP(dd,22) { EA = ARG16(); WM16( EA, &Z80.ix ); WZ = EA+1; } /* LD (w),IX */ +OP(dd,23) { IX++; } /* INC IX */ +OP(dd,24) { HX = INC(HX); } /* INC HX */ +OP(dd,25) { HX = DEC(HX); } /* DEC HX */ +OP(dd,26) { HX = ARG(); } /* LD HX,n */ +OP(dd,27) { illegal_1(); op_27(); } /* DB DD */ + +OP(dd,28) { illegal_1(); op_28(); } /* DB DD */ +OP(dd,29) { ADD16(ix,ix); } /* ADD IX,IX */ +OP(dd,2a) { EA = ARG16(); RM16( EA, &Z80.ix ); WZ = EA+1; } /* LD IX,(w) */ +OP(dd,2b) { IX--; } /* DEC IX */ +OP(dd,2c) { LX = INC(LX); } /* INC LX */ +OP(dd,2d) { LX = DEC(LX); } /* DEC LX */ +OP(dd,2e) { LX = ARG(); } /* LD LX,n */ +OP(dd,2f) { illegal_1(); op_2f(); } /* DB DD */ + +OP(dd,30) { illegal_1(); op_30(); } /* DB DD */ +OP(dd,31) { illegal_1(); op_31(); } /* DB DD */ +OP(dd,32) { illegal_1(); op_32(); } /* DB DD */ +OP(dd,33) { illegal_1(); op_33(); } /* DB DD */ +OP(dd,34) { EAX; WM( EA, INC(RM(EA)) ); } /* INC (IX+o) */ +OP(dd,35) { EAX; WM( EA, DEC(RM(EA)) ); } /* DEC (IX+o) */ +OP(dd,36) { EAX; WM( EA, ARG() ); } /* LD (IX+o),n */ +OP(dd,37) { illegal_1(); op_37(); } /* DB DD */ + +OP(dd,38) { illegal_1(); op_38(); } /* DB DD */ +OP(dd,39) { ADD16(ix,sp); } /* ADD IX,SP */ +OP(dd,3a) { illegal_1(); op_3a(); } /* DB DD */ +OP(dd,3b) { illegal_1(); op_3b(); } /* DB DD */ +OP(dd,3c) { illegal_1(); op_3c(); } /* DB DD */ +OP(dd,3d) { illegal_1(); op_3d(); } /* DB DD */ +OP(dd,3e) { illegal_1(); op_3e(); } /* DB DD */ +OP(dd,3f) { illegal_1(); op_3f(); } /* DB DD */ + +OP(dd,40) { illegal_1(); op_40(); } /* DB DD */ +OP(dd,41) { illegal_1(); op_41(); } /* DB DD */ +OP(dd,42) { illegal_1(); op_42(); } /* DB DD */ +OP(dd,43) { illegal_1(); op_43(); } /* DB DD */ +OP(dd,44) { B = HX; } /* LD B,HX */ +OP(dd,45) { B = LX; } /* LD B,LX */ +OP(dd,46) { EAX; B = RM(EA); } /* LD B,(IX+o) */ +OP(dd,47) { illegal_1(); op_47(); } /* DB DD */ + +OP(dd,48) { illegal_1(); op_48(); } /* DB DD */ +OP(dd,49) { illegal_1(); op_49(); } /* DB DD */ +OP(dd,4a) { illegal_1(); op_4a(); } /* DB DD */ +OP(dd,4b) { illegal_1(); op_4b(); } /* DB DD */ +OP(dd,4c) { C = HX; } /* LD C,HX */ +OP(dd,4d) { C = LX; } /* LD C,LX */ +OP(dd,4e) { EAX; C = RM(EA); } /* LD C,(IX+o) */ +OP(dd,4f) { illegal_1(); op_4f(); } /* DB DD */ + +OP(dd,50) { illegal_1(); op_50(); } /* DB DD */ +OP(dd,51) { illegal_1(); op_51(); } /* DB DD */ +OP(dd,52) { illegal_1(); op_52(); } /* DB DD */ +OP(dd,53) { illegal_1(); op_53(); } /* DB DD */ +OP(dd,54) { D = HX; } /* LD D,HX */ +OP(dd,55) { D = LX; } /* LD D,LX */ +OP(dd,56) { EAX; D = RM(EA); } /* LD D,(IX+o) */ +OP(dd,57) { illegal_1(); op_57(); } /* DB DD */ + +OP(dd,58) { illegal_1(); op_58(); } /* DB DD */ +OP(dd,59) { illegal_1(); op_59(); } /* DB DD */ +OP(dd,5a) { illegal_1(); op_5a(); } /* DB DD */ +OP(dd,5b) { illegal_1(); op_5b(); } /* DB DD */ +OP(dd,5c) { E = HX; } /* LD E,HX */ +OP(dd,5d) { E = LX; } /* LD E,LX */ +OP(dd,5e) { EAX; E = RM(EA); } /* LD E,(IX+o) */ +OP(dd,5f) { illegal_1(); op_5f(); } /* DB DD */ + +OP(dd,60) { HX = B; } /* LD HX,B */ +OP(dd,61) { HX = C; } /* LD HX,C */ +OP(dd,62) { HX = D; } /* LD HX,D */ +OP(dd,63) { HX = E; } /* LD HX,E */ +OP(dd,64) { } /* LD HX,HX */ +OP(dd,65) { HX = LX; } /* LD HX,LX */ +OP(dd,66) { EAX; H = RM(EA); } /* LD H,(IX+o) */ +OP(dd,67) { HX = A; } /* LD HX,A */ + +OP(dd,68) { LX = B; } /* LD LX,B */ +OP(dd,69) { LX = C; } /* LD LX,C */ +OP(dd,6a) { LX = D; } /* LD LX,D */ +OP(dd,6b) { LX = E; } /* LD LX,E */ +OP(dd,6c) { LX = HX; } /* LD LX,HX */ +OP(dd,6d) { } /* LD LX,LX */ +OP(dd,6e) { EAX; L = RM(EA); } /* LD L,(IX+o) */ +OP(dd,6f) { LX = A; } /* LD LX,A */ + +OP(dd,70) { EAX; WM( EA, B ); } /* LD (IX+o),B */ +OP(dd,71) { EAX; WM( EA, C ); } /* LD (IX+o),C */ +OP(dd,72) { EAX; WM( EA, D ); } /* LD (IX+o),D */ +OP(dd,73) { EAX; WM( EA, E ); } /* LD (IX+o),E */ +OP(dd,74) { EAX; WM( EA, H ); } /* LD (IX+o),H */ +OP(dd,75) { EAX; WM( EA, L ); } /* LD (IX+o),L */ +OP(dd,76) { illegal_1(); op_76(); } /* DB DD */ +OP(dd,77) { EAX; WM( EA, A ); } /* LD (IX+o),A */ + +OP(dd,78) { illegal_1(); op_78(); } /* DB DD */ +OP(dd,79) { illegal_1(); op_79(); } /* DB DD */ +OP(dd,7a) { illegal_1(); op_7a(); } /* DB DD */ +OP(dd,7b) { illegal_1(); op_7b(); } /* DB DD */ +OP(dd,7c) { A = HX; } /* LD A,HX */ +OP(dd,7d) { A = LX; } /* LD A,LX */ +OP(dd,7e) { EAX; A = RM(EA); } /* LD A,(IX+o) */ +OP(dd,7f) { illegal_1(); op_7f(); } /* DB DD */ + +OP(dd,80) { illegal_1(); op_80(); } /* DB DD */ +OP(dd,81) { illegal_1(); op_81(); } /* DB DD */ +OP(dd,82) { illegal_1(); op_82(); } /* DB DD */ +OP(dd,83) { illegal_1(); op_83(); } /* DB DD */ +OP(dd,84) { ADD(HX); } /* ADD A,HX */ +OP(dd,85) { ADD(LX); } /* ADD A,LX */ +OP(dd,86) { EAX; ADD(RM(EA)); } /* ADD A,(IX+o) */ +OP(dd,87) { illegal_1(); op_87(); } /* DB DD */ + +OP(dd,88) { illegal_1(); op_88(); } /* DB DD */ +OP(dd,89) { illegal_1(); op_89(); } /* DB DD */ +OP(dd,8a) { illegal_1(); op_8a(); } /* DB DD */ +OP(dd,8b) { illegal_1(); op_8b(); } /* DB DD */ +OP(dd,8c) { ADC(HX); } /* ADC A,HX */ +OP(dd,8d) { ADC(LX); } /* ADC A,LX */ +OP(dd,8e) { EAX; ADC(RM(EA)); } /* ADC A,(IX+o) */ +OP(dd,8f) { illegal_1(); op_8f(); } /* DB DD */ + +OP(dd,90) { illegal_1(); op_90(); } /* DB DD */ +OP(dd,91) { illegal_1(); op_91(); } /* DB DD */ +OP(dd,92) { illegal_1(); op_92(); } /* DB DD */ +OP(dd,93) { illegal_1(); op_93(); } /* DB DD */ +OP(dd,94) { SUB(HX); } /* SUB HX */ +OP(dd,95) { SUB(LX); } /* SUB LX */ +OP(dd,96) { EAX; SUB(RM(EA)); } /* SUB (IX+o) */ +OP(dd,97) { illegal_1(); op_97(); } /* DB DD */ + +OP(dd,98) { illegal_1(); op_98(); } /* DB DD */ +OP(dd,99) { illegal_1(); op_99(); } /* DB DD */ +OP(dd,9a) { illegal_1(); op_9a(); } /* DB DD */ +OP(dd,9b) { illegal_1(); op_9b(); } /* DB DD */ +OP(dd,9c) { SBC(HX); } /* SBC A,HX */ +OP(dd,9d) { SBC(LX); } /* SBC A,LX */ +OP(dd,9e) { EAX; SBC(RM(EA)); } /* SBC A,(IX+o) */ +OP(dd,9f) { illegal_1(); op_9f(); } /* DB DD */ + +OP(dd,a0) { illegal_1(); op_a0(); } /* DB DD */ +OP(dd,a1) { illegal_1(); op_a1(); } /* DB DD */ +OP(dd,a2) { illegal_1(); op_a2(); } /* DB DD */ +OP(dd,a3) { illegal_1(); op_a3(); } /* DB DD */ +OP(dd,a4) { AND(HX); } /* AND HX */ +OP(dd,a5) { AND(LX); } /* AND LX */ +OP(dd,a6) { EAX; AND(RM(EA)); } /* AND (IX+o) */ +OP(dd,a7) { illegal_1(); op_a7(); } /* DB DD */ + +OP(dd,a8) { illegal_1(); op_a8(); } /* DB DD */ +OP(dd,a9) { illegal_1(); op_a9(); } /* DB DD */ +OP(dd,aa) { illegal_1(); op_aa(); } /* DB DD */ +OP(dd,ab) { illegal_1(); op_ab(); } /* DB DD */ +OP(dd,ac) { XOR(HX); } /* XOR HX */ +OP(dd,ad) { XOR(LX); } /* XOR LX */ +OP(dd,ae) { EAX; XOR(RM(EA)); } /* XOR (IX+o) */ +OP(dd,af) { illegal_1(); op_af(); } /* DB DD */ + +OP(dd,b0) { illegal_1(); op_b0(); } /* DB DD */ +OP(dd,b1) { illegal_1(); op_b1(); } /* DB DD */ +OP(dd,b2) { illegal_1(); op_b2(); } /* DB DD */ +OP(dd,b3) { illegal_1(); op_b3(); } /* DB DD */ +OP(dd,b4) { OR(HX); } /* OR HX */ +OP(dd,b5) { OR(LX); } /* OR LX */ +OP(dd,b6) { EAX; OR(RM(EA)); } /* OR (IX+o) */ +OP(dd,b7) { illegal_1(); op_b7(); } /* DB DD */ + +OP(dd,b8) { illegal_1(); op_b8(); } /* DB DD */ +OP(dd,b9) { illegal_1(); op_b9(); } /* DB DD */ +OP(dd,ba) { illegal_1(); op_ba(); } /* DB DD */ +OP(dd,bb) { illegal_1(); op_bb(); } /* DB DD */ +OP(dd,bc) { CP(HX); } /* CP HX */ +OP(dd,bd) { CP(LX); } /* CP LX */ +OP(dd,be) { EAX; CP(RM(EA)); } /* CP (IX+o) */ +OP(dd,bf) { illegal_1(); op_bf(); } /* DB DD */ + +OP(dd,c0) { illegal_1(); op_c0(); } /* DB DD */ +OP(dd,c1) { illegal_1(); op_c1(); } /* DB DD */ +OP(dd,c2) { illegal_1(); op_c2(); } /* DB DD */ +OP(dd,c3) { illegal_1(); op_c3(); } /* DB DD */ +OP(dd,c4) { illegal_1(); op_c4(); } /* DB DD */ +OP(dd,c5) { illegal_1(); op_c5(); } /* DB DD */ +OP(dd,c6) { illegal_1(); op_c6(); } /* DB DD */ +OP(dd,c7) { illegal_1(); op_c7(); } /* DB DD */ + +OP(dd,c8) { illegal_1(); op_c8(); } /* DB DD */ +OP(dd,c9) { illegal_1(); op_c9(); } /* DB DD */ +OP(dd,ca) { illegal_1(); op_ca(); } /* DB DD */ +OP(dd,cb) { EAX; EXEC(xycb,ARG()); } /* **** DD CB xx */ +OP(dd,cc) { illegal_1(); op_cc(); } /* DB DD */ +OP(dd,cd) { illegal_1(); op_cd(); } /* DB DD */ +OP(dd,ce) { illegal_1(); op_ce(); } /* DB DD */ +OP(dd,cf) { illegal_1(); op_cf(); } /* DB DD */ + +OP(dd,d0) { illegal_1(); op_d0(); } /* DB DD */ +OP(dd,d1) { illegal_1(); op_d1(); } /* DB DD */ +OP(dd,d2) { illegal_1(); op_d2(); } /* DB DD */ +OP(dd,d3) { illegal_1(); op_d3(); } /* DB DD */ +OP(dd,d4) { illegal_1(); op_d4(); } /* DB DD */ +OP(dd,d5) { illegal_1(); op_d5(); } /* DB DD */ +OP(dd,d6) { illegal_1(); op_d6(); } /* DB DD */ +OP(dd,d7) { illegal_1(); op_d7(); } /* DB DD */ + +OP(dd,d8) { illegal_1(); op_d8(); } /* DB DD */ +OP(dd,d9) { illegal_1(); op_d9(); } /* DB DD */ +OP(dd,da) { illegal_1(); op_da(); } /* DB DD */ +OP(dd,db) { illegal_1(); op_db(); } /* DB DD */ +OP(dd,dc) { illegal_1(); op_dc(); } /* DB DD */ +OP(dd,dd) { EXEC(dd,ROP()); } /* **** DD DD xx */ +OP(dd,de) { illegal_1(); op_de(); } /* DB DD */ +OP(dd,df) { illegal_1(); op_df(); } /* DB DD */ + +OP(dd,e0) { illegal_1(); op_e0(); } /* DB DD */ +OP(dd,e1) { POP( ix ); } /* POP IX */ +OP(dd,e2) { illegal_1(); op_e2(); } /* DB DD */ +OP(dd,e3) { EXSP( ix ); } /* EX (SP),IX */ +OP(dd,e4) { illegal_1(); op_e4(); } /* DB DD */ +OP(dd,e5) { PUSH( ix ); } /* PUSH IX */ +OP(dd,e6) { illegal_1(); op_e6(); } /* DB DD */ +OP(dd,e7) { illegal_1(); op_e7(); } /* DB DD */ + +OP(dd,e8) { illegal_1(); op_e8(); } /* DB DD */ +OP(dd,e9) { PC = IX; } /* JP (IX) */ +OP(dd,ea) { illegal_1(); op_ea(); } /* DB DD */ +OP(dd,eb) { illegal_1(); op_eb(); } /* DB DD */ +OP(dd,ec) { illegal_1(); op_ec(); } /* DB DD */ +OP(dd,ed) { illegal_1(); op_ed(); } /* DB DD */ +OP(dd,ee) { illegal_1(); op_ee(); } /* DB DD */ +OP(dd,ef) { illegal_1(); op_ef(); } /* DB DD */ + +OP(dd,f0) { illegal_1(); op_f0(); } /* DB DD */ +OP(dd,f1) { illegal_1(); op_f1(); } /* DB DD */ +OP(dd,f2) { illegal_1(); op_f2(); } /* DB DD */ +OP(dd,f3) { illegal_1(); op_f3(); } /* DB DD */ +OP(dd,f4) { illegal_1(); op_f4(); } /* DB DD */ +OP(dd,f5) { illegal_1(); op_f5(); } /* DB DD */ +OP(dd,f6) { illegal_1(); op_f6(); } /* DB DD */ +OP(dd,f7) { illegal_1(); op_f7(); } /* DB DD */ + +OP(dd,f8) { illegal_1(); op_f8(); } /* DB DD */ +OP(dd,f9) { SP = IX; } /* LD SP,IX */ +OP(dd,fa) { illegal_1(); op_fa(); } /* DB DD */ +OP(dd,fb) { illegal_1(); op_fb(); } /* DB DD */ +OP(dd,fc) { illegal_1(); op_fc(); } /* DB DD */ +OP(dd,fd) { EXEC(fd,ROP()); } /* **** DD FD xx */ +OP(dd,fe) { illegal_1(); op_fe(); } /* DB DD */ +OP(dd,ff) { illegal_1(); op_ff(); } /* DB DD */ + +/********************************************************** + * IY register related opcodes (FD prefix) + **********************************************************/ +OP(fd,00) { illegal_1(); op_00(); } /* DB FD */ +OP(fd,01) { illegal_1(); op_01(); } /* DB FD */ +OP(fd,02) { illegal_1(); op_02(); } /* DB FD */ +OP(fd,03) { illegal_1(); op_03(); } /* DB FD */ +OP(fd,04) { illegal_1(); op_04(); } /* DB FD */ +OP(fd,05) { illegal_1(); op_05(); } /* DB FD */ +OP(fd,06) { illegal_1(); op_06(); } /* DB FD */ +OP(fd,07) { illegal_1(); op_07(); } /* DB FD */ + +OP(fd,08) { illegal_1(); op_08(); } /* DB FD */ +OP(fd,09) { ADD16(iy,bc); } /* ADD IY,BC */ +OP(fd,0a) { illegal_1(); op_0a(); } /* DB FD */ +OP(fd,0b) { illegal_1(); op_0b(); } /* DB FD */ +OP(fd,0c) { illegal_1(); op_0c(); } /* DB FD */ +OP(fd,0d) { illegal_1(); op_0d(); } /* DB FD */ +OP(fd,0e) { illegal_1(); op_0e(); } /* DB FD */ +OP(fd,0f) { illegal_1(); op_0f(); } /* DB FD */ + +OP(fd,10) { illegal_1(); op_10(); } /* DB FD */ +OP(fd,11) { illegal_1(); op_11(); } /* DB FD */ +OP(fd,12) { illegal_1(); op_12(); } /* DB FD */ +OP(fd,13) { illegal_1(); op_13(); } /* DB FD */ +OP(fd,14) { illegal_1(); op_14(); } /* DB FD */ +OP(fd,15) { illegal_1(); op_15(); } /* DB FD */ +OP(fd,16) { illegal_1(); op_16(); } /* DB FD */ +OP(fd,17) { illegal_1(); op_17(); } /* DB FD */ + +OP(fd,18) { illegal_1(); op_18(); } /* DB FD */ +OP(fd,19) { ADD16(iy,de); } /* ADD IY,DE */ +OP(fd,1a) { illegal_1(); op_1a(); } /* DB FD */ +OP(fd,1b) { illegal_1(); op_1b(); } /* DB FD */ +OP(fd,1c) { illegal_1(); op_1c(); } /* DB FD */ +OP(fd,1d) { illegal_1(); op_1d(); } /* DB FD */ +OP(fd,1e) { illegal_1(); op_1e(); } /* DB FD */ +OP(fd,1f) { illegal_1(); op_1f(); } /* DB FD */ + +OP(fd,20) { illegal_1(); op_20(); } /* DB FD */ +OP(fd,21) { IY = ARG16(); } /* LD IY,w */ +OP(fd,22) { EA = ARG16(); WM16( EA, &Z80.iy ); WZ = EA+1; } /* LD (w),IY */ +OP(fd,23) { IY++; } /* INC IY */ +OP(fd,24) { HY = INC(HY); } /* INC HY */ +OP(fd,25) { HY = DEC(HY); } /* DEC HY */ +OP(fd,26) { HY = ARG(); } /* LD HY,n */ +OP(fd,27) { illegal_1(); op_27(); } /* DB FD */ + +OP(fd,28) { illegal_1(); op_28(); } /* DB FD */ +OP(fd,29) { ADD16(iy,iy); } /* ADD IY,IY */ +OP(fd,2a) { EA = ARG16(); RM16( EA, &Z80.iy ); WZ = EA+1; } /* LD IY,(w) */ +OP(fd,2b) { IY--; } /* DEC IY */ +OP(fd,2c) { LY = INC(LY); } /* INC LY */ +OP(fd,2d) { LY = DEC(LY); } /* DEC LY */ +OP(fd,2e) { LY = ARG(); } /* LD LY,n */ +OP(fd,2f) { illegal_1(); op_2f(); } /* DB FD */ + +OP(fd,30) { illegal_1(); op_30(); } /* DB FD */ +OP(fd,31) { illegal_1(); op_31(); } /* DB FD */ +OP(fd,32) { illegal_1(); op_32(); } /* DB FD */ +OP(fd,33) { illegal_1(); op_33(); } /* DB FD */ +OP(fd,34) { EAY; WM( EA, INC(RM(EA)) ); } /* INC (IY+o) */ +OP(fd,35) { EAY; WM( EA, DEC(RM(EA)) ); } /* DEC (IY+o) */ +OP(fd,36) { EAY; WM( EA, ARG() ); } /* LD (IY+o),n */ +OP(fd,37) { illegal_1(); op_37(); } /* DB FD */ + +OP(fd,38) { illegal_1(); op_38(); } /* DB FD */ +OP(fd,39) { ADD16(iy,sp); } /* ADD IY,SP */ +OP(fd,3a) { illegal_1(); op_3a(); } /* DB FD */ +OP(fd,3b) { illegal_1(); op_3b(); } /* DB FD */ +OP(fd,3c) { illegal_1(); op_3c(); } /* DB FD */ +OP(fd,3d) { illegal_1(); op_3d(); } /* DB FD */ +OP(fd,3e) { illegal_1(); op_3e(); } /* DB FD */ +OP(fd,3f) { illegal_1(); op_3f(); } /* DB FD */ + +OP(fd,40) { illegal_1(); op_40(); } /* DB FD */ +OP(fd,41) { illegal_1(); op_41(); } /* DB FD */ +OP(fd,42) { illegal_1(); op_42(); } /* DB FD */ +OP(fd,43) { illegal_1(); op_43(); } /* DB FD */ +OP(fd,44) { B = HY; } /* LD B,HY */ +OP(fd,45) { B = LY; } /* LD B,LY */ +OP(fd,46) { EAY; B = RM(EA); } /* LD B,(IY+o) */ +OP(fd,47) { illegal_1(); op_47(); } /* DB FD */ + +OP(fd,48) { illegal_1(); op_48(); } /* DB FD */ +OP(fd,49) { illegal_1(); op_49(); } /* DB FD */ +OP(fd,4a) { illegal_1(); op_4a(); } /* DB FD */ +OP(fd,4b) { illegal_1(); op_4b(); } /* DB FD */ +OP(fd,4c) { C = HY; } /* LD C,HY */ +OP(fd,4d) { C = LY; } /* LD C,LY */ +OP(fd,4e) { EAY; C = RM(EA); } /* LD C,(IY+o) */ +OP(fd,4f) { illegal_1(); op_4f(); } /* DB FD */ + +OP(fd,50) { illegal_1(); op_50(); } /* DB FD */ +OP(fd,51) { illegal_1(); op_51(); } /* DB FD */ +OP(fd,52) { illegal_1(); op_52(); } /* DB FD */ +OP(fd,53) { illegal_1(); op_53(); } /* DB FD */ +OP(fd,54) { D = HY; } /* LD D,HY */ +OP(fd,55) { D = LY; } /* LD D,LY */ +OP(fd,56) { EAY; D = RM(EA); } /* LD D,(IY+o) */ +OP(fd,57) { illegal_1(); op_57(); } /* DB FD */ + +OP(fd,58) { illegal_1(); op_58(); } /* DB FD */ +OP(fd,59) { illegal_1(); op_59(); } /* DB FD */ +OP(fd,5a) { illegal_1(); op_5a(); } /* DB FD */ +OP(fd,5b) { illegal_1(); op_5b(); } /* DB FD */ +OP(fd,5c) { E = HY; } /* LD E,HY */ +OP(fd,5d) { E = LY; } /* LD E,LY */ +OP(fd,5e) { EAY; E = RM(EA); } /* LD E,(IY+o) */ +OP(fd,5f) { illegal_1(); op_5f(); } /* DB FD */ + +OP(fd,60) { HY = B; } /* LD HY,B */ +OP(fd,61) { HY = C; } /* LD HY,C */ +OP(fd,62) { HY = D; } /* LD HY,D */ +OP(fd,63) { HY = E; } /* LD HY,E */ +OP(fd,64) { } /* LD HY,HY */ +OP(fd,65) { HY = LY; } /* LD HY,LY */ +OP(fd,66) { EAY; H = RM(EA); } /* LD H,(IY+o) */ +OP(fd,67) { HY = A; } /* LD HY,A */ + +OP(fd,68) { LY = B; } /* LD LY,B */ +OP(fd,69) { LY = C; } /* LD LY,C */ +OP(fd,6a) { LY = D; } /* LD LY,D */ +OP(fd,6b) { LY = E; } /* LD LY,E */ +OP(fd,6c) { LY = HY; } /* LD LY,HY */ +OP(fd,6d) { } /* LD LY,LY */ +OP(fd,6e) { EAY; L = RM(EA); } /* LD L,(IY+o) */ +OP(fd,6f) { LY = A; } /* LD LY,A */ + +OP(fd,70) { EAY; WM( EA, B ); } /* LD (IY+o),B */ +OP(fd,71) { EAY; WM( EA, C ); } /* LD (IY+o),C */ +OP(fd,72) { EAY; WM( EA, D ); } /* LD (IY+o),D */ +OP(fd,73) { EAY; WM( EA, E ); } /* LD (IY+o),E */ +OP(fd,74) { EAY; WM( EA, H ); } /* LD (IY+o),H */ +OP(fd,75) { EAY; WM( EA, L ); } /* LD (IY+o),L */ +OP(fd,76) { illegal_1(); op_76(); } /* DB FD */ +OP(fd,77) { EAY; WM( EA, A ); } /* LD (IY+o),A */ + +OP(fd,78) { illegal_1(); op_78(); } /* DB FD */ +OP(fd,79) { illegal_1(); op_79(); } /* DB FD */ +OP(fd,7a) { illegal_1(); op_7a(); } /* DB FD */ +OP(fd,7b) { illegal_1(); op_7b(); } /* DB FD */ +OP(fd,7c) { A = HY; } /* LD A,HY */ +OP(fd,7d) { A = LY; } /* LD A,LY */ +OP(fd,7e) { EAY; A = RM(EA); } /* LD A,(IY+o) */ +OP(fd,7f) { illegal_1(); op_7f(); } /* DB FD */ + +OP(fd,80) { illegal_1(); op_80(); } /* DB FD */ +OP(fd,81) { illegal_1(); op_81(); } /* DB FD */ +OP(fd,82) { illegal_1(); op_82(); } /* DB FD */ +OP(fd,83) { illegal_1(); op_83(); } /* DB FD */ +OP(fd,84) { ADD(HY); } /* ADD A,HY */ +OP(fd,85) { ADD(LY); } /* ADD A,LY */ +OP(fd,86) { EAY; ADD(RM(EA)); } /* ADD A,(IY+o) */ +OP(fd,87) { illegal_1(); op_87(); } /* DB FD */ + +OP(fd,88) { illegal_1(); op_88(); } /* DB FD */ +OP(fd,89) { illegal_1(); op_89(); } /* DB FD */ +OP(fd,8a) { illegal_1(); op_8a(); } /* DB FD */ +OP(fd,8b) { illegal_1(); op_8b(); } /* DB FD */ +OP(fd,8c) { ADC(HY); } /* ADC A,HY */ +OP(fd,8d) { ADC(LY); } /* ADC A,LY */ +OP(fd,8e) { EAY; ADC(RM(EA)); } /* ADC A,(IY+o) */ +OP(fd,8f) { illegal_1(); op_8f(); } /* DB FD */ + +OP(fd,90) { illegal_1(); op_90(); } /* DB FD */ +OP(fd,91) { illegal_1(); op_91(); } /* DB FD */ +OP(fd,92) { illegal_1(); op_92(); } /* DB FD */ +OP(fd,93) { illegal_1(); op_93(); } /* DB FD */ +OP(fd,94) { SUB(HY); } /* SUB HY */ +OP(fd,95) { SUB(LY); } /* SUB LY */ +OP(fd,96) { EAY; SUB(RM(EA)); } /* SUB (IY+o) */ +OP(fd,97) { illegal_1(); op_97(); } /* DB FD */ + +OP(fd,98) { illegal_1(); op_98(); } /* DB FD */ +OP(fd,99) { illegal_1(); op_99(); } /* DB FD */ +OP(fd,9a) { illegal_1(); op_9a(); } /* DB FD */ +OP(fd,9b) { illegal_1(); op_9b(); } /* DB FD */ +OP(fd,9c) { SBC(HY); } /* SBC A,HY */ +OP(fd,9d) { SBC(LY); } /* SBC A,LY */ +OP(fd,9e) { EAY; SBC(RM(EA)); } /* SBC A,(IY+o) */ +OP(fd,9f) { illegal_1(); op_9f(); } /* DB FD */ + +OP(fd,a0) { illegal_1(); op_a0(); } /* DB FD */ +OP(fd,a1) { illegal_1(); op_a1(); } /* DB FD */ +OP(fd,a2) { illegal_1(); op_a2(); } /* DB FD */ +OP(fd,a3) { illegal_1(); op_a3(); } /* DB FD */ +OP(fd,a4) { AND(HY); } /* AND HY */ +OP(fd,a5) { AND(LY); } /* AND LY */ +OP(fd,a6) { EAY; AND(RM(EA)); } /* AND (IY+o) */ +OP(fd,a7) { illegal_1(); op_a7(); } /* DB FD */ + +OP(fd,a8) { illegal_1(); op_a8(); } /* DB FD */ +OP(fd,a9) { illegal_1(); op_a9(); } /* DB FD */ +OP(fd,aa) { illegal_1(); op_aa(); } /* DB FD */ +OP(fd,ab) { illegal_1(); op_ab(); } /* DB FD */ +OP(fd,ac) { XOR(HY); } /* XOR HY */ +OP(fd,ad) { XOR(LY); } /* XOR LY */ +OP(fd,ae) { EAY; XOR(RM(EA)); } /* XOR (IY+o) */ +OP(fd,af) { illegal_1(); op_af(); } /* DB FD */ + +OP(fd,b0) { illegal_1(); op_b0(); } /* DB FD */ +OP(fd,b1) { illegal_1(); op_b1(); } /* DB FD */ +OP(fd,b2) { illegal_1(); op_b2(); } /* DB FD */ +OP(fd,b3) { illegal_1(); op_b3(); } /* DB FD */ +OP(fd,b4) { OR(HY); } /* OR HY */ +OP(fd,b5) { OR(LY); } /* OR LY */ +OP(fd,b6) { EAY; OR(RM(EA)); } /* OR (IY+o) */ +OP(fd,b7) { illegal_1(); op_b7(); } /* DB FD */ + +OP(fd,b8) { illegal_1(); op_b8(); } /* DB FD */ +OP(fd,b9) { illegal_1(); op_b9(); } /* DB FD */ +OP(fd,ba) { illegal_1(); op_ba(); } /* DB FD */ +OP(fd,bb) { illegal_1(); op_bb(); } /* DB FD */ +OP(fd,bc) { CP(HY); } /* CP HY */ +OP(fd,bd) { CP(LY); } /* CP LY */ +OP(fd,be) { EAY; CP(RM(EA)); } /* CP (IY+o) */ +OP(fd,bf) { illegal_1(); op_bf(); } /* DB FD */ + +OP(fd,c0) { illegal_1(); op_c0(); } /* DB FD */ +OP(fd,c1) { illegal_1(); op_c1(); } /* DB FD */ +OP(fd,c2) { illegal_1(); op_c2(); } /* DB FD */ +OP(fd,c3) { illegal_1(); op_c3(); } /* DB FD */ +OP(fd,c4) { illegal_1(); op_c4(); } /* DB FD */ +OP(fd,c5) { illegal_1(); op_c5(); } /* DB FD */ +OP(fd,c6) { illegal_1(); op_c6(); } /* DB FD */ +OP(fd,c7) { illegal_1(); op_c7(); } /* DB FD */ + +OP(fd,c8) { illegal_1(); op_c8(); } /* DB FD */ +OP(fd,c9) { illegal_1(); op_c9(); } /* DB FD */ +OP(fd,ca) { illegal_1(); op_ca(); } /* DB FD */ +OP(fd,cb) { EAY; EXEC(xycb,ARG()); } /* **** FD CB xx */ +OP(fd,cc) { illegal_1(); op_cc(); } /* DB FD */ +OP(fd,cd) { illegal_1(); op_cd(); } /* DB FD */ +OP(fd,ce) { illegal_1(); op_ce(); } /* DB FD */ +OP(fd,cf) { illegal_1(); op_cf(); } /* DB FD */ + +OP(fd,d0) { illegal_1(); op_d0(); } /* DB FD */ +OP(fd,d1) { illegal_1(); op_d1(); } /* DB FD */ +OP(fd,d2) { illegal_1(); op_d2(); } /* DB FD */ +OP(fd,d3) { illegal_1(); op_d3(); } /* DB FD */ +OP(fd,d4) { illegal_1(); op_d4(); } /* DB FD */ +OP(fd,d5) { illegal_1(); op_d5(); } /* DB FD */ +OP(fd,d6) { illegal_1(); op_d6(); } /* DB FD */ +OP(fd,d7) { illegal_1(); op_d7(); } /* DB FD */ + +OP(fd,d8) { illegal_1(); op_d8(); } /* DB FD */ +OP(fd,d9) { illegal_1(); op_d9(); } /* DB FD */ +OP(fd,da) { illegal_1(); op_da(); } /* DB FD */ +OP(fd,db) { illegal_1(); op_db(); } /* DB FD */ +OP(fd,dc) { illegal_1(); op_dc(); } /* DB FD */ +OP(fd,dd) { EXEC(dd,ROP()); } /* **** FD DD xx */ +OP(fd,de) { illegal_1(); op_de(); } /* DB FD */ +OP(fd,df) { illegal_1(); op_df(); } /* DB FD */ + +OP(fd,e0) { illegal_1(); op_e0(); } /* DB FD */ +OP(fd,e1) { POP( iy ); } /* POP IY */ +OP(fd,e2) { illegal_1(); op_e2(); } /* DB FD */ +OP(fd,e3) { EXSP( iy ); } /* EX (SP),IY */ +OP(fd,e4) { illegal_1(); op_e4(); } /* DB FD */ +OP(fd,e5) { PUSH( iy ); } /* PUSH IY */ +OP(fd,e6) { illegal_1(); op_e6(); } /* DB FD */ +OP(fd,e7) { illegal_1(); op_e7(); } /* DB FD */ + +OP(fd,e8) { illegal_1(); op_e8(); } /* DB FD */ +OP(fd,e9) { PC = IY; } /* JP (IY) */ +OP(fd,ea) { illegal_1(); op_ea(); } /* DB FD */ +OP(fd,eb) { illegal_1(); op_eb(); } /* DB FD */ +OP(fd,ec) { illegal_1(); op_ec(); } /* DB FD */ +OP(fd,ed) { illegal_1(); op_ed(); } /* DB FD */ +OP(fd,ee) { illegal_1(); op_ee(); } /* DB FD */ +OP(fd,ef) { illegal_1(); op_ef(); } /* DB FD */ + +OP(fd,f0) { illegal_1(); op_f0(); } /* DB FD */ +OP(fd,f1) { illegal_1(); op_f1(); } /* DB FD */ +OP(fd,f2) { illegal_1(); op_f2(); } /* DB FD */ +OP(fd,f3) { illegal_1(); op_f3(); } /* DB FD */ +OP(fd,f4) { illegal_1(); op_f4(); } /* DB FD */ +OP(fd,f5) { illegal_1(); op_f5(); } /* DB FD */ +OP(fd,f6) { illegal_1(); op_f6(); } /* DB FD */ +OP(fd,f7) { illegal_1(); op_f7(); } /* DB FD */ + +OP(fd,f8) { illegal_1(); op_f8(); } /* DB FD */ +OP(fd,f9) { SP = IY; } /* LD SP,IY */ +OP(fd,fa) { illegal_1(); op_fa(); } /* DB FD */ +OP(fd,fb) { illegal_1(); op_fb(); } /* DB FD */ +OP(fd,fc) { illegal_1(); op_fc(); } /* DB FD */ +OP(fd,fd) { EXEC(fd,ROP()); } /* **** FD FD xx */ +OP(fd,fe) { illegal_1(); op_fe(); } /* DB FD */ +OP(fd,ff) { illegal_1(); op_ff(); } /* DB FD */ + +OP(illegal,2) +{ +#if VERBOSE +logerror("Z80 #%d ill. opcode $ed $%02x\n", + cpu_getactivecpu(), cpu_readop((PCD-1)&0xffff)); +#endif +} + +/********************************************************** + * special opcodes (ED prefix) + **********************************************************/ +OP(ed,00) { illegal_2(); } /* DB ED */ +OP(ed,01) { illegal_2(); } /* DB ED */ +OP(ed,02) { illegal_2(); } /* DB ED */ +OP(ed,03) { illegal_2(); } /* DB ED */ +OP(ed,04) { illegal_2(); } /* DB ED */ +OP(ed,05) { illegal_2(); } /* DB ED */ +OP(ed,06) { illegal_2(); } /* DB ED */ +OP(ed,07) { illegal_2(); } /* DB ED */ + +OP(ed,08) { illegal_2(); } /* DB ED */ +OP(ed,09) { illegal_2(); } /* DB ED */ +OP(ed,0a) { illegal_2(); } /* DB ED */ +OP(ed,0b) { illegal_2(); } /* DB ED */ +OP(ed,0c) { illegal_2(); } /* DB ED */ +OP(ed,0d) { illegal_2(); } /* DB ED */ +OP(ed,0e) { illegal_2(); } /* DB ED */ +OP(ed,0f) { illegal_2(); } /* DB ED */ + +OP(ed,10) { illegal_2(); } /* DB ED */ +OP(ed,11) { illegal_2(); } /* DB ED */ +OP(ed,12) { illegal_2(); } /* DB ED */ +OP(ed,13) { illegal_2(); } /* DB ED */ +OP(ed,14) { illegal_2(); } /* DB ED */ +OP(ed,15) { illegal_2(); } /* DB ED */ +OP(ed,16) { illegal_2(); } /* DB ED */ +OP(ed,17) { illegal_2(); } /* DB ED */ + +OP(ed,18) { illegal_2(); } /* DB ED */ +OP(ed,19) { illegal_2(); } /* DB ED */ +OP(ed,1a) { illegal_2(); } /* DB ED */ +OP(ed,1b) { illegal_2(); } /* DB ED */ +OP(ed,1c) { illegal_2(); } /* DB ED */ +OP(ed,1d) { illegal_2(); } /* DB ED */ +OP(ed,1e) { illegal_2(); } /* DB ED */ +OP(ed,1f) { illegal_2(); } /* DB ED */ + +OP(ed,20) { illegal_2(); } /* DB ED */ +OP(ed,21) { illegal_2(); } /* DB ED */ +OP(ed,22) { illegal_2(); } /* DB ED */ +OP(ed,23) { illegal_2(); } /* DB ED */ +OP(ed,24) { illegal_2(); } /* DB ED */ +OP(ed,25) { illegal_2(); } /* DB ED */ +OP(ed,26) { illegal_2(); } /* DB ED */ +OP(ed,27) { illegal_2(); } /* DB ED */ + +OP(ed,28) { illegal_2(); } /* DB ED */ +OP(ed,29) { illegal_2(); } /* DB ED */ +OP(ed,2a) { illegal_2(); } /* DB ED */ +OP(ed,2b) { illegal_2(); } /* DB ED */ +OP(ed,2c) { illegal_2(); } /* DB ED */ +OP(ed,2d) { illegal_2(); } /* DB ED */ +OP(ed,2e) { illegal_2(); } /* DB ED */ +OP(ed,2f) { illegal_2(); } /* DB ED */ + +OP(ed,30) { illegal_2(); } /* DB ED */ +OP(ed,31) { illegal_2(); } /* DB ED */ +OP(ed,32) { illegal_2(); } /* DB ED */ +OP(ed,33) { illegal_2(); } /* DB ED */ +OP(ed,34) { illegal_2(); } /* DB ED */ +OP(ed,35) { illegal_2(); } /* DB ED */ +OP(ed,36) { illegal_2(); } /* DB ED */ +OP(ed,37) { illegal_2(); } /* DB ED */ + +OP(ed,38) { illegal_2(); } /* DB ED */ +OP(ed,39) { illegal_2(); } /* DB ED */ +OP(ed,3a) { illegal_2(); } /* DB ED */ +OP(ed,3b) { illegal_2(); } /* DB ED */ +OP(ed,3c) { illegal_2(); } /* DB ED */ +OP(ed,3d) { illegal_2(); } /* DB ED */ +OP(ed,3e) { illegal_2(); } /* DB ED */ +OP(ed,3f) { illegal_2(); } /* DB ED */ + +OP(ed,40) { B = IN(BC); F = (F & CF) | SZP[B]; } /* IN B,(C) */ +OP(ed,41) { OUT(BC, B); } /* OUT (C),B */ +OP(ed,42) { SBC16( bc ); } /* SBC HL,BC */ +OP(ed,43) { EA = ARG16(); WM16( EA, &Z80.bc ); WZ = EA+1; } /* LD (w),BC */ +OP(ed,44) { NEG; } /* NEG */ +OP(ed,45) { RETN; } /* RETN; */ +OP(ed,46) { IM = 0; } /* IM 0 */ +OP(ed,47) { LD_I_A; } /* LD I,A */ + +OP(ed,48) { C = IN(BC); F = (F & CF) | SZP[C]; } /* IN C,(C) */ +OP(ed,49) { OUT(BC, C); } /* OUT (C),C */ +OP(ed,4a) { ADC16( bc ); } /* ADC HL,BC */ +OP(ed,4b) { EA = ARG16(); RM16( EA, &Z80.bc ); WZ = EA+1; } /* LD BC,(w) */ +OP(ed,4c) { NEG; } /* NEG */ +OP(ed,4d) { RETI; } /* RETI */ +OP(ed,4e) { IM = 0; } /* IM 0 */ +OP(ed,4f) { LD_R_A; } /* LD R,A */ + +OP(ed,50) { D = IN(BC); F = (F & CF) | SZP[D]; } /* IN D,(C) */ +OP(ed,51) { OUT(BC, D); } /* OUT (C),D */ +OP(ed,52) { SBC16( de ); } /* SBC HL,DE */ +OP(ed,53) { EA = ARG16(); WM16( EA, &Z80.de ); WZ = EA+1; } /* LD (w),DE */ +OP(ed,54) { NEG; } /* NEG */ +OP(ed,55) { RETN; } /* RETN; */ +OP(ed,56) { IM = 1; } /* IM 1 */ +OP(ed,57) { LD_A_I; } /* LD A,I */ + +OP(ed,58) { E = IN(BC); F = (F & CF) | SZP[E]; } /* IN E,(C) */ +OP(ed,59) { OUT(BC, E); } /* OUT (C),E */ +OP(ed,5a) { ADC16( de ); } /* ADC HL,DE */ +OP(ed,5b) { EA = ARG16(); RM16( EA, &Z80.de ); WZ = EA+1; } /* LD DE,(w) */ +OP(ed,5c) { NEG; } /* NEG */ +OP(ed,5d) { RETI; } /* RETI */ +OP(ed,5e) { IM = 2; } /* IM 2 */ +OP(ed,5f) { LD_A_R; } /* LD A,R */ + +OP(ed,60) { H = IN(BC); F = (F & CF) | SZP[H]; } /* IN H,(C) */ +OP(ed,61) { OUT(BC, H); } /* OUT (C),H */ +OP(ed,62) { SBC16( hl ); } /* SBC HL,HL */ +OP(ed,63) { EA = ARG16(); WM16( EA, &Z80.hl ); WZ = EA+1; } /* LD (w),HL */ +OP(ed,64) { NEG; } /* NEG */ +OP(ed,65) { RETN; } /* RETN; */ +OP(ed,66) { IM = 0; } /* IM 0 */ +OP(ed,67) { RRD; } /* RRD (HL) */ + +OP(ed,68) { L = IN(BC); F = (F & CF) | SZP[L]; } /* IN L,(C) */ +OP(ed,69) { OUT(BC, L); } /* OUT (C),L */ +OP(ed,6a) { ADC16( hl ); } /* ADC HL,HL */ +OP(ed,6b) { EA = ARG16(); RM16( EA, &Z80.hl ); WZ = EA+1; } /* LD HL,(w) */ +OP(ed,6c) { NEG; } /* NEG */ +OP(ed,6d) { RETI; } /* RETI */ +OP(ed,6e) { IM = 0; } /* IM 0 */ +OP(ed,6f) { RLD; } /* RLD (HL) */ + +OP(ed,70) { UINT8 res = IN(BC); F = (F & CF) | SZP[res]; } /* IN 0,(C) */ +OP(ed,71) { OUT(BC, 0); } /* OUT (C),0 */ +OP(ed,72) { SBC16( sp ); } /* SBC HL,SP */ +OP(ed,73) { EA = ARG16(); WM16( EA, &Z80.sp ); WZ = EA+1; } /* LD (w),SP */ +OP(ed,74) { NEG; } /* NEG */ +OP(ed,75) { RETN; } /* RETN; */ +OP(ed,76) { IM = 1; } /* IM 1 */ +OP(ed,77) { illegal_2(); } /* DB ED,77 */ + +OP(ed,78) { A = IN(BC); F = (F & CF) | SZP[A]; WZ = BC+1; } /* IN E,(C) */ +OP(ed,79) { OUT(BC, A); WZ = BC + 1; } /* OUT (C),A */ +OP(ed,7a) { ADC16( sp ); } /* ADC HL,SP */ +OP(ed,7b) { EA = ARG16(); RM16( EA, &Z80.sp ); WZ = EA+1; } /* LD SP,(w) */ +OP(ed,7c) { NEG; } /* NEG */ +OP(ed,7d) { RETI; } /* RETI */ +OP(ed,7e) { IM = 2; } /* IM 2 */ +OP(ed,7f) { illegal_2(); } /* DB ED,7F */ + +OP(ed,80) { illegal_2(); } /* DB ED */ +OP(ed,81) { illegal_2(); } /* DB ED */ +OP(ed,82) { illegal_2(); } /* DB ED */ +OP(ed,83) { illegal_2(); } /* DB ED */ +OP(ed,84) { illegal_2(); } /* DB ED */ +OP(ed,85) { illegal_2(); } /* DB ED */ +OP(ed,86) { illegal_2(); } /* DB ED */ +OP(ed,87) { illegal_2(); } /* DB ED */ + +OP(ed,88) { illegal_2(); } /* DB ED */ +OP(ed,89) { illegal_2(); } /* DB ED */ +OP(ed,8a) { illegal_2(); } /* DB ED */ +OP(ed,8b) { illegal_2(); } /* DB ED */ +OP(ed,8c) { illegal_2(); } /* DB ED */ +OP(ed,8d) { illegal_2(); } /* DB ED */ +OP(ed,8e) { illegal_2(); } /* DB ED */ +OP(ed,8f) { illegal_2(); } /* DB ED */ + +OP(ed,90) { illegal_2(); } /* DB ED */ +OP(ed,91) { illegal_2(); } /* DB ED */ +OP(ed,92) { illegal_2(); } /* DB ED */ +OP(ed,93) { illegal_2(); } /* DB ED */ +OP(ed,94) { illegal_2(); } /* DB ED */ +OP(ed,95) { illegal_2(); } /* DB ED */ +OP(ed,96) { illegal_2(); } /* DB ED */ +OP(ed,97) { illegal_2(); } /* DB ED */ + +OP(ed,98) { illegal_2(); } /* DB ED */ +OP(ed,99) { illegal_2(); } /* DB ED */ +OP(ed,9a) { illegal_2(); } /* DB ED */ +OP(ed,9b) { illegal_2(); } /* DB ED */ +OP(ed,9c) { illegal_2(); } /* DB ED */ +OP(ed,9d) { illegal_2(); } /* DB ED */ +OP(ed,9e) { illegal_2(); } /* DB ED */ +OP(ed,9f) { illegal_2(); } /* DB ED */ + +OP(ed,a0) { LDI; } /* LDI */ +OP(ed,a1) { CPI; } /* CPI */ +OP(ed,a2) { INI; } /* INI */ +OP(ed,a3) { OUTI; } /* OUTI */ +OP(ed,a4) { illegal_2(); } /* DB ED */ +OP(ed,a5) { illegal_2(); } /* DB ED */ +OP(ed,a6) { illegal_2(); } /* DB ED */ +OP(ed,a7) { illegal_2(); } /* DB ED */ + +OP(ed,a8) { LDD; } /* LDD */ +OP(ed,a9) { CPD; } /* CPD */ +OP(ed,aa) { IND; } /* IND */ +OP(ed,ab) { OUTD; } /* OUTD */ +OP(ed,ac) { illegal_2(); } /* DB ED */ +OP(ed,ad) { illegal_2(); } /* DB ED */ +OP(ed,ae) { illegal_2(); } /* DB ED */ +OP(ed,af) { illegal_2(); } /* DB ED */ + +OP(ed,b0) { LDIR; } /* LDIR */ +OP(ed,b1) { CPIR; } /* CPIR */ +OP(ed,b2) { INIR; } /* INIR */ +OP(ed,b3) { OTIR; } /* OTIR */ +OP(ed,b4) { illegal_2(); } /* DB ED */ +OP(ed,b5) { illegal_2(); } /* DB ED */ +OP(ed,b6) { illegal_2(); } /* DB ED */ +OP(ed,b7) { illegal_2(); } /* DB ED */ + +OP(ed,b8) { LDDR; } /* LDDR */ +OP(ed,b9) { CPDR; } /* CPDR */ +OP(ed,ba) { INDR; } /* INDR */ +OP(ed,bb) { OTDR; } /* OTDR */ +OP(ed,bc) { illegal_2(); } /* DB ED */ +OP(ed,bd) { illegal_2(); } /* DB ED */ +OP(ed,be) { illegal_2(); } /* DB ED */ +OP(ed,bf) { illegal_2(); } /* DB ED */ + +OP(ed,c0) { illegal_2(); } /* DB ED */ +OP(ed,c1) { illegal_2(); } /* DB ED */ +OP(ed,c2) { illegal_2(); } /* DB ED */ +OP(ed,c3) { illegal_2(); } /* DB ED */ +OP(ed,c4) { illegal_2(); } /* DB ED */ +OP(ed,c5) { illegal_2(); } /* DB ED */ +OP(ed,c6) { illegal_2(); } /* DB ED */ +OP(ed,c7) { illegal_2(); } /* DB ED */ + +OP(ed,c8) { illegal_2(); } /* DB ED */ +OP(ed,c9) { illegal_2(); } /* DB ED */ +OP(ed,ca) { illegal_2(); } /* DB ED */ +OP(ed,cb) { illegal_2(); } /* DB ED */ +OP(ed,cc) { illegal_2(); } /* DB ED */ +OP(ed,cd) { illegal_2(); } /* DB ED */ +OP(ed,ce) { illegal_2(); } /* DB ED */ +OP(ed,cf) { illegal_2(); } /* DB ED */ + +OP(ed,d0) { illegal_2(); } /* DB ED */ +OP(ed,d1) { illegal_2(); } /* DB ED */ +OP(ed,d2) { illegal_2(); } /* DB ED */ +OP(ed,d3) { illegal_2(); } /* DB ED */ +OP(ed,d4) { illegal_2(); } /* DB ED */ +OP(ed,d5) { illegal_2(); } /* DB ED */ +OP(ed,d6) { illegal_2(); } /* DB ED */ +OP(ed,d7) { illegal_2(); } /* DB ED */ + +OP(ed,d8) { illegal_2(); } /* DB ED */ +OP(ed,d9) { illegal_2(); } /* DB ED */ +OP(ed,da) { illegal_2(); } /* DB ED */ +OP(ed,db) { illegal_2(); } /* DB ED */ +OP(ed,dc) { illegal_2(); } /* DB ED */ +OP(ed,dd) { illegal_2(); } /* DB ED */ +OP(ed,de) { illegal_2(); } /* DB ED */ +OP(ed,df) { illegal_2(); } /* DB ED */ + +OP(ed,e0) { illegal_2(); } /* DB ED */ +OP(ed,e1) { illegal_2(); } /* DB ED */ +OP(ed,e2) { illegal_2(); } /* DB ED */ +OP(ed,e3) { illegal_2(); } /* DB ED */ +OP(ed,e4) { illegal_2(); } /* DB ED */ +OP(ed,e5) { illegal_2(); } /* DB ED */ +OP(ed,e6) { illegal_2(); } /* DB ED */ +OP(ed,e7) { illegal_2(); } /* DB ED */ + +OP(ed,e8) { illegal_2(); } /* DB ED */ +OP(ed,e9) { illegal_2(); } /* DB ED */ +OP(ed,ea) { illegal_2(); } /* DB ED */ +OP(ed,eb) { illegal_2(); } /* DB ED */ +OP(ed,ec) { illegal_2(); } /* DB ED */ +OP(ed,ed) { illegal_2(); } /* DB ED */ +OP(ed,ee) { illegal_2(); } /* DB ED */ +OP(ed,ef) { illegal_2(); } /* DB ED */ + +OP(ed,f0) { illegal_2(); } /* DB ED */ +OP(ed,f1) { illegal_2(); } /* DB ED */ +OP(ed,f2) { illegal_2(); } /* DB ED */ +OP(ed,f3) { illegal_2(); } /* DB ED */ +OP(ed,f4) { illegal_2(); } /* DB ED */ +OP(ed,f5) { illegal_2(); } /* DB ED */ +OP(ed,f6) { illegal_2(); } /* DB ED */ +OP(ed,f7) { illegal_2(); } /* DB ED */ + +OP(ed,f8) { illegal_2(); } /* DB ED */ +OP(ed,f9) { illegal_2(); } /* DB ED */ +OP(ed,fa) { illegal_2(); } /* DB ED */ +OP(ed,fb) { illegal_2(); } /* DB ED */ +OP(ed,fc) { illegal_2(); } /* DB ED */ +OP(ed,fd) { illegal_2(); } /* DB ED */ +OP(ed,fe) { illegal_2(); } /* DB ED */ +OP(ed,ff) { illegal_2(); } /* DB ED */ + + +/********************************************************** + * main opcodes + **********************************************************/ +OP(op,00) { } /* NOP */ +OP(op,01) { BC = ARG16(); } /* LD BC,w */ +OP(op,02) { WM( BC, A ); WZ_L = (BC + 1) & 0xFF; WZ_H = A; } /* LD (BC),A */ +OP(op,03) { BC++; } /* INC BC */ +OP(op,04) { B = INC(B); } /* INC B */ +OP(op,05) { B = DEC(B); } /* DEC B */ +OP(op,06) { B = ARG(); } /* LD B,n */ +OP(op,07) { RLCA; } /* RLCA */ + +OP(op,08) { EX_AF; } /* EX AF,AF' */ +OP(op,09) { ADD16(hl, bc); } /* ADD HL,BC */ +OP(op,0a) { A = RM( BC ); WZ=BC+1; } /* LD A,(BC) */ +OP(op,0b) { BC--; } /* DEC BC */ +OP(op,0c) { C = INC(C); } /* INC C */ +OP(op,0d) { C = DEC(C); } /* DEC C */ +OP(op,0e) { C = ARG(); } /* LD C,n */ +OP(op,0f) { RRCA; } /* RRCA */ + +OP(op,10) { B--; JR_COND( B, 0x10 ); } /* DJNZ o */ +OP(op,11) { DE = ARG16(); } /* LD DE,w */ +OP(op,12) { WM( DE, A ); WZ_L = (DE + 1) & 0xFF; WZ_H = A; } /* LD (DE),A */ +OP(op,13) { DE++; } /* INC DE */ +OP(op,14) { D = INC(D); } /* INC D */ +OP(op,15) { D = DEC(D); } /* DEC D */ +OP(op,16) { D = ARG(); } /* LD D,n */ +OP(op,17) { RLA; } /* RLA */ + +OP(op,18) { JR(); } /* JR o */ +OP(op,19) { ADD16(hl, de); } /* ADD HL,DE */ +OP(op,1a) { A = RM( DE ); WZ=DE+1; } /* LD A,(DE) */ +OP(op,1b) { DE--; } /* DEC DE */ +OP(op,1c) { E = INC(E); } /* INC E */ +OP(op,1d) { E = DEC(E); } /* DEC E */ +OP(op,1e) { E = ARG(); } /* LD E,n */ +OP(op,1f) { RRA; } /* RRA */ + +OP(op,20) { JR_COND( !(F & ZF), 0x20 ); } /* JR NZ,o */ +OP(op,21) { HL = ARG16(); } /* LD HL,w */ +OP(op,22) { EA = ARG16(); WM16( EA, &Z80.hl ); WZ = EA+1; } /* LD (w),HL */ +OP(op,23) { HL++; } /* INC HL */ +OP(op,24) { H = INC(H); } /* INC H */ +OP(op,25) { H = DEC(H); } /* DEC H */ +OP(op,26) { H = ARG(); } /* LD H,n */ +OP(op,27) { DAA; } /* DAA */ + +OP(op,28) { JR_COND( F & ZF, 0x28 ); } /* JR Z,o */ +OP(op,29) { ADD16(hl, hl); } /* ADD HL,HL */ +OP(op,2a) { EA = ARG16(); RM16( EA, &Z80.hl ); WZ = EA+1; } /* LD HL,(w) */ +OP(op,2b) { HL--; } /* DEC HL */ +OP(op,2c) { L = INC(L); } /* INC L */ +OP(op,2d) { L = DEC(L); } /* DEC L */ +OP(op,2e) { L = ARG(); } /* LD L,n */ +OP(op,2f) { A ^= 0xff; F = (F&(SF|ZF|PF|CF))|HF|NF|(A&(YF|XF)); } /* CPL */ + +OP(op,30) { JR_COND( !(F & CF), 0x30 ); } /* JR NC,o */ +OP(op,31) { SP = ARG16(); } /* LD SP,w */ +OP(op,32) { EA = ARG16(); WM( EA, A ); WZ_L=(EA+1)&0xFF;WZ_H=A; } /* LD (w),A */ +OP(op,33) { SP++; } /* INC SP */ +OP(op,34) { WM( HL, INC(RM(HL)) ); } /* INC (HL) */ +OP(op,35) { WM( HL, DEC(RM(HL)) ); } /* DEC (HL) */ +OP(op,36) { WM( HL, ARG() ); } /* LD (HL),n */ +OP(op,37) { F = (F & (SF|ZF|YF|XF|PF)) | CF | (A & (YF|XF)); } /* SCF */ + +OP(op,38) { JR_COND( F & CF, 0x38 ); } /* JR C,o */ +OP(op,39) { ADD16(hl, sp); } /* ADD HL,SP */ +OP(op,3a) { EA = ARG16(); A = RM( EA ); WZ = EA+1; } /* LD A,(w) */ +OP(op,3b) { SP--; } /* DEC SP */ +OP(op,3c) { A = INC(A); } /* INC A */ +OP(op,3d) { A = DEC(A); } /* DEC A */ +OP(op,3e) { A = ARG(); } /* LD A,n */ +OP(op,3f) { F = ((F&(SF|ZF|YF|XF|PF|CF))|((F&CF)<<4)|(A&(YF|XF)))^CF; } /* CCF */ + +OP(op,40) { } /* LD B,B */ +OP(op,41) { B = C; } /* LD B,C */ +OP(op,42) { B = D; } /* LD B,D */ +OP(op,43) { B = E; } /* LD B,E */ +OP(op,44) { B = H; } /* LD B,H */ +OP(op,45) { B = L; } /* LD B,L */ +OP(op,46) { B = RM(HL); } /* LD B,(HL) */ +OP(op,47) { B = A; } /* LD B,A */ + +OP(op,48) { C = B; } /* LD C,B */ +OP(op,49) { } /* LD C,C */ +OP(op,4a) { C = D; } /* LD C,D */ +OP(op,4b) { C = E; } /* LD C,E */ +OP(op,4c) { C = H; } /* LD C,H */ +OP(op,4d) { C = L; } /* LD C,L */ +OP(op,4e) { C = RM(HL); } /* LD C,(HL) */ +OP(op,4f) { C = A; } /* LD C,A */ + +OP(op,50) { D = B; } /* LD D,B */ +OP(op,51) { D = C; } /* LD D,C */ +OP(op,52) { } /* LD D,D */ +OP(op,53) { D = E; } /* LD D,E */ +OP(op,54) { D = H; } /* LD D,H */ +OP(op,55) { D = L; } /* LD D,L */ +OP(op,56) { D = RM(HL); } /* LD D,(HL) */ +OP(op,57) { D = A; } /* LD D,A */ + +OP(op,58) { E = B; } /* LD E,B */ +OP(op,59) { E = C; } /* LD E,C */ +OP(op,5a) { E = D; } /* LD E,D */ +OP(op,5b) { } /* LD E,E */ +OP(op,5c) { E = H; } /* LD E,H */ +OP(op,5d) { E = L; } /* LD E,L */ +OP(op,5e) { E = RM(HL); } /* LD E,(HL) */ +OP(op,5f) { E = A; } /* LD E,A */ + +OP(op,60) { H = B; } /* LD H,B */ +OP(op,61) { H = C; } /* LD H,C */ +OP(op,62) { H = D; } /* LD H,D */ +OP(op,63) { H = E; } /* LD H,E */ +OP(op,64) { } /* LD H,H */ +OP(op,65) { H = L; } /* LD H,L */ +OP(op,66) { H = RM(HL); } /* LD H,(HL) */ +OP(op,67) { H = A; } /* LD H,A */ + +OP(op,68) { L = B; } /* LD L,B */ +OP(op,69) { L = C; } /* LD L,C */ +OP(op,6a) { L = D; } /* LD L,D */ +OP(op,6b) { L = E; } /* LD L,E */ +OP(op,6c) { L = H; } /* LD L,H */ +OP(op,6d) { } /* LD L,L */ +OP(op,6e) { L = RM(HL); } /* LD L,(HL) */ +OP(op,6f) { L = A; } /* LD L,A */ + +OP(op,70) { WM( HL, B ); } /* LD (HL),B */ +OP(op,71) { WM( HL, C ); } /* LD (HL),C */ +OP(op,72) { WM( HL, D ); } /* LD (HL),D */ +OP(op,73) { WM( HL, E ); } /* LD (HL),E */ +OP(op,74) { WM( HL, H ); } /* LD (HL),H */ +OP(op,75) { WM( HL, L ); } /* LD (HL),L */ +OP(op,76) { ENTER_HALT; } /* HALT */ +OP(op,77) { WM( HL, A ); } /* LD (HL),A */ + +OP(op,78) { A = B; } /* LD A,B */ +OP(op,79) { A = C; } /* LD A,C */ +OP(op,7a) { A = D; } /* LD A,D */ +OP(op,7b) { A = E; } /* LD A,E */ +OP(op,7c) { A = H; } /* LD A,H */ +OP(op,7d) { A = L; } /* LD A,L */ +OP(op,7e) { A = RM(HL); } /* LD A,(HL) */ +OP(op,7f) { } /* LD A,A */ + +OP(op,80) { ADD(B); } /* ADD A,B */ +OP(op,81) { ADD(C); } /* ADD A,C */ +OP(op,82) { ADD(D); } /* ADD A,D */ +OP(op,83) { ADD(E); } /* ADD A,E */ +OP(op,84) { ADD(H); } /* ADD A,H */ +OP(op,85) { ADD(L); } /* ADD A,L */ +OP(op,86) { ADD(RM(HL)); } /* ADD A,(HL) */ +OP(op,87) { ADD(A); } /* ADD A,A */ + +OP(op,88) { ADC(B); } /* ADC A,B */ +OP(op,89) { ADC(C); } /* ADC A,C */ +OP(op,8a) { ADC(D); } /* ADC A,D */ +OP(op,8b) { ADC(E); } /* ADC A,E */ +OP(op,8c) { ADC(H); } /* ADC A,H */ +OP(op,8d) { ADC(L); } /* ADC A,L */ +OP(op,8e) { ADC(RM(HL)); } /* ADC A,(HL) */ +OP(op,8f) { ADC(A); } /* ADC A,A */ + +OP(op,90) { SUB(B); } /* SUB B */ +OP(op,91) { SUB(C); } /* SUB C */ +OP(op,92) { SUB(D); } /* SUB D */ +OP(op,93) { SUB(E); } /* SUB E */ +OP(op,94) { SUB(H); } /* SUB H */ +OP(op,95) { SUB(L); } /* SUB L */ +OP(op,96) { SUB(RM(HL)); } /* SUB (HL) */ +OP(op,97) { SUB(A); } /* SUB A */ + +OP(op,98) { SBC(B); } /* SBC A,B */ +OP(op,99) { SBC(C); } /* SBC A,C */ +OP(op,9a) { SBC(D); } /* SBC A,D */ +OP(op,9b) { SBC(E); } /* SBC A,E */ +OP(op,9c) { SBC(H); } /* SBC A,H */ +OP(op,9d) { SBC(L); } /* SBC A,L */ +OP(op,9e) { SBC(RM(HL)); } /* SBC A,(HL) */ +OP(op,9f) { SBC(A); } /* SBC A,A */ + +OP(op,a0) { AND(B); } /* AND B */ +OP(op,a1) { AND(C); } /* AND C */ +OP(op,a2) { AND(D); } /* AND D */ +OP(op,a3) { AND(E); } /* AND E */ +OP(op,a4) { AND(H); } /* AND H */ +OP(op,a5) { AND(L); } /* AND L */ +OP(op,a6) { AND(RM(HL)); } /* AND (HL) */ +OP(op,a7) { AND(A); } /* AND A */ + +OP(op,a8) { XOR(B); } /* XOR B */ +OP(op,a9) { XOR(C); } /* XOR C */ +OP(op,aa) { XOR(D); } /* XOR D */ +OP(op,ab) { XOR(E); } /* XOR E */ +OP(op,ac) { XOR(H); } /* XOR H */ +OP(op,ad) { XOR(L); } /* XOR L */ +OP(op,ae) { XOR(RM(HL)); } /* XOR (HL) */ +OP(op,af) { XOR(A); } /* XOR A */ + +OP(op,b0) { OR(B); } /* OR B */ +OP(op,b1) { OR(C); } /* OR C */ +OP(op,b2) { OR(D); } /* OR D */ +OP(op,b3) { OR(E); } /* OR E */ +OP(op,b4) { OR(H); } /* OR H */ +OP(op,b5) { OR(L); } /* OR L */ +OP(op,b6) { OR(RM(HL)); } /* OR (HL) */ +OP(op,b7) { OR(A); } /* OR A */ + +OP(op,b8) { CP(B); } /* CP B */ +OP(op,b9) { CP(C); } /* CP C */ +OP(op,ba) { CP(D); } /* CP D */ +OP(op,bb) { CP(E); } /* CP E */ +OP(op,bc) { CP(H); } /* CP H */ +OP(op,bd) { CP(L); } /* CP L */ +OP(op,be) { CP(RM(HL)); } /* CP (HL) */ +OP(op,bf) { CP(A); } /* CP A */ + +OP(op,c0) { RET_COND( !(F & ZF), 0xc0 ); } /* RET NZ */ +OP(op,c1) { POP( bc ); } /* POP BC */ +OP(op,c2) { JP_COND( !(F & ZF) ); } /* JP NZ,a */ +OP(op,c3) { JP; } /* JP a */ +OP(op,c4) { CALL_COND( !(F & ZF), 0xc4 ); } /* CALL NZ,a */ +OP(op,c5) { PUSH( bc ); } /* PUSH BC */ +OP(op,c6) { ADD(ARG()); } /* ADD A,n */ +OP(op,c7) { RST(0x00); } /* RST 0 */ + +OP(op,c8) { RET_COND( F & ZF, 0xc8 ); } /* RET Z */ +OP(op,c9) { POP( pc ); WZ=PCD; } /* RET */ +OP(op,ca) { JP_COND( F & ZF ); } /* JP Z,a */ +OP(op,cb) { R++; EXEC(cb,ROP()); } /* **** CB xx */ +OP(op,cc) { CALL_COND( F & ZF, 0xcc ); } /* CALL Z,a */ +OP(op,cd) { CALL(); } /* CALL a */ +OP(op,ce) { ADC(ARG()); } /* ADC A,n */ +OP(op,cf) { RST(0x08); } /* RST 1 */ + +OP(op,d0) { RET_COND( !(F & CF), 0xd0 ); } /* RET NC */ +OP(op,d1) { POP( de ); } /* POP DE */ +OP(op,d2) { JP_COND( !(F & CF) ); } /* JP NC,a */ +OP(op,d3) { unsigned n = ARG() | (A << 8); OUT( n, A ); WZ_L = ((n & 0xff) + 1) & 0xff; WZ_H = A; } /* OUT (n),A */ +OP(op,d4) { CALL_COND( !(F & CF), 0xd4 ); } /* CALL NC,a */ +OP(op,d5) { PUSH( de ); } /* PUSH DE */ +OP(op,d6) { SUB(ARG()); } /* SUB n */ +OP(op,d7) { RST(0x10); } /* RST 2 */ + +OP(op,d8) { RET_COND( F & CF, 0xd8 ); } /* RET C */ +OP(op,d9) { EXX; } /* EXX */ +OP(op,da) { JP_COND( F & CF ); } /* JP C,a */ +OP(op,db) { unsigned n = ARG() | (A << 8); A = IN( n ); WZ = n + 1; } /* IN A,(n) */ +OP(op,dc) { CALL_COND( F & CF, 0xdc ); } /* CALL C,a */ +OP(op,dd) { R++; EXEC(dd,ROP()); } /* **** DD xx */ +OP(op,de) { SBC(ARG()); } /* SBC A,n */ +OP(op,df) { RST(0x18); } /* RST 3 */ + +OP(op,e0) { RET_COND( !(F & PF), 0xe0 ); } /* RET PO */ +OP(op,e1) { POP( hl ); } /* POP HL */ +OP(op,e2) { JP_COND( !(F & PF) ); } /* JP PO,a */ +OP(op,e3) { EXSP( hl ); } /* EX HL,(SP) */ +OP(op,e4) { CALL_COND( !(F & PF), 0xe4 ); } /* CALL PO,a */ +OP(op,e5) { PUSH( hl ); } /* PUSH HL */ +OP(op,e6) { AND(ARG()); } /* AND n */ +OP(op,e7) { RST(0x20); } /* RST 4 */ + +OP(op,e8) { RET_COND( F & PF, 0xe8 ); } /* RET PE */ +OP(op,e9) { PC = HL; } /* JP (HL) */ +OP(op,ea) { JP_COND( F & PF ); } /* JP PE,a */ +OP(op,eb) { EX_DE_HL; } /* EX DE,HL */ +OP(op,ec) { CALL_COND( F & PF, 0xec ); } /* CALL PE,a */ +OP(op,ed) { R++; EXEC(ed,ROP()); } /* **** ED xx */ +OP(op,ee) { XOR(ARG()); } /* XOR n */ +OP(op,ef) { RST(0x28); } /* RST 5 */ + +OP(op,f0) { RET_COND( !(F & SF), 0xf0 ); } /* RET P */ +OP(op,f1) { POP( af ); } /* POP AF */ +OP(op,f2) { JP_COND( !(F & SF) ); } /* JP P,a */ +OP(op,f3) { IFF1 = IFF2 = 0; } /* DI */ +OP(op,f4) { CALL_COND( !(F & SF), 0xf4 ); } /* CALL P,a */ +OP(op,f5) { PUSH( af ); } /* PUSH AF */ +OP(op,f6) { OR(ARG()); } /* OR n */ +OP(op,f7) { RST(0x30); } /* RST 6 */ + +OP(op,f8) { RET_COND( F & SF, 0xf8 ); } /* RET M */ +OP(op,f9) { SP = HL; } /* LD SP,HL */ +OP(op,fa) { JP_COND(F & SF); } /* JP M,a */ +OP(op,fb) { EI; } /* EI */ +OP(op,fc) { CALL_COND( F & SF, 0xfc ); } /* CALL M,a */ +OP(op,fd) { R++; EXEC(fd,ROP()); } /* **** FD xx */ +OP(op,fe) { CP(ARG()); } /* CP n */ +OP(op,ff) { RST(0x38); } /* RST 7 */ + + +static void take_interrupt(void) +{ + /* Check if processor was halted */ + LEAVE_HALT; + + /* Clear both interrupt flip flops */ + IFF1 = IFF2 = 0; + + LOG(("Z80 #%d single int. irq_vector $%02x\n", cpu_getactivecpu(), irq_vector)); + + /* Interrupt mode 1. RST 38h */ + if( IM == 1 ) + { + LOG(("Z80 #%d IM1 $0038\n",cpu_getactivecpu() )); + PUSH( pc ); + PCD = 0x0038; + /* RST $38 + 'interrupt latency' cycles */ + Z80.cycles += cc[Z80_TABLE_op][0xff] + cc[Z80_TABLE_ex][0xff]; + } + else + { + /* call back the cpu interface to retrieve the vector */ + int irq_vector = (*Z80.irq_callback)(0); + + /* Interrupt mode 2. Call [Z80.i:databyte] */ + if( IM == 2 ) + { + irq_vector = (irq_vector & 0xff) | (I << 8); + PUSH( pc ); + RM16( irq_vector, &Z80.pc ); + LOG(("Z80 #%d IM2 [$%04x] = $%04x\n",cpu_getactivecpu() , irq_vector, PCD)); + /* CALL $xxxx + 'interrupt latency' cycles */ + Z80.cycles += cc[Z80_TABLE_op][0xcd] + cc[Z80_TABLE_ex][0xff]; + } + else + { + /* Interrupt mode 0. We check for CALL and JP instructions, */ + /* if neither of these were found we assume a 1 byte opcode */ + /* was placed on the databus */ + LOG(("Z80 #%d IM0 $%04x\n",cpu_getactivecpu() , irq_vector)); + switch (irq_vector & 0xff0000) + { + case 0xcd0000: /* call */ + PUSH( pc ); + PCD = irq_vector & 0xffff; + /* CALL $xxxx + 'interrupt latency' cycles */ + Z80.cycles += cc[Z80_TABLE_op][0xcd] + cc[Z80_TABLE_ex][0xff]; + break; + case 0xc30000: /* jump */ + PCD = irq_vector & 0xffff; + /* JP $xxxx + 2 cycles */ + Z80.cycles += cc[Z80_TABLE_op][0xc3] + cc[Z80_TABLE_ex][0xff]; + break; + default: /* rst (or other opcodes?) */ + PUSH( pc ); + PCD = irq_vector & 0x0038; + /* RST $xx + 2 cycles */ + Z80.cycles += cc[Z80_TABLE_op][0xff] + cc[Z80_TABLE_ex][0xff]; + break; + } + } + } + WZ=PCD; +} + +/**************************************************************************** + * Processor initialization + ****************************************************************************/ +void z80_init(const void *config, int (*irqcallback)(int)) +{ + int i, p; + + int oldval, newval, val; + UINT8 *padd = &SZHVC_add[ 0*256]; + UINT8 *padc = &SZHVC_add[256*256]; + UINT8 *psub = &SZHVC_sub[ 0*256]; + UINT8 *psbc = &SZHVC_sub[256*256]; + for (oldval = 0; oldval < 256; oldval++) + { + for (newval = 0; newval < 256; newval++) + { + /* add or adc w/o carry set */ + val = newval - oldval; + *padd = (newval) ? ((newval & 0x80) ? SF : 0) : ZF; + *padd |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */ + if( (newval & 0x0f) < (oldval & 0x0f) ) *padd |= HF; + if( newval < oldval ) *padd |= CF; + if( (val^oldval^0x80) & (val^newval) & 0x80 ) *padd |= VF; + padd++; + + /* adc with carry set */ + val = newval - oldval - 1; + *padc = (newval) ? ((newval & 0x80) ? SF : 0) : ZF; + *padc |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */ + if( (newval & 0x0f) <= (oldval & 0x0f) ) *padc |= HF; + if( newval <= oldval ) *padc |= CF; + if( (val^oldval^0x80) & (val^newval) & 0x80 ) *padc |= VF; + padc++; + + /* cp, sub or sbc w/o carry set */ + val = oldval - newval; + *psub = NF | ((newval) ? ((newval & 0x80) ? SF : 0) : ZF); + *psub |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */ + if( (newval & 0x0f) > (oldval & 0x0f) ) *psub |= HF; + if( newval > oldval ) *psub |= CF; + if( (val^oldval) & (oldval^newval) & 0x80 ) *psub |= VF; + psub++; + + /* sbc with carry set */ + val = oldval - newval - 1; + *psbc = NF | ((newval) ? ((newval & 0x80) ? SF : 0) : ZF); + *psbc |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */ + if( (newval & 0x0f) >= (oldval & 0x0f) ) *psbc |= HF; + if( newval >= oldval ) *psbc |= CF; + if( (val^oldval) & (oldval^newval) & 0x80 ) *psbc |= VF; + psbc++; + } + } + + for (i = 0; i < 256; i++) + { + p = 0; + if( i&0x01 ) ++p; + if( i&0x02 ) ++p; + if( i&0x04 ) ++p; + if( i&0x08 ) ++p; + if( i&0x10 ) ++p; + if( i&0x20 ) ++p; + if( i&0x40 ) ++p; + if( i&0x80 ) ++p; + SZ[i] = i ? i & SF : ZF; + SZ[i] |= (i & (YF | XF)); /* undocumented flag bits 5+3 */ + SZ_BIT[i] = i ? i & SF : ZF | PF; + SZ_BIT[i] |= (i & (YF | XF)); /* undocumented flag bits 5+3 */ + SZP[i] = SZ[i] | ((p & 1) ? 0 : PF); + SZHV_inc[i] = SZ[i]; + if( i == 0x80 ) SZHV_inc[i] |= VF; + if( (i & 0x0f) == 0x00 ) SZHV_inc[i] |= HF; + SZHV_dec[i] = SZ[i] | NF; + if( i == 0x7f ) SZHV_dec[i] |= VF; + if( (i & 0x0f) == 0x0f ) SZHV_dec[i] |= HF; + } + + /* Initialize Z80 */ + memset(&Z80, 0, sizeof(Z80)); + Z80.daisy = config; + Z80.irq_callback = irqcallback; + + /* Clear registers values (NB: should be random on real hardware ?) */ + AF = BC = DE = HL = SP = IX = IY =0; + F = ZF; /* Zero flag is set */ + + /* setup cycle tables */ + cc[Z80_TABLE_op] = cc_op; + cc[Z80_TABLE_cb] = cc_cb; + cc[Z80_TABLE_ed] = cc_ed; + cc[Z80_TABLE_xy] = cc_xy; + cc[Z80_TABLE_xycb] = cc_xycb; + cc[Z80_TABLE_ex] = cc_ex; +} + +/**************************************************************************** + * Do a reset + ****************************************************************************/ +void z80_reset(void) +{ + PC = 0x0000; + I = 0; + R = 0; + R2 = 0; + IM = 0; + IFF1 = IFF2 = 0; + HALT = 0; + + Z80.after_ei = FALSE; + + WZ=PCD; +} + +/**************************************************************************** + * Run until given cycle count + ****************************************************************************/ +void z80_run(unsigned int cycles) +{ + while( Z80.cycles < cycles ) + { + /* check for IRQs before each instruction */ + if (Z80.irq_state && IFF1 && !Z80.after_ei) + { + take_interrupt(); + if (Z80.cycles >= cycles) return; + } + + Z80.after_ei = FALSE; + R++; + EXEC_INLINE(op,ROP()); + } +} + +/**************************************************************************** + * Get all registers in given buffer + ****************************************************************************/ +void z80_get_context (void *dst) +{ + if( dst ) + *(Z80_Regs*)dst = Z80; +} + +/**************************************************************************** + * Set all registers to given values + ****************************************************************************/ +void z80_set_context (void *src) +{ + if( src ) + Z80 = *(Z80_Regs*)src; +} + +/**************************************************************************** + * Set IRQ lines + ****************************************************************************/ +void z80_set_irq_line(unsigned int state) +{ + Z80.irq_state = state; +} + +void z80_set_nmi_line(unsigned int state) +{ + /* mark an NMI pending on the rising edge */ + if (Z80.nmi_state == CLEAR_LINE && state != CLEAR_LINE) + { + LOG(("Z80 #%d take NMI\n", cpu_getactivecpu())); + LEAVE_HALT; /* Check if processor was halted */ + + IFF1 = 0; + PUSH( pc ); + PCD = 0x0066; + WZ=PCD; + + Z80.cycles += 11*15; + } + + Z80.nmi_state = state; +} + diff --git a/genplus-gx/core/z80/z80.h b/genplus-gx/core/z80/z80.h new file mode 100644 index 0000000000..d505775162 --- /dev/null +++ b/genplus-gx/core/z80/z80.h @@ -0,0 +1,71 @@ +#ifndef Z80_H_ +#define Z80_H_ + +#include "osd_cpu.h" + +enum +{ + /* line states */ + CLEAR_LINE = 0, /* clear (a fired, held or pulsed) line */ + ASSERT_LINE, /* assert an interrupt immediately */ + HOLD_LINE, /* hold interrupt line until acknowledged */ + PULSE_LINE /* pulse interrupt line for one instruction */ +}; + +enum { + Z80_PC, Z80_SP, + Z80_A, Z80_B, Z80_C, Z80_D, Z80_E, Z80_H, Z80_L, + Z80_AF, Z80_BC, Z80_DE, Z80_HL, + Z80_IX, Z80_IY, Z80_AF2, Z80_BC2, Z80_DE2, Z80_HL2, + Z80_R, Z80_I, Z80_IM, Z80_IFF1, Z80_IFF2, Z80_HALT, + Z80_DC0, Z80_DC1, Z80_DC2, Z80_DC3, Z80_WZ +}; + +enum { + Z80_TABLE_op, + Z80_TABLE_cb, + Z80_TABLE_ed, + Z80_TABLE_xy, + Z80_TABLE_xycb, + Z80_TABLE_ex /* cycles counts for taken jr/jp/call and interrupt latency (rst opcodes) */ +}; + +/****************************************************************************/ +/* The Z80 registers. HALT is set to 1 when the CPU is halted, the refresh */ +/* register is calculated as follows: refresh=(Z80.r&127)|(Z80.r2&128) */ +/****************************************************************************/ +typedef struct +{ + PAIR pc,sp,af,bc,de,hl,ix,iy,wz; + PAIR af2,bc2,de2,hl2; + UINT8 r,r2,iff1,iff2,halt,im,i; + UINT8 nmi_state; /* nmi line state */ + UINT8 nmi_pending; /* nmi pending */ + UINT8 irq_state; /* irq line state */ + UINT8 after_ei; /* are we in the EI shadow? */ + UINT32 cycles; /* master clock cycles global counter */ + const struct z80_irq_daisy_chain *daisy; + int (*irq_callback)(int irqline); +} Z80_Regs; + + +extern Z80_Regs Z80; + +extern unsigned char *z80_readmap[64]; +extern unsigned char *z80_writemap[64]; + +extern void (*z80_writemem)(unsigned int address, unsigned char data); +extern unsigned char (*z80_readmem)(unsigned int address); +extern void (*z80_writeport)(unsigned int port, unsigned char data); +extern unsigned char (*z80_readport)(unsigned int port); + +extern void z80_init(const void *config, int (*irqcallback)(int)); +extern void z80_reset (void); +extern void z80_run(unsigned int cycles); +extern void z80_get_context (void *dst); +extern void z80_set_context (void *src); +extern void z80_set_irq_line(unsigned int state); +extern void z80_set_nmi_line(unsigned int state); + +#endif + diff --git a/genplus-gx/gx/config.c b/genplus-gx/gx/config.c new file mode 100644 index 0000000000..d13b15bbb5 --- /dev/null +++ b/genplus-gx/gx/config.c @@ -0,0 +1,272 @@ +/**************************************************************************** + * config.c + * + * Genesis Plus GX configuration file support + * + * Copyright Eke-Eke (2007-2013) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "gui.h" +#include "file_load.h" + +static int config_load(void) +{ + /* open configuration file */ + char fname[MAXPATHLEN]; + sprintf (fname, "%s/config.ini", DEFAULT_PATH); + FILE *fp = fopen(fname, "rb"); + if (fp) + { + /* check file size */ + fseek(fp, 0, SEEK_END); + if (ftell(fp) != sizeof(config)) + { + fclose(fp); + return 0; + } + + /* check version */ + char version[16]; + fseek(fp, 0, SEEK_SET); + fread(version, 16, 1, fp); + if (memcmp(version,CONFIG_VERSION,16)) + { + fclose(fp); + return 0; + } + + /* read file */ + fseek(fp, 0, SEEK_SET); + fread(&config, sizeof(config), 1, fp); + fclose(fp); + return 1; + } + return 0; +} + +void config_save(void) +{ + /* open configuration file */ + char fname[MAXPATHLEN]; + sprintf (fname, "%s/config.ini", DEFAULT_PATH); + FILE *fp = fopen(fname, "wb"); + if (fp) + { + /* write file */ + fwrite(&config, sizeof(config), 1, fp); + fclose(fp); + } +} + +void config_default(void) +{ + /* version TAG */ + strncpy(config.version,CONFIG_VERSION,16); + + /* sound options */ + config.psg_preamp = 150; + config.fm_preamp = 100; + config.hq_fm = 1; + config.psgBoostNoise = 1; + config.filter = 1; + config.lp_range = 0x9999; /* 0.6 in 16.16 fixed point */ + config.low_freq = 880; + config.high_freq = 5000; + config.lg = 1.0; + config.mg = 1.0; + config.hg = 1.0; + config.dac_bits = 14; + config.ym2413 = 2; /* AUTO */ + config.mono = 0; + + /* system options */ + config.system = 0; /* AUTO */ + config.region_detect = 0; /* AUTO */ + config.vdp_mode = 0; /* AUTO */ + config.master_clock = 0; /* AUTO */ + config.force_dtack = 0; + config.addr_error = 1; + config.bios = 0; + config.lock_on = 0; + config.hot_swap = 0; + + /* video options */ + config.xshift = 0; + config.yshift = 0; + config.xscale = 0; + config.yscale = 0; + config.aspect = 1; + config.overscan = 3; /* FULL */ + config.gg_extra = 0; + config.ntsc = 0; + config.vsync = 1; /* AUTO */ + config.bilinear = 0; + config.vfilter = 1; + + if (VIDEO_HaveComponentCable()) + { + config.render = 2; + } + else + { + config.render = 0; + } + + switch (vmode->viTVMode >> 2) + { + case VI_PAL: + config.tv_mode = 1; /* 50hz only */ + break; + + case VI_EURGB60: + config.tv_mode = 2; /* 50/60hz */ + break; + + default: + config.tv_mode = 0; /* 60hz only */ + break; + } + +#ifdef HW_RVL + config.trap = 0; + config.gamma = VI_GM_1_0 / 10.0; +#endif + + /* controllers options */ + config.gun_cursor[0] = 1; + config.gun_cursor[1] = 1; + config.invert_mouse = 0; + + /* on-screen options */ + config.cd_leds = 0; + config.fps = 0; + + /* menu options */ + config.autoload = 0; + config.autocheat = 0; +#ifdef HW_RVL + config.s_auto = 1; +#else + config.s_auto = 0; + config.v_prog = 1; +#endif + config.s_default = 1; + config.s_device = 0; + config.l_device = 0; + config.bg_overlay = 0; + config.screen_w = 658; + config.bgm_volume = 100.0; + config.sfx_volume = 100.0; + + /* default ROM directories */ +#ifdef HW_RVL + sprintf (config.lastdir[0][TYPE_SD], "sd:%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[1][TYPE_SD], "sd:%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[2][TYPE_SD], "sd:%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[3][TYPE_SD], "sd:%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[4][TYPE_SD], "sd:%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[0][TYPE_USB], "usb:%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[1][TYPE_USB], "usb:%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[2][TYPE_USB], "usb:%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[3][TYPE_USB], "usb:%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[4][TYPE_USB], "usb:%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[0][TYPE_DVD], "dvd:%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[1][TYPE_DVD], "dvd:%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[2][TYPE_DVD], "dvd:%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[3][TYPE_DVD], "dvd:%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[4][TYPE_DVD], "dvd:%s/roms/", DEFAULT_PATH); +#else + sprintf (config.lastdir[0][TYPE_SD], "%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[1][TYPE_SD], "%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[2][TYPE_SD], "%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[3][TYPE_SD], "%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[4][TYPE_SD], "%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[0][TYPE_DVD], "dvd:%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[1][TYPE_DVD], "dvd:%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[2][TYPE_DVD], "dvd:%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[3][TYPE_DVD], "dvd:%s/roms/", DEFAULT_PATH); + sprintf (config.lastdir[4][TYPE_DVD], "dvd:%s/roms/", DEFAULT_PATH); +#endif + + /* try to restore user config */ + int loaded = config_load(); + +#ifndef HW_RVL + /* check if component cable was detected */ + if (VIDEO_HaveComponentCable()) + { + /* when component cable is detected, libogc automatically enables progressive mode */ + /* as preferred video mode but it could still be used on TV not supporting 480p/576p */ + PAD_ScanPads(); + + /* detect progressive mode switch requests */ + if (PAD_ButtonsHeld(0) & PAD_BUTTON_B) + { + /* swap progressive mode enable flag */ + config.v_prog ^= 1; + + /* play some sound to inform user */ + ASND_Pause(0); + int voice = ASND_GetFirstUnusedVoice(); + ASND_SetVoice(voice,VOICE_MONO_16BIT,44100,0,(u8 *)intro_pcm,intro_pcm_size,200,200,NULL); + sleep (2); + ASND_Pause(1); + } + + /* check if progressive mode should be disabled */ + if (!config.v_prog) + { + /* switch menu video mode to interlaced */ + vmode->viTVMode = (vmode->viTVMode & ~3) | VI_INTERLACE; + VIDEO_Configure (vmode); + VIDEO_Flush(); + VIDEO_WaitVSync(); + VIDEO_WaitVSync(); + } + } +#endif + + /* inform user if default config is used */ + if (!loaded) + { + GUI_WaitPrompt("Warning","Default Settings restored"); + gx_input_SetDefault(); + } + + /* default emulated inputs */ + input.system[0] = SYSTEM_MD_GAMEPAD; + input.system[1] = (config.input[1].device != -1) ? SYSTEM_MD_GAMEPAD : NO_SYSTEM; + input_init(); +} diff --git a/genplus-gx/gx/config.h b/genplus-gx/gx/config.h new file mode 100644 index 0000000000..59b773e1ff --- /dev/null +++ b/genplus-gx/gx/config.h @@ -0,0 +1,125 @@ +/**************************************************************************** + * config.c + * + * Genesis Plus GX configuration file support + * + * Copyright Eke-Eke (2007-2013) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _CONFIG_H_ +#define _CONFIG_H_ + +#define CONFIG_VERSION "GENPLUS-GX 1.7.5" + +/**************************************************************************** + * Config Option + * + ****************************************************************************/ +typedef struct +{ + char version[16]; + uint8 hq_fm; + uint8 filter; + uint8 psgBoostNoise; + uint8 dac_bits; + uint8 ym2413; + uint8 mono; + int16 psg_preamp; + int16 fm_preamp; + uint32 lp_range; + int16 low_freq; + int16 high_freq; + int16 lg; + int16 mg; + int16 hg; + uint8 system; + uint8 region_detect; + uint8 master_clock; + uint8 vdp_mode; + uint8 force_dtack; + uint8 addr_error; + uint8 bios; + uint8 lock_on; + uint8 hot_swap; + uint8 invert_mouse; + uint8 gun_cursor[2]; + uint8 overscan; + uint8 gg_extra; + uint8 ntsc; + uint8 vsync; + uint8 render; + uint8 tv_mode; + uint8 bilinear; + uint8 vfilter; + uint8 aspect; + int16 xshift; + int16 yshift; + int16 xscale; + int16 yscale; +#ifdef HW_RVL + uint32 trap; + float gamma; +#else + uint8 v_prog; +#endif + t_input_config input[MAX_INPUTS]; + uint16 pad_keymap[4][MAX_KEYS+1]; +#ifdef HW_RVL + uint32 wpad_keymap[4*3][MAX_KEYS]; +#endif + uint8 autoload; + uint8 autocheat; + uint8 s_auto; + uint8 s_default; + uint8 s_device; + uint8 l_device; + uint8 bg_overlay; + uint8 cd_leds; + uint8 fps; + int16 screen_w; + float bgm_volume; + float sfx_volume; + char lastdir[FILETYPE_MAX][TYPE_RECENT][MAXPATHLEN]; +} t_config; + +/* Global data */ +t_config config; + + +extern void config_save(void); +extern void config_default(void); + + +#endif /* _CONFIG_H_ */ + diff --git a/genplus-gx/gx/fileio/file_load.c b/genplus-gx/gx/fileio/file_load.c new file mode 100644 index 0000000000..e896c4e312 --- /dev/null +++ b/genplus-gx/gx/fileio/file_load.c @@ -0,0 +1,464 @@ +/* + * file_load.c + * + * ROM File loading support + * + * Copyright Eke-Eke (2008-2012) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "file_load.h" +#include "gui.h" +#include "history.h" +#include "filesel.h" +#include "file_slot.h" + +#include +#ifdef HW_RVL +#include +#else +#include +#endif + +char rom_filename[256]; + +/* device root directories */ +#ifdef HW_RVL +static const char rootdir[TYPE_RECENT][10] = {"sd:/","usb:/","dvd:/"}; +#else +static const char rootdir[TYPE_RECENT][10] = {"/","dvd:/"}; +#endif + +/* DVD interface */ +#ifdef HW_RVL +static const DISC_INTERFACE* dvd = &__io_wiidvd; +#else +static const DISC_INTERFACE* dvd = &__io_gcdvd; +#endif + +/* current directory */ +static char *fileDir; + +/* current device */ +static int deviceType = -1; + +/* current file type */ +static int fileType = -1; + +/* DVD status flag */ +static u8 dvd_mounted = 0; + +/*************************************************************************** + * MountDVD + * + * return 0 on error, 1 on success + ***************************************************************************/ +static int MountDVD(void) +{ + GUI_MsgBoxOpen("Information", "Mounting DVD ...",1); + + /* initialize DVD interface if needed */ +#ifdef HW_RVL + DI_Init(); +#else + DVD_Init(); +#endif + + /* check if DVD is already mounted */ + if (dvd_mounted) + { + /* unmount DVD */ + ISO9660_Unmount("dvd:"); + dvd_mounted = 0; + } + + /* check if disc is found */ + if(!dvd->isInserted()) + { + GUI_WaitPrompt("Error","No Disc inserted !"); + return 0; + } + + /* mount DVD */ + if(!ISO9660_Mount("dvd",dvd)) + { + GUI_WaitPrompt("Error","Disc can not be read !"); + return 0; + } + + /* DVD is mounted */ + dvd_mounted = 1; + + GUI_MsgBoxClose(); + return 1; +} + +/*************************************************************************** + * FileSortCallback (thanks to Marty Disibio) + * + * Quick sort callback to sort file entries with the following order: + * . + * .. + * + * + ***************************************************************************/ +static int FileSortCallback(const void *f1, const void *f2) +{ + /* Special case for implicit directories */ + if(((FILEENTRIES *)f1)->filename[0] == '.' || ((FILEENTRIES *)f2)->filename[0] == '.') + { + if(strcmp(((FILEENTRIES *)f1)->filename, ".") == 0) { return -1; } + if(strcmp(((FILEENTRIES *)f2)->filename, ".") == 0) { return 1; } + if(strcmp(((FILEENTRIES *)f1)->filename, "..") == 0) { return -1; } + if(strcmp(((FILEENTRIES *)f2)->filename, "..") == 0) { return 1; } + } + + /* If one is a file and one is a directory the directory is first. */ + if(((FILEENTRIES *)f1)->flags && !((FILEENTRIES *)f2)->flags) return -1; + if(!((FILEENTRIES *)f1)->flags && ((FILEENTRIES *)f2)->flags) return 1; + + return stricmp(((FILEENTRIES *)f1)->filename, ((FILEENTRIES *)f2)->filename); +} + +/*************************************************************************** + * UpdateDirectory + * + * Update current browser directory + * return zero if going up while in root + * when going up, return previous dir name + ***************************************************************************/ +int UpdateDirectory(bool go_up, char *dirname) +{ + /* go up to parent directory */ + if (go_up) + { + /* special case */ + if (deviceType == TYPE_RECENT) return 0; + + /* check if we already are at root directory */ + if (!strcmp(rootdir[deviceType], (const char *)fileDir)) return 0; + + int size=0; + char temp[MAXPATHLEN]; + + /* determine last folder name length */ + strcpy(temp, fileDir); + char *test= strtok(temp,"/"); + while (test != NULL) + { + size = strlen(test); + strncpy(dirname,test,size); + dirname[size] = 0; + test = strtok(NULL,"/"); + } + + /* remove last folder from path */ + size = strlen(fileDir) - size; + fileDir[size - 1] = 0; + } + else + { + /* by default, simply append folder name */ + sprintf(fileDir, "%s%s/",fileDir, dirname); + } + + return 1; +} + +/*************************************************************************** + * ParseDirectory + * + * List files into one directory + ***************************************************************************/ +int ParseDirectory(void) +{ + int nbfiles = 0; + + /* open directory */ + DIR *dir = opendir(fileDir); + if (dir == NULL) + { + return -1; + } + + struct dirent *entry = readdir(dir); + + /* list entries */ + while ((entry != NULL)&& (nbfiles < MAXFILES)) + { + /* filter entries */ + if ((entry->d_name[0] != '.') + && strncasecmp(".wav", &entry->d_name[strlen(entry->d_name) - 4], 4) + && strncasecmp(".ogg", &entry->d_name[strlen(entry->d_name) - 4], 4) + && strncasecmp(".mp3", &entry->d_name[strlen(entry->d_name) - 4], 4)) + { + memset(&filelist[nbfiles], 0, sizeof (FILEENTRIES)); + sprintf(filelist[nbfiles].filename,"%s",entry->d_name); + if (entry->d_type == DT_DIR) + { + filelist[nbfiles].flags = 1; + } + nbfiles++; + } + + /* next entry */ + entry = readdir(dir); + } + + /* close directory */ + closedir(dir); + + /* Sort the file list */ + qsort(filelist, nbfiles, sizeof(FILEENTRIES), FileSortCallback); + + return nbfiles; +} + +/**************************************************************************** + * LoadFile + * + * This function will load a game file into the ROM buffer. + * This functions return the actual size of data copied into the buffer + * + ****************************************************************************/ +int LoadFile(int selection) +{ + int size, cd_mode1, filetype; + char filename[MAXPATHLEN]; + + /* file path */ + char *filepath = (deviceType == TYPE_RECENT) ? history.entries[selection].filepath : fileDir; + + /* full filename */ + sprintf(filename, "%s%s", filepath, filelist[selection].filename); + + /* DVD hot swap */ + if (!strncmp(filepath, rootdir[TYPE_DVD], strlen(rootdir[TYPE_DVD]))) + { + /* Check if file is still accessible */ + struct stat filestat; + if(stat(filename, &filestat) != 0) + { + /* If not, try to mount DVD */ + if (!MountDVD()) return 0; + } + } + + /* open message box */ + GUI_MsgBoxOpen("Information", "Loading game...", 1); + + /* no cartridge or CD game loaded */ + size = cd_mode1 = 0; + + /* check if virtual CD tray was open */ + if ((system_hw == SYSTEM_MCD) && (cdd.status == CD_OPEN)) + { + /* swap CD image file in (without changing region, system,...) */ + size = cdd_load(filename, (char *)(cdc.ram)); + + /* check if a cartridge is currently loaded */ + if (scd.cartridge.boot) + { + /* CD Mode 1 */ + cd_mode1 = size; + } + else + { + /* update game informations from CD image file header */ + getrominfo((char *)(cdc.ram)); + } + } + + /* no CD image file loaded */ + if (!size) + { + /* close CD tray to force system reset */ + cdd.status = NO_DISC; + + /* load game file */ + size = load_rom(filename); + } + + if (size > 0) + { + /* do not update game basename if a CD was loaded with a cartridge (Mode 1) */ + if (cd_mode1) + { + /* add CD image file to history list */ + filetype = 1; + } + else + { + /* auto-save previous game state */ + slot_autosave(config.s_default,config.s_device); + + /* update game basename (for screenshot, save & cheat files) */ + if (romtype & SYSTEM_SMS) + { + /* Master System ROM file */ + filetype = 2; + sprintf(rom_filename,"ms/%s",filelist[selection].filename); + } + else if (romtype & SYSTEM_GG) + { + /* Game Gear ROM file */ + filetype = 3; + sprintf(rom_filename,"gg/%s",filelist[selection].filename); + } + else if (romtype == SYSTEM_SG) + { + /* SG-1000 ROM file */ + filetype = 4; + sprintf(rom_filename,"sg/%s",filelist[selection].filename); + } + else if (romtype == SYSTEM_MCD) + { + /* CD image file */ + filetype = 1; + sprintf(rom_filename,"cd/%s",filelist[selection].filename); + } + else + { + /* by default, Genesis ROM file */ + filetype = 0; + sprintf(rom_filename,"md/%s",filelist[selection].filename); + } + + /* remove file extension */ + int i = strlen(rom_filename) - 1; + while ((i > 0) && (rom_filename[i] != '.')) i--; + if (i > 0) rom_filename[i] = 0; + } + + /* add/move the file to the top of the history. */ + history_add_file(filepath, filelist[selection].filename, filetype); + + /* recent file list may have changed */ + if (deviceType == TYPE_RECENT) deviceType = -1; + + /* close message box */ + GUI_MsgBoxClose(); + + /* valid image has been loaded */ + return 1; + } + + GUI_WaitPrompt("Error", "Unable to load game"); + return 0; +} + +/**************************************************************************** + * OpenDir + * + * Function to open a directory and load ROM file list. + ****************************************************************************/ +int OpenDirectory(int device, int type) +{ + int max = 0; + + if (device == TYPE_RECENT) + { + /* fetch history list */ + int i; + for(i=0; i < NUM_HISTORY_ENTRIES; i++) + { + if(history.entries[i].filepath[0] > 0) + { + filelist[i].flags = 0; + strncpy(filelist[i].filename,history.entries[i].filename, MAXJOLIET-1); + filelist[i].filename[MAXJOLIET-1] = '\0'; + max++; + } + else + { + /* Found the end of the list. */ + break; + } + } + } + else + { + /* only DVD hot swap is supported */ + if (device == TYPE_DVD) + { + /* try to access root directory */ + DIR *dir = opendir(rootdir[TYPE_DVD]); + if (dir == NULL) + { + /* mount DVD */ + if (!MountDVD()) return 0; + deviceType = -1; + } + else + { + closedir(dir); + } + } + + /* parse last directory */ + fileDir = config.lastdir[type][device]; + max = ParseDirectory(); + if (max <= 0) + { + /* parse root directory */ + strcpy(fileDir, rootdir[device]); + max = ParseDirectory(); + if (max < 0) + { + GUI_WaitPrompt("Error","Unable to open directory !"); + return 0; + } + deviceType = -1; + } + } + + if (max == 0) + { + GUI_WaitPrompt("Error","No files found !"); + return 0; + } + + /* check if device or file type has changed */ + if ((device != deviceType) || (type != fileType)) + { + /* reset current types */ + deviceType = device; + fileType = type; + + /* reset File selector */ + ClearSelector(max); + } + + return 1; +} diff --git a/genplus-gx/gx/fileio/file_load.h b/genplus-gx/gx/fileio/file_load.h new file mode 100644 index 0000000000..fca2aba1c3 --- /dev/null +++ b/genplus-gx/gx/fileio/file_load.h @@ -0,0 +1,72 @@ +/* + * file_load.c + * + * ROM File loading support + * + * Copyright Eke-Eke (2008-2012) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _FILE_FAT_H +#define _FILE_FAT_H + +/* suppported load devices */ +typedef enum +{ + TYPE_SD = 0, +#ifdef HW_RVL + TYPE_USB, +#endif + TYPE_DVD, + TYPE_RECENT +}DEVTYPES; + +/* supported file types */ +typedef enum +{ + FILETYPE_MD = 0, + FILETYPE_CD, + FILETYPE_MS, + FILETYPE_GG, + FILETYPE_SG, + FILETYPE_MAX +}FILETYPES; + +extern int OpenDirectory(int device, int type); +extern int UpdateDirectory(bool go_up, char *filename); +extern int ParseDirectory(void); +extern int LoadFile(int selection); + +extern char rom_filename[256]; + +#endif diff --git a/genplus-gx/gx/fileio/file_slot.c b/genplus-gx/gx/fileio/file_slot.c new file mode 100644 index 0000000000..45d117f70d --- /dev/null +++ b/genplus-gx/gx/fileio/file_slot.c @@ -0,0 +1,830 @@ +/* + * file_slot.c + * + * FAT and Memory Card SRAM/State slots managment + * + * Copyright Eke-Eke (2008-2012), based on original code from Softdev (2006) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "file_slot.h" +#include "file_load.h" +#include "gui.h" +#include "filesel.h" +#include "saveicon.h" + +/** + * libOGC CARD System Work Area + */ +static u8 SysArea[CARD_WORKAREA] ATTRIBUTE_ALIGN (32); + +/* Mega CD backup RAM stuff */ +static u32 brm_crc[2]; +static char brm_filename[3][32] = {CD_BRAM_JP, CD_BRAM_EU, CD_BRAM_US}; +static u8 brm_format[0x40] = +{ + 0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x00,0x00,0x00,0x00,0x40, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x53,0x45,0x47,0x41,0x5f,0x43,0x44,0x5f,0x52,0x4f,0x4d,0x00,0x01,0x00,0x00,0x00, + 0x52,0x41,0x4d,0x5f,0x43,0x41,0x52,0x54,0x52,0x49,0x44,0x47,0x45,0x5f,0x5f,0x5f +}; + +/**************************************************************************** + * CardMount + * + * libOGC provides the CARD_Mount function, and it should be all you need. + * However, experience with previous emulators has taught me that you are + * better off doing a little bit more than that! + * + *****************************************************************************/ +static int CardMount(int slot) +{ + int tries = 0; +#ifdef HW_RVL + *(unsigned long *) (0xCD006800) |= 1 << 13; /*** Disable Encryption ***/ +#else + *(unsigned long *) (0xCC006800) |= 1 << 13; /*** Disable Encryption ***/ +#endif + while (tries < 10) + { + VIDEO_WaitVSync (); + if (CARD_Mount(slot, SysArea, NULL) == CARD_ERROR_READY) + return 1; + else + EXI_ProbeReset (); + tries++; + } + return 0; +} + +/**************************************************************************** + * Slot Management + * + * + ****************************************************************************/ +void slot_autoload(int slot, int device) +{ + /* Mega CD backup RAM specific */ + if (!slot && (system_hw == SYSTEM_MCD)) + { + /* automatically load internal backup RAM */ + FILE *fp = fopen(brm_filename[((region_code ^ 0x40) >> 6) - 1], "rb"); + if (fp != NULL) + { + fread(scd.bram, 0x2000, 1, fp); + fclose(fp); + + /* update CRC */ + brm_crc[0] = crc32(0, scd.bram, 0x2000); + } + else + { + /* force internal backup RAM format (does not use previous region backup RAM) */ + scd.bram[0x1fff] = 0; + } + + /* check if internal backup RAM is correctly formatted */ + if (memcmp(scd.bram + 0x2000 - 0x20, brm_format + 0x20, 0x20)) + { + /* clear internal backup RAM */ + memset(scd.bram, 0x00, 0x2000 - 0x40); + + /* internal Backup RAM size fields */ + brm_format[0x10] = brm_format[0x12] = brm_format[0x14] = brm_format[0x16] = 0x00; + brm_format[0x11] = brm_format[0x13] = brm_format[0x15] = brm_format[0x17] = (sizeof(scd.bram) / 64) - 3; + + /* format internal backup RAM */ + memcpy(scd.bram + 0x2000 - 0x40, brm_format, 0x40); + + /* clear CRC to force file saving (in case previous region backup RAM was also formatted) */ + brm_crc[0] = 0; + } + + /* automatically load cartridge backup RAM (if enabled) */ + if (scd.cartridge.id) + { + fp = fopen(CART_BRAM, "rb"); + if (fp != NULL) + { + int filesize = scd.cartridge.mask + 1; + int done = 0; + + /* Read into buffer (2k blocks) */ + while (filesize > CHUNKSIZE) + { + fread(scd.cartridge.area + done, CHUNKSIZE, 1, fp); + done += CHUNKSIZE; + filesize -= CHUNKSIZE; + } + + /* Read remaining bytes */ + if (filesize) + { + fread(scd.cartridge.area + done, filesize, 1, fp); + } + + /* close file */ + fclose(fp); + + /* update CRC */ + brm_crc[1] = crc32(0, scd.cartridge.area, scd.cartridge.mask + 1); + } + + /* check if cartridge backup RAM is correctly formatted */ + if (memcmp(scd.cartridge.area + scd.cartridge.mask + 1 - 0x20, brm_format + 0x20, 0x20)) + { + /* clear cartridge backup RAM */ + memset(scd.cartridge.area, 0x00, scd.cartridge.mask + 1); + + /* Cartridge Backup RAM size fields */ + brm_format[0x10] = brm_format[0x12] = brm_format[0x14] = brm_format[0x16] = (((scd.cartridge.mask + 1) / 64) - 3) >> 8; + brm_format[0x11] = brm_format[0x13] = brm_format[0x15] = brm_format[0x17] = (((scd.cartridge.mask + 1) / 64) - 3) & 0xff; + + /* format cartridge backup RAM */ + memcpy(scd.cartridge.area + scd.cartridge.mask + 1 - 0x40, brm_format, 0x40); + } + } + } + + /* configurable SRAM & State auto-saving */ + if ((slot && !(config.s_auto & 2)) || (!slot && !(config.s_auto & 1))) + { + return; + } + + if (strlen(rom_filename)) + { + SILENT = 1; + slot_load(slot, device); + SILENT = 0; + } +} + +void slot_autosave(int slot, int device) +{ + /* Mega CD backup RAM specific */ + if (!slot && (system_hw == SYSTEM_MCD)) + { + /* verify that internal backup RAM has been modified */ + if (crc32(0, scd.bram, 0x2000) != brm_crc[0]) + { + /* check if it is correctly formatted before saving */ + if (!memcmp(scd.bram + 0x2000 - 0x20, brm_format + 0x20, 0x20)) + { + FILE *fp = fopen(brm_filename[((region_code ^ 0x40) >> 6) - 1], "wb"); + if (fp != NULL) + { + fwrite(scd.bram, 0x2000, 1, fp); + fclose(fp); + + /* update CRC */ + brm_crc[0] = crc32(0, scd.bram, 0x2000); + } + } + } + + /* verify that cartridge backup RAM has been modified */ + if (scd.cartridge.id && (crc32(0, scd.cartridge.area, scd.cartridge.mask + 1) != brm_crc[1])) + { + /* check if it is correctly formatted before saving */ + if (!memcmp(scd.cartridge.area + scd.cartridge.mask + 1 - 0x20, brm_format + 0x20, 0x20)) + { + FILE *fp = fopen(CART_BRAM, "wb"); + if (fp != NULL) + { + int filesize = scd.cartridge.mask + 1; + int done = 0; + + /* Write to file (2k blocks) */ + while (filesize > CHUNKSIZE) + { + fwrite(scd.cartridge.area + done, CHUNKSIZE, 1, fp); + done += CHUNKSIZE; + filesize -= CHUNKSIZE; + } + + /* Write remaining bytes */ + if (filesize) + { + fwrite(scd.cartridge.area + done, filesize, 1, fp); + } + + /* Close file */ + fclose(fp); + + /* update CRC */ + brm_crc[1] = crc32(0, scd.cartridge.area, scd.cartridge.mask + 1); + } + } + } + } + + /* configurable SRAM & State auto-saving */ + if ((slot && !(config.s_auto & 2)) || (!slot && !(config.s_auto & 1))) + { + return; + } + + if (strlen(rom_filename)) + { + SILENT = 1; + slot_save(slot, device); + SILENT = 0; + } +} + +void slot_autodetect(int slot, int device, t_slot *ptr) +{ + if (!ptr) return; + + char filename[MAXPATHLEN]; + memset(ptr,0,sizeof(t_slot)); + + if (!device) + { + /* FAT support */ + if (slot > 0) + { + sprintf (filename,"%s/saves/%s.gp%d", DEFAULT_PATH, rom_filename, slot - 1); + } + else + { + sprintf (filename,"%s/saves/%s.srm", DEFAULT_PATH, rom_filename); + } + + /* Open file */ + FILE *fp = fopen(filename, "rb"); + if (fp) + { + /* Retrieve date & close */ + struct stat filestat; + stat(filename, &filestat); + struct tm *timeinfo = localtime(&filestat.st_mtime); + ptr->year = 1900 + timeinfo->tm_year; + ptr->month = timeinfo->tm_mon; + ptr->day = timeinfo->tm_mday; + ptr->hour = timeinfo->tm_hour; + ptr->min = timeinfo->tm_min; + fclose(fp); + ptr->valid = 1; + } + } + else + { + /* Memory Card support */ + if (slot > 0) + sprintf(filename,"MD-%04X.gp%d", rominfo.realchecksum, slot - 1); + else + sprintf(filename,"MD-%04X.srm", rominfo.realchecksum); + + /* Initialise the CARD system */ + memset(&SysArea, 0, CARD_WORKAREA); + CARD_Init("GENP", "00"); + + /* CARD slot */ + device--; + + /* Mount CARD */ + if (CardMount(device)) + { + /* Open file */ + card_file CardFile; + if (CARD_Open(device, filename, &CardFile) == CARD_ERROR_READY) + { + /* Retrieve date & close */ + card_stat CardStatus; + CARD_GetStatus(device, CardFile.filenum, &CardStatus); + time_t rawtime = CardStatus.time; + struct tm *timeinfo = localtime(&rawtime); + ptr->year = 1900 + timeinfo->tm_year; + ptr->month = timeinfo->tm_mon; + ptr->day = timeinfo->tm_mday; + ptr->hour = timeinfo->tm_hour; + ptr->min = timeinfo->tm_min; + CARD_Close(&CardFile); + ptr->valid = 1; + } + CARD_Unmount(device); + } + } +} + +int slot_delete(int slot, int device) +{ + char filename[MAXPATHLEN]; + int ret = 0; + + if (!device) + { + /* FAT support */ + if (slot > 0) + { + /* remove screenshot */ + sprintf(filename,"%s/saves/%s__%d.png", DEFAULT_PATH, rom_filename, slot - 1); + remove(filename); + + sprintf (filename,"%s/saves/%s.gp%d", DEFAULT_PATH, rom_filename, slot - 1); + } + else + { + sprintf (filename,"%s/saves/%s.srm", DEFAULT_PATH, rom_filename); + } + + /* Delete file */ + ret = remove(filename); + } + else + { + /* Memory Card support */ + if (slot > 0) + sprintf(filename,"MD-%04X.gp%d", rominfo.realchecksum, slot - 1); + else + sprintf(filename,"MD-%04X.srm", rominfo.realchecksum); + + /* Initialise the CARD system */ + memset(&SysArea, 0, CARD_WORKAREA); + CARD_Init("GENP", "00"); + + /* CARD slot */ + device--; + + /* Mount CARD */ + if (CardMount(device)) + { + /* Delete file */ + ret = CARD_Delete(device,filename); + CARD_Unmount(device); + } + } + + return ret; +} + +int slot_load(int slot, int device) +{ + char filename[MAXPATHLEN]; + unsigned long filesize, done = 0; + u8 *buffer; + + /* File Type */ + if (slot > 0) + { + GUI_MsgBoxOpen("Information","Loading State ...",1); + } + else + { + if (!sram.on) + { + GUI_WaitPrompt("Error","Backup RAM is disabled !"); + return 0; + } + + GUI_MsgBoxOpen("Information","Loading Backup RAM ...",1); + } + + /* Device Type */ + if (!device) + { + /* FAT file */ + if (slot > 0) + { + sprintf (filename,"%s/saves/%s.gp%d", DEFAULT_PATH, rom_filename, slot - 1); + } + else + { + sprintf (filename,"%s/saves/%s.srm", DEFAULT_PATH, rom_filename); + } + + /* Open file */ + FILE *fp = fopen(filename, "rb"); + if (!fp) + { + GUI_WaitPrompt("Error","Unable to open file !"); + return 0; + } + + /* Get file size */ + fseek(fp, 0, SEEK_END); + filesize = ftell(fp); + fseek(fp, 0, SEEK_SET); + + /* allocate buffer */ + buffer = (u8 *)memalign(32,filesize); + if (!buffer) + { + GUI_WaitPrompt("Error","Unable to allocate memory !"); + fclose(fp); + return 0; + } + + /* Read into buffer (2k blocks) */ + while (filesize > CHUNKSIZE) + { + fread(buffer + done, CHUNKSIZE, 1, fp); + done += CHUNKSIZE; + filesize -= CHUNKSIZE; + } + + /* Read remaining bytes */ + fread(buffer + done, filesize, 1, fp); + done += filesize; + + /* Close file */ + fclose(fp); + } + else + { + /* Memory Card file */ + if (slot > 0) + { + sprintf(filename, "MD-%04X.gp%d", rominfo.realchecksum, slot - 1); + } + else + { + sprintf(filename, "MD-%04X.srm", rominfo.realchecksum); + } + + /* Initialise the CARD system */ + char action[64]; + memset(&SysArea, 0, CARD_WORKAREA); + CARD_Init("GENP", "00"); + + /* CARD slot */ + device--; + + /* Attempt to mount the card */ + if (!CardMount(device)) + { + GUI_WaitPrompt("Error","Unable to mount memory card"); + return 0; + } + + /* Retrieve the sector size */ + u32 SectorSize = 0; + int CardError = CARD_GetSectorSize(device, &SectorSize); + if (!SectorSize) + { + sprintf(action, "Invalid sector size (%d)", CardError); + GUI_WaitPrompt("Error",action); + CARD_Unmount(device); + return 0; + } + + /* Open file */ + card_file CardFile; + CardError = CARD_Open(device, filename, &CardFile); + if (CardError) + { + sprintf(action, "Unable to open file (%d)", CardError); + GUI_WaitPrompt("Error",action); + CARD_Unmount(device); + return 0; + } + + /* Get file size */ + filesize = CardFile.len; + if (filesize % SectorSize) + { + filesize = ((filesize / SectorSize) + 1) * SectorSize; + } + + /* Allocate buffer */ + u8 *in = (u8 *)memalign(32, filesize); + if (!in) + { + GUI_WaitPrompt("Error","Unable to allocate memory !"); + CARD_Close(&CardFile); + CARD_Unmount(device); + return 0; + } + + /* Read file sectors */ + while (filesize > 0) + { + CARD_Read(&CardFile, &in[done], SectorSize, done); + done += SectorSize; + filesize -= SectorSize; + } + + /* Close file */ + CARD_Close(&CardFile); + CARD_Unmount(device); + + /* Uncompressed file size */ + memcpy(&filesize, in + 2112, 4); + buffer = (u8 *)memalign(32, filesize); + if (!buffer) + { + free(in); + GUI_WaitPrompt("Error","Unable to allocate memory !"); + return 0; + } + + /* Uncompress file */ + uncompress ((Bytef *)buffer, &filesize, (Bytef *)(in + 2112 + 4), done - 2112 - 4); + free(in); + } + + if (slot > 0) + { + /* Load state */ + if (state_load(buffer) <= 0) + { + free(buffer); + GUI_WaitPrompt("Error","Invalid state file !"); + return 0; + } + } + else + { + /* load SRAM */ + memcpy(sram.sram, buffer, 0x10000); + + /* update CRC */ + sram.crc = crc32(0, sram.sram, 0x10000); + } + + free(buffer); + GUI_MsgBoxClose(); + return 1; +} + +int slot_save(int slot, int device) +{ + char filename[MAXPATHLEN]; + unsigned long filesize, done = 0; + u8 *buffer; + + if (slot > 0) + { + GUI_MsgBoxOpen("Information","Saving State ...",1); + + /* allocate buffer */ + buffer = (u8 *)memalign(32,STATE_SIZE); + if (!buffer) + { + GUI_WaitPrompt("Error","Unable to allocate memory !"); + return 0; + } + + filesize = state_save(buffer); + } + else + { + /* only save if SRAM is enabled */ + if (!sram.on) + { + GUI_WaitPrompt("Error","Backup RAM disabled !"); + return 0; + } + + /* only save if SRAM has been modified */ + if (crc32(0, &sram.sram[0], 0x10000) == sram.crc) + { + GUI_WaitPrompt("Warning","Backup RAM not modified !"); + return 0; + } + + GUI_MsgBoxOpen("Information","Saving Backup RAM ...",1); + + /* allocate buffer */ + buffer = (u8 *)memalign(32, 0x10000); + if (!buffer) + { + GUI_WaitPrompt("Error","Unable to allocate memory !"); + return 0; + } + + /* copy SRAM data */ + memcpy(buffer, sram.sram, 0x10000); + filesize = 0x10000; + + /* update CRC */ + sram.crc = crc32(0, sram.sram, 0x10000); + } + + /* Device Type */ + if (!device) + { + /* FAT filename */ + if (slot > 0) + { + sprintf(filename, "%s/saves/%s.gp%d", DEFAULT_PATH, rom_filename, slot - 1); + } + else + { + sprintf(filename, "%s/saves/%s.srm", DEFAULT_PATH, rom_filename); + } + + /* Open file */ + FILE *fp = fopen(filename, "wb"); + if (!fp) + { + GUI_WaitPrompt("Error","Unable to open file !"); + free(buffer); + return 0; + } + + /* Write from buffer (2k blocks) */ + while (filesize > CHUNKSIZE) + { + fwrite(buffer + done, CHUNKSIZE, 1, fp); + done += CHUNKSIZE; + filesize -= CHUNKSIZE; + } + + /* Write remaining bytes */ + fwrite(buffer + done, filesize, 1, fp); + done += filesize; + + /* Close file */ + fclose(fp); + free(buffer); + + /* Close message box */ + GUI_MsgBoxClose(); + + /* Save state screenshot */ + if (slot > 0) + { + sprintf(filename,"%s/saves/%s__%d.png", DEFAULT_PATH, rom_filename, slot - 1); + gxSaveScreenshot(filename); + } + } + else + { + /* Memory Card filename */ + if (slot > 0) + { + sprintf(filename, "MD-%04X.gp%d", rominfo.realchecksum, slot - 1); + } + else + { + sprintf(filename, "MD-%04X.srm", rominfo.realchecksum); + } + + /* Initialise the CARD system */ + char action[64]; + memset(&SysArea, 0, CARD_WORKAREA); + CARD_Init("GENP", "00"); + + /* CARD slot */ + device--; + + /* Attempt to mount the card */ + if (!CardMount(device)) + { + GUI_WaitPrompt("Error","Unable to mount memory card"); + free(buffer); + return 0; + } + + /* Retrieve sector size */ + u32 SectorSize = 0; + int CardError = CARD_GetSectorSize(device, &SectorSize); + if (!SectorSize) + { + sprintf(action, "Invalid sector size (%d)", CardError); + GUI_WaitPrompt("Error",action); + CARD_Unmount(device); + free(buffer); + return 0; + } + + /* Build output buffer */ + u8 *out = (u8 *)memalign(32, filesize + 2112 + 4); + if (!out) + { + GUI_WaitPrompt("Error","Unable to allocate memory !"); + CARD_Unmount(device); + free(buffer); + return 0; + } + + /* Memory Card file header */ + char comment[2][32] = { {"Genesis Plus GX"}, {"SRAM Save"} }; + strcpy (comment[1], filename); + memcpy (&out[0], &icon, 2048); + memcpy (&out[2048], &comment[0], 64); + + /* uncompressed size */ + done = filesize; + memcpy(&out[2112], &done, 4); + + /* compress file */ + compress2 ((Bytef *)&out[2112 + 4], &filesize, (Bytef *)buffer, done, 9); + + /* Adjust file size */ + filesize = filesize + 4 + 2112; + if (filesize % SectorSize) + { + filesize = ((filesize / SectorSize) + 1) * SectorSize; + } + + /* Check if file already exists */ + card_file CardFile; + if (CARD_Open(device, filename, &CardFile) == CARD_ERROR_READY) + { + int size = filesize - CardFile.len; + CARD_Close(&CardFile); + memset(&CardFile,0,sizeof(CardFile)); + + /* Check file new size */ + if (size > 0) + { + CardError = CARD_Create(device, "TEMP", size, &CardFile); + if (CardError) + { + sprintf(action, "Unable to increase file size (%d)", CardError); + GUI_WaitPrompt("Error",action); + CARD_Unmount(device); + free(out); + free(buffer); + return 0; + } + + /* delete temporary file */ + CARD_Close(&CardFile); + memset(&CardFile,0,sizeof(CardFile)); + CARD_Delete(device, "TEMP"); + } + + /* delete previously existing file */ + CARD_Delete(device, filename); + } + + /* Create a new file */ + CardError = CARD_Create(device, filename, filesize, &CardFile); + if (CardError) + { + sprintf(action, "Unable to create file (%d)", CardError); + GUI_WaitPrompt("Error",action); + CARD_Unmount(device); + free(out); + free(buffer); + return 0; + } + + /* Update file informations */ + time_t rawtime; + time(&rawtime); + card_stat CardStatus; + CARD_GetStatus(device, CardFile.filenum, &CardStatus); + CardStatus.icon_addr = 0x0; + CardStatus.icon_fmt = 2; + CardStatus.icon_speed = 1; + CardStatus.comment_addr = 2048; + CardStatus.time = rawtime; + CARD_SetStatus(device, CardFile.filenum, &CardStatus); + + /* Write file sectors */ + while (filesize > 0) + { + CARD_Write(&CardFile, &out[done], SectorSize, done); + filesize -= SectorSize; + done += SectorSize; + } + + /* Close file */ + CARD_Close(&CardFile); + CARD_Unmount(device); + free(out); + free(buffer); + + /* Close message box */ + GUI_MsgBoxClose(); + } + + return 1; +} diff --git a/genplus-gx/gx/fileio/file_slot.h b/genplus-gx/gx/fileio/file_slot.h new file mode 100644 index 0000000000..fe227a8936 --- /dev/null +++ b/genplus-gx/gx/fileio/file_slot.h @@ -0,0 +1,60 @@ +/* + * file_slot.c + * + * FAT and Memory Card SRAM/Savestate files managment + * + * Copyright Eke-Eke (2008-2012), based on original code from Softdev (2006) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _FILE_SLOT_H +#define _FILE_SLOT_H + +typedef struct +{ + int valid; + u16 year; + u8 month; + u8 day; + u8 hour; + u8 min; +} t_slot; + +extern void slot_autoload(int slot, int device); +extern void slot_autosave(int slot, int device); +extern void slot_autodetect(int slot, int device, t_slot *ptr); +extern int slot_delete(int slot, int device); +extern int slot_load(int slot, int device); +extern int slot_save(int slot, int device); + +#endif diff --git a/genplus-gx/gx/fileio/fileio.c b/genplus-gx/gx/fileio/fileio.c new file mode 100644 index 0000000000..4d97eb05a6 --- /dev/null +++ b/genplus-gx/gx/fileio/fileio.c @@ -0,0 +1,258 @@ +/* + * fileio.c + * + * Load a normal file, or ZIP/GZ archive into ROM buffer. + * Returns loaded ROM size (zero if an error occured). + * + * Copyright Eke-Eke (2007-2013), based on original work from Softdev (2006) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "file_load.h" +#include "gui.h" + +/* + * Zip file header definition + */ +typedef struct +{ + unsigned int zipid __attribute__ ((__packed__)); // 0x04034b50 + unsigned short zipversion __attribute__ ((__packed__)); + unsigned short zipflags __attribute__ ((__packed__)); + unsigned short compressionMethod __attribute__ ((__packed__)); + unsigned short lastmodtime __attribute__ ((__packed__)); + unsigned short lastmoddate __attribute__ ((__packed__)); + unsigned int crc32 __attribute__ ((__packed__)); + unsigned int compressedSize __attribute__ ((__packed__)); + unsigned int uncompressedSize __attribute__ ((__packed__)); + unsigned short filenameLength __attribute__ ((__packed__)); + unsigned short extraDataLength __attribute__ ((__packed__)); +} PKZIPHEADER; + + +/* + * Zip files are stored little endian + * Support functions for short and int types + */ +static inline u32 FLIP32 (u32 b) +{ + unsigned int c; + c = (b & 0xff000000) >> 24; + c |= (b & 0xff0000) >> 8; + c |= (b & 0xff00) << 8; + c |= (b & 0xff) << 24; + return c; +} + +static inline u16 FLIP16 (u16 b) +{ + u16 c; + c = (b & 0xff00) >> 8; + c |= (b & 0xff) << 8; + return c; +} + +int load_archive(char *filename, unsigned char *buffer, int maxsize, char *extension) +{ + int size = 0; + char in[CHUNKSIZE]; + char msg[64] = "Unable to open file"; + + /* Open file */ + FILE *fd = fopen(filename, "rb"); + + /* Master System & Game Gear BIOS are optional files */ + if (!strcmp(filename,MS_BIOS_US) || !strcmp(filename,MS_BIOS_EU) || !strcmp(filename,MS_BIOS_JP) || !strcmp(filename,GG_BIOS)) + { + /* disable all messages */ + SILENT = 1; + } + + /* Mega CD BIOS are required files */ + if (!strcmp(filename,CD_BIOS_US) || !strcmp(filename,CD_BIOS_EU) || !strcmp(filename,CD_BIOS_JP)) + { + sprintf(msg,"Unable to open %s", filename + 14); + } + + if (!fd) + { + GUI_WaitPrompt("Error", msg); + SILENT = 0; + return 0; + } + + /* Read first chunk */ + fread(in, CHUNKSIZE, 1, fd); + + /* Detect Zip file */ + if (memcmp(in, "PK", 2) == 0) + { + /* Inflate buffer */ + char out[CHUNKSIZE]; + + /* PKZip header pointer */ + PKZIPHEADER *pkzip = (PKZIPHEADER *) in; + + /* Retrieve uncompressed ROM size */ + size = FLIP32(pkzip->uncompressedSize); + + /* Check ROM size */ + if (size > maxsize) + { + fclose(fd); + GUI_WaitPrompt("Error","File is too large"); + SILENT = 0; + return 0; + } + + sprintf (msg, "Unzipping %d bytes ...", size); + GUI_MsgBoxUpdate("Information",msg); + + /* Initialize zip stream */ + z_stream zs; + memset (&zs, 0, sizeof (z_stream)); + zs.zalloc = Z_NULL; + zs.zfree = Z_NULL; + zs.opaque = Z_NULL; + zs.avail_in = 0; + zs.next_in = Z_NULL; + int res = inflateInit2(&zs, -MAX_WBITS); + + if (res != Z_OK) + { + fclose(fd); + GUI_WaitPrompt("Error","Unable to unzip file"); + SILENT = 0; + return 0; + } + + /* Compressed filename offset */ + int offset = sizeof (PKZIPHEADER) + FLIP16(pkzip->filenameLength); + + if (extension) + { + memcpy(extension, &in[offset - 3], 3); + extension[3] = 0; + } + + + /* Initial Zip buffer offset */ + offset += FLIP16(pkzip->extraDataLength); + zs.next_in = (Bytef *)&in[offset]; + + /* Initial Zip remaining chunk size */ + zs.avail_in = CHUNKSIZE - offset; + + /* Start unzipping file */ + do + { + /* Inflate data until output buffer is empty */ + do + { + zs.avail_out = CHUNKSIZE; + zs.next_out = (Bytef *) out; + res = inflate(&zs, Z_NO_FLUSH); + + if (res == Z_MEM_ERROR) + { + inflateEnd(&zs); + fclose(fd); + GUI_WaitPrompt("Error","Unable to unzip file"); + SILENT = 0; + return 0; + } + + offset = CHUNKSIZE - zs.avail_out; + if (offset) + { + memcpy(buffer, out, offset); + buffer += offset; + } + } + while (zs.avail_out == 0); + + /* Read next chunk of zipped data */ + fread(in, CHUNKSIZE, 1, fd); + zs.next_in = (Bytef *)&in[0]; + zs.avail_in = CHUNKSIZE; + } + while (res != Z_STREAM_END); + inflateEnd (&zs); + } + else + { + /* Get file size */ + fseek(fd, 0, SEEK_END); + size = ftell(fd); + fseek(fd, 0, SEEK_SET); + + /* size limit */ + if(size > maxsize) + { + fclose(fd); + GUI_WaitPrompt("Error","File is too large"); + SILENT = 0; + return 0; + } + + sprintf((char *)msg,"Loading %d bytes ...", size); + GUI_MsgBoxUpdate("Information", (char *)msg); + + /* filename extension */ + if (extension) + { + memcpy(extension, &filename[strlen(filename) - 3], 3); + extension[3] = 0; + } + + /* Read into buffer */ + int left = size; + while (left > CHUNKSIZE) + { + fread(buffer, CHUNKSIZE, 1, fd); + buffer += CHUNKSIZE; + left -= CHUNKSIZE; + } + + /* Read remaining bytes */ + fread(buffer, left, 1, fd); + } + + /* Close file */ + fclose(fd); + + /* Return loaded ROM size */ + SILENT = 0; + return size; +} diff --git a/genplus-gx/gx/fileio/fileio.h b/genplus-gx/gx/fileio/fileio.h new file mode 100644 index 0000000000..4e1c6c6050 --- /dev/null +++ b/genplus-gx/gx/fileio/fileio.h @@ -0,0 +1,47 @@ +/* + * fileio.c + * + * Load a normal file, or ZIP/GZ archive into ROM buffer. + * Returns loaded ROM size (zero if an error occured). + * + * Copyright Eke-Eke (2007-2013), based on original work from Softdev (2006) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _FILEIO_H_ +#define _FILEIO_H_ + +/* Function prototypes */ +int load_archive(char *filename, unsigned char *buffer, int maxsize, char *extension); + +#endif /* _FILEIO_H_ */ diff --git a/genplus-gx/gx/fileio/history.c b/genplus-gx/gx/fileio/history.c new file mode 100644 index 0000000000..a28219fd3a --- /dev/null +++ b/genplus-gx/gx/fileio/history.c @@ -0,0 +1,138 @@ +/* + * history.c + * + * Generic ROM history list managment + * + * Copyright Eke-Eke (2008-2012), based on original code from Martin Disibio (2008) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "history.h" + +t_history history; + + +/**************************************************************************** + * history_add_file + * + * Adds the given file path to the top of the history list, shifting each + * existing entry in the history down one place. If given file path is + * already in the list then the existing entry is (in effect) moved to the + * top instead. + ****************************************************************************/ +void history_add_file(char *filepath, char *filename, u8 filetype) +{ + /* Create the new entry for this path. */ + t_history_entry newentry; + strncpy(newentry.filepath, filepath, MAXJOLIET - 1); + strncpy(newentry.filename, filename, MAXJOLIET - 1); + newentry.filepath[MAXJOLIET - 1] = '\0'; + newentry.filename[MAXJOLIET - 1] = '\0'; + newentry.filetype = filetype; + + t_history_entry oldentry; /* Old entry is the one being shuffled down a spot. */ + t_history_entry currentry; /* Curr entry is the one that just replaced old path. */ + + /* Initially set curr entry to the new value. */ + memcpy(¤try, &newentry, sizeof(t_history_entry)); + + int i; + for(i=0; i < NUM_HISTORY_ENTRIES; i++) + { + /* Save off the next entry. */ + memcpy(&oldentry, &history.entries[i], sizeof(t_history_entry)); + + /* Overwrite with the previous entry. */ + memcpy(&history.entries[i], ¤try, sizeof(t_history_entry)); + + /* Switch the old entry to the curr entry now. */ + memcpy(¤try, &oldentry, sizeof(t_history_entry)); + + /* If the entry in the list at this spot matches + the new entry then do nothing and let this + entry get deleted. */ + if(strcmp(newentry.filepath, currentry.filepath) == 0 && strcmp(newentry.filename, currentry.filename) == 0) + break; + } + + /* now save to disk */ + history_save(); +} + +void history_save() +{ + /* open file */ + char fname[MAXPATHLEN]; + sprintf (fname, "%s/history.ini", DEFAULT_PATH); + FILE *fp = fopen(fname, "wb"); + if (fp) + { + /* write file */ + fwrite(&history, sizeof(history), 1, fp); + fclose(fp); + } +} + +void history_load(void) +{ + /* open file */ + char fname[MAXPATHLEN]; + sprintf (fname, "%s/history.ini", DEFAULT_PATH); + FILE *fp = fopen(fname, "rb"); + if (fp) + { + /* read file */ + if (fread(&history, sizeof(history), 1, fp) != 1) + { + /* an error ocurred, better clear hoistory */ + memset(&history, 0, sizeof(history)); + } + + /* close file */ + fclose(fp); + } +} + +void history_default(void) +{ + int i; + for(i=0; i < NUM_HISTORY_ENTRIES; i++) + memset(&history.entries[i], 0, sizeof(t_history_entry)); + + /* restore history */ + history_load(); +} + + + diff --git a/genplus-gx/gx/fileio/history.h b/genplus-gx/gx/fileio/history.h new file mode 100644 index 0000000000..e40081a5d8 --- /dev/null +++ b/genplus-gx/gx/fileio/history.h @@ -0,0 +1,69 @@ +/* + * history.c + * + * Generic ROM history list managment + * + * Copyright Eke-Eke (2008-2012), based on original code from Martin Disibio (2008) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _HISTORY_H +#define _HISTORY_H + +#include "filesel.h" + +#define NUM_HISTORY_ENTRIES (10) + +/**************************************************************************** + * ROM Play History + * + ****************************************************************************/ +typedef struct +{ + char filepath[MAXJOLIET]; + char filename[MAXJOLIET]; + u8 filetype; +} t_history_entry; + +typedef struct +{ + t_history_entry entries[NUM_HISTORY_ENTRIES]; +} t_history; + +extern t_history history; +extern void history_add_file(char *filepath, char *filename, u8 filetype); +extern void history_save(void); +extern void history_load(void); +extern void history_default(void); + +#endif diff --git a/genplus-gx/gx/gui/cheats.c b/genplus-gx/gx/gui/cheats.c new file mode 100644 index 0000000000..829044cbfe --- /dev/null +++ b/genplus-gx/gx/gui/cheats.c @@ -0,0 +1,1492 @@ +/* + * cheats.c + * + * Cheats menu + * + * Copyright Eke-Eke (2010-2012) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "file_load.h" +#include "cheats.h" +#include "font.h" +#include "gui.h" + +#define BG_COLOR_1 {0x49,0x49,0x49,0xff} +#define BG_COLOR_2 {0x66,0x66,0x66,0xff} + +#define MAX_CHEATS (150) +#define MAX_DESC_LENGTH (63) + +#ifdef HW_RVL +extern const u8 Key_Minus_wii_png[]; +extern const u8 Key_Plus_wii_png[]; +#else +extern const u8 Key_R_gcn_png[]; +extern const u8 Key_L_gcn_png[]; +#endif +extern const u8 Key_DPAD_png[]; + +typedef struct +{ + char code[12]; + char text[MAX_DESC_LENGTH]; + u8 enable; + u16 data; + u16 old; + u32 address; + u8 *prev; +} CHEATENTRY; + +static int string_offset = 0; +static int selection = 0; +static int offset = 0; +static int type = 0; +static int maxcheats = 0; +static int maxROMcheats = 0; +static int maxRAMcheats = 0; + +static CHEATENTRY cheatlist[MAX_CHEATS]; +static u8 cheatIndexes[MAX_CHEATS]; + +static void cheatmenu_cb(void); + +/*****************************************************************************/ +/* GUI Buttons data */ +/*****************************************************************************/ +static butn_data arrow_up_data = +{ + {NULL,NULL}, + {Button_up_png,Button_up_over_png} +}; + +static butn_data arrow_down_data = +{ + {NULL,NULL}, + {Button_down_png,Button_down_over_png} +}; +static butn_data button_digit_data = +{ + {NULL,NULL}, + {Button_digit_png,Button_digit_over_png} +}; + +/*****************************************************************************/ +/* GUI Arrows button */ +/*****************************************************************************/ + +static gui_butn arrow_up = {&arrow_up_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX,{0,0,0,0},14,76,360,32}; +static gui_butn arrow_down = {&arrow_down_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX,{0,0,0,0},14,368,360,32}; + + +/*****************************************************************************/ +/* GUI helpers */ +/*****************************************************************************/ +static gui_item action_cancel = +{ + NULL,Key_B_png,"","Exit",10,422,28,28 +}; + +static gui_item action_select = +{ + NULL,Key_A_png,"","Edit Entry",602,422,28,28 +}; + +/*****************************************************************************/ +/* GUI Background images */ +/*****************************************************************************/ +static gui_image bg_cheats[7] = +{ + {NULL,Bg_layer_png,IMAGE_VISIBLE|IMAGE_REPEAT,0,0,640,480,255}, + {NULL,Bg_overlay_png,IMAGE_VISIBLE|IMAGE_REPEAT,0,0,640,480,255}, + {NULL,Banner_top_png,IMAGE_VISIBLE|IMAGE_SLIDE_TOP,0,0,640,108,255}, + {NULL,Banner_bottom_png,IMAGE_VISIBLE|IMAGE_SLIDE_BOTTOM,0,380,640,100,255}, + {NULL,Main_logo_png,IMAGE_VISIBLE|IMAGE_SLIDE_TOP,466,40,152,44,255}, + {NULL,Frame_s1_png,IMAGE_VISIBLE,8,70,372,336,152}, + {NULL,Frame_s1_png,IMAGE_SLIDE_RIGHT,411,109,372,296,76}, +}; + +/*****************************************************************************/ +/* Menu Items description */ +/*****************************************************************************/ +static gui_item items_cheats[30] = +{ + {NULL,NULL,"","Edit Entry",0,0,0,0}, + {NULL,NULL,"","Edit Entry",0,0,0,0}, + {NULL,NULL,"","Edit Entry",0,0,0,0}, + {NULL,NULL,"","Edit Entry",0,0,0,0}, + {NULL,NULL,"","Edit Entry",0,0,0,0}, + {NULL,NULL,"","Edit Entry",0,0,0,0}, + {NULL,NULL,"","Edit Entry",0,0,0,0}, + {NULL,NULL,"","Edit Entry",0,0,0,0}, + {NULL,NULL,"","Edit Entry",0,0,0,0}, + {NULL,NULL,"","Edit Entry",0,0,0,0}, + {NULL,NULL,"0","Add Character" ,440,136,40,40}, + {NULL,NULL,"1","Add Character" ,486,136,40,40}, + {NULL,NULL,"2","Add Character" ,532,136,40,40}, + {NULL,NULL,"3","Add Character" ,578,136,40,40}, + {NULL,NULL,"4","Add Character" ,440,182,40,40}, + {NULL,NULL,"5","Add Character" ,486,182,40,40}, + {NULL,NULL,"6","Add Character" ,532,182,40,40}, + {NULL,NULL,"7","Add Character" ,578,182,40,40}, + {NULL,NULL,"8","Add Character" ,440,228,40,40}, + {NULL,NULL,"9","Add Character" ,486,228,40,40}, + {NULL,NULL,"A","Add Character" ,532,228,40,40}, + {NULL,NULL,"B","Add Character" ,578,228,40,40}, + {NULL,NULL,"C","Add Character" ,440,274,40,40}, + {NULL,NULL,"D","Add Character" ,486,274,40,40}, + {NULL,NULL,"E","Add Character" ,532,274,40,40}, + {NULL,NULL,"F","Add Character" ,578,274,40,40}, + {NULL,NULL,"del","Backspace" ,440,338,40,40}, + {NULL,NULL,":","Add Separator" ,486,338,40,40}, + {NULL,NULL,"+","Next Characters",532,338,40,40}, + {NULL,NULL,"ok","Save Entry" ,578,338,40,40} +}; + +/*****************************************************************************/ +/* Menu Buttons description */ +/*****************************************************************************/ +static gui_butn buttons_cheats[30] = +{ + {NULL, BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_SELECT_SFX|BUTTON_OVER_SFX,{1,0,0,0},15,108,358,26}, + {NULL, BUTTON_VISIBLE|BUTTON_SELECT_SFX|BUTTON_OVER_SFX,{1,0,0,0},15,134,358,26}, + {NULL, BUTTON_VISIBLE|BUTTON_SELECT_SFX|BUTTON_OVER_SFX,{1,0,0,0},15,160,358,26}, + {NULL, BUTTON_VISIBLE|BUTTON_SELECT_SFX|BUTTON_OVER_SFX,{1,0,0,0},15,186,358,26}, + {NULL, BUTTON_VISIBLE|BUTTON_SELECT_SFX|BUTTON_OVER_SFX,{1,0,0,0},15,212,358,26}, + {NULL, BUTTON_VISIBLE|BUTTON_SELECT_SFX|BUTTON_OVER_SFX,{1,0,0,0},15,238,358,26}, + {NULL, BUTTON_VISIBLE|BUTTON_SELECT_SFX|BUTTON_OVER_SFX,{1,0,0,0},15,264,358,26}, + {NULL, BUTTON_VISIBLE|BUTTON_SELECT_SFX|BUTTON_OVER_SFX,{1,0,0,0},15,290,358,26}, + {NULL, BUTTON_VISIBLE|BUTTON_SELECT_SFX|BUTTON_OVER_SFX,{1,0,0,0},15,316,358,26}, + {NULL, BUTTON_VISIBLE|BUTTON_SELECT_SFX|BUTTON_OVER_SFX,{1,0,0,0},15,342,358,26}, + {&button_digit_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{0,4,0,1},440,136,40,40}, + {&button_digit_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{0,4,1,1},486,136,40,40}, + {&button_digit_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{0,4,1,1},532,136,40,40}, + {&button_digit_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{0,4,1,0},578,136,40,40}, + {&button_digit_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{4,4,0,1},440,182,40,40}, + {&button_digit_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{4,4,1,1},486,182,40,40}, + {&button_digit_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{4,4,1,1},532,182,40,40}, + {&button_digit_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{4,4,1,0},578,182,40,40}, + {&button_digit_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{4,4,0,1},440,228,40,40}, + {&button_digit_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{4,4,1,1},486,228,40,40}, + {&button_digit_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{4,4,1,1},532,228,40,40}, + {&button_digit_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{4,4,1,0},578,228,40,40}, + {&button_digit_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{4,4,0,1},440,274,40,40}, + {&button_digit_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{4,4,1,1},486,274,40,40}, + {&button_digit_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{4,4,1,1},532,274,40,40}, + {&button_digit_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{4,4,1,0},578,274,40,40}, + {&button_digit_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{4,0,0,1},440,338,40,40}, + {&button_digit_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{4,0,1,1},486,338,40,40}, + {&button_digit_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{4,0,1,1},532,338,40,40}, + {&button_digit_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{4,0,1,0},578,338,40,40} +}; + +/*****************************************************************************/ +/* Menu description */ +/*****************************************************************************/ +static gui_menu menu_cheats = +{ + "Cheats Manager", + 0,0, + 30,30,7,0, + items_cheats, + buttons_cheats, + bg_cheats, + {&action_cancel, &action_select}, + {&arrow_up,&arrow_down}, + cheatmenu_cb +}; + +static char ggvalidchars[] = "ABCDEFGHJKLMNPRSTVWXYZ0123456789"; + +static char arvalidchars[] = "0123456789ABCDEF"; + +static u32 decode_cheat(char *string, int index) +{ + char *p; + int i,n; + u32 len = 0; + u32 address = 0; + u16 data = 0; + u8 ref = 0; + + /* 16-bit Game Genie code (ABCD-EFGH) */ + if ((strlen(string) >= 9) && (string[4] == '-')) + { + /* 16-bit system only */ + if ((system_hw & SYSTEM_PBC) != SYSTEM_MD) + { + return 0; + } + + for (i = 0; i < 8; i++) + { + if (i == 4) string++; + p = strchr (ggvalidchars, *string++); + if (p == NULL) return 0; + n = p - ggvalidchars; + + switch (i) + { + case 0: + data |= n << 3; + break; + + case 1: + data |= n >> 2; + address |= (n & 3) << 14; + break; + + case 2: + address |= n << 9; + break; + + case 3: + address |= (n & 0xF) << 20 | (n >> 4) << 8; + break; + + case 4: + data |= (n & 1) << 12; + address |= (n >> 1) << 16; + break; + + case 5: + data |= (n & 1) << 15 | (n >> 1) << 8; + break; + + case 6: + data |= (n >> 3) << 13; + address |= (n & 7) << 5; + break; + + case 7: + address |= n; + break; + } + } + + /* code length */ + len = 9; + } + + /* 8-bit Game Genie code (DDA-AAA-XXX) */ + else if ((strlen(string) >= 11) && (string[3] == '-') && (string[7] == '-')) + { + /* 8-bit system only */ + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + return 0; + } + + /* decode 8-bit data */ + for (i=0; i<2; i++) + { + p = strchr (arvalidchars, *string++); + if (p == NULL) return 0; + n = (p - arvalidchars) & 0xF; + data |= (n << ((1 - i) * 4)); + } + + /* decode 16-bit address (low 12-bits) */ + for (i=0; i<3; i++) + { + if (i==1) string++; /* skip separator */ + p = strchr (arvalidchars, *string++); + if (p == NULL) return 0; + n = (p - arvalidchars) & 0xF; + address |= (n << ((2 - i) * 4)); + } + + /* decode 16-bit address (high 4-bits) */ + p = strchr (arvalidchars, *string++); + if (p == NULL) return 0; + n = (p - arvalidchars) & 0xF; + n ^= 0xF; /* bits inversion */ + address |= (n << 12); + + /* RAM address are also supported */ + if (address >= 0xC000) + { + /* convert to 24-bit Work RAM address */ + address = 0xFF0000 | (address & 0x1FFF); + } + + /* decode reference 8-bit data */ + for (i=0; i<2; i++) + { + string++; /* skip separator and 2nd digit */ + p = strchr (arvalidchars, *string++); + if (p == NULL) return 0; + n = (p - arvalidchars) & 0xF; + ref |= (n << ((1 - i) * 4)); + } + ref = (ref >> 2) | ((ref & 0x03) << 6); /* 2-bit right rotation */ + ref ^= 0xBA; /* XOR */ + + /* update old data value */ + cheatlist[index].old = ref; + + /* code length */ + len = 11; + } + + /* Action Replay code */ + else if (string[6] == ':') + { + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + /* 16-bit code (AAAAAA:DDDD) */ + if (strlen(string) < 11) return 0; + + /* decode 24-bit address */ + for (i=0; i<6; i++) + { + p = strchr (arvalidchars, *string++); + if (p == NULL) return 0; + n = (p - arvalidchars) & 0xF; + address |= (n << ((5 - i) * 4)); + } + + /* decode 16-bit data */ + string++; + for (i=0; i<4; i++) + { + p = strchr (arvalidchars, *string++); + if (p == NULL) return 0; + n = (p - arvalidchars) & 0xF; + data |= (n << ((3 - i) * 4)); + } + + /* code length */ + len = 11; + } + else + { + /* 8-bit code (xxAAAA:DD) */ + if (strlen(string) < 9) return 0; + + /* decode 16-bit address */ + string+=2; + for (i=0; i<4; i++) + { + p = strchr (arvalidchars, *string++); + if (p == NULL) return 0; + n = (p - arvalidchars) & 0xF; + address |= (n << ((3 - i) * 4)); + } + + /* ROM addresses are not supported */ + if (address < 0xC000) return 0; + + /* convert to 24-bit Work RAM address */ + address = 0xFF0000 | (address & 0x1FFF); + + /* decode 8-bit data */ + string++; + for (i=0; i<2; i++) + { + p = strchr (arvalidchars, *string++); + if (p == NULL) return 0; + n = (p - arvalidchars) & 0xF; + data |= (n << ((1 - i) * 4)); + } + + /* code length */ + len = 9; + } + } + + /* Valid code found ? */ + if (len) + { + /* update cheat address & data values */ + cheatlist[index].address = address; + cheatlist[index].data = data; + } + + /* return code length (0 = invalid) */ + return len; +} + +static void apply_cheats(void) +{ + u8 *ptr; + + /* clear ROM&RAM patches counter */ + maxROMcheats = maxRAMcheats = 0; + + int i; + for (i = 0; i < maxcheats; i++) + { + if (cheatlist[i].enable) + { + if (cheatlist[i].address < cart.romsize) + { + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + /* patch ROM data */ + cheatlist[i].old = *(u16 *)(cart.rom + (cheatlist[i].address & 0xFFFFFE)); + *(u16 *)(cart.rom + (cheatlist[i].address & 0xFFFFFE)) = cheatlist[i].data; + } + else + { + /* add ROM patch */ + maxROMcheats++; + cheatIndexes[MAX_CHEATS - maxROMcheats] = i; + + /* get current banked ROM address */ + ptr = &z80_readmap[(cheatlist[i].address) >> 10][cheatlist[i].address & 0x03FF]; + + /* check if reference matches original ROM data */ + if (((u8)cheatlist[i].old) == *ptr) + { + /* patch data */ + *ptr = cheatlist[i].data; + + /* save patched ROM address */ + cheatlist[i].prev = ptr; + } + else + { + /* no patched ROM address yet */ + cheatlist[i].prev = NULL; + } + } + } + else if (cheatlist[i].address >= 0xFF0000) + { + /* add RAM patch */ + cheatIndexes[maxRAMcheats++] = i; + } + } + } +} + +static void clear_cheats(void) +{ + int i = maxcheats; + + /* disable cheats in reversed order in case the same address is used by multiple patches */ + while (i > 0) + { + if (cheatlist[i-1].enable) + { + if (cheatlist[i-1].address < cart.romsize) + { + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + /* restore original ROM data */ + *(u16 *)(cart.rom + (cheatlist[i-1].address & 0xFFFFFE)) = cheatlist[i-1].old; + } + else + { + /* check if previous banked ROM address has been patched */ + if (cheatlist[i-1].prev != NULL) + { + /* restore original data */ + *cheatlist[i-1].prev = cheatlist[i-1].old; + + /* no more patched ROM address */ + cheatlist[i-1].prev = NULL; + } + } + } + } + + i--; + } +} + +static void switch_chars(void) +{ + int i; + gui_menu *m = &menu_cheats; + + if (m->items[10].text[0] == '0') + { + m->items[10].text[0] = 'G'; + m->items[11].text[0] = 'H'; + m->items[12].text[0] = 'J'; + m->items[13].text[0] = 'K'; + m->items[14].text[0] = 'L'; + m->items[15].text[0] = 'M'; + m->items[16].text[0] = 'N'; + m->items[17].text[0] = 'P'; + m->items[18].text[0] = 'R'; + m->items[19].text[0] = 'S'; + m->items[20].text[0] = 'T'; + m->items[21].text[0] = 'V'; + m->items[22].text[0] = 'W'; + m->items[23].text[0] = 'X'; + m->items[24].text[0] = 'Y'; + m->items[25].text[0] = 'Z'; + } + else if (m->items[10].text[0] == 'G') + { + m->items[10].text[0] = '0'; + m->items[11].text[0] = '1'; + m->items[12].text[0] = '2'; + m->items[13].text[0] = '3'; + m->items[14].text[0] = '4'; + m->items[15].text[0] = '5'; + m->items[16].text[0] = '6'; + m->items[17].text[0] = '7'; + m->items[18].text[0] = '8'; + m->items[19].text[0] = '9'; + m->items[20].text[0] = 'A'; + m->items[21].text[0] = 'B'; + m->items[22].text[0] = 'C'; + m->items[23].text[0] = 'D'; + m->items[24].text[0] = 'E'; + m->items[25].text[0] = 'F'; + } + else if (m->items[10].text[0] == 'A') + { + m->items[10].text[0] = 'Q'; + m->items[11].text[0] = 'R'; + m->items[12].text[0] = 'S'; + m->items[13].text[0] = 'T'; + m->items[14].text[0] = 'U'; + m->items[15].text[0] = 'V'; + m->items[16].text[0] = 'W'; + m->items[17].text[0] = 'X'; + m->items[18].text[0] = 'Y'; + m->items[19].text[0] = 'Z'; + m->items[20].text[0] = '0'; + m->items[21].text[0] = '1'; + m->items[22].text[0] = '2'; + m->items[23].text[0] = '3'; + m->items[24].text[0] = '4'; + m->items[25].text[0] = '5'; + } + else if (m->items[10].text[0] == 'Q') + { + m->items[10].text[0] = '6'; + m->items[11].text[0] = '7'; + m->items[12].text[0] = '8'; + m->items[13].text[0] = '9'; + + /* hide unused buttons */ + for (i=14; i<26; i++) + { + m->buttons[i].state &= ~BUTTON_VISIBLE; + } + m->buttons[10].shift[1] = 16; + m->buttons[11].shift[1] = 16; + m->buttons[12].shift[1] = 16; + m->buttons[13].shift[1] = 16; + m->buttons[26].shift[0] = 16; + m->buttons[27].shift[0] = 16; + m->buttons[28].shift[0] = 16; + m->buttons[29].shift[0] = 16; + } + else if (m->items[10].text[0] == '6') + { + m->items[10].text[0] = 'A'; + m->items[11].text[0] = 'B'; + m->items[12].text[0] = 'C'; + m->items[13].text[0] = 'D'; + m->items[14].text[0] = 'E'; + m->items[15].text[0] = 'F'; + m->items[16].text[0] = 'G'; + m->items[17].text[0] = 'H'; + m->items[18].text[0] = 'I'; + m->items[19].text[0] = 'J'; + m->items[20].text[0] = 'K'; + m->items[21].text[0] = 'L'; + m->items[22].text[0] = 'M'; + m->items[23].text[0] = 'N'; + m->items[24].text[0] = 'O'; + m->items[25].text[0] = 'P'; + + /* show previously unused buttons */ + for (i=14; i<26; i++) + { + m->buttons[i].state |= BUTTON_VISIBLE; + } + m->buttons[10].shift[1] = 4; + m->buttons[11].shift[1] = 4; + m->buttons[12].shift[1] = 4; + m->buttons[13].shift[1] = 4; + m->buttons[26].shift[0] = 4; + m->buttons[27].shift[0] = 4; + m->buttons[28].shift[0] = 4; + m->buttons[29].shift[0] = 4; + } +} + +static void cheatmenu_cb(void) +{ + int i; + int yoffset = 108; + gui_image bar_over; + gui_image star; + char temp[MAX_DESC_LENGTH]; + + /* Initialize textures */ + bar_over.texture = gxTextureOpenPNG(Overlay_bar_png,0); + star.texture = gxTextureOpenPNG(Star_full_png,0); + + /* Draw browser array */ + gxDrawRectangle(15, 108, 358, 26, 127, (GXColor)BG_COLOR_1); + gxDrawRectangle(15, 134, 358, 26, 127, (GXColor)BG_COLOR_2); + gxDrawRectangle(15, 160, 358, 26, 127, (GXColor)BG_COLOR_1); + gxDrawRectangle(15, 186, 358, 26, 127, (GXColor)BG_COLOR_2); + gxDrawRectangle(15, 212, 358, 26, 127, (GXColor)BG_COLOR_1); + gxDrawRectangle(15, 238, 358, 26, 127, (GXColor)BG_COLOR_2); + gxDrawRectangle(15, 264, 358, 26, 127, (GXColor)BG_COLOR_1); + gxDrawRectangle(15, 290, 358, 26, 127, (GXColor)BG_COLOR_2); + gxDrawRectangle(15, 316, 358, 26, 127, (GXColor)BG_COLOR_1); + gxDrawRectangle(15, 342, 358, 26, 127, (GXColor)BG_COLOR_2); + + /* Draw Cheat list */ + for (i=0; ((offset + i) < maxcheats) && (i < 10); i++) + { + if (i == selection) + { + /* selection bar */ + gxDrawTexture(bar_over.texture,16,yoffset+1,356,24,255); + + /* cheat description need to be specifically handled */ + if (type) + { + /* check if text is being edited */ + if (menu_cheats.bg_images[6].state & IMAGE_VISIBLE) + { + /* adjust offset so that last characters are visible */ + string_offset += FONT_writeCenter(cheatlist[offset + i].text+string_offset,16,40,366,yoffset+21,(GXColor)WHITE); + } + else + { + /* scroll text (speed = 1/10 frame) */ + if ((string_offset/10) >= strlen(cheatlist[offset + i].text)) + { + string_offset = 0; + } + + if (string_offset) + { + sprintf(temp,"%s ",cheatlist[offset + i].text+string_offset/10); + strncat(temp, cheatlist[offset + i].text, string_offset/10); + } + else + { + strcpy(temp, cheatlist[offset + i].text); + } + + if (FONT_writeCenter(temp,16,40,366,yoffset+21,(GXColor)WHITE)) + { + /* scroll text if string does not fit */ + string_offset ++; + } + } + } + else + { + FONT_writeCenter(cheatlist[offset + i].code,18,40,366,yoffset+22,(GXColor)WHITE); + } + } + else + { + if (type) + { + FONT_writeCenter(cheatlist[offset + i].text,16,40,366,yoffset+21,(GXColor)WHITE); + } + else + { + FONT_writeCenter(cheatlist[offset + i].code,18,40,366,yoffset+22,(GXColor)WHITE); + } + } + + /* draw cheat enable mark */ + if (cheatlist[offset + i].enable) + { + gxDrawTexture(star.texture,20,yoffset+5,16,16,255); + } + + yoffset += 26; + } + + /* New Entry */ + if (i < 10) + { + if (i == selection) + { + /* selection bar */ + gxDrawTexture(bar_over.texture,16,yoffset+1,356,24,255); + + /* check if new code is being edited */ + if (menu_cheats.bg_images[6].state & IMAGE_VISIBLE) + { + FONT_writeCenter(cheatlist[offset + selection].code,18,40,366,yoffset+22,(GXColor)WHITE); + } + else + { + FONT_writeCenter("New Code",18,40,366,yoffset+22,(GXColor)WHITE); + } + } + else + { + FONT_writeCenter("New Code",18,40,366,yoffset+22,(GXColor)WHITE); + } + } + + gxTextureClose(&bar_over.texture); + gxTextureClose(&star.texture); + + /* Extra helpers */ + if (maxcheats && !(menu_cheats.bg_images[6].state & IMAGE_VISIBLE)) + { + /* switch between cheat code & description preview */ + gui_image key_switch; + key_switch.texture = gxTextureOpenPNG(Key_DPAD_png,0); +#ifdef HW_RVL + gxDrawTexture(key_switch.texture,268,424,24,24,255); + FONT_write(type ? "View\nCode":"View\nText",16,300,436,640,(GXColor)WHITE); +#else + gxDrawTexture(key_switch.texture,272,424,24,24,255); + FONT_write(type ? "View\nCode":"View\nText",16,304,436,640,(GXColor)WHITE); +#endif + gxTextureClose(&key_switch.texture); + + /* delete & enable cheats */ + if ((offset + selection) < maxcheats) + { + gui_image key_enable; + gui_image key_delete; + #ifdef HW_RVL + key_enable.texture = gxTextureOpenPNG(Key_Plus_wii_png,0); + key_delete.texture = gxTextureOpenPNG(Key_Minus_wii_png,0); + gxDrawTexture(key_enable.texture,152,424,24,24,255); + gxDrawTexture(key_delete.texture,372,424,24,24,255); + FONT_write(cheatlist[offset + selection].enable ? "Disable\nCheat":"Enable\nCheat",16,184,436,640,(GXColor)WHITE); + FONT_write("Delete\nCheat",16,404,436,640,(GXColor)WHITE); + #else + key_enable.texture = gxTextureOpenPNG(Key_L_gcn_png,0); + key_delete.texture = gxTextureOpenPNG(Key_R_gcn_png,0); + gxDrawTexture(key_enable.texture,136,426,44,20,255); + gxDrawTexture(key_delete.texture,368,426,44,20,255); + FONT_write(cheatlist[offset + selection].enable ? "Disable\nCheat":"Enable\nCheat",16,188,436,640,(GXColor)WHITE); + FONT_write("Delete\nCheat",16,420,436,640,(GXColor)WHITE); + #endif + gxTextureClose(&key_enable.texture); + gxTextureClose(&key_delete.texture); + } + } +} + + +/**************************************************************************** + * CheatMenu + * + * Manage cheats for the currently loaded game + * + ****************************************************************************/ +void CheatMenu(void) +{ + int i, update = 0; + int digit_cnt = 0; + int max = 0; + char temp[256]; + char *str = NULL; + gui_menu *m = &menu_cheats; + + /* clear existing ROM patches */ + clear_cheats(); + + /* reset scrolling */ + string_offset = 0; + + /* background overlay */ + if (config.bg_overlay) + { + bg_cheats[1].state |= IMAGE_VISIBLE; + } + else + { + bg_cheats[1].state &= ~IMAGE_VISIBLE; + } + + /* selected item */ + m->selected = selection; + + /* slide-in menu */ + GUI_InitMenu(m); + GUI_DrawMenuFX(m,30,0); + m->cb = cheatmenu_cb; + + /* lock background elements */ + m->bg_images[2].state &= ~IMAGE_SLIDE_TOP; + m->bg_images[3].state &= ~IMAGE_SLIDE_BOTTOM; + m->bg_images[4].state &= ~IMAGE_SLIDE_TOP; + + while (update != -1) + { + /* update arrows buttons */ + if (offset > 0) m->arrows[0]->state |= BUTTON_VISIBLE; + else m->arrows[0]->state &= ~BUTTON_VISIBLE; + if ((offset + 10) < (maxcheats + 1)) m->arrows[1]->state |= BUTTON_VISIBLE; + else m->arrows[1]->state &= ~BUTTON_VISIBLE; + + /* draw menu */ + GUI_DrawMenu(m); + + /* restore cheats offset */ + if (!(menu_cheats.bg_images[6].state & IMAGE_VISIBLE)) + { + m->offset = offset; + m->max_items = maxcheats + 1; + m->max_buttons = 10; + } + + /* update menu */ + update = GUI_UpdateMenu(m); + + /* update selected cheat */ + if ((m->selected < 10) && (selection != m->selected)) + { + selection = m->selected; + string_offset = 0; + } + + /* save offset then restore default */ + if (!(m->bg_images[6].state & IMAGE_VISIBLE)) + { + offset = m->offset; + m->offset = 0; + m->max_items = m->max_buttons = 30; + } + + + /* handle pressed buttons */ + if (update > 0) + { + switch (m->selected) + { + case 0: + case 1: + case 2: + case 3: + case 4: + case 5: + case 6: + case 7: + case 8: + case 9: /* Edit cheat */ + { + if (type && ((selection + offset) != maxcheats)) + { + /* cheat description */ + str = cheatlist[offset + selection].text; + strcpy(temp, str); + max = MAX_DESC_LENGTH - 2; + digit_cnt = strlen(str); + if (digit_cnt <= max) + { + str[digit_cnt] = '*'; + str[digit_cnt+1] = 0; + } + + /* init specific characters */ + m->items[10].text[0] = '6'; + m->items[27].text[0] = ' '; + strcpy(m->items[27].comment,"Add White Space"); + switch_chars(); + } + else + { + /* cheat code */ + str = cheatlist[offset + selection].code; + strcpy(temp, str); + if ((offset + selection) == maxcheats) + { + /* initialize code */ + max = 0; + digit_cnt = 0; + str[0] = '*'; + str[1] = 0; + } + else + { + /* code type */ + if (str[6] == ':') + { + /* Action Replay code */ + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + /* 16-bit code */ + max = 10; + } + else + { + /* 8-bit code */ + max = 8; + } + } + else if (str[4] == '-') + { + /* 16-bit Game Genie code */ + max = 8; + } + else + { + /* 8-bit Game Genie code */ + max = 10; + } + + /* set cursor to end of code */ + digit_cnt = max + 1; + } + + /* init specific characters */ + m->items[10].text[0] = 'G'; + m->items[27].text[0] = ':'; + strcpy(m->items[27].comment,"Add Code Separator"); + switch_chars(); + } + + /* show digit buttons */ + for (i=10; i<30; i++) m->buttons[i].state |= BUTTON_VISIBLE; + + /* show right window */ + m->bg_images[6].state |= IMAGE_VISIBLE; + + /* disable left buttons */ + for (i=0; i<10; i++) m->buttons[i].state &= ~BUTTON_ACTIVE; + + /* disable arrow buttons */ + m->arrows[0]->state &= ~BUTTON_ACTIVE; + m->arrows[1]->state &= ~BUTTON_ACTIVE; + + /* slide in right window */ + GUI_DrawMenuFX(m,20,0); + + /* update helper */ + strcpy(action_cancel.comment,"Cancel"); + + /* select first digit */ + m->selected = 10; + + /* reset scrolling */ + string_offset = 0; + break; + } + + case 26: /* Backspace */ + { + if (digit_cnt > 0) + { + /* delete last character */ + str[digit_cnt--] = 0; + + /* code separator is being deleted */ + if ((str[digit_cnt] == ':') || (str[digit_cnt] == '-')) + { + /* reset detected code type (except 8-bit Game Genie code using 2 separators) */ + if (((system_hw & SYSTEM_PBC) == SYSTEM_MD) || (digit_cnt != 7)) + { + max = 0; + } + } + + /* edit mark */ + str[digit_cnt] = '*'; + + /* update scroll value if necessary */ + if (string_offset > 0) string_offset--; + } + break; + } + + case 27: + { + if (type && ((offset + selection) != maxcheats)) + { + /* SPACE character */ + if (digit_cnt <= max) + { + str[digit_cnt++] = ' '; + str[digit_cnt] = 0; + if (digit_cnt <= max) + { + str[digit_cnt] = '*'; + str[digit_cnt+1] = 0; + } + } + } + else + { + /* Separator character */ + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + /* 16-bit codes */ + if (digit_cnt == 4) + { + /* Game Genie code */ + max = 8; + str[4] = '-'; + } + else if ((digit_cnt == 6) && (max != 8)) + { + /* Action Replay code */ + max = 10; + str[6] = ':'; + } + else + { + break; + } + } + else + { + /* 8-bit codes */ + if (digit_cnt == 3) + { + /* Game Genie code */ + max = 10; + str[3] = '-'; + } + else if ((digit_cnt == 7) && (max == 10)) + { + /* Game Genie code (last part) */ + str[7] = '-'; + } + else if ((digit_cnt == 6) && (max != 10)) + { + /* Action Replay code */ + max = 8; + str[6] = ':'; + } + else + { + break; + } + } + + digit_cnt++; + str[digit_cnt] = '*'; + str[digit_cnt+1] = 0; + } + break; + } + + case 28: /* Next character set */ + { + GUI_DrawMenuFX(m,40,1); + switch_chars(); + GUI_DrawMenuFX(m,40,0); + break; + } + + case 29: /* Validate entry */ + { + /* check if entry is valid */ + if (type && ((offset + selection) != maxcheats)) + { + str[digit_cnt] = 0; + update = -1; + } + else if (max && (digit_cnt > max)) + { + if (decode_cheat(cheatlist[offset + selection].code, offset + selection)) + { + /* new cheat ? */ + if ((offset + selection) == maxcheats) + { + /* increase cheat count */ + maxcheats++; + + /* enable cheat by default */ + cheatlist[offset + selection].enable = 1; + + /* no description by default */ + strcpy(cheatlist[offset + selection].text,"No Description"); + } + + /* return to cheat selection */ + update = -1; + } + else + { + GUI_WaitPrompt("Error", "Invalid Cheat Code"); + } + } + break; + } + + default: /* Add Character */ + { + /* force code separator if none has been set yet */ + if ((max == 0) && (digit_cnt == 6)) break; + + /* force 8-bit Game Genie code last separator */ + if (((system_hw & SYSTEM_PBC) != SYSTEM_MD) && (max == 10) && (digit_cnt == 7)) break; + + /* add character */ + if ((digit_cnt <= max) || (max == 0)) + { + str[digit_cnt++] = m->items[m->selected].text[0]; + str[digit_cnt] = 0; + if ((digit_cnt <= max) || (max == 0)) + { + str[digit_cnt] = '*'; + str[digit_cnt+1] = 0; + } + if (string_offset > 0) string_offset ++; + } + break; + } + } + } + else if (update < 0) + { + if (m->bg_images[6].state & IMAGE_VISIBLE) + { + /* Restore old entry */ + strcpy(str, temp); + } + } + else + { + if (maxcheats && !(m->bg_images[6].state & IMAGE_VISIBLE)) + { + if ((m_input.keys & PAD_BUTTON_LEFT) || (m_input.keys & PAD_BUTTON_RIGHT)) + { + /* Switch between cheat code & description */ + type ^= 1; + + /* reset scrolling */ + string_offset = 0; + } + + if ((offset + selection) < maxcheats) + { + /* Special inputs */ + if (m_input.keys & PAD_TRIGGER_R) + { + /* sort cheat list */ + for (i = offset + selection + 1; i < maxcheats; i++) + { + strcpy(cheatlist[i-1].text,cheatlist[i].text); + strcpy(cheatlist[i-1].code,cheatlist[i].code); + cheatlist[i-1].address = cheatlist[i].address; + cheatlist[i-1].data = cheatlist[i].data; + cheatlist[i-1].enable = cheatlist[i].enable; + } + + /* clear last cheat */ + cheatlist[maxcheats-1].text[0] = 0; + cheatlist[maxcheats-1].code[0] = 0; + cheatlist[maxcheats-1].address = 0; + cheatlist[maxcheats-1].data = 0; + cheatlist[maxcheats-1].enable = 0; + + /* disable last button */ + if ((maxcheats - offset) < 10) + { + m->buttons[maxcheats - offset].state &= ~BUTTON_ACTIVE; + m->buttons[maxcheats - offset - 1].shift[1] = 0; + } + + /* decrease cheat count */ + maxcheats--; + + /* reset scrolling */ + string_offset = 0; + } + else if (m_input.keys & PAD_TRIGGER_L) + { + /* cheat ON/OFF */ + cheatlist[offset + selection].enable ^= 1; + } + } + } + } + + if (update < 0) + { + if (m->bg_images[6].state & IMAGE_VISIBLE) + { + /* slide out right window */ + GUI_DrawMenuFX(m,20,1); + + /* hide digit buttons */ + for (i=10; i<30; i++) m->buttons[i].state &= ~BUTTON_VISIBLE; + + /* hide right window */ + m->bg_images[6].state &= ~IMAGE_VISIBLE; + + /* update left buttons */ + for (i=0; i<10; i++) + { + if ((offset + i) < maxcheats) + { + m->buttons[i].state |= BUTTON_ACTIVE; + m->buttons[i].shift[1] = 1; + } + else if ((offset + i) == maxcheats) + { + m->buttons[i].state |= BUTTON_ACTIVE; + m->buttons[i].shift[1] = 0; + } + else + { + m->buttons[i].state &= ~BUTTON_ACTIVE; + m->buttons[i].shift[1] = 0; + } + } + + /* enable arrow buttons */ + m->arrows[0]->state |= BUTTON_ACTIVE; + m->arrows[1]->state |= BUTTON_ACTIVE; + + /* restore helper */ + strcpy(action_cancel.comment,"Back"); + + /* select current cheat */ + m->selected = selection; + + /* stay in menu */ + update = 0; + } + } + } + + /* apply ROM patches */ + apply_cheats(); + + /* save cheats to file */ + sprintf(temp, "%s/cheats/%s.pat", DEFAULT_PATH, rom_filename); + + if (maxcheats) + { + /* open file */ + FILE *f = fopen(temp, "w"); + + /* write cheats */ + if (f) + { + for (i=0; ibg_images[2].state |= IMAGE_SLIDE_TOP; + m->bg_images[3].state |= IMAGE_SLIDE_BOTTOM; + m->bg_images[4].state |= IMAGE_SLIDE_TOP; + + /* leave menu */ + m->cb = NULL; + GUI_DeleteMenu(m); + GUI_DrawMenuFX(m,30,1); +} + + +/**************************************************************************** + * CheatLoad + * + * Load cheats from associated .pat file, called when loading a new game + * ROM patches are automatically applied. + * RAM patches are applied once per frame. + * + ****************************************************************************/ +void CheatLoad(void) +{ + int len; + int cnt = 0; + char temp[256]; + + /* reset cheat count */ + maxcheats = 0; + + /* make cheat filename */ + sprintf(temp, "%s/cheats/%s.pat", DEFAULT_PATH, rom_filename); + + /* open file */ + FILE *f = fopen(temp, "r"); + if (f) + { + /* clear string */ + memset(temp, 0, 256); + + /* read cheats from file (one line per cheat) */ + while (fgets(temp, 256, f) && (maxcheats < MAX_CHEATS) && (cnt < MAX_CHEATS)) + { + /* remove CR & EOL chars */ + if ((temp[strlen(temp) - 2] == 0x0d) || (temp[strlen(temp) - 2] == 0x0a)) temp[strlen(temp) - 2] = 0; + else temp[strlen(temp) - 1] = 0; + + /* check cheat validty */ + len = decode_cheat(temp, maxcheats); + + if (len) + { + /* copy cheat code */ + strncpy(cheatlist[maxcheats].code, temp, len); + cheatlist[maxcheats].code[len] = 0; + len++; + + /* jump TAB and SPACE characters */ + while ((temp[len] == 0x20) || (temp[len] == 0x09)) len++; + + /* copy cheat description */ + strncpy(cheatlist[maxcheats].text, &temp[len], MAX_DESC_LENGTH - 1); + cheatlist[maxcheats].text[MAX_DESC_LENGTH - 1] = 0; + + /* increment cheat count */ + maxcheats++; + } + else if (!strcmp(temp,"ON") && config.autocheat) + { + /* enable flag */ + cheatlist[cnt++].enable = 1; + } + else if (!strcmp(temp,"OFF") && config.autocheat) + { + /* disable flag */ + cheatlist[cnt++].enable = 0; + } + } + + /* by default, disable cheats that were not flagged */ + while (cnt < maxcheats) cheatlist[cnt++].enable = 0; + + /* close file */ + fclose(f); + } + + /* apply ROM patches */ + apply_cheats(); + + /* adjust menu buttons */ + for (cnt=0; cnt<10; cnt++) + { + if (cnt < maxcheats) + { + menu_cheats.buttons[cnt].state |= BUTTON_ACTIVE; + menu_cheats.buttons[cnt].shift[1] = 1; + } + else if (cnt == maxcheats) + { + menu_cheats.buttons[cnt].state |= BUTTON_ACTIVE; + menu_cheats.buttons[cnt].shift[1] = 0; + } + else + { + menu_cheats.buttons[cnt].shift[1] = 0; + menu_cheats.buttons[cnt].state &= ~BUTTON_ACTIVE; + } + } + + /* reset menu */ + selection = offset = 0; +} + +/**************************************************************************** + * RAMCheatUpdate + * + * Apply RAM patches (this should be called once per frame) + * + ****************************************************************************/ +void RAMCheatUpdate(void) +{ + int index, cnt = maxRAMcheats; + + while (cnt) + { + /* get cheat index */ + index = cheatIndexes[--cnt]; + + /* apply RAM patch */ + if (cheatlist[index].data & 0xFF00) + { + /* word patch */ + *(u16 *)(work_ram + (cheatlist[index].address & 0xFFFE)) = cheatlist[index].data; + } + else + { + /* byte patch */ + work_ram[cheatlist[index].address & 0xFFFF] = cheatlist[index].data; + } + } +} + + +/**************************************************************************** + * ROMCheatUpdate + * + * Apply ROM patches (this should be called each time banking is changed) + * + ****************************************************************************/ +void ROMCheatUpdate(void) +{ + int index, cnt = maxROMcheats; + u8 *ptr; + + while (cnt) + { + /* get cheat index */ + index = cheatIndexes[MAX_CHEATS - cnt]; + + /* check if previous banked ROM address was patched */ + if (cheatlist[index].prev != NULL) + { + /* restore original data */ + *cheatlist[index].prev = cheatlist[index].old; + + /* no more patched ROM address */ + cheatlist[index].prev = NULL; + } + + /* get current banked ROM address */ + ptr = &z80_readmap[(cheatlist[index].address) >> 10][cheatlist[index].address & 0x03FF]; + + /* check if reference matches original ROM data */ + if (((u8)cheatlist[index].old) == *ptr) + { + /* patch data */ + *ptr = cheatlist[index].data; + + /* save patched ROM address */ + cheatlist[index].prev = ptr; + } + + /* next ROM patch */ + cnt--; + } +} diff --git a/genplus-gx/gx/gui/cheats.h b/genplus-gx/gx/gui/cheats.h new file mode 100644 index 0000000000..e6759a6a8a --- /dev/null +++ b/genplus-gx/gx/gui/cheats.h @@ -0,0 +1,50 @@ +/* + * cheats.c + * + * Cheats menu + * + * Copyright Eke-Eke (2010-2012) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _CHEATS_H +#define _CHEATS_H + +#define CHEATS_UPDATE() ROMCheatUpdate() + +extern void CheatMenu(void); +extern void CheatLoad(void); +extern void RAMCheatUpdate(void); +extern void ROMCheatUpdate(void); + +#endif diff --git a/genplus-gx/gx/gui/filesel.c b/genplus-gx/gx/gui/filesel.c new file mode 100644 index 0000000000..0ed07a0c4c --- /dev/null +++ b/genplus-gx/gx/gui/filesel.c @@ -0,0 +1,645 @@ +/* + * filesel.c + * + * ROM File Browser + * + * Copyright Eke-Eke (2009-2013) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "filesel.h" +#include "font.h" +#include "gui.h" +#include "file_load.h" +#include "history.h" + +#define BG_COLOR_1 {0x49,0x49,0x49,0xff} +#define BG_COLOR_2 {0x66,0x66,0x66,0xff} + +#define SCROLL_SPEED 10 + +extern const u8 Browser_dir_png[]; +extern const u8 Snap_empty_png[]; +extern const u8 Cart_md_png[]; +extern const u8 Cart_ms_png[]; +extern const u8 Cart_gg_png[]; +extern const u8 Cart_sg_png[]; + +FILEENTRIES filelist[MAXFILES]; + +static int offset = 0; +static int selection = 0; +static int maxfiles = 0; +static int string_offset = 0; +static char prev_folder[MAXJOLIET]; +static void selector_cb(void); + +/*****************************************************************************/ +/* GUI Buttons data */ +/*****************************************************************************/ +static butn_data arrow_up_data = +{ + {NULL,NULL}, + {Button_up_png,Button_up_over_png} +}; + +static butn_data arrow_down_data = +{ + {NULL,NULL}, + {Button_down_png,Button_down_over_png} +}; + +/*****************************************************************************/ +/* GUI Arrows button */ +/*****************************************************************************/ + +static gui_butn arrow_up = {&arrow_up_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX,{0,0,0,0},14,76,360,32}; +static gui_butn arrow_down = {&arrow_down_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX,{0,0,0,0},14,368,360,32}; + +/*****************************************************************************/ +/* GUI helpers */ +/*****************************************************************************/ +static gui_item action_cancel = +{ + NULL,Key_B_png,"","Previous Directory",10,422,28,28 +}; + +static gui_item action_select = +{ + NULL,Key_A_png,"","Load ROM file",602,422,28,28 +}; + +/*****************************************************************************/ +/* GUI Background images */ +/*****************************************************************************/ +static gui_image bg_filesel[14] = +{ + {NULL,Bg_layer_png,IMAGE_VISIBLE|IMAGE_REPEAT,0,0,640,480,255}, + {NULL,Bg_overlay_png,IMAGE_VISIBLE|IMAGE_REPEAT,0,0,640,480,255}, + {NULL,Banner_top_png,IMAGE_VISIBLE,0,0,640,108,255}, + {NULL,Banner_bottom_png,IMAGE_VISIBLE,0,380,640,100,255}, + {NULL,Main_logo_png,IMAGE_VISIBLE,466,40,152,44,255}, + {NULL,Frame_s1_png,IMAGE_VISIBLE,8,70,372,336,152}, + {NULL,Frame_s2_png,0,384,264,248,140,152}, + {NULL,Snap_empty_png,IMAGE_VISIBLE,424,148,160,112,255}, + {NULL,NULL,0,424,148,160,112,255}, + {NULL,NULL,0,388,147,240,152,255}, + {NULL,NULL,0,388,147,240,152,255}, + {NULL,NULL,0,392,118,232,148,255}, + {NULL,NULL,0,414,116,184,188,255}, + {NULL,NULL,0,416,144,180,228,255} +}; + +static const u8 *Cart_png[FILETYPE_MAX] = +{ + Cart_md_png, + Cart_md_png, + Cart_ms_png, + Cart_gg_png, + Cart_sg_png +}; + +static const char *Cart_dir[FILETYPE_MAX] = +{ + "md", + "cd", + "ms", + "gg", + "sg" +}; + +/*****************************************************************************/ +/* GUI Descriptor */ +/*****************************************************************************/ +static gui_menu menu_selector = +{ + "Game Selection", + -1,-1, + 0,0,14,0, + NULL, + NULL, + bg_filesel, + {&action_cancel, &action_select}, + {&arrow_up,&arrow_down}, + selector_cb +}; + + +static void selector_cb(void) +{ + int i; + char text[MAXPATHLEN]; + int yoffset = 108; + + /* Initialize directory icon */ + gui_image dir_icon; + dir_icon.texture = gxTextureOpenPNG(Browser_dir_png,0); + dir_icon.w = dir_icon.texture->width; + dir_icon.h = dir_icon.texture->height; + dir_icon.x = 26; + dir_icon.y = (26 - dir_icon.h)/2; + + /* Initialize selection bar */ + gui_image bar_over; + bar_over.texture = gxTextureOpenPNG(Overlay_bar_png,0); + bar_over.w = bar_over.texture->width; + bar_over.h = bar_over.texture->height; + bar_over.x = 16; + bar_over.y = (26 - bar_over.h)/2; + + /* Draw browser array */ + gxDrawRectangle(15, 108, 358, 26, 127, (GXColor)BG_COLOR_1); + gxDrawRectangle(15, 134, 358, 26, 127, (GXColor)BG_COLOR_2); + gxDrawRectangle(15, 160, 358, 26, 127, (GXColor)BG_COLOR_1); + gxDrawRectangle(15, 186, 358, 26, 127, (GXColor)BG_COLOR_2); + gxDrawRectangle(15, 212, 358, 26, 127, (GXColor)BG_COLOR_1); + gxDrawRectangle(15, 238, 358, 26, 127, (GXColor)BG_COLOR_2); + gxDrawRectangle(15, 264, 358, 26, 127, (GXColor)BG_COLOR_1); + gxDrawRectangle(15, 290, 358, 26, 127, (GXColor)BG_COLOR_2); + gxDrawRectangle(15, 316, 358, 26, 127, (GXColor)BG_COLOR_1); + gxDrawRectangle(15, 342, 358, 26, 127, (GXColor)BG_COLOR_2); + + /* Draw Files list */ + for (i = offset; (i < (offset + 10)) && (i < maxfiles); i++) + { + if (i == selection) + { + /* selection bar */ + gxDrawTexture(bar_over.texture,bar_over.x,yoffset+bar_over.y,bar_over.w,bar_over.h,255); + + /* scrolling text */ + if ((string_offset/SCROLL_SPEED) >= strlen(filelist[i].filename)) + { + string_offset = 0; + } + + if (string_offset) + { + sprintf(text,"%s ",filelist[i].filename+string_offset/SCROLL_SPEED); + strncat(text, filelist[i].filename, string_offset/SCROLL_SPEED); + } + else + { + strcpy(text, filelist[i].filename); + } + + /* print text */ + if (filelist[i].flags) + { + /* directory icon */ + gxDrawTexture(dir_icon.texture,dir_icon.x,yoffset+dir_icon.y,dir_icon.w,dir_icon.h,255); + if (FONT_write(text,18,dir_icon.x+dir_icon.w+6,yoffset+22,bar_over.w-dir_icon.w-26,(GXColor)WHITE)) + { + /* text scrolling */ + string_offset ++; + } + } + else + { + if (FONT_write(text,18,dir_icon.x,yoffset+22,bar_over.w-20,(GXColor)WHITE)) + { + /* text scrolling */ + string_offset ++; + } + } + } + else + { + if (filelist[i].flags) + { + /* directory icon */ + gxDrawTexture(dir_icon.texture,dir_icon.x,yoffset+dir_icon.y,dir_icon.w,dir_icon.h,255); + FONT_write(filelist[i].filename,18,dir_icon.x+dir_icon.w+6,yoffset+22,bar_over.w-dir_icon.w-26,(GXColor)WHITE); + } + else + { + FONT_write(filelist[i].filename,18,dir_icon.x,yoffset+22,bar_over.w-20,(GXColor)WHITE); + } + } + + yoffset += 26; + } + + gxTextureClose(&bar_over.texture); + gxTextureClose(&dir_icon.texture); +} + + +/**************************************************************************** + * FileSelector + * + * Browse directories and select a file from the file listing + * return ROM size + * + ****************************************************************************/ +int FileSelector(int type) +{ + short p; + int i; + int old = -1; + char fname[MAXPATHLEN]; + FILE *snap; + gui_menu *m = &menu_selector; + +#ifdef HW_RVL + int x,y; + gui_butn *button; +#endif + + /* Background overlay */ + if (config.bg_overlay) + { + bg_filesel[1].state |= IMAGE_VISIBLE; + } + else + { + bg_filesel[1].state &= ~IMAGE_VISIBLE; + } + + /* Hide all cartridge labels */ + for (i=0; i select all cartridge type */ + for (i=0; i variable game types */ + if (type < 0) + { + /* hide all cartridge labels */ + for (i=0; i 0) && (fname[i] != '.')) i--; + if (i > 0) fname[i] = 0; + + /* add PNG file extension */ + strcat(fname, ".png"); + + /* try to load screenshot file */ + snap = fopen(fname, "rb"); + if (snap) + { + bg_filesel[8].texture = gxTextureOpenPNG(0,snap); + if (bg_filesel[8].texture) + { + bg_filesel[8].state |= IMAGE_VISIBLE; + } + fclose(snap); + } + } + } + + /* update helper */ + if (m->selected != -1) + { + /* out of focus */ + strcpy(action_select.comment,""); + } + else if (filelist[selection].flags) + { + /* this is a directory */ + strcpy(action_select.comment,"Open Directory"); + } + else + { + /* this is a ROM file */ + strcpy(action_select.comment,"Load File"); + } + + /* Draw menu*/ + GUI_DrawMenu(m); + +#ifdef HW_RVL + if (Shutdown) + { + gxTextureClose(&w_pointer); + GUI_DeleteMenu(m); + GUI_FadeOut(); + shutdown(); + SYS_ResetSystem(SYS_POWEROFF, 0, 0); + } + else if (m_input.ir.valid) + { + /* get cursor position */ + x = m_input.ir.x; + y = m_input.ir.y; + + /* draw wiimote pointer */ + gxDrawTextureRotate(w_pointer, x-w_pointer->width/2, y-w_pointer->height/2, w_pointer->width, w_pointer->height,m_input.ir.angle,255); + + /* ensure we are in the selectable area */ + if ((x < 380) && (y >= 108) && (y <= 368)) + { + /* find selected item */ + selection = (y - 108) / 26; + if (selection > 9) selection = 9; + selection += offset; + if (selection >= maxfiles) selection = old; + + /* reset selection */ + m->selected = -1; + } + else + { + /* disable selection */ + m->selected = m->max_buttons + 2; + + /* find selected button */ + for (i=0; i<2; i++) + { + button = m->arrows[i]; + if (button) + { + if (button->state & BUTTON_VISIBLE) + { + if ((x>=button->x)&&(x<=(button->x+button->w))&&(y>=button->y)&&(y<=(button->y+button->h))) + { + m->selected = m->max_buttons + i; + break; + } + } + } + } + } + } + else + { + /* reset selection */ + m->selected = -1; + } +#endif + + /* copy EFB to XFB */ + gxSetScreen(); + + p = m_input.keys; + + /* highlight next item */ + if (p & PAD_BUTTON_DOWN) + { + selection++; + if (selection == maxfiles) + selection = offset = 0; + if ((selection - offset) >= 10) + offset += 10; + } + + /* highlight previous item */ + else if (p & PAD_BUTTON_UP) + { + selection--; + if (selection < 0) + { + selection = maxfiles - 1; + offset = maxfiles - 10; + } + if (selection < offset) + offset -= 10; + if (offset < 0) + offset = 0; + } + + /* go back one page */ + else if (p & (PAD_TRIGGER_L | PAD_BUTTON_LEFT)) + { + if (maxfiles >= 10) + { + selection -= 10; + if (selection < 0) + { + selection = offset = 0; + } + else if (selection < offset) + { + offset -= 10; + if (offset < 0) offset = 0; + } + } + } + + /* go forward one page */ + else if (p & (PAD_TRIGGER_R | PAD_BUTTON_RIGHT)) + { + if (maxfiles >= 10) + { + selection += 10; + if (selection > maxfiles - 1) + { + /* last page */ + selection = maxfiles - 1; + offset = maxfiles - 10; + } + else if (selection >= (offset + 10)) + { + /* next page */ + offset += 10; + if (offset > (maxfiles - 10)) offset = maxfiles - 10; + } + } + } + + /* quit */ + else if (p & PAD_TRIGGER_Z) + { + GUI_DeleteMenu(m); + return 0; + } + + /* previous directory */ + else if (p & PAD_BUTTON_B) + { + string_offset = 0; + + /* update browser directory (and get current folder)*/ + if (UpdateDirectory(1, prev_folder)) + { + /* get directory entries */ + maxfiles = ParseDirectory(); + + /* clear selection by default */ + selection = offset = 0; + old = -1; + + /* select previous directory */ + for (i=0; i= (offset + 10)) + { + offset += 10; + if (offset > (maxfiles - 10)) offset = maxfiles - 10; + } + break; + } + } + } + else + { + /* exit */ + GUI_DeleteMenu(m); + return 0; + } + } + + /* open selected file or directory */ + else if (p & PAD_BUTTON_A) + { + string_offset = 0; + + /* ensure we are in focus area */ + if (m->selected < m->max_buttons) + { + if (filelist[selection].flags) + { + /* get new directory */ + UpdateDirectory(0, filelist[selection].filename); + + /* get directory entries */ + maxfiles = ParseDirectory(); + + /* clear selection by default */ + selection = offset = 0; + old = -1; + } + else + { + /* load ROM file from device */ + int ret = LoadFile(selection); + + /* exit menu */ + GUI_DeleteMenu(m); + + /* return ROM size (or zero if an error occured) */ + return ret; + } + } + +#ifdef HW_RVL + /* arrow buttons selected */ + else if (m->selected == m->max_buttons) + { + /* up arrow */ + selection--; + if (selection < 0) + { + selection = maxfiles - 1; + offset = selection - 10 + 1; + } + if (selection < offset) offset -= 10; + if (offset < 0) offset = 0; + } + else if (m->selected == (m->max_buttons+1)) + { + /* down arrow */ + selection++; + if (selection == maxfiles) + selection = offset = 0; + if ((selection - offset) >= 10) + offset += 10; + } +#endif + } + } +} + +void ClearSelector(u32 max) +{ + maxfiles = max; + offset = 0; + selection = 0; +} diff --git a/genplus-gx/gx/gui/filesel.h b/genplus-gx/gx/gui/filesel.h new file mode 100644 index 0000000000..213e304f69 --- /dev/null +++ b/genplus-gx/gx/gui/filesel.h @@ -0,0 +1,58 @@ +/* + * filesel.c + * + * ROM File Browser + * + * Copyright Eke-Eke (2009-2013) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _FILESEL_H +#define _FILESEL_H + +#define MAXJOLIET 256 +#define MAXFILES 1000 + +/* Filelist structure */ +typedef struct +{ + u8 flags; + char filename[MAXJOLIET]; +}FILEENTRIES; + +/* Globals */ +extern int FileSelector(int type); +extern void ClearSelector(u32 max); +extern FILEENTRIES filelist[MAXFILES]; + +#endif diff --git a/genplus-gx/gx/gui/font.c b/genplus-gx/gx/gui/font.c new file mode 100644 index 0000000000..36582147e1 --- /dev/null +++ b/genplus-gx/gx/gui/font.c @@ -0,0 +1,400 @@ +/***************************************************************************** + * font.c + * + * IPL font engine (using GX rendering) + * + * Copyright Eke-Eke (2009-2013) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "font.h" + +#define _SHIFTR(v, s, w) \ + ((u32)(((u32)(v) >> (s)) & ((0x01 << (w)) - 1))) + +typedef struct _yay0header { + unsigned int id ATTRIBUTE_PACKED; + unsigned int dec_size ATTRIBUTE_PACKED; + unsigned int links_offset ATTRIBUTE_PACKED; + unsigned int chunks_offset ATTRIBUTE_PACKED; +} yay0header; + +static u8 *fontImage; +static u8 *fontTexture; +static void *ipl_fontarea; +static sys_fontheader *fontHeader; +static u8 font_size[256]; + +#ifndef HW_RVL + +/* disable Qoob Modchip before IPL access (emukiddid) */ +static void ipl_set_config(unsigned char c) +{ + volatile unsigned long* exi = (volatile unsigned long*)0xCC006800; + unsigned long val,addr; + addr=0xc0000000; + val = c << 24; + exi[0] = ((((exi[0]) & 0x405) | 256) | 48); //select IPL + //write addr of IPL + exi[0 * 5 + 4] = addr; + exi[0 * 5 + 3] = ((4 - 1) << 4) | (1 << 2) | 1; + while (exi[0 * 5 + 3] & 1); + //write the ipl we want to send + exi[0 * 5 + 4] = val; + exi[0 * 5 + 3] = ((4 - 1) << 4) | (1 << 2) | 1; + while (exi[0 * 5 + 3] & 1); + exi[0] &= 0x405; //deselect IPL +} + +#endif + +static void decode_szp(void *src,void *dest) +{ + u32 i,k,link; + u8 *dest8,*tmp; + u32 loff,coff,roff; + u32 size,cnt,cmask,bcnt; + yay0header *header; + + dest8 = (u8*)dest; + header = (yay0header*)src; + size = header->dec_size; + loff = header->links_offset; + coff = header->chunks_offset; + + roff = sizeof(yay0header); + cmask = 0; + cnt = 0; + bcnt = 0; + + do { + if(!bcnt) { + cmask = *(u32*)(src+roff); + roff += 4; + bcnt = 32; + } + + if(cmask&0x80000000) { + dest8[cnt++] = *(u8*)(src+coff); + coff++; + } else { + link = *(u16*)(src+loff); + loff += 2; + + tmp = dest8+(cnt-(link&0x0fff)-1); + k = link>>12; + if(k==0) { + k = (*(u8*)(src+coff))+18; + coff++; + } else k += 2; + + for(i=0;isheet_format==0x0000) { + cnt = (sys_fontdata->sheet_fullsize/2)-1; + + while(cnt>=0) { + idx = _SHIFTR(src[cnt],6,2); + val1 = data[idx]; + + idx = _SHIFTR(src[cnt],4,2); + val2 = data[idx]; + + dest[(cnt<<1)+0] =((val1&0xf0)|(val2&0x0f)); + + idx = _SHIFTR(src[cnt],2,2); + val1 = data[idx]; + + idx = _SHIFTR(src[cnt],0,2); + val2 = data[idx]; + + dest[(cnt<<1)+1] =((val1&0xf0)|(val2&0x0f)); + + cnt--; + } + } + DCStoreRange(dest,sys_fontdata->sheet_fullsize); +} + +static void GetFontTexel(s32 c,void *image,s32 pos,s32 stride) +{ + u32 sheets,rem; + u32 xoff,yoff; + u32 xpos,ypos; + u8 *img_start; + u8 *ptr1,*ptr2; + sys_fontheader *sys_fontdata = fontHeader; + + if(cfirst_char || c>sys_fontdata->last_char) c = sys_fontdata->inval_char; + else c -= sys_fontdata->first_char; + + sheets = sys_fontdata->sheet_column*sys_fontdata->sheet_row; + rem = c%sheets; + sheets = c/sheets; + xoff = (rem%sys_fontdata->sheet_column)*sys_fontdata->cell_width; + yoff = (rem/sys_fontdata->sheet_column)*sys_fontdata->cell_height; + img_start = fontImage+(sys_fontdata->sheet_size*sheets); + + ypos = 0; + while(yposcell_height) { + xpos = 0; + while(xposcell_width) { + ptr1 = img_start+(((sys_fontdata->sheet_width/8)<<5)*((ypos+yoff)/8)); + ptr1 = ptr1+(((xpos+xoff)/8)<<5); + ptr1 = ptr1+(((ypos+yoff)%8)<<2); + ptr1 = ptr1+(((xpos+xoff)%8)/2); + + ptr2 = image+((ypos/8)*(((stride<<1)/8)<<5)); + ptr2 = ptr2+(((xpos+pos)/8)<<5); + ptr2 = ptr2+(((xpos+pos)%8)/2); + ptr2 = ptr2+((ypos%8)<<2); + + *ptr2 = *ptr1; + + xpos += 2; + } + ypos++; + } +} + +static void DrawChar(unsigned char c, int xpos, int ypos, int size, GXColor color) +{ + /* reintialize texture object */ + GXTexObj texobj; + GX_InitTexObj(&texobj, fontTexture, fontHeader->cell_width, fontHeader->cell_height, GX_TF_I4, GX_CLAMP, GX_CLAMP, GX_FALSE); + GX_LoadTexObj(&texobj, GX_TEXMAP0); + + /* reinitialize font texture data */ + memset(fontTexture,0,fontHeader->cell_width * fontHeader->cell_height / 2); + GetFontTexel(c,fontTexture,0,fontHeader->cell_width/2); + DCFlushRange(fontTexture, fontHeader->cell_width * fontHeader->cell_height / 2); + GX_InvalidateTexAll(); + + /* adjust texture width */ + s32 width = (fontHeader->cell_width * size * vmode->fbWidth) / (fontHeader->cell_height * vmode->viWidth); + + /* adjust texture height */ + size = (size * vmode->efbHeight) / 480; + + /* GX rendering */ + GX_Begin(GX_QUADS, GX_VTXFMT0, 4); + GX_Position2s16(xpos, ypos - size); + GX_Color4u8(color.r, color.g, color.b, 0xff); + GX_TexCoord2f32(0.0, 0.0); + GX_Position2s16(xpos + width, ypos - size); + GX_Color4u8(color.r, color.g, color.b, 0xff); + GX_TexCoord2f32(1.0, 0.0); + GX_Position2s16(xpos + width, ypos); + GX_Color4u8(color.r, color.g, color.b, 0xff); + GX_TexCoord2f32(1.0, 1.0); + GX_Position2s16(xpos, ypos); + GX_Color4u8(color.r, color.g, color.b, 0xff); + GX_TexCoord2f32(0.0, 1.0); + GX_End(); + GX_DrawDone(); +} + +/**************************************************************************** + * IPL font support + * + ****************************************************************************/ +extern void __SYS_ReadROM(void *buf,u32 len,u32 offset); + +int FONT_Init(void) +{ +#ifndef HW_RVL + /* --- Game Cube --- disable Qoob before accessing IPL */ + ipl_set_config(6); +#endif + + /* read IPL font (ASCII) from Mask ROM */ + ipl_fontarea = memalign(32,131360); + if (!ipl_fontarea) + return 0; + memset(ipl_fontarea,0,131360); + __SYS_ReadROM(ipl_fontarea+119072,12288,0x1FCF00); + + /* YAY0 decompression */ + decode_szp(ipl_fontarea+119072,ipl_fontarea); + + /* retrieve IPL font data */ + fontHeader = (sys_fontheader*)ipl_fontarea; + fontImage = (u8*)((((u32)ipl_fontarea+fontHeader->sheet_image)+31)&~31); + + /* expand to I4 format */ + expand_font((u8*)ipl_fontarea+fontHeader->sheet_image,fontImage); + + /* character width table */ + int i,c; + for (i=0; i<256; ++i) + { + if ((i < fontHeader->first_char) || (i > fontHeader->last_char)) + c = fontHeader->inval_char; + else + c = i - fontHeader->first_char; + + font_size[i] = ((u8*)fontHeader)[fontHeader->width_table + c]; + } + + /* initialize texture data */ + fontTexture = memalign(32, fontHeader->cell_width * fontHeader->cell_height / 2); + if (!fontTexture) + { + free(ipl_fontarea); + return 0; + } + + return 1; +} + +void FONT_Shutdown(void) +{ + if (fontHeader) + free(ipl_fontarea); + if (fontTexture) + free(fontTexture); +} + +int FONT_write(char *string, int size, int x, int y, int max_width, GXColor color) +{ + int w, ox; + + x -= (vmode->fbWidth / 2); + y -= (vmode->efbHeight / 2); + + ox = x; + + while (*string) + { + if (*string == '\n') + { + x = ox; + y += size; + } + else + { + w = (font_size[(u8)*string] * size * vmode->fbWidth) / (fontHeader->cell_height * vmode->viWidth); + if ((x + w) > (ox + max_width)) return strlen(string); + DrawChar(*string, x, y, size,color); + x += w; + } + string++; + } + + return 0; +} + +int FONT_writeCenter(char *string, int size, int x1, int x2, int y, GXColor color) +{ + int x; + int i = 0; + int w = 0; + + while (string[i] && (string[i] != '\n')) + { + w += (font_size[(u8)string[i++]] * size * vmode->fbWidth) / (fontHeader->cell_height * vmode->viWidth); + } + + if ((x1 + w) > x2) w = x2 - x1; + x = x1 + (x2 - x1 - w - vmode->fbWidth) / 2; + x2 -= (vmode->fbWidth / 2); + y -= (vmode->efbHeight / 2); + + while (*string && (*string != '\n')) + { + w = (font_size[(u8)*string] * size * vmode->fbWidth) / (fontHeader->cell_height * vmode->viWidth); + if ((x + w) > x2) return strlen(string); + DrawChar(*string, x, y, size,color); + x += w; + string++; + } + + if (*string == '\n') + { + string++; + return FONT_writeCenter(string, size, x1, x2 + (vmode->fbWidth / 2), y + size + (vmode->efbHeight / 2), color); + } + + return 0; +} + +int FONT_alignRight(char *string, int size, int x, int y, GXColor color) +{ + int ox; + int i = 0; + int w = 0; + + while (string[i] && (string[i] != '\n')) + { + w += (font_size[(u8)string[i++]] * size * vmode->fbWidth) / (fontHeader->cell_height * vmode->viWidth); + } + + x -= (vmode->fbWidth / 2); + y -= (vmode->efbHeight / 2); + + ox = x; + x -= w; + + while (*string && (*string != '\n')) + { + w = (font_size[(u8)*string] * size * vmode->fbWidth) / (fontHeader->cell_height * vmode->viWidth); + if ((x + w) > ox) return strlen(string); + DrawChar(*string, x, y, size,color); + x += w; + string++; + } + + if (*string == '\n') + { + string++; + return FONT_alignRight(string, size, ox + (vmode->fbWidth / 2), y + size + (vmode->efbHeight / 2), color); + } + + return 0; +} diff --git a/genplus-gx/gx/gui/font.h b/genplus-gx/gx/gui/font.h new file mode 100644 index 0000000000..8f516558af --- /dev/null +++ b/genplus-gx/gx/gui/font.h @@ -0,0 +1,49 @@ +/***************************************************************************** + * font.c + * + * IPL font engine (using GX rendering) + * + * Copyright Eke-Eke (2009-2013) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _FONT_H +#define _FONT_H + +extern int FONT_Init(void); +extern void FONT_Shutdown(void); +extern int FONT_write(char *string, int size, int x, int y, int max_width, GXColor color); +extern int FONT_writeCenter(char *string, int size, int x1, int x2, int y, GXColor color); +extern int FONT_alignRight(char *string, int size, int x, int y, GXColor color); + +#endif diff --git a/genplus-gx/gx/gui/gui.c b/genplus-gx/gx/gui/gui.c new file mode 100644 index 0000000000..21fc49065e --- /dev/null +++ b/genplus-gx/gx/gui/gui.c @@ -0,0 +1,1968 @@ +/**************************************************************************** + * gui.c + * + * generic GUI Engine (using GX rendering) + * + * Copyright Eke-Eke (2009-2010) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "gui.h" +#include "font.h" + +#ifdef HW_RVL +gx_texture *w_pointer; +#endif + +u8 SILENT = 0; + +/* message box */ +static gui_message message_box; +static lwp_t msgboxthread; + +/* background color (black) */ +static const GXColor bg_color = {0x00,0x00,0x00,0xff}; + +/****************************************************************************/ +/* Generic GUI routines */ +/*****************************************************************************/ + +/* Allocate Menu texture images data */ +void GUI_InitMenu(gui_menu *menu) +{ + int i; + gui_item *item; + gui_butn *button; + gui_image *image; + + /* background elements */ + for (i=0; imax_images; i++) + { + image = &menu->bg_images[i]; + image->texture = gxTextureOpenPNG(image->data,0); + } + + for (i=0; i<2; i++) + { + /* key helpers */ + item = menu->helpers[i]; + if (item) + item->texture = gxTextureOpenPNG(item->data,0); + + /* arrows */ + button = menu->arrows[i]; + if (button) + { + if (!button->data->texture[0]) + button->data->texture[0] = gxTextureOpenPNG(button->data->image[0],0); + if (!button->data->texture[1]) + button->data->texture[1] = gxTextureOpenPNG(button->data->image[1],0); + + /* initial state */ + button->state &= ~BUTTON_VISIBLE; + if (((i==0) && (menu->offset != 0)) || ((i==1) && (menu->offset + menu->max_buttons) < menu->max_items)) + button->state |= BUTTON_VISIBLE; + } + } + + /* menu buttons */ + for (i=0; imax_buttons; i++) + { + button = &menu->buttons[i]; + if (button->data) + { + if (!button->data->texture[0]) + button->data->texture[0] = gxTextureOpenPNG(button->data->image[0],0); + if (!button->data->texture[1]) + button->data->texture[1] = gxTextureOpenPNG(button->data->image[1],0); + } + } + + /* menu items */ + for (i=0; imax_items; i++) + { + item = &menu->items[i]; + if (item->data) + item->texture = gxTextureOpenPNG(item->data,0); + } + + /* update message box */ + message_box.parent = menu; +} + +/* Release Menu allocated memory */ +void GUI_DeleteMenu(gui_menu *menu) +{ + int i; + gui_butn *button; + gui_item *item; + gui_image *image; + + /* background elements */ + for (i=0; imax_images; i++) + { + image = &menu->bg_images[i]; + gxTextureClose(&image->texture); + } + + for (i=0; i<2; i++) + { + /* key helpers */ + item = menu->helpers[i]; + if (item) + gxTextureClose(&item->texture); + + /* arrows */ + button = menu->arrows[i]; + if (button) + { + gxTextureClose(&button->data->texture[0]); + gxTextureClose(&button->data->texture[1]); + } + } + + /* menu buttons */ + for (i=0; imax_buttons; i++) + { + button = &menu->buttons[i]; + if (button->data) + { + gxTextureClose(&button->data->texture[0]); + gxTextureClose(&button->data->texture[1]); + } + } + + /* menu items */ + for (i=0; imax_items; i++) + { + item = &menu->items[i]; + gxTextureClose(&item->texture); + } +} + +extern void gxSnapshot(void); + +/* Draw Menu */ +void GUI_DrawMenu(gui_menu *menu) +{ + int i; + gui_item *item; + gui_butn *button; + gui_image *image; + + /* background color */ + if (menu->screenshot) + { + gxClearScreen((GXColor)BLACK); + gxDrawScreenshot(menu->screenshot); + } + else + { + gxClearScreen(bg_color); + } + + /* background elements */ + for (i=0; imax_images; i++) + { + image = &menu->bg_images[i]; + if (image->state & IMAGE_VISIBLE) + { + if (image->state & IMAGE_REPEAT) + gxDrawTextureRepeat(image->texture,image->x,image->y,image->w,image->h,image->alpha); + else + gxDrawTexture(image->texture,image->x,image->y,image->w,image->h,image->alpha); + } + } + + /* menu title */ + FONT_write(menu->title, 22,10,56,640,(GXColor)WHITE); + + /* draw buttons + items */ + for (i=0; imax_buttons; i++) + { + button = &menu->buttons[i]; + + if (button->state & BUTTON_VISIBLE) + { + /* item select (text or image) */ + item = (menu->items) ? (&menu->items[menu->offset + i]) : NULL; + + /* draw button + items */ + if ((i == menu->selected) || (button->state & BUTTON_SELECTED)) + { + if (button->data) + gxDrawTexture(button->data->texture[1],button->x-4,button->y-4,button->w+8,button->h+8,255); + + if (item) + { + if (item->texture) + { + gxDrawTexture(item->texture, item->x-4,item->y-4,item->w+8,item->h+8,255); + FONT_writeCenter(item->text,18,button->x+4,item->x-4,button->y+(button->h - 36)/2+18,(GXColor)DARK_GREY); + } + else + { + FONT_writeCenter(item->text,18,item->x-4,item->x+item->w+4,button->y+(button->h-18)/2+18,(GXColor)DARK_GREY); + } + } + } + else + { + if (button->data) + gxDrawTexture(button->data->texture[0],button->x,button->y,button->w, button->h,255); + + if (item) + { + if (item->texture) + { + gxDrawTexture(item->texture,item->x,item->y,item->w,item->h,255); + FONT_writeCenter(item->text,16,button->x+8,item->x,button->y+(button->h - 32)/2+16,(GXColor)DARK_GREY); + } + else + { + FONT_writeCenter(item->text,16,item->x,item->x+item->w,button->y+(button->h - 16)/2+16,(GXColor)DARK_GREY); + } + } + } + } + } + + /* draw arrow */ + for (i=0; i<2; i++) + { + button = menu->arrows[i]; + if (button) + { + if (button->state & BUTTON_VISIBLE) + { + if (menu->selected == (menu->max_buttons + i)) + gxDrawTexture(button->data->texture[1],button->x-2,button->y-2,button->w+4,button->h+4,255); + else + gxDrawTexture(button->data->texture[0],button->x,button->y,button->w, button->h,255); + } + } + } + + /* left comment */ + item = menu->helpers[0]; + if (item) + { + if (item->data && strlen(item->comment)) + { + gxDrawTexture(item->texture,item->x,item->y,item->w,item->h,255); + FONT_write(item->comment,16,item->x+item->w+6,item->y+(item->h-16)/2 + 16,640,(GXColor)WHITE); + } + } + + /* right comment */ + item = menu->helpers[1]; + if (item) + { + if (item->data && strlen(item->comment)) + { + gxDrawTexture(item->texture,item->x,item->y,item->w,item->h,255); + FONT_alignRight(item->comment,16,item->x-6,item->y+(item->h-16)/2+16,(GXColor)WHITE); + } + } + + if (menu->cb) + menu->cb(); +} + +/* Draw Menu with transitions effects */ +void GUI_DrawMenuFX(gui_menu *menu, u8 speed, u8 out) +{ + int i,temp,xoffset,yoffset; + int max_offset = 0; + u8 item_alpha = 255; + GXColor text_color = DARK_GREY; + gui_item *item; + gui_butn *button; + gui_image *image; + + /* find maximal offset */ + for (i=0; imax_images; i++) + { + image = &menu->bg_images[i]; + + if (image->state & IMAGE_SLIDE_LEFT) + { + temp = image->x + image->w; + if (max_offset < temp) + max_offset = temp; + } + else if (image->state & IMAGE_SLIDE_RIGHT) + { + temp = 640 - image->x; + if (max_offset < temp) + max_offset = temp; + } + + if (image->state & IMAGE_SLIDE_TOP) + { + temp = image->y + image->h; + if (max_offset < temp) + max_offset = temp; + } + else if (image->state & IMAGE_SLIDE_BOTTOM) + { + temp = 480 - image->y; + if (max_offset < temp) + max_offset = temp; + } + } + + temp = max_offset; + + /* Alpha steps */ + int alpha = 0; + int alpha_step = (255 * speed) / max_offset; + if (out) + { + alpha = 255; + alpha_step = -alpha_step; + } + + /* Let's loop until final position has been reached */ + while (temp > 0) + { + /* background color */ + if (menu->screenshot) + { + gxClearScreen((GXColor)BLACK); + if (alpha >= menu->screenshot) + gxDrawScreenshot(menu->screenshot); + else + gxDrawScreenshot(255 - alpha); + } + else + { + gxClearScreen(bg_color); + } + + /* background images */ + for (i=0; imax_images; i++) + { + image = &menu->bg_images[i]; + + /* X offset */ + if (image->state & IMAGE_SLIDE_LEFT) + xoffset = out ? (temp - max_offset) : (-temp); + else if (image->state & IMAGE_SLIDE_RIGHT) + xoffset = out ? (max_offset - temp) : (temp); + else + xoffset = 0; + + /* Y offset */ + if (image->state & IMAGE_SLIDE_TOP) + yoffset = out ? (temp - max_offset) : (-temp); + else if (image->state & IMAGE_SLIDE_BOTTOM) + yoffset = out ? (max_offset - temp) : (temp); + else + yoffset = 0; + + /* draw image */ + if ((image->state & IMAGE_FADE) && ((out && (image->alpha > alpha)) || (!out && (image->alpha < alpha)))) + { + /* FADE In-Out */ + if (image->state & IMAGE_VISIBLE) + { + if (image->state & IMAGE_REPEAT) + gxDrawTextureRepeat(image->texture,image->x+xoffset,image->y+yoffset,image->w,image->h,alpha); + else + gxDrawTexture(image->texture,image->x+xoffset,image->y+yoffset,image->w,image->h,alpha); + } + } + else + { + if (image->state & IMAGE_VISIBLE) + { + if (image->state & IMAGE_REPEAT) + gxDrawTextureRepeat(image->texture,image->x+xoffset,image->y+yoffset,image->w,image->h,image->alpha); + else + gxDrawTexture(image->texture,image->x+xoffset,image->y+yoffset,image->w,image->h,image->alpha); + } + } + } + + /* menu title */ + if ((menu->bg_images[2].state & IMAGE_SLIDE_TOP) || (menu->bg_images[3].state & IMAGE_SLIDE_TOP)) + FONT_write(menu->title, 22,10,out ? (56 + temp - max_offset) : (56 - temp),640,(GXColor)WHITE); + else + FONT_write(menu->title, 22,10,56,640,(GXColor)WHITE); + + /* draw buttons + items */ + for (i=0; imax_buttons; i++) + { + button = &menu->buttons[i]; + + if (button->state & BUTTON_VISIBLE) + { + /* X offset */ + if (button->state & BUTTON_SLIDE_LEFT) + xoffset = out ? (temp - max_offset) : (-temp); + else if (button->state & BUTTON_SLIDE_RIGHT) + xoffset = out ? (max_offset - temp) : (temp); + else + xoffset = 0; + + /* Y offset */ + if (button->state & BUTTON_SLIDE_TOP) + yoffset = out ? (temp - max_offset) : (-temp); + else if (button->state & BUTTON_SLIDE_BOTTOM) + yoffset = out ? (max_offset - temp) : (temp); + else + yoffset = 0; + + /* Alpha transparency */ + if (button->state & BUTTON_FADE) + { + item_alpha = alpha; + text_color.a = alpha; + } + else + { + item_alpha = 255; + text_color.a = 255; + } + + /* item select (text or image) */ + item = (menu->items) ? (&menu->items[menu->offset + i]) : NULL; + + /* draw button + items */ + if ((i == menu->selected) || (button->state & BUTTON_SELECTED)) + { + if (button->data) + gxDrawTexture(button->data->texture[1],button->x+xoffset-4,button->y+yoffset-4,button->w+8,button->h+8,item_alpha); + + if (item) + { + if (item->texture) + { + gxDrawTexture(item->texture, item->x+xoffset-4,item->y+yoffset-4,item->w+8,item->h+8,item_alpha); + FONT_writeCenter(item->text,18,button->x+xoffset+4,item->x+xoffset-4,button->y+yoffset+(button->h - 36)/2+18,text_color); + } + else + { + FONT_writeCenter(item->text,18,item->x+xoffset+2,item->x+item->w+xoffset+2,button->y+yoffset+(button->h-18)/2+18,text_color); + } + } + } + else + { + if (button->data) + gxDrawTexture(button->data->texture[0],button->x+xoffset,button->y+yoffset,button->w, button->h,item_alpha); + + if (item) + { + if (item->texture) + { + gxDrawTexture(item->texture,item->x+xoffset,item->y+yoffset,item->w,item->h,item_alpha); + FONT_writeCenter(item->text,16,button->x+xoffset+8,item->x+xoffset,button->y+yoffset+(button->h - 32)/2+16,text_color); + } + else + { + FONT_writeCenter(item->text,16,item->x+xoffset,item->x+item->w+xoffset,button->y+yoffset+(button->h - 16)/2+16,text_color); + } + } + } + } + } + + /* draw arrow */ + for (i=0; i<2; i++) + { + button = menu->arrows[i]; + if (button) + { + if (button->state & BUTTON_VISIBLE) + { + if (menu->selected == (menu->max_buttons + i)) + gxDrawTexture(button->data->texture[1],button->x-2,button->y-2,button->w+4,button->h+4,255); + else + gxDrawTexture(button->data->texture[0],button->x,button->y,button->w, button->h,255); + } + } + } + + if (!(menu->bg_images[3].state & IMAGE_SLIDE_BOTTOM) && !(menu->bg_images[4].state & IMAGE_SLIDE_BOTTOM)) + { + /* left comment */ + item = menu->helpers[0]; + if (item) + { + if (item->data && strlen(item->comment)) + { + gxDrawTexture(item->texture,item->x,item->y,item->w,item->h,255); + FONT_write(item->comment,16,item->x+item->w+6,item->y+(item->h-16)/2 + 16,640,(GXColor)WHITE); + } + } + + /* right comment */ + item = menu->helpers[1]; + if (item) + { + if (item->data && strlen(item->comment)) + { + gxDrawTexture(item->texture,item->x,item->y,item->w,item->h,255); + FONT_alignRight(item->comment,16,item->x-6,item->y+(item->h-16)/2+16,(GXColor)WHITE); + } + } + } + + if (menu->cb) + menu->cb(); + + /* update offset */ + temp -= speed; + + /* update alpha */ + alpha += alpha_step; + if (alpha > 255) + alpha = 255; + else if (alpha < 0) + alpha = 0; + + + /* copy EFB to XFB */ + gxSetScreen(); + } + + /* final position */ + if (!out) + { + GUI_DrawMenu(menu); + gxSetScreen(); + } + else if (menu->screenshot) + { + gxClearScreen((GXColor)BLACK); + gxDrawScreenshot(255); + gxSetScreen(); + } +} + +/* Basic menu title slide effect */ +void GUI_SlideMenuTitle(gui_menu *m, int title_offset) +{ +#ifdef HW_RVL + gui_butn *button; + int i,x,y; +#endif + + char title[64]; + strcpy(title,m->title); + + while (title_offset > 0) + { + /* update title */ + strcpy(m->title,title+title_offset); + m->title[strlen(title)-title_offset-1] = 0; + + /* draw menu */ + GUI_DrawMenu(m); + +#ifdef HW_RVL + /* keep pointer active */ + if (m_input.ir.valid) + { + /* get cursor position */ + x = m_input.ir.x; + y = m_input.ir.y; + + /* draw wiimote pointer */ + gxDrawTextureRotate(w_pointer, x-w_pointer->width/2, y-w_pointer->height/2, w_pointer->width, w_pointer->height,m_input.ir.angle,255); + + /* check for valid buttons */ + m->selected = m->max_buttons + 2; + for (i=0; imax_buttons; i++) + { + button = &m->buttons[i]; + if ((button->state & BUTTON_ACTIVE)&&(x>=button->x)&&(x<=(button->x+button->w))&&(y>=button->y)&&(y<=(button->y+button->h))) + { + m->selected = i; + break; + } + } + + for (i=0; i<2; i++) + { + button = m->arrows[i]; + if (button) + { + if (button->state & BUTTON_VISIBLE) + { + if ((x<=(button->x+button->w))&&(y>=button->y)&&(y<=(button->y+button->h))) + { + m->selected = m->max_buttons + i; + break; + } + } + } + } + } +#endif + gxSetScreen(); + usleep(6000); + title_offset--; + } + strcpy(m->title,title); +} + +/* Update current menu */ +int GUI_UpdateMenu(gui_menu *menu) +{ + u16 p; + int ret = 0; + int selected = menu->selected; + int max_items = menu->max_items; + int max_buttons = menu->max_buttons; + gui_butn *button; + +#ifdef HW_RVL + if (Shutdown) + { + GUI_DeleteMenu(menu); + GUI_FadeOut(); + shutdown(); + SYS_ResetSystem(SYS_POWEROFF, 0, 0); + } + else if (m_input.ir.valid) + { + /* get cursor position */ + int x = m_input.ir.x; + int y = m_input.ir.y; + + /* draw wiimote pointer */ + gxDrawTextureRotate(w_pointer, x-w_pointer->width/2, y-w_pointer->height/2, w_pointer->width, w_pointer->height,m_input.ir.angle,255); + + /* check for valid buttons */ + selected = max_buttons + 2; + int i; + for (i=0; ibuttons[i]; + if ((button->state & BUTTON_ACTIVE) && (button->state & BUTTON_VISIBLE)) + { + if((x>=button->x)&&(x<=(button->x+button->w))&&(y>=button->y)&&(y<=(button->y+button->h))) + { + selected = i; + break; + } + } + } + + for (i=0; i<2; i++) + { + button = menu->arrows[i]; + if (button) + { + if ((button->state & BUTTON_ACTIVE) && (button->state & BUTTON_VISIBLE)) + { + if ((x<=(button->x+button->w))&&(y>=button->y)&&(y<=(button->y+button->h))) + { + selected = max_buttons + i; + break; + } + } + } + } + } + else + { + /* reinitialize selection */ + if (selected >= menu->max_buttons) + { + selected = 0; + while ((selected < (menu->max_buttons + 2)) && + (!(menu->buttons[selected].state & BUTTON_ACTIVE) || + !(menu->buttons[selected].state & BUTTON_VISIBLE))) + selected++; + } + } +#endif + + /* update screen */ + gxSetScreen(); + + /* update menu */ + p = m_input.keys; + + if (selected < max_buttons) + { + button = &menu->buttons[selected]; + if (p & PAD_BUTTON_UP) + { + selected -= button->shift[0]; + if (selected < 0) + { + selected = 0; + if (menu->offset) + menu->offset --; + } + } + else if (p & PAD_BUTTON_DOWN) + { + selected += button->shift[1]; + if (selected >= max_buttons) + { + selected = max_buttons - 1; + if ((menu->offset + selected) < (max_items - 1)) + menu->offset ++; + } + } + else if (p & PAD_BUTTON_LEFT) + { + selected -= button->shift[2]; + if (selected < 0) + { + selected = 0; + if (menu->offset) + menu->offset --; + } + } + else if (p & PAD_BUTTON_RIGHT) + { + selected += button->shift[3]; + if (selected >= max_buttons) + { + selected = max_buttons - 1; + if ((menu->offset + selected) < (max_items - 1)) + menu->offset ++; + } + } + } + + if (p & PAD_BUTTON_A) + { + if (selected < max_buttons) + ret = 1; /* menu clicked */ + else if (selected == max_buttons) + menu->offset --; /* up arrow */ + else if (selected == (max_buttons+1)) + menu->offset ++; /* down arrow */ + } + else if ((p & PAD_BUTTON_B) || (p & PAD_TRIGGER_Z)) + { + /* quit menu */ + ret = -1; + } + + /* selected item has changed ? */ + if (menu->selected != selected) + { + if (selected < max_buttons) + { + /* sound fx */ + button = &menu->buttons[selected]; + if (button->state & BUTTON_OVER_SFX) + { + ASND_SetVoice(ASND_GetFirstUnusedVoice(),VOICE_MONO_16BIT,22050,0,(u8 *)button_over_pcm,button_over_pcm_size, + ((int)config.sfx_volume * 255) / 100,((int)config.sfx_volume * 255) / 100,NULL); + } + } + else if (selected < (max_buttons + 2)) + { + /* sound fx */ + button = menu->arrows[selected-max_buttons]; + if (button->state & BUTTON_OVER_SFX) + { + ASND_SetVoice(ASND_GetFirstUnusedVoice(),VOICE_MONO_16BIT,22050,0,(u8 *)button_over_pcm,button_over_pcm_size, + ((int)config.sfx_volume * 255) / 100,((int)config.sfx_volume * 255) / 100,NULL); + } + } + + /* update selection */ + menu->selected = selected; + } + + /* update helper comment */ + if (menu->helpers[1]) + { + if ((menu->offset + selected) < max_items) + { + gui_item *item = &menu->items[menu->offset + selected]; + strcpy(menu->helpers[1]->comment,item->comment); + } + else + { + strcpy(menu->helpers[1]->comment,""); + } + } + + if (ret > 0) + { + if (selected < max_buttons) + { + /* sound fx */ + button = &menu->buttons[selected]; + if (button->state & BUTTON_SELECT_SFX) + { + ASND_SetVoice(ASND_GetFirstUnusedVoice(),VOICE_MONO_16BIT,22050,0,(u8 *)button_select_pcm,button_select_pcm_size, + ((int)config.sfx_volume * 255) / 100,((int)config.sfx_volume * 255) / 100,NULL); + } + } + } + + return ret; +} + +/* Generic routine to render & update menus */ +int GUI_RunMenu(gui_menu *menu) +{ + int update = 0; + + /* update menu */ + while (!update) + { + GUI_DrawMenu(menu); + update = GUI_UpdateMenu(menu); + + /* update arrows buttons status (items list) */ + if (menu->arrows[0]) + { + if (menu->offset > 0) + menu->arrows[0]->state |= BUTTON_VISIBLE; + else + menu->arrows[0]->state &= ~BUTTON_VISIBLE; + } + + if (menu->arrows[1]) + { + if ((menu->offset + menu->max_buttons) < menu->max_items) + menu->arrows[1]->state |= BUTTON_VISIBLE; + else + menu->arrows[1]->state &= ~BUTTON_VISIBLE; + } + } + + if (update == 2) + return (-2-menu->offset-menu->selected); + else if (update == 1) + return (menu->offset + menu->selected); + else + return -1; + } + +/* Text Window */ +void GUI_TextWindow(gui_menu *parent, char *title, char items[][64], u8 nb_items, u8 fontsize) +{ + int i, quit = 0; + +#ifdef HW_RVL + int x,y; +#endif + + /* initialize window */ + gx_texture *window = gxTextureOpenPNG(Frame_s1_png,0); + gx_texture *top = gxTextureOpenPNG(Frame_s1_title_png,0); + + /* window position */ + int xwindow = (640 - window->width) /2; + int ywindow = (480 - window->height)/2; + + /* text position */ + int ypos = ywindow + top->height + (window->height - top->height - fontsize*nb_items) / 2 + fontsize/2; + + /* disable helper comment */ + const u8 *data = NULL; + if (parent->helpers[1]) + { + data = parent->helpers[1]->data; + parent->helpers[1]->data = NULL; + } + + /* slide in */ + int yoffset = ywindow + window->height; + while (yoffset > 0) + { + /* draw parent menu */ + GUI_DrawMenu(parent); + + /* draw window */ + gxDrawTexture(window,xwindow,ywindow-yoffset,window->width,window->height,230); + gxDrawTexture(top,xwindow,ywindow-yoffset,top->width,top->height,255); + + /* draw title */ + FONT_writeCenter(title,20,xwindow,xwindow+window->width,ywindow+(top->height-20)/2+20-yoffset,(GXColor)WHITE); + + /* draw text */ + for (i=0; iwidth,ypos+i*fontsize-yoffset,(GXColor)WHITE); + + /* update display */ + gxSetScreen(); + + /* slide speed */ + yoffset -= 60; + } + + /* draw menu + text window */ + while (quit == 0) + { + /* draw parent menu */ + GUI_DrawMenu(parent); + + /* draw window */ + gxDrawTexture(window,xwindow,ywindow,window->width,window->height,230); + gxDrawTexture(top,xwindow,ywindow,top->width,top->height,255); + + /* draw title */ + FONT_writeCenter(title,20,xwindow,xwindow+window->width,ywindow+(top->height-20)/2+20,(GXColor)WHITE); + + /* draw text */ + for (i=0; iwidth,ypos+i*fontsize,(GXColor)WHITE); + } + +#ifdef HW_RVL + if (Shutdown) + { + gxTextureClose(&window); + gxTextureClose(&top); + gxTextureClose(&w_pointer); + GUI_DeleteMenu(parent); + GUI_FadeOut(); + shutdown(); + SYS_ResetSystem(SYS_POWEROFF, 0, 0); + } + else if (m_input.ir.valid) + { + /* get cursor position */ + x = m_input.ir.x; + y = m_input.ir.y; + + /* draw wiimote pointer */ + gxDrawTextureRotate(w_pointer, x-w_pointer->width/2, y-w_pointer->height/2, w_pointer->width, w_pointer->height,m_input.ir.angle,255); + } +#endif + + /* update screen */ + gxSetScreen(); + + /* wait for exit buttons */ + if (m_input.keys) + quit = 1; + } + + /* reset initial vertical offset */ + + /* slide out */ + yoffset = 0; + while (yoffset < (ywindow + window->height)) + { + /* draw parent menu */ + GUI_DrawMenu(parent); + + /* draw window */ + gxDrawTexture(window,xwindow,ywindow-yoffset,window->width,window->height,230); + gxDrawTexture(top,xwindow,ywindow-yoffset,top->width,top->height,255); + + /* draw title */ + FONT_writeCenter(title,20,xwindow,xwindow+window->width,ywindow+(top->height-20)/2+20-yoffset,(GXColor)WHITE); + + /* draw text */ + for (i=0; iwidth,ypos+i*fontsize-yoffset,(GXColor)WHITE); + + /* update display */ + gxSetScreen(); + + /* slide speed */ + yoffset += 60; + } + + /* restore helper comment */ + if (parent->helpers[1]) + parent->helpers[1]->data = data; + + /* final position */ + GUI_DrawMenu(parent); + gxSetScreen(); + + /* close textures */ + gxTextureClose(&window); + gxTextureClose(&top); +} + +/* Option Window (returns selected item) */ +int GUI_OptionWindow(gui_menu *parent, char *title, char *items[], u8 nb_items) +{ + int i, ret, quit = 0; + int old, selected = 0; + s16 p; + butn_data button; + +#ifdef HW_RVL + int x,y; +#endif + + /* initialize buttons data */ + button.texture[0] = gxTextureOpenPNG(Button_text_png,0); + button.texture[1] = gxTextureOpenPNG(Button_text_over_png,0); + + /* initialize texture window */ + gx_texture *window = gxTextureOpenPNG(Frame_s1_png,0); + gx_texture *top = gxTextureOpenPNG(Frame_s1_title_png,0); + + /* get initial positions */ + int w = button.texture[0]->width; + int h = button.texture[0]->height; + int xwindow = (640 - window->width)/2; + int ywindow = (480 - window->height)/2; + int xpos = xwindow + (window->width - w)/2; + int ypos = (window->height - top->height - (h*nb_items) - (nb_items-1)*20)/2; + ypos = ypos + ywindow + top->height; + + /* disable helper comment */ + const u8 *data = NULL; + if (parent->helpers[1]) + { + data = parent->helpers[1]->data; + parent->helpers[1]->data = 0; + } + + /* slide in */ + int yoffset = ywindow + window->height; + while (yoffset > 0) + { + /* draw parent menu */ + GUI_DrawMenu(parent); + + /* draw window */ + gxDrawTexture(window,xwindow,ywindow-yoffset,window->width,window->height,230); + gxDrawTexture(top,xwindow,ywindow-yoffset,top->width,top->height,255); + + /* draw title */ + FONT_writeCenter(title,20,xwindow,xwindow+window->width,ywindow+(top->height-20)/2+20-yoffset,(GXColor)WHITE); + + /* draw buttons + text */ + for (i=0; iwidth,window->height,230); + gxDrawTexture(top,xwindow,ywindow,top->width,top->height,255); + + /* draw title */ + FONT_writeCenter(title,20,xwindow,xwindow+window->width,ywindow+(top->height-20)/2+20,(GXColor)WHITE); + + /* draw buttons + text */ + for (i=0; iwidth/2, y-w_pointer->height/2, w_pointer->width, w_pointer->height,m_input.ir.angle,255); + + /* check for valid buttons */ + selected = -1; + for (i=0; i=xpos)&&(x<=(xpos+w))&&(y>=ypos+i*(20 + h))&&(y<=(ypos+i*(20+h)+h))) + { + selected = i; + break; + } + } + } + else + { + /* reinitialize selection */ + if (selected == -1) + selected = 0; + } +#endif + + /* update screen */ + gxSetScreen(); + + /* update selection */ + if (p & PAD_BUTTON_UP) + { + if (selected > 0) + selected --; + } + else if (p & PAD_BUTTON_DOWN) + { + if (selected < (nb_items -1)) + selected ++; + } + + /* sound fx */ + if (selected != old) + { + if (selected >= 0) + { + ASND_SetVoice(ASND_GetFirstUnusedVoice(),VOICE_MONO_16BIT,22050,0,(u8 *)button_over_pcm,button_over_pcm_size, + ((int)config.sfx_volume * 255) / 100,((int)config.sfx_volume * 255) / 100,NULL); + } + } + + if (p & PAD_BUTTON_A) + { + if (selected >= 0) + { + quit = 1; + ret = selected; + } + } + else if (p & PAD_BUTTON_B) + { + quit = 1; + ret = -1; + } + } + + /* slide out */ + yoffset = 0; + while (yoffset < (ywindow + window->height)) + { + /* draw parent menu */ + GUI_DrawMenu(parent); + + /* draw window + header */ + gxDrawTexture(window,xwindow,ywindow-yoffset,window->width,window->height,230); + gxDrawTexture(top,xwindow,ywindow-yoffset,top->width,top->height,255); + + /* draw title */ + FONT_writeCenter(title,20,xwindow,xwindow+window->width,ywindow+(top->height-20)/2+20-yoffset,(GXColor)WHITE); + + /* draw buttons + text */ + for (i=0; ihelpers[1]) + parent->helpers[1]->data = data; + + /* final position */ + GUI_DrawMenu(parent); + gxSetScreen(); + + /* close textures */ + gxTextureClose(&window); + gxTextureClose(&top); + gxTextureClose(&button.texture[0]); + gxTextureClose(&button.texture[1]); + + return ret; +} + +/* Option Box */ +void GUI_OptionBox(gui_menu *parent, optioncallback cb, char *title, void *option, float step, float min, float max, u8 type) +{ + gx_texture *arrow[2]; + arrow[0] = gxTextureOpenPNG(Button_arrow_png,0); + arrow[1] = gxTextureOpenPNG(Button_arrow_over_png,0); + gx_texture *window = gxTextureOpenPNG(Frame_s2_png,0); + gx_texture *top = gxTextureOpenPNG(Frame_s2_title_png,0); + + /* window position */ + int xwindow = 166; + int ywindow = 160; + + /* arrows position */ + int xleft = 206; + int xright = 392; + int yleft = 238; + int yright = 238; + + /* disable action button helper */ + if (parent->helpers[1]) + parent->helpers[1]->data = 0; + + /* slide in */ + char msg[16]; + int yoffset = ywindow + window->height; + while (yoffset > 0) + { + /* draw parent menu */ + GUI_DrawMenu(parent); + + /* draw window */ + gxDrawTexture(window,xwindow,ywindow-yoffset,window->width,window->height,225); + gxDrawTexture(top,xwindow,ywindow-yoffset,top->width,top->height,255); + + /* display title */ + FONT_writeCenter(title,20,xwindow,xwindow+window->width,ywindow+(top->height-20)/2+20-yoffset,(GXColor)WHITE); + + /* update display */ + gxSetScreen(); + + /* slide speed */ + yoffset -= 60; + } + + /* display option box */ + int quit = 0; + int modified = 0; + int selected = -1; + s16 p; +#ifdef HW_RVL + int x,y; +#endif + + while (!quit) + { + /* draw parent menu */ + GUI_DrawMenu(parent); + + /* draw window */ + gxDrawTexture(window,xwindow,ywindow,window->width,window->height,225); + gxDrawTexture(top,xwindow,ywindow,top->width,top->height,255); + + /* display title */ + FONT_writeCenter(title,20,xwindow,xwindow+window->width,ywindow+(top->height-20)/2+20,(GXColor)WHITE); + + /* option type */ + if (type) + { + /* integer type */ + if (*(s16 *)option < 0) + sprintf(msg,"-%d",abs(*(s16 *)option)); + else + sprintf(msg,"%d",abs(*(s16 *)option)); + } + else + { + /* float type */ + if (*(float *)option < 0.0) + sprintf(msg,"-%1.2f",fabs(*(float *)option)); + else + sprintf(msg,"%1.2f",fabs(*(float *)option)); + } + + /* draw option text */ + FONT_writeCenter(msg,24,xwindow,xwindow+window->width,272,(GXColor)WHITE); + + /* update inputs */ + p = m_input.keys; + + /* draw buttons */ + if (selected < 0) + { + /* nothing selected */ + gxDrawTexture(arrow[0],xleft,yleft,arrow[0]->width,arrow[0]->height,255); + gxDrawTextureRotate(arrow[0],xright,yright,arrow[0]->width,arrow[0]->height,180.0,255); + } + +#ifdef HW_RVL + else if (selected) + { + /* right button selected */ + gxDrawTexture(arrow[0],xleft,yleft,arrow[0]->width,arrow[0]->height,255); + gxDrawTextureRotate(arrow[1],xright-4,yright-4,arrow[1]->width+8,arrow[1]->height+8,180.0,255); + } + else + { + /* left button selected */ + gxDrawTexture(arrow[1],xleft-4,yleft-4,arrow[1]->width+8,arrow[1]->height+8,255); + gxDrawTextureRotate(arrow[0],xright,yright,arrow[0]->width,arrow[0]->height,180.0,255); + } + + selected = -1; + if (Shutdown) + { + gxTextureClose(&arrow[0]); + gxTextureClose(&arrow[1]); + gxTextureClose(&window); + gxTextureClose(&top); + gxTextureClose(&w_pointer); + GUI_DeleteMenu(parent); + GUI_FadeOut(); + shutdown(); + SYS_ResetSystem(SYS_POWEROFF, 0, 0); + } + else if (m_input.ir.valid) + { + /* get cursor position */ + x = m_input.ir.x; + y = m_input.ir.y; + + /* draw wiimote pointer */ + gxDrawTextureRotate(w_pointer, x-w_pointer->width/2, y-w_pointer->height/2, w_pointer->width, w_pointer->height,m_input.ir.angle,255); + + /* check for valid buttons */ + if ((x>=xleft)&&(x<=(xleft+arrow[0]->width))&&(y>=yleft)&&(y<=(yleft+arrow[0]->height))) + { + selected = 0; + if (p & PAD_BUTTON_A) + p |= PAD_BUTTON_LEFT; + } + else if ((x>=xright)&&(x<=(xright+arrow[0]->width))&&(y>=yright)&&(y<=(yright+arrow[0]->height))) + { + selected = 1; + if (p & PAD_BUTTON_A) + p |= PAD_BUTTON_RIGHT; + } + } +#endif + + /* update screen */ + gxSetScreen(); + + /* check input */ + if (p&PAD_BUTTON_LEFT) + { + /* decrement option value */ + if (type) + { + /* integer type */ + *(s16 *)option -= (s16)step; + if (*(s16 *)option < (s16)min) + *(s16 *)option = (s16)max; + } + else + { + /* float type */ + *(float *)option -= step; + if (*(float *)option < min) + *(float *)option = max; + } + + modified = 1; + } + else if (p&PAD_BUTTON_RIGHT) + { + /* increment option value */ + if (type) + { + /* integer type */ + *(s16 *)option += (s16)step; + if (*(s16 *)option > (s16)max) + *(s16 *)option = (s16)min; + } + else + { + /* float type */ + *(float *)option += step; + if (*(float *)option > max) + *(float *)option = min; + } + + modified = 1; + } + else if (p & PAD_BUTTON_B) + { + quit = 1; + } + + if (modified) + { + modified = 0; + + /* play sound effect */ + ASND_SetVoice(ASND_GetFirstUnusedVoice(),VOICE_MONO_16BIT,22050,0,(u8 *)button_over_pcm,button_over_pcm_size, + ((int)config.sfx_volume * 255) / 100,((int)config.sfx_volume * 255) / 100,NULL); + + /* option callback */ + if (cb) + cb(); + } + } + + /* slide out */ + yoffset = 0; ; + while (yoffset < (ywindow + window->height)) + { + /* draw parent menu */ + GUI_DrawMenu(parent); + + /* draw window */ + gxDrawTexture(window,xwindow,ywindow-yoffset,window->width,window->height,225); + gxDrawTexture(top,xwindow,ywindow-yoffset,top->width,top->height,255); + + /* display title */ + FONT_writeCenter(title,20,xwindow,xwindow+window->width,ywindow+(top->height-20)/2+20-yoffset,(GXColor)WHITE); + + /* update display */ + gxSetScreen(); + + /* slide speed */ + yoffset += 60; + } + + /* restore action button helper */ + if (parent->helpers[1]) + parent->helpers[1]->data = Key_A_png; + + /* final position */ + GUI_DrawMenu(parent); + gxSetScreen(); + + /* close textures */ + gxTextureClose(&arrow[0]); + gxTextureClose(&arrow[1]); + gxTextureClose(&window); + gxTextureClose(&top); +} + +/* Option Box with two parameters */ +void GUI_OptionBox2(gui_menu *parent, char *text_1, char *text_2, s16 *option_1, s16 *option_2, s16 step, s16 min, s16 max) +{ + gx_texture *arrow[2]; + arrow[0] = gxTextureOpenPNG(Button_arrow_png,0); + arrow[1] = gxTextureOpenPNG(Button_arrow_over_png,0); + gx_texture *window = gxTextureOpenPNG(Frame_s2_png,0); + + /* window position */ + int xwindow = 166; + int ywindow = 160; + + /* arrows position */ + int arrow_pos[4][2] = + { + {144,218}, + {452,218}, + {298,138}, + {298,298} + }; + + /* disable action button helper */ + if (parent->helpers[1]) + parent->helpers[1]->data = 0; + + /* slide in */ + char msg[16]; + int yoffset = ywindow + window->height; + while (yoffset > 0) + { + /* draw parent menu */ + GUI_DrawMenu(parent); + + /* draw window */ + gxDrawTexture(window,xwindow,ywindow-yoffset,window->width,window->height,225); + + /* update display */ + gxSetScreen(); + + /* slide speed */ + yoffset -= 60; + } + + /* display option box */ + int quit = 0; + int modified = 0; + s16 p; +#ifdef HW_RVL + int selected = -1; + int i,x,y; +#endif + + while (!quit) + { + /* draw parent menu */ + GUI_DrawMenu(parent); + + /* draw window */ + gxDrawTexture(window,xwindow,ywindow,window->width,window->height,225); + + /* draw options text */ + if (*option_1 < 0) + sprintf(msg,"%s: -%02d",text_1,abs(*option_1)); + else + sprintf(msg,"%s: +%02d",text_1,abs(*option_1)); + FONT_writeCenter(msg,24,xwindow,xwindow+window->width,240,(GXColor)WHITE); + if (*option_2 < 0) + sprintf(msg,"%s: -%02d",text_2,abs(*option_2)); + else + sprintf(msg,"%s: +%02d",text_2,abs(*option_2)); + FONT_writeCenter(msg,24,xwindow,xwindow+window->width,264,(GXColor)WHITE); + + /* update inputs */ + p = m_input.keys; + + /* draw buttons */ +#ifdef HW_RVL + switch (selected) + { + case 0: /* left button */ + gxDrawTexture(arrow[1],arrow_pos[0][0]-4,arrow_pos[0][1]-4,arrow[0]->width+8,arrow[0]->height+8,255); + gxDrawTextureRotate(arrow[0],arrow_pos[1][0],arrow_pos[1][1],arrow[0]->width,arrow[0]->height,180.0,255); + gxDrawTextureRotate(arrow[0],arrow_pos[2][0],arrow_pos[2][1],arrow[0]->width,arrow[0]->height,90.0,255); + gxDrawTextureRotate(arrow[0],arrow_pos[3][0],arrow_pos[3][1],arrow[0]->width,arrow[0]->height,270.0,255); + if (p & PAD_BUTTON_A) p |= PAD_BUTTON_LEFT; + break; + + case 1: /* right button */ + gxDrawTexture(arrow[0],arrow_pos[0][0],arrow_pos[0][1],arrow[0]->width,arrow[0]->height,255); + gxDrawTextureRotate(arrow[1],arrow_pos[1][0]-4,arrow_pos[1][1]-4,arrow[0]->width+8,arrow[0]->height+8,180.0,255); + gxDrawTextureRotate(arrow[0],arrow_pos[2][0],arrow_pos[2][1],arrow[0]->width,arrow[0]->height,90.0,255); + gxDrawTextureRotate(arrow[0],arrow_pos[3][0],arrow_pos[3][1],arrow[0]->width,arrow[0]->height,270.0,255); + if (p & PAD_BUTTON_A) p |= PAD_BUTTON_RIGHT; + break; + + case 2: /* up button */ + gxDrawTexture(arrow[0],arrow_pos[0][0],arrow_pos[0][1],arrow[0]->width,arrow[0]->height,255); + gxDrawTextureRotate(arrow[0],arrow_pos[1][0],arrow_pos[1][1],arrow[0]->width,arrow[0]->height,180.0,255); + gxDrawTextureRotate(arrow[1],arrow_pos[2][0]-4,arrow_pos[2][1]-4,arrow[0]->width+8,arrow[0]->height+8,90.0,255); + gxDrawTextureRotate(arrow[0],arrow_pos[3][0],arrow_pos[3][1],arrow[0]->width,arrow[0]->height,270.0,255); + if (p & PAD_BUTTON_A) p |= PAD_BUTTON_UP; + break; + + case 3: /* down button */ + gxDrawTexture(arrow[0],arrow_pos[0][0],arrow_pos[0][1],arrow[0]->width,arrow[0]->height,255); + gxDrawTextureRotate(arrow[0],arrow_pos[1][0],arrow_pos[1][1],arrow[0]->width,arrow[0]->height,180.0,255); + gxDrawTextureRotate(arrow[0],arrow_pos[2][0],arrow_pos[2][1],arrow[0]->width,arrow[0]->height,90.0,255); + gxDrawTextureRotate(arrow[1],arrow_pos[3][0]-4,arrow_pos[3][1]-4,arrow[0]->width+8,arrow[0]->height+8,270.0,255); + if (p & PAD_BUTTON_A) p |= PAD_BUTTON_DOWN; + break; + + default: /* nothing selected */ + gxDrawTexture(arrow[0],arrow_pos[0][0],arrow_pos[0][1],arrow[0]->width,arrow[0]->height,255); + gxDrawTextureRotate(arrow[0],arrow_pos[1][0],arrow_pos[1][1],arrow[0]->width,arrow[0]->height,180.0,255); + gxDrawTextureRotate(arrow[0],arrow_pos[2][0],arrow_pos[2][1],arrow[0]->width,arrow[0]->height,90.0,255); + gxDrawTextureRotate(arrow[0],arrow_pos[3][0],arrow_pos[3][1],arrow[0]->width,arrow[0]->height,270.0,255); + break; + } + + if (Shutdown) + { + gxTextureClose(&arrow[0]); + gxTextureClose(&arrow[1]); + gxTextureClose(&window); + gxTextureClose(&w_pointer); + GUI_DeleteMenu(parent); + GUI_FadeOut(); + shutdown(); + SYS_ResetSystem(SYS_POWEROFF, 0, 0); + } + + /* update selection */ + selected = -1; + if (m_input.ir.valid) + { + /* get cursor position */ + x = m_input.ir.x; + y = m_input.ir.y; + + /* draw wiimote pointer */ + gxDrawTextureRotate(w_pointer, x-w_pointer->width/2, y-w_pointer->height/2, w_pointer->width, w_pointer->height,m_input.ir.angle,255); + + /* check for valid buttons */ + for (i=0; i<4; i++) + { + if ((x>=arrow_pos[i][0])&&(x<=(arrow_pos[i][0]+arrow[0]->width))&&(y>=arrow_pos[i][1])&&(y<=(arrow_pos[i][1]+arrow[0]->height))) + selected = i; + } + } +#else + gxDrawTexture(arrow[0],arrow_pos[0][0],arrow_pos[0][1],arrow[0]->width,arrow[0]->height,255); + gxDrawTextureRotate(arrow[0],arrow_pos[1][0],arrow_pos[1][1],arrow[0]->width,arrow[0]->height,180.0,255); + gxDrawTextureRotate(arrow[0],arrow_pos[2][0],arrow_pos[2][1],arrow[0]->width,arrow[0]->height,90.0,255); + gxDrawTextureRotate(arrow[0],arrow_pos[3][0],arrow_pos[3][1],arrow[0]->width,arrow[0]->height,270.0,255); +#endif + + /* update screen */ + gxSetScreen(); + + if (p&PAD_BUTTON_LEFT) + { + /* decrement option 1 value */ + *option_1 -= step; + if (*option_1 < min) + *option_1 = max; + modified = 1; + } + else if (p&PAD_BUTTON_RIGHT) + { + /* decrement option 1 value */ + *option_1 += step; + if (*option_1 > max) + *option_1 = min; + modified = 1; + } + else if (p&PAD_BUTTON_UP) + { + /* decrement option 2 value */ + *option_2 -= step; + if (*option_2 < min) + *option_2 = max; + modified = 1; + } + else if (p&PAD_BUTTON_DOWN) + { + /* increment option 2 value */ + *option_2 += step; + if (*option_2 > max) + *option_2 = min; + modified = 1; + } + else if (p & PAD_BUTTON_B) + { + quit = 1; + } + + if (modified) + { + modified = 0; + /* play sound effect */ + ASND_SetVoice(ASND_GetFirstUnusedVoice(),VOICE_MONO_16BIT,22050,0,(u8 *)button_over_pcm,button_over_pcm_size, + ((int)config.sfx_volume * 255) / 100,((int)config.sfx_volume * 255) / 100,NULL); + } + } + + /* slide out */ + yoffset = 0; ; + while (yoffset < (ywindow + window->height)) + { + /* draw parent menu */ + GUI_DrawMenu(parent); + + /* draw window */ + gxDrawTexture(window,xwindow,ywindow-yoffset,window->width,window->height,225); + + /* update display */ + gxSetScreen(); + + /* slide speed */ + yoffset += 60; + } + + /* restore action button helper */ + if (parent->helpers[1]) + parent->helpers[1]->data = Key_A_png; + + /* final position */ + GUI_DrawMenu(parent); + gxSetScreen(); + + /* close textures */ + gxTextureClose(&arrow[0]); + gxTextureClose(&arrow[1]); + gxTextureClose(&window); +} + +/* Interactive Message Box */ +/* Message Box displays a message until a specific action is completed */ + +/* Message Box LWP Thread */ +static void *MsgBox_Thread(gui_message *message_box) +{ + while (message_box->refresh) + { + /* draw parent menu */ + if (message_box->parent) + { + GUI_DrawMenu(message_box->parent); + } + else + { + gxClearScreen(bg_color); + } + + /* draw window */ + gxDrawTexture(message_box->window,166,160,message_box->window->width,message_box->window->height,230); + gxDrawTexture(message_box->top,166,160,message_box->top->width,message_box->top->height,255); + + /* draw title */ + if (message_box->title) + FONT_writeCenter(message_box->title,20,166,166+message_box->window->width,160+(message_box->top->height-20)/2+20,(GXColor)WHITE); + + /* draw box message */ + if (message_box->msg) + FONT_writeCenter(message_box->msg,18,166,166+message_box->window->width,248,(GXColor)WHITE); + + /* draw throbber */ + if (message_box->throbber) + gxDrawTextureRotate(message_box->throbber,166+(message_box->window->width-message_box->throbber->width)/2,160+message_box->window->height-message_box->throbber->height-20,message_box->throbber->width,message_box->throbber->height,(message_box->progress * 360.0) / 100.0, 255); + + /* draw exit message */ + if (message_box->buttonA) + { + FONT_writeCenter("Press to continue.",18,166,166+message_box->window->width,248+22,(GXColor)WHITE); + gxDrawTexture(message_box->buttonA, 166+116, 248+4+(18-message_box->buttonA->height)/2,message_box->buttonA->width, message_box->buttonA->height,255); + } + + /* update display */ + gxSetScreen(); + + /* update progression */ + message_box->progress++; + if (message_box->progress > 100) + message_box->progress = 0; + usleep(10); + } + + return 0; +} + +/* update current Message Box */ +void GUI_MsgBoxUpdate(char *title, char *msg) +{ + if (title) + strncpy(message_box.title,title,64); + if (msg) + strncpy(message_box.msg,msg,64); +} + +/* setup current Message Box */ +void GUI_MsgBoxOpen(char *title, char *msg, bool throbber) +{ + if (SILENT) + return; + + /* update text */ + GUI_MsgBoxUpdate(title,msg); + + /* ensure we are not already running */ + if (!message_box.refresh) + { + /* initialize default textures */ + message_box.window = gxTextureOpenPNG(Frame_s2_png,0); + message_box.top = gxTextureOpenPNG(Frame_s2_title_png,0); + if (throbber) + message_box.throbber = gxTextureOpenPNG(Frame_throbber_png,0); + + /* window position */ + int xwindow = 166; + int ywindow = 160; + int ypos = 248; + + /* disable helper comments */ + if (message_box.parent) + { + if (message_box.parent->helpers[0]) + message_box.parent->helpers[0]->data = 0; + if (message_box.parent->helpers[1]) + message_box.parent->helpers[1]->data = 0; + } + + /* slide in */ + int yoffset = ywindow + message_box.window->height; + while (yoffset > 0) + { + /* draw parent menu */ + if (message_box.parent) + { + GUI_DrawMenu(message_box.parent); + } + else + { + gxClearScreen(bg_color); + } + + /* draw window */ + gxDrawTexture(message_box.window,xwindow,ywindow-yoffset,message_box.window->width,message_box.window->height,230); + gxDrawTexture(message_box.top,xwindow,ywindow-yoffset,message_box.top->width,message_box.top->height,255); + + /* draw title */ + if (title) + FONT_writeCenter(title,20,xwindow,xwindow+message_box.window->width,ywindow+(message_box.top->height-20)/2+20-yoffset,(GXColor)WHITE); + + /* draw box message */ + if (msg) + FONT_writeCenter(msg,18,xwindow,xwindow+message_box.window->width,ypos-yoffset,(GXColor)WHITE); + + /* update display */ + gxSetScreen(); + + /* slide speed */ + yoffset -= 60; + } + + /* create LWP thread for MessageBox refresh */ + message_box.refresh = TRUE; + LWP_CreateThread (&msgboxthread, (void *)MsgBox_Thread, &message_box, NULL, 0, 70); + } +} + +/* Close current messagebox */ +void GUI_MsgBoxClose(void) +{ + if (message_box.refresh) + { + /* suspend MessageBox refresh */ + message_box.refresh = FALSE; + LWP_JoinThread(msgboxthread, NULL); + + /* window position */ + int xwindow = 166; + int ywindow = 160; + int ypos = 248; + + /* slide out */ + int yoffset = 0; + while (yoffset < (ywindow + message_box.window->height)) + { + /* draw parent menu */ + if (message_box.parent) + { + GUI_DrawMenu(message_box.parent); + } + else + { + gxClearScreen(bg_color); + } + + /* draw window */ + gxDrawTexture(message_box.window,xwindow,ywindow-yoffset,message_box.window->width,message_box.window->height,230); + gxDrawTexture(message_box.top,xwindow,ywindow-yoffset,message_box.top->width,message_box.top->height,255); + + /* draw title */ + if (message_box.title) + FONT_writeCenter(message_box.title,20,xwindow,xwindow+message_box.window->width,ywindow+(message_box.top->height-20)/2+20-yoffset,(GXColor)WHITE); + + /* draw text */ + if (message_box.msg) + FONT_writeCenter(message_box.msg,18,xwindow,xwindow+message_box.window->width,ypos-yoffset,(GXColor)WHITE); + + /* update display */ + gxSetScreen(); + + /* slide speed */ + yoffset += 60; + } + + if (message_box.parent) + { + /* restore helper comment */ + if (message_box.parent->helpers[0]) + message_box.parent->helpers[0]->data = Key_B_png; + if (message_box.parent->helpers[1]) + message_box.parent->helpers[1]->data = Key_A_png; + + /* final position */ + GUI_DrawMenu(message_box.parent); + } + else + { + gxClearScreen(bg_color); + } + + gxSetScreen(); + + /* clear all textures */ + gxTextureClose(&message_box.window); + gxTextureClose(&message_box.top); + gxTextureClose(&message_box.buttonA); + gxTextureClose(&message_box.throbber); + } +} + +void GUI_WaitPrompt(char *title, char *msg) +{ + if (SILENT) + return; + + /* clear unused texture */ + gxTextureClose(&message_box.throbber); + + /* open or update message box */ + GUI_MsgBoxOpen(title, msg, 0); + + /* allocate texture */ + message_box.buttonA = gxTextureOpenPNG(Key_A_png,0); + + /* wait for button A */ + while (m_input.keys & PAD_BUTTON_A) + VIDEO_WaitVSync(); + while (!(m_input.keys & PAD_BUTTON_A)) + VIDEO_WaitVSync(); + + /* always close message box */ + GUI_MsgBoxClose(); +} + +/* Basic Fading */ +void GUI_FadeOut() +{ + int alpha = 0; + while (alpha < 256) + { + gxDrawRectangle(0, 0, 640, 480, alpha, (GXColor)BLACK); + gxSetScreen(); + alpha +=3; + } +} diff --git a/genplus-gx/gx/gui/gui.h b/genplus-gx/gx/gui/gui.h new file mode 100644 index 0000000000..3f53a471be --- /dev/null +++ b/genplus-gx/gx/gui/gui.h @@ -0,0 +1,245 @@ +/**************************************************************************** + * gui.c + * + * generic GUI Engine (using GX rendering) + * + * Copyright Eke-Eke (2009-2010) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _GUI_H +#define _GUI_H + +#define BG_COLOR_MAX 15 + +/*****************************************************************************/ +/* GUI Buttons state */ +/*****************************************************************************/ +#define BUTTON_VISIBLE 0x01 +#define BUTTON_ACTIVE 0x02 +#define BUTTON_SELECTED 0x04 +#define BUTTON_OVER_SFX 0x08 +#define BUTTON_SELECT_SFX 0x10 +#define BUTTON_FADE 0x20 +#define BUTTON_SLIDE_LEFT 0x40 +#define BUTTON_SLIDE_RIGHT 0x80 +#define BUTTON_SLIDE_TOP 0x100 +#define BUTTON_SLIDE_BOTTOM 0x200 + +/*****************************************************************************/ +/* GUI Image state */ +/*****************************************************************************/ +#define IMAGE_VISIBLE 0x01 +#define IMAGE_REPEAT 0x02 +#define IMAGE_FADE 0x04 +#define IMAGE_SLIDE_LEFT 0x08 +#define IMAGE_SLIDE_RIGHT 0x10 +#define IMAGE_SLIDE_TOP 0x20 +#define IMAGE_SLIDE_BOTTOM 0x40 + +/*****************************************************************************/ +/* Generic GUI structures */ +/*****************************************************************************/ + +/* Item descriptor*/ +typedef struct +{ + gx_texture *texture; /* temporary texture data */ + const u8 *data; /* pointer to png image data (items icon only) */ + char text[64]; /* item string (items list only) */ + char comment[64]; /* item comment */ + u16 x; /* item image or text X position (upper left corner) */ + u16 y; /* item image or text Y position (upper left corner) */ + u16 w; /* item image or text width */ + u16 h; /* item image or text height */ +} gui_item; + +/* Button Data descriptor */ +typedef struct +{ + gx_texture *texture[2]; /* temporary texture datas */ + const u8 *image[2]; /* pointer to png image datas (default) */ +} butn_data; + +/* Button descriptor */ +typedef struct +{ + butn_data *data; /* pointer to button image/texture data */ + u16 state; /* button state (ACTIVE,VISIBLE,SELECTED...) */ + u8 shift[4]; /* direction offsets */ + u16 x; /* button image X position (upper left corner) */ + u16 y; /* button image Y position (upper left corner) */ + u16 w; /* button image pixels width */ + u16 h; /* button image pixels height */ +} gui_butn; + +/* Image descriptor */ +typedef struct +{ + gx_texture *texture; /* temporary texture data */ + const u8 *data; /* pointer to png image data */ + u8 state; /* image state (VISIBLE) */ + u16 x; /* image X position (upper left corner) */ + u16 y; /* image Y position (upper left corner) */ + u16 w; /* image width */ + u16 h; /* image height */ + u8 alpha; /* alpha transparency */ +} gui_image; + +/* Menu descriptor */ +typedef struct +{ + char title[64]; /* menu title */ + s8 selected; /* index of selected item */ + s8 offset; /* items list offset */ + u8 max_items; /* total number of items */ + u8 max_buttons; /* total number of buttons */ + u8 max_images; /* total number of background images */ + u8 screenshot; /* game screen background */ + gui_item *items; /* menu items */ + gui_butn *buttons; /* menu buttons */ + gui_image *bg_images; /* background images */ + gui_item *helpers[2]; /* left & right key comments */ + gui_butn *arrows[2]; /* arrows buttons */ + void (*cb)(void); /* specific draw callback */ +} gui_menu; + +typedef struct +{ + u32 progress; /* progress counter */ + bool refresh; /* messagebox current state */ + gui_menu *parent; /* parent menu */ + char title[64]; /* box title */ + char msg[64]; /* box message */ + gx_texture *window; /* pointer to box texture */ + gx_texture *top; /* pointer to box title texture */ + gx_texture *buttonA; /* pointer to button A texture */ + gx_texture *throbber; /* pointer to throbber texture */ +} gui_message; + +/* Menu inputs */ +struct t_input_menu +{ + u16 keys; +#ifdef HW_RVL + struct ir_t ir; +#endif +} m_input; + +/* Optionbox callback */ +typedef void (*optioncallback)(void); + +/* Generic textures*/ +#ifdef HW_RVL +extern gx_texture *w_pointer; +#endif + +/* Generic backgrounds */ +extern const u8 Bg_layer_png[]; +extern const u8 Bg_overlay_png[]; +extern const u8 Banner_main_png[]; +extern const u8 Banner_bottom_png[]; +extern const u8 Banner_top_png[]; +extern const u8 Main_logo_png[]; + +/* Generic frames */ +extern const u8 Frame_s1_png[]; +extern const u8 Frame_s2_png[]; +extern const u8 Frame_s3_png[]; +extern const u8 Frame_s1_title_png[]; +extern const u8 Frame_s2_title_png[]; +extern const u8 Frame_throbber_png[]; + +/* Generic Buttons */ +extern const u8 Button_text_png[]; +extern const u8 Button_text_over_png[]; +extern const u8 Button_icon_png[]; +extern const u8 Button_icon_over_png[]; +extern const u8 Button_icon_sm_png[]; +extern const u8 Button_icon_sm_over_png[]; +extern const u8 Button_up_png[]; +extern const u8 Button_up_over_png[]; +extern const u8 Button_down_png[]; +extern const u8 Button_down_over_png[]; +extern const u8 Button_arrow_png[]; +extern const u8 Button_arrow_over_png[]; +extern const u8 Button_digit_png[]; +extern const u8 Button_digit_over_png[]; + +/* Generic images*/ +#ifdef HW_RVL +#define Key_A_png Key_A_wii_png +#define Key_B_png Key_B_wii_png +extern const u8 generic_point_png[]; +extern const u8 Key_A_wii_png[]; +extern const u8 Key_B_wii_png[]; +#else +#define Key_A_png Key_A_gcn_png +#define Key_B_png Key_B_gcn_png +extern const u8 Key_A_gcn_png[]; +extern const u8 Key_B_gcn_png[]; +#endif +extern const u8 Star_full_png[]; +extern const u8 Star_empty_png[]; +extern const u8 Overlay_bar_png[]; + +/* Generic Sounds */ +extern const u8 button_over_pcm[]; +extern const u8 button_select_pcm[]; +extern const u8 intro_pcm[]; +extern const u32 button_select_pcm_size; +extern const u32 button_over_pcm_size; +extern const u32 intro_pcm_size; + +extern u8 SILENT; + +extern void GUI_InitMenu(gui_menu *menu); +extern void GUI_DeleteMenu(gui_menu *menu); +extern void GUI_DrawMenu(gui_menu *menu); +extern void GUI_DrawMenuFX(gui_menu *menu, u8 speed, u8 out); +extern void GUI_SlideMenuTitle(gui_menu *m, int title_offset); +extern int GUI_UpdateMenu(gui_menu *menu); +extern int GUI_RunMenu(gui_menu *menu); +extern void GUI_TextWindow(gui_menu *parent, char *title, char items[][64], u8 nb_items, u8 fontsize); +extern int GUI_OptionWindow(gui_menu *parent, char *title, char *items[], u8 nb_items); +extern void GUI_OptionBox(gui_menu *parent, optioncallback cb, char *title, void *option, float step, float min, float max, u8 type); +extern void GUI_OptionBox2(gui_menu *parent, char *text_1, char *text_2, s16 *option_1, s16 *option_2, s16 step, s16 min, s16 max); +extern void GUI_MsgBoxOpen(char *title, char *msg, bool throbber); +extern void GUI_MsgBoxUpdate(char *title, char *msg); +extern void GUI_MsgBoxClose(void); +extern void GUI_WaitPrompt(char *title, char *msg); +extern void GUI_FadeOut(); +extern GXColor *GUI_GetBgColor(void); +extern void GUI_SetBgColor(u8 color); + +#endif diff --git a/genplus-gx/gx/gui/legal.c b/genplus-gx/gx/gui/legal.c new file mode 100644 index 0000000000..c3d49da8c6 --- /dev/null +++ b/genplus-gx/gx/gui/legal.c @@ -0,0 +1,172 @@ +/**************************************************************************** + * legal.c + * + * Genesis Plus GX Disclaimer + * + * Copyright Eke-Eke (2009-2012) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "font.h" +#include "gui.h" + +extern const u8 Bg_intro_c1_png[]; +extern const u8 Bg_intro_c2_png[]; +extern const u8 Bg_intro_c3_png[]; +extern const u8 Bg_intro_c4_png[]; + +/* + * This is the legal stuff - which must be shown at program startup + * Any derivative work MUST include the same textual output. + * + */ + +static void show_disclaimer(int ypos) +{ + FONT_writeCenter ("DISCLAIMER",22,0,640,ypos,(GXColor)WHITE); + ypos += 32; + FONT_writeCenter ("This is a free software, and you are welcome",20,0,640,ypos,(GXColor)WHITE); + ypos += 20; + FONT_writeCenter ("to redistribute it under the conditions of the",20,0,640,ypos,(GXColor)WHITE); + ypos += 20; + FONT_writeCenter ("license that you should have received with this",20,0,640,ypos,(GXColor)WHITE); + ypos += 20; + FONT_writeCenter ("program. You may not sell, lease, rent or generally",20,0,640,ypos,(GXColor)WHITE); + ypos += 20; + FONT_writeCenter ("use this software in any commercial product or activity.",20,0,640,ypos,(GXColor)WHITE); + ypos += 20; + FONT_writeCenter ("Authors can not be held responsible for any damage or",20,0,640,ypos,(GXColor)WHITE); + ypos += 20; + FONT_writeCenter ("or dysfunction that could occur while using this port.",20,0,640,ypos,(GXColor)WHITE); + ypos += 20; + FONT_writeCenter ("You may not distribute this software with any ROM image",20,0,640,ypos,(GXColor)WHITE); + ypos += 20; + FONT_writeCenter ("unless you have the legal right to distribute them.",20,0,640,ypos,(GXColor)WHITE); + ypos += 20; + FONT_writeCenter ("This software is not endorsed by or affiliated",20,0,640,ypos,(GXColor)WHITE); + ypos += 20; + FONT_writeCenter ("with Sega Enterprises Ltd or Nintendo Co Ltd.",20,0,640,ypos,(GXColor)WHITE); + ypos += 20; + FONT_writeCenter ("All trademarks and registered trademarks are",20,0,640,ypos,(GXColor)WHITE); + ypos += 20; + FONT_writeCenter ("the property of their respective owners.",20,0,640,ypos,(GXColor)WHITE); + ypos += 38; +} + +void legal () +{ + int count = 2000; + int vis = 0; + +#ifdef HW_RVL + gx_texture *button = gxTextureOpenPNG(Key_A_wii_png,0); +#else + gx_texture *button = gxTextureOpenPNG(Key_A_gcn_png,0); +#endif + gx_texture *logo = gxTextureOpenPNG(Bg_intro_c4_png,0); + + gxClearScreen((GXColor)BLACK); + show_disclaimer(56); + gxDrawTexture(logo, (640-logo->width)/2, 480-24-logo->height, logo->width, logo->height,255); + gxSetScreen(); + sleep(1); + + while (!m_input.keys && count) + { + gxClearScreen((GXColor)BLACK); + show_disclaimer(56); + if (count%25 == 0) vis^=1; + if (vis) + { + FONT_writeCenter("Press button to continue.",24,0,640,366,(GXColor)SKY_BLUE); + gxDrawTexture(button, 220, 366-24+(24-button->height)/2, button->width, button->height,255); + } + gxDrawTexture(logo, (640-logo->width)/2, 480-24-logo->height, logo->width, logo->height,255); + gxSetScreen(); + count--; + } + + gxTextureClose(&button); + gxTextureClose(&logo); + + if (count > 0) + { + ASND_Pause(0); + int voice = ASND_GetFirstUnusedVoice(); + ASND_SetVoice(voice,VOICE_MONO_16BIT,44100,0,(u8 *)button_select_pcm,button_select_pcm_size,200,200,NULL); + GUI_FadeOut(); + ASND_Pause(1); + return; + } + + gxClearScreen((GXColor)BLACK); + gx_texture *texture = gxTextureOpenPNG(Bg_intro_c1_png,0); + if (texture) + { + gxDrawTexture(texture, (640-texture->width)/2, (480-texture->height)/2, texture->width, texture->height,255); + if (texture->data) free(texture->data); + free(texture); + } + gxSetScreen(); + + sleep (1); + + gxClearScreen((GXColor)WHITE); + texture = gxTextureOpenPNG(Bg_intro_c2_png,0); + if (texture) + { + gxDrawTexture(texture, (640-texture->width)/2, (480-texture->height)/2, texture->width, texture->height,255); + if (texture->data) free(texture->data); + free(texture); + } + gxSetScreen(); + + sleep (1); + + gxClearScreen((GXColor)BLACK); + texture = gxTextureOpenPNG(Bg_intro_c3_png,0); + if (texture) + { + gxDrawTexture(texture, (640-texture->width)/2, (480-texture->height)/2, texture->width, texture->height,255); + if (texture->data) free(texture->data); + free(texture); + } + gxSetScreen(); + + ASND_Pause(0); + int voice = ASND_GetFirstUnusedVoice(); + ASND_SetVoice(voice,VOICE_MONO_16BIT,44100,0,(u8 *)intro_pcm,intro_pcm_size,200,200,NULL); + sleep (2); + ASND_Pause(1); +} diff --git a/genplus-gx/gx/gui/menu.c b/genplus-gx/gx/gui/menu.c new file mode 100644 index 0000000000..1ca3651e32 --- /dev/null +++ b/genplus-gx/gx/gui/menu.c @@ -0,0 +1,3683 @@ +/**************************************************************************** + * menu.c + * + * Genesis Plus GX menu + * + * Copyright Eke-Eke (2009-2013) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "font.h" +#include "gui.h" +#include "filesel.h" +#include "cheats.h" +#include "file_load.h" +#include "file_slot.h" + +#ifdef HW_RVL +#include +#endif + +#include +#include + +/* Credits */ +extern const u8 Bg_credits_png[]; + +/* Main menu */ +extern const u8 Main_load_png[]; +extern const u8 Main_options_png[]; +extern const u8 Main_quit_png[]; +extern const u8 Main_file_png[]; +extern const u8 Main_reset_png[]; +extern const u8 Main_cheats_png[]; +extern const u8 Main_showinfo_png[]; +extern const u8 Main_takeshot_png[]; +#ifdef HW_RVL +extern const u8 Main_play_wii_png[]; +#else +extern const u8 Main_play_gcn_png[]; +#endif + +/* Options menu */ +extern const u8 Option_menu_png[]; +extern const u8 Option_ctrl_png[]; +extern const u8 Option_sound_png[]; +extern const u8 Option_video_png[]; +extern const u8 Option_system_png[]; + +/* Load ROM menu */ +extern const u8 Load_recent_png[]; +extern const u8 Load_md_png[]; +extern const u8 Load_ms_png[]; +extern const u8 Load_gg_png[]; +extern const u8 Load_sg_png[]; +extern const u8 Load_cd_png[]; + +/* Save Manager menu */ +extern const u8 Button_load_png[]; +extern const u8 Button_load_over_png[]; +extern const u8 Button_save_png[]; +extern const u8 Button_save_over_png[]; +extern const u8 Button_special_png[]; +extern const u8 Button_special_over_png[]; +extern const u8 Button_delete_png[]; +extern const u8 Button_delete_over_png[]; + +/* Controller Settings */ +extern const u8 Ctrl_4wayplay_png[]; +extern const u8 Ctrl_gamepad_md_png[]; +extern const u8 Ctrl_gamepad_ms_png[]; +extern const u8 Ctrl_justifiers_png[]; +extern const u8 Ctrl_menacer_png[]; +extern const u8 Ctrl_mouse_png[]; +extern const u8 Ctrl_xe_a1p_png[]; +extern const u8 Ctrl_activator_png[]; +extern const u8 Ctrl_lightphaser_png[]; +extern const u8 Ctrl_paddle_png[]; +extern const u8 Ctrl_sportspad_png[]; +extern const u8 Ctrl_none_png[]; +extern const u8 Ctrl_teamplayer_png[]; +extern const u8 Ctrl_pad3b_png[]; +extern const u8 Ctrl_pad6b_png[]; +extern const u8 Ctrl_config_png[]; +extern const u8 ctrl_option_off_png[]; +extern const u8 ctrl_option_on_png[]; +extern const u8 ctrl_gamecube_png[]; +#ifdef HW_RVL +extern const u8 ctrl_classic_png[]; +extern const u8 ctrl_nunchuk_png[]; +extern const u8 ctrl_wiimote_png[]; +#endif + +/* Generic images */ +extern const u8 Button_sm_blue_png[]; +extern const u8 Button_sm_grey_png[]; +extern const u8 Button_sm_yellow_png[]; + +/* Exit callback */ +void (*reload)(void); + + +/*****************************************************************************/ +/* Specific Menu Callbacks */ +/*****************************************************************************/ +static void ctrlmenu_cb(void); +static void savemenu_cb(void); +static void mainmenu_cb(void); + +/*****************************************************************************/ +/* Generic Buttons data */ +/*****************************************************************************/ +static butn_data arrow_up_data = +{ + {NULL,NULL}, + {Button_up_png,Button_up_over_png} +}; + +static butn_data arrow_down_data = +{ + {NULL,NULL}, + {Button_down_png,Button_down_over_png} +}; + +static butn_data button_text_data = +{ + {NULL,NULL}, + {Button_text_png,Button_text_over_png} +}; + +static butn_data button_icon_data = +{ + {NULL,NULL}, + {Button_icon_png,Button_icon_over_png} +}; + +static butn_data button_icon_sm_data = +{ + {NULL,NULL}, + {Button_icon_sm_png,Button_icon_sm_over_png} +}; + +static butn_data button_player_data = +{ + {NULL,NULL}, + {Button_sm_blue_png,Button_sm_yellow_png} +}; + +static butn_data button_player_none_data = +{ + {NULL,NULL}, + {Button_sm_grey_png,NULL} +}; + +static butn_data button_load_data = +{ + {NULL,NULL}, + {Button_load_png,Button_load_over_png} +}; + +static butn_data button_save_data = +{ + {NULL,NULL}, + {Button_save_png,Button_save_over_png} +}; + +static butn_data button_special_data = +{ + {NULL,NULL}, + {Button_special_png,Button_special_over_png} +}; + +static butn_data button_delete_data = +{ + {NULL,NULL}, + {Button_delete_png,Button_delete_over_png} +}; + +/*****************************************************************************/ +/* Generic GUI items */ +/*****************************************************************************/ +static gui_item action_cancel = +{ + NULL,Key_B_png,"","Back",10,422,28,28 +}; + +static gui_item action_select = +{ + NULL,Key_A_png,"","",602,422,28,28 +}; + +/*****************************************************************************/ +/* GUI backgrounds images */ +/*****************************************************************************/ +static gui_image bg_main[4] = +{ + {NULL,Bg_layer_png,IMAGE_VISIBLE|IMAGE_REPEAT,0,0,640,480,255}, + {NULL,Bg_overlay_png,IMAGE_VISIBLE|IMAGE_REPEAT,0,0,640,480,255}, + {NULL,Banner_main_png,IMAGE_VISIBLE|IMAGE_SLIDE_BOTTOM,0,340,640,140,255}, + {NULL,Main_logo_png,IMAGE_VISIBLE|IMAGE_SLIDE_BOTTOM,202,362,232,56,255} +}; + +static gui_image bg_misc[5] = +{ + {NULL,Bg_layer_png,IMAGE_VISIBLE|IMAGE_REPEAT,0,0,640,480,255}, + {NULL,Bg_overlay_png,IMAGE_VISIBLE|IMAGE_REPEAT,0,0,640,480,255}, + {NULL,Banner_top_png,IMAGE_VISIBLE|IMAGE_SLIDE_TOP,0,0,640,108,255}, + {NULL,Banner_bottom_png,IMAGE_VISIBLE|IMAGE_SLIDE_BOTTOM,0,380,640,100,255}, + {NULL,Main_logo_png,IMAGE_VISIBLE|IMAGE_SLIDE_TOP,466,40,152,44,255} +}; + +static gui_image bg_ctrls[8] = +{ + {NULL,Bg_layer_png,IMAGE_VISIBLE|IMAGE_REPEAT,0,0,640,480,255}, + {NULL,Bg_overlay_png,IMAGE_VISIBLE|IMAGE_REPEAT,0,0,640,480,255}, + {NULL,Banner_top_png,IMAGE_VISIBLE,0,0,640,108,255}, + {NULL,Banner_bottom_png,IMAGE_VISIBLE,0,380,640,100,255}, + {NULL,Main_logo_png,IMAGE_VISIBLE,466,40,152,44,255}, + {NULL,Frame_s2_png,IMAGE_VISIBLE,38,72,316,168,128}, + {NULL,Frame_s2_png,IMAGE_VISIBLE,38,242,316,168,128}, + {NULL,Frame_s3_png,IMAGE_SLIDE_RIGHT,400,134,292,248,128} +}; + +static gui_image bg_list[6] = +{ + {NULL,Bg_layer_png,IMAGE_VISIBLE|IMAGE_REPEAT,0,0,640,480,255}, + {NULL,Bg_overlay_png,IMAGE_VISIBLE|IMAGE_REPEAT,0,0,640,480,255}, + {NULL,Banner_top_png,IMAGE_VISIBLE,0,0,640,108,255}, + {NULL,Banner_bottom_png,IMAGE_VISIBLE,0,380,640,100,255}, + {NULL,Main_logo_png,IMAGE_VISIBLE,466,40,152,44,255}, + {NULL,Frame_s1_png,IMAGE_VISIBLE,8,70,372,336,76} +}; + +static gui_image bg_saves[8] = +{ + {NULL,NULL,0,0,0,0,0,255}, + {NULL,Bg_layer_png,IMAGE_VISIBLE|IMAGE_REPEAT,0,0,640,480,255}, + {NULL,Bg_overlay_png,IMAGE_VISIBLE|IMAGE_REPEAT,0,0,640,480,255}, + {NULL,Banner_top_png,IMAGE_VISIBLE|IMAGE_SLIDE_TOP,0,0,640,108,255}, + {NULL,Banner_bottom_png,IMAGE_VISIBLE|IMAGE_SLIDE_BOTTOM,0,380,640,100,255}, + {NULL,Main_logo_png,IMAGE_VISIBLE|IMAGE_SLIDE_TOP,466,40,152,44,255}, + {NULL,Frame_s1_png,IMAGE_VISIBLE,8,70,372,336,76}, + {NULL,Frame_s1_png,IMAGE_SLIDE_RIGHT,468,108,372,296,76} +}; + +/*****************************************************************************/ +/* Menu Items description */ +/*****************************************************************************/ + +/* Main menu */ +static gui_item items_main[10] = +{ + {NULL,Main_load_png ,"","",114,162,80,92}, + {NULL,Main_options_png ,"","",290,166,60,88}, + {NULL,Main_quit_png ,"","",460,170,52,84}, + {NULL,Main_file_png ,"","",114,216,80,92}, + {NULL,Main_reset_png ,"","",294,227,52,80}, + {NULL,Main_cheats_png ,"","",454,218,64,92}, + {NULL,NULL ,"","", 10,334,84,32}, +#ifdef HW_RVL + {NULL,Main_play_wii_png,"","", 10,372,84,32}, +#else + {NULL,Main_play_gcn_png,"","", 10,372,84,32}, +#endif + {NULL,Main_takeshot_png,"","",546,334,84,32}, + {NULL,Main_showinfo_png,"","",546,372,84,32} +}; + +/* Controllers menu */ +static gui_item items_ctrls[13] = +{ + {NULL,NULL,"","", 0, 0, 0, 0}, + {NULL,NULL,"","", 0, 0, 0, 0}, + {NULL,NULL,"","",305, 0, 24, 0}, + {NULL,NULL,"","",305, 0, 24, 0}, + {NULL,NULL,"","",305, 0, 24, 0}, + {NULL,NULL,"","",305, 0, 24, 0}, + {NULL,NULL,"","",305, 0, 24, 0}, + {NULL,NULL,"","",305, 0, 24, 0}, + {NULL,NULL,"","",305, 0, 24, 0}, + {NULL,NULL,"","",305, 0, 24, 0}, + {NULL,NULL,"","", 0, 0, 0, 0}, + {NULL,NULL,"","", 0, 0, 0, 0}, + {NULL,Ctrl_config_png,"Keys\nConfig","Configure Controller Keys",530,306,32,32} +}; + +/* Load menu */ +static gui_item items_load[6] = +{ + {NULL,Load_recent_png,"","Load recently played games", 119,144,72, 92}, + {NULL,Load_md_png, "","Load Mega Drive/Genesis games", 278,141,84, 92}, + {NULL,Load_cd_png, "","Load Sega/Mega CD games", 454,141,64, 92}, + {NULL,Load_ms_png, "","Load Master System games", 114,284,84, 96}, + {NULL,Load_gg_png, "","Load Game Gear games", 278,283,84,100}, + {NULL,Load_sg_png, "","Load SG-1000 games", 454,281,64, 96} +}; + +/* Option menu */ +static gui_item items_options[5] = +{ + {NULL,Option_system_png,"","System settings", 114,142,80,92}, + {NULL,Option_video_png, "","Video settings", 288,150,64,84}, + {NULL,Option_sound_png, "","Audio settings", 464,154,44,80}, + {NULL,Option_ctrl_png, "","Controllers settings", 192,286,88,92}, + {NULL,Option_menu_png, "","Menu settings", 370,286,60,92} +}; + +/* Audio options */ +static gui_item items_audio[13] = +{ + {NULL,NULL,"Master System FM: AUTO", "Enable/disable YM2413 chip", 56,132,276,48}, + {NULL,NULL,"High-Quality FM: ON", "Adjust YM2612/YM2413 resampling quality", 56,132,276,48}, + {NULL,NULL,"FM Resolution: MAX", "Adjust YM2612 DAC precision", 56,132,276,48}, + {NULL,NULL,"FM Volume: 1.00", "Adjust YM2612/YM2413 output level", 56,132,276,48}, + {NULL,NULL,"PSG Volume: 2.50", "Adjust SN76489 output level", 56,132,276,48}, + {NULL,NULL,"PSG Noise Boost: OFF", "Boost SN76489 Noise Channel", 56,132,276,48}, + {NULL,NULL,"Audio Out: STEREO", "Select audio mixing output type", 56,132,276,48}, + {NULL,NULL,"Filtering: 3-BAND EQ", "Setup Audio filtering", 56,132,276,48}, + {NULL,NULL,"Low Gain: 1.00", "Adjust EQ Low Band Gain", 56,132,276,48}, + {NULL,NULL,"Mid Gain: 1.00", "Adjust EQ Mid Band Gain", 56,132,276,48}, + {NULL,NULL,"High Gain: 1.00", "Adjust EQ High Band Gain", 56,132,276,48}, + {NULL,NULL,"Low Freq: 200 Hz", "Adjust EQ Lowest Frequency", 56,132,276,48}, + {NULL,NULL,"High Freq: 20000 Hz", "Adjust EQ Highest Frequency", 56,132,276,48} +}; + +/* System options */ +static gui_item items_system[10] = +{ + {NULL,NULL,"Console Hardware: AUTO", "Select system hardware model", 56,132,276,48}, + {NULL,NULL,"Console Region: AUTO", "Select system region", 56,132,276,48}, + {NULL,NULL,"VDP Mode: AUTO", "Select VDP mode", 56,132,276,48}, + {NULL,NULL,"System Clock: AUTO", "Select system clock frequency", 56,132,276,48}, + {NULL,NULL,"System Boot: BIOS&CART", "Select system booting method", 56,132,276,48}, + {NULL,NULL,"System Lockups: ON", "Enable/disable original system lock-ups", 56,132,276,48}, + {NULL,NULL,"68k Address Error: ON", "Enable/disable 68k address error exceptions", 56,132,276,48}, + {NULL,NULL,"Lock-on: OFF", "Select Lock-On cartridge type", 56,132,276,48}, + {NULL,NULL,"Cartridge Swap: OFF", "Enable/disable cartridge hot swap", 56,132,276,48}, + {NULL,NULL,"SVP Cycles: 1500", "Adjust SVP chip emulation speed", 56,132,276,48} +}; + +/* Video options */ +#ifdef HW_RVL +static gui_item items_video[13] = +#else +static gui_item items_video[11] = +#endif +{ + {NULL,NULL,"Display: PROGRESSIVE", "Select video mode", 56,132,276,48}, + {NULL,NULL,"TV mode: 50/60Hz", "Select video refresh rate", 56,132,276,48}, + {NULL,NULL,"VSYNC: AUTO", "Enable/disable sync with Video Hardware", 56,132,276,48}, + {NULL,NULL,"GX Bilinear Filter: OFF", "Enable/disable texture hardware filtering", 56,132,276,48}, + {NULL,NULL,"GX Deflickering Filter: OFF","Enable/disable GX hardware filtering", 56,132,276,48}, +#ifdef HW_RVL + {NULL,NULL,"VI Trap Filter: ON", "Enable/disable video hardware filtering", 56,132,276,48}, + {NULL,NULL,"VI Gamma Correction: 1.0", "Adjust video hardware gamma correction", 56,132,276,48}, +#endif + {NULL,NULL,"NTSC Filter: COMPOSITE", "Enable/disable NTSC software filtering", 56,132,276,48}, + {NULL,NULL,"Borders: OFF", "Enable/disable overscan emulation", 56,132,276,48}, + {NULL,NULL,"GG screen: ORIGINAL", "Enable/disable Game Gear extended screen", 56,132,276,48}, + {NULL,NULL,"Aspect: ORIGINAL (4:3)", "Select display aspect ratio", 56,132,276,48}, + {NULL,NULL,"Screen Position (+0,+0)", "Adjust display position", 56,132,276,48}, + {NULL,NULL,"Screen Scaling (+0,+0)", "Adjust display scaling", 56,132,276,48} +}; + +/* Menu options */ +static gui_item items_prefs[11] = +{ + {NULL,NULL,"Auto ROM Load: OFF", "Enable/disable automatic ROM loading on startup", 56,132,276,48}, + {NULL,NULL,"Auto Cheats: OFF", "Enable/disable automatic cheats activation", 56,132,276,48}, + {NULL,NULL,"Auto Saves: OFF", "Enable/disable automatic saves", 56,132,276,48}, + {NULL,NULL,"ROM Load Device: SD", "Configure default device for ROM files", 56,132,276,48}, + {NULL,NULL,"Saves Device: FAT", "Configure default device for Save files", 56,132,276,48}, + {NULL,NULL,"SFX Volume: 100", "Adjust sound effects volume", 56,132,276,48}, + {NULL,NULL,"BGM Volume: 100", "Adjust background music volume", 56,132,276,48}, + {NULL,NULL,"BG Overlay: ON", "Enable/disable background overlay", 56,132,276,48}, + {NULL,NULL,"Screen Width: 658", "Adjust menu screen width in pixels", 56,132,276,48}, + {NULL,NULL,"Show CD Leds: OFF", "Enable/disable CD leds display", 56,132,276,48}, + {NULL,NULL,"Show FPS: OFF", "Enable/disable FPS counter", 56,132,276,48}, +}; + +/* Save Manager */ +static gui_item items_saves[9] = +{ + {NULL,NULL,"","" ,0,0,0,0}, + {NULL,NULL,"","" ,0,0,0,0}, + {NULL,NULL,"","" ,0,0,0,0}, + {NULL,NULL,"","" ,0,0,0,0}, + {NULL,NULL,"","" ,0,0,0,0}, + {NULL,NULL,"","Load file" ,0,0,0,0}, + {NULL,NULL,"","Set as default file",0,0,0,0}, + {NULL,NULL,"","Delete file" ,0,0,0,0}, + {NULL,NULL,"","Save file" ,0,0,0,0} +}; + +/*****************************************************************************/ +/* Menu Buttons description */ +/*****************************************************************************/ + +/* Generic Buttons for list menu */ +static gui_butn arrow_up = {&arrow_up_data,BUTTON_ACTIVE|BUTTON_OVER_SFX,{0,0,0,0},14,76,360,32}; +static gui_butn arrow_down = {&arrow_down_data,BUTTON_ACTIVE|BUTTON_OVER_SFX,{0,0,0,0},14,368,360,32}; + +/* Generic list menu */ +static gui_butn buttons_list[4] = +{ + {&button_text_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX,{1,1,0,0},56,132,276,48}, + {&button_text_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX,{1,1,0,0},56,188,276,48}, + {&button_text_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX,{1,1,0,0},56,244,276,48}, + {&button_text_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX,{1,1,0,0},56,300,276,48} +}; + +/* Main menu */ +static gui_butn buttons_main[10] = +{ + {&button_icon_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{0,0,0,1}, 80,140,148,132}, + {&button_icon_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{0,0,1,1},246,140,148,132}, + {&button_icon_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{0,0,1,0},412,140,148,132}, + {&button_icon_data, BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{3,4,0,1}, 80,194,148,132}, + {&button_icon_data, BUTTON_OVER_SFX ,{3,4,1,1},246,194,148,132}, + {&button_icon_data, BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{3,3,1,0},412,194,148,132}, + {NULL , BUTTON_OVER_SFX ,{3,1,0,2}, 10,334, 84, 32}, + {NULL , BUTTON_OVER_SFX ,{4,0,0,2}, 10,372, 84, 32}, + {NULL , BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{3,1,1,0},546,334, 84, 32}, + {NULL , BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{1,0,2,0},546,372, 84, 32} +}; + +/* Controllers Menu */ +static gui_butn buttons_ctrls[13] = +{ + {&button_icon_data ,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX ,{0,1,0,2}, 60, 88,148,132}, + {&button_icon_data ,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX ,{1,0,0,5}, 60,258,148,132}, + {NULL ,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{0,1,2,0},250, 79, 84, 32}, + {NULL ,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{1,1,3,0},250,117, 84, 32}, + {NULL ,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{1,1,4,0},250,155, 84, 32}, + {NULL ,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{1,1,5,0},250,193, 84, 32}, + {NULL ,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{1,1,5,0},250,249, 84, 32}, + {NULL ,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{1,1,6,0},250,287, 84, 32}, + {NULL ,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{1,1,7,0},250,325, 84, 32}, + {NULL ,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{1,0,8,0},250,363, 84, 32}, + {&button_icon_sm_data ,BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX ,{0,1,1,0},436,168,160, 52}, + {&button_icon_sm_data ,BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX ,{1,1,0,0},436,232,160, 52}, + {&button_icon_sm_data ,BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX|BUTTON_SELECT_SFX ,{1,0,0,0},436,296,160, 52} +}; + +/* Load Game menu */ +static gui_butn buttons_load[6] = +{ + {&button_icon_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{0,3,0,1}, 80,120,148,132}, + {&button_icon_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{0,3,1,1},246,120,148,132}, + {&button_icon_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{0,3,1,0},412,120,148,132}, + {&button_icon_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{3,0,0,1}, 80,264,148,132}, + {&button_icon_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{3,0,1,1},246,264,148,132}, + {&button_icon_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{3,0,1,0},412,264,148,132} +}; + +/* Options menu */ +static gui_butn buttons_options[5] = +{ + {&button_icon_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{0,3,0,1}, 80,120,148,132}, + {&button_icon_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{0,3,1,1},246,120,148,132}, + {&button_icon_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{0,2,1,1},412,120,148,132}, + {&button_icon_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{3,0,1,1},162,264,148,132}, + {&button_icon_data,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX|BUTTON_SELECT_SFX,{2,0,1,0},330,264,148,132} +}; + +/* Save Manager Menu */ +static gui_butn buttons_saves[9] = +{ + {&button_text_data ,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX,{0,1,0,0}, 56,102,276,48}, + {&button_text_data ,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX,{1,1,0,0}, 56,158,276,48}, + {&button_text_data ,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX,{1,1,0,0}, 56,214,276,48}, + {&button_text_data ,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX,{1,1,0,0}, 56,270,276,48}, + {&button_text_data ,BUTTON_VISIBLE|BUTTON_ACTIVE|BUTTON_OVER_SFX,{1,0,0,0}, 56,326,276,48}, + {&button_load_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{0,1,0,0},530,130, 56,56}, + {&button_special_data,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{1,1,0,0},530,196, 56,56}, + {&button_delete_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{1,1,0,0},530,262, 56,56}, + {&button_save_data ,BUTTON_ACTIVE|BUTTON_SLIDE_RIGHT|BUTTON_OVER_SFX,{1,0,0,0},530,328, 56,56} +}; + +/*****************************************************************************/ +/* Menu descriptions */ +/*****************************************************************************/ + +/* Main menu */ +static gui_menu menu_main = +{ + "", + 0,0, + 10,10,4,0, + items_main, + buttons_main, + bg_main, + {NULL,NULL}, + {NULL,NULL}, + NULL +}; + +/* Main menu */ +gui_menu menu_ctrls = +{ + "Controller Settings", + 0,0, + 13,13,8,0, + items_ctrls, + buttons_ctrls, + bg_ctrls, + {&action_cancel, &action_select}, + {NULL,NULL}, + ctrlmenu_cb +}; + +/* Load Game menu */ +static gui_menu menu_load = +{ + "Load Game", + 0,0, + 6,6,5,0, + items_load, + buttons_load, + bg_misc, + {&action_cancel, &action_select}, + {NULL,NULL}, + NULL +}; + +/* Options menu */ +static gui_menu menu_options = +{ + "Settings", + 0,0, + 5,5,5,0, + items_options, + buttons_options, + bg_misc, + {&action_cancel, &action_select}, + {NULL,NULL}, + NULL +}; + +/* System Options menu */ +static gui_menu menu_system = +{ + "System Settings", + 0,0, + 10,4,6,0, + items_system, + buttons_list, + bg_list, + {&action_cancel, &action_select}, + {&arrow_up,&arrow_down}, + NULL +}; + +/* Video Options menu */ +static gui_menu menu_video = +{ + "Video Settings", + 0,0, + 10,4,6,0, + items_video, + buttons_list, + bg_list, + {&action_cancel, &action_select}, + {&arrow_up,&arrow_down}, + NULL +}; + +/* Sound Options menu */ +static gui_menu menu_audio = +{ + "Audio Settings", + 0,0, + 9,4,6,0, + items_audio, + buttons_list, + bg_list, + {&action_cancel, &action_select}, + {&arrow_up,&arrow_down}, + NULL +}; + +/* Sound Options menu */ +static gui_menu menu_prefs = +{ + "Menu Settings", + 0,0, + 11,4,6,0, + items_prefs, + buttons_list, + bg_list, + {&action_cancel, &action_select}, + {&arrow_up,&arrow_down}, + NULL +}; + + +/* Save Manager menu */ +static gui_menu menu_saves = +{ + "Save Manager", + 0,0, + 9,9,8,0, + items_saves, + buttons_saves, + bg_saves, + {&action_cancel, &action_select}, + {NULL,NULL}, + savemenu_cb +}; + +/**************************************************************************** + * GUI Settings menu + * + ****************************************************************************/ +static void update_screen_w(void) +{ + vmode->viWidth = config.screen_w; + vmode->viXOrigin = (VI_MAX_WIDTH_NTSC -config.screen_w)/2; + VIDEO_Configure(vmode); + VIDEO_Flush(); +} + +static void update_bgm(void) +{ + SetVolumeOgg(((int)config.bgm_volume * 255) / 100); +} + +static void prefmenu () +{ + int ret, quit = 0; + gui_menu *m = &menu_prefs; + gui_item *items = m->items; + + sprintf (items[0].text, "Auto ROM Load: %s", config.autoload ? "ON":"OFF"); + sprintf (items[1].text, "Auto Cheats: %s", config.autocheat ? "ON":"OFF"); + if (config.s_auto == 3) sprintf (items[2].text, "Auto Saves: ALL"); + else if (config.s_auto == 2) sprintf (items[2].text, "Auto Saves: STATE ONLY"); + else if (config.s_auto == 1) sprintf (items[2].text, "Auto Saves: SRAM ONLY"); + else sprintf (items[2].text, "Auto Saves: NONE"); +#ifdef HW_RVL + if (config.l_device == 1) sprintf (items[3].text, "ROM Load Device: USB"); + else if (config.l_device == 2) sprintf (items[3].text, "ROM Load Device: DVD"); +#else + if (config.l_device == 1) sprintf (items[3].text, "ROM Load Device: DVD"); +#endif + else sprintf (items[3].text, "ROM Load Device: SD"); + if (config.s_device == 1) sprintf (items[4].text, "Saves Device: MCARD A"); + else if (config.s_device == 2) sprintf (items[4].text, "Saves Device: MCARD B"); + else sprintf (items[4].text, "Saves Device: FAT"); + sprintf (items[5].text, "SFX Volume: %1.1f", config.sfx_volume); + sprintf (items[6].text, "BGM Volume: %1.1f", config.bgm_volume); + sprintf (items[7].text, "BG Overlay: %s", config.bg_overlay ? "ON":"OFF"); + sprintf (items[8].text, "Screen Width: %d", config.screen_w); + sprintf (items[9].text, "Show CD Leds: %s", config.cd_leds ? "ON":"OFF"); + sprintf (items[10].text, "Show FPS: %s", config.fps ? "ON":"OFF"); + + GUI_InitMenu(m); + GUI_SlideMenuTitle(m,strlen("Menu ")); + + while (quit == 0) + { + ret = GUI_RunMenu(m); + + switch (ret) + { + case 0: /* Auto load last ROM file on startup */ + config.autoload ^= 1; + sprintf (items[0].text, "Auto ROM Load: %s", config.autoload ? "ON":"OFF"); + break; + + case 1: /* Cheats automatic activation */ + config.autocheat ^= 1; + sprintf (items[1].text, "Auto Cheats: %s", config.autocheat ? "ON":"OFF"); + break; + + case 2: /*** Auto load/save STATE & SRAM files ***/ + config.s_auto = (config.s_auto + 1) % 4; + if (config.s_auto == 3) sprintf (items[2].text, "Auto Saves: ALL"); + else if (config.s_auto == 2) sprintf (items[2].text, "Auto Saves: STATE ONLY"); + else if (config.s_auto == 1) sprintf (items[2].text, "Auto Saves: SRAM ONLY"); + else sprintf (items[2].text, "Auto Saves: NONE"); + break; + + case 3: /*** Default ROM device ***/ +#ifdef HW_RVL + config.l_device = (config.l_device + 1) % 3; + if (config.l_device == 1) sprintf (items[3].text, "ROM Load Device: USB"); + else if (config.l_device == 2) sprintf (items[3].text, "ROM Load Device: DVD"); +#else + config.l_device ^= 1; + if (config.l_device == 1) sprintf (items[3].text, "ROM Load Device: DVD"); +#endif + else sprintf (items[3].text, "ROM Load Device: SD"); + break; + + case 4: /*** Default saves device ***/ + config.s_device = (config.s_device + 1) % 3; + if (config.s_device == 1) sprintf (items[4].text, "Saves Device: MCARD A"); + else if (config.s_device == 2) sprintf (items[4].text, "Saves Device: MCARD B"); + else sprintf (items[4].text, "Saves Device: FAT"); + break; + + case 5: /*** Sound effects volume ***/ + GUI_OptionBox(m,0,"SFX Volume",(void *)&config.sfx_volume,10.0,0.0,100.0,0); + sprintf (items[5].text, "SFX Volume: %1.1f", config.sfx_volume); + break; + + case 6: /*** Background music volume ***/ + GUI_OptionBox(m,update_bgm,"BGM Volume",(void *)&config.bgm_volume,10.0,0.0,100.0,0); + sprintf (items[6].text, "BGM Volume: %1.1f", config.bgm_volume); + break; + + case 7: /*** Background overlay ***/ + config.bg_overlay ^= 1; + if (config.bg_overlay) + { + bg_main[1].state |= IMAGE_VISIBLE; + bg_misc[1].state |= IMAGE_VISIBLE; + bg_ctrls[1].state |= IMAGE_VISIBLE; + bg_list[1].state |= IMAGE_VISIBLE; + bg_saves[2].state |= IMAGE_VISIBLE; + sprintf (items[7].text, "BG Overlay: ON"); + } + else + { + bg_main[1].state &= ~IMAGE_VISIBLE; + bg_misc[1].state &= ~IMAGE_VISIBLE; + bg_ctrls[1].state &= ~IMAGE_VISIBLE; + bg_list[1].state &= ~IMAGE_VISIBLE; + bg_saves[2].state &= ~IMAGE_VISIBLE; + sprintf (items[7].text, "BG Overlay: OFF"); + } + break; + + case 8: /*** Screen Width ***/ + GUI_OptionBox(m,update_screen_w,"Screen Width",(void *)&config.screen_w,2,640,VI_MAX_WIDTH_NTSC,1); + sprintf (items[8].text, "Screen Width: %d", config.screen_w); + break; + + case 9: /*** CD LEDS ***/ + config.cd_leds ^= 1; + sprintf (items[9].text, "Show CD Leds: %s", config.cd_leds ? "ON":"OFF"); + break; + + case 10: /*** FPS counter ***/ + config.fps ^= 1; + sprintf (items[10].text, "Show FPS: %s", config.fps ? "ON":"OFF"); + break; + + case -1: + quit = 1; + break; + } + } + + /* stop DVD drive when not in use */ + if (config.l_device != 2) + { +#ifdef HW_RVL + DI_StopMotor(); +#else + vu32* const dvd = (u32*)0xCC006000; + dvd[0] = 0x2e; + dvd[1] = 0; + dvd[2] = 0xe3000000; + dvd[3] = 0; + dvd[4] = 0; + dvd[5] = 0; + dvd[6] = 0; + dvd[7] = 1; + while (dvd[7] & 1); + dvd[0] = 0x14; + dvd[1] = 0; +#endif + } + + GUI_DeleteMenu(m); +} + +/**************************************************************************** + * Audio Settings menu + * + ****************************************************************************/ +static void soundmenu () +{ + int ret, quit = 0; + float fm_volume = (float)config.fm_preamp/100.0; + float psg_volume = (float)config.psg_preamp/100.0; + gui_menu *m = &menu_audio; + gui_item *items = m->items; + + if (config.ym2413 == 0) sprintf (items[0].text, "Master System FM: OFF"); + else if (config.ym2413 == 1) sprintf (items[0].text, "Master System FM: ON"); + else sprintf (items[0].text, "Master System FM: AUTO"); + + if (config.hq_fm) sprintf (items[1].text, "High-Quality FM: ON"); + else sprintf (items[1].text, "High-Quality FM: OFF"); + + if (config.dac_bits < 14) sprintf (items[2].text, "FM Resolution: %d bits", config.dac_bits); + else sprintf (items[2].text, "FM Resolution: MAX"); + + sprintf (items[3].text, "FM Volume: %1.2f", fm_volume); + sprintf (items[4].text, "PSG Volume: %1.2f", psg_volume); + sprintf (items[5].text, "PSG Noise Boost: %s", config.psgBoostNoise ? "ON":"OFF"); + sprintf (items[6].text, "Audio Out: %s", config.mono ? "MONO":"STEREO"); + + if (config.filter == 2) + { + float lg = (float)config.lg/100.0; + float mg = (float)config.mg/100.0; + float hg = (float)config.hg/100.0; + + sprintf(items[7].text, "Filtering: 3-BAND EQ"); + sprintf(items[8].text, "Low Gain: %1.2f", lg); + strcpy(items[8].comment, "Adjust EQ Low Band Gain"); + sprintf(items[9].text, "Middle Gain: %1.2f", mg); + sprintf(items[10].text, "High Gain: %1.2f", hg); + sprintf(items[11].text, "Low Freq: %d", config.low_freq); + sprintf(items[12].text, "High Freq: %d", config.high_freq); + m->max_items = 13; + } + else if (config.filter == 1) + { + int16 lp_range = (config.lp_range * 100 + 0xffff) / 0x10000; + sprintf (items[7].text, "Filtering: LOW-PASS"); + sprintf (items[8].text, "Low-Pass Rate: %d %%", lp_range); + strcpy (items[9].comment, "Adjust Low Pass filter"); + m->max_items = 9; + } + else + { + sprintf (items[7].text, "Filtering: OFF"); + m->max_items = 8; + } + + GUI_InitMenu(m); + GUI_SlideMenuTitle(m,strlen("Audio ")); + + while (quit == 0) + { + ret = GUI_RunMenu(m); + + switch (ret) + { + case 0: + { + config.ym2413++; + if (config.ym2413 > 2) config.ym2413 = 0; + if (config.ym2413 == 0) sprintf (items[0].text, "Master System FM: OFF"); + else if (config.ym2413 == 1) sprintf (items[0].text, "Master System FM: ON"); + else sprintf (items[0].text, "Master System FM: AUTO"); + + /* Automatic detection */ + if ((config.ym2413 & 2) && system_hw && ((system_hw & SYSTEM_PBC) != SYSTEM_MD)) + { + /* detect if game is using YM2413 */ + sms_cart_init(); + + /* restore SRAM */ + slot_autoload(0,config.s_device); + } + break; + } + + case 1: + { + config.hq_fm ^= 1; + if (config.hq_fm) sprintf (items[1].text, "High-Quality FM: ON"); + else sprintf (items[1].text, "High-Quality FM: OFF"); + break; + } + + case 2: + { + config.dac_bits++; + if (config.dac_bits > 14) config.dac_bits = 7; + if (config.dac_bits < 14) sprintf (items[2].text, "FM Resolution: %d bits", config.dac_bits); + else sprintf (items[2].text, "FM Resolution: MAX"); + YM2612Config(config.dac_bits); + break; + } + + case 3: + { + GUI_OptionBox(m,0,"FM Volume",(void *)&fm_volume,0.01,0.0,5.0,0); + sprintf (items[3].text, "FM Volume: %1.2f", fm_volume); + config.fm_preamp = (int)(fm_volume * 100.0 + 0.5); + break; + } + + case 4: + { + GUI_OptionBox(m,0,"PSG Volume",(void *)&psg_volume,0.01,0.0,5.0,0); + sprintf (items[4].text, "PSG Volume: %1.2f", psg_volume); + config.psg_preamp = (int)(psg_volume * 100.0 + 0.5); + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + SN76489_Config(0, config.psg_preamp, config.psgBoostNoise, 0xff); + } + else + { + SN76489_Config(0, config.psg_preamp, config.psgBoostNoise, io_reg[6]); + } + break; + } + + case 5: + { + config.psgBoostNoise ^= 1; + sprintf (items[5].text, "PSG Noise Boost: %s", config.psgBoostNoise ? "ON":"OFF"); + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + SN76489_Config(0, config.psg_preamp, config.psgBoostNoise, 0xff); + } + else + { + SN76489_Config(0, config.psg_preamp, config.psgBoostNoise, io_reg[6]); + } + break; + } + + case 6: + { + config.mono ^= 1; + sprintf (items[6].text, "Audio Out: %s", config.mono ? "MONO":"STEREO"); + break; + } + + case 7: + { + config.filter = (config.filter + 1) % 3; + if (config.filter == 2) + { + float lg = (float)config.lg/100.0; + sprintf (items[7].text, "Filtering: 3-BAND EQ"); + sprintf (items[8].text, "Low Gain: %1.2f", lg); + strcpy (items[8].comment, "Adjust EQ Low Band Gain"); + m->max_items = 13; + audio_set_equalizer(); + } + else if (config.filter == 1) + { + int lp_range = (config.lp_range * 100 + 0xffff) / 0x10000; + sprintf (items[7].text, "Filtering: LOW-PASS"); + sprintf (items[8].text, "Low-Pass Rate: %d %%", lp_range); + strcpy (items[8].comment, "Adjust Low Pass filter"); + m->max_items = 9; + } + else + { + sprintf (items[7].text, "Filtering: OFF"); + m->max_items = 8; + } + + while ((m->offset + 4) > m->max_items) + { + m->offset--; + m->selected++; + } + break; + } + + case 8: + { + if (config.filter == 1) + { + int16 lp_range = (config.lp_range * 100 + 0xffff) / 0x10000; + GUI_OptionBox(m,0,"Low-Pass Rate",(void *)&lp_range,1,0,100,1); + sprintf (items[8].text, "Low-Pass Rate: %d %%", lp_range); + config.lp_range = (lp_range * 0x10000) / 100; + } + else + { + float lg = (float)config.lg/100.0; + GUI_OptionBox(m,0,"Low Gain",(void *)&lg,0.01,0.0,2.0,0); + sprintf (items[8].text, "Low Gain: %1.2f", lg); + config.lg = (int)(lg * 100.0); + audio_set_equalizer(); + } + break; + } + + case 9: + { + float mg = (float)config.mg/100.0; + GUI_OptionBox(m,0,"Middle Gain",(void *)&mg,0.01,0.0,2.0,0); + sprintf (items[9].text, "Middle Gain: %1.2f", mg); + config.mg = (int)(mg * 100.0); + audio_set_equalizer(); + break; + } + + case 10: + { + float hg = (float)config.hg/100.0; + GUI_OptionBox(m,0,"High Gain",(void *)&hg,0.01,0.0,2.0,0); + sprintf (items[10].text, "High Gain: %1.2f", hg); + config.hg = (int)(hg * 100.0); + audio_set_equalizer(); + break; + } + + case 11: + { + GUI_OptionBox(m,0,"Low Frequency",(void *)&config.low_freq,10,0,config.high_freq,1); + sprintf (items[11].text, "Low Freq: %d", config.low_freq); + audio_set_equalizer(); + break; + } + + case 12: + { + GUI_OptionBox(m,0,"High Frequency",(void *)&config.high_freq,100,config.low_freq,30000,1); + sprintf (items[12].text, "High Freq: %d", config.high_freq); + audio_set_equalizer(); + break; + } + + case -1: + { + quit = 1; + break; + } + } + } + + GUI_DeleteMenu(m); +} + +/**************************************************************************** + * System Settings menu + * + ****************************************************************************/ +static const uint16 vc_table[4][2] = +{ + /* NTSC, PAL */ + {0xDA , 0xF2}, /* Mode 4 (192 lines) */ + {0xEA , 0x102}, /* Mode 5 (224 lines) */ + {0xDA , 0xF2}, /* Mode 4 (192 lines) */ + {0x106, 0x10A} /* Mode 5 (240 lines) */ +}; + +static void systemmenu () +{ + int ret, quit = 0; + int reinit = 0; + gui_menu *m = &menu_system; + gui_item *items = m->items; + + if (config.system == 0) + sprintf (items[0].text, "Console Type: AUTO"); + else if (config.system == SYSTEM_SG) + sprintf (items[0].text, "Console Type: SG-1000"); + else if (config.system == SYSTEM_MARKIII) + sprintf (items[0].text, "Console Type: MARK-III"); + else if (config.system == SYSTEM_SMS) + sprintf (items[0].text, "Console Type: SMS"); + else if (config.system == SYSTEM_SMS2) + sprintf (items[0].text, "Console Type: SMS II"); + else if (config.system == SYSTEM_GG) + sprintf (items[0].text, "Console Type: GG"); + else if (config.system == SYSTEM_MD) + sprintf (items[0].text, "Console Type: MD"); + + if (config.region_detect == 0) + sprintf (items[1].text, "Console Region: AUTO"); + else if (config.region_detect == 1) + sprintf (items[1].text, "Console Region: USA"); + else if (config.region_detect == 2) + sprintf (items[1].text, "Console Region: EUROPE"); + else if (config.region_detect == 3) + sprintf (items[1].text, "Console Region: JAPAN"); + + if (config.vdp_mode == 0) + sprintf (items[2].text, "VDP Mode: AUTO"); + else if (config.vdp_mode == 1) + sprintf (items[2].text, "VDP Mode: NTSC"); + else if (config.vdp_mode == 2) + sprintf (items[2].text, "VDP Mode: PAL"); + + if (config.master_clock == 0) + sprintf (items[3].text, "System Clock: AUTO"); + else if (config.master_clock == 1) + sprintf (items[3].text, "System Clock: NTSC"); + else if (config.master_clock == 2) + sprintf (items[3].text, "System Clock: PAL"); + + sprintf (items[4].text, "System Boot: %s", (config.bios & 1) ? ((config.bios & 2) ? "BIOS&CART" : "BIOS ONLY") : "CART"); + sprintf (items[5].text, "System Lockups: %s", config.force_dtack ? "OFF" : "ON"); + sprintf (items[6].text, "68k Address Error: %s", config.addr_error ? "ON" : "OFF"); + + if (config.lock_on == TYPE_GG) + sprintf (items[7].text, "Lock-On: GAME GENIE"); + else if (config.lock_on == TYPE_AR) + sprintf (items[7].text, "Lock-On: ACTION REPLAY"); + else if (config.lock_on == TYPE_SK) + sprintf (items[7].text, "Lock-On: SONIC&KNUCKLES"); + else + sprintf (items[7].text, "Lock-On: OFF"); + + sprintf (items[8].text, "Cartridge Swap: %s", (config.hot_swap & 1) ? "ON":"OFF"); + + if (svp) + { + sprintf (items[9].text, "SVP Cycles: %d", SVP_cycles); + m->max_items = 10; + } + else + { + m->max_items = 9; + } + + GUI_InitMenu(m); + GUI_SlideMenuTitle(m,strlen("System ")); + + while (quit == 0) + { + ret = GUI_RunMenu(m); + + switch (ret) + { + case 0: /*** Force System Hardware ***/ + { + if (config.system == SYSTEM_MD) + { + config.system = 0; + sprintf (items[0].text, "Console Type: AUTO"); + + /* Default system hardware (auto) */ + if (system_hw) system_hw = romtype; + } + else if (config.system == 0) + { + config.system = SYSTEM_SG; + sprintf (items[0].text, "Console Type: SG-1000"); + if (system_hw) system_hw = SYSTEM_SG; + } + else if (config.system == SYSTEM_SG) + { + config.system = SYSTEM_MARKIII; + sprintf (items[0].text, "Console Type: MARK-III"); + if (system_hw) system_hw = SYSTEM_MARKIII; + } + else if (config.system == SYSTEM_MARKIII) + { + config.system = SYSTEM_SMS; + sprintf (items[0].text, "Console Type: SMS"); + if (system_hw) system_hw = SYSTEM_SMS; + } + else if (config.system == SYSTEM_SMS) + { + config.system = SYSTEM_SMS2; + sprintf (items[0].text, "Console Type: SMS II"); + if (system_hw) system_hw = SYSTEM_SMS2; + } + else if (config.system == SYSTEM_SMS2) + { + config.system = SYSTEM_GG; + sprintf (items[0].text, "Console Type: GG"); + + if (romtype == SYSTEM_GG) + { + /* Game Gear mode */ + if (system_hw) system_hw = SYSTEM_GG; + } + else + { + /* Game Gear in MS compatibility mode */ + if (system_hw) system_hw = SYSTEM_GGMS; + } + } + else if (config.system == SYSTEM_GG) + { + config.system = SYSTEM_MD; + sprintf (items[0].text, "Console Type: MD"); + + if (romtype & SYSTEM_MD) + { + /* Default mode */ + if (system_hw) system_hw = romtype; + } + else + { + /* Mega Drive in MS compatibility mode */ + if (system_hw) system_hw = SYSTEM_PBC; + } + } + + if (system_hw) + { + /* restore previous input settings */ + if (old_system[0] != -1) + { + input.system[0] = old_system[0]; + } + if (old_system[1] != -1) + { + input.system[1] = old_system[1]; + } + + /* reinitialize audio streams */ + audio_init(snd.sample_rate, snd.frame_rate); + + /* force hard reset */ + system_init(); + system_reset(); + + /* restore SRAM */ + slot_autoload(0,config.s_device); + } + + break; + } + + case 1: /*** Force Region ***/ + { + config.region_detect = (config.region_detect + 1) % 4; + if (config.region_detect == 0) + sprintf (items[1].text, "Console Region: AUTO"); + else if (config.region_detect == 1) + sprintf (items[1].text, "Console Region: USA"); + else if (config.region_detect == 2) + sprintf (items[1].text, "Console Region: EUR"); + else if (config.region_detect == 3) + sprintf (items[1].text, "Console Region: JAPAN"); + + /* force system reinitialization + region BIOS */ + reinit = 2; + break; + } + + case 2: /*** Force VDP mode ***/ + { + config.vdp_mode = (config.vdp_mode + 1) % 3; + if (config.vdp_mode == 0) + sprintf (items[2].text, "VDP Mode: AUTO"); + else if (config.vdp_mode == 1) + sprintf (items[2].text, "VDP Mode: NTSC"); + else if (config.vdp_mode == 2) + sprintf (items[2].text, "VDP Mode: PAL"); + + /* force system reinitialization */ + reinit = 1; + break; + } + + case 3: /*** Force Master Clock ***/ + { + config.master_clock = (config.master_clock + 1) % 3; + if (config.master_clock == 0) + sprintf (items[3].text, "System Clock: AUTO"); + else if (config.master_clock == 1) + sprintf (items[3].text, "System Clock: NTSC"); + else if (config.master_clock == 2) + sprintf (items[3].text, "System Clock: PAL"); + + /* force system reinitialization */ + reinit = 1; + break; + } + + case 4: /*** BIOS support ***/ + { + if (config.bios == 0) config.bios = 3; + else if (config.bios == 3) config.bios = 1; + else config.bios = 0; + sprintf (items[4].text, "System Boot: %s", (config.bios & 1) ? ((config.bios & 2) ? "BIOS&CART " : "BIOS ONLY") : "CART"); + if ((system_hw == SYSTEM_MD) || (system_hw & SYSTEM_GG) || (system_hw & SYSTEM_SMS)) + { + /* force hard reset */ + system_init(); + system_reset(); + + /* restore SRAM */ + slot_autoload(0,config.s_device); + } + break; + } + + case 5: /*** force DTACK ***/ + { + config.force_dtack ^= 1; + sprintf (items[5].text, "System Lockups: %s", config.force_dtack ? "OFF" : "ON"); + break; + } + + case 6: /*** 68k Address Error ***/ + { + config.addr_error ^= 1; + m68k.aerr_enabled = config.addr_error; + sprintf (items[6].text, "68k Address Error: %s", config.addr_error ? "ON" : "OFF"); + break; + } + + case 7: /*** Cart Lock-On ***/ + { + config.lock_on = (config.lock_on + 1) % (TYPE_SK + 1); + if (config.lock_on == TYPE_GG) + sprintf (items[7].text, "Lock-On: GAME GENIE"); + else if (config.lock_on == TYPE_AR) + sprintf (items[7].text, "Lock-On: ACTION REPLAY"); + else if (config.lock_on == TYPE_SK) + sprintf (items[7].text, "Lock-On: SONIC&KNUCKLES"); + else + sprintf (items[7].text, "Lock-On: OFF"); + + if ((system_hw == SYSTEM_MD) || (system_hw == SYSTEM_PICO)) + { + /* force hard reset */ + system_init(); + system_reset(); + + /* restore SRAM */ + slot_autoload(0,config.s_device); + + /* Action Replay switch */ + if (areplay_get_status() < 0) + { + menu_main.buttons[6].state &= ~(BUTTON_VISIBLE | BUTTON_ACTIVE); + menu_main.items[6].data = NULL; + menu_main.cb = NULL; + menu_main.buttons[3].shift[1] = 4; + menu_main.buttons[7].shift[0] = 4; + menu_main.buttons[8].shift[2] = 1; + } + else + { + menu_main.buttons[6].state |= (BUTTON_VISIBLE | BUTTON_ACTIVE); + menu_main.items[6].data = Button_sm_grey_png; + menu_main.cb = mainmenu_cb; + menu_main.buttons[3].shift[1] = 3; + menu_main.buttons[7].shift[0] = 1; + menu_main.buttons[8].shift[2] = 2; + } + } + break; + } + + case 8: /*** Cartridge Hot Swap ***/ + { + config.hot_swap ^= 1; + sprintf (items[8].text, "Cartridge Swap: %s", (config.hot_swap & 1) ? "ON":"OFF"); + break; + } + + case 9: /*** SVP cycles per line ***/ + { + GUI_OptionBox(m,0,"SVP Cycles",(void *)&SVP_cycles,1,1,1500,1); + sprintf (items[9].text, "SVP Cycles: %d", SVP_cycles); + break; + } + + case -1: + { + quit = 1; + break; + } + } + } + + if (reinit && system_hw) + { + /* reinitialize console region */ + get_region(NULL); + + /* framerate might have changed, reinitialize audio timings */ + audio_init(snd.sample_rate, get_framerate()); + + /* system with region BIOS should be reinitialized if region code has changed */ + if ((reinit & 2) && ((system_hw == SYSTEM_MCD) || ((system_hw & SYSTEM_SMS) && (config.bios & 1)))) + { + system_init(); + system_reset(); + + /* restore SRAM */ + slot_autoload(0,config.s_device); + } + else + { + /* reinitialize I/O region register */ + if (system_hw == SYSTEM_MD) + { + io_reg[0x00] = 0x20 | region_code | (config.bios & 1); + } + else if (system_hw == SYSTEM_MCD) + { + io_reg[0x00] = region_code | (config.bios & 1); + } + else + { + io_reg[0x00] = 0x80 | (region_code >> 1); + } + + /* reinitialize VDP */ + if (vdp_pal) + { + status |= 1; + lines_per_frame = 313; + } + else + { + status &= ~1; + lines_per_frame = 262; + } + + /* reinitialize VC max value */ + switch (bitmap.viewport.h) + { + case 192: + vc_max = vc_table[0][vdp_pal]; + break; + case 224: + vc_max = vc_table[1][vdp_pal]; + break; + case 240: + vc_max = vc_table[3][vdp_pal]; + break; + } + } + } + + GUI_DeleteMenu(m); +} + +/**************************************************************************** + * Video Settings menu + * + ****************************************************************************/ +#ifdef HW_RVL +#define VI_OFFSET 7 +static void update_gamma(void) +{ + VIDEO_SetGamma((int)(config.gamma * 10.0)); + VIDEO_Flush(); +} +#else +#define VI_OFFSET 5 +#endif + +static void videomenu () +{ + u16 state[2]; + int ret, quit = 0; + int reinit = 0; + gui_menu *m = &menu_video; + gui_item *items = m->items; + + if (config.render == 1) + sprintf (items[0].text,"Display: INTERLACED"); + else if (config.render == 2) + sprintf (items[0].text, "Display: PROGRESSIVE"); + else + sprintf (items[0].text, "Display: ORIGINAL"); + + if (config.tv_mode == 0) + sprintf (items[1].text, "TV Mode: 60HZ"); + else if (config.tv_mode == 1) + sprintf (items[1].text, "TV Mode: 50HZ"); + else + sprintf (items[1].text, "TV Mode: 50/60HZ"); + + if (config.vsync) + sprintf (items[2].text, "VSYNC: AUTO"); + else + sprintf (items[2].text, "VSYNC: OFF"); + + sprintf (items[3].text, "GX Bilinear Filter: %s", config.bilinear ? " ON" : "OFF"); + sprintf (items[4].text, "GX Deflickering Filter: %s", config.vfilter ? " ON" : "OFF"); + +#ifdef HW_RVL + sprintf (items[5].text, "VI Trap Filter: %s", config.trap ? " ON" : "OFF"); + sprintf (items[6].text, "VI Gamma Correction: %1.1f", config.gamma); +#endif + + if (config.ntsc == 1) + sprintf (items[VI_OFFSET].text, "NTSC Filter: COMPOSITE"); + else if (config.ntsc == 2) + sprintf (items[VI_OFFSET].text, "NTSC Filter: S-VIDEO"); + else if (config.ntsc == 3) + sprintf (items[VI_OFFSET].text, "NTSC Filter: RGB"); + else + sprintf (items[VI_OFFSET].text, "NTSC Filter: OFF"); + + if (config.overscan == 3) + sprintf (items[VI_OFFSET+1].text, "Borders: FULL"); + else if (config.overscan == 2) + sprintf (items[VI_OFFSET+1].text, "Borders: H ONLY"); + else if (config.overscan == 1) + sprintf (items[VI_OFFSET+1].text, "Borders: V ONLY"); + else + sprintf (items[VI_OFFSET+1].text, "Borders: NONE"); + + sprintf(items[VI_OFFSET+2].text, "GG Screen: %s", config.gg_extra ? "EXTENDED":"ORIGINAL"); + + if (config.aspect == 1) + sprintf (items[VI_OFFSET+3].text,"Aspect: ORIGINAL (4:3)"); + else if (config.aspect == 2) + sprintf (items[VI_OFFSET+3].text, "Aspect: ORIGINAL (16:9)"); + else + sprintf (items[VI_OFFSET+3].text, "Aspect: SCALED"); + + sprintf (items[VI_OFFSET+4].text, "Screen Position: (%s%02d,%s%02d)", + (config.xshift < 0) ? "":"+", config.xshift, + (config.yshift < 0) ? "":"+", config.yshift); + + sprintf (items[VI_OFFSET+5].text, "Screen Scaling: (%s%02d,%s%02d)", + (config.xscale < 0) ? "":"+", config.xscale, + (config.yscale < 0) ? "":"+", config.yscale); + + if (config.aspect) + m->max_items = VI_OFFSET+5; + else + m->max_items = VI_OFFSET+6; + + GUI_InitMenu(m); + GUI_SlideMenuTitle(m,strlen("Video ")); + + while (quit == 0) + { + ret = GUI_RunMenu(m); + + switch (ret) + { + case 0: /*** rendering ***/ + config.render = (config.render + 1) % 3; + if (config.render == 2) + { + /* progressive mode is only possible through component cable */ + if (!VIDEO_HaveComponentCable()) + { + config.render = 0; + } + } + if (config.render == 1) + sprintf (items[0].text,"Display: INTERLACED"); + else if (config.render == 2) + sprintf (items[0].text, "Display: PROGRESSIVE"); + else + sprintf (items[0].text, "Display: ORIGINAL"); + reinit = 1; + break; + + case 1: /*** tv mode ***/ + config.tv_mode = (config.tv_mode + 1) % 3; + if (config.tv_mode == 0) + sprintf (items[1].text, "TV Mode: 60HZ"); + else if (config.tv_mode == 1) + sprintf (items[1].text, "TV Mode: 50HZ"); + else + sprintf (items[1].text, "TV Mode: 50/60HZ"); + reinit = 1; + break; + + case 2: /*** VSYNC ***/ + config.vsync ^= 1; + if (config.vsync) + sprintf (items[2].text, "VSYNC: AUTO"); + else + sprintf (items[2].text, "VSYNC: OFF"); + reinit = 1; + break; + + case 3: /*** GX Texture filtering ***/ + config.bilinear ^= 1; + sprintf (items[3].text, "GX Bilinear Filter: %s", config.bilinear ? " ON" : "OFF"); + break; + + case 4: /*** GX Copy filtering (deflickering filter) ***/ + config.vfilter ^= 1; + sprintf (items[4].text, "GX Deflicker Filter: %s", config.vfilter ? " ON" : "OFF"); + break; + +#ifdef HW_RVL + case 5: /*** VIDEO Trap filtering ***/ + config.trap ^= 1; + sprintf (items[5].text, "VI Trap Filter: %s", config.trap ? " ON" : "OFF"); + break; + + case 6: /*** VIDEO Gamma correction ***/ + if (system_hw) + { + update_gamma(); + state[0] = m->arrows[0]->state; + state[1] = m->arrows[1]->state; + m->max_buttons = 0; + m->max_images = 0; + m->arrows[0]->state = 0; + m->arrows[1]->state = 0; + m->screenshot = 255; + strcpy(m->title,""); + GUI_OptionBox(m,update_gamma,"VI Gamma Correction",(void *)&config.gamma,0.1,0.1,3.0,0); + m->max_buttons = 4; + m->max_images = 6; + m->arrows[0]->state = state[0]; + m->arrows[1]->state = state[1]; + m->screenshot = 0; + strcpy(m->title,"Video Settings"); + sprintf (items[6].text, "VI Gamma Correction: %1.1f", config.gamma); + VIDEO_SetGamma(VI_GM_1_0); + VIDEO_Flush(); + } + else + { + GUI_WaitPrompt("Error","Please load a game first !\n"); + } + break; +#endif + + case VI_OFFSET: /*** NTSC filter ***/ + config.ntsc = (config.ntsc + 1) & 3; + if (config.ntsc == 1) + sprintf (items[VI_OFFSET].text, "NTSC Filter: COMPOSITE"); + else if (config.ntsc == 2) + sprintf (items[VI_OFFSET].text, "NTSC Filter: S-VIDEO"); + else if (config.ntsc == 3) + sprintf (items[VI_OFFSET].text, "NTSC Filter: RGB"); + else + sprintf (items[VI_OFFSET].text, "NTSC Filter: OFF"); + break; + + case VI_OFFSET+1: /*** overscan emulation ***/ + config.overscan = (config.overscan + 1) & 3; + if (config.overscan == 3) + sprintf (items[VI_OFFSET+1].text, "Borders: FULL"); + else if (config.overscan == 2) + sprintf (items[VI_OFFSET+1].text, "Borders: H ONLY"); + else if (config.overscan == 1) + sprintf (items[VI_OFFSET+1].text, "Borders: V ONLY"); + else + sprintf (items[VI_OFFSET+1].text, "Borders: NONE"); + break; + + case VI_OFFSET+2: /*** Game Gear extended screen */ + config.gg_extra ^= 1; + sprintf(items[VI_OFFSET+2].text, "GG Screen: %s", config.gg_extra ? "EXTENDED":"ORIGINAL"); + break; + + case VI_OFFSET+3: /*** aspect ratio ***/ + config.aspect = (config.aspect + 1) % 3; + if (config.aspect == 1) + sprintf (items[VI_OFFSET+3].text,"Aspect: ORIGINAL (4:3)"); + else if (config.aspect == 2) + sprintf (items[VI_OFFSET+3].text, "Aspect: ORIGINAL (16:9)"); + else + sprintf (items[VI_OFFSET+3].text, "Aspect: SCALED"); + + if (config.aspect) + { + /* disable items */ + m->max_items = VI_OFFSET+5; + + /* reset menu selection */ + if (m->offset > VI_OFFSET) + { + m->offset = VI_OFFSET; + m->selected = 3; + } + } + else + { + /* enable items */ + m->max_items = VI_OFFSET+6; + } + + break; + + case VI_OFFSET+4: /*** screen position ***/ + if (system_hw) + { + state[0] = m->arrows[0]->state; + state[1] = m->arrows[1]->state; + m->max_buttons = 0; + m->max_images = 0; + m->arrows[0]->state = 0; + m->arrows[1]->state = 0; + m->screenshot = 255; + strcpy(m->title,""); + GUI_OptionBox2(m,"X Offset","Y Offset",&config.xshift,&config.yshift,1,-99,99); + m->max_buttons = 4; + m->max_images = 6; + m->arrows[0]->state = state[0]; + m->arrows[1]->state = state[1]; + m->screenshot = 0; + strcpy(m->title,"Video Settings"); + sprintf (items[VI_OFFSET+4].text, "Screen Position: (%s%02d,%s%02d)", + (config.xshift < 0) ? "":"+", config.xshift, + (config.yshift < 0) ? "":"+", config.yshift); + } + else + { + GUI_WaitPrompt("Error","Please load a game first !\n"); + } + break; + + case VI_OFFSET+5: /*** screen scaling ***/ + if (system_hw) + { + state[0] = m->arrows[0]->state; + state[1] = m->arrows[1]->state; + m->max_buttons = 0; + m->max_images = 0; + m->arrows[0]->state = 0; + m->arrows[1]->state = 0; + m->screenshot = 255; + strcpy(m->title,""); + GUI_OptionBox2(m,"X Scale","Y Scale",&config.xscale,&config.yscale,1,-99,99); + m->max_buttons = 4; + m->max_images = 6; + m->arrows[0]->state = state[0]; + m->arrows[1]->state = state[1]; + m->screenshot = 0; + strcpy(m->title,"Video Settings"); + sprintf (items[VI_OFFSET+5].text, "Screen Scaling: (%s%02d,%s%02d)", + (config.xscale < 0) ? "":"+", config.xscale, + (config.yscale < 0) ? "":"+", config.yscale); + } + else + { + GUI_WaitPrompt("Error","Please load a game first !\n"); + } + break; + + case -1: + quit = 1; + break; + } + } + + if (reinit && system_hw) + { + /* framerate might have changed, reinitialize audio timings */ + audio_init(snd.sample_rate, get_framerate()); + } + + GUI_DeleteMenu(m); +} + +/**************************************************************************** + * Controllers Settings menu + ****************************************************************************/ +static int player = 0; +static void ctrlmenu_cb(void) +{ + int i, cnt = 1; + char msg[16]; + gui_menu *m = &menu_ctrls; + + if (m->bg_images[7].state & IMAGE_VISIBLE) + { + /* draw device port number */ + if (config.input[player].device != -1) + { + sprintf(msg,"%d",config.input[player].port + 1); + if (m->selected == 11) + FONT_write(msg,16,m->items[11].x+m->items[11].w+2,m->items[11].y+m->items[11].h+2,640,(GXColor)DARK_GREY); + else + FONT_write(msg,14,m->items[11].x+m->items[11].w,m->items[11].y+m->items[11].h,640,(GXColor)DARK_GREY); + } + } + + /* draw players index */ + for (i=2; iselected == i) + { + FONT_writeCenter("Player", 16, m->buttons[i].x + 2, m->buttons[i].x + 54, m->buttons[i].y + (m->buttons[i].h - 16)/2 + 16, (GXColor)DARK_GREY); + } + else + { + FONT_writeCenter("Player", 14, m->buttons[i].x + 4, m->buttons[i].x + 54, m->buttons[i].y + (m->buttons[i].h - 14)/2 + 14, (GXColor)DARK_GREY); + } + + if (input.dev[i-2] != NO_DEVICE) + { + sprintf(msg,"%d",cnt++); + if (m->selected == i) + { + FONT_writeCenter(msg,18,m->items[i].x+2,m->items[i].x+m->items[i].w+2,m->buttons[i].y+(m->buttons[i].h-18)/2+18,(GXColor)DARK_GREY); + } + else + { + FONT_writeCenter(msg,16,m->items[i].x,m->items[i].x+m->items[i].w,m->buttons[i].y+(m->buttons[i].h - 16)/2+16,(GXColor)DARK_GREY); + } + } + } +} + +/* Set menu elements depending on current system configuration */ +static void ctrlmenu_raz(void) +{ + int i,max = 0; + gui_menu *m = &menu_ctrls; + + /* update players buttons */ + for (i=0; ibuttons[i+2].data = &button_player_none_data; + m->buttons[i+2].state &= ~BUTTON_ACTIVE; + strcpy(m->items[i+2].comment,""); + } + else + { + m->buttons[i+2].data = &button_player_data; + m->buttons[i+2].state |= BUTTON_ACTIVE; + if ((cart.special & HW_J_CART) && (i > 4)) + sprintf(m->items[i+2].comment,"Configure Player %d (J-CART) settings", max + 1); + else + sprintf(m->items[i+2].comment,"Configure Player %d settings", max + 1); + max++; + } + } + + /* update buttons navigation */ + if (input.dev[0] != NO_DEVICE) + m->buttons[0].shift[3] = 2; + else if (input.dev[4] != NO_DEVICE) + m->buttons[0].shift[3] = 6; + else if (input.dev[5] != NO_DEVICE) + m->buttons[0].shift[3] = 7; + else + m->buttons[0].shift[3] = 0; + if (input.dev[4] != NO_DEVICE) + m->buttons[1].shift[3] = 5; + else if (input.dev[5] != NO_DEVICE) + m->buttons[1].shift[3] = 6; + else if (input.dev[0] != NO_DEVICE) + m->buttons[1].shift[3] = 1; + else + m->buttons[1].shift[3] = 0; + + if (input.dev[1] != NO_DEVICE) + m->buttons[2].shift[1] = 1; + else if (input.dev[4] != NO_DEVICE) + m->buttons[2].shift[1] = 4; + else if (input.dev[5] != NO_DEVICE) + m->buttons[2].shift[1] = 5; + else + m->buttons[2].shift[1] = 0; + + if (input.dev[4] != NO_DEVICE) + m->buttons[5].shift[1] = 1; + else if (input.dev[5] != NO_DEVICE) + m->buttons[5].shift[1] = 2; + else + m->buttons[5].shift[1] = 0; + + if (input.dev[3] != NO_DEVICE) + m->buttons[6].shift[0] = 1; + else if (input.dev[0] != NO_DEVICE) + m->buttons[6].shift[0] = 4; + else + m->buttons[6].shift[0] = 0; + + if (input.dev[5] != NO_DEVICE) + m->buttons[6].shift[1] = 1; + else + m->buttons[6].shift[1] = 0; + + if (input.dev[6] != NO_DEVICE) + m->buttons[7].shift[1] = 1; + else + m->buttons[7].shift[1] = 0; + + if (input.dev[7] != NO_DEVICE) + m->buttons[8].shift[1] = 1; + else + m->buttons[8].shift[1] = 0; + + if (input.dev[4] != NO_DEVICE) + m->buttons[7].shift[0] = 1; + else if (input.dev[3] != NO_DEVICE) + m->buttons[7].shift[0] = 2; + else if (input.dev[0] != NO_DEVICE) + m->buttons[7].shift[0] = 5; + else + m->buttons[7].shift[0] = 0; +} + +static void ctrlmenu(void) +{ + int old_player = -1; + int i = 0; + int update = 0; + gui_item *items = NULL; + u8 *special = NULL; + u32 exp; + u8 type = 0; + + /* System devices */ + gui_item items_sys[2][13] = + { + { + {NULL,Ctrl_none_png ,"","Select Port 1 device",110,130,48,72}, + {NULL,Ctrl_gamepad_md_png ,"","Select Port 1 device", 85,117,96,84}, + {NULL,Ctrl_mouse_png ,"","Select Port 1 device", 97,113,64,88}, + {NULL,Ctrl_menacer_png ,"","Select Port 1 device", 94,113,80,88}, + {NULL,Ctrl_justifiers_png ,"","Select Port 1 device", 88,117,80,84}, + {NULL,Ctrl_xe_a1p_png ,"","Select Port 1 device", 98,118,72,84}, + {NULL,Ctrl_activator_png ,"","Select Port 1 device", 94,121,72,80}, + {NULL,Ctrl_gamepad_ms_png ,"","Select Port 1 device", 91,125,84,76}, + {NULL,Ctrl_lightphaser_png,"","Select Port 1 device", 89,109,88,92}, + {NULL,Ctrl_paddle_png ,"","Select Port 1 device", 86,117,96,84}, + {NULL,Ctrl_sportspad_png ,"","Select Port 1 device", 95,117,76,84}, + {NULL,Ctrl_teamplayer_png ,"","Select Port 1 device", 94,109,80,92}, + {NULL,Ctrl_4wayplay_png ,"","Select Port 1 device", 98,110,72,92} + }, + { + {NULL,Ctrl_none_png ,"","Select Port 2 device",110,300,48,72}, + {NULL,Ctrl_gamepad_md_png ,"","Select Port 2 device", 85,287,96,84}, + {NULL,Ctrl_mouse_png ,"","Select Port 2 device", 97,283,64,88}, + {NULL,Ctrl_menacer_png ,"","Select Port 2 device", 94,283,80,88}, + {NULL,Ctrl_justifiers_png ,"","Select Port 2 device", 88,287,80,84}, + {NULL,Ctrl_xe_a1p_png ,"","Select Port 2 device", 98,288,72,84}, + {NULL,Ctrl_activator_png ,"","Select Port 2 device", 94,291,72,80}, + {NULL,Ctrl_gamepad_ms_png ,"","Select Port 2 device", 91,295,84,76}, + {NULL,Ctrl_lightphaser_png,"","Select Port 2 device", 89,279,88,92}, + {NULL,Ctrl_paddle_png ,"","Select Port 2 device", 86,287,96,84}, + {NULL,Ctrl_sportspad_png ,"","Select Port 2 device", 95,287,76,84}, + {NULL,Ctrl_teamplayer_png ,"","Select Port 2 device", 94,279,80,92}, + {NULL,Ctrl_4wayplay_png ,"","Select Port 2 device", 98,280,72,92} + } + }; + + /* Specific controller options */ + gui_item items_special[4][2] = + { + { + /* Gamepad option */ + {NULL,Ctrl_pad3b_png,"Pad\nType","Use 3-buttons Pad",528,180,44,28}, + {NULL,Ctrl_pad6b_png,"Pad\nType","Use 6-buttons Pad",528,180,44,28} + }, + { + /* Mouse option */ + {NULL,ctrl_option_off_png,"Invert\nMouse","Enable/Disable Y-Axis inversion",534,180,24,24}, + {NULL,ctrl_option_on_png ,"Invert\nMouse","Enable/Disable Y-Axis inversion",534,180,24,24}, + }, + { + /* Gun option */ + {NULL,ctrl_option_off_png,"Show\nCursor","Enable/Disable Lightgun cursor",534,180,24,24}, + {NULL,ctrl_option_on_png ,"Show\nCursor","Enable/Disable Lightgun cursor",534,180,24,24}, + }, + { + /* no option */ + {NULL,NULL,"No Option","",436,180,160,52}, + {NULL,NULL,"","",0,0,0,0}, + } + }; + + /* Player Configuration device items */ +#ifdef HW_RVL + gui_item items_device[5] = + { + {NULL,ctrl_option_off_png ,"Input\nDevice","Select Input Controller",534,244,24,24}, + {NULL,ctrl_gamecube_png ,"Input\nDevice","Select Input Controller",530,246,36,24}, + {NULL,ctrl_wiimote_png ,"Input\nDevice","Select Input Controller",526,250,40,12}, + {NULL,ctrl_nunchuk_png ,"Input\nDevice","Select Input Controller",532,242,32,32}, + {NULL,ctrl_classic_png ,"Input\nDevice","Select Input Controller",526,242,40,32}, + }; +#else + gui_item items_device[2] = + { + {NULL,ctrl_option_off_png ,"Input\nDevice","Select Input Controller",534,244,24,24}, + {NULL,ctrl_gamecube_png ,"Input\nDevice","Select Input Controller",530,246,36,24} + }; +#endif + + /* initialize menu */ + gui_menu *m = &menu_ctrls; + GUI_InitMenu(m); + + /* initialize custom buttons */ + button_player_data.texture[0] = gxTextureOpenPNG(button_player_data.image[0],0); + button_player_data.texture[1] = gxTextureOpenPNG(button_player_data.image[1],0); + button_player_none_data.texture[0] = gxTextureOpenPNG(button_player_none_data.image[0],0); + + /* initialize custom images */ + for (i=0; i<13; i++) + { + items_sys[1][i].texture = items_sys[0][i].texture = gxTextureOpenPNG(items_sys[0][i].data,0); + } + items_special[0][0].texture = gxTextureOpenPNG(items_special[0][0].data,0); + items_special[0][1].texture = gxTextureOpenPNG(items_special[0][1].data,0); + items_special[2][0].texture = items_special[1][0].texture = gxTextureOpenPNG(items_special[1][0].data,0); + items_special[2][1].texture = items_special[1][1].texture = gxTextureOpenPNG(items_special[1][1].data,0); + items_device[0].texture = items_special[1][0].texture; + items_device[1].texture = gxTextureOpenPNG(items_device[1].data,0); +#ifdef HW_RVL + items_device[2].texture = gxTextureOpenPNG(items_device[2].data,0); + items_device[3].texture = gxTextureOpenPNG(items_device[3].data,0); + items_device[4].texture = gxTextureOpenPNG(items_device[4].data,0); +#endif + + /* restore current menu elements */ + player = 0; + ctrlmenu_raz(); + memcpy(&m->items[0],&items_sys[0][input.system[0]],sizeof(gui_item)); + memcpy(&m->items[1],&items_sys[1][input.system[1]],sizeof(gui_item)); + + /* menu title slide effect */ + m->selected = 0; + GUI_SlideMenuTitle(m,strlen("Controller ")); + + while (update != -1) + { + /* draw menu */ + GUI_DrawMenu(m); + + /* update menu */ + update = GUI_UpdateMenu(m); + + if (update > 0) + { + switch (m->selected) + { + case 0: /* update port 1 system */ + { + /* fixed configurations */ + if (system_hw) + { + if (cart.special & HW_TEREBI_OEKAKI) + { + GUI_WaitPrompt("Error","Terebi Oekaki detected !"); + break; + } + else if (system_hw == SYSTEM_PICO) + { + GUI_WaitPrompt("Error","PICO hardware detected !"); + break; + } + } + + /* next connected device */ + input.system[0]++; + + /* allow only one connected mouse */ + if ((input.system[0] == SYSTEM_MOUSE) && (input.system[1] == SYSTEM_MOUSE)) + { + input.system[0] += 3; + } + + /* Menacer & Justifiers on Port B only */ + if (input.system[0] == SYSTEM_MENACER) + { + input.system[0] += 2; + } + + /* allow only one gun type */ + if ((input.system[0] == SYSTEM_LIGHTPHASER) && ((input.system[1] == SYSTEM_MENACER) || (input.system[1] == SYSTEM_JUSTIFIER))) + { + input.system[0]++; + } + + /* 4-wayplay uses both ports */ + if (input.system[0] == SYSTEM_WAYPLAY) + { + input.system[1] = SYSTEM_WAYPLAY; + } + + /* loop back */ + if (input.system[0] > SYSTEM_WAYPLAY) + { + input.system[0] = NO_SYSTEM; + input.system[1] = SYSTEM_MD_GAMEPAD; + } + + /* reset I/O ports */ + io_init(); + input_reset(); + + /* save current configuration */ + old_system[0] = input.system[0]; + old_system[1] = input.system[1]; + + /* update menu elements */ + ctrlmenu_raz(); + memcpy(&m->items[0],&items_sys[0][input.system[0]],sizeof(gui_item)); + memcpy(&m->items[1],&items_sys[1][input.system[1]],sizeof(gui_item)); + + if (m->bg_images[7].state & IMAGE_VISIBLE) + { + /* slide out configuration window */ + GUI_DrawMenuFX(m, 20, 1); + + /* remove configuration window */ + m->bg_images[7].state &= ~IMAGE_VISIBLE; + + /* disable configuration buttons */ + m->buttons[10].state &= (~BUTTON_VISIBLE & ~BUTTON_ACTIVE); + m->buttons[11].state &= (~BUTTON_VISIBLE & ~BUTTON_ACTIVE); + m->buttons[12].state &= (~BUTTON_VISIBLE & ~BUTTON_ACTIVE); + + /* update directions */ + m->buttons[2].shift[3] = 0; + m->buttons[3].shift[3] = 0; + m->buttons[4].shift[3] = 0; + m->buttons[5].shift[3] = 0; + m->buttons[6].shift[3] = 0; + m->buttons[7].shift[3] = 0; + m->buttons[8].shift[3] = 0; + m->buttons[9].shift[3] = 0; + + /* update title */ + sprintf(m->title,"Controller Settings"); + } + break; + } + + case 1: /* update port 2 system */ + { + /* fixed configurations */ + if (system_hw) + { + if (cart.special & HW_J_CART) + { + GUI_WaitPrompt("Error","J-CART detected !"); + break; + } + else if (cart.special & HW_TEREBI_OEKAKI) + { + GUI_WaitPrompt("Error","Terebi Oekaki detected !"); + break; + } + else if (system_hw == SYSTEM_PICO) + { + GUI_WaitPrompt("Error","PICO hardware detected !"); + break; + } + } + + /* next connected device */ + input.system[1]++; + + /* allow only one connected mouse */ + if ((input.system[0] == SYSTEM_MOUSE) && (input.system[1] == SYSTEM_MOUSE)) + { + input.system[1]++; + } + + /* allow only one gun type */ + if ((input.system[0] == SYSTEM_LIGHTPHASER) && (input.system[1] == SYSTEM_MENACER)) + { + input.system[1] += 3; + } + + /* allow only one gun type */ + if ((input.system[0] == SYSTEM_LIGHTPHASER) && (input.system[1] == SYSTEM_JUSTIFIER)) + { + input.system[1] += 2; + } + + /* 4-wayplay uses both ports */ + if (input.system[1] == SYSTEM_WAYPLAY) + { + input.system[0] = SYSTEM_WAYPLAY; + } + + /* loop back */ + if (input.system[1] > SYSTEM_WAYPLAY) + { + input.system[1] = NO_SYSTEM; + input.system[0] = SYSTEM_MD_GAMEPAD; + } + + /* reset I/O ports */ + io_init(); + input_reset(); + + /* save current configuration */ + old_system[0] = input.system[0]; + old_system[1] = input.system[1]; + + /* update menu elements */ + ctrlmenu_raz(); + memcpy(&m->items[0],&items_sys[0][input.system[0]],sizeof(gui_item)); + memcpy(&m->items[1],&items_sys[1][input.system[1]],sizeof(gui_item)); + + if (m->bg_images[7].state & IMAGE_VISIBLE) + { + /* slide out configuration window */ + GUI_DrawMenuFX(m, 20, 1); + + /* remove configuration window */ + m->bg_images[7].state &= ~IMAGE_VISIBLE; + + /* disable configuration buttons */ + m->buttons[10].state &= (~BUTTON_VISIBLE & ~BUTTON_ACTIVE); + m->buttons[11].state &= (~BUTTON_VISIBLE & ~BUTTON_ACTIVE); + m->buttons[12].state &= (~BUTTON_VISIBLE & ~BUTTON_ACTIVE); + + /* update directions */ + m->buttons[2].shift[3] = 0; + m->buttons[3].shift[3] = 0; + m->buttons[4].shift[3] = 0; + m->buttons[5].shift[3] = 0; + m->buttons[6].shift[3] = 0; + m->buttons[7].shift[3] = 0; + m->buttons[8].shift[3] = 0; + m->buttons[9].shift[3] = 0; + + /* update title */ + sprintf(m->title,"Controller Settings"); + } + + break; + } + + case 2: + case 3: + case 4: + case 5: + case 6: + case 7: + case 8: + case 9: + { + /* remove duplicate assigned inputs */ + for (i=0; iselected-2); i++) + { + if (input.dev[i] != NO_DEVICE) player ++; + } + + if (m->bg_images[7].state & IMAGE_VISIBLE) + { + /* if already displayed, do nothing */ + if (old_player == player) break; + + /* slide out configuration window */ + GUI_DrawMenuFX(m, 20, 1); + } + else + { + /* append configuration window */ + m->bg_images[7].state |= IMAGE_VISIBLE; + + /* enable configuration buttons */ + m->buttons[10].state |= (BUTTON_VISIBLE | BUTTON_ACTIVE); + m->buttons[11].state |= (BUTTON_VISIBLE | BUTTON_ACTIVE); + m->buttons[12].state |= (BUTTON_VISIBLE | BUTTON_ACTIVE); + + /* update directions */ + m->buttons[2].shift[3] = 8; + m->buttons[3].shift[3] = 7; + m->buttons[4].shift[3] = 6; + m->buttons[5].shift[3] = 5; + m->buttons[6].shift[3] = 4; + m->buttons[7].shift[3] = 3; + m->buttons[8].shift[3] = 2; + m->buttons[9].shift[3] = 1; + } + + /* emulated device type */ + type = input.dev[m->selected - 2]; + + /* retrieve current player informations */ + switch (type) + { + case DEVICE_PAD3B: + case DEVICE_PAD6B: + { + items = items_special[0]; + special = &config.input[player].padtype; + break; + } + + case DEVICE_MOUSE: + { + items = items_special[1]; + special = &config.invert_mouse; + break; + } + + case DEVICE_LIGHTGUN: + { + items = items_special[2]; + + if ((input.system[1] == SYSTEM_MENACER) || (input.system[1] == SYSTEM_JUSTIFIER)) + { + /* Menacer & Justifiers affected to devices 4 & 5 */ + special = &config.gun_cursor[m->selected & 1]; + } + else + { + /* Lightphasers affected to devices 0 & 4 */ + special = &config.gun_cursor[m->selected >> 2]; + } + break; + } + + default: + { + items = items_special[3]; + special = NULL; + break; + } + } + + if (special) + { + memcpy(&m->items[10],&items[*special],sizeof(gui_item)); + } + else + { + memcpy(&m->items[10],&items[0],sizeof(gui_item)); + } + + memcpy(&m->items[11],&items_device[config.input[player].device + 1],sizeof(gui_item)); + + /* slide in configuration window */ + m->buttons[10].shift[2] = 10 - m->selected; + m->buttons[11].shift[2] = 11 - m->selected; + m->buttons[12].shift[2] = 12 - m->selected; + m->selected = 10; + GUI_DrawMenuFX(m, 20, 0); + + /* some devices require analog sticks */ + if ((type == DEVICE_XE_A1P) && ((config.input[player].device == -1) || (config.input[player].device == 1))) + { + GUI_WaitPrompt("Warning","One Analog Stick required !"); + } + else if ((type == DEVICE_ACTIVATOR) && ((config.input[player].device != 0) && (config.input[player].device != 3))) + { + GUI_WaitPrompt("Warning","Two Analog Sticks required !"); + } + + /* update title */ + if ((cart.special & HW_J_CART) && (player > 1)) + { + sprintf(m->title,"Controller Settings (Player %d) (J-CART)",player+1); + } + else + { + sprintf(m->title,"Controller Settings (Player %d)",player+1); + } + break; + } + + case 10: /* specific option */ + { + if (special) + { + /* switch option */ + *special ^= 1; + + /* specific case: controller type */ + if (type < 2) + { + /* re-initialize emulated device */ + input_init(); + input_reset(); + + /* update emulated device type */ + type = *special; + } + + /* update menu items */ + memcpy(&m->items[10],&items[*special],sizeof(gui_item)); + } + break; + } + + case 11: /* input controller selection */ + { + /* no input device */ + if (config.input[player].device < 0) + { + /* always try gamecube controllers first */ + config.input[player].device = 0; + config.input[player].port = 0; + } + else + { + /* try next port */ + config.input[player].port ++; + } + + /* autodetect connected gamecube controllers */ + if (config.input[player].device == 0) + { + /* find first connected controller */ + exp = 0; + while ((config.input[player].port < 4) && !exp) + { + VIDEO_WaitVSync (); + exp = PAD_ScanPads() & (1<= 4) + { +#ifdef HW_RVL + /* test wiimote */ + config.input[player].port = 0; + config.input[player].device = 1; +#else + /* no input controller left */ + config.input[player].device = -1; + config.input[player].port = player%4; +#endif + } + } + +#ifdef HW_RVL + /* autodetect connected wiimotes (without nunchuk) */ + if (config.input[player].device == 1) + { + /* test current port */ + exp = 255; + if (config.input[player].port < 4) + { + WPAD_Probe(config.input[player].port,&exp); + } + + /* find first connected controller */ + while ((config.input[player].port < 4) && (exp == 255)) + { + /* try next port */ + config.input[player].port ++; + if (config.input[player].port < 4) + { + exp = 255; + WPAD_Probe(config.input[player].port,&exp); + } + } + + /* no more wiimote */ + if (config.input[player].port >= 4) + { + /* test wiimote+nunchuk */ + config.input[player].port = 0; + config.input[player].device = 2; + } + } + + /* autodetect connected wiimote+nunchuk */ + if (config.input[player].device == 2) + { + /* test current port */ + exp = 255; + if (config.input[player].port < 4) + { + WPAD_Probe(config.input[player].port,&exp); + } + + /* find first connected controller */ + while ((config.input[player].port < 4) && (exp != WPAD_EXP_NUNCHUK)) + { + /* try next port */ + config.input[player].port ++; + if (config.input[player].port < 4) + { + exp = 255; + WPAD_Probe(config.input[player].port,&exp); + } + } + + /* no more wiimote+nunchuk */ + if (config.input[player].port >= 4) + { + /* test classic controllers */ + config.input[player].port = 0; + config.input[player].device = 3; + } + } + + /* autodetect connected classic controllers */ + if (config.input[player].device == 3) + { + /* test current port */ + exp = 255; + if (config.input[player].port < 4) + { + WPAD_Probe(config.input[player].port,&exp); + } + + /* find first connected controller */ + while ((config.input[player].port<4) && (exp != WPAD_EXP_CLASSIC)) + { + /* try next port */ + config.input[player].port ++; + if (config.input[player].port < 4) + { + exp = 255; + WPAD_Probe(config.input[player].port,&exp); + } + } + + if (config.input[player].port >= 4) + { + /* no input controller left */ + config.input[player].device = -1; + config.input[player].port = player%4; + } + } +#endif + + /* update menu items */ + memcpy(&m->items[11],&items_device[config.input[player].device + 1],sizeof(gui_item)); + + break; + } + + case 12: /* Controller Keys Configuration */ + { + if (config.input[player].device >= 0) + { + GUI_MsgBoxOpen("Keys Configuration", "",0); + gx_input_Config(config.input[player].port, config.input[player].device, type); + GUI_MsgBoxClose(); + } + break; + } + } + } + + /* Close Window */ + else if (update < 0) + { + if (m->bg_images[7].state & IMAGE_VISIBLE) + { + /* slide out configuration window */ + GUI_DrawMenuFX(m, 20, 1); + + /* disable configuration window */ + m->bg_images[7].state &= ~IMAGE_VISIBLE; + + /* disable configuration buttons */ + m->buttons[10].state &= (~BUTTON_VISIBLE & ~BUTTON_ACTIVE); + m->buttons[11].state &= (~BUTTON_VISIBLE & ~BUTTON_ACTIVE); + m->buttons[12].state &= (~BUTTON_VISIBLE & ~BUTTON_ACTIVE); + + /* clear directions */ + m->buttons[2].shift[3] = 0; + m->buttons[3].shift[3] = 0; + m->buttons[4].shift[3] = 0; + m->buttons[5].shift[3] = 0; + m->buttons[6].shift[3] = 0; + m->buttons[7].shift[3] = 0; + m->buttons[8].shift[3] = 0; + m->buttons[9].shift[3] = 0; + + /* update selector */ + m->selected -= m->buttons[m->selected].shift[2]; + + /* restore title */ + sprintf(m->title,"Controller Settings"); + + /* stay in menu */ + update = 0; + } + else + { + /* check we have at least one connected input before leaving */ + old_player = player; + player = 0; + for (i=0; ibg_images[7].state &= ~IMAGE_VISIBLE; + + /* disable configuration buttons */ + m->buttons[10].state &= (~BUTTON_VISIBLE & ~BUTTON_ACTIVE); + m->buttons[11].state &= (~BUTTON_VISIBLE & ~BUTTON_ACTIVE); + m->buttons[12].state &= (~BUTTON_VISIBLE & ~BUTTON_ACTIVE); + + /* clear directions */ + m->buttons[2].shift[3] = 0; + m->buttons[3].shift[3] = 0; + m->buttons[4].shift[3] = 0; + m->buttons[5].shift[3] = 0; + m->buttons[6].shift[3] = 0; + m->buttons[7].shift[3] = 0; + m->buttons[8].shift[3] = 0; + m->buttons[9].shift[3] = 0; + + /* clear menu items */ + memset(&m->items[0],0,sizeof(gui_item)); + memset(&m->items[1],0,sizeof(gui_item)); + memset(&m->items[10],0,sizeof(gui_item)); + memset(&m->items[11],0,sizeof(gui_item)); + + /* clear player buttons */ + m->buttons[2].data = NULL; + m->buttons[3].data = NULL; + m->buttons[4].data = NULL; + m->buttons[5].data = NULL; + m->buttons[6].data = NULL; + m->buttons[7].data = NULL; + m->buttons[8].data = NULL; + m->buttons[9].data = NULL; + + /* delete menu */ + GUI_DeleteMenu(m); + + /* delete custom buttons */ + gxTextureClose(&button_player_data.texture[0]); + gxTextureClose(&button_player_data.texture[1]); + gxTextureClose(&button_player_none_data.texture[0]); + + /* delete custom images */ + for (i=0; i<13; i++) + { + gxTextureClose(&items_sys[0][i].texture); + } + gxTextureClose(&items_special[0][0].texture); + gxTextureClose(&items_special[0][1].texture); + gxTextureClose(&items_special[1][0].texture); + gxTextureClose(&items_special[1][1].texture); + gxTextureClose(&items_device[1].texture); +#ifdef HW_RVL + gxTextureClose(&items_device[2].texture); + gxTextureClose(&items_device[3].texture); + gxTextureClose(&items_device[4].texture); +#endif +} + +/**************************************************************************** + * Main Option menu + * + ****************************************************************************/ +static void optionmenu(void) +{ + int ret, quit = 0; + gui_menu *m = &menu_options; + + GUI_InitMenu(m); + GUI_DrawMenuFX(m,30,0); + + while (quit == 0) + { + ret = GUI_RunMenu(m); + + switch (ret) + { + case 0: + GUI_DeleteMenu(m); + systemmenu(); + GUI_InitMenu(m); + break; + case 1: + GUI_DeleteMenu(m); + videomenu(); + GUI_InitMenu(m); + break; + case 2: + GUI_DeleteMenu(m); + soundmenu(); + GUI_InitMenu(m); + break; + case 3: + GUI_DeleteMenu(m); + ctrlmenu(); + GUI_InitMenu(m); + break; + case 4: + GUI_DeleteMenu(m); + prefmenu(); + GUI_InitMenu(m); + break; + case -1: + quit = 1; + break; + } + } + + config_save(); + GUI_DrawMenuFX(m,30,1); + GUI_DeleteMenu(m); +} + +/**************************************************************************** +* Save Manager menu +* +****************************************************************************/ +static t_slot slots[5]; +static void savemenu_cb(void) +{ + int i; + char msg[16]; + gx_texture *star = gxTextureOpenPNG(Star_full_png,0); + + if (sram.on) + { + FONT_write("Backup Memory",16,buttons_saves[0].x+16,buttons_saves[0].y+(buttons_saves[0].h-16)/2+16,buttons_saves[0].x+buttons_saves[0].w,(GXColor)DARK_GREY); + if (slots[0].valid) + { + sprintf(msg,"%d/%02d/%02d",slots[0].day,slots[0].month,slots[0].year); + FONT_alignRight(msg,12,buttons_saves[0].x+buttons_saves[0].w-16,buttons_saves[0].y+(buttons_saves[0].h-28)/2+12,(GXColor)DARK_GREY); + sprintf(msg,"%02d:%02d",slots[0].hour,slots[0].min); + FONT_alignRight(msg,12,buttons_saves[0].x+buttons_saves[0].w-16,buttons_saves[0].y+(buttons_saves[0].h-28)/2+28,(GXColor)DARK_GREY); + } + + if (sram.crc != crc32(0, &sram.sram[0], 0x10000)) + gxDrawTexture(star,22,buttons_saves[0].y+(buttons_saves[0].h-star->height)/2,star->width,star->height,255); + } + else + { + FONT_writeCenter("Backup Memory disabled",16,buttons_saves[0].x,buttons_saves[0].x+buttons_saves[0].w,buttons_saves[0].y+(buttons_saves[0].h-16)/2+16,(GXColor)DARK_GREY); + } + + for (i=1; i<5; i++) + { + if (slots[i].valid) + { + sprintf(msg,"Slot %d",i); + FONT_write(msg,16,buttons_saves[i].x+16,buttons_saves[i].y+(buttons_saves[i].h-16)/2+16,buttons_saves[i].x+buttons_saves[i].w,(GXColor)DARK_GREY); + sprintf(msg,"%d/%02d/%02d",slots[i].day,slots[i].month,slots[i].year); + FONT_alignRight(msg,12,buttons_saves[i].x+buttons_saves[i].w-16,buttons_saves[i].y+(buttons_saves[i].h-28)/2+12,(GXColor)DARK_GREY); + sprintf(msg,"%02d:%02d",slots[i].hour,slots[i].min); + FONT_alignRight(msg,12,buttons_saves[i].x+buttons_saves[i].w-16,buttons_saves[i].y+(buttons_saves[i].h-28)/2+28,(GXColor)DARK_GREY); + } + else + { + FONT_write("Empty Slot",16,buttons_saves[i].x+16,buttons_saves[i].y+(buttons_saves[i].h-16)/2+16,buttons_saves[i].x+buttons_saves[i].h,(GXColor)DARK_GREY); + } + + if (i == config.s_default) + gxDrawTexture(star,22,buttons_saves[i].y+(buttons_saves[i].h-star->height)/2,star->width,star->height,255); + } + gxTextureClose(&star); +} + +static int savemenu(void) +{ + int i, update = 0; + int ret = 0; + int slot = -1; + char filename[MAXPATHLEN]; + gui_menu *m = &menu_saves; + FILE *snap; + + GUI_InitMenu(m); + GUI_DrawMenuFX(m,30,0); + + m->bg_images[3].state &= ~IMAGE_SLIDE_TOP; + m->bg_images[4].state &= ~IMAGE_SLIDE_BOTTOM; + m->bg_images[5].state &= ~IMAGE_SLIDE_TOP; + + /* detect existing files */ + for (i=0; i<5; i++) + slot_autodetect(i, config.s_device, &slots[i]); + + /* SRAM disabled */ + if (sram.on) + { + m->buttons[0].state |= BUTTON_ACTIVE; + m->buttons[1].shift[0] = 1; + } + else + { + m->buttons[0].state &= ~BUTTON_ACTIVE; + m->buttons[1].shift[0] = 0; + if (m->selected == 0) + m->selected = 1; + } + + while (update != -1) + { + /* slot selection */ + if ((m->selected < 5) && (slot != m->selected)) + { + /* update slot */ + slot = m->selected; + + /* delete previous texture if any */ + gxTextureClose(&bg_saves[0].texture); + bg_saves[0].state &= ~IMAGE_VISIBLE; + bg_saves[1].state |= IMAGE_VISIBLE; + + /* state slot */ + if (!config.s_device && slot && slots[slot].valid) + { + /* open screenshot file */ + sprintf (filename, "%s/saves/%s__%d.png", DEFAULT_PATH, rom_filename, slot - 1); + snap = fopen(filename, "rb"); + if (snap) + { + /* load texture from file */ + bg_saves[0].texture = gxTextureOpenPNG(0,snap); + if (bg_saves[0].texture) + { + /* set menu background */ + bg_saves[0].w = bg_saves[0].texture->width * 2; + if (config.aspect & 2) bg_saves[0].w = (bg_saves[0].w * 3) / 4; + bg_saves[0].h = bg_saves[0].texture->height * 2; + bg_saves[0].x = (vmode->fbWidth - bg_saves[0].w) / 2; + bg_saves[0].y = (vmode->efbHeight - bg_saves[0].h) / 2; + bg_saves[0].state |= IMAGE_VISIBLE; + bg_saves[1].state &= ~IMAGE_VISIBLE; + } + fclose(snap); + } + } + } + + /* draw menu */ + GUI_DrawMenu(m); + + /* update menu */ + update = GUI_UpdateMenu(m); + + if (update > 0) + { + switch (m->selected) + { + case 0: + case 1: + case 2: + case 3: + case 4: /* Slot selection */ + { + /* enable right window */ + m->bg_images[7].state |= IMAGE_VISIBLE; + m->buttons[5].state |= BUTTON_VISIBLE; + m->buttons[6].state |= BUTTON_VISIBLE; + m->buttons[7].state |= BUTTON_VISIBLE; + m->buttons[8].state |= BUTTON_VISIBLE; + + /* only enable valid options */ + if (slots[slot].valid) + { + m->buttons[5].state |= BUTTON_ACTIVE; + m->buttons[7].state |= BUTTON_ACTIVE; + m->buttons[6].shift[0] = 1; + m->buttons[6].shift[1] = 1; + m->buttons[8].shift[0] = 1; + m->selected = 5; + } + else + { + m->buttons[5].state &= ~BUTTON_ACTIVE; + m->buttons[7].state &= ~BUTTON_ACTIVE; + m->buttons[6].shift[0] = 0; + m->buttons[6].shift[1] = 2; + m->buttons[8].shift[0] = (slot > 0) ? 2 : 0; + m->selected = 8; + } + + /* state slot 'only' button */ + if (slot > 0) + { + m->buttons[6].state |= BUTTON_ACTIVE; + m->buttons[5].shift[1] = 1; + m->buttons[7].shift[0] = 1; + } + else + { + m->buttons[6].state &= ~BUTTON_ACTIVE; + m->buttons[5].shift[1] = 2; + m->buttons[7].shift[0] = 2; + } + + /* disable left buttons */ + m->buttons[0].state &= ~BUTTON_ACTIVE; + m->buttons[1].state &= ~BUTTON_ACTIVE; + m->buttons[2].state &= ~BUTTON_ACTIVE; + m->buttons[3].state &= ~BUTTON_ACTIVE; + m->buttons[4].state &= ~BUTTON_ACTIVE; + + /* keep current selection highlighted */ + m->buttons[slot].state |= BUTTON_SELECTED; + + /* slide in window */ + GUI_DrawMenuFX(m, 20, 0); + + break; + } + + case 5: /* load file */ + { + if (slots[slot].valid) + { + ret = slot_load(slot,config.s_device); + + /* force exit */ + if (ret > 0) + { + GUI_DrawMenuFX(m, 20, 1); + m->buttons[slot].state &= ~BUTTON_SELECTED; + m->bg_images[7].state &= ~IMAGE_VISIBLE; + if (sram.on) + m->buttons[0].state |= BUTTON_ACTIVE; + m->buttons[1].state |= BUTTON_ACTIVE; + m->buttons[2].state |= BUTTON_ACTIVE; + m->buttons[3].state |= BUTTON_ACTIVE; + m->buttons[4].state |= BUTTON_ACTIVE; + m->buttons[5].state &= ~BUTTON_VISIBLE; + m->buttons[6].state &= ~BUTTON_VISIBLE; + m->buttons[7].state &= ~BUTTON_VISIBLE; + m->buttons[8].state &= ~BUTTON_VISIBLE; + m->selected = slot; + update = -1; + } + } + break; + } + + case 6: /* set default slot */ + { + config.s_default = slot; + config_save(); + break; + } + + case 7: /* delete file */ + { + if (slots[slot].valid) + { + if (slot_delete(slot,config.s_device) >= 0) + { + /* hide screenshot */ + gxTextureClose(&bg_saves[0].texture); + bg_saves[0].state &= ~IMAGE_VISIBLE; + slots[slot].valid = 0; + update = -1; + } + } + break; + } + + case 8: /* save file */ + { + ret = slot_save(slot,config.s_device); + + /* force exit */ + if (ret > 0) + { + GUI_DrawMenuFX(m, 20, 1); + m->buttons[slot].state &= ~BUTTON_SELECTED; + m->bg_images[7].state &= ~IMAGE_VISIBLE; + if (sram.on) + m->buttons[0].state |= BUTTON_ACTIVE; + m->buttons[1].state |= BUTTON_ACTIVE; + m->buttons[2].state |= BUTTON_ACTIVE; + m->buttons[3].state |= BUTTON_ACTIVE; + m->buttons[4].state |= BUTTON_ACTIVE; + m->buttons[5].state &= ~BUTTON_VISIBLE; + m->buttons[6].state &= ~BUTTON_VISIBLE; + m->buttons[7].state &= ~BUTTON_VISIBLE; + m->buttons[8].state &= ~BUTTON_VISIBLE; + m->selected = slot; + update = -1; + } + break; + } + + default: + break; + } + } + + if (update < 0) + { + /* close right window */ + if (m->bg_images[7].state & IMAGE_VISIBLE) + { + /* slide out window */ + GUI_DrawMenuFX(m, 20, 1); + + /* clear current selection */ + m->buttons[slot].state &= ~BUTTON_SELECTED; + + /* enable left buttons */ + if (sram.on) + m->buttons[0].state |= BUTTON_ACTIVE; + m->buttons[1].state |= BUTTON_ACTIVE; + m->buttons[2].state |= BUTTON_ACTIVE; + m->buttons[3].state |= BUTTON_ACTIVE; + m->buttons[4].state |= BUTTON_ACTIVE; + + /* disable right window */ + m->bg_images[7].state &= ~IMAGE_VISIBLE; + m->buttons[5].state &= ~BUTTON_VISIBLE; + m->buttons[6].state &= ~BUTTON_VISIBLE; + m->buttons[7].state &= ~BUTTON_VISIBLE; + m->buttons[8].state &= ~BUTTON_VISIBLE; + + /* stay in menu */ + m->selected = slot; + update = 0; + } + } + } + + /* leave menu */ + m->bg_images[3].state |= IMAGE_SLIDE_TOP; + m->bg_images[4].state |= IMAGE_SLIDE_BOTTOM; + m->bg_images[5].state |= IMAGE_SLIDE_TOP; + GUI_DrawMenuFX(m,30,1); + GUI_DeleteMenu(m); + return ret; +} + +/**************************************************************************** + * Load Game menu + * + ****************************************************************************/ +static int loadgamemenu () +{ + int ret, filetype; + gui_menu *m = &menu_load; + GUI_InitMenu(m); + GUI_DrawMenuFX(m,30,0); + + while (1) + { + ret = GUI_RunMenu(m); + + switch (ret) + { + /*** Button B ***/ + case -1: + GUI_DrawMenuFX(m,30,1); + GUI_DeleteMenu(m); + return 0; + + /*** Load from selected device */ + default: + { + /* ROM File type */ + filetype = ret - 1; + + /* Try to open current directory */ + if (ret > 0) + { + ret = OpenDirectory(config.l_device, filetype); + } + else + { + ret = OpenDirectory(TYPE_RECENT, filetype); + } + + if (ret) + { + GUI_DeleteMenu(m); + if (FileSelector(filetype)) + { + /* directly jump to game */ + return 1; + } + GUI_InitMenu(m); + } + break; + } + } + } + + return 0; +} + +/*************************************************************************** + * Show rom info screen + ***************************************************************************/ +static void showrominfo (void) +{ + char items[15][64]; + char msg[32]; + + /* fill ROM infos */ + sprintf (items[0], "Console Type: %s", rominfo.consoletype); + sprintf (items[1], "Copyright: %s", rominfo.copyright); + sprintf (items[2], "Company Name: %s", get_company()); + sprintf (items[3], "Domestic Name:"); + sprintf (items[4], "%s",rominfo.domestic); + sprintf (items[5], "International Name:"); + sprintf (items[6], "%s",rominfo.international); + sprintf (items[7], "Type: %s (%s)",rominfo.ROMType, strcmp(rominfo.ROMType, "AI") ? "Game" : "Educational"); + sprintf (items[8], "Product ID: %s", rominfo.product); + sprintf (items[9], "Checksum: %04x (%04x) (%s)", rominfo.checksum, rominfo.realchecksum, + (rominfo.checksum == rominfo.realchecksum) ? "GOOD" : "BAD"); + + sprintf (items[10], "Supports: "); + if (rominfo.peripherals & (1 << 1)) + { + strcat(items[10],get_peripheral(1)); + strcat(items[10],", "); + } + else if (rominfo.peripherals & (1 << 0)) + { + strcat(items[10],get_peripheral(0)); + strcat(items[10],", "); + } + if (rominfo.peripherals & (1 << 7)) + { + strcat(items[10],get_peripheral(7)); + strcat(items[10],", "); + } + if (rominfo.peripherals & (1 << 8)) + { + strcat(items[10],get_peripheral(8)); + strcat(items[10],", "); + } + if (rominfo.peripherals & (1 << 11)) + { + strcat(items[10],get_peripheral(11)); + strcat(items[10],", "); + } + if (rominfo.peripherals & (1 << 13)) + { + strcat(items[10],get_peripheral(13)); + strcat(items[10],", "); + } + if (strlen(items[10]) > 10) + items[10][strlen(items[10]) - 2] = 0; + + sprintf (items[11], "ROM end: $%06X", rominfo.romend); + + if (sram.custom) + sprintf (items[12], "Serial EEPROM"); + else if (sram.detected) + sprintf (items[12], "SRAM Start: $%06X", sram.start); + else + sprintf (items[12], "No Backup Memory specified"); + + if (sram.custom == 1) + sprintf (items[13], "Type: I2C (24Cxx)"); + else if (sram.custom == 2) + sprintf (items[13], "Type: SPI (25x512/95x512)"); + else if (sram.custom == 3) + sprintf (items[13], "Type: I2C (93C46)"); + else if (sram.detected) + sprintf (items[13], "SRAM End: $%06X", sram.end); + else if (sram.on) + sprintf (items[13], "SRAM enabled by default"); + else + sprintf (items[13], "SRAM disabled by default"); + + if (region_code == REGION_USA) + sprintf (items[14], "Region Code: %s (USA)", rominfo.country); + else if (region_code == REGION_EUROPE) + sprintf (items[14], "Region Code: %s (EUR)", rominfo.country); + else if (region_code == REGION_JAPAN_NTSC) + sprintf (items[14], "Region Code: %s (JPN)", rominfo.country); + else if (region_code == REGION_JAPAN_PAL) + sprintf (items[14], "Region Code: %s (JPN-PAL)", rominfo.country); + +#ifdef USE_BENCHMARK + /* ROM benchmark */ + if (!config.ntsc) + { + int frames = 0; + u64 start = gettime(); + do + { + system_frame(0); + audio_update(); + } + while (++frames < 300); + u64 end = gettime(); + sprintf(msg,"ROM Header Info (%d fps)", (300 * 1000000) / diff_usec(start,end)); + } + else +#endif + { + strcpy(msg,"ROM Header Info"); + } + + GUI_TextWindow(&menu_main, msg, items, 15, 15); +} + +/*************************************************************************** + * Show credits + ***************************************************************************/ +static void showcredits(void) +{ + int offset = 0; + + gx_texture *texture = gxTextureOpenPNG(Bg_credits_png,0); + s16 p = 0; + + while (!p) + { + gxClearScreen ((GXColor)BLACK); + if (texture) + gxDrawTexture(texture, (640-texture->width)/2, (480-texture->height)/2, texture->width, texture->height,255); + + FONT_writeCenter("Genesis Plus Core", 24, 0, 640, 480 - offset, (GXColor)LIGHT_BLUE); + FONT_writeCenter("improved emulation code, fixes & extra features by Eke-Eke", 18, 0, 640, 516 - offset, (GXColor)WHITE); + FONT_writeCenter("original 1.3 version by Charles MacDonald", 18, 0, 640, 534 - offset, (GXColor)WHITE); + FONT_writeCenter("original Z80 core by Juergen Buchmueller", 18, 0, 640, 552 - offset, (GXColor)WHITE); + FONT_writeCenter("original 68k core (Musashi) by Karl Stenerud", 18, 0, 640, 570 - offset, (GXColor)WHITE); + FONT_writeCenter("original YM2612/2413 cores by Jarek Burczynski, Tatsuyuki Satoh", 18, 0, 640, 588 - offset, (GXColor)WHITE); + FONT_writeCenter("original SN76489 core by Maxim", 18, 0, 640, 606 - offset, (GXColor)WHITE); + FONT_writeCenter("SVP core by Gravydas Ignotas (Notaz)", 18, 0, 640, 624 - offset, (GXColor)WHITE); + FONT_writeCenter("Blip Buffer Library & NTSC Video Filter by Shay Green (Blargg)", 18, 0, 640, 642 - offset, (GXColor)WHITE); + FONT_writeCenter("3-Band EQ implementation by Neil C", 18, 0, 640, 660 - offset, (GXColor)WHITE); + + FONT_writeCenter("Special thanks to ...", 20, 0, 640, 700 - offset, (GXColor)LIGHT_GREEN); + FONT_writeCenter("Nemesis, Tasco Deluxe, Bart Trzynadlowski, Jorge Cwik, Haze,", 18, 0, 640, 736 - offset, (GXColor)WHITE); + FONT_writeCenter("Stef Dallongeville, Notaz, AamirM, Steve Snake, Charles MacDonald", 18, 0, 640, 754 - offset, (GXColor)WHITE); + FONT_writeCenter("Spritesmind & SMS Power forums members for their technical help", 18, 0, 640, 772 - offset, (GXColor)WHITE); + + FONT_writeCenter("Gamecube & Wii port", 24, 0, 640, 830 - offset, (GXColor)LIGHT_BLUE); + FONT_writeCenter("porting code, GUI engine & design by Eke-Eke", 18, 0, 640, 866 - offset, (GXColor)WHITE); + FONT_writeCenter("original Gamecube port by Softdev, Honkeykong & Markcube", 18, 0, 640, 884 - offset, (GXColor)WHITE); + FONT_writeCenter("original icons, logo & button design by Low Lines", 18, 0, 640, 906 - offset, (GXColor)WHITE); + FONT_writeCenter("credit illustration by Orioto (Deviant Art)", 18, 0, 640, 924 - offset, (GXColor)WHITE); + FONT_writeCenter("memory card icon design by Brakken", 18, 0, 640, 942 - offset, (GXColor)WHITE); + FONT_writeCenter("libogc by Shagkur & various other contibutors", 18, 0, 640, 960 - offset, (GXColor)WHITE); + FONT_writeCenter("libfat by Chism", 18, 0, 640, 978 - offset, (GXColor)WHITE); + FONT_writeCenter("wiiuse by Michael Laforest (Para)", 18, 0, 640, 996 - offset, (GXColor)WHITE); + FONT_writeCenter("asndlib & OGG player by Francisco Muñoz (Hermes)", 18, 0, 640, 1014 - offset, (GXColor)WHITE); + FONT_writeCenter("zlib, libpng & libtremor by their respective authors", 18, 0, 640, 1032 - offset, (GXColor)WHITE); + FONT_writeCenter("devkitPPC by Wintermute", 18, 0, 640, 1050 - offset, (GXColor)WHITE); + + FONT_writeCenter("Special thanks to ...", 20, 0, 640, 1090 - offset, (GXColor)LIGHT_GREEN); + FONT_writeCenter("Softdev, Tmbinc, Costis, Emukiddid, Team Twiizer", 18, 0, 640, 1126 - offset, (GXColor)WHITE); + FONT_writeCenter("Brakken & former Tehskeen members for their support", 18, 0, 640, 1144 - offset, (GXColor)WHITE); + FONT_writeCenter("Anca, my wife, for her patience & various ideas", 18, 0, 640, 1162 - offset, (GXColor)WHITE); + + gxSetScreen(); + p = m_input.keys; + gxSetScreen(); + p |= m_input.keys; + offset ++; + if (offset > 1144) + offset = 0; + } + + gxTextureClose(&texture); +} + +static void exitmenu(void) +{ + char *items[3] = + { + "View Credits", +#ifdef HW_RVL + "Exit to System Menu", +#else + "Reset System", +#endif + "Return to Loader", + }; + + /* check if loader stub exists */ + int maxitems = reload ? 3 : 2; + + /* display option window */ + switch (GUI_OptionWindow(&menu_main, osd_version, items, maxitems)) + { + case 0: /* credits */ + GUI_DeleteMenu(&menu_main); + showcredits(); + GUI_InitMenu(&menu_main); + break; + + case 1: /* reset */ +#ifdef HW_RVL + gxTextureClose(&w_pointer); +#endif + GUI_DeleteMenu(&menu_main); + GUI_FadeOut(); + shutdown(); +#ifdef HW_RVL + SYS_ResetSystem(SYS_RETURNTOMENU, 0, 0); +#else + SYS_ResetSystem(SYS_HOTRESET,0,0); +#endif + break; + + case 2: /* exit to loader */ +#ifdef HW_RVL + gxTextureClose(&w_pointer); +#endif + GUI_DeleteMenu(&menu_main); + GUI_FadeOut(); + shutdown(); + SYS_ResetSystem(SYS_SHUTDOWN,0,0); + __lwp_thread_stopmultitasking(*reload); + break; + + default: + break; + } +} + +/**************************************************************************** + * Main Menu + * + ****************************************************************************/ + +static void mainmenu_cb(void) +{ + char temp[4]; + gui_menu *m = &menu_main; + int status = areplay_get_status(); + + /* Action Replay Switch current status */ + if (status == AR_SWITCH_TRAINER) strcpy(temp,"TM"); + else if (status == AR_SWITCH_ON) strcpy(temp,"ON"); + else strcpy(temp,"OFF"); + + /* Display informations */ + if (m->selected == 6) + { + FONT_writeCenter("Action\nReplay", 14, m->items[6].x, m->items[6].x + 54, m->items[6].y + (m->items[6].h - 28)/2 + 14, (GXColor)DARK_GREY); + FONT_writeCenter(temp, 11, m->items[6].x + 56 + 3, m->items[6].x + 78 + 2, m->items[6].y + (m->items[6].h - 11)/2 + 11, (GXColor)DARK_GREY); + } + else + { + FONT_writeCenter("Action\nReplay", 12, m->items[6].x + 4, m->items[6].x + 54, m->items[6].y + (m->items[6].h - 24)/2 + 12, (GXColor)DARK_GREY); + FONT_writeCenter(temp, 10, m->items[6].x + 56, m->items[6].x + 78, m->items[6].y + (m->items[6].h - 10)/2 + 10, (GXColor)DARK_GREY); + } +} + +void mainmenu(void) +{ + char filename[MAXPATHLEN]; + int status, quit = 0; + + /* Autosave Backup RAM */ + slot_autosave(0, config.s_device); + +#ifdef HW_RVL + /* Detect shutdown request */ + if (Shutdown) + { + GUI_FadeOut(); + shutdown(); + if (reload) + { + /* exit to loader if requested */ + SYS_ResetSystem(SYS_SHUTDOWN,0,0); + __lwp_thread_stopmultitasking(*reload); + } + else + { + /* shutdown system by default */ + SYS_ResetSystem(SYS_POWEROFF, 0, 0); + } + } + + /* Wiimote pointer */ + w_pointer = gxTextureOpenPNG(generic_point_png,0); +#endif + + gui_menu *m = &menu_main; + + /* Update main menu */ + if (!m->screenshot) + { + if (config.bg_overlay) + { + bg_main[1].state |= IMAGE_VISIBLE; + bg_misc[1].state |= IMAGE_VISIBLE; + bg_ctrls[1].state |= IMAGE_VISIBLE; + bg_list[1].state |= IMAGE_VISIBLE; + bg_saves[2].state |= IMAGE_VISIBLE; + } + else + { + bg_main[1].state &= ~IMAGE_VISIBLE; + bg_misc[1].state &= ~IMAGE_VISIBLE; + bg_ctrls[1].state &= ~IMAGE_VISIBLE; + bg_list[1].state &= ~IMAGE_VISIBLE; + bg_saves[2].state &= ~IMAGE_VISIBLE; + } + + if (system_hw) + { + m->screenshot = 128; + m->bg_images[0].state &= ~IMAGE_VISIBLE; + m->items[0].y -= 90; + m->items[1].y -= 90; + m->items[2].y -= 90; + m->buttons[0].y -= 90; + m->buttons[1].y -= 90; + m->buttons[2].y -= 90; + m->buttons[0].shift[1] = 3; + m->buttons[1].shift[1] = 3; + m->buttons[2].shift[1] = 3; + m->buttons[3].state |= (BUTTON_VISIBLE | BUTTON_ACTIVE); + m->buttons[4].state |= (BUTTON_VISIBLE | BUTTON_ACTIVE); + m->buttons[5].state |= (BUTTON_VISIBLE | BUTTON_ACTIVE); + m->buttons[7].state |= (BUTTON_VISIBLE | BUTTON_ACTIVE); + m->buttons[8].state |= (BUTTON_VISIBLE | BUTTON_ACTIVE); + m->buttons[9].state |= (BUTTON_VISIBLE | BUTTON_ACTIVE); + if (areplay_get_status() >= 0) + { + menu_main.buttons[6].state |= (BUTTON_VISIBLE | BUTTON_ACTIVE); + menu_main.items[6].data = Button_sm_grey_png; + menu_main.cb = mainmenu_cb; + menu_main.buttons[3].shift[1] = 3; + menu_main.buttons[7].shift[0] = 1; + menu_main.buttons[8].shift[2] = 2; + } + } + } + + GUI_InitMenu(m); + GUI_DrawMenuFX(m,10,0); + + while (quit == 0) + { + switch (GUI_RunMenu(m)) + { + /*** Load Game Menu ***/ + case 0: + { + GUI_DrawMenuFX(m,30,1); + GUI_DeleteMenu(m); + + if (loadgamemenu()) + { + /* restart emulation */ + reloadrom(); + + /* check current controller configuration */ + if (!gx_input_FindDevices()) + { + GUI_InitMenu(m); + GUI_DrawMenuFX(m,30,0); + GUI_WaitPrompt("Error","Invalid Controllers Settings"); + break; + } + + /* exit to game and reinitialize emulation */ + gxClearScreen((GXColor)BLACK); + gxSetScreen(); + quit = 1; + break; + } + + GUI_InitMenu(m); + GUI_DrawMenuFX(m,30,0); + break; + } + + /*** Options Menu */ + case 1: + { + GUI_DrawMenuFX(m,30,1); + GUI_DeleteMenu(m); + optionmenu(); + GUI_InitMenu(m); + GUI_DrawMenuFX(m,30,0); + break; + } + + /*** Exit Menu ***/ + case 2: + { + exitmenu(); + break; + } + + /*** Save Manager ***/ + case 3: + { + GUI_DrawMenuFX(m,30,1); + GUI_DeleteMenu(m); + + if (savemenu()) + { + /* check current controller configuration */ + if (!gx_input_FindDevices()) + { + GUI_InitMenu(m); + GUI_DrawMenuFX(m,30,0); + GUI_WaitPrompt("Error","Invalid Controllers Settings"); + break; + } + + /* exit to game */ + quit = 1; + break; + } + + GUI_InitMenu(m); + GUI_DrawMenuFX(m,30,0); + break; + } + + /*** Soft / Hard reset ***/ + case 4: + { + /* check current controller configuration */ + if (!gx_input_FindDevices()) + { + GUI_WaitPrompt("Error","Invalid Controllers Settings"); + break; + } + + /* reinitialize emulation */ + GUI_DrawMenuFX(m,10,1); + GUI_DeleteMenu(m); + gxClearScreen((GXColor)BLACK); + gxSetScreen(); + + if (system_hw & SYSTEM_MD) + { + /* Soft Reset */ + gen_reset(0); + } + else if (system_hw == SYSTEM_SMS) + { + /* assert RESET input (Master System model 1 only) */ + io_reg[0x0D] &= ~IO_RESET_HI; + } + else + { + /* Hard Reset */ + system_init(); + system_reset(); + + /* restore SRAM */ + slot_autoload(0,config.s_device); + } + + /* exit to game */ + quit = 1; + break; + } + + /*** Cheats menu ***/ + case 5: + { + GUI_DrawMenuFX(m,30,1); + GUI_DeleteMenu(m); + CheatMenu(); + GUI_InitMenu(m); + GUI_DrawMenuFX(m,30,0); + break; + } + + /*** Action Replay switch ***/ + case 6: + { + status = (areplay_get_status() + 1) % (AR_SWITCH_TRAINER + 1); + areplay_set_status(status); + status = areplay_get_status(); + GUI_DeleteMenu(m); + if (status == AR_SWITCH_TRAINER) m->items[6].data = Button_sm_blue_png; + else if (status == AR_SWITCH_ON) m->items[6].data = Button_sm_yellow_png; + else m->items[6].data = Button_sm_grey_png; + GUI_InitMenu(m); + break; + } + + /*** Return to Game ***/ + case 7: + case -1: + { + if (system_hw) + { + /* check current controller configuration */ + if (!gx_input_FindDevices()) + { + GUI_WaitPrompt("Error","Invalid Controllers Settings"); + break; + } + + /* exit to game */ + GUI_DrawMenuFX(m,10,1); + GUI_DeleteMenu(m); + quit = 1; + } + break; + } + + /*** Game Capture ***/ + case 8: + { + /* PNG filename */ + sprintf(filename,"%s/snaps/%s.png", DEFAULT_PATH, rom_filename); + + /* Save file and return */ + gxSaveScreenshot(filename); + break; + } + + /*** ROM information screen ***/ + case 9: + { + showrominfo(); + break; + } + } + } + + /*** Remove any still held buttons ***/ + while (PAD_ButtonsHeld(0)) + { + VIDEO_WaitVSync(); + PAD_ScanPads(); + } +#ifdef HW_RVL + while (WPAD_ButtonsHeld(0)) + { + VIDEO_WaitVSync(); + WPAD_ScanPads(); + } + gxTextureClose(&w_pointer); + + /* USB Mouse support */ + if ((input.system[0] == SYSTEM_MOUSE) || (input.system[1] == SYSTEM_MOUSE)) + { + MOUSE_Init(); + } + else + { + MOUSE_Deinit(); + } +#endif +} diff --git a/genplus-gx/gx/gui/menu.h b/genplus-gx/gx/gui/menu.h new file mode 100644 index 0000000000..e10c2255a3 --- /dev/null +++ b/genplus-gx/gx/gui/menu.h @@ -0,0 +1,46 @@ +/**************************************************************************** + * menu.c + * + * Genesis Plus GX menus + * + * Copyright Eke-Eke (2009-2013) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _MENU_H +#define _MENU_H + +extern void mainmenu(void); +extern void (*reload)(void); + +#endif diff --git a/genplus-gx/gx/gui/saveicon.h b/genplus-gx/gx/gui/saveicon.h new file mode 100644 index 0000000000..a0ae7547da --- /dev/null +++ b/genplus-gx/gx/gui/saveicon.h @@ -0,0 +1,136 @@ +/*********************************************************** + * Genesis Plus Save Icon + * Made by Brakken (http://www.tehskeen.com) + * + ************************************************************/ +unsigned short icon[1024] = { + + 0xFFFF, 0xFFFF, 0xFBDE, 0xFBDE, 0xFBDE, 0xFBDE, 0xFBDE, 0xEB5A, + 0xFBDE, 0xFBDE, 0xFBDE, 0xBDCD, 0xFBDE, 0xF7BD, 0xF7BD, 0xAD49, + 0xEB59, 0xB9AD, 0xC1EF, 0xC1EF, 0x9062, 0x8000, 0x8C41, 0x8C41, + 0x8000, 0x9CE6, 0xA0E6, 0xA507, 0x8400, 0x9CC5, 0xA0E6, 0xA0E6, + 0xC1EF, 0xC1EF, 0xC1EF, 0xC1EF, 0x8000, 0x8000, 0x8000, 0x8000, + 0x9083, 0x8C63, 0x8C63, 0x9484, 0x8C63, 0x9083, 0x9484, 0x94A4, + 0xC1EF, 0xC20F, 0xC20F, 0xBDCE, 0x8000, 0x8000, 0x8000, 0x8000, + 0x9083, 0x8821, 0x8842, 0x8842, 0x8842, 0xA107, 0xB58C, 0xAD6B, + 0xA529, 0x94A4, 0x9083, 0x94A4, 0x8000, 0x8000, 0x8400, 0x8400, + 0x8842, 0x8842, 0x8842, 0x8821, 0xB18B, 0xA949, 0xA108, 0xA107, + 0xA528, 0xB9AD, 0xC630, 0xCE51, 0x8000, 0x8000, 0x8000, 0x8000, + 0x8821, 0x8821, 0x8821, 0x8400, 0xA108, 0xA529, 0xA108, 0xA529, + 0xCA30, 0xC630, 0xCA30, 0xFBDE, 0x8000, 0x8000, 0x8000, 0xAD27, + 0x8400, 0x9083, 0x8863, 0x8400, 0x9CE6, 0x8842, 0x8C63, 0x8C20, + 0xFBDE, 0xFBDE, 0xFFFF, 0xFFFF, 0xFBDE, 0xFBDE, 0xFBDE, 0xFBDE, + 0xDA92, 0xFBDE, 0xFBDE, 0xFBDE, 0xC1AB, 0xF7BD, 0xFBDE, 0xFBDE, + 0xF7BD, 0xF7BD, 0xF7BD, 0xA0E6, 0xF7BD, 0xF7BD, 0xF39C, 0x9484, + 0xF39C, 0xF39C, 0xDEF7, 0x8C41, 0xF39C, 0xEF7B, 0xD272, 0x8400, + 0x8C42, 0x9CE6, 0xA507, 0xA0E6, 0x8C63, 0x9CC5, 0xA107, 0x9CE6, + 0x9484, 0x98A5, 0x9CE6, 0x98C5, 0x9CC5, 0x98C5, 0xA0E7, 0x98C5, + 0x8C42, 0x9083, 0x94A5, 0x9083, 0x8C42, 0x9083, 0x9084, 0x8C62, + 0x8C62, 0x9083, 0x9084, 0x8C62, 0x8C63, 0x9083, 0x94A4, 0x8C63, + 0x8842, 0x9CC6, 0xA107, 0xA0E7, 0x8842, 0x8842, 0xA108, 0xA54A, + 0x8842, 0x8C63, 0xB5AD, 0xB5AD, 0x8C63, 0x8C62, 0x8842, 0x8C63, + 0x98C5, 0xA528, 0xB5AC, 0xB5AC, 0xA52A, 0xBDEF, 0xC631, 0xCA52, + 0xB9CE, 0xB9CE, 0xA94A, 0xAD6B, 0x8C63, 0x8821, 0x8821, 0x8821, + 0xA529, 0x98C5, 0x98C5, 0xA0E6, 0xC210, 0xA529, 0xA529, 0xA529, + 0xB5AD, 0xB5CD, 0xB5AD, 0xBDEF, 0x8400, 0x8821, 0x8C62, 0x8821, + 0xA0E7, 0x8842, 0x8842, 0x8C41, 0x9083, 0x8842, 0x8842, 0x8842, + 0x94A5, 0x8842, 0x8C62, 0x8C62, 0x8C42, 0x9083, 0x8C62, 0x8C62, + 0xB548, 0xF7BD, 0xF7BD, 0xF7BD, 0xA4C4, 0xF7BD, 0xF7BD, 0xF7BD, + 0x9461, 0xDED5, 0xF39C, 0xF39C, 0x8C20, 0xD271, 0xF39C, 0xF39C, + 0xEF7B, 0xEF7B, 0xC610, 0x8400, 0xEF7B, 0xEB5A, 0xB9AC, 0x8000, + 0xEB5A, 0xEB5A, 0xA528, 0x9CC5, 0xE739, 0xE739, 0x9CC6, 0x98A5, + 0x98C5, 0x98C5, 0xA0E6, 0x94A4, 0x94A4, 0x98C5, 0x94A5, 0x9484, + 0xA528, 0x98C5, 0x9CE6, 0xA0E7, 0x9CE6, 0xA4E6, 0x98A4, 0xA507, + 0x8C62, 0x9083, 0x9484, 0x9083, 0x94A4, 0x94A5, 0x98C5, 0x98C5, + 0xA107, 0xA107, 0xA107, 0xB18B, 0xA907, 0x9062, 0x9484, 0x9CE6, + 0x8842, 0x94A4, 0x9484, 0x9084, 0x8C62, 0x8C63, 0x9CC5, 0x9CC5, + 0x98C6, 0x8C63, 0x9484, 0xA0E6, 0x9CE6, 0x9084, 0x94A4, 0x90A5, + 0x8C63, 0x8C42, 0x8C62, 0x8C62, 0x8C63, 0xA108, 0xA94A, 0xA528, + 0x94A5, 0x8884, 0x8884, 0x8884, 0xB0A5, 0xBC84, 0xA483, 0xA484, + 0x8C63, 0x8C42, 0x8C63, 0x9083, 0xA94A, 0x9083, 0x8C62, 0x94A4, + 0x8884, 0x8063, 0x90A5, 0x94A4, 0xA483, 0xBC63, 0xA884, 0x8884, + 0x9083, 0x8C63, 0x8C42, 0x8C63, 0x9084, 0x8842, 0x9083, 0x9084, + 0x8C42, 0x8C62, 0x98C6, 0xAD6A, 0x9083, 0x8C63, 0x98C5, 0xA107, + 0x8400, 0xC1ED, 0xEF7B, 0xEF7B, 0x8400, 0xAD27, 0xEF7B, 0xEF7B, + 0x9CE6, 0x9CA4, 0xEB5A, 0xEB5A, 0x9CE6, 0x9062, 0xDAB4, 0xE739, + 0xE739, 0xE318, 0x9483, 0x8C63, 0xE318, 0xCE72, 0x9062, 0x9CC5, + 0xDEF7, 0xC20F, 0x8C41, 0x9CE6, 0xDAD6, 0xB9AC, 0x8C20, 0x9CC5, + 0xA0E6, 0xA528, 0x9CC5, 0xA528, 0xA508, 0x94A5, 0x98C6, 0xA108, + 0x9CE6, 0x9CC5, 0xA0E7, 0xA94A, 0xA0E6, 0xA0E7, 0xA507, 0xAD6B, + 0xA107, 0x98C6, 0x9CE6, 0x9083, 0x98C6, 0xA108, 0xA107, 0x98C5, + 0xB9CD, 0xB18B, 0xA107, 0x9CC6, 0xC210, 0xB9CE, 0xA528, 0x9CC6, + 0x98C5, 0x94A5, 0x9084, 0x8884, 0x9CC6, 0x9CE6, 0x9CC6, 0x94A5, + 0x9CE6, 0x9CE6, 0x9CE7, 0xA108, 0x98C5, 0x98C5, 0x98C6, 0x98C6, + 0xB0C6, 0xD0C6, 0xD0C6, 0xD0C6, 0x90A4, 0x90A4, 0x98A5, 0x9CA4, + 0x9CE6, 0x90A4, 0x9084, 0x9084, 0x98C6, 0x98C6, 0x98C6, 0x98C6, + 0xD0A5, 0xD0A5, 0xA484, 0x8483, 0x9484, 0x9083, 0x8C83, 0x9084, + 0x90A5, 0x94A5, 0x9CE6, 0x9CE6, 0x98C6, 0x98C6, 0x9CE6, 0x98C6, + 0x8C63, 0x9084, 0x9484, 0x9083, 0x98C5, 0x98C5, 0x94A4, 0x94A5, + 0x98C6, 0x98C6, 0x98C5, 0x98C5, 0x98C6, 0x98C6, 0x98C6, 0x98C6, + 0x9084, 0x8821, 0xCE51, 0xE739, 0x94A5, 0x8C20, 0xBDCE, 0xE318, + 0x98C5, 0x8821, 0xB18B, 0xE318, 0x98C6, 0x8842, 0xAD49, 0xDEF7, + 0xDAD6, 0xAD49, 0x8C41, 0xA508, 0xD6B5, 0xBDCC, 0x8C20, 0x8C41, + 0xD6B5, 0xD294, 0xB98A, 0xAD06, 0xD294, 0xCE73, 0xCE73, 0xCA52, + 0xA94A, 0xB5AD, 0xB18C, 0xAD6B, 0x9062, 0x9062, 0x9062, 0x9062, + 0xAD27, 0xAD06, 0xAD06, 0xAD06, 0xCA52, 0xC631, 0xC631, 0xC210, + 0xA94B, 0xB18C, 0xB58D, 0xAD6B, 0x9062, 0x9484, 0x98A4, 0x98A4, + 0xA906, 0xA906, 0xA506, 0xA907, 0xC210, 0xC210, 0xB9F0, 0xBDEF, + 0xA94B, 0xA94B, 0xA94B, 0xA94B, 0x98A5, 0x98A5, 0x98A4, 0x98A4, + 0xA907, 0xA907, 0xA907, 0xA506, 0xBDEF, 0xBDEF, 0xBDEF, 0xB1F2, + 0xA94B, 0xA94A, 0xA54A, 0xA529, 0x9484, 0x9484, 0x9483, 0x9483, + 0xA4E6, 0xA4E6, 0xA4E6, 0xA4E6, 0xBDEF, 0xBDEF, 0xBDEF, 0xBDEF, + 0xA529, 0xA529, 0xA529, 0xA108, 0x9062, 0x8C63, 0x9062, 0x9062, + 0xA4E6, 0x9CE6, 0xA0E6, 0xA506, 0xBDEF, 0xC210, 0xC210, 0xC210, + 0xA108, 0x9CE7, 0x9CE7, 0x98C6, 0x8C41, 0x8C42, 0x8C41, 0x8C41, + 0xA507, 0xA508, 0xAD27, 0xB127, 0xC631, 0xC631, 0xCA52, 0xCA52, + 0x98C6, 0x8C63, 0xA0E6, 0xDAD6, 0x8C41, 0x8400, 0xB548, 0xDAD6, + 0xB127, 0xB548, 0xD6B5, 0xD6B5, 0xCE73, 0xCE73, 0xD294, 0xD6B5, + 0xD294, 0xCA74, 0xBA56, 0xB635, 0x9A3B, 0x81FF, 0x81FF, 0x81FF, + 0x81FF, 0x8A1F, 0xA27F, 0xA27F, 0x81FF, 0xA27F, 0xFFFF, 0xFFFF, + 0xB635, 0xB214, 0xB214, 0xBE11, 0x81FF, 0x81FF, 0x81FF, 0x81FF, + 0xA27F, 0xA27F, 0xA27F, 0x8A1F, 0xFFFF, 0xFFFF, 0xFFFF, 0xDF7F, + 0xA1F7, 0x91FA, 0x81FF, 0x95F9, 0x81FF, 0x81FF, 0x8A1F, 0x81FF, + 0x81FF, 0xD75F, 0xBEFF, 0x81FF, 0x81FF, 0xFFFF, 0xBEFF, 0x81FF, + 0xB9CE, 0xB9CE, 0x8DFC, 0x81FF, 0xA9D2, 0xA9D2, 0x81FF, 0x9A5F, + 0x99D6, 0x99D6, 0x81FF, 0xBEFF, 0x99D6, 0x99D6, 0x81FF, 0xBEFF, + 0x85FD, 0x95F9, 0xB5CF, 0xB1F1, 0x81FF, 0x81FF, 0x95F9, 0x81FF, + 0xEFBF, 0x81FF, 0x85FD, 0x81FF, 0xFFFF, 0x81FF, 0x81FF, 0x81FF, + 0xA5F5, 0xA5F5, 0xB5F2, 0xB214, 0x81FF, 0x81FF, 0x81FF, 0x81FF, + 0xB2BF, 0xB2BF, 0x81FF, 0x9A5F, 0xDF7F, 0xDF7F, 0x81FF, 0xE79F, + 0xA218, 0xA218, 0xA218, 0xA639, 0x81FF, 0x81FF, 0x81FF, 0x81FF, + 0xBEFF, 0xBEFF, 0xBEFF, 0xBEFF, 0xF7DF, 0xDF7F, 0xDF7F, 0xDF7F, + 0xA639, 0xB657, 0xCA75, 0xD294, 0x81FF, 0x81FF, 0x861E, 0xCA95, + 0xBEFF, 0xAA9F, 0x81FF, 0xB658, 0xD75F, 0x8A1F, 0x81FF, 0xCA75, + 0x81FF, 0xA27F, 0xFFFF, 0xA27F, 0x81FF, 0xA27F, 0xFFFF, 0xFFFF, + 0x81FF, 0xA27F, 0xFFFF, 0xBADF, 0x81FF, 0xA27F, 0xFFFF, 0xA27F, + 0x81FF, 0x81FF, 0xCF3F, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xBADF, + 0xA27F, 0xA27F, 0xA27F, 0x81FF, 0x81FF, 0x81FF, 0x81FF, 0x81FF, + 0x923F, 0xFFFF, 0xBEFF, 0x81FF, 0x81FF, 0xFFFF, 0xBEFF, 0x81FF, + 0x81FF, 0xFFFF, 0xCF3F, 0xA27F, 0x81FF, 0xFFFF, 0xFFFF, 0xFFFF, + 0x99D6, 0x99D6, 0x81FF, 0xBEFF, 0x81FF, 0x81FF, 0x81FF, 0xBEFF, + 0xA27F, 0xA27F, 0x9A5F, 0xBADF, 0xFFFF, 0xFFFF, 0xA27F, 0x81FF, + 0xFFFF, 0x81FF, 0x81FF, 0x81FF, 0xFFFF, 0x81FF, 0x81FF, 0x81FF, + 0xFFFF, 0xBEFF, 0xBEFF, 0xBEFF, 0xC71F, 0xDF7F, 0xDF7F, 0xDF7F, + 0xDF7F, 0xDF7F, 0x923F, 0xF7DF, 0xDF7F, 0xDF7F, 0x81FF, 0xAA9F, + 0xEFBF, 0xC71F, 0x81FF, 0x9A5F, 0xCF3F, 0x81FF, 0x8A1F, 0xD75F, + 0xE79F, 0xBEFF, 0xBEFF, 0xBEFF, 0xDF7F, 0xDF7F, 0xDF7F, 0xDF7F, + 0xBEFF, 0xBEFF, 0xBEFF, 0xC71F, 0xDF7F, 0xDF7F, 0xDF7F, 0xDF7F, + 0xBEFF, 0x81FF, 0x81FF, 0xB657, 0xFFFF, 0xC71F, 0x81FF, 0xA23A, + 0xFFFF, 0xC71F, 0x81FF, 0xA23A, 0xD75F, 0x8A1F, 0x81FF, 0xB658, + 0x81FF, 0x9A5F, 0xAA9F, 0x81FF, 0x921D, 0x81FF, 0x81FF, 0x85FE, + 0xD294, 0xBE55, 0xB657, 0xC653, 0xD294, 0xD294, 0xCE73, 0xCA52, + 0x8A1D, 0xB214, 0xB214, 0x8DFC, 0xBA34, 0xC631, 0xC210, 0xB612, + 0xC631, 0xC631, 0xC631, 0xC210, 0xCA52, 0xCA52, 0xC631, 0xC631, + 0x81FF, 0x81FF, 0x81FF, 0x81FF, 0x8DFC, 0x81FF, 0x81FF, 0x81FF, + 0xC210, 0xBE10, 0xBDEF, 0xBDEF, 0xC210, 0xC210, 0xC210, 0xBE10, + 0x81FF, 0x81FF, 0x81FF, 0x81FF, 0x81FF, 0x81FF, 0x8DFB, 0xA5D4, + 0xBDEF, 0xB9CE, 0xB9CE, 0xB9CE, 0xBDEF, 0xBDEF, 0xBDEF, 0xBDEF, + 0x81FF, 0x81FF, 0x81FF, 0x81FF, 0x99F8, 0x8DFB, 0x8DFB, 0x8DFB, + 0xB9CE, 0xBDEF, 0xBDEF, 0xBDEF, 0xBDEF, 0xBDEF, 0xBE10, 0xC210, + 0x81FF, 0x81FF, 0x81FF, 0x81FF, 0x95F9, 0xA5F5, 0xA1F7, 0x91FA, + 0xBDEF, 0xBE10, 0xC210, 0xC210, 0xC210, 0xC210, 0xC631, 0xC631, + 0x81FF, 0x81FF, 0x81FF, 0x81FF, 0x921C, 0x921C, 0x921C, 0x921C, + 0xC631, 0xC631, 0xCA52, 0xCA52, 0xC631, 0xCA52, 0xCA52, 0xCE73, + 0x81FF, 0x81FF, 0x9A3B, 0xD294, 0x961B, 0xAA39, 0xD294, 0xD294, + 0xCE73, 0xCE73, 0xD294, 0xD6B5, 0xCE73, 0xD294, 0xD6B5, 0xD6B5, +}; diff --git a/genplus-gx/gx/gx_audio.c b/genplus-gx/gx/gx_audio.c new file mode 100644 index 0000000000..b237c0e8d7 --- /dev/null +++ b/genplus-gx/gx/gx_audio.c @@ -0,0 +1,210 @@ +/**************************************************************************** + * gx_audio.c + * + * Genesis Plus GX audio support + * + * Copyright Eke-Eke (2007-2013), based on original work from Softdev (2006) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" + +/* Length is dimensionned for at least one frame of emulation */ +#define SOUND_BUFFER_LEN 4096 + +/* Number of sound buffers */ +#define SOUND_BUFFER_NUM 3 + +/* audio DMA status */ +u32 audioStarted; + +/* DMA soundbuffers (required to be 32-bytes aligned) */ +static u8 soundbuffer[SOUND_BUFFER_NUM][SOUND_BUFFER_LEN] ATTRIBUTE_ALIGN(32); + +/* Current work soundbuffer */ +static u8 mixbuffer; + +/* Background music */ +static u8 *Bg_music_ogg = NULL; +static u32 Bg_music_ogg_size = 0; + +/* Frame Sync */ +u32 audioSync; +static u32 audioWait; + +/***************************************************************************************/ +/* Audio engine */ +/***************************************************************************************/ + +/* Audio DMA callback */ +static void ai_callback(void) +{ + audioWait = 0; +} + +/* AUDIO engine initialization */ +void gx_audio_Init(void) +{ + /* Initialize AUDIO processing library (ASNDLIB) */ + /* AUDIO & DSP hardware are initialized */ + /* Default samplerate is set to 48kHz */ + ASND_Init(); + + /* Load background music from FAT device */ + char fname[MAXPATHLEN]; + sprintf(fname,"%s/Bg_music.ogg",DEFAULT_PATH); + FILE *f = fopen(fname,"rb"); + if (f) + { + struct stat filestat; + stat(fname, &filestat); + Bg_music_ogg_size = filestat.st_size; + Bg_music_ogg = memalign(32,Bg_music_ogg_size); + if (Bg_music_ogg) + { + fread(Bg_music_ogg,1,Bg_music_ogg_size,f); + } + fclose(f); + } + + /* emulation is synchronized with audio hardware by default */ + audioSync = 1; +} + +/* AUDIO engine shutdown */ +void gx_audio_Shutdown(void) +{ + PauseOgg(1); + StopOgg(); + ASND_Pause(1); + ASND_End(); + if (Bg_music_ogg) + { + free(Bg_music_ogg); + } +} + +/*** + gx_audio_Update + + This function retrieves samples for the frame then set the next DMA parameters + Parameters will be taken in account only when current DMA operation is over + ***/ +int gx_audio_Update(void) +{ + if (!audioWait) + { + /* Current available soundbuffer */ + s16 *sb = (s16 *)(soundbuffer[mixbuffer]); + + /* Retrieve audio samples (size must be multiple of 32 bytes) */ + int size = audio_update(sb) * 4; + + /* Update DMA settings */ + DCFlushRange((void *)sb, size); + AUDIO_InitDMA((u32) sb, size); + mixbuffer = (mixbuffer + 1) % SOUND_BUFFER_NUM; + audioWait = audioSync; + + /* Start Audio DMA */ + /* this is called once to kick-off DMA from external memory to audio interface */ + /* DMA operation is automatically restarted when all samples have been sent. */ + /* If DMA settings are not updated at that time, previous sound buffer will be used. */ + /* Therefore we need to make sure frame emulation is completed before current DMA is */ + /* completed, by synchronizing frame emulation with DMA start and also by syncing it */ + /* with Video Interrupt and outputing a suitable number of samples per frame. */ + if (!audioStarted) + { + /* restart audio DMA */ + AUDIO_StopDMA(); + AUDIO_StartDMA(); + audioStarted = 1; + } + + return SYNC_AUDIO; + } + + return SYNC_WAIT; +} + +/*** + gx_audio_Start + + This function restart the audio engine + This is called when coming back from Main Menu + ***/ +void gx_audio_Start(void) +{ + /* shutdown background music */ + PauseOgg(1); + StopOgg(); + + /* shutdown menu audio processing */ + ASND_Pause(1); + ASND_End(); + AUDIO_StopDMA(); + AUDIO_RegisterDMACallback(NULL); + DSP_Halt(); + + /* DMA Interrupt callback */ + AUDIO_RegisterDMACallback(ai_callback); + + /* reset emulation audio processing */ + memset(soundbuffer, 0, sizeof(soundbuffer)); + audioStarted = 0; + mixbuffer = 0; + audioWait = 0; +} + +/*** + gx_audio_Stop + + This function stops current Audio DMA process + This is called when going back to Main Menu + DMA need to be restarted when going back to the game (see above) + ***/ +void gx_audio_Stop(void) +{ + /* restart menu audio processing */ + DSP_Unhalt(); + ASND_Init(); + ASND_Pause(0); + + /* play background music */ + if (Bg_music_ogg && !Shutdown) + { + PauseOgg(0); + PlayOgg((char *)Bg_music_ogg, Bg_music_ogg_size, 0, OGG_INFINITE_TIME); + SetVolumeOgg(((int)config.bgm_volume * 255) / 100); + } +} diff --git a/genplus-gx/gx/gx_audio.h b/genplus-gx/gx/gx_audio.h new file mode 100644 index 0000000000..174a3ca45b --- /dev/null +++ b/genplus-gx/gx/gx_audio.h @@ -0,0 +1,52 @@ +/**************************************************************************** + * gx_audio.c + * + * Genesis Plus GX audio support + * + * Copyright Eke-Eke (2007-2013), based on original work from Softdev (2006) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _GC_AUDIO_H_ +#define _GC_AUDIO_H_ + +extern u32 audioStarted; +extern u32 audioSync; + +extern void gx_audio_Init(void); +extern void gx_audio_Shutdown(void); +extern void gx_audio_Start(void); +extern void gx_audio_Stop(void); +extern int gx_audio_Update(void); + +#endif diff --git a/genplus-gx/gx/gx_input.c b/genplus-gx/gx/gx_input.c new file mode 100644 index 0000000000..b175cb2500 --- /dev/null +++ b/genplus-gx/gx/gx_input.c @@ -0,0 +1,1641 @@ +/**************************************************************************** + * gx_input.c + * + * Genesis Plus GX input support + * + * Copyright Eke-Eke (2007-2013) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "font.h" +#include "gui.h" +#include "cheats.h" + +#ifdef HW_RVL +#include +#endif + +/* Analog sticks sensitivity */ +#define ANALOG_SENSITIVITY 30 + +/* Delay before held keys triggering */ +/* higher is the value, less responsive is the key update */ +#define HELD_DELAY 30 + +/* Direction & selection update speed when a key is being held */ +/* lower is the value, faster is the key update */ +#define HELD_SPEED 4 + + +/* Configurable keys */ +#define KEY_BUTTONA 0 +#define KEY_BUTTONB 1 +#define KEY_BUTTONC 2 +#define KEY_START 3 +#define KEY_BUTTONX 4 +#define KEY_BUTTONY 5 +#define KEY_BUTTONZ 6 +#define KEY_MODE 7 +#define KEY_MENU 8 + +#ifdef HW_RVL + +#define PAD_UP 0 +#define PAD_DOWN 1 +#define PAD_LEFT 2 +#define PAD_RIGHT 3 + +/* default directions mapping */ +static u32 wpad_dirmap[3][4] = +{ + {WPAD_BUTTON_RIGHT, WPAD_BUTTON_LEFT, WPAD_BUTTON_UP, WPAD_BUTTON_DOWN}, /* WIIMOTE */ + {WPAD_BUTTON_UP, WPAD_BUTTON_DOWN, WPAD_BUTTON_LEFT, WPAD_BUTTON_RIGHT}, /* WIIMOTE + NUNCHUK */ + {WPAD_CLASSIC_BUTTON_UP, WPAD_CLASSIC_BUTTON_DOWN, WPAD_CLASSIC_BUTTON_LEFT, WPAD_CLASSIC_BUTTON_RIGHT} /* CLASSIC */ +}; + +#define WPAD_BUTTONS_HELD (WPAD_BUTTON_UP | WPAD_BUTTON_DOWN | WPAD_BUTTON_LEFT | WPAD_BUTTON_RIGHT | \ + WPAD_BUTTON_MINUS | WPAD_BUTTON_PLUS | WPAD_BUTTON_A | WPAD_BUTTON_2 | \ + WPAD_CLASSIC_BUTTON_UP | WPAD_CLASSIC_BUTTON_DOWN | WPAD_CLASSIC_BUTTON_LEFT | WPAD_CLASSIC_BUTTON_RIGHT | \ + WPAD_CLASSIC_BUTTON_FULL_L | WPAD_CLASSIC_BUTTON_FULL_R | WPAD_CLASSIC_BUTTON_A) + +#endif + +#define PAD_BUTTONS_HELD (PAD_BUTTON_UP | PAD_BUTTON_DOWN | PAD_BUTTON_LEFT | PAD_BUTTON_RIGHT | \ + PAD_TRIGGER_L | PAD_TRIGGER_R | PAD_BUTTON_A) + +static char keyname[MAX_KEYS][16]; + +static int held_cnt = 0; +static int inputs_disabled = 0; + +/***************************************************************************************/ +/* Gamecube PAD support */ +/***************************************************************************************/ +static void pad_config(int chan, int first_key, int last_key) +{ + u16 p = 0; + char msg[64]; + + /* disable background PAD scanning */ + inputs_disabled = 1; + + /* Check if PAD is connected */ + VIDEO_WaitVSync(); + if (!(PAD_ScanPads() & (1< ANALOG_SENSITIVITY) + { + ConfigRequested = 1; + return; + } + + /* D-PAD */ + if ((p & PAD_BUTTON_UP) || (y > ANALOG_SENSITIVITY)) input.pad[i] |= INPUT_UP; + else if ((p & PAD_BUTTON_DOWN) || (y < -ANALOG_SENSITIVITY)) input.pad[i] |= INPUT_DOWN; + if ((p & PAD_BUTTON_LEFT) || (x < -ANALOG_SENSITIVITY)) input.pad[i] |= INPUT_LEFT; + else if ((p & PAD_BUTTON_RIGHT) || (x > ANALOG_SENSITIVITY)) input.pad[i] |= INPUT_RIGHT; + + /* Buttons */ + if (p & pad_keymap[KEY_BUTTONA]) input.pad[i] |= INPUT_A; + if (p & pad_keymap[KEY_BUTTONB]) input.pad[i] |= INPUT_B; + if (p & pad_keymap[KEY_BUTTONC]) input.pad[i] |= INPUT_C; + if (p & pad_keymap[KEY_START]) input.pad[i] |= INPUT_START; + + break; + } + + case DEVICE_XE_A1P: + { + /* Left Stick analog position [0-255] */ + input.analog[i][0] = (x + 128); + input.analog[i][1] = y ? (127 - y) : (128 - y); + + /* Right Stick analog position [0-255] */ + x = PAD_SubStickX(chan); + y = PAD_SubStickY(chan); + + /* Emulated stick is unidirectional but can be rotated */ + if (abs(x) > abs(y)) + { + input.analog[i+1][0] = (x + 128); + } + else + { + input.analog[i+1][0] = (y + 128); + } + + /* Buttons */ + if (p & pad_keymap[KEY_BUTTONA]) input.pad[i] |= INPUT_XE_A; + if (p & pad_keymap[KEY_BUTTONB]) input.pad[i] |= INPUT_XE_B; + if (p & pad_keymap[KEY_BUTTONC]) input.pad[i] |= INPUT_XE_C; + if (p & pad_keymap[KEY_START]) input.pad[i] |= INPUT_XE_START; + if (p & pad_keymap[KEY_BUTTONX]) input.pad[i] |= INPUT_XE_D; + if (p & pad_keymap[KEY_BUTTONY]) input.pad[i] |= INPUT_XE_E1; + if (p & pad_keymap[KEY_BUTTONZ]) input.pad[i] |= INPUT_XE_E2; + if (p & pad_keymap[KEY_MODE]) input.pad[i] |= INPUT_XE_SELECT; + + break; + } + + case DEVICE_SPORTSPAD: + { + /* Y analog position [0-255] */ + input.analog[i][1] = y ? (127 - y) : (128 - y); + + /* default inputs are checked below */ + } + + case DEVICE_PADDLE: + { + /* Default menu key (right analog stick) */ + if (PAD_SubStickX(chan) > ANALOG_SENSITIVITY) + { + ConfigRequested = 1; + return; + } + + /* X analog position [0-255] */ + input.analog[i][0] = (x + 128); + + /* Buttons */ + if (p & pad_keymap[KEY_BUTTONB]) input.pad[i] |= INPUT_BUTTON1; + if (p & pad_keymap[KEY_BUTTONC]) input.pad[i] |= INPUT_BUTTON2; + if (p & pad_keymap[KEY_START]) input.pad[i] |= INPUT_START; + + break; + } + + case DEVICE_PAD2B: + { + /* Default menu key (right analog stick) */ + if (PAD_SubStickX(chan) > ANALOG_SENSITIVITY) + { + ConfigRequested = 1; + return; + } + + /* D-PAD */ + if ((p & PAD_BUTTON_UP) || (y > ANALOG_SENSITIVITY)) input.pad[i] |= INPUT_UP; + else if ((p & PAD_BUTTON_DOWN) || (y < -ANALOG_SENSITIVITY)) input.pad[i] |= INPUT_DOWN; + if ((p & PAD_BUTTON_LEFT) || (x < -ANALOG_SENSITIVITY)) input.pad[i] |= INPUT_LEFT; + else if ((p & PAD_BUTTON_RIGHT) || (x > ANALOG_SENSITIVITY)) input.pad[i] |= INPUT_RIGHT; + + /* Buttons */ + if (p & pad_keymap[KEY_BUTTONB]) input.pad[i] |= INPUT_BUTTON1; + if (p & pad_keymap[KEY_BUTTONC]) input.pad[i] |= INPUT_BUTTON2; + if (p & pad_keymap[KEY_START]) input.pad[i] |= INPUT_START; + + break; + } + + case DEVICE_LIGHTGUN: + { + /* Default menu key (right analog stick) */ + if (PAD_SubStickX(chan) > ANALOG_SENSITIVITY) + { + ConfigRequested = 1; + return; + } + + /* Gun screen position (x,y) */ + input.analog[i][0] += x / ANALOG_SENSITIVITY; + input.analog[i][1] -= y / ANALOG_SENSITIVITY; + + /* Limits */ + if (input.analog[i][0] < 0) input.analog[i][0] = 0; + else if (input.analog[i][0] > bitmap.viewport.w) input.analog[i][0] = bitmap.viewport.w; + if (input.analog[i][1] < 0) input.analog[i][1] = 0; + else if (input.analog[i][1] > bitmap.viewport.h) input.analog[i][1] = bitmap.viewport.h; + + /* Buttons */ + if (p & pad_keymap[KEY_BUTTONA]) input.pad[i] |= INPUT_A; + if (p & pad_keymap[KEY_BUTTONB]) input.pad[i] |= INPUT_B; + if (p & pad_keymap[KEY_BUTTONC]) input.pad[i] |= INPUT_C; + if (p & pad_keymap[KEY_START]) input.pad[i] |= INPUT_START; + + break; + } + + case DEVICE_MOUSE: + { + /* Default menu key (right analog stick) */ + if (PAD_SubStickX(chan) > ANALOG_SENSITIVITY) + { + ConfigRequested = 1; + return; + } + + /* Mouse relative movement (-255,255) */ + input.analog[i][0] = (x / ANALOG_SENSITIVITY) * 2; + input.analog[i][1] = (y / ANALOG_SENSITIVITY) * 2; + + /* Y-Axis inversion */ + if (config.invert_mouse) + { + input.analog[i][1] = -input.analog[i][1]; + } + + /* Buttons */ + if (p & pad_keymap[KEY_BUTTONA]) input.pad[i] |= INPUT_MOUSE_CENTER; + if (p & pad_keymap[KEY_BUTTONB]) input.pad[i] |= INPUT_MOUSE_LEFT; + if (p & pad_keymap[KEY_BUTTONC]) input.pad[i] |= INPUT_MOUSE_RIGHT; + if (p & pad_keymap[KEY_START]) input.pad[i] |= INPUT_START; + + break; + } + + case DEVICE_PICO: + { + /* Default menu key (right analog stick) */ + if (PAD_SubStickX(chan) > ANALOG_SENSITIVITY) + { + ConfigRequested = 1; + return; + } + + /* D-PAD */ + if (p & PAD_BUTTON_UP) input.pad[0] |= INPUT_UP; + else if (p & PAD_BUTTON_DOWN) input.pad[0] |= INPUT_DOWN; + if (p & PAD_BUTTON_LEFT) input.pad[0] |= INPUT_LEFT; + else if (p & PAD_BUTTON_RIGHT) input.pad[0] |= INPUT_RIGHT; + + /* PEN screen position (x,y) */ + input.analog[0][0] += x / ANALOG_SENSITIVITY; + input.analog[0][1] -= y / ANALOG_SENSITIVITY; + + /* Limits */ + if (input.analog[0][0] < 0x17c) input.analog[0][0] = 0x17c; + else if (input.analog[0][0] > 0x3c) input.analog[0][0] = 0x3c; + if (input.analog[0][1] < 0x1fc) input.analog[0][1] = 0x1fc; + else if (input.analog[0][1] > 0x3f3) input.analog[0][1] = 0x3f3; + + /* PEN button */ + if (p & pad_keymap[KEY_BUTTONA]) input.pad[0] |= INPUT_PICO_RED; + + /* RED button */ + if (p & pad_keymap[KEY_BUTTONB]) input.pad[0] |= INPUT_PICO_PEN; + + /* PAGE index increment */ + if (p & pad_keymap[KEY_BUTTONC]) pico_current = (pico_current + 1) & 7; + + break; + } + + case DEVICE_TEREBI: + { + /* Default menu key (right analog stick) */ + if (PAD_SubStickX(chan) > ANALOG_SENSITIVITY) + { + ConfigRequested = 1; + return; + } + + /* PEN screen position (x,y) */ + input.analog[0][0] += x / ANALOG_SENSITIVITY; + input.analog[0][1] -= y / ANALOG_SENSITIVITY; + + /* Limits */ + if (input.analog[0][0] < 0) input.analog[0][0] = 0; + else if (input.analog[0][0] > 250) input.analog[0][0] = 250; + if (input.analog[0][1] < 0) input.analog[0][1] = 0; + else if (input.analog[0][1] > 250) input.analog[0][1] = 250; + + /* PEN button */ + if (p & pad_keymap[KEY_BUTTONA]) input.pad[0] |= INPUT_BUTTON1; + + break; + } + + case DEVICE_ACTIVATOR: + { + /* Left & right analog stick angle [0-360] */ + float ang; + + /* Left stick values */ + if ((abs(x) > ANALOG_SENSITIVITY) || (abs(y) > ANALOG_SENSITIVITY)) + { + /* Calculate angle (in degree) */ + ang = 90.0 - (atan((float)y / (float)x) * 180.0 / M_PI); + if (x < 0) ang += 180.0; + + /* 8 bottom sensors = 8 areas */ + if ((ang > 22.5) && (ang <= 67.5)) input.pad[i] |= INPUT_ACTIVATOR_2L; + else if ((ang > 67.5) && (ang <= 112.5)) input.pad[i] |= INPUT_ACTIVATOR_3L; + else if ((ang > 112.5) && (ang <= 157.5)) input.pad[i] |= INPUT_ACTIVATOR_4L; + else if ((ang > 157.5) && (ang <= 202.5)) input.pad[i] |= INPUT_ACTIVATOR_5L; + else if ((ang > 202.5) && (ang <= 247.5)) input.pad[i] |= INPUT_ACTIVATOR_6L; + else if ((ang > 247.5) && (ang <= 292.5)) input.pad[i] |= INPUT_ACTIVATOR_7L; + else if ((ang > 292.5) && (ang <= 337.5)) input.pad[i] |= INPUT_ACTIVATOR_8L; + else input.pad[i] |= INPUT_ACTIVATOR_1L; + } + + /* Right stick values */ + x = PAD_SubStickX(chan); + y = PAD_SubStickY(chan); + + if ((abs(x) > ANALOG_SENSITIVITY) || (abs(y) > ANALOG_SENSITIVITY)) + { + /* Calculate angle (in degree) */ + ang = 90.0 - (atan((float)y / (float)x) * 180.0 / M_PI); + if (x < 0) ang += 180.0; + + /* 8 top sensors = 8 areas */ + if ((ang > 22.5) && (ang <= 67.5)) input.pad[i] |= INPUT_ACTIVATOR_2U; + else if ((ang > 67.5) && (ang <= 112.5)) input.pad[i] |= INPUT_ACTIVATOR_3U; + else if ((ang > 112.5) && (ang <= 157.5)) input.pad[i] |= INPUT_ACTIVATOR_4U; + else if ((ang > 157.5) && (ang <= 202.5)) input.pad[i] |= INPUT_ACTIVATOR_5U; + else if ((ang > 202.5) && (ang <= 247.5)) input.pad[i] |= INPUT_ACTIVATOR_6U; + else if ((ang > 247.5) && (ang <= 292.5)) input.pad[i] |= INPUT_ACTIVATOR_7U; + else if ((ang > 292.5) && (ang <= 337.5)) input.pad[i] |= INPUT_ACTIVATOR_8U; + else input.pad[i] |= INPUT_ACTIVATOR_1U; + } + + break; + } + } +} + +/***************************************************************************************/ +/* Wii WPAD support */ +/***************************************************************************************/ +#ifdef HW_RVL + +static int wpad_StickX(WPADData *data, u8 right) +{ + struct joystick_t* js = NULL; + + switch (data->exp.type) + { + case WPAD_EXP_NUNCHUK: + js = right ? NULL : &data->exp.nunchuk.js; + break; + + case WPAD_EXP_CLASSIC: + js = right ? &data->exp.classic.rjs : &data->exp.classic.ljs; + break; + + default: + break; + } + + if (js) + { + /* raw X value */ + int x = js->pos.x; + + /* value returned is sometime above calibrated limits */ + if (x > js->max.x) return 127; + if (x < js->min.x) return -128; + + /* adjust against center position */ + x -= js->center.x; + + /* return interpolated range [-128;127] */ + if (x > 0) + { + return (int)(127.0 * ((float)x / (float)(js->max.x - js->center.x))); + } + { + return (int)(128.0 * ((float)x / (float)(js->center.x - js->min.x))); + } + } + + return 0; +} + +static int wpad_StickY(WPADData *data, u8 right) +{ + struct joystick_t* js = NULL; + + switch (data->exp.type) + { + case WPAD_EXP_NUNCHUK: + js = right ? NULL : &data->exp.nunchuk.js; + break; + + case WPAD_EXP_CLASSIC: + js = right ? &data->exp.classic.rjs : &data->exp.classic.ljs; + break; + + default: + break; + } + + if (js) + { + /* raw Y value */ + int y = js->pos.y; + + /* value returned is sometime above calibrated limits */ + if (y > js->max.y) return 127; + if (y < js->min.y) return -128; + + /* adjust against center position */ + y -= js->center.y; + + /* return interpolated range [-128;127] */ + if (y > 0) + { + return (int)(127.0 * ((float)y / (float)(js->max.y - js->center.y))); + } + { + return (int)(128.0 * ((float)y / (float)(js->center.y - js->min.y))); + } + } + + return 0; +} + +static void wpad_config(u8 exp, int chan, int first_key, int last_key) +{ + char msg[64]; + u32 p = 255; + + /* Disable background PAD scanning */ + inputs_disabled = 1; + + /* Check if device is connected */ + WPAD_Probe(chan, &p); + if (((exp > WPAD_EXP_NONE) && (p != exp)) || (p == 255)) + { + /* device not detected */ + if (exp == WPAD_EXP_NONE) sprintf(msg, "WIIMOTE #%d is not connected !", chan+1); + if (exp == WPAD_EXP_NUNCHUK) sprintf(msg, "NUNCHUK #%d is not connected !", chan+1); + if (exp == WPAD_EXP_CLASSIC) sprintf(msg, "CLASSIC #%d is not connected !", chan+1); + GUI_WaitPrompt("Error",msg); + + /* re-enable background PAD scanning and exit */ + inputs_disabled = 0; + return; + } + + /* Configure each keys */ + do + { + /* ignore unused keys */ + if (strcmp(keyname[first_key], "N.A")) + { + /* remove any pending buttons */ + while (WPAD_ButtonsHeld(chan)) + { + VIDEO_WaitVSync(); + WPAD_ScanPads(); + } + + /* configurable button */ + sprintf(msg,"Press key for %s\n(HOME to return)",keyname[first_key]); + GUI_MsgBoxUpdate(0,msg); + + /* wait for user input */ + p = 0; + while (!p) + { + VIDEO_WaitVSync(); + WPAD_ScanPads(); + p = WPAD_ButtonsDown(chan); + } + + /* detect pressed key */ + switch (exp) + { + /* Wiimote (TODO: add motion sensing !) */ + case WPAD_EXP_NONE: + { + if (p & WPAD_BUTTON_2) p = WPAD_BUTTON_2; + else if (p & WPAD_BUTTON_1) p = WPAD_BUTTON_1; + else if (p & WPAD_BUTTON_B) p = WPAD_BUTTON_B; + else if (p & WPAD_BUTTON_A) p = WPAD_BUTTON_A; + else if (p & WPAD_BUTTON_PLUS) p = WPAD_BUTTON_PLUS; + else if (p & WPAD_BUTTON_MINUS) p = WPAD_BUTTON_MINUS; + else first_key = MAX_KEYS; + break; + } + + /* Wiimote + Nunchuk (TODO: add motion sensing !) */ + case WPAD_EXP_NUNCHUK: + { + if (p & WPAD_BUTTON_2) p = WPAD_BUTTON_2; + else if (p & WPAD_BUTTON_1) p = WPAD_BUTTON_1; + else if (p & WPAD_BUTTON_B) p = WPAD_BUTTON_B; + else if (p & WPAD_BUTTON_A) p = WPAD_BUTTON_A; + else if (p & WPAD_BUTTON_PLUS) p = WPAD_BUTTON_PLUS; + else if (p & WPAD_BUTTON_MINUS) p= WPAD_BUTTON_MINUS; + else if (p & WPAD_NUNCHUK_BUTTON_Z) p = WPAD_NUNCHUK_BUTTON_Z; + else if (p & WPAD_NUNCHUK_BUTTON_C) p = WPAD_NUNCHUK_BUTTON_C; + else first_key = MAX_KEYS; + break; + } + + /* Classic Controller */ + case WPAD_EXP_CLASSIC: + { + if (p & WPAD_CLASSIC_BUTTON_X) p = WPAD_CLASSIC_BUTTON_X; + else if (p & WPAD_CLASSIC_BUTTON_A) p = WPAD_CLASSIC_BUTTON_A; + else if (p & WPAD_CLASSIC_BUTTON_Y) p = WPAD_CLASSIC_BUTTON_Y; + else if (p & WPAD_CLASSIC_BUTTON_B) p = WPAD_CLASSIC_BUTTON_B; + else if (p & WPAD_CLASSIC_BUTTON_ZL) p = WPAD_CLASSIC_BUTTON_ZL; + else if (p & WPAD_CLASSIC_BUTTON_ZR) p = WPAD_CLASSIC_BUTTON_ZR; + else if (p & WPAD_CLASSIC_BUTTON_PLUS) p = WPAD_CLASSIC_BUTTON_PLUS; + else if (p & WPAD_CLASSIC_BUTTON_MINUS) p = WPAD_CLASSIC_BUTTON_MINUS; + else if (p & WPAD_CLASSIC_BUTTON_FULL_L) p = WPAD_CLASSIC_BUTTON_FULL_L; + else if (p & WPAD_CLASSIC_BUTTON_FULL_R) p = WPAD_CLASSIC_BUTTON_FULL_R; + else first_key = MAX_KEYS; + break; + } + + default: + { + first_key = MAX_KEYS; + break; + } + } + + /* update key mapping */ + if (first_key < MAX_KEYS) + { + config.wpad_keymap[exp + (chan * 3)][first_key] = p; + } + } + } + while (first_key++ < last_key); + + /* remove any pending buttons */ + while (WPAD_ButtonsHeld(chan)) + { + VIDEO_WaitVSync(); + WPAD_ScanPads(); + } + + /* re-enable background PAD scanning and exit */ + inputs_disabled = 0; +} + +static void wpad_update(s8 chan, u8 i, u32 exp) +{ + /* WPAD data */ + WPADData *data = WPAD_Data(chan); + + /* WPAD status */ + u32 p = data->btns_h; + + /* Analog sticks */ + s8 x = 0; + s8 y = 0; + + if (exp != WPAD_EXP_NONE) + { + x = wpad_StickX(data,0); + y = wpad_StickY(data,0); + } + + /* Retrieve current key mapping */ + u32 *wpad_keymap = config.wpad_keymap[exp + (chan * 3)]; + + /* Emulated device */ + switch (input.dev[i]) + { + case DEVICE_PAD6B: + { + /* Extra buttons */ + if (p & wpad_keymap[KEY_BUTTONX]) input.pad[i] |= INPUT_X; + if (p & wpad_keymap[KEY_BUTTONY]) input.pad[i] |= INPUT_Y; + if (p & wpad_keymap[KEY_BUTTONZ]) input.pad[i] |= INPUT_Z; + if (p & wpad_keymap[KEY_MODE]) input.pad[i] |= INPUT_MODE; + } + + case DEVICE_PAD3B: + { + /* D- PAD */ + if ((p & wpad_dirmap[exp][PAD_UP]) || (y > ANALOG_SENSITIVITY)) input.pad[i] |= INPUT_UP; + else if ((p & wpad_dirmap[exp][PAD_DOWN]) || (y < -ANALOG_SENSITIVITY)) input.pad[i] |= INPUT_DOWN; + if ((p & wpad_dirmap[exp][PAD_LEFT]) || (x < -ANALOG_SENSITIVITY)) input.pad[i] |= INPUT_LEFT; + else if ((p & wpad_dirmap[exp][PAD_RIGHT]) || (x > ANALOG_SENSITIVITY)) input.pad[i] |= INPUT_RIGHT; + + /* Buttons */ + if (p & wpad_keymap[KEY_BUTTONA]) input.pad[i] |= INPUT_A; + if (p & wpad_keymap[KEY_BUTTONB]) input.pad[i] |= INPUT_B; + if (p & wpad_keymap[KEY_BUTTONC]) input.pad[i] |= INPUT_C; + if (p & wpad_keymap[KEY_START]) input.pad[i] |= INPUT_START; + + break; + } + + case DEVICE_XE_A1P: + { + /* Left Stick analog position [0-255] */ + input.analog[i][0] = (x + 128); + input.analog[i][1] = y ? (127 - y) : (128 - y); + + /* Right Stick analog position [0-255] */ + if (exp == WPAD_EXP_CLASSIC) + { + /* Classic Controller right stick */ + x = wpad_StickX(data,1); + y = wpad_StickY(data,1); + + /* Emulated stick is unidirectional but can be rotated */ + if (abs(x) > abs(y)) + { + input.analog[i+1][0] = (x + 128); + } + else + { + input.analog[i+1][0] = (y + 128); + } + } + else + { + /* Wiimote D-PAD */ + if ((p & wpad_dirmap[exp][PAD_DOWN]) || (p & wpad_dirmap[exp][PAD_LEFT])) input.analog[i+1][0]-=2; + else if ((p & wpad_dirmap[exp][PAD_UP]) || (p & wpad_dirmap[exp][PAD_RIGHT])) input.analog[i+1][0]+=2; + + /* Limits */ + if (input.analog[i+1][0] < 0) input.analog[i+1][0] = 0; + else if (input.analog[i+1][0] > 255) input.analog[i+1][0] = 255; + } + + /* Buttons */ + if (p & wpad_keymap[KEY_BUTTONA]) input.pad[i] |= INPUT_XE_A; + if (p & wpad_keymap[KEY_BUTTONB]) input.pad[i] |= INPUT_XE_B; + if (p & wpad_keymap[KEY_BUTTONC]) input.pad[i] |= INPUT_XE_C; + if (p & wpad_keymap[KEY_START]) input.pad[i] |= INPUT_XE_START; + if (p & wpad_keymap[KEY_BUTTONX]) input.pad[i] |= INPUT_XE_D; + if (p & wpad_keymap[KEY_BUTTONY]) input.pad[i] |= INPUT_XE_E1; + if (p & wpad_keymap[KEY_BUTTONZ]) input.pad[i] |= INPUT_XE_E2; + if (p & wpad_keymap[KEY_MODE]) input.pad[i] |= INPUT_XE_SELECT; + + break; + } + + case DEVICE_SPORTSPAD: + { + /* X analog position [0-255] */ + if (p & wpad_dirmap[exp][PAD_LEFT]) input.analog[i][0]-=2; + else if (p & wpad_dirmap[exp][PAD_RIGHT]) input.analog[i][0]+=2; + else input.analog[i][0] = (x + 128); + + /* Y analog position [0-255] */ + if (p & wpad_dirmap[exp][PAD_UP]) input.analog[i][1]-=2; + else if (p & wpad_dirmap[exp][PAD_DOWN]) input.analog[i][1]+=2; + else input.analog[i][1] = y ? (127 - y) : (128 - y); + + /* Limits */ + if (input.analog[i][0] < 0) input.analog[i][0] = 0; + else if (input.analog[i][0] > 255) input.analog[i][0] = 255; + if (input.analog[i][1] < 0) input.analog[i][1] = 0; + else if (input.analog[i][1] > 255) input.analog[i][1] = 255; + + /* Buttons */ + if (p & wpad_keymap[KEY_BUTTONB]) input.pad[i] |= INPUT_BUTTON1; + if (p & wpad_keymap[KEY_BUTTONC]) input.pad[i] |= INPUT_BUTTON2; + if (p & wpad_keymap[KEY_START]) input.pad[i] |= INPUT_START; + + break; + } + + case DEVICE_PADDLE: + { + /* X analog position [0-255] */ + if (exp == WPAD_EXP_NONE) + { + /* Wiimote D-PAD */ + if (p & wpad_dirmap[exp][PAD_LEFT]) input.analog[i][0]-=2; + else if (p & wpad_dirmap[exp][PAD_RIGHT]) input.analog[i][0]+=2; + + /* Limits */ + if (input.analog[i][0] < 0) input.analog[i][0] = 0; + else if (input.analog[i][0] > 255) input.analog[i][0] = 255; + } + else + { + /* Left analog stick */ + input.analog[i][0] = (x + 128); + } + + /* Buttons */ + if (p & wpad_keymap[KEY_BUTTONB]) input.pad[i] |= INPUT_BUTTON1; + if (p & wpad_keymap[KEY_START]) input.pad[i] |= INPUT_START; + + break; + } + + case DEVICE_PAD2B: + { + /* D-PAD */ + if ((p & wpad_dirmap[exp][PAD_UP]) || (y > ANALOG_SENSITIVITY)) input.pad[i] |= INPUT_UP; + else if ((p & wpad_dirmap[exp][PAD_DOWN]) || (y < -ANALOG_SENSITIVITY)) input.pad[i] |= INPUT_DOWN; + if ((p & wpad_dirmap[exp][PAD_LEFT]) || (x < -ANALOG_SENSITIVITY)) input.pad[i] |= INPUT_LEFT; + else if ((p & wpad_dirmap[exp][PAD_RIGHT]) || (x > ANALOG_SENSITIVITY)) input.pad[i] |= INPUT_RIGHT; + + /* Buttons */ + if (p & wpad_keymap[KEY_BUTTONB]) input.pad[i] |= INPUT_BUTTON1; + if (p & wpad_keymap[KEY_BUTTONC]) input.pad[i] |= INPUT_BUTTON2; + if (p & wpad_keymap[KEY_START]) input.pad[i] |= INPUT_START; + + break; + } + + case DEVICE_LIGHTGUN: + { + /* Gun screen position (x,y) */ + if (exp != WPAD_EXP_CLASSIC) + { + /* Wiimote IR */ + struct ir_t ir; + WPAD_IR(chan, &ir); + + if (ir.valid) + { + /* screen position */ + input.analog[i][0] = (ir.x * bitmap.viewport.w) / 640; + input.analog[i][1] = (ir.y * bitmap.viewport.h) / 480; + } + else + { + /* lightgun should point outside screen area */ + input.analog[i][0] = 512; + input.analog[i][1] = 512; + } + } + else + { + /* Classic Controller analog stick */ + input.analog[i][0] += x / ANALOG_SENSITIVITY; + input.analog[i][1] -= y / ANALOG_SENSITIVITY; + + /* Limits */ + if (input.analog[i][0] < 0) input.analog[i][0] = 0; + else if (input.analog[i][0] > bitmap.viewport.w) input.analog[i][0] = bitmap.viewport.w; + if (input.analog[i][1] < 0) input.analog[i][1] = 0; + else if (input.analog[i][1] > bitmap.viewport.h) input.analog[i][1] = bitmap.viewport.h; + } + + /* Buttons */ + if (p & wpad_keymap[KEY_BUTTONA]) input.pad[i] |= INPUT_A; + if (p & wpad_keymap[KEY_BUTTONB]) input.pad[i] |= INPUT_B; + if (p & wpad_keymap[KEY_BUTTONC]) input.pad[i] |= INPUT_C; + if (p & wpad_keymap[KEY_START]) input.pad[i] |= INPUT_START; + + break; + } + + case DEVICE_MOUSE: + { + /* Mouse relative movement (-255,255) */ + input.analog[i][0] = (x / ANALOG_SENSITIVITY) * 2; + input.analog[i][1] = (y / ANALOG_SENSITIVITY) * 2; + + /* Wiimote IR (buggy) */ + if (exp != WPAD_EXP_CLASSIC) + { + struct ir_t ir; + WPAD_IR(chan, &ir); + + /* Only if Wiimote is pointed to screen */ + if(ir.smooth_valid) + { + input.analog[i][0] = (int)((ir.sx - 512) / 2 / ANALOG_SENSITIVITY); + input.analog[i][1] = (int)((ir.sy - 384) * 2 / 3 / ANALOG_SENSITIVITY); + } + } + + /* USB mouse support */ + if (MOUSE_IsConnected()) + { + /* read mouse data */ + mouse_event event; + MOUSE_GetEvent(&event); + MOUSE_FlushEvents(); + + /* mouse position (-127;+127) -> (-255;+255) */ + input.analog[i][0] = event.rx * 2; + input.analog[i][1] = event.ry * 2; + + /* mouse buttons */ + if (event.button & 1) input.pad[i] |= INPUT_MOUSE_RIGHT; + if (event.button & 2) input.pad[i] |= INPUT_MOUSE_CENTER; + if (event.button & 4) input.pad[i] |= INPUT_MOUSE_LEFT; + } + + /* Y-Axis inversion */ + if (config.invert_mouse) + { + input.analog[i][1] = -input.analog[i][1]; + } + + /* Buttons */ + if (p & wpad_keymap[KEY_BUTTONA]) input.pad[i] |= INPUT_MOUSE_CENTER; + if (p & wpad_keymap[KEY_BUTTONB]) input.pad[i] |= INPUT_MOUSE_LEFT; + if (p & wpad_keymap[KEY_BUTTONC]) input.pad[i] |= INPUT_MOUSE_RIGHT; + if (p & wpad_keymap[KEY_START]) input.pad[i] |= INPUT_START; + + break; + } + + case DEVICE_PICO: + { + /* D-PAD */ + if (p & PAD_BUTTON_UP) input.pad[i] |= INPUT_UP; + else if (p & PAD_BUTTON_DOWN) input.pad[i] |= INPUT_DOWN; + if (p & PAD_BUTTON_LEFT) input.pad[i] |= INPUT_LEFT; + else if (p & PAD_BUTTON_RIGHT) input.pad[i] |= INPUT_RIGHT; + + /* PEN screen position (x,y) */ + input.analog[0][0] += x / ANALOG_SENSITIVITY; + input.analog[0][1] -= y / ANALOG_SENSITIVITY; + + /* Limits */ + if (input.analog[0][0] < 0x17c) input.analog[0][0] = 0x17c; + else if (input.analog[0][0] > 0x3c) input.analog[0][0] = 0x3c; + if (input.analog[0][1] < 0x1fc) input.analog[0][1] = 0x1fc; + else if (input.analog[0][1] > 0x3f3) input.analog[0][1] = 0x3f3; + + /* Wiimote IR */ + if (exp != WPAD_EXP_CLASSIC) + { + struct ir_t ir; + WPAD_IR(chan, &ir); + if (ir.valid) + { + input.analog[0][0] = 0x3c + (ir.x * (0x17c - 0x3c + 1)) / 640; + input.analog[0][1] = 0x1fc + (ir.y * (0x3f3 - 0x1fc + 1)) / 480; + } + } + + /* PEN button */ + if (p & wpad_keymap[KEY_BUTTONA]) input.pad[0] |= INPUT_PICO_PEN; + + /* RED button */ + if (p & wpad_keymap[KEY_BUTTONB]) input.pad[0] |= INPUT_PICO_RED; + + /* PAGE index increment */ + if (p & wpad_keymap[KEY_BUTTONC]) pico_current = (pico_current + 1) & 7; + + break; + } + + case DEVICE_TEREBI: + { + /* PEN screen position (x,y) */ + input.analog[0][0] += x / ANALOG_SENSITIVITY; + input.analog[0][1] -= y / ANALOG_SENSITIVITY; + + /* Limits */ + if (input.analog[0][0] < 0) input.analog[0][0] = 0; + else if (input.analog[0][0] > 250) input.analog[0][0] = 250; + if (input.analog[0][1] < 0) input.analog[0][1] = 0; + else if (input.analog[0][1] > 250) input.analog[0][1] = 250; + + /* Wiimote IR */ + if (exp != WPAD_EXP_CLASSIC) + { + struct ir_t ir; + WPAD_IR(chan, &ir); + if (ir.valid) + { + input.analog[0][0] = (ir.x * 250) / 640; + input.analog[0][1] = (ir.y * 250) / 480; + } + } + + /* PEN button */ + if (p & wpad_keymap[KEY_BUTTONA]) input.pad[0] |= INPUT_BUTTON1; + + break; + } + + case DEVICE_ACTIVATOR: + { + /* Classic Controller only */ + if (exp == WPAD_EXP_CLASSIC) + { + /* Left stick */ + float mag = data->exp.classic.ljs.mag; + float ang = data->exp.classic.ljs.ang; + + if (mag > 0.5) + { + /* 8 bottom sensors = 8 areas */ + if ((ang > 22.5) && (ang <= 67.5)) input.pad[i] |= INPUT_ACTIVATOR_2L; + else if ((ang > 67.5) && (ang <= 112.5)) input.pad[i] |= INPUT_ACTIVATOR_3L; + else if ((ang > 112.5) && (ang <= 157.5)) input.pad[i] |= INPUT_ACTIVATOR_4L; + else if ((ang > 157.5) && (ang <= 202.5)) input.pad[i] |= INPUT_ACTIVATOR_5L; + else if ((ang > 202.5) && (ang <= 247.5)) input.pad[i] |= INPUT_ACTIVATOR_6L; + else if ((ang > 247.5) && (ang <= 292.5)) input.pad[i] |= INPUT_ACTIVATOR_7L; + else if ((ang > 292.5) && (ang <= 337.5)) input.pad[i] |= INPUT_ACTIVATOR_8L; + else input.pad[i] |= INPUT_ACTIVATOR_1L; + } + + /* Right stick */ + mag = data->exp.classic.rjs.mag; + ang = data->exp.classic.rjs.ang; + + if (mag > 0.5) + { + /* 8 top sensors = 8 areas */ + if ((ang > 22.5) && (ang <= 67.5)) input.pad[i] |= INPUT_ACTIVATOR_2U; + else if ((ang > 67.5) && (ang <= 112.5)) input.pad[i] |= INPUT_ACTIVATOR_3U; + else if ((ang > 112.5) && (ang <= 157.5)) input.pad[i] |= INPUT_ACTIVATOR_4U; + else if ((ang > 157.5) && (ang <= 202.5)) input.pad[i] |= INPUT_ACTIVATOR_5U; + else if ((ang > 202.5) && (ang <= 247.5)) input.pad[i] |= INPUT_ACTIVATOR_6U; + else if ((ang > 247.5) && (ang <= 292.5)) input.pad[i] |= INPUT_ACTIVATOR_7U; + else if ((ang > 292.5) && (ang <= 337.5)) input.pad[i] |= INPUT_ACTIVATOR_8U; + else input.pad[i] |= INPUT_ACTIVATOR_1U; + } + } + + break; + } + } +} +#endif + + +/***************************************************************************************/ +/* GX Input interface */ +/***************************************************************************************/ +void gx_input_Init(void) +{ + PAD_Init(); +#ifdef HW_RVL + WPAD_Init(); + WPAD_SetIdleTimeout(60); + WPAD_SetDataFormat(WPAD_CHAN_ALL,WPAD_FMT_BTNS_ACC_IR); + WPAD_SetVRes(WPAD_CHAN_ALL,640,480); +#endif +} + +int gx_input_FindDevices(void) +{ + int i; +#ifdef HW_RVL + u32 wpad; +#endif + int found = 0; + int player = 0; + + VIDEO_WaitVSync(); + u32 pad = PAD_ScanPads(); + + for (i=0; i 0) + { + wpad_update(config.input[player].port, i, config.input[player].device - 1); + } +#endif + + /* increment player index */ + player ++; + } + } + + /* Update RAM patches */ + RAMCheatUpdate(); +} + +/* Menu inputs update function */ +void gx_input_UpdateMenu(void) +{ + /* Check if inputs update are disabled */ + if (inputs_disabled) return; + + /* PAD status update */ + PAD_ScanPads(); + + /* PAD pressed keys */ + s16 pp = PAD_ButtonsDown(0); + + /* PAD held keys (direction/selection) */ + s16 hp = PAD_ButtonsHeld(0) & PAD_BUTTONS_HELD; + + /* PAD analog sticks (handled as PAD held direction keys) */ + s8 x = PAD_StickX(0); + s8 y = PAD_StickY(0); + if (x > ANALOG_SENSITIVITY) hp |= PAD_BUTTON_RIGHT; + else if (x < -ANALOG_SENSITIVITY) hp |= PAD_BUTTON_LEFT; + else if (y > ANALOG_SENSITIVITY) hp |= PAD_BUTTON_UP; + else if (y < -ANALOG_SENSITIVITY) hp |= PAD_BUTTON_DOWN; + +#ifdef HW_RVL + /* WPAD status update */ + WPAD_ScanPads(); + WPADData *data = WPAD_Data(0); + + /* WPAD pressed keys */ + u32 pw = data->btns_d; + + /* WPAD held keys (direction/selection) */ + u32 hw = data->btns_h & WPAD_BUTTONS_HELD; + + /* WPAD analog sticks (handled as PAD held direction keys) */ + x = wpad_StickX(data, 0); + y = wpad_StickY(data, 0); + if (x > ANALOG_SENSITIVITY) hp |= PAD_BUTTON_RIGHT; + else if (x < -ANALOG_SENSITIVITY) hp |= PAD_BUTTON_LEFT; + else if (y > ANALOG_SENSITIVITY) hp |= PAD_BUTTON_UP; + else if (y < -ANALOG_SENSITIVITY) hp |= PAD_BUTTON_DOWN; +#endif + + /* check if any direction/selection key is being held or just being pressed/released */ +#ifdef HW_RVL + if (pp||pw) held_cnt = 0; + else if (hp||hw) held_cnt++; + else held_cnt = 0; +#else + if (pp) held_cnt = 0; + else if (hp) held_cnt++; + else held_cnt = 0; +#endif + + /* initial delay (prevents triggering to start immediately) */ + if (held_cnt > HELD_DELAY) + { + /* key triggering */ + pp |= hp; +#ifdef HW_RVL + pw |= hw; +#endif + + /* delay until next triggering (adjusts direction/selection update speed) */ + held_cnt -= HELD_SPEED; + } + +#ifdef HW_RVL + /* Wiimote direction keys */ + WPAD_IR(0, &m_input.ir); + if (m_input.ir.valid) + { + /* Wiimote is handled vertically */ + if (pw & WPAD_BUTTON_UP) pp |= PAD_BUTTON_UP; + else if (pw & WPAD_BUTTON_DOWN) pp |= PAD_BUTTON_DOWN; + else if (pw & WPAD_BUTTON_LEFT) pp |= PAD_BUTTON_LEFT; + else if (pw & WPAD_BUTTON_RIGHT) pp |= PAD_BUTTON_RIGHT; + } + else + { + /* Wiimote is handled horizontally */ + if (pw & WPAD_BUTTON_UP) pp |= PAD_BUTTON_LEFT; + else if (pw & WPAD_BUTTON_DOWN) pp |= PAD_BUTTON_RIGHT; + else if (pw & WPAD_BUTTON_LEFT) pp |= PAD_BUTTON_DOWN; + else if (pw & WPAD_BUTTON_RIGHT) pp |= PAD_BUTTON_UP; + } + + /* Classic Controller direction keys */ + if (pw & WPAD_CLASSIC_BUTTON_UP) pp |= PAD_BUTTON_UP; + else if (pw & WPAD_CLASSIC_BUTTON_DOWN) pp |= PAD_BUTTON_DOWN; + else if (pw & WPAD_CLASSIC_BUTTON_LEFT) pp |= PAD_BUTTON_LEFT; + else if (pw & WPAD_CLASSIC_BUTTON_RIGHT) pp |= PAD_BUTTON_RIGHT; + + /* WPAD buttons */ + if (pw & WPAD_BUTTON_A) pp |= PAD_BUTTON_A; + if (pw & WPAD_BUTTON_B) pp |= PAD_BUTTON_B; + if (pw & WPAD_BUTTON_2) pp |= PAD_BUTTON_A; + if (pw & WPAD_BUTTON_1) pp |= PAD_BUTTON_B; + if (pw & WPAD_BUTTON_HOME) pp |= PAD_TRIGGER_Z; + if (pw & WPAD_BUTTON_PLUS) pp |= PAD_TRIGGER_L; + if (pw & WPAD_BUTTON_MINUS) pp |= PAD_TRIGGER_R; + if (pw & WPAD_CLASSIC_BUTTON_FULL_L) pp |= PAD_TRIGGER_L; + if (pw & WPAD_CLASSIC_BUTTON_FULL_R) pp |= PAD_TRIGGER_R; + if (pw & WPAD_CLASSIC_BUTTON_A) pp |= PAD_BUTTON_A; + if (pw & WPAD_CLASSIC_BUTTON_B) pp |= PAD_BUTTON_B; + if (pw & WPAD_CLASSIC_BUTTON_HOME) pp |= PAD_TRIGGER_Z; +#endif + + /* Update menu inputs */ + m_input.keys = pp; +} diff --git a/genplus-gx/gx/gx_input.h b/genplus-gx/gx/gx_input.h new file mode 100644 index 0000000000..77143b465e --- /dev/null +++ b/genplus-gx/gx/gx_input.h @@ -0,0 +1,72 @@ +/**************************************************************************** + * gx_input.c + * + * Genesis Plus GX input support + * + * Copyright Eke-Eke (2007-2013) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _GC_INPUT_H_ +#define _GC_INPUT_H_ + +#define osd_input_update() gx_input_UpdateEmu() + +/* max. supported inputs */ +#ifdef HW_RVL +#define MAX_INPUTS 8 +#else +#define MAX_INPUTS 4 +#endif + +/* Configurable keys */ +#define MAX_KEYS 8 + + +/* Key configuration structure */ +typedef struct +{ + s8 device; + u8 port; + u8 padtype; +} t_input_config; + + +extern void gx_input_Init(void); +extern int gx_input_FindDevices(void); +extern void gx_input_SetDefault(void); +extern void gx_input_Config(u8 chan, u8 device, u8 type); +extern void gx_input_UpdateEmu(void); +extern void gx_input_UpdateMenu(void); + +#endif diff --git a/genplus-gx/gx/gx_video.c b/genplus-gx/gx/gx_video.c new file mode 100644 index 0000000000..5521b238df --- /dev/null +++ b/genplus-gx/gx/gx_video.c @@ -0,0 +1,2041 @@ +/**************************************************************************** + * gx_video.c + * + * Genesis Plus GX video & rendering support + * + * Copyright Eke-Eke (2007-2013), based on original work from Softdev (2006) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#include "shared.h" +#include "font.h" +#include "md_ntsc.h" +#include "sms_ntsc.h" +#include "gx_input.h" + +#include +#include + +#define TEX_WIDTH 720 +#define TEX_HEIGHT 576 +#define TEX_SIZE (TEX_WIDTH * TEX_HEIGHT * 2) +#define DEFAULT_FIFO_SIZE 256 * 1024 +#define HASPECT 320 +#define VASPECT 240 + +/* libpng wrapper */ +typedef struct +{ + u8 *buffer; + u32 offset; +} png_image; + +extern const u8 Crosshair_p1_png[]; +extern const u8 Crosshair_p2_png[]; +extern const u8 CD_access_off_png[]; +extern const u8 CD_access_on_png[]; +extern const u8 CD_ready_off_png[]; +extern const u8 CD_ready_on_png[]; + +/*** VI ***/ +GXRModeObj *vmode; /* Default Video Mode */ +u8 *texturemem; /* Texture Data */ +u8 *screenshot; /* Texture Data */ + +/*** 50/60hz flag ***/ +u32 gc_pal; + +/*** NTSC Filters ***/ +sms_ntsc_t *sms_ntsc; +md_ntsc_t *md_ntsc; + +/*** GX FIFO ***/ +static u8 gp_fifo[DEFAULT_FIFO_SIZE] ATTRIBUTE_ALIGN (32); + +/*** GX Textures ***/ +static u32 vwidth, vheight; +static gx_texture *crosshair[2]; +static gx_texture *cd_leds[2][2]; + +/*** Framebuffers ***/ +static u32 *xfb[2]; +static u32 whichfb = 0; + +/*** Frame Sync ***/ +u32 videoSync; +static u32 videoWait; +static u32 frameCount; +static u64 starttime; + +/*** OSD ***/ +static u32 osd; +static char msg[16]; + +/***************************************************************************************/ +/* Emulation video modes */ +/***************************************************************************************/ +static GXRModeObj *rmode; + +/* 288 lines progressive (PAL 50Hz) */ +static GXRModeObj TV50hz_288p = +{ + VI_TVMODE_PAL_DS, // viDisplayMode + 640, // fbWidth + VI_MAX_HEIGHT_PAL/2, // efbHeight + VI_MAX_HEIGHT_PAL/2, // xfbHeight + 0, // viXOrigin + 0, // viYOrigin + VI_MAX_WIDTH_PAL, // viWidth + VI_MAX_HEIGHT_PAL, // viHeight + VI_XFBMODE_SF, // xFBmode + GX_FALSE, // field_rendering + GX_FALSE, // aa + + // sample points arranged in increasing Y order + { + {6,6},{6,6},{6,6}, // pix 0, 3 sample points, 1/12 units, 4 bits each + {6,6},{6,6},{6,6}, // pix 1 + {6,6},{6,6},{6,6}, // pix 2 + {6,6},{6,6},{6,6} // pix 3 + }, + + // vertical filter[7], 1/64 units, 6 bits each + { + 0, // line n-1 + 0, // line n-1 + 21, // line n + 22, // line n + 21, // line n + 0, // line n+1 + 0 // line n+1 + } +}; + +/* 288 lines interlaced (PAL 50Hz) */ +static GXRModeObj TV50hz_288i = +{ + VI_TVMODE_PAL_INT, // viDisplayMode + 640, // fbWidth + VI_MAX_HEIGHT_PAL/2, // efbHeight + VI_MAX_HEIGHT_PAL/2, // xfbHeight + 0, // viXOrigin + 0, // viYOrigin + VI_MAX_WIDTH_PAL, // viWidth + VI_MAX_HEIGHT_PAL, // viHeight + VI_XFBMODE_SF, // xFBmode + GX_TRUE, // field_rendering + GX_FALSE, // aa + + // sample points arranged in increasing Y order + { + {6,6},{6,6},{6,6}, // pix 0, 3 sample points, 1/12 units, 4 bits each + {6,6},{6,6},{6,6}, // pix 1 + {6,6},{6,6},{6,6}, // pix 2 + {6,6},{6,6},{6,6} // pix 3 + }, + + // vertical filter[7], 1/64 units, 6 bits each + { + 0, // line n-1 + 0, // line n-1 + 21, // line n + 22, // line n + 21, // line n + 0, // line n+1 + 0 // line n+1 + } +}; + +/* 576 lines interlaced (PAL 50Hz, scaled) */ +static GXRModeObj TV50hz_576i = +{ + VI_TVMODE_PAL_INT, // viDisplayMode + 640, // fbWidth + 480, // efbHeight + VI_MAX_HEIGHT_PAL, // xfbHeight + 0, // viXOrigin + 0, // viYOrigin + VI_MAX_WIDTH_PAL, // viWidth + VI_MAX_HEIGHT_PAL, // viHeight + VI_XFBMODE_DF, // xFBmode + GX_FALSE, // field_rendering + GX_FALSE, // aa + + // sample points arranged in increasing Y order + { + {6,6},{6,6},{6,6}, // pix 0, 3 sample points, 1/12 units, 4 bits each + {6,6},{6,6},{6,6}, // pix 1 + {6,6},{6,6},{6,6}, // pix 2 + {6,6},{6,6},{6,6} // pix 3 + }, + + // vertical filter[7], 1/64 units, 6 bits each + { + 8, // line n-1 + 8, // line n-1 + 10, // line n + 12, // line n + 10, // line n + 8, // line n+1 + 8 // line n+1 + } +}; + +/* 240 lines progressive (NTSC or PAL 60Hz) */ +static GXRModeObj TV60hz_240p = +{ + VI_TVMODE_EURGB60_DS, // viDisplayMode + 640, // fbWidth + VI_MAX_HEIGHT_NTSC/2, // efbHeight + VI_MAX_HEIGHT_NTSC/2, // xfbHeight + 0, // viXOrigin + 0, // viYOrigin + VI_MAX_WIDTH_NTSC, // viWidth + VI_MAX_HEIGHT_NTSC, // viHeight + VI_XFBMODE_SF, // xFBmode + GX_FALSE, // field_rendering + GX_FALSE, // aa + + // sample points arranged in increasing Y order + { + {6,6},{6,6},{6,6}, // pix 0, 3 sample points, 1/12 units, 4 bits each + {6,6},{6,6},{6,6}, // pix 1 + {6,6},{6,6},{6,6}, // pix 2 + {6,6},{6,6},{6,6} // pix 3 + }, + + // vertical filter[7], 1/64 units, 6 bits each + { + 0, // line n-1 + 0, // line n-1 + 21, // line n + 22, // line n + 21, // line n + 0, // line n+1 + 0 // line n+1 + } +}; + +/* 240 lines interlaced (NTSC or PAL 60Hz) */ +static GXRModeObj TV60hz_240i = +{ + VI_TVMODE_EURGB60_INT, // viDisplayMode + 640, // fbWidth + VI_MAX_HEIGHT_NTSC/2, // efbHeight + VI_MAX_HEIGHT_NTSC/2, // xfbHeight + 0, // viXOrigin + 0, // viYOrigin + VI_MAX_WIDTH_NTSC, // viWidth + VI_MAX_HEIGHT_NTSC, // viHeight + VI_XFBMODE_SF, // xFBmode + GX_TRUE, // field_rendering + GX_FALSE, // aa + + // sample points arranged in increasing Y order + { + {3,2},{9,6},{3,10}, // pix 0, 3 sample points, 1/12 units, 4 bits each + {3,2},{9,6},{3,10}, // pix 1 + {9,2},{3,6},{9,10}, // pix 2 + {9,2},{3,6},{9,10} // pix 3 + }, + + // vertical filter[7], 1/64 units, 6 bits each + { + 0, // line n-1 + 0, // line n-1 + 21, // line n + 22, // line n + 21, // line n + 0, // line n+1 + 0 // line n+1 + } +}; + +/* 480 lines interlaced (NTSC or PAL 60Hz) */ +static GXRModeObj TV60hz_480i = +{ + VI_TVMODE_EURGB60_INT,// viDisplayMode + 640, // fbWidth + VI_MAX_HEIGHT_NTSC, // efbHeight + VI_MAX_HEIGHT_NTSC, // xfbHeight + 0, // viXOrigin + 0, // viYOrigin + VI_MAX_WIDTH_NTSC, // viWidth + VI_MAX_HEIGHT_NTSC, // viHeight + VI_XFBMODE_DF, // xFBmode + GX_FALSE, // field_rendering + GX_FALSE, // aa + + // sample points arranged in increasing Y order + { + {6,6},{6,6},{6,6}, // pix 0, 3 sample points, 1/12 units, 4 bits each + {6,6},{6,6},{6,6}, // pix 1 + {6,6},{6,6},{6,6}, // pix 2 + {6,6},{6,6},{6,6} // pix 3 + }, + + // vertical filter[7], 1/64 units, 6 bits each + { + 8, // line n-1 + 8, // line n-1 + 10, // line n + 12, // line n + 10, // line n + 8, // line n+1 + 8 // line n+1 + } +}; + +/* TV modes pointer table */ +static GXRModeObj *tvmodes[6] = +{ + /* 60hz modes */ + &TV60hz_240p, + &TV60hz_240i, + &TV60hz_480i, + + /* 50Hz modes */ + &TV50hz_288p, + &TV50hz_288i, + &TV50hz_576i +}; + +/***************************************************************************************/ +/* GX rendering engine */ +/***************************************************************************************/ + +typedef struct tagcamera +{ + guVector pos; + guVector up; + guVector view; +} camera; + +/*** Square Matrix + This structure controls the size of the image on the screen. + Think of the output as a -80 x 80 by -60 x 60 graph. +***/ +static s16 square[] ATTRIBUTE_ALIGN (32) = +{ + /* + * X, Y, Z + * Values set are for roughly 4:3 aspect + */ + -HASPECT, VASPECT, 0, // 0 + HASPECT, VASPECT, 0, // 1 + HASPECT, -VASPECT, 0, // 2 + -HASPECT, -VASPECT, 0, // 3 +}; + +static camera cam = { + {0.0F, 0.0F, -100.0F}, + {0.0F, -1.0F, 0.0F}, + {0.0F, 0.0F, 0.0F} +}; + +/*** GX Display List ***/ +static u8 d_list[32] ATTRIBUTE_ALIGN(32) = +{ + GX_QUADS | GX_VTXFMT0, /* textured quad rendering (Vertex Format 0) */ + 0x00, 0x04, /* one quad = 4x vertex */ + 0x03, 0x00, 0x00, 0x00, 0x00, /* top left corner */ + 0x02, 0x00, 0x01, 0x00, 0x00, /* top right corner */ + 0x01, 0x00, 0x01, 0x00, 0x01, /* bottom right corner */ + 0x00, 0x00, 0x00, 0x00, 0x01, /* bottom left corner */ + 0x00, 0x00, 0x00, 0x00, 0x00, /* padding */ + 0x00, 0x00, 0x00, 0x00 +}; + +/* VSYNC callback */ +static void vi_callback(u32 cnt) +{ + videoWait = 0; +} + +/* Initialize GX */ +static void gxStart(void) +{ + /*** Clear out FIFO area ***/ + memset(&gp_fifo, 0, DEFAULT_FIFO_SIZE); + + /*** GX default ***/ + GX_Init(&gp_fifo, DEFAULT_FIFO_SIZE); + GX_SetPixelFmt(GX_PF_RGB8_Z24, GX_ZC_LINEAR); + GX_SetCullMode(GX_CULL_NONE); + GX_SetClipMode(GX_CLIP_DISABLE); + GX_SetDispCopyGamma(GX_GM_1_0); + GX_SetZMode(GX_FALSE, GX_ALWAYS, GX_FALSE); + GX_SetColorUpdate(GX_TRUE); + GX_SetAlphaUpdate(GX_FALSE); + + /* Modelview */ + Mtx view; + memset (&view, 0, sizeof (Mtx)); + guLookAt(view, &cam.pos, &cam.up, &cam.view); + GX_LoadPosMtxImm(view, GX_PNMTX0); + GX_Flush(); +} + +/* Reset GX rendering */ +static void gxResetRendering(u8 type) +{ + GX_ClearVtxDesc(); + + if (type) + { + /* uses direct positionning, alpha blending & color channel (menu rendering) */ + GX_SetBlendMode(GX_BM_BLEND,GX_BL_SRCALPHA,GX_BL_INVSRCALPHA,GX_LO_CLEAR); + GX_SetVtxAttrFmt(GX_VTXFMT0, GX_VA_POS, GX_POS_XY, GX_S16, 0); + GX_SetVtxAttrFmt(GX_VTXFMT0, GX_VA_CLR0, GX_CLR_RGBA, GX_RGBA8, 0); + GX_SetVtxAttrFmt(GX_VTXFMT0, GX_VA_TEX0, GX_TEX_ST, GX_F32, 0); + GX_SetVtxDesc(GX_VA_POS, GX_DIRECT); + GX_SetVtxDesc(GX_VA_TEX0, GX_DIRECT); + GX_SetVtxDesc (GX_VA_CLR0, GX_DIRECT); + /* + Color.out = Color.rasterized*Color.texture + Alpha.out = Alpha.rasterized*Alpha.texture + */ + GX_SetTevOp (GX_TEVSTAGE0, GX_MODULATE); + GX_SetTevOrder(GX_TEVSTAGE0, GX_TEXCOORD0, GX_TEXMAP0, GX_COLOR0A0); + GX_SetNumTexGens(1); + GX_SetNumChans(1); + } + else + { + /* uses array positionning, no alpha blending, no color channel (video emulation) */ + GX_SetBlendMode(GX_BM_NONE,GX_BL_SRCALPHA,GX_BL_INVSRCALPHA,GX_LO_CLEAR); + GX_SetVtxAttrFmt(GX_VTXFMT0, GX_VA_POS, GX_POS_XYZ, GX_S16, 0); + GX_SetVtxAttrFmt(GX_VTXFMT0, GX_VA_TEX0, GX_TEX_ST, GX_S16, 0); + GX_SetVtxDesc(GX_VA_POS, GX_INDEX8); + GX_SetVtxDesc(GX_VA_TEX0, GX_DIRECT); + GX_SetArray(GX_VA_POS, square, 3 * sizeof (s16)); + /* + Color.out = Color.texture + Alpha.out = Alpha.texture + */ + GX_SetTevOp (GX_TEVSTAGE0, GX_REPLACE); + GX_SetTevOrder(GX_TEVSTAGE0, GX_TEXCOORD0, GX_TEXMAP0, GX_COLORNULL); + GX_SetNumTexGens(1); + GX_SetNumChans(0); + } + + GX_Flush(); +} + +/* Reset GX rendering mode */ +static void gxResetMode(GXRModeObj *tvmode, int vfilter_enabled) +{ + Mtx44 p; + f32 yScale = GX_GetYScaleFactor(tvmode->efbHeight, tvmode->xfbHeight); + u16 xfbHeight = GX_SetDispCopyYScale(yScale); + u16 xfbWidth = VIDEO_PadFramebufferWidth(tvmode->fbWidth); + + GX_SetCopyClear((GXColor)BLACK,0x00ffffff); + GX_SetViewport(0.0F, 0.0F, tvmode->fbWidth, tvmode->efbHeight, 0.0F, 1.0F); + GX_SetScissor(0, 0, tvmode->fbWidth, tvmode->efbHeight); + GX_SetDispCopySrc(0, 0, tvmode->fbWidth, tvmode->efbHeight); + GX_SetDispCopyDst(xfbWidth, xfbHeight); + GX_SetCopyFilter(tvmode->aa, tvmode->sample_pattern, (tvmode->xfbMode == VI_XFBMODE_SF) ? GX_FALSE : vfilter_enabled, tvmode->vfilter); + GX_SetFieldMode(tvmode->field_rendering, ((tvmode->viHeight == 2 * tvmode->xfbHeight) ? GX_ENABLE : GX_DISABLE)); + guOrtho(p, tvmode->efbHeight/2, -(tvmode->efbHeight/2), -(tvmode->fbWidth/2), tvmode->fbWidth/2, 100, 1000); + GX_LoadProjectionMtx(p, GX_ORTHOGRAPHIC); + GX_Flush(); +} + +/* Update Aspect Ratio */ +static void gxSetAspectRatio(int *xscale, int *yscale) +{ + /* Vertical Scaling is disabled by default */ + *yscale = (bitmap.viewport.h + (2 * bitmap.viewport.y)) / 2; + + /* Original aspect ratio */ + if (config.aspect) + { + /* Adjust vertical scaling when input & output video heights are different */ + if (vdp_pal && (!gc_pal || config.render)) + { + *yscale = *yscale * VI_MAX_HEIGHT_NTSC / VI_MAX_HEIGHT_PAL; + } + else if (!vdp_pal && gc_pal && !config.render) + { + *yscale = *yscale * VI_MAX_HEIGHT_PAL / VI_MAX_HEIGHT_NTSC; + } + + /* Horizontal Scaling */ + /* Wii/Gamecube pixel clock = 13.5 Mhz */ + /* "H32" pixel clock = Master Clock / 10 = 5.3693175 Mhz (NTSC) or 5.3203424 (PAL) */ + /* "H40" pixel clock = Master Clock / 8 = 6,711646875 Mhz (NTSC) or 6,650428 Mhz (PAL) */ + if (config.overscan & 2) + { + /* Horizontal borders are emulated */ + if (reg[12] & 1) + { + /* 348 "H40" pixels = 348 * Wii/GC pixel clock / "H40" pixel clock = approx. 700 (NTSC) or 707 (PAL) Wii/GC pixels */ + *xscale = (system_clock == MCLOCK_NTSC) ? 350 : 354; + } + else + { + /* 284 "H32" pixels = 284 * Wii/GC pixel clock / "H40" pixel clock = approx. 714 (NTSC) or 721 (PAL) Wii/GC pixels */ + *xscale = (system_clock == MCLOCK_NTSC) ? 357 : 361; + } + } + else + { + /* Horizontal borders are simulated */ + if ((system_hw == SYSTEM_GG) && !config.gg_extra) + { + /* 160 "H32" pixels = 160 * Wii/GC pixel clock / "H32" pixel clock = approx. 403 Wii/GC pixels (NTSC only) */ + *xscale = 202; + } + else + { + /* 320 "H40" pixels = 256 "H32" pixels = 256 * Wii/GC pixel clock / "H32" pixel clock = approx. 644 (NTSC) or 650 (PAL) Wii/GC pixels */ + *xscale = (system_clock == MCLOCK_NTSC) ? 322 : 325; + } + } + + /* Aspect correction for widescreen TV */ + if (config.aspect & 2) + { + /* Keep 4:3 aspect ratio on 16:9 output */ + *xscale = (*xscale * 3) / 4; + } + } + + /* Manual aspect ratio */ + else + { + /* By default, disable horizontal scaling */ + *xscale = bitmap.viewport.w + (2 * bitmap.viewport.x); + + /* Keep original aspect ratio in H32 modes */ + if (!(reg[12] & 1)) + { + *xscale = (*xscale * 320) / 256; + } + + /* Game Gear specific: if borders are disabled, upscale to fullscreen */ + if ((system_hw == SYSTEM_GG) && !config.gg_extra) + { + if (!(config.overscan & 1)) + { + /* Active area height = approx. 224 non-interlaced lines (60hz) */ + *yscale = 112; + } + + if (!(config.overscan & 2)) + { + /* Active area width = approx. 640 pixels */ + *xscale = 320; + } + } + + /* By default, keep NTSC aspect ratio */ + if (gc_pal && !config.render) + { + /* Upscale PAL output */ + *yscale = *yscale * VI_MAX_HEIGHT_PAL / VI_MAX_HEIGHT_NTSC; + } + + /* Add user scaling */ + *xscale += config.xscale; + *yscale += config.yscale; + } +} + +/* Reset GX/VI hardware scaler */ +static void gxResetScaler(u32 width) +{ + int xscale = 0; + int yscale = 0; + int offset = 0; + + /* retrieve screen aspect ratio */ + gxSetAspectRatio(&xscale, &yscale); + + /* default EFB width */ + rmode->fbWidth = 640; + + /* no filtering, disable GX horizontal scaling */ + if (!config.bilinear && !config.ntsc) + { + if ((width <= 320) && (width <= xscale)) + rmode->fbWidth = width * 2; + else if (width <= 640) + rmode->fbWidth = width; + } + + /* configure VI width */ + if ((xscale * 2) > rmode->fbWidth) + { + /* max width = 720 pixels */ + if (xscale > 360) + { + /* save offset for later */ + offset = ((xscale - 360) * rmode->fbWidth) / rmode->viWidth; + + /* maximal width */ + xscale = 360; + } + + /* enable VI upscaling */ + rmode->viWidth = xscale * 2; + rmode->viXOrigin = (720 - (xscale * 2)) / 2; + + /* default GX horizontal scaling */ + xscale = (rmode->fbWidth / 2); + + /* handle additional upscaling */ + if (offset) + { + /* no filtering, reduce EFB width to increase VI upscaling */ + if (!config.bilinear && !config.ntsc) + rmode->fbWidth -= (offset * 2); + + /* increase GX horizontal scaling */ + else + xscale += offset; + } + } + else + { + /* VI horizontal scaling is disabled */ + rmode->viWidth = rmode->fbWidth; + rmode->viXOrigin = (720 - rmode->fbWidth) / 2; + } + + /* Adjust screen position */ + int xshift = (config.xshift * rmode->fbWidth) / rmode->viWidth; + int yshift = (config.yshift * rmode->efbHeight) / rmode->viHeight; + + /* Double Resolution modes (480i/576i/480p) */ + if (config.render) + { + yscale = yscale * 2; + } + + /* Set GX scaler (Vertex Position matrix) */ + square[6] = square[3] = xshift + xscale; + square[0] = square[9] = xshift - xscale; + square[4] = square[1] = yshift + yscale; + square[7] = square[10] = yshift - yscale; + DCFlushRange(square, 32); + GX_InvVtxCache(); +} + +static void gxDrawCrosshair(gx_texture *texture, int x, int y) +{ + /* adjust texture dimensions to XFB->VI scaling */ + int w = (texture->width * rmode->fbWidth) / (rmode->viWidth); + int h = (texture->height * rmode->efbHeight) / (rmode->viHeight); + + /* Aspect correction for widescreen TV */ + if (config.aspect & 2) w = (w * 3) / 4; + + /* EFB scale & shift */ + int xwidth = square[3] - square[9]; + int ywidth = square[4] - square[10]; + + /* adjust texture coordinates to EFB */ + x = (((x + bitmap.viewport.x) * xwidth) / vwidth) + square[9] - w/2; + y = (((y + bitmap.viewport.y) * ywidth) / vheight) + square[10] - h/2; + + /* load texture object */ + GXTexObj texObj; + GX_InitTexObj(&texObj, texture->data, texture->width, texture->height, GX_TF_RGBA8, GX_CLAMP, GX_CLAMP, GX_FALSE); + GX_InitTexObjLOD(&texObj,GX_LINEAR,GX_LIN_MIP_LIN,0.0,10.0,0.0,GX_FALSE,GX_TRUE,GX_ANISO_4); + GX_LoadTexObj(&texObj, GX_TEXMAP0); + GX_InvalidateTexAll(); + + /* Draw textured quad */ + GX_Begin(GX_QUADS, GX_VTXFMT0, 4); + GX_Position2s16(x,y+h); + GX_Color4u8(0xff,0xff,0xff,0xff); + GX_TexCoord2f32(0.0, 1.0); + GX_Position2s16(x+w,y+h); + GX_Color4u8(0xff,0xff,0xff,0xff); + GX_TexCoord2f32(1.0, 1.0); + GX_Position2s16(x+w,y); + GX_Color4u8(0xff,0xff,0xff,0xff); + GX_TexCoord2f32(1.0, 0.0); + GX_Position2s16(x,y); + GX_Color4u8(0xff,0xff,0xff,0xff); + GX_TexCoord2f32(0.0, 0.0); + GX_End(); +} + +static void gxDrawCdLeds(gx_texture *texture_l, gx_texture *texture_r) +{ + /* adjust texture dimensions to XFB->VI scaling */ + int w = (texture_l->width * rmode->fbWidth) / (rmode->viWidth); + int h = (texture_l->height * rmode->efbHeight) / (rmode->viHeight); + + /* Aspect correction for widescreen TV */ + if (config.aspect & 2) w = (w * 3) / 4; + + /* EFB scale & shift */ + int xwidth = square[3] - square[9]; + int ywidth = square[4] - square[10]; + + /* adjust texture coordinates to EFB */ + int xl = ((bitmap.viewport.x * xwidth) / vwidth) + square[9] + 8; + int xr = (((bitmap.viewport.x + bitmap.viewport.w) * xwidth) / vwidth) + square[9] - 8 - w; + int y = (((bitmap.viewport.y + bitmap.viewport.h - 4) * ywidth) / vheight) + square[10] - h; + + /* load left screen texture */ + GXTexObj texObj; + GX_InitTexObj(&texObj, texture_l->data, texture_l->width, texture_l->height, GX_TF_RGBA8, GX_CLAMP, GX_CLAMP, GX_FALSE); + GX_InitTexObjLOD(&texObj,GX_LINEAR,GX_LIN_MIP_LIN,0.0,10.0,0.0,GX_FALSE,GX_TRUE,GX_ANISO_4); + GX_LoadTexObj(&texObj, GX_TEXMAP0); + GX_InvalidateTexAll(); + + /* Draw textured quad */ + GX_Begin(GX_QUADS, GX_VTXFMT0, 4); + GX_Position2s16(xl,y+h); + GX_Color4u8(0xff,0xff,0xff,0xff); + GX_TexCoord2f32(0.0, 1.0); + GX_Position2s16(xl+w,y+h); + GX_Color4u8(0xff,0xff,0xff,0xff); + GX_TexCoord2f32(1.0, 1.0); + GX_Position2s16(xl+w,y); + GX_Color4u8(0xff,0xff,0xff,0xff); + GX_TexCoord2f32(1.0, 0.0); + GX_Position2s16(xl,y); + GX_Color4u8(0xff,0xff,0xff,0xff); + GX_TexCoord2f32(0.0, 0.0); + GX_End(); + + /* load right screen texture */ + GX_InitTexObj(&texObj, texture_r->data, texture_r->width, texture_r->height, GX_TF_RGBA8, GX_CLAMP, GX_CLAMP, GX_FALSE); + GX_InitTexObjLOD(&texObj,GX_LINEAR,GX_LIN_MIP_LIN,0.0,10.0,0.0,GX_FALSE,GX_TRUE,GX_ANISO_4); + GX_LoadTexObj(&texObj, GX_TEXMAP0); + GX_InvalidateTexAll(); + + /* Draw textured quad */ + GX_Begin(GX_QUADS, GX_VTXFMT0, 4); + GX_Position2s16(xr,y+h); + GX_Color4u8(0xff,0xff,0xff,0xff); + GX_TexCoord2f32(0.0, 1.0); + GX_Position2s16(xr+w,y+h); + GX_Color4u8(0xff,0xff,0xff,0xff); + GX_TexCoord2f32(1.0, 1.0); + GX_Position2s16(xr+w,y); + GX_Color4u8(0xff,0xff,0xff,0xff); + GX_TexCoord2f32(1.0, 0.0); + GX_Position2s16(xr,y); + GX_Color4u8(0xff,0xff,0xff,0xff); + GX_TexCoord2f32(0.0, 0.0); + GX_End(); +} + +static void gxDrawOnScreenText(char *msg) +{ + GXRModeObj *temp = vmode; + int y = (40 * rmode->efbHeight) / 480; + int x = (bitmap.viewport.x > 0) ? (24 + bitmap.viewport.x) : 24; + x = (x * rmode->fbWidth) / rmode->viWidth; + + vmode = rmode; + FONT_write(msg, 20, x, y, rmode->fbWidth, (GXColor)WHITE); + vmode = temp; +} + +void gxDrawRectangle(s32 x, s32 y, s32 w, s32 h, u8 alpha, GXColor color) +{ + /* GX only use Color channel for rendering */ + GX_SetTevOp (GX_TEVSTAGE0, GX_PASSCLR); + GX_SetVtxDesc (GX_VA_TEX0, GX_NONE); + GX_Flush(); + + /* vertex coordinate */ + x -= (vmode->fbWidth/2); + y -= (vmode->efbHeight/2); + + /* draw colored quad */ + GX_Begin(GX_QUADS, GX_VTXFMT0, 4); + GX_Position2s16(x,y+h); + GX_Color4u8(color.r,color.g,color.b,alpha); + GX_Position2s16(x+w,y+h); + GX_Color4u8(color.r,color.g,color.b,alpha); + GX_Position2s16(x+w,y); + GX_Color4u8(color.r,color.g,color.b,alpha); + GX_Position2s16(x,y); + GX_Color4u8(color.r,color.g,color.b,alpha); + GX_End(); + GX_DrawDone(); + + /* restore GX rendering */ + GX_SetVtxDesc(GX_VA_TEX0, GX_DIRECT); + GX_SetTevOp (GX_TEVSTAGE0, GX_MODULATE); + GX_Flush(); +} + +void gxDrawTexture(gx_texture *texture, s32 x, s32 y, s32 w, s32 h, u8 alpha) +{ + if (!texture) return; + if (texture->data) + { + /* load texture object */ + GXTexObj texObj; + GX_InitTexObj(&texObj, texture->data, texture->width, texture->height, GX_TF_RGBA8, GX_CLAMP, GX_CLAMP, GX_FALSE); + GX_InitTexObjLOD(&texObj,GX_LINEAR,GX_LIN_MIP_LIN,0.0,10.0,0.0,GX_FALSE,GX_TRUE,GX_ANISO_4); /* does this really change anything ? */ + GX_LoadTexObj(&texObj, GX_TEXMAP0); + GX_InvalidateTexAll(); + + /* vertex coordinate */ + x -= (vmode->fbWidth/2); + y -= (vmode->efbHeight/2); + + /* draw textured quad */ + GX_Begin(GX_QUADS, GX_VTXFMT0, 4); + GX_Position2s16(x,y+h); + GX_Color4u8(0xff,0xff,0xff,alpha); + GX_TexCoord2f32(0.0, 1.0); + GX_Position2s16(x+w,y+h); + GX_Color4u8(0xff,0xff,0xff,alpha); + GX_TexCoord2f32(1.0, 1.0); + GX_Position2s16(x+w,y); + GX_Color4u8(0xff,0xff,0xff,alpha); + GX_TexCoord2f32(1.0, 0.0); + GX_Position2s16(x,y); + GX_Color4u8(0xff,0xff,0xff,alpha); + GX_TexCoord2f32(0.0, 0.0); + GX_End(); + GX_DrawDone(); + } +} + +void gxDrawTextureRotate(gx_texture *texture, s32 x, s32 y, s32 w, s32 h, f32 angle, u8 alpha) +{ + if (!texture) return; + if (texture->data) + { + /* load texture object */ + GXTexObj texObj; + GX_InitTexObj(&texObj, texture->data, texture->width, texture->height, GX_TF_RGBA8, GX_CLAMP, GX_CLAMP, GX_FALSE); + GX_InitTexObjLOD(&texObj,GX_LINEAR,GX_LIN_MIP_LIN,0.0,10.0,0.0,GX_FALSE,GX_TRUE,GX_ANISO_4); + GX_LoadTexObj(&texObj, GX_TEXMAP0); + GX_InvalidateTexAll(); + + /* vertex coordinate */ + x -= (vmode->fbWidth/2); + y -= (vmode->efbHeight/2); + + /* Modelview rotation */ + Mtx m,mv; + guVector axis = (guVector) {0,0,1}; + guLookAt(mv, &cam.pos, &cam.up, &cam.view); + guMtxRotAxisDeg (m, &axis, angle); + guMtxTransApply(m,m, x+w/2,y+h/2,0); + guMtxConcat(mv,m,mv); + GX_LoadPosMtxImm(mv, GX_PNMTX0); + GX_Flush(); + + /* draw textured quad */ + GX_Begin(GX_QUADS, GX_VTXFMT0, 4); + GX_Position2s16(-w/2,-h/2); + GX_Color4u8(0xff,0xff,0xff,alpha); + GX_TexCoord2f32(0.0, 0.0); + GX_Position2s16(w/2,-h/2); + GX_Color4u8(0xff,0xff,0xff,alpha); + GX_TexCoord2f32(1.0, 0.0); + GX_Position2s16(w/2,h/2); + GX_Color4u8(0xff,0xff,0xff,alpha); + GX_TexCoord2f32(1.0, 1.0); + GX_Position2s16(-w/2,h/2); + GX_Color4u8(0xff,0xff,0xff,alpha); + GX_TexCoord2f32(0.0, 1.0); + GX_End(); + GX_DrawDone(); + + /* restore default Modelview */ + guLookAt(mv, &cam.pos, &cam.up, &cam.view); + GX_LoadPosMtxImm(mv, GX_PNMTX0); + GX_Flush(); + } +} + +void gxDrawTextureRepeat(gx_texture *texture, s32 x, s32 y, s32 w, s32 h, u8 alpha) +{ + if (!texture) return; + if (texture->data) + { + /* load texture object */ + GXTexObj texObj; + GX_InitTexObj(&texObj, texture->data, texture->width, texture->height, GX_TF_RGBA8, GX_REPEAT, GX_REPEAT, GX_FALSE); + GX_LoadTexObj(&texObj, GX_TEXMAP0); + GX_InvalidateTexAll(); + + /* vertex coordinate */ + x -= (vmode->fbWidth/2); + y -= (vmode->efbHeight/2); + + /* texture coordinates */ + f32 s = (f32)w / (f32)texture->width; + f32 t = (f32)h / (f32)texture->height; + + /* draw textured quad */ + GX_Begin(GX_QUADS, GX_VTXFMT0, 4); + GX_Position2s16(x,y+h); + GX_Color4u8(0xff,0xff,0xff,alpha); + GX_TexCoord2f32(0.0, t); + GX_Position2s16(x+w,y+h); + GX_Color4u8(0xff,0xff,0xff,alpha); + GX_TexCoord2f32(s, t); + GX_Position2s16(x+w,y); + GX_Color4u8(0xff,0xff,0xff,alpha); + GX_TexCoord2f32(s, 0.0); + GX_Position2s16(x,y); + GX_Color4u8(0xff,0xff,0xff,alpha); + GX_TexCoord2f32(0.0, 0.0); + GX_End(); + GX_DrawDone(); + } +} + +void gxDrawScreenshot(u8 alpha) +{ + if (!rmode) return; + + /* get current game screen texture */ + GXTexObj texobj; + GX_InitTexObj(&texobj, texturemem, vwidth, vheight, GX_TF_RGB565, GX_CLAMP, GX_CLAMP, GX_FALSE); + GX_LoadTexObj(&texobj, GX_TEXMAP0); + GX_InvalidateTexAll(); + + /* get current aspect ratio */ + int xscale,yscale; + gxSetAspectRatio(&xscale, &yscale); + + /* adjust horizontal scaling */ + xscale = (xscale * vmode->fbWidth) / vmode->viWidth; + + /* adjust screen position */ + int xshift = (config.xshift * vmode->fbWidth) / vmode->viWidth; + int yshift = (config.yshift * vmode->efbHeight) / vmode->viHeight; + + /* set vertices position & size */ + s32 x = xshift - xscale; + s32 y = yshift - (yscale * 2); + s32 w = xscale * 2; + s32 h = yscale * 4; + + /* black out surrounding area if necessary (Game Gear without borders) */ + if ((w < 640) || (h < 480)) + { + gxDrawRectangle(0, 0, 640, 480, 255, (GXColor)BLACK); + } + + /* draw textured quad */ + GX_Begin(GX_QUADS, GX_VTXFMT0, 4); + GX_Position2s16(x,y+h); + GX_Color4u8(0xff,0xff,0xff,alpha); + GX_TexCoord2f32(0.0, 1.0); + GX_Position2s16(x+w,y+h); + GX_Color4u8(0xff,0xff,0xff,alpha); + GX_TexCoord2f32(1.0, 1.0); + GX_Position2s16(x+w,y); + GX_Color4u8(0xff,0xff,0xff,alpha); + GX_TexCoord2f32(1.0, 0.0); + GX_Position2s16(x,y); + GX_Color4u8(0xff,0xff,0xff,alpha); + GX_TexCoord2f32(0.0, 0.0); + GX_End(); + GX_DrawDone(); +} + +void gxCopyScreenshot(gx_texture *texture) +{ + /* retrieve gamescreen texture */ + GXTexObj texobj; + GX_InitTexObj(&texobj, texturemem, vwidth, vheight, GX_TF_RGB565, GX_CLAMP, GX_CLAMP, GX_FALSE); + GX_LoadTexObj(&texobj, GX_TEXMAP0); + GX_InvalidateTexAll(); + + /* scale texture to EFB width */ + s32 w = ((bitmap.viewport.w + 2*bitmap.viewport.x) * 640) / bitmap.viewport.w; + s32 h = (bitmap.viewport.h + 2*bitmap.viewport.y) * 2; + s32 x = -w/2; + s32 y = -(240+ 2*bitmap.viewport.y); + + /* black out surrounding area if necessary (Game Gear without borders) */ + if ((w < 640) || (h < 480)) + { + gxDrawRectangle(0, 0, 640, 480, 255, (GXColor)BLACK); + } + + /* draw textured quad */ + GX_Begin(GX_QUADS, GX_VTXFMT0, 4); + GX_Position2s16(x,y+h); + GX_Color4u8(0xff,0xff,0xff,0xff); + GX_TexCoord2f32(0.0, 1.0); + GX_Position2s16(x+w,y+h); + GX_Color4u8(0xff,0xff,0xff,0xff); + GX_TexCoord2f32(1.0, 1.0); + GX_Position2s16(x+w,y); + GX_Color4u8(0xff,0xff,0xff,0xff); + GX_TexCoord2f32(1.0, 0.0); + GX_Position2s16(x,y); + GX_Color4u8(0xff,0xff,0xff,0xff); + GX_TexCoord2f32(0.0, 0.0); + GX_End(); + + /* copy EFB to texture */ + texture->format = GX_TF_RGBA8; + texture->width = 320; + texture->height = bitmap.viewport.h; + texture->data = screenshot; + GX_SetTexCopySrc(0, 0, texture->width * 2, texture->height * 2); + GX_SetTexCopyDst(texture->width, texture->height, texture->format, GX_TRUE); + GX_DrawDone(); + GX_CopyTex(texture->data, GX_TRUE); + GX_Flush(); + + /* wait for copy operation to finish */ + /* GX_PixModeSync is only useful if GX_ command follows */ + /* we use dummy GX commands to stall CPU execution */ + GX_PixModeSync(); + GX_LoadTexObj(&texobj, GX_TEXMAP0); + GX_InvalidateTexAll(); + GX_Flush(); + DCFlushRange(texture->data, texture->width * texture->height * 4); +} + +/* Take Screenshot */ +void gxSaveScreenshot(char *filename) +{ + /* capture screenshot into a texture */ + gx_texture texture; + gxCopyScreenshot(&texture); + + /* open PNG file */ + FILE *f = fopen(filename,"wb"); + if (f) + { + /* encode screenshot into PNG file */ + gxTextureWritePNG(&texture,f); + fclose(f); + } +} + +void gxSetScreen(void) +{ + GX_DrawDone(); + GX_CopyDisp(xfb[whichfb], GX_FALSE); + GX_Flush(); + VIDEO_SetNextFramebuffer (xfb[whichfb]); + VIDEO_Flush (); + VIDEO_WaitVSync (); + gx_input_UpdateMenu(); +} + +void gxClearScreen(GXColor color) +{ + whichfb ^= 1; + GX_SetCopyClear(color,0x00ffffff); + GX_CopyDisp(xfb[whichfb], GX_TRUE); + GX_Flush(); +} + +/***************************************************************************************/ +/* GX Texture <-> LibPNG routines */ +/***************************************************************************************/ + +/* libpng read callback function */ +static void png_read_from_mem (png_structp png_ptr, png_bytep data, png_size_t length) +{ + png_image *image = (png_image *)png_get_io_ptr(png_ptr); + + /* copy data from image buffer */ + memcpy (data, image->buffer + image->offset, length); + + /* advance in the file */ + image->offset += length; +} + +/* convert PNG image (from file or data buffer) into RGBA8 texture */ +gx_texture *gxTextureOpenPNG(const u8 *png_data, FILE *png_file) +{ + int i; + + /* create a png read struct */ + png_structp png_ptr = png_create_read_struct(PNG_LIBPNG_VER_STRING,NULL,NULL,NULL); + if (!png_ptr) return NULL; + + /* create a png info struct */ + png_infop info_ptr = png_create_info_struct(png_ptr); + if (!info_ptr) + { + png_destroy_read_struct(&png_ptr,NULL,NULL); + return NULL; + } + + if (png_data) + { + /* init PNG image structure */ + png_image image; + image.buffer = (u8 *) png_data; + image.offset = 0; + + /* set callback for the read function */ + png_set_read_fn(png_ptr,(png_voidp *)(&image),png_read_from_mem); + } + else if (png_file) + { + /* check for valid magic number */ + png_byte magic[8]; + if (fread (magic, 1, 8, png_file) != 8) + { + png_destroy_read_struct(&png_ptr,&info_ptr,NULL); + return NULL; + } + + if (png_sig_cmp (magic, 0, 8)) + { + png_destroy_read_struct(&png_ptr,&info_ptr,NULL); + return NULL; + } + + /* set IO callback for read function */ + png_init_io (png_ptr, png_file); + png_set_sig_bytes (png_ptr, 8); + } + else + { + png_destroy_read_struct(&png_ptr,&info_ptr,NULL); + return NULL; + } + + /* read png info */ + png_read_info(png_ptr,info_ptr); + + /* retrieve image information */ + u32 width = png_get_image_width(png_ptr,info_ptr); + u32 height = png_get_image_height(png_ptr,info_ptr); + u32 bit_depth = png_get_bit_depth(png_ptr,info_ptr); + u32 color_type = png_get_color_type(png_ptr,info_ptr); + + /* ensure PNG file is in the supported format */ + if (png_file) + { + /* support for RGBA8 textures ONLY !*/ + if ((color_type != PNG_COLOR_TYPE_RGB_ALPHA) || (bit_depth != 8)) + { + png_destroy_read_struct(&png_ptr, &info_ptr,NULL); + return NULL; + } + + /* 4x4 tiles are required */ + if ((width%4) || (height%4)) + { + png_destroy_read_struct(&png_ptr, &info_ptr, NULL); + return NULL; + } + } + + /* allocate memory to store raw image data */ + u32 stride = width << 2; + u8 *img_data = memalign (32, stride * height); + if (!img_data) + { + png_destroy_read_struct(&png_ptr,&info_ptr,NULL); + return NULL; + } + + /* allocate row pointer data */ + png_bytep *row_pointers = (png_bytep *)memalign (32, sizeof (png_bytep) * height); + if (!row_pointers) + { + free (img_data); + png_destroy_read_struct(&png_ptr,&info_ptr,NULL); + return NULL; + } + + /* store raw image data */ + for (i = 0; i < height; i++) + { + row_pointers[i] = img_data + (i * stride); + } + + /* decode image */ + png_read_image(png_ptr, row_pointers); + + /* finish decompression and release memory */ + png_read_end(png_ptr, NULL); + png_destroy_read_struct(&png_ptr, &info_ptr, NULL); + free(row_pointers); + + /* initialize texture */ + gx_texture *texture = (gx_texture *)memalign(32, sizeof(gx_texture)); + if (!texture) + { + free (img_data); + return NULL; + } + + /* initialize texture data */ + texture->data = memalign(32, stride * height); + if (!texture->data) + { + free (img_data); + free(texture); + return NULL; + } + + memset(texture->data, 0, stride * height); + texture->width = width; + texture->height = height; + texture->format = GX_TF_RGBA8; + + /* encode to GX_TF_RGBA8 format (4x4 pixels paired titles) */ + u16 *dst_ar = (u16 *)(texture->data); + u16 *dst_gb = (u16 *)(texture->data + 32); + u32 *src1 = (u32 *)(img_data); + u32 *src2 = (u32 *)(img_data + stride); + u32 *src3 = (u32 *)(img_data + 2*stride); + u32 *src4 = (u32 *)(img_data + 3*stride); + u32 pixel,h,w; + + for (h=0; h> 24) & 0x00ff); + *dst_gb++= (pixel >> 8) & 0xffff; + } + + /* line N + 1 (4 pixels) */ + for (i=0; i<4; i++) + { + pixel = *src2++; + *dst_ar++= ((pixel << 8) & 0xff00) | ((pixel >> 24) & 0x00ff); + *dst_gb++= (pixel >> 8) & 0xffff; + } + + /* line N + 2 (4 pixels) */ + for (i=0; i<4; i++) + { + pixel = *src3++; + *dst_ar++= ((pixel << 8) & 0xff00) | ((pixel >> 24) & 0x00ff); + *dst_gb++= (pixel >> 8) & 0xffff; + } + + /* line N + 3 (4 pixels) */ + for (i=0; i<4; i++) + { + pixel = *src4++; + *dst_ar++= ((pixel << 8) & 0xff00) | ((pixel >> 24) & 0x00ff); + *dst_gb++= (pixel >> 8) & 0xffff; + } + + /* next paired tiles */ + dst_ar += 16; + dst_gb += 16; + } + + /* next 4 lines */ + src1 = src4; + src2 = src1 + width; + src3 = src2 + width; + src4 = src3 + width; + } + + /* release memory */ + free(img_data); + + /* flush texture data from cache */ + DCFlushRange(texture->data, height * stride); + + return texture; +} + +/* Write RGBA8 Texture to PNG file */ +void gxTextureWritePNG(gx_texture *texture, FILE *png_file) +{ + /* allocate PNG data buffer */ + u8 *img_data = (u8 *)memalign(32, texture->width * texture->height * 4); + if(!img_data) return; + + /* decode GX_TF_RGBA8 format (4x4 pixels paired titles) */ + u16 *ar = (u16 *)(texture->data); + u16 *gb = (u16 *)(texture->data + 32); + u32 *dst1 = (u32 *)(img_data); + u32 *dst2 = dst1 + texture->width; + u32 *dst3 = dst2 + texture->width; + u32 *dst4 = dst3 + texture->width; + u32 i,h,w,pixel; + + for (h=0; hheight; h+=4) + { + for (w=0; wwidth; w+=4) + { + /* line N (4 pixels) */ + for (i=0; i<4; i++) + { + pixel = ((*ar & 0xff) << 24) | (*gb << 8) | ((*ar & 0xff00) >> 8); + *dst1++ = pixel; + ar++; + gb++; + } + + /* line N + 1 (4 pixels) */ + for (i=0; i<4; i++) + { + pixel = ((*ar & 0xff) << 24) | (*gb << 8) | ((*ar & 0xff00) >> 8); + *dst2++ = pixel; + ar++; + gb++; + } + + /* line N + 2 (4 pixels) */ + for (i=0; i<4; i++) + { + pixel = ((*ar & 0xff) << 24) | (*gb << 8) | ((*ar & 0xff00) >> 8); + *dst3++ = pixel; + ar++; + gb++; + } + + /* line N + 3 (4 pixels) */ + for (i=0; i<4; i++) + { + pixel = ((*ar & 0xff) << 24) | (*gb << 8) | ((*ar & 0xff00) >> 8); + *dst4++ = pixel; + ar++; + gb++; + } + + /* next paired tiles */ + ar += 16; + gb += 16; + } + + /* next 4 lines */ + dst1 = dst4; + dst2 = dst1 + texture->width; + dst3 = dst2 + texture->width; + dst4 = dst3 + texture->width; + } + + /* create a png write struct */ + png_structp png_ptr = png_create_write_struct(PNG_LIBPNG_VER_STRING, NULL, NULL, NULL); + if(!png_ptr) + { + free(img_data); + return; + } + + /* create a png info struct */ + png_infop info_ptr = png_create_info_struct (png_ptr); + if (!info_ptr) + { + free(img_data); + png_destroy_write_struct(&png_ptr, NULL); + return; + } + + /* set IO callback for the write function */ + png_init_io(png_ptr, png_file); + + /* set PNG file properties */ + png_set_IHDR(png_ptr, info_ptr, texture->width, texture->height, 8, PNG_COLOR_TYPE_RGB_ALPHA, + PNG_INTERLACE_NONE, PNG_COMPRESSION_TYPE_DEFAULT, PNG_FILTER_TYPE_DEFAULT); + + /* allocate row pointer data */ + png_bytep *row_pointers = (png_bytep *)memalign (32, sizeof (png_bytep) * texture->height); + if (!row_pointers) + { + free (img_data); + png_destroy_write_struct(&png_ptr, &info_ptr); + return; + } + + /* store raw image data */ + for (i = 0; i < texture->height; i++) + { + row_pointers[i] = img_data + (i * texture->width * 4); + } + + /* configure libpng for image data */ + png_set_rows(png_ptr,info_ptr,row_pointers); + + /* write data to PNG file */ + png_write_png(png_ptr,info_ptr,PNG_TRANSFORM_IDENTITY,NULL); + + /* finish compression and release memory */ + png_write_end(png_ptr, NULL); + free(row_pointers); + free(img_data); + png_destroy_write_struct(&png_ptr, &info_ptr); +} + + +void gxTextureClose(gx_texture **p_texture) +{ + gx_texture *texture = *p_texture; + + if (texture) + { + if (texture->data) free(texture->data); + free(texture); + *p_texture = NULL; + } +} + + +/***************************************************************************************/ +/* VIDEO engine */ +/***************************************************************************************/ + +/* Emulation mode -> Menu mode */ +void gx_video_Stop(void) +{ + /* wait for next VBLANK */ + VIDEO_WaitVSync (); + + /* unallocate NTSC filters */ + if (sms_ntsc) free(sms_ntsc); + if (md_ntsc) free(md_ntsc); + sms_ntsc = NULL; + md_ntsc = NULL; + + /* lightgun textures */ + gxTextureClose(&crosshair[0]); + gxTextureClose(&crosshair[1]); + + /* CD leds textures */ + gxTextureClose(&cd_leds[0][0]); + gxTextureClose(&cd_leds[0][1]); + gxTextureClose(&cd_leds[1][0]); + gxTextureClose(&cd_leds[1][1]); + + /* GX menu rendering */ + gxResetRendering(1); + gxResetMode(vmode, GX_TRUE); + + /* render game snapshot */ + gxClearScreen((GXColor)BLACK); + gxDrawScreenshot(0xff); + + /* default VI settings */ + VIDEO_SetPostRetraceCallback(NULL); +#ifdef HW_RVL + VIDEO_SetTrapFilter(1); + VIDEO_SetGamma(VI_GM_1_0); +#endif + + /* adjust TV width */ + vmode->viWidth = config.screen_w; + vmode->viXOrigin = (VI_MAX_WIDTH_NTSC - vmode->viWidth)/2; + VIDEO_Configure(vmode); + + /* wait for VSYNC */ + gxSetScreen(); +} + +/* Menu mode -> Emulation mode */ +void gx_video_Start(void) +{ +#ifdef HW_RVL + VIDEO_SetTrapFilter(config.trap); + VIDEO_SetGamma((int)(config.gamma * 10.0)); +#endif + + /* TV mode */ + if ((config.tv_mode == 1) || ((config.tv_mode == 2) && vdp_pal)) + { + /* 50 Hz */ + gc_pal = 1; + } + else + { + /* 60 Hz */ + gc_pal = 0; + } + + /* When VSYNC is set to AUTO & console TV mode matches emulated video mode, emulation is synchronized with video hardware as well */ + if (config.vsync && (gc_pal == vdp_pal)) + { + /* VSYNC callback */ + VIDEO_SetPostRetraceCallback(vi_callback); + VIDEO_Flush(); + videoSync = audioSync; + } + else + { + videoSync = 0; + } + + /* Enable progressive or interlaced video mode */ + if (config.render == 2) + { + /* 480p */ + tvmodes[2]->viTVMode = (tvmodes[2]->viTVMode & ~3) | VI_PROGRESSIVE; + tvmodes[2]->xfbMode = VI_XFBMODE_SF; + + /* 576p */ + tvmodes[5]->viTVMode = VI_TVMODE_PAL_PROG; + tvmodes[5]->xfbMode = VI_XFBMODE_SF; + } + else if (config.render == 1) + { + /* 480i */ + tvmodes[2]->viTVMode = (tvmodes[2]->viTVMode & ~3) | VI_INTERLACE; + tvmodes[2]->xfbMode = VI_XFBMODE_DF; + + /* 576i */ + tvmodes[5]->viTVMode = VI_TVMODE_PAL_INT; + tvmodes[5]->xfbMode = VI_XFBMODE_DF; + } + + /* update horizontal border width */ + if ((system_hw == SYSTEM_GG) && !config.gg_extra) + { + bitmap.viewport.x = (config.overscan & 2) ? 14 : -48; + } + else + { + bitmap.viewport.x = (config.overscan & 2) * 7; + } + + /* force viewport update */ + bitmap.viewport.changed = 3; + + /* NTSC filter */ + if (config.ntsc) + { + /* allocate filters */ + if (!sms_ntsc) + { + sms_ntsc = (sms_ntsc_t *)memalign(32,sizeof(sms_ntsc_t)); + } + if (!md_ntsc) + { + md_ntsc = (md_ntsc_t *)memalign(32,sizeof(md_ntsc_t)); + } + + /* setup filters default configuration */ + switch (config.ntsc) + { + case 1: + sms_ntsc_init(sms_ntsc, &sms_ntsc_composite); + md_ntsc_init(md_ntsc, &md_ntsc_composite); + break; + case 2: + sms_ntsc_init(sms_ntsc, &sms_ntsc_svideo); + md_ntsc_init(md_ntsc, &md_ntsc_svideo); + break; + case 3: + sms_ntsc_init(sms_ntsc, &sms_ntsc_rgb); + md_ntsc_init(md_ntsc, &md_ntsc_rgb); + break; + } + } + + /* on-screen display enable flag */ + osd = config.fps; + + /* clear any on-screen text */ + memset(msg, 0, sizeof(msg)); + + /* lightgun textures */ + int i, player = 0; + for (i=0; i= 0) + { + if ((i == 0) || ((i == 4) && (input.system[1] != SYSTEM_LIGHTPHASER))) + { + /* Lightgun #1 */ + if (config.gun_cursor[0]) + { + crosshair[0] = gxTextureOpenPNG(Crosshair_p1_png,0); + osd = 1; + } + } + else + { + /* Lightgun #2 */ + if (config.gun_cursor[1]) + { + crosshair[1] = gxTextureOpenPNG(Crosshair_p2_png,0); + osd = 1; + } + } + } + } + + /* Check for any emulated device */ + if (input.dev[i] != NO_DEVICE) + { + /* increment player index */ + player++; + } + } + + /* CD leds textures */ + if (system_hw == SYSTEM_MCD) + { + if (config.cd_leds) + { + cd_leds[0][0] = gxTextureOpenPNG(CD_access_off_png,0); + cd_leds[0][1] = gxTextureOpenPNG(CD_access_on_png,0); + cd_leds[1][0] = gxTextureOpenPNG(CD_ready_off_png,0); + cd_leds[1][1] = gxTextureOpenPNG(CD_ready_on_png,0); + osd = 1; + } + } + + /* GX emulation rendering */ + gxResetRendering(0); + + /* resynchronize emulation with VSYNC */ + VIDEO_WaitVSync(); + + /* restart frame sync */ + videoWait = 0; + frameCount = 0; + starttime = gettime(); +} + +/* GX render update */ +int gx_video_Update(u32 done) +{ + if (videoWait || done) return SYNC_WAIT; + + videoWait = videoSync; + + /* check if display has changed during frame */ + if (bitmap.viewport.changed & 1) + { + /* update texture size */ + vwidth = bitmap.viewport.w + (2 * bitmap.viewport.x); + vheight = bitmap.viewport.h + (2 * bitmap.viewport.y); + + /* interlaced mode */ + if (config.render && interlaced) + { + vheight = vheight << 1; + } + + /* ntsc filter */ + if (config.ntsc) + { + vwidth = (reg[12] & 1) ? MD_NTSC_OUT_WIDTH(vwidth) : SMS_NTSC_OUT_WIDTH(vwidth); + + /* texel width must remain multiple of 4 */ + vwidth = (vwidth >> 2) << 2; + } + + /* initialize texture object */ + GXTexObj texobj; + GX_InitTexObj(&texobj, texturemem, vwidth, vheight, GX_TF_RGB565, GX_CLAMP, GX_CLAMP, GX_FALSE); + + /* configure texture filtering */ + if (!config.bilinear) + { + GX_InitTexObjLOD(&texobj,GX_NEAR,GX_NEAR_MIP_NEAR,0.0,10.0,0.0,GX_FALSE,GX_FALSE,GX_ANISO_1); + } + + /* load texture object */ + GX_LoadTexObj(&texobj, GX_TEXMAP0); + + /* update rendering mode */ + if (config.render) + { + rmode = tvmodes[gc_pal*3 + 2]; + } + else + { + rmode = tvmodes[gc_pal*3 + interlaced]; + } + + /* update aspect ratio */ + gxResetScaler(vwidth); + + /* update GX rendering mode */ + gxResetMode(rmode, config.vfilter); + + /* update VI mode */ + VIDEO_Configure(rmode); + } + + /* texture is now directly mapped by the line renderer */ + + /* force texture cache update */ + DCFlushRange(texturemem, TEX_SIZE); + GX_InvalidateTexAll(); + + /* render textured quad */ + GX_CallDispList(d_list, 32); + + /* on-screen display */ + if (osd) + { + /* reset GX rendering */ + gxResetRendering(1); + + /* lightgun # 1 screen mark */ + if (crosshair[0]) + { + if (input.system[0] == SYSTEM_LIGHTPHASER) + { + gxDrawCrosshair(crosshair[0], input.analog[0][0],input.analog[0][1]); + } + else + { + gxDrawCrosshair(crosshair[0], input.analog[4][0],input.analog[4][1]); + } + } + + /* lightgun #2 screen mark */ + if (crosshair[1]) + { + if (input.system[1] == SYSTEM_LIGHTPHASER) + { + gxDrawCrosshair(crosshair[1], input.analog[4][0],input.analog[4][1]); + } + else + { + gxDrawCrosshair(crosshair[1], input.analog[5][0],input.analog[5][1]); + } + } + + /* CD LEDS */ + if (cd_leds[1][1]) + { + /* CD LEDS status */ + u8 mode = scd.regs[0x06 >> 1].byte.h; + gxDrawCdLeds(cd_leds[1][(mode >> 1) & 1], cd_leds[0][mode & 1]); + } + + /* FPS counter */ + if (config.fps) + { + u32 delta = diff_usec(starttime, gettime()); + frameCount++; + if (delta > 1000000) + { + sprintf(msg,"%3.2f FPS", (float)frameCount * 1000000.0 / (float)delta); + frameCount = 0; + starttime = gettime(); + } + + /* disable EFB alpha blending for text background */ + GX_SetBlendMode(GX_BM_NONE,GX_BL_SRCALPHA,GX_BL_INVSRCALPHA,GX_LO_CLEAR); + GX_Flush(); + + gxDrawOnScreenText(msg); + } + + /* restore GX rendering */ + gxResetRendering(0); + + /* restore texture object */ + GXTexObj texobj; + GX_InitTexObj(&texobj, texturemem, vwidth, vheight, GX_TF_RGB565, GX_CLAMP, GX_CLAMP, GX_FALSE); + if (!config.bilinear) + { + GX_InitTexObjLOD(&texobj,GX_NEAR,GX_NEAR_MIP_NEAR,0.0,10.0,0.0,GX_FALSE,GX_FALSE,GX_ANISO_1); + } + GX_LoadTexObj(&texobj, GX_TEXMAP0); + GX_InvalidateTexAll(); + } + + /* swap XFB */ + whichfb ^= 1; + + /* copy EFB to XFB */ + GX_DrawDone(); + GX_CopyDisp(xfb[whichfb], GX_TRUE); + GX_Flush(); + + /* XFB is ready to be displayed */ + VIDEO_SetNextFramebuffer(xfb[whichfb]); + VIDEO_Flush(); + + if (bitmap.viewport.changed & 1) + { + /* clear update flags */ + bitmap.viewport.changed &= ~1; + + /* field synchronization */ + VIDEO_WaitVSync(); + if (rmode->viTVMode & VI_NON_INTERLACE) + { + VIDEO_WaitVSync(); + } + else while (VIDEO_GetNextField() != odd_frame) + { + VIDEO_WaitVSync(); + } + + /* Audio DMA need to be resynchronized with VSYNC */ + audioStarted = 0; + } + + return SYNC_VIDEO; +} + +/* Initialize VIDEO subsystem */ +void gx_video_Init(void) +{ + /* + * Before doing anything else under libogc, + * Call VIDEO_Init + */ + VIDEO_Init(); + + /* Get the current VIDEO mode then : + - set menu video mode (480p/576p/480i/576i) + - set emulator rendering 60hz TV modes (MPAL/NTSC/EURGB60) + */ + vmode = VIDEO_GetPreferredMode(NULL); + + /* Adjust display settings */ + switch (vmode->viTVMode >> 2) + { + case VI_PAL: /* 576 lines scaled (PAL 50Hz) */ + TV60hz_240p.viTVMode = VI_TVMODE_EURGB60_DS; + TV60hz_240i.viTVMode = VI_TVMODE_EURGB60_INT; + TV60hz_480i.viTVMode = VI_TVMODE_EURGB60_INT; + break; + + default: /* 480 lines (NTSC, MPAL or PAL 60Hz) */ + TV60hz_240p.viTVMode = VI_TVMODE(vmode->viTVMode >> 2, VI_NON_INTERLACE); + TV60hz_240i.viTVMode = VI_TVMODE(vmode->viTVMode >> 2, VI_INTERLACE); + TV60hz_480i.viTVMode = VI_TVMODE(vmode->viTVMode >> 2, VI_INTERLACE); + break; + } + + /* Configure VI */ + VIDEO_Configure (vmode); + + /* Configure the framebuffers (double-buffering) */ + xfb[0] = (u32 *) MEM_K0_TO_K1((u32 *) SYS_AllocateFramebuffer(&TV50hz_576i)); + xfb[1] = (u32 *) MEM_K0_TO_K1((u32 *) SYS_AllocateFramebuffer(&TV50hz_576i)); + + /* Define a console */ + console_init(xfb[0], 20, 64, 640, 574, 574 * 2); + + /* Clear framebuffers to black */ + VIDEO_ClearFrameBuffer(vmode, xfb[0], COLOR_BLACK); + VIDEO_ClearFrameBuffer(vmode, xfb[1], COLOR_BLACK); + + /* Set the framebuffer to be displayed at next VBlank */ + VIDEO_SetNextFramebuffer(xfb[0]); + + /* Enable Video Interface */ + VIDEO_SetBlack(FALSE); + + /* Update VIDEO settings for next VBlank */ + VIDEO_Flush(); + + /* Wait for VBlank */ + VIDEO_WaitVSync(); + VIDEO_WaitVSync(); + + /* Initialize GX */ + gxStart(); + gxResetRendering(1); + gxResetMode(vmode, GX_TRUE); + + /* initialize FONT */ + FONT_Init(); + + /* Initialize textures */ + texturemem = memalign(32, TEX_SIZE); + screenshot = memalign(32, HASPECT*VASPECT*4); +} + +void gx_video_Shutdown(void) +{ + if (texturemem) free(texturemem); + if (screenshot) free(screenshot); + FONT_Shutdown(); + VIDEO_ClearFrameBuffer(vmode, xfb[whichfb], COLOR_BLACK); + VIDEO_Flush(); + VIDEO_WaitVSync(); +} + +/* Custom NTSC blitters */ +typedef unsigned short sms_ntsc_out_t; +typedef unsigned short md_ntsc_out_t; + +void sms_ntsc_blit( sms_ntsc_t const* ntsc, SMS_NTSC_IN_T const* table, unsigned char* input, + int in_width, int vline) +{ + int const chunk_count = in_width / sms_ntsc_in_chunk; + + /* handle extra 0, 1, or 2 pixels by placing them at beginning of row */ + int const in_extra = in_width - chunk_count * sms_ntsc_in_chunk; + unsigned const extra2 = (unsigned) -(in_extra >> 1 & 1); /* (unsigned) -1 = ~0 */ + unsigned const extra1 = (unsigned) -(in_extra & 1) | extra2; + + /* use palette entry 0 for unused pixels */ + SMS_NTSC_IN_T border = table[0]; + + SMS_NTSC_BEGIN_ROW( ntsc, border, + (SMS_NTSC_ADJ_IN( table[input[0]] )) & extra2, + (SMS_NTSC_ADJ_IN( table[input[extra2 & 1]] )) & extra1 ); + + /* directly fill the RGB565 texture */ + /* one tile is 32 byte = 4x4 pixels */ + /* tiles are stored continuously in texture memory */ + in_width = SMS_NTSC_OUT_WIDTH(in_width) / 4; + int offset = ((in_width * 32) * (vline / 4)) + ((vline & 3) * 8); + sms_ntsc_out_t* __restrict__ line_out = (sms_ntsc_out_t*)(texturemem + offset); + offset = 0; + + int n; + input += in_extra; + + for ( n = chunk_count; n; --n ) + { + /* order of input and output pixels must not be altered */ + SMS_NTSC_COLOR_IN( 0, ntsc, SMS_NTSC_ADJ_IN( table[*input++] ) ); + SMS_NTSC_RGB_OUT( 0, line_out[offset++] ); + if ((offset % 4) == 0) offset += 12; + SMS_NTSC_RGB_OUT( 1, line_out[offset++] ); + if ((offset % 4) == 0) offset += 12; + + SMS_NTSC_COLOR_IN( 1, ntsc, SMS_NTSC_ADJ_IN( table[*input++] ) ); + SMS_NTSC_RGB_OUT( 2, line_out[offset++] ); + if ((offset % 4) == 0) offset += 12; + SMS_NTSC_RGB_OUT( 3, line_out[offset++] ); + if ((offset % 4) == 0) offset += 12; + + SMS_NTSC_COLOR_IN( 2, ntsc, SMS_NTSC_ADJ_IN( table[*input++] ) ); + SMS_NTSC_RGB_OUT( 4, line_out[offset++] ); + if ((offset % 4) == 0) offset += 12; + SMS_NTSC_RGB_OUT( 5, line_out[offset++] ); + if ((offset % 4) == 0) offset += 12; + SMS_NTSC_RGB_OUT( 6, line_out[offset++] ); + if ((offset % 4) == 0) offset += 12; + } + + /* finish final pixels */ + SMS_NTSC_COLOR_IN( 0, ntsc, border ); + SMS_NTSC_RGB_OUT( 0, line_out[offset++] ); + if ((offset % 4) == 0) offset += 12; + SMS_NTSC_RGB_OUT( 1, line_out[offset++] ); + if ((offset % 4) == 0) offset += 12; + + SMS_NTSC_COLOR_IN( 1, ntsc, border ); + SMS_NTSC_RGB_OUT( 2, line_out[offset++] ); + if ((offset % 4) == 0) offset += 12; + SMS_NTSC_RGB_OUT( 3, line_out[offset++] ); + if ((offset % 4) == 0) offset += 12; + + SMS_NTSC_COLOR_IN( 2, ntsc, border ); + SMS_NTSC_RGB_OUT( 4, line_out[offset++] ); + if ((offset % 4) == 0) offset += 12; + SMS_NTSC_RGB_OUT( 5, line_out[offset++] ); + if ((offset % 4) == 0) offset += 12; + SMS_NTSC_RGB_OUT( 6, line_out[offset++] ); + if ((offset % 4) == 0) offset += 12; +} + +void md_ntsc_blit( md_ntsc_t const* ntsc, MD_NTSC_IN_T const* table, unsigned char* input, + int in_width, int vline) +{ + int const chunk_count = in_width / md_ntsc_in_chunk - 1; + + /* use palette entry 0 for unused pixels */ + MD_NTSC_IN_T border = table[0]; + + MD_NTSC_BEGIN_ROW( ntsc, border, + MD_NTSC_ADJ_IN( table[*input++] ), + MD_NTSC_ADJ_IN( table[*input++] ), + MD_NTSC_ADJ_IN( table[*input++] ) ); + + /* directly fill the RGB565 texture */ + /* one tile is 32 byte = 4x4 pixels */ + /* tiles are stored continuously in texture memory */ + in_width = MD_NTSC_OUT_WIDTH(in_width) >> 2; + int offset = ((in_width << 5) * (vline >> 2)) + ((vline & 3) * 8); + md_ntsc_out_t* __restrict__ line_out = (md_ntsc_out_t*)(texturemem + offset); + + int n; + + for ( n = chunk_count; n; --n ) + { + /* order of input and output pixels must not be altered */ + MD_NTSC_COLOR_IN( 0, ntsc, MD_NTSC_ADJ_IN( table[*input++] ) ); + MD_NTSC_RGB_OUT( 0, *line_out++ ); + MD_NTSC_RGB_OUT( 1, *line_out++ ); + + MD_NTSC_COLOR_IN( 1, ntsc, MD_NTSC_ADJ_IN( table[*input++] ) ); + MD_NTSC_RGB_OUT( 2, *line_out++ ); + MD_NTSC_RGB_OUT( 3, *line_out++ ); + + line_out += 12; + + MD_NTSC_COLOR_IN( 2, ntsc, MD_NTSC_ADJ_IN( table[*input++] ) ); + MD_NTSC_RGB_OUT( 4, *line_out++ ); + MD_NTSC_RGB_OUT( 5, *line_out++ ); + + MD_NTSC_COLOR_IN( 3, ntsc, MD_NTSC_ADJ_IN( table[*input++] ) ); + MD_NTSC_RGB_OUT( 6, *line_out++ ); + MD_NTSC_RGB_OUT( 7, *line_out++ ); + + line_out += 12; +} + + /* finish final pixels */ + MD_NTSC_COLOR_IN( 0, ntsc, MD_NTSC_ADJ_IN( table[*input++] ) ); + MD_NTSC_RGB_OUT( 0, *line_out++ ); + MD_NTSC_RGB_OUT( 1, *line_out++ ); + + MD_NTSC_COLOR_IN( 1, ntsc, border ); + MD_NTSC_RGB_OUT( 2, *line_out++ ); + MD_NTSC_RGB_OUT( 3, *line_out++ ); + + line_out += 12; + + MD_NTSC_COLOR_IN( 2, ntsc, border ); + MD_NTSC_RGB_OUT( 4, *line_out++ ); + MD_NTSC_RGB_OUT( 5, *line_out++ ); + + MD_NTSC_COLOR_IN( 3, ntsc, border ); + MD_NTSC_RGB_OUT( 6, *line_out++ ); + MD_NTSC_RGB_OUT( 7, *line_out++ ); +} diff --git a/genplus-gx/gx/gx_video.h b/genplus-gx/gx/gx_video.h new file mode 100644 index 0000000000..d069bffbdd --- /dev/null +++ b/genplus-gx/gx/gx_video.h @@ -0,0 +1,105 @@ +/**************************************************************************** + * gx_video.c + * + * Genesis Plus GX video support + * + * Copyright Eke-Eke (2007-2013), based on original work from Softdev (2006) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _GC_VIDEO_H_ +#define _GC_VIDEO_H_ + +/* EFB colors */ +#define BLACK {0x00,0x00,0x00,0xff} +#define DARK_GREY {0x22,0x22,0x22,0xff} +#define LIGHT_BLUE {0xb8,0xc7,0xda,0xff} +#define SKY_BLUE {0x99,0xcc,0xff,0xff} +#define LIGHT_GREEN {0xa9,0xc7,0xc6,0xff} +#define WHITE {0xff,0xff,0xff,0xff} + +/* Directly fill a RGB565 texture */ +/* One tile is 32 byte = 4x4 pixels */ +/* Tiles are stored continuously in texture memory */ +#define CUSTOM_BLITTER(line, width, table, in) \ + width >>= 2; \ + u16 *out = (u16 *) (texturemem + (((width << 5) * (line >> 2)) + ((line & 3) << 3))); \ + do \ + { \ + *out++ = table[*in++]; \ + *out++ = table[*in++]; \ + *out++ = table[*in++]; \ + *out++ = table[*in++]; \ + out += 12; \ + } \ + while (--width); + +/* image texture */ +typedef struct +{ + u8 *data; + u16 width; + u16 height; + u8 format; +} gx_texture; + +/* Global variables */ +extern GXRModeObj *vmode; +extern u8 *texturemem; +extern u32 gc_pal; +extern u32 videoSync; + +/* GX rendering */ +extern void gxDrawRectangle(s32 x, s32 y, s32 w, s32 h, u8 alpha, GXColor color); +extern void gxDrawTexture(gx_texture *texture, s32 x, s32 y, s32 w, s32 h, u8 alpha); +extern void gxDrawTextureRepeat(gx_texture *texture, s32 x, s32 y, s32 w, s32 h, u8 alpha); +extern void gxDrawTextureRotate(gx_texture *texture, s32 x, s32 y, s32 w, s32 h, f32 angle, u8 alpha); +extern void gxDrawScreenshot(u8 alpha); +extern void gxCopyScreenshot(gx_texture *texture); +extern void gxSaveScreenshot(char *filename); +extern void gxClearScreen(GXColor color); +extern void gxSetScreen(void); + +/* PNG textures */ +extern gx_texture *gxTextureOpenPNG(const u8 *png_data, FILE *png_file); +extern void gxTextureWritePNG(gx_texture *p_texture, FILE *png_file); +extern void gxTextureClose(gx_texture **p_texture); + +/* GX video engine */ +extern void gx_video_Init(void); +extern void gx_video_Shutdown(void); +extern void gx_video_Start(void); +extern void gx_video_Stop(void); +extern int gx_video_Update(u32 done); + +#endif diff --git a/genplus-gx/gx/images/Banner_bottom.png b/genplus-gx/gx/images/Banner_bottom.png new file mode 100644 index 0000000000000000000000000000000000000000..85545b1a1627eebffceb840d9ad00dc859214eac GIT binary patch literal 4704 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z)xpJ#1k=0bf%D5~kB7RV!I?dLw|=J~>HMtNHU6wdRg8N^S{ zurjj>v@HZNq4n5dUz~F&K6xbPFBL+&>AiH282O=HSXV|^7Ori;H?duLhmK7`)LHH` zrz2UQZv^$73PkO=QM%grkPLr}CmQ+nCof%ex%uxL%MEMdYVL!)@L%gV53DPAbF&d9 zjD{&BResteHvul&$}n-oOj+Xv_KlLV5m3I}IIu+Y;#M^&R2DXF`MHz>e*$(TXY=FSqCe*tID#sG=)seI~`kdJntw{XN&Y3T6ILyRA?%9YLQ%aP<74 zV>acAj*+IBU$l5agLCBP1$y&*&=&jjV4A|9g4>ISi!Biz^-D%6zi9@*qNYz}h&qlj zOaE>8#PW=z1((_yMhsPOo2!WzJ$>^dVfNsZeOo?f;7z1r7P9;tB(r!U$Xw7oDCoQ# zVP7cJyW9GoBiO$%&F`uYju + +#ifdef HW_RVL +#include +#include + +extern bool sdio_Deinitialize(); +extern void USBStorage_Deinitialize(); +#endif + +/* output samplerate, adjusted to take resampler precision in account */ +#define SAMPLERATE_48KHZ 47992 + +u32 Shutdown = 0; +u32 ConfigRequested = 1; +char osd_version[32]; + +#ifdef HW_RVL +/**************************************************************************** + * Power Button callbacks + ***************************************************************************/ +static void PowerOff_cb(void) +{ + Shutdown = 1; + ConfigRequested = 1; + reload = 0; +} + +static void Reload_cb(void) +{ + Shutdown = 1; + ConfigRequested = 1; +} + +#endif + +/**************************************************************************** + * Reset Button callback + ***************************************************************************/ +static void Reset_cb(void) +{ + if (system_hw & SYSTEM_MD) + { + /* Soft Reset */ + gen_reset(0); + } + else if (system_hw == SYSTEM_SMS) + { + /* assert RESET input (Master System model 1 only) */ + io_reg[0x0D] &= ~IO_RESET_HI; + } +} + +/*************************************************************************** + * Genesis Plus Virtual Machine + * + ***************************************************************************/ +static void init_machine(void) +{ + /* system is not initialized */ + config.hot_swap &= 0x01; + + /* mark all BIOS as unloaded */ + system_bios = 0; + + /* Genesis BOOT ROM support (2KB max) */ + memset(boot_rom, 0xFF, 0x800); + FILE *fp = fopen(MD_BIOS, "rb"); + if (fp != NULL) + { + /* read BOOT ROM */ + fread(boot_rom, 1, 0x800, fp); + fclose(fp); + + /* check BOOT ROM */ + if (!memcmp((char *)(boot_rom + 0x120),"GENESIS OS", 10)) + { + /* mark Genesis BIOS as loaded */ + system_bios = SYSTEM_MD; + } + } + + /* allocate global work bitmap */ + memset(&bitmap, 0, sizeof (bitmap)); + bitmap.width = 720; + bitmap.height = 576; + bitmap.pitch = bitmap.width * 2; + bitmap.viewport.w = 256; + bitmap.viewport.h = 224; + bitmap.viewport.x = 0; + bitmap.viewport.y = 0; + bitmap.data = texturemem; +} + +static void run_emulation(void) +{ + u32 sync; + + /* main emulation loop */ + while (1) + { + /* emulated system */ + if (system_hw == SYSTEM_MCD) + { + /* 16-bit hardware + CD */ + while (!ConfigRequested) + { + /* render frame */ + system_frame_scd(0); + + /* audio/video sync */ + sync = SYNC_WAIT; + while (sync != (SYNC_VIDEO | SYNC_AUDIO)) + { + /* update video */ + sync |= gx_video_Update(sync & SYNC_VIDEO); + + /* update audio */ + sync |= gx_audio_Update(); + } + + /* check interlaced mode change */ + if (bitmap.viewport.changed & 4) + { + /* VSYNC "original" mode */ + if (!config.render && config.vsync && (gc_pal == vdp_pal)) + { + /* framerate has changed, reinitialize audio timings */ + audio_init(SAMPLERATE_48KHZ, get_framerate()); + } + + /* clear flag */ + bitmap.viewport.changed &= ~4; + } + } + } + else if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + /* 16-bit hardware */ + while (!ConfigRequested) + { + /* render frame */ + system_frame_gen(0); + + /* audio/video sync */ + sync = SYNC_WAIT; + while (sync != (SYNC_VIDEO | SYNC_AUDIO)) + { + /* update video */ + sync |= gx_video_Update(sync & SYNC_VIDEO); + + /* update audio */ + sync |= gx_audio_Update(); + } + + /* check interlaced mode change */ + if (bitmap.viewport.changed & 4) + { + /* VSYNC "original" mode */ + if (!config.render && config.vsync && (gc_pal == vdp_pal)) + { + /* framerate has changed, reinitialize audio timings */ + audio_init(SAMPLERATE_48KHZ, get_framerate()); + } + + /* clear flag */ + bitmap.viewport.changed &= ~4; + } + } + } + else + { + /* 8-bit hardware */ + while (!ConfigRequested) + { + /* render frame */ + system_frame_sms(0); + + /* audio/video sync */ + sync = SYNC_WAIT; + while (sync != (SYNC_VIDEO | SYNC_AUDIO)) + { + /* update video */ + sync |= gx_video_Update(sync & SYNC_VIDEO); + + /* update audio */ + sync |= gx_audio_Update(); + } + + /* check interlaced mode change (PBC mode only) */ + if (bitmap.viewport.changed & 4) + { + /* "original" mode */ + if (!config.render && config.vsync && (gc_pal == vdp_pal)) + { + /* framerate has changed, reinitialize audio timings */ + audio_init(SAMPLERATE_48KHZ, get_framerate()); + } + + /* clear flag */ + bitmap.viewport.changed &= ~4; + } + } + } + + /* stop video & audio */ + gx_audio_Stop(); + gx_video_Stop(); + + /* show menu */ + ConfigRequested = 0; + mainmenu(); + + /* restart video & audio */ + gx_audio_Start(); + gx_video_Start(); + } +} + +/********************************************************************************************************************************************************* + Get emulator input framerate (actually used by audio emulation to approximate number of samples rendered on each frame, see audio_init in system.c) +*********************************************************************************************************************************************************/ +double get_framerate(void) +{ + /* Run emulator at original VDP framerate if console TV mode does not match emulated TV mode or VSYNC is disabled */ + if (!config.vsync || (config.tv_mode == !vdp_pal)) + { + return 0.0; + } + + /* Otherwise, run emulator at Wii/Gamecube framerate to ensure perfect video synchronization */ + if (vdp_pal) + { + /* 288p -> 13500000 pixels/sec, 864 pixels/line, 312 lines/field -> fps = 13500000/864/312 = 50.08 hz */ + /* 288i,576i -> 13500000 pixels/sec, 864 pixels/line, 312.5 lines/field (two fields = one frame = 625 lines) -> fps = 13500000/864/312.5 = 50.00 hz */ + return (config.render || interlaced) ? (27000000.0/864.0/625.0) : (13500000.0/864.0/312.0); + } + else + { + /* 240p -> 13500000 pixels/sec, 858 pixels/line, 263 lines/field -> fps = 13500000/858/263 = 59.83 hz */ + /* 240i,480i -> 13500000 pixels/sec, 858 pixels/line, 262.5 lines/field (two fields = one frame = 525 lines) -> fps = 13500000/858/262.5 = 59.94 hz */ + /* 480p -> 27000000 pixels/sec, 858 pixels/line, 525 lines/field -> fps = 27000000/858/525 = 59.94 hz */ + return (config.render || interlaced) ? (27000000.0/858.0/525.0) : (13500000.0/858.0/263.0); + } +} + +/******************************************* + Restart emulation when loading a new game +********************************************/ +void reloadrom(void) +{ + /* Cartridge "Hot Swap" support (make sure system has already been inited once and use cartridges) */ + if ((config.hot_swap == 3) && ((system_hw != SYSTEM_MCD) || scd.cartridge.boot)) + { + /* Only initialize cartridge hardware */ + if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + /* 16-bit cartridge */ + md_cart_init(); + md_cart_reset(1); + } + else + { + /* 8-bit cartridge */ + sms_cart_init(); + sms_cart_reset(); + } + } + + /* Disc Swap support (automatically enabled if CD tray is open) */ + else if ((system_hw != SYSTEM_MCD) || (cdd.status != CD_OPEN)) + { + /* Initialize audio emulation */ + interlaced = 0; + audio_init(SAMPLERATE_48KHZ, get_framerate()); + + /* System Power-On */ + system_init(); + system_reset(); + + /* Allow hot swap */ + config.hot_swap |= 2; + } + + /* Auto-Load Backup RAM */ + slot_autoload(0,config.s_device); + + /* Auto-Load State */ + slot_autoload(config.s_default,config.s_device); + + /* Load Cheat file */ + CheatLoad(); +} + +/************************************************** + Shutdown everything properly +***************************************************/ +void shutdown(void) +{ + /* save current config */ + config_save(); + + /* auto-save State file */ + slot_autosave(config.s_default,config.s_device); + + /* shutdown emulation core */ + audio_shutdown(); + + /* shutdown audio & video engines */ + gx_audio_Shutdown(); + gx_video_Shutdown(); + +#ifdef HW_RVL + /* unmount all devices */ + ISO9660_Unmount("dvd:"); + fatUnmount("sd"); + fatUnmount("usb"); + + /* shutdown all devices */ + DI_Close(); + sdio_Deinitialize(); + USBStorage_Deinitialize(); + MOUSE_Deinit(); +#endif +} + +/*************************************************************************** + * M A I N + * + ***************************************************************************/ +int main (int argc, char *argv[]) +{ + #ifdef HW_RVL + /* enable 64-byte fetch mode for L2 cache */ + L2Enhance(); + + /* disable DVD cache */ + DI_UseCache(0); + + /* autodetect loader arguments */ + if ((argc >= 3) && (argv[1] != NULL)) + { + /* check if autoloading from USB is requested */ + if (!strncasecmp(argv[1], "usb:/", 5)) + { + /* reload to IOS58 for USB2 support */ + if (IOS_GetVersion() != 58) + { + /* warning: DVD support will be disabled after IOS reloading ! */ + IOS_ReloadIOS(58); + } + } + } + + sprintf(osd_version, "%s (IOS %d)", VERSION, IOS_GetVersion()); +#else + sprintf(osd_version, "%s (GCN)", VERSION); +#endif + + /* initialize video engine */ + gx_video_Init(); + + /* initialize input engine */ + gx_input_Init(); + + /* initialize FAT devices */ + int retry = 0; + int fatMounted = 0; + + /* try to mount FAT devices during 3 seconds */ + while (!fatMounted && (retry < 12)) + { + fatMounted = fatInitDefault(); + usleep(250000); + retry++; + } + + if (fatMounted) + { + /* base directory */ + char pathname[MAXPATHLEN]; + sprintf (pathname, DEFAULT_PATH); + DIR *dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + + /* default SRAM & Savestate files directories */ + sprintf (pathname, "%s/saves",DEFAULT_PATH); + dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + sprintf (pathname, "%s/saves/md",DEFAULT_PATH); + dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + sprintf (pathname, "%s/saves/ms",DEFAULT_PATH); + dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + sprintf (pathname, "%s/saves/gg",DEFAULT_PATH); + dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + sprintf (pathname, "%s/saves/sg",DEFAULT_PATH); + dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + sprintf (pathname, "%s/saves/cd",DEFAULT_PATH); + dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + + /* default Snapshot files directories */ + sprintf (pathname, "%s/snaps",DEFAULT_PATH); + dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + sprintf (pathname, "%s/snaps/md",DEFAULT_PATH); + dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + sprintf (pathname, "%s/snaps/ms",DEFAULT_PATH); + dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + sprintf (pathname, "%s/snaps/gg",DEFAULT_PATH); + dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + sprintf (pathname, "%s/snaps/sg",DEFAULT_PATH); + dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + sprintf (pathname, "%s/snaps/cd",DEFAULT_PATH); + dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + + /* default Cheat files directories */ + sprintf (pathname, "%s/cheats",DEFAULT_PATH); + dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + sprintf (pathname, "%s/cheats/md",DEFAULT_PATH); + dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + sprintf (pathname, "%s/cheats/ms",DEFAULT_PATH); + dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + sprintf (pathname, "%s/cheats/gg",DEFAULT_PATH); + dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + sprintf (pathname, "%s/cheats/sg",DEFAULT_PATH); + dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + sprintf (pathname, "%s/cheats/cd",DEFAULT_PATH); + dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + + /* default BIOS ROM files directories */ + sprintf (pathname, "%s/bios",DEFAULT_PATH); + dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + + /* default LOCK-ON ROM files directories */ + sprintf (pathname, "%s/lock-on",DEFAULT_PATH); + dir = opendir(pathname); + if (dir) closedir(dir); + else mkdir(pathname,S_IRWXU); + } + + /* initialize audio engine */ + gx_audio_Init(); + + /* initialize emulation */ + history_default(); + config_default(); + init_machine(); + + /* file autoloading */ + int autoload = config.autoload; + + /* autodetect loader arguments */ + if ((argc >= 3) && (argv[1] != NULL) && (argv[2] != NULL)) + { + /* automatically load any file passed as argument */ + autoload = 1; + + /* add the file to the top of the history. */ + history_add_file(argv[1], argv[2], 0); + } + + /* automatically load first file from history list if requested */ + if (autoload) + { + SILENT = 1; + if (OpenDirectory(TYPE_RECENT, -1)) + { + if (LoadFile(0)) + { + reloadrom(); + gx_video_Start(); + gx_audio_Start(); + ConfigRequested = 0; + } + } + SILENT = 0; + } + + /* show disclaimer before entering menu */ + if (ConfigRequested) + { + legal(); + } + + /* initialize stub loader detection */ + reload = 0; + +#ifdef HW_RVL + /* autodetect loader arguments */ + if ((argc >= 4) && (argv[3] != NULL)) + { + /* assume proper loader stub exists */ + reload = (void(*)())0x80001800; + + /* return to loader when POWER buttons are pressed */ + SYS_SetPowerCallback(Reload_cb); + } + else + { + /* autodetect HomeBrew Channel stub */ + u32 *sig = (u32*)0x80001800; + if ((sig[1] == 0x53545542) && (sig[2] == 0x48415858)) + { + reload = (void(*)())0x80001800; + } + + /* by default, shutdown system when POWER buttons are pressed */ + SYS_SetPowerCallback(PowerOff_cb); + + } +#else + /* autodetect SDLoad stub */ + u32 *sig = (u32*)0x80001800; + if (sig[0] == 0x7c6000a6) + { + reload = (void(*)())0x80001800; + } +#endif + + /* RESET button callback */ + SYS_SetResetCallback(Reset_cb); + + /* main emulation loop */ + run_emulation(); + + /* we should never return anyway */ + return 0; +} diff --git a/genplus-gx/gx/osd.h b/genplus-gx/gx/osd.h new file mode 100644 index 0000000000..4caec0e8c8 --- /dev/null +++ b/genplus-gx/gx/osd.h @@ -0,0 +1,86 @@ +/*************************************************/ +/* port specific stuff should be put there */ +/*************************************************/ + +#ifndef _OSD_H_ +#define _OSD_H_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef HW_RVL +#include +#include +#include "vi_encoder.h" +#endif + +#include "gx_input.h" +#include "gx_audio.h" +#include "gx_video.h" +#include "file_load.h" +#include "cheats.h" + +#include "config.h" +#include "fileio.h" + +#define DEFAULT_PATH "/genplus" + +/*************************************************/ +/* required by Genesis Plus GX core */ +/*************************************************/ +#define GG_ROM "/genplus/lock-on/ggenie.bin" +#define AR_ROM "/genplus/lock-on/areplay.bin" +#define SK_ROM "/genplus/lock-on/sk.bin" +#define SK_UPMEM "/genplus/lock-on/sk2chip.bin" +#define MS_BIOS_US "/genplus/bios/bios_U.sms" +#define MS_BIOS_EU "/genplus/bios/bios_E.sms" +#define MS_BIOS_JP "/genplus/bios/bios_J.sms" +#define GG_BIOS "/genplus/bios/bios.gg" +#define MD_BIOS "/genplus/bios/bios_MD.bin" +#define CD_BIOS_US "/genplus/bios/bios_CD_U.bin" +#define CD_BIOS_EU "/genplus/bios/bios_CD_E.bin" +#define CD_BIOS_JP "/genplus/bios/bios_CD_J.bin" +#define CD_BRAM_US "/genplus/saves/cd/scd_U.brm" +#define CD_BRAM_EU "/genplus/saves/cd/scd_E.brm" +#define CD_BRAM_JP "/genplus/saves/cd/scd_J.brm" +#define CART_BRAM "/genplus/saves/cd/cart.brm" + +/*********************************************************/ +/* implemented by Genesis Plus GX core (GC/Wii specific) */ +/*********************************************************/ + +/* 32 bytes aligned sound buffers (8 samples alignment) */ +#define ALIGN_SND 0xfffffff8 + +/* use Wii DVD LED to indicate when virtual CD tray is open */ +#ifdef HW_RVL +#define CD_TRAY_CALLBACK *(u32*)0xcd0000c0 = (*(u32*)0xcd0000c0 & ~0x20) | ((cdd.status == CD_OPEN) << 5); +#endif + +/*************************************************/ + +#define VERSION "Genesis Plus GX 1.7.5" + +#define SYNC_WAIT 0 +#define SYNC_VIDEO 1 +#define SYNC_AUDIO 2 + +/* globals */ +extern void legal(void); +extern double get_framerate(void); +extern void reloadrom(void); +extern void shutdown(void); +extern u32 Shutdown; +extern u32 ConfigRequested; +extern char osd_version[32]; + +#endif /* _OSD_H_ */ diff --git a/genplus-gx/gx/sounds/button_over.pcm b/genplus-gx/gx/sounds/button_over.pcm new file mode 100644 index 0000000000000000000000000000000000000000..8c4d88adbbd7b9f5537aed1f7b0938b66103131e GIT binary patch literal 160 zcmW-a+Y*8>3`7q>DPA7^|Ic#$azE6bCwrX~}L`@ literal 0 HcmV?d00001 diff --git a/genplus-gx/gx/sounds/button_select.pcm b/genplus-gx/gx/sounds/button_select.pcm new file mode 100644 index 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z3-_~Y>Ir7RE;fe-Lf=)={Nfr7GWLp&F`?ih7YB}ejrSLKWimS$c*IE72?%EsaK+BK zQ2hhEvG05t3!oMV(lqe`-ThIhBLnEJ$7?9;+(w|iyTP291dOY)nWtY;Ww8){{z|a2 zR?AMn!dp;J%=4!kAE#+QFtvEB)sZ~w%lhfTZIQrCQm9ar+l`e`?h7E1%p5|;JcAk8|xlhBj zC}Dx7@bfYWKL^&|RNT&UHWheSQNWHin#=lxeJPHi#w^D3iRv2mi*0SErVFT`BhvD82=&uaoJH?IoXW z6Fo(DXO|JzJ$(vZ<(z$U57-BhR5s^*O>1|ErD9L0f%brH*E4H%YBj;7gnLs#^kz@k zRN2y9gqEza_=FQ$SYz9Vi)Fj$r|KK>!4jKMUose)%m|&gI ztuaBLVeaWXYND--tu;&)6N79B5=XMcU-J@zdeul$Nd_Z{H^D(*#ESguN4&WlFlO>tjn& z6FbZdR8xTbb_KWiwN~_1>_WFvoxc#*WK!GDPNmQ2w%eLM`T?D_t#u={SbxTBuq-$a zcW4~6QYq~kwpJXJx!4Td)D?H*fXMGwvw^&vvKw_YRJKJ?vtXi*ytPp_K+Tc}2-qn$ z-^Rwy=pA;C?g1XfKwgoZbjR^?))4LaGhlD^aGs0u+hm2Z4Zi<48ULw#kzW3P|6_=||L + All rights reserved. + + Proper (standard) vorbis usage by Tantric, 2009 + Threading modifications/corrections by Tantric, 2009 + + Redistribution and use in source and binary forms, with or without modification, are + permitted provided that the following conditions are met: + + - Redistributions of source code must retain the above copyright notice, this list of + conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright notice, this list + of conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + - The names of the contributors may not be used to endorse or promote products derived + from this software without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY + EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "oggplayer.h" +#include +#include +#include + +/* functions to read the Ogg file from memory */ + +static struct +{ + char *mem; + int size; + int pos; +} file[4]; + +static int f_read(void * punt, int bytes, int blocks, int *f) +{ + int b; + int c; + int d; + + if (bytes * blocks <= 0) + return 0; + + blocks = bytes * blocks; + c = 0; + + while (blocks > 0) + { + b = blocks; + if (b > 4096) + b = 4096; + + if (*f >= 0x666 && *f <= 0x669) + { + d = (*f) - 0x666; + if (file[d].size == 0) + return -1; + if ((file[d].pos + b) > file[d].size) + b = file[d].size - file[d].pos; + if (b > 0) + { + memcpy(punt, file[d].mem + file[d].pos, b); + file[d].pos += b; + } + } + else + b = read(*f, ((char *) punt) + c, b); + + if (b <= 0) + { + return c / bytes; + } + c += b; + blocks -= b; + } + return c / bytes; +} + +static int f_seek(int *f, ogg_int64_t offset, int mode) +{ + if(f==NULL) return(-1); + + int k, d; + mode &= 3; + if (*f >= 0x666 && *f <= 0x669) + { + d = (*f) - 0x666; + k = 0; + + if (file[d].size == 0) + return -1; + + if (mode == 0) + { + if ((offset) >= file[d].size) + { + file[d].pos = file[d].size; + k = -1; + } + else if ((offset) < 0) + { + file[d].pos = 0; + k = -1; + } + else + file[d].pos = offset; + } + if (mode == 1) + { + if ((file[d].pos + offset) >= file[d].size) + { + file[d].pos = file[d].size; + k = -1; + } + else if ((file[d].pos + offset) < 0) + { + file[d].pos = 0; + k = -1; + } + else + file[d].pos += offset; + } + if (mode == 2) + { + + if ((file[d].size + offset) >= file[d].size) + { + file[d].pos = file[d].size; + k = -1; + } + else if ((file[d].size + offset) < 0) + { + file[d].pos = 0; + k = -1; + } + else + file[d].pos = file[d].size + offset; + } + + } + else + k = lseek(*f, (int) offset, mode); + + if (k < 0) + k = -1; + else + k = 0; + return k; +} + +static int f_close(int *f) +{ + int d; + if (*f >= 0x666 && *f <= 0x669) + { + d = (*f) - 0x666; + file[d].size = 0; + file[d].pos = 0; + if (file[d].mem) + { + file[d].mem = (void *) 0; + } + return 0; + } + else + return close(*f); + return 0; +} + +static long f_tell(int *f) +{ + int k, d; + + if (*f >= 0x666 && *f <= 0x669) + { + d = (*f) - 0x666; + k = file[d].pos; + } + else + k = lseek(*f, 0, 1); + + return (long) k; +} + +static int mem_open(char * ogg, int size) +{ + static int one = 1; + int n; + if (one) + { + one = 0; + for (n = 0; n < 4; n++) + file[n].size = 0; + } + + for (n = 0; n < 4; n++) + { + if (file[n].size == 0) + { + file[n].mem = ogg; + file[n].size = size; + file[n].pos = 0; + return (0x666 + n); + } + } + return -1; +} + +static int mem_close(int fd) +{ + if (fd >= 0x666 && fd <= 0x669) // it is a memory file descriptor? + { + fd -= 0x666; + file[fd].size = 0; + return 0; + } + else + return f_close(&fd); +} + +static ov_callbacks callbacks = { + (size_t (*)(void *, size_t, size_t, void *)) f_read, + (int (*)(void *, ogg_int64_t, int)) f_seek, + (int (*)(void *)) f_close, + (long (*)(void *)) f_tell +}; + +/* OGG control */ + +#define READ_SAMPLES 4096 /* samples that it must read before to send */ +#define MAX_PCMOUT 4096 /* minimum size to read ogg samples */ +typedef struct +{ + OggVorbis_File vf; + vorbis_info *vi; + int current_section; + + /* OGG file operation */ + int fd; + int mode; + int eof; + int flag; + int volume; + int seek_time; + + /* OGG buffer control */ + short pcmout[2][READ_SAMPLES + MAX_PCMOUT * 2]; /* take 4k out of the data segment, not the stack */ + int pcmout_pos; + int pcm_indx; + +} private_data_ogg; + +static private_data_ogg private_ogg; + +/* OGG thread control */ + +#define STACKSIZE 8192 + +static u8 oggplayer_stack[STACKSIZE]; +static lwpq_t oggplayer_queue = LWP_TQUEUE_NULL; +static lwp_t h_oggplayer = LWP_THREAD_NULL; +static int ogg_thread_running = 0; + +static void ogg_add_callback(int voice) +{ + if (!ogg_thread_running) + { + ASND_StopVoice(0); + return; + } + + if (private_ogg.flag & 128) + return; /* Ogg is paused */ + + if (private_ogg.pcm_indx >= READ_SAMPLES) + { + if (ASND_AddVoice(0, + (void *) private_ogg.pcmout[private_ogg.pcmout_pos], + private_ogg.pcm_indx << 1) == 0) + { + private_ogg.pcmout_pos ^= 1; + private_ogg.pcm_indx = 0; + private_ogg.flag = 0; + LWP_ThreadSignal(oggplayer_queue); + } + } + else + { + if (private_ogg.flag & 64) + { + private_ogg.flag &= ~64; + LWP_ThreadSignal(oggplayer_queue); + } + } +} + +static void * ogg_player_thread(private_data_ogg * priv) +{ + int first_time = 1; + long ret; + + /* init */ + LWP_InitQueue(&oggplayer_queue); + + priv[0].vi = ov_info(&priv[0].vf, -1); + + ASND_Pause(0); + + priv[0].pcm_indx = 0; + priv[0].pcmout_pos = 0; + priv[0].eof = 0; + priv[0].flag = 0; + priv[0].current_section = 0; + + ogg_thread_running = 1; + + while (!priv[0].eof && ogg_thread_running) + { + if (priv[0].flag) + LWP_ThreadSleep(oggplayer_queue); /* wait only when i have samples to send */ + + if (priv[0].flag == 0) /* wait to all samples are sended */ + { + if (ASND_TestPointer(0, priv[0].pcmout[priv[0].pcmout_pos]) + && ASND_StatusVoice(0) != SND_UNUSED) + { + priv[0].flag |= 64; + continue; + } + if (priv[0].pcm_indx < READ_SAMPLES) + { + priv[0].flag = 3; + + if (priv[0].seek_time >= 0) + { + ov_time_seek(&priv[0].vf, priv[0].seek_time); + priv[0].seek_time = -1; + } + + ret + = ov_read( + &priv[0].vf, + (void *) &priv[0].pcmout[priv[0].pcmout_pos][priv[0].pcm_indx], + MAX_PCMOUT,/*0,2,1,*/&priv[0].current_section); + priv[0].flag &= 192; + if (ret == 0) + { + /* EOF */ + if (priv[0].mode & 1) + ov_time_seek(&priv[0].vf, 0); /* repeat */ + else + priv[0].eof = 1; /* stops */ + } + else if (ret < 0) + { + /* error in the stream. Not a problem, just reporting it in + case we (the app) cares. In this case, we don't. */ + if (ret != OV_HOLE) + { + if (priv[0].mode & 1) + ov_time_seek(&priv[0].vf, 0); /* repeat */ + else + priv[0].eof = 1; /* stops */ + } + } + else + { + /* we don't bother dealing with sample rate changes, etc, but + you'll have to */ + priv[0].pcm_indx += ret >> 1; /* get 16 bits samples */ + } + } + else + priv[0].flag = 1; + } + + if (priv[0].flag == 1) + { + if (ASND_StatusVoice(0) == SND_UNUSED || first_time) + { + first_time = 0; + if (priv[0].vi->channels == 2) + { + ASND_SetVoice(0, VOICE_STEREO_16BIT, priv[0].vi->rate, 0, + (void *) priv[0].pcmout[priv[0].pcmout_pos], + priv[0].pcm_indx << 1, priv[0].volume, + priv[0].volume, ogg_add_callback); + priv[0].pcmout_pos ^= 1; + priv[0].pcm_indx = 0; + priv[0].flag = 0; + } + else + { + ASND_SetVoice(0, VOICE_MONO_16BIT, priv[0].vi->rate, 0, + (void *) priv[0].pcmout[priv[0].pcmout_pos], + priv[0].pcm_indx << 1, priv[0].volume, + priv[0].volume, ogg_add_callback); + priv[0].pcmout_pos ^= 1; + priv[0].pcm_indx = 0; + priv[0].flag = 0; + } + } + } + usleep(10); + } + ov_clear(&priv[0].vf); + priv[0].fd = -1; + priv[0].pcm_indx = 0; + + return 0; +} + +void StopOgg() +{ + ASND_StopVoice(0); + ogg_thread_running = 0; + + if(h_oggplayer != LWP_THREAD_NULL) + { + if(oggplayer_queue != LWP_TQUEUE_NULL) + LWP_ThreadSignal(oggplayer_queue); + LWP_JoinThread(h_oggplayer, NULL); + h_oggplayer = LWP_THREAD_NULL; + } + if(oggplayer_queue != LWP_TQUEUE_NULL) + { + LWP_CloseQueue(oggplayer_queue); + oggplayer_queue = LWP_TQUEUE_NULL; + } +} + +int PlayOgg(char * buf, int buflen, int time_pos, int mode) +{ + StopOgg(); + + private_ogg.fd = mem_open(buf, buflen); + + if (private_ogg.fd < 0) + { + private_ogg.fd = -1; + return -1; + } + + private_ogg.mode = mode; + private_ogg.eof = 0; + private_ogg.volume = 127; + private_ogg.flag = 0; + private_ogg.seek_time = -1; + + if (time_pos > 0) + private_ogg.seek_time = time_pos; + + if (ov_open_callbacks((void *) &private_ogg.fd, &private_ogg.vf, NULL, 0, callbacks) < 0) + { + mem_close(private_ogg.fd); /* mem_close() can too close files from devices */ + private_ogg.fd = -1; + ogg_thread_running = 0; + return -1; + } + + if (LWP_CreateThread(&h_oggplayer, (void *) ogg_player_thread, + &private_ogg, oggplayer_stack, STACKSIZE, 80) == -1) + { + ogg_thread_running = 0; + ov_clear(&private_ogg.vf); + private_ogg.fd = -1; + return -1; + } + return 0; +} + +void PauseOgg(int pause) +{ + if (pause) + { + private_ogg.flag |= 128; + } + else + { + if (private_ogg.flag & 128) + { + private_ogg.flag |= 64; + private_ogg.flag &= ~128; + if (ogg_thread_running > 0) + { + LWP_ThreadSignal(oggplayer_queue); + } + } + } +} + +int StatusOgg() +{ + if (ogg_thread_running == 0) + return -1; /* Error */ + else if (private_ogg.eof) + return 255; /* EOF */ + else if (private_ogg.flag & 128) + return 2; /* paused */ + else + return 1; /* running */ +} + +void SetVolumeOgg(int volume) +{ + private_ogg.volume = volume; + ASND_ChangeVolumeVoice(0, volume, volume); +} + +s32 GetTimeOgg() +{ + int ret; + if (ogg_thread_running == 0 || private_ogg.fd < 0) + return 0; + ret = ((s32) ov_time_tell(&private_ogg.vf)); + if (ret < 0) + ret = 0; + + return ret; +} + +void SetTimeOgg(s32 time_pos) +{ + if (time_pos >= 0) + private_ogg.seek_time = time_pos; +} + diff --git a/genplus-gx/gx/utils/oggplayer.h b/genplus-gx/gx/utils/oggplayer.h new file mode 100644 index 0000000000..85b95c6a88 --- /dev/null +++ b/genplus-gx/gx/utils/oggplayer.h @@ -0,0 +1,179 @@ +/* + Copyright (c) 2008 Francisco Muñoz 'Hermes' + All rights reserved. + + Proper (standard) vorbis usage by Tantric, 2009 + Threading modifications/corrections by Tantric, 2009 + + Redistribution and use in source and binary forms, with or without modification, are + permitted provided that the following conditions are met: + + - Redistributions of source code must retain the above copyright notice, this list of + conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright notice, this list + of conditions and the following disclaimer in the documentation and/or other + materials provided with the distribution. + - The names of the contributors may not be used to endorse or promote products derived + from this software without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY + EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL + THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef NO_SOUND + +#ifndef __OGGPLAYER_H__ +#define __OGGPLAYER_H__ + +#include +#include "tremor/ivorbiscodec.h" +#include "tremor/ivorbisfile.h" + +#ifdef __cplusplus +extern "C" +{ +#endif + +#define OGG_ONE_TIME 0 +#define OGG_INFINITE_TIME 1 + +#define OGG_STATUS_RUNNING 1 +#define OGG_STATUS_ERR -1 +#define OGG_STATUS_PAUSED 2 +#define OGG_STATUS_EOF 255 + +/*------------------------------------------------------------------------------------------------------------------------------------------------------*/ +/* Player OGG functions */ +/*------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +/* int PlayOgg(int fd, int time_pos, int mode); + + Play an Ogg file. This file can be loaded from memory (mem_open(void *ogg, int size_ogg)) or from device with open("device:file.ogg",O_RDONLY,0); + + NOTE: The file is closed by the player when you call PlayOgg(), StopOgg() or if it fail. + + -- Params --- + + buf: pointer to sound data + + buflen: buffer size in bytes + + time_pos: initial time position in the file (in milliseconds). For example, use 30000 to advance 30 seconds + + mode: Use OGG_ONE_TIME or OGG_INFINITE_TIME. When you use OGG_ONE_TIME the sound stops and StatusOgg() return OGG_STATUS_EOF + + return: 0- Ok, -1 Error + + */ + +int PlayOgg(char * buf, int buflen, int time_pos, int mode); + +/*------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +/* void StopOgg(); + + Stop an Ogg file. + + NOTE: The file is closed and the player thread is released + + -- Params --- + + + */ + +void StopOgg(); + +/*------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +/* void PauseOgg(int pause); + + Pause an Ogg file. + + -- Params --- + + pause: 0 -> continue, 1-> pause + + */ + +void PauseOgg(int pause); + +/*------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +/* int StatusOgg(); + + Return the Ogg status + + -- Params --- + + + return: OGG_STATUS_RUNNING + OGG_STATUS_ERR -> not initialized? + OGG_STATUS_PAUSED + OGG_STATUS_EOF -> player stopped by End Of File + + */ + +int StatusOgg(); + +/*------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +/* void SetVolumeOgg(int volume); + + Set the Ogg playing volume. + NOTE: it change the volume of voice 0 (used for the Ogg player) + + -- Params --- + + volume: 0 to 255 (max) + + */ + +void SetVolumeOgg(int volume); + +/*------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +/* s32 GetTimeOgg(); + + Return the Ogg time from the starts of the file + + -- Params --- + + return: 0 -> Ok or error condition (you must ignore this value) + >0 -> time in milliseconds from the starts + + */ + +s32 GetTimeOgg(); + +/*------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +/* void SetTimeOgg(s32 time_pos); + + Set the time position + + NOTE: The file is closed by the player when you call PlayOgg(), StopOgg() or if it fail. + + -- Params --- + + time_pos: time position in the file (in milliseconds). For example, use 30000 to advance 30 seconds + + */ + +void SetTimeOgg(s32 time_pos); + +/*------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#ifdef __cplusplus +} +#endif + +#endif + +#endif diff --git a/genplus-gx/gx/utils/vi_encoder.c b/genplus-gx/gx/utils/vi_encoder.c new file mode 100644 index 0000000000..402fa79199 --- /dev/null +++ b/genplus-gx/gx/utils/vi_encoder.c @@ -0,0 +1,565 @@ +/**************************************************************************** + * vi_encoder.c + * + * Wii Audio/Video Encoder support + * + * Copyright (C) 2009 Eke-Eke, with some code from libogc (C) Hector Martin + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifdef HW_RVL + +#include +#include +#include +#include + +#include "vi_encoder.h" + +/**************************************************************************** + * I2C driver by Hector Martin (marcan) + * + ****************************************************************************/ + +#define _SHIFTL(v, s, w) \ + ((u32) (((u32)(v) & ((0x01 << (w)) - 1)) << (s))) +#define _SHIFTR(v, s, w) \ + ((u32)(((u32)(v) >> (s)) & ((0x01 << (w)) - 1))) + +extern void udelay(int us); + +static u32 i2cIdentFirst = 0; +static u32 i2cIdentFlag = 1; +static vu16* const _viReg = (u16*)0xCC002000; +static vu32* const _i2cReg = (u32*)0xCD800000; + +static inline void __viOpenI2C(u32 channel) +{ + u32 val = ((_i2cReg[49]&~0x8000)|0x4000); + val |= _SHIFTL(channel,15,1); + _i2cReg[49] = val; +} + +static inline u32 __viSetSCL(u32 channel) +{ + u32 val = (_i2cReg[48]&~0x4000); + val |= _SHIFTL(channel,14,1); + _i2cReg[48] = val; + return 1; +} +static inline u32 __viSetSDA(u32 channel) +{ + u32 val = (_i2cReg[48]&~0x8000); + val |= _SHIFTL(channel,15,1); + _i2cReg[48] = val; + return 1; +} + +static inline u32 __viGetSDA() +{ + return _SHIFTR(_i2cReg[50],15,1); +} + +static inline void __viCheckI2C() +{ + __viOpenI2C(0); + udelay(4); + + i2cIdentFlag = 0; + if(__viGetSDA()!=0) i2cIdentFlag = 1; +} + +static u32 __sendSlaveAddress(u8 addr) +{ + u32 i; + + __viSetSDA(i2cIdentFlag^1); + udelay(2); + + __viSetSCL(0); + for(i=0;i<8;i++) { + if(addr&0x80) __viSetSDA(i2cIdentFlag); + else __viSetSDA(i2cIdentFlag^1); + udelay(2); + + __viSetSCL(1); + udelay(2); + + __viSetSCL(0); + addr <<= 1; + } + + __viOpenI2C(0); + udelay(2); + + __viSetSCL(1); + udelay(2); + + if(i2cIdentFlag==1 && __viGetSDA()!=0) return 0; + + __viSetSDA(i2cIdentFlag^1); + __viOpenI2C(1); + __viSetSCL(0); + + return 1; +} + +static u32 __VISendI2CData(u8 addr,void *val,u32 len) +{ + u8 c; + s32 i,j; + u32 level,ret; + + if(i2cIdentFirst==0) { + __viCheckI2C(); + i2cIdentFirst = 1; + } + + _CPU_ISR_Disable(level); + + __viOpenI2C(1); + __viSetSCL(1); + + __viSetSDA(i2cIdentFlag); + udelay(4); + + ret = __sendSlaveAddress(addr); + if(ret==0) { + _CPU_ISR_Restore(level); + return 0; + } + + __viOpenI2C(1); + for(i=0;i> 8; + buf[2] = data & 0xFF; + __VISendI2CData(0xe0,buf,3); + udelay(2); +} + +static void __VIWriteI2CRegister32(u8 reg, u32 data) +{ + u8 buf[5]; + buf[0] = reg; + buf[1] = data >> 24; + buf[2] = (data >> 16) & 0xFF; + buf[3] = (data >> 8) & 0xFF; + buf[4] = data & 0xFF; + __VISendI2CData(0xe0,buf,5); + udelay(2); +} + +static void __VIWriteI2CRegisterBuf(u8 reg, int size, u8 *data) +{ + u8 buf[0x100]; + buf[0] = reg; + memcpy(&buf[1], data, size); + __VISendI2CData(0xe0,buf,size+1); + udelay(2); +} + +/**************************************************************************** + * A/V functions support (Eke-Eke) + * + ****************************************************************************/ +static const u8 gamma_coeffs[][33] = +{ + /* GM_0_0 */ + { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + + }, + + /* GM_0_1 */ + { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x03, 0x97, 0x3B, 0x49, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, 0x10, 0x80, 0x1B, 0x80, 0xEB, 0x00 + }, + + /* GM_0_2 */ + { + 0x00, 0x00, 0x00, 0x28, 0x00, 0x5A, 0x02, 0xDB, 0x0D, 0x8D, 0x30, 0x49, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x10, 0x00, 0x10, 0x40, 0x11, 0x00, 0x18, 0x80, 0x42, 0x00, 0xEB, 0x00 + }, + + /* GM_0_3 */ + { + 0x00, 0x00, 0x00, 0x7A, 0x02, 0x3C, 0x07, 0x6D, 0x12, 0x9C, 0x27, 0x24, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x10, 0x00, 0x10, 0xC0, 0x15, 0x80, 0x29, 0x00, 0x62, 0x00, 0xEB, 0x00 + }, + + /* GM_0_4 */ + { + 0x00, 0x4E, 0x01, 0x99, 0x05, 0x2D, 0x0B, 0x24, 0x14, 0x29, 0x20, 0xA4, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x00, 0x10, 0x10, 0x40, 0x12, 0xC0, 0x1D, 0xC0, 0x3B, 0x00, 0x78, 0xC0, 0xEB, 0x00 + }, + + /* GM_0_5 */ + { + 0x00, 0xEC, 0x03, 0xD7, 0x08, 0x00, 0x0D, 0x9E, 0x14, 0x3E, 0x1B, 0xDB, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x10, 0xC0, 0x16, 0xC0, 0x27, 0xC0, 0x4B, 0x80, 0x89, 0x80, 0xEB, 0x00 + }, + + /* GM_0_6 */ + { + 0x02, 0x76, 0x06, 0x66, 0x0A, 0x96, 0x0E, 0xF3, 0x13, 0xAC, 0x18, 0x49, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x12, 0x00, 0x1C, 0x00, 0x32, 0x80, 0x59, 0xC0, 0x96, 0x00, 0xEB, 0x00 + }, + + /* GM_0_7 */ + { + 0x04, 0xEC, 0x08, 0xF5, 0x0C, 0x96, 0x0F, 0xCF, 0x12, 0xC6, 0x15, 0x80, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x14, 0x00, 0x22, 0x00, 0x3C, 0xC0, 0x66, 0x40, 0x9F, 0xC0, 0xEB, 0x00 + }, + + /* GM_0_8 */ + { + 0x08, 0x00, 0x0B, 0xAE, 0x0E, 0x00, 0x10, 0x30, 0x11, 0xCB, 0x13, 0x49, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x16, 0x80, 0x28, 0xC0, 0x46, 0x80, 0x71, 0x00, 0xA7, 0x80, 0xEB, 0x00 + }, + + /* GM_0_9 */ + { + 0x0B, 0xB1, 0x0E, 0x14, 0x0F, 0x2D, 0x10, 0x18, 0x10, 0xE5, 0x11, 0x80, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x19, 0x80, 0x2F, 0x80, 0x4F, 0xC0, 0x7A, 0x00, 0xAD, 0xC0, 0xEB, 0x00 + }, + + /* GM_1_0 */ + { + 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, 0x10, 0x00, + 0x10, 0x20, 0x40, 0x60, 0x80, 0xA0, 0xEB, + 0x10, 0x00, 0x20, 0x00, 0x40, 0x00, 0x60, 0x00, 0x80, 0x00, 0xA0, 0x00, 0xEB, 0x00 + }, + + /* GM_1_1 */ + { + 0x14, 0xEC, 0x11, 0xC2, 0x10, 0x78, 0x0F, 0xB6, 0x0F, 0x2F, 0x0E, 0xB6, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x21, 0x00, 0x3C, 0xC0, 0x5F, 0xC0, 0x89, 0x00, 0xB7, 0x80, 0xEB, 0x00 + }, + + /* GM_1_2 */ + { + 0x19, 0xD8, 0x13, 0x33, 0x10, 0xD2, 0x0F, 0x6D, 0x0E, 0x5E, 0x0D, 0xA4, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x25, 0x00, 0x43, 0x00, 0x66, 0xC0, 0x8F, 0x40, 0xBB, 0x40, 0xEB, 0x00 + }, + + /* GM_1_3 */ + { + 0x1E, 0xC4, 0x14, 0x7A, 0x11, 0x0F, 0xF, 0x0C, 0x0D, 0xA1, 0x0C, 0xB6, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x29, 0x00, 0x49, 0x00, 0x6D, 0x40, 0x94, 0xC0, 0xBE, 0x80, 0xEB, 0x00 + }, + + /* GM_1_4 */ + { + 0x24, 0x00, 0x15, 0x70, 0x11, 0x0F, 0x0E, 0xAA, 0x0D, 0x0F, 0x0B, 0xDB, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x2D, 0x40, 0x4E, 0xC0, 0x73, 0x00, 0x99, 0x80, 0xC1, 0x80, 0xEB, 0x00 + }, + + /* GM_1_5 */ + { + 0x29, 0x3B, 0x16, 0x3D, 0x11, 0x0F, 0x0E, 0x30, 0x0C, 0x7D, 0x0B, 0x24, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x31, 0x80, 0x54, 0x40, 0x78, 0x80, 0x9D, 0xC0, 0xC4, 0x00, 0xEB, 0x00 + }, + + /* GM_1_6 */ + { + 0x2E, 0x27, 0x17, 0x0A, 0x10, 0xD2, 0x0D, 0xE7, 0x0B, 0xEB, 0x0A, 0x80, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x35, 0x80, 0x59, 0x80, 0x7D, 0x40, 0xA1, 0xC0, 0xC6, 0x40, 0xEB, 0x00 + }, + + /* GM_1_7 */ + { + 0x33, 0x62, 0x17, 0x5C, 0x10, 0xD2, 0x0D, 0x6D, 0x0B, 0x6D, 0x09, 0xED, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x39, 0xC0, 0x5E, 0x40, 0x82, 0x00, 0xA5, 0x40, 0xC8, 0x40, 0xEB, 0x00 + }, + + /* GM_1_8 */ + { + 0x38, 0x4E, 0x17, 0xAE, 0x10, 0xB4, 0x0D, 0x0C, 0x0A, 0xF0, 0x09, 0x6D, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x3D, 0xC0, 0x62, 0xC0, 0x86, 0x40, 0xA8, 0x80, 0xCA, 0x00, 0xEB, 0x00 + }, + + /* GM_1_9 */ + { + 0x3D, 0x3B, 0x18, 0x00, 0x10, 0x5A, 0x0C, 0xC3, 0x0A, 0x72, 0x09, 0x00, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x41, 0xC0, 0x67, 0x40, 0x8A, 0x00, 0xAB, 0x80, 0xCB, 0x80, 0xEB, 0x00 + }, + + /* GM_2_0 */ + { + 0x41, 0xD8, 0x18, 0x28, 0x10, 0x3C, 0x0C, 0x49, 0x0A, 0x1F, 0x08, 0x92, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x45, 0x80, 0x6B, 0x40, 0x8D, 0xC0, 0xAE, 0x00, 0xCD, 0x00, 0xEB, 0x00 + }, + + /* GM_2_1 */ + { + 0x46, 0x76, 0x18, 0x51, 0x0F, 0xE1, 0x0C, 0x00, 0x09, 0xB6, 0x08, 0x36, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x49, 0x40, 0x6F, 0x40, 0x91, 0x00, 0xB0, 0x80, 0xCE, 0x40, 0xEB, 0x00 + }, + + /* GM_2_2 */ + { + 0x4A, 0xC4, 0x18, 0x7A, 0x0F, 0xA5, 0x0B, 0x9E, 0x09, 0x63, 0x07, 0xDB, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x4C, 0xC0, 0x73, 0x00, 0x94, 0x40, 0xB2, 0xC0, 0xCF, 0x80, 0xEB, 0x00 + }, + + /* GM_2_3 */ + { + 0x4F, 0x13, 0x18, 0x51, 0x0F, 0x69, 0x0B, 0x6D, 0x09, 0x0F, 0x07, 0x80, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x50, 0x40, 0x76, 0x40, 0x97, 0x00, 0xB5, 0x00, 0xD0, 0xC0, 0xEB, 0x00 + }, + + /* GM_2_4 */ + { + 0x53, 0x13, 0x18, 0x7A, 0x0F, 0x0F, 0x0B, 0x24, 0x08, 0xBC, 0x07, 0x36, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x53, 0x80, 0x79, 0xC0, 0x99, 0xC0, 0xB7, 0x00, 0xD1, 0xC0, 0xEB, 0x00 + }, + + /* GM_2_5 */ + { + 0x57, 0x13, 0x18, 0x51, 0x0E, 0xF0, 0x0A, 0xC3, 0x08, 0x7D, 0x06, 0xED, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x56, 0xC0, 0x7C, 0xC0, 0x9C, 0x80, 0xB8, 0xC0, 0xD2, 0xC0, 0xEB, 0x00 + }, + + /* GM_2_6 */ + { + 0x5B, 0x13, 0x18, 0x28, 0x0E, 0x96, 0x0A, 0x92, 0x08, 0x29, 0x06, 0xB6, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x5A, 0x00, 0x7F, 0xC0, 0x9E, 0xC0, 0xBA, 0x80, 0xD3, 0x80, 0xEB, 0x00 + }, + + /* GM_2_7 */ + { + 0x5E, 0xC4, 0x18, 0x00, 0x0E, 0x78, 0x0A, 0x30, 0x08, 0x00, 0x06, 0x6D, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x5D, 0x00, 0x82, 0x80, 0xA1, 0x40, 0xBC, 0x00, 0xD4, 0x80, 0xEB, 0x00 + }, + + /* GM_2_8 */ + { + 0x62, 0x76, 0x17, 0xD7, 0x0E, 0x1E, 0x0A, 0x00, 0x07, 0xC1, 0x06, 0x36, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x60, 0x00, 0x85, 0x40, 0xA3, 0x40, 0xBD, 0x80, 0xD5, 0x40, 0xEB, 0x00 + }, + + /* GM_2_9 */ + { + 0x65, 0xD8, 0x17, 0xAE, 0x0D, 0xE1, 0x09, 0xCF, 0x07, 0x82, 0x06, 0x00, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x62, 0xC0, 0x87, 0xC0, 0xA5, 0x40, 0xBF, 0x00, 0xD6, 0x00, 0xEB, 0x00 + }, + + /* GM_3_0 */ + { + 0x69, 0x3B, 0x17, 0x85, 0x0D, 0xA5, 0x09, 0x86, 0x07, 0x43, 0x05, 0xDB, + 0x10, 0x1D, 0x36, 0x58, 0x82, 0xB3, 0xEB, + 0x10, 0x00, 0x65, 0x80, 0x8A, 0x40, 0xA7, 0x40, 0xC0, 0x40, 0xD6, 0x80, 0xEB, 0x00 + } +}; + +void __VISetTiming(u8 timing) +{ + __VIWriteI2CRegister8(0x00,timing); +} + +void __VISetYUVSEL(u8 dtvstatus) +{ + u8 vdacFlagRegion = 0; + u32 currTvMode = _SHIFTR(_viReg[1],8,2); + if(currTvMode==VI_PAL || currTvMode==VI_EURGB60) + vdacFlagRegion = 2; + else if(currTvMode==VI_MPAL) + vdacFlagRegion = 1; + + __VIWriteI2CRegister8(0x01, _SHIFTL(dtvstatus,5,3)|(vdacFlagRegion&0x1f)); +} + +void __VISetVBICtrl(u16 data) +{ + __VIWriteI2CRegister16(0x02, data); +} + +void __VISetTrapFilter(u8 disable) +{ + if (disable) + __VIWriteI2CRegister8(0x03, 0); + else + __VIWriteI2CRegister8(0x03, 1); +} + +void __VISet3in1Output(u8 enable) +{ + __VIWriteI2CRegister8(0x04,enable); +} + +void __VISetCGMS(u16 value) +{ + __VIWriteI2CRegister16(0x05, value); +} + +void __VISetWSS(u16 value) +{ + __VIWriteI2CRegister16(0x08, value); +} + +void __VISetRGBOverDrive(u8 value) +{ + u32 currTvMode = _SHIFTR(_viReg[1],8,2); + if (currTvMode == VI_DEBUG) + __VIWriteI2CRegister8(0x0A,(value<<1)|1); + else + __VIWriteI2CRegister8(0x0A,0); +} + +void __VISetOverSampling(void) +{ + __VIWriteI2CRegister8(0x65,1); +} + +void __VISetCCSEL(void) +{ + __VIWriteI2CRegister8(0x6a,1); +} + +void __VISetFilterEURGB60(u8 enable) +{ + __VIWriteI2CRegister8(0x6e, enable); +} + +void __VISetVolume(u16 value) +{ + __VIWriteI2CRegister16(0x71,value); +} + +void __VISetClosedCaption(u32 value) +{ + __VIWriteI2CRegister32(0x7a, value); +} + +void __VISetGamma(VIGamma gamma) +{ + u8 *data = (u8 *)&gamma_coeffs[gamma][0]; + __VIWriteI2CRegisterBuf(0x10, 0x21, data); +} + +/* User Configurable */ + +void VIDEO_SetGamma(VIGamma gamma) +{ + __VISetGamma(gamma); +} + +void VIDEO_SetTrapFilter(bool enable) +{ + if (enable) + __VISetTrapFilter(0); + else + __VISetTrapFilter(1); +} + +#endif diff --git a/genplus-gx/gx/utils/vi_encoder.h b/genplus-gx/gx/utils/vi_encoder.h new file mode 100644 index 0000000000..f5290dc568 --- /dev/null +++ b/genplus-gx/gx/utils/vi_encoder.h @@ -0,0 +1,79 @@ +/**************************************************************************** + * vi_encoder.c + * + * Wii Audio/Video Encoder support + * + * Copyright (C) 2009 Eke-Eke, with some code from libogc (C) Hector Martin + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ +#ifdef HW_RVL + +typedef enum +{ + VI_GM_0_1=1, + VI_GM_0_2, + VI_GM_0_3, + VI_GM_0_4, + VI_GM_0_5, + VI_GM_0_6, + VI_GM_0_7, + VI_GM_0_8, + VI_GM_0_9, + VI_GM_1_0, + VI_GM_1_1, + VI_GM_1_2, + VI_GM_1_3, + VI_GM_1_4, + VI_GM_1_5, + VI_GM_1_6, + VI_GM_1_7, + VI_GM_1_8, + VI_GM_1_9, + VI_GM_2_0, + VI_GM_2_1, + VI_GM_2_2, + VI_GM_2_3, + VI_GM_2_4, + VI_GM_2_5, + VI_GM_2_6, + VI_GM_2_7, + VI_GM_2_8, + VI_GM_2_9, + VI_GM_3_0 +} VIGamma; + +extern void VIDEO_SetGamma(VIGamma gamma); +extern void VIDEO_SetTrapFilter(bool enable); + + +#endif diff --git a/genplus-gx/libretro/jni/Android.mk b/genplus-gx/libretro/jni/Android.mk new file mode 100644 index 0000000000..4546bfa73c --- /dev/null +++ b/genplus-gx/libretro/jni/Android.mk @@ -0,0 +1,78 @@ +LOCAL_PATH := $(call my-dir) + +include $(CLEAR_VARS) + +GENPLUS_SRC_DIR := ../../core +LIBRETRO_DIR := ../ + +LOCAL_MODULE := retro + +ifeq ($(TARGET_ARCH),arm) +LOCAL_CFLAGS += -DANDROID_ARM +LOCAL_ARM_MODE := arm +endif + +LOCAL_SRC_FILES := $(GENPLUS_SRC_DIR)/genesis.c \ + $(GENPLUS_SRC_DIR)/vdp_ctrl.c \ + $(GENPLUS_SRC_DIR)/vdp_render.c \ + $(GENPLUS_SRC_DIR)/system.c \ + $(GENPLUS_SRC_DIR)/io_ctrl.c \ + $(GENPLUS_SRC_DIR)/loadrom.c \ + $(GENPLUS_SRC_DIR)/mem68k.c \ + $(GENPLUS_SRC_DIR)/state.c \ + $(GENPLUS_SRC_DIR)/memz80.c \ + $(GENPLUS_SRC_DIR)/membnk.c \ + $(GENPLUS_SRC_DIR)/input_hw/activator.c \ + $(GENPLUS_SRC_DIR)/input_hw/gamepad.c \ + $(GENPLUS_SRC_DIR)/input_hw/input.c \ + $(GENPLUS_SRC_DIR)/input_hw/lightgun.c \ + $(GENPLUS_SRC_DIR)/input_hw/mouse.c \ + $(GENPLUS_SRC_DIR)/input_hw/paddle.c \ + $(GENPLUS_SRC_DIR)/input_hw/sportspad.c \ + $(GENPLUS_SRC_DIR)/input_hw/teamplayer.c \ + $(GENPLUS_SRC_DIR)/input_hw/xe_a1p.c \ + $(GENPLUS_SRC_DIR)/input_hw/terebi_oekaki.c \ + $(GENPLUS_SRC_DIR)/cd_hw/cd_cart.c \ + $(GENPLUS_SRC_DIR)/cd_hw/cdc.c \ + $(GENPLUS_SRC_DIR)/cd_hw/cdd.c \ + $(GENPLUS_SRC_DIR)/cd_hw/gfx.c \ + $(GENPLUS_SRC_DIR)/cd_hw/pcm.c \ + $(GENPLUS_SRC_DIR)/cd_hw/scd.c \ + $(GENPLUS_SRC_DIR)/cart_hw/areplay.c \ + $(GENPLUS_SRC_DIR)/cart_hw/md_cart.c \ + $(GENPLUS_SRC_DIR)/cart_hw/sms_cart.c \ + $(GENPLUS_SRC_DIR)/cart_hw/eeprom_93c.c \ + $(GENPLUS_SRC_DIR)/cart_hw/eeprom_i2c.c \ + $(GENPLUS_SRC_DIR)/cart_hw/eeprom_spi.c \ + $(GENPLUS_SRC_DIR)/cart_hw/ggenie.c \ + $(GENPLUS_SRC_DIR)/cart_hw/sram.c \ + $(GENPLUS_SRC_DIR)/cart_hw/svp/ssp16.c \ + $(GENPLUS_SRC_DIR)/cart_hw/svp/svp.c \ + $(GENPLUS_SRC_DIR)/ntsc/md_ntsc.c \ + $(GENPLUS_SRC_DIR)/ntsc/sms_ntsc.c \ + $(GENPLUS_SRC_DIR)/sound/eq.c \ + $(GENPLUS_SRC_DIR)/sound/sound.c \ + $(GENPLUS_SRC_DIR)/sound/ym2612.c \ + $(GENPLUS_SRC_DIR)/sound/ym2413.c \ + $(GENPLUS_SRC_DIR)/sound/sn76489.c \ + $(GENPLUS_SRC_DIR)/sound/blip_buf.c \ + $(GENPLUS_SRC_DIR)/z80/z80.c \ + $(GENPLUS_SRC_DIR)/m68k/m68kcpu.c \ + $(GENPLUS_SRC_DIR)/m68k/s68kcpu.c \ + $(LIBRETRO_DIR)/libretro.c \ + $(LIBRETRO_DIR)/scrc32.c + +LOCAL_C_INCLUDES = $(LOCAL_PATH)/$(GENPLUS_SRC_DIR) \ + $(LOCAL_PATH)/$(GENPLUS_SRC_DIR)/sound \ + $(LOCAL_PATH)/$(GENPLUS_SRC_DIR)/input_hw \ + $(LOCAL_PATH)/$(GENPLUS_SRC_DIR)/cd_hw \ + $(LOCAL_PATH)/$(GENPLUS_SRC_DIR)/cart_hw \ + $(LOCAL_PATH)/$(GENPLUS_SRC_DIR)/cart_hw/svp \ + $(LOCAL_PATH)/$(GENPLUS_SRC_DIR)/m68k \ + $(LOCAL_PATH)/$(GENPLUS_SRC_DIR)/z80 \ + $(LOCAL_PATH)/$(GENPLUS_SRC_DIR)/ntsc \ + $(LOCAL_PATH)/$(LIBRETRO_DIR) + +LOCAL_CFLAGS = -ffast-math -O3 -funroll-loops -DINLINE="static inline" -DUSE_16BPP_RENDERING -DLSB_FIRST -D__LIBRETRO__ -DFRONTEND_SUPPORTS_RGB565 -DALIGN_LONG -DALIGN_WORD + +include $(BUILD_SHARED_LIBRARY) diff --git a/genplus-gx/libretro/jni/Application.mk b/genplus-gx/libretro/jni/Application.mk new file mode 100644 index 0000000000..9dcdc3c570 --- /dev/null +++ b/genplus-gx/libretro/jni/Application.mk @@ -0,0 +1 @@ +APP_ABI := all diff --git a/genplus-gx/libretro/libretro.c b/genplus-gx/libretro/libretro.c new file mode 100644 index 0000000000..67fdda7d16 --- /dev/null +++ b/genplus-gx/libretro/libretro.c @@ -0,0 +1,1005 @@ +#ifndef _MSC_VER +#include +#endif +#include +#include +#include + +#ifdef _MSC_VER +#define snprintf _snprintf +#endif + +#ifdef _XBOX1 +#include +#endif + +#include "shared.h" +#include "libretro.h" +#include "state.h" +#include "genesis.h" +#include "md_ntsc.h" +#include "sms_ntsc.h" + +sms_ntsc_t *sms_ntsc; +md_ntsc_t *md_ntsc; + +char GG_ROM[256]; +char AR_ROM[256]; +char SK_ROM[256]; +char SK_UPMEM[256]; +char GG_BIOS[256]; +char MS_BIOS_EU[256]; +char MS_BIOS_JP[256]; +char MS_BIOS_US[256]; +char CD_BIOS_EU[256]; +char CD_BIOS_US[256]; +char CD_BIOS_JP[256]; +char CD_BRAM_JP[256]; +char CD_BRAM_US[256]; +char CD_BRAM_EU[256]; +char CART_BRAM[256]; + +static int vwidth; +static int vheight; + +static uint32_t brm_crc[2]; +static uint8_t brm_format[0x40] = +{ + 0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x00,0x00,0x00,0x00,0x40, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x53,0x45,0x47,0x41,0x5f,0x43,0x44,0x5f,0x52,0x4f,0x4d,0x00,0x01,0x00,0x00,0x00, + 0x52,0x41,0x4d,0x5f,0x43,0x41,0x52,0x54,0x52,0x49,0x44,0x47,0x45,0x5f,0x5f,0x5f +}; + +static uint8_t temp[0x10000]; +static int16 soundbuffer[3068]; +static uint16_t bitmap_data_[1024 * 512]; +static const double pal_fps = 53203424.0 / (3420.0 * 313.0); +static const double ntsc_fps = 53693175.0 / (3420.0 * 262.0); + +static char g_rom_dir[1024]; + +static retro_video_refresh_t video_cb; +static retro_input_poll_t input_poll_cb; +static retro_input_state_t input_state_cb; +static retro_environment_t environ_cb; +static retro_audio_sample_batch_t audio_cb; + +/************************************ + * Genesis Plus GX implementation + ************************************/ +#define CHUNKSIZE (0x10000) + +void error(char * msg, ...) +{ +#ifndef _XBOX1 + va_list ap; + va_start(ap, msg); + vfprintf(stderr, msg, ap); + va_end(ap); +#endif +} + +int load_archive(char *filename, unsigned char *buffer, int maxsize, char *extension) +{ + int size, left; + + /* Open file */ + FILE *fd = fopen(filename, "rb"); + + if (!fd) + { + /* Master System & Game Gear BIOS are optional files */ + if (!strcmp(filename,MS_BIOS_US) || !strcmp(filename,MS_BIOS_EU) || !strcmp(filename,MS_BIOS_JP) || !strcmp(filename,GG_BIOS)) + { + return 0; + } + + /* Mega CD BIOS are required files */ + if (!strcmp(filename,CD_BIOS_US) || !strcmp(filename,CD_BIOS_EU) || !strcmp(filename,CD_BIOS_JP)) + { + fprintf(stderr, "ERROR - Unable to open CD BIOS: %s.\n", filename); + return 0; + } + + fprintf(stderr, "ERROR - Unable to open file.\n"); + return 0; + } + + /* Get file size */ + fseek(fd, 0, SEEK_END); + size = ftell(fd); + + /* size limit */ + if(size > maxsize) + { + fclose(fd); + fprintf(stderr, "ERROR - File is too large.\n"); + return 0; + } + + fprintf(stderr, "INFORMATION - Loading %d bytes ...\n", size); + + /* filename extension */ + if (extension) + { + memcpy(extension, &filename[strlen(filename) - 3], 3); + extension[3] = 0; + } + + /* Read into buffer */ + left = size; + fseek(fd, 0, SEEK_SET); + while (left > CHUNKSIZE) + { + fread(buffer, CHUNKSIZE, 1, fd); + buffer += CHUNKSIZE; + left -= CHUNKSIZE; + } + + /* Read remaining bytes */ + fread(buffer, left, 1, fd); + + /* Close file */ + fclose(fd); + + /* Return loaded ROM size */ + return size; +} + +void osd_input_update(void) +{ + int i, padnum = 0; + unsigned int temp; + + input_poll_cb(); + + for(i = 0; i < MAX_INPUTS; i++) + { + temp = 0; + switch (input.dev[i]) + { + case DEVICE_PAD6B: + { + if (input_state_cb(padnum, RETRO_DEVICE_JOYPAD, 0, RETRO_DEVICE_ID_JOYPAD_L)) + temp |= INPUT_X; + if (input_state_cb(padnum, RETRO_DEVICE_JOYPAD, 0, RETRO_DEVICE_ID_JOYPAD_X)) + temp |= INPUT_Y; + if (input_state_cb(padnum, RETRO_DEVICE_JOYPAD, 0, RETRO_DEVICE_ID_JOYPAD_R)) + temp |= INPUT_Z; + if (input_state_cb(padnum, RETRO_DEVICE_JOYPAD, 0, RETRO_DEVICE_ID_JOYPAD_SELECT)) + temp |= INPUT_MODE; + } + + case DEVICE_PAD3B: + { + if (input_state_cb(padnum, RETRO_DEVICE_JOYPAD, 0, RETRO_DEVICE_ID_JOYPAD_Y)) + temp |= INPUT_A; + } + + case DEVICE_PAD2B: + { + if (input_state_cb(padnum, RETRO_DEVICE_JOYPAD, 0, RETRO_DEVICE_ID_JOYPAD_B)) + temp |= INPUT_B; + if (input_state_cb(padnum, RETRO_DEVICE_JOYPAD, 0, RETRO_DEVICE_ID_JOYPAD_A)) + temp |= INPUT_C; + if (input_state_cb(padnum, RETRO_DEVICE_JOYPAD, 0, RETRO_DEVICE_ID_JOYPAD_START)) + temp |= INPUT_START; + if (input_state_cb(padnum, RETRO_DEVICE_JOYPAD, 0, RETRO_DEVICE_ID_JOYPAD_UP)) + temp |= INPUT_UP; + if (input_state_cb(padnum, RETRO_DEVICE_JOYPAD, 0, RETRO_DEVICE_ID_JOYPAD_DOWN)) + temp |= INPUT_DOWN; + if (input_state_cb(padnum, RETRO_DEVICE_JOYPAD, 0, RETRO_DEVICE_ID_JOYPAD_LEFT)) + temp |= INPUT_LEFT; + if (input_state_cb(padnum, RETRO_DEVICE_JOYPAD, 0, RETRO_DEVICE_ID_JOYPAD_RIGHT)) + temp |= INPUT_RIGHT; + + padnum++; + break; + } + + default: + break; + } + + input.pad[i] = temp; + } +} + +static void init_bitmap(void) +{ + memset(&bitmap, 0, sizeof(bitmap)); + bitmap.width = 1024; + bitmap.height = 512; + bitmap.pitch = 1024 * 2; + bitmap.data = (uint8_t *)bitmap_data_; + bitmap.viewport.w = 0; + bitmap.viewport.h = 0; + bitmap.viewport.x = 0; + bitmap.viewport.y = 0; +} + +static void config_default(void) +{ + int i; + + /* sound options */ + config.psg_preamp = 150; + config.fm_preamp = 100; + config.hq_fm = 1; /* high-quality resampling */ + config.psgBoostNoise = 1; + config.filter = 0; /* no filter */ + config.lp_range = 0x9999; /* 0.6 in 16.16 fixed point */ + config.low_freq = 880; + config.high_freq = 5000; + config.lg = 1.0; + config.mg = 1.0; + config.hg = 1.0; + config.dac_bits = 14; /* MAX DEPTH */ + config.ym2413 = 2; /* AUTO */ + config.mono = 0; /* STEREO output */ + + /* system options */ + config.system = 0; /* AUTO */ + config.region_detect = 0; /* AUTO */ + config.vdp_mode = 0; /* AUTO */ + config.master_clock = 0; /* AUTO */ + config.force_dtack = 0; + config.addr_error = 1; + config.bios = 0; + config.lock_on = 0; + + /* video options */ + config.overscan = 0; + config.gg_extra = 0; + config.ntsc = 0; + config.render = 0; +} + +static void bram_load(void) +{ + FILE *fp; + + /* automatically load internal backup RAM */ + switch (region_code) + { + case REGION_JAPAN_NTSC: + fp = fopen(CD_BRAM_JP, "rb"); + break; + case REGION_EUROPE: + fp = fopen(CD_BRAM_EU, "rb"); + break; + case REGION_USA: + fp = fopen(CD_BRAM_US, "rb"); + break; + default: + return; + } + + if (fp != NULL) + { + fread(scd.bram, 0x2000, 1, fp); + fclose(fp); + + /* update CRC */ + brm_crc[0] = crc32(0, scd.bram, 0x2000); + } + else + { + /* force internal backup RAM format (does not use previous region backup RAM) */ + scd.bram[0x1fff] = 0; + } + + /* check if internal backup RAM is correctly formatted */ + if (memcmp(scd.bram + 0x2000 - 0x20, brm_format + 0x20, 0x20)) + { + /* clear internal backup RAM */ + memset(scd.bram, 0x00, 0x2000 - 0x40); + + /* internal Backup RAM size fields */ + brm_format[0x10] = brm_format[0x12] = brm_format[0x14] = brm_format[0x16] = 0x00; + brm_format[0x11] = brm_format[0x13] = brm_format[0x15] = brm_format[0x17] = (sizeof(scd.bram) / 64) - 3; + + /* format internal backup RAM */ + memcpy(scd.bram + 0x2000 - 0x40, brm_format, 0x40); + + /* clear CRC to force file saving (in case previous region backup RAM was also formatted) */ + brm_crc[0] = 0; + } + + /* automatically load cartridge backup RAM (if enabled) */ + if (scd.cartridge.id) + { + fp = fopen(CART_BRAM, "rb"); + if (fp != NULL) + { + int filesize = scd.cartridge.mask + 1; + int done = 0; + + /* Read into buffer (2k blocks) */ + while (filesize > CHUNKSIZE) + { + fread(scd.cartridge.area + done, CHUNKSIZE, 1, fp); + done += CHUNKSIZE; + filesize -= CHUNKSIZE; + } + + /* Read remaining bytes */ + if (filesize) + { + fread(scd.cartridge.area + done, filesize, 1, fp); + } + + /* close file */ + fclose(fp); + + /* update CRC */ + brm_crc[1] = crc32(0, scd.cartridge.area, scd.cartridge.mask + 1); + } + + /* check if cartridge backup RAM is correctly formatted */ + if (memcmp(scd.cartridge.area + scd.cartridge.mask + 1 - 0x20, brm_format + 0x20, 0x20)) + { + /* clear cartridge backup RAM */ + memset(scd.cartridge.area, 0x00, scd.cartridge.mask + 1); + + /* Cartridge Backup RAM size fields */ + brm_format[0x10] = brm_format[0x12] = brm_format[0x14] = brm_format[0x16] = (((scd.cartridge.mask + 1) / 64) - 3) >> 8; + brm_format[0x11] = brm_format[0x13] = brm_format[0x15] = brm_format[0x17] = (((scd.cartridge.mask + 1) / 64) - 3) & 0xff; + + /* format cartridge backup RAM */ + memcpy(scd.cartridge.area + scd.cartridge.mask + 1 - 0x40, brm_format, 0x40); + } + } +} + +static void bram_save(void) +{ + FILE *fp; + + /* verify that internal backup RAM has been modified */ + if (crc32(0, scd.bram, 0x2000) != brm_crc[0]) + { + /* check if it is correctly formatted before saving */ + if (!memcmp(scd.bram + 0x2000 - 0x20, brm_format + 0x20, 0x20)) + { + switch (region_code) + { + case REGION_JAPAN_NTSC: + fp = fopen(CD_BRAM_JP, "wb"); + break; + case REGION_EUROPE: + fp = fopen(CD_BRAM_EU, "wb"); + break; + case REGION_USA: + fp = fopen(CD_BRAM_US, "wb"); + break; + default: + return; + } + + if (fp != NULL) + { + fwrite(scd.bram, 0x2000, 1, fp); + fclose(fp); + + /* update CRC */ + brm_crc[0] = crc32(0, scd.bram, 0x2000); + } + } + } + + /* verify that cartridge backup RAM has been modified */ + if (scd.cartridge.id && (crc32(0, scd.cartridge.area, scd.cartridge.mask + 1) != brm_crc[1])) + { + /* check if it is correctly formatted before saving */ + if (!memcmp(scd.cartridge.area + scd.cartridge.mask + 1 - 0x20, brm_format + 0x20, 0x20)) + { + fp = fopen(CART_BRAM, "wb"); + if (fp != NULL) + { + int filesize = scd.cartridge.mask + 1; + int done = 0; + + /* Write to file (2k blocks) */ + while (filesize > CHUNKSIZE) + { + fwrite(scd.cartridge.area + done, CHUNKSIZE, 1, fp); + done += CHUNKSIZE; + filesize -= CHUNKSIZE; + } + + /* Write remaining bytes */ + if (filesize) + { + fwrite(scd.cartridge.area + done, filesize, 1, fp); + } + + /* Close file */ + fclose(fp); + + /* update CRC */ + brm_crc[1] = crc32(0, scd.cartridge.area, scd.cartridge.mask + 1); + } + } + } +} + +static void extract_directory(char *buf, const char *path, size_t size) +{ + char *base; + strncpy(buf, path, size - 1); + buf[size - 1] = '\0'; + + base = strrchr(buf, '/'); + if (!base) + base = strrchr(buf, '\\'); + + if (base) + *base = '\0'; + else + buf[0] = '\0'; +} + +static void update_viewport(void) +{ + vwidth = bitmap.viewport.w + (bitmap.viewport.x * 2); + vheight = bitmap.viewport.h + (bitmap.viewport.y * 2); + + if (config.ntsc) + { + if (reg[12] & 1) + vwidth = MD_NTSC_OUT_WIDTH(vwidth); + else + vwidth = SMS_NTSC_OUT_WIDTH(vwidth); + } + + if (config.render && interlaced) + { + vheight = vheight * 2; + } +} + +static void check_variables(void) +{ + unsigned orig_value; + bool update_viewports = false; + bool reinit = false; + struct retro_variable var = {0}; + + var.key = "system_hw"; + environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE, &var); + { + orig_value = config.system; + if (!strcmp(var.value, "sg-1000")) + config.system = SYSTEM_SG; + else if (!strcmp(var.value, "mark-III")) + config.system = SYSTEM_MARKIII; + else if (!strcmp(var.value, "master system")) + config.system = SYSTEM_SMS; + else if (!strcmp(var.value, "master system II")) + config.system = SYSTEM_SMS2; + else if (!strcmp(var.value, "game gear")) + config.system = SYSTEM_GG; + else if (!strcmp(var.value, "mega drive / genesis")) + config.system = SYSTEM_MD; + else + config.system = 0; + + if (orig_value != config.system) + { + if (system_hw) + { + switch (config.system) + { + case 0: + system_hw = romtype; /* AUTO */ + break; + + case SYSTEM_MD: + system_hw = (romtype & SYSTEM_MD) ? romtype : SYSTEM_PBC; + break; + + case SYSTEM_GG: + system_hw = (romtype == SYSTEM_GG) ? SYSTEM_GG : SYSTEM_GGMS; + break; + + default: + system_hw = config.system; + break; + } + + reinit = true; + } + } + } + + var.key = "region_detect"; + environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE, &var); + { + orig_value = config.region_detect; + if (!strcmp(var.value, "ntsc-u")) + config.region_detect = 1; + else if (!strcmp(var.value, "pal")) + config.region_detect = 2; + else if (!strcmp(var.value, "ntsc-j")) + config.region_detect = 3; + else + config.region_detect = 0; + + if (orig_value != config.region_detect) + { + if (system_hw) + { + get_region(NULL); + reinit = true; + } + } + } + + var.key = "force_dtack"; + environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE, &var); + { + if (!strcmp(var.value, "enabled")) + config.force_dtack = 1; + else + config.force_dtack = 0; + } + + var.key = "addr_error"; + environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE, &var); + { + if (!strcmp(var.value, "enabled")) + m68k.aerr_enabled = config.addr_error = 1; + else + m68k.aerr_enabled = config.addr_error = 0; + } + + var.key = "lock_on"; + environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE, &var); + { + orig_value = config.lock_on; + if (!strcmp(var.value, "game genie")) + config.lock_on = TYPE_GG; + else if (!strcmp(var.value, "action replay (pro)")) + config.lock_on = TYPE_AR; + else if (!strcmp(var.value, "sonic & knuckles")) + config.lock_on = TYPE_SK; + else + config.lock_on = 0; + + if (orig_value != config.lock_on) + { + if (system_hw == SYSTEM_MD) + reinit = true; + } + } + + var.key = "ym2413"; + environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE, &var); + { + orig_value = config.ym2413; + if (!strcmp(var.value, "enabled")) + config.ym2413 = 1; + else if (!strcmp(var.value, "disabled")) + config.ym2413 = 0; + else + config.ym2413 = 2; + + if (orig_value != config.ym2413) + { + if (system_hw && (config.ym2413 & 2) && ((system_hw & SYSTEM_PBC) != SYSTEM_MD)) + { + memcpy(temp, sram.sram, sizeof(temp)); + sms_cart_init(); + memcpy(sram.sram, temp, sizeof(temp)); + } + } + } + + var.key = "dac_bits"; + environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE, &var); + { + if (!strcmp(var.value, "enabled")) + config.dac_bits = 9; + else + config.dac_bits = 14; + + YM2612Config(config.dac_bits); + } + + var.key = "blargg_ntsc_filter"; + environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE, &var); + { + orig_value = config.ntsc; + + if (strcmp(var.value, "disabled") == 0) + config.ntsc = 0; + else if (strcmp(var.value, "monochrome") == 0) + { + config.ntsc = 1; + sms_ntsc_init(sms_ntsc, &sms_ntsc_monochrome); + md_ntsc_init(md_ntsc, &md_ntsc_monochrome); + } + else if (strcmp(var.value, "composite") == 0) + { + config.ntsc = 1; + sms_ntsc_init(sms_ntsc, &sms_ntsc_composite); + md_ntsc_init(md_ntsc, &md_ntsc_composite); + } + else if (strcmp(var.value, "svideo") == 0) + { + config.ntsc = 1; + sms_ntsc_init(sms_ntsc, &sms_ntsc_svideo); + md_ntsc_init(md_ntsc, &md_ntsc_svideo); + } + else if (strcmp(var.value, "rgb") == 0) + { + config.ntsc = 1; + sms_ntsc_init(sms_ntsc, &sms_ntsc_rgb); + md_ntsc_init(md_ntsc, &md_ntsc_rgb); + } + + if (orig_value != config.ntsc) + update_viewports = true; + } + + var.key = "overscan"; + environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE, &var); + { + orig_value = config.overscan; + if (strcmp(var.value, "disabled") == 0) + config.overscan = 0; + else if (strcmp(var.value, "top/bottom") == 0) + config.overscan = 1; + else if (strcmp(var.value, "left/right") == 0) + config.overscan = 2; + else if (strcmp(var.value, "full") == 0) + config.overscan = 3; + if (orig_value != config.overscan) + update_viewports = true; + } + + var.key = "gg_extra"; + environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE, &var); + { + orig_value = config.gg_extra; + if (strcmp(var.value, "disabled") == 0) + config.gg_extra = 0; + else if (strcmp(var.value, "enabled") == 0) + config.gg_extra = 1; + if (orig_value != config.gg_extra) + update_viewports = true; + } + + var.key = "render"; + environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE, &var); + { + orig_value = config.render; + if (strcmp(var.value, "normal") == 0) + config.render = 0; + else + config.render = 1; + if (orig_value != config.render) + update_viewports = true; + } + + if (reinit) + { + audio_init(44100, snd.frame_rate); + memcpy(temp, sram.sram, sizeof(temp)); + system_init(); + system_reset(); + memcpy(sram.sram, temp, sizeof(temp)); + } + + if (update_viewports) + { + bitmap.viewport.changed = 3; + if ((system_hw == SYSTEM_GG) && !config.gg_extra) + bitmap.viewport.x = (config.overscan & 2) ? 14 : -48; + else + bitmap.viewport.x = (config.overscan & 2) * 7; + } +} + +static void configure_controls(void) +{ + int i; + struct retro_variable var; + + input.system[0] = SYSTEM_MD_GAMEPAD; + input.system[1] = SYSTEM_MD_GAMEPAD; + + var.key = "padtype"; + environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE, &var); + if (!strcmp(var.value, "6-buttons")) + for(i = 0; i < MAX_INPUTS; i++) + config.input[i].padtype = DEVICE_PAD6B; + else if (!strcmp(var.value, "3-buttons")) + for(i = 0; i < MAX_INPUTS; i++) + config.input[i].padtype = DEVICE_PAD3B; + else if (!strcmp(var.value, "2-buttons")) + for(i = 0; i < MAX_INPUTS; i++) + config.input[i].padtype = DEVICE_PAD2B; + else if ((system_hw & SYSTEM_PBC) != SYSTEM_MD) + for(i = 0; i < MAX_INPUTS; i++) + config.input[i].padtype = DEVICE_PAD2B; + else if (rominfo.peripherals & 2) + for(i = 0; i < MAX_INPUTS; i++) + config.input[i].padtype = DEVICE_PAD6B; + else + for(i = 0; i < MAX_INPUTS; i++) + config.input[i].padtype = DEVICE_PAD3B; + + var.key = "multitap"; + environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE, &var); + if (!strcmp(var.value, "4-wayplay")) + input.system[0] = input.system[1] = SYSTEM_WAYPLAY; + else if (!strcmp(var.value, "teamplayer 1")) + input.system[0] = SYSTEM_TEAMPLAYER; + else if (!strcmp(var.value, "teamplayer 2")) + input.system[1] = SYSTEM_TEAMPLAYER; + else if (!strcmp(var.value, "teamplayer 1&2")) + input.system[0] = input.system[1] = SYSTEM_TEAMPLAYER; + + var.key = "portb"; + environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE, &var); + if (!strcmp(var.value, "disabled")) + input.system[1] = NO_SYSTEM; + + input_init(); +} + +/************************************ + * libretro implementation + ************************************/ +unsigned retro_api_version(void) { return RETRO_API_VERSION; } + +void retro_set_environment(retro_environment_t cb) +{ + static const struct retro_variable vars[] = { + { "system_hw", "System hardware; auto|sg-1000|mark-III|master system|master system II|game gear|mega drive / genesis" }, + { "region_detect", "System region; auto|ntsc-u|pal|ntsc-j" }, + { "force_dtack", "System lockups; enabled|disabled" }, + { "addr_error", "68k address error; enabled|disabled" }, + { "lock_on", "Cartridge lock-on; disabled|game genie|action replay (pro)|sonic & knuckles" }, + { "padtype", "Gamepad type; auto|6-buttons|3-buttons|2-buttons" }, + { "multitap", "Multi Tap; disabled|4-wayplay|teamplayer (port 1)|teamplayer (port 2)|teamplayer (both)" }, + { "portb", "Control Port 2; enabled|disabled" }, + { "ym2413", "Master System FM; auto|disabled|enabled" }, + { "dac_bits", "YM2612 DAC quantization; disabled|enabled" }, + { "blargg_ntsc_filter", "Blargg NTSC filter; disabled|monochrome|composite|svideo|rgb" }, + { "overscan", "Borders; disabled|top/bottom|left/right|full" }, + { "gg_extra", "Game Gear extended screen; disabled|enabled" }, + { "render", "Interlaced mode resolution; normal|double" }, + { NULL, NULL }, + }; + + environ_cb = cb; + cb(RETRO_ENVIRONMENT_SET_VARIABLES, (void*)vars); +} + +void retro_set_video_refresh(retro_video_refresh_t cb) { video_cb = cb; } +void retro_set_audio_sample(retro_audio_sample_t cb) { (void)cb; } +void retro_set_audio_sample_batch(retro_audio_sample_batch_t cb) { audio_cb = cb; } +void retro_set_input_poll(retro_input_poll_t cb) { input_poll_cb = cb; } +void retro_set_input_state(retro_input_state_t cb) { input_state_cb = cb; } + +void retro_get_system_info(struct retro_system_info *info) +{ + info->library_name = "Genesis Plus GX"; + info->library_version = "v1.7.4"; + info->valid_extensions = "mdx|md|smd|gen|bin|cue|iso|sms|gg|sg"; + info->block_extract = false; + info->need_fullpath = true; +} + +void retro_get_system_av_info(struct retro_system_av_info *info) +{ + info->geometry.base_width = vwidth; + info->geometry.base_height = vheight; + info->geometry.max_width = 1024; + info->geometry.max_height = 512; + info->geometry.aspect_ratio = 4.0 / 3.0; + info->timing.fps = snd.frame_rate; + info->timing.sample_rate = 44100; +} + +void retro_set_controller_port_device(unsigned port, unsigned device) +{ + (void)port; + (void)device; +} + +size_t retro_serialize_size(void) { return STATE_SIZE; } + +bool retro_serialize(void *data, size_t size) +{ + if (size != STATE_SIZE) + return FALSE; + + state_save(data); + + return TRUE; +} + +bool retro_unserialize(const void *data, size_t size) +{ + if (size != STATE_SIZE) + return FALSE; + + if (!state_load((uint8_t*)data)) + return FALSE; + + return TRUE; +} + +void retro_cheat_reset(void) {} +void retro_cheat_set(unsigned index, bool enabled, const char *code) +{ + (void)index; + (void)enabled; + (void)code; +} + +bool retro_load_game(const struct retro_game_info *info) +{ + int i; + const char *dir; +#if defined(_WIN32) + char slash = '\\'; +#else + char slash = '/'; +#endif + + extract_directory(g_rom_dir, info->path, sizeof(g_rom_dir)); + + if (!environ_cb(RETRO_ENVIRONMENT_GET_SYSTEM_DIRECTORY, &dir) || !dir) + { + fprintf(stderr, "[genplus]: Defaulting system directory to %s.\n", g_rom_dir); + dir = g_rom_dir; + } + + snprintf(GG_ROM, sizeof(GG_ROM), "%s%cggenie.bin", dir, slash); + snprintf(AR_ROM, sizeof(AR_ROM), "%s%careplay.bin", dir, slash); + snprintf(SK_ROM, sizeof(SK_ROM), "%s%csk.bin", dir, slash); + snprintf(SK_UPMEM, sizeof(SK_UPMEM), "%s%cs2k.bin", dir, slash); + snprintf(CD_BIOS_EU, sizeof(CD_BIOS_EU), "%s%cbios_CD_E.bin", dir, slash); + snprintf(CD_BIOS_US, sizeof(CD_BIOS_US), "%s%cbios_CD_U.bin", dir, slash); + snprintf(CD_BIOS_JP, sizeof(CD_BIOS_JP), "%s%cbios_CD_J.bin", dir, slash); + snprintf(CD_BRAM_EU, sizeof(CD_BRAM_EU), "%s%cscd_E.brm", dir, slash); + snprintf(CD_BRAM_US, sizeof(CD_BRAM_US), "%s%cscd_U.brm", dir, slash); + snprintf(CD_BRAM_JP, sizeof(CD_BRAM_JP), "%s%cscd_J.brm", dir, slash); + snprintf(CART_BRAM, sizeof(CART_BRAM), "%s%ccart.brm", dir, slash); + fprintf(stderr, "Game Genie ROM should be located at: %s\n", GG_ROM); + fprintf(stderr, "Action Replay (Pro) ROM should be located at: %s\n", AR_ROM); + fprintf(stderr, "Sonic & Knuckles (2 MB) ROM should be located at: %s\n", SK_ROM); + fprintf(stderr, "Sonic & Knuckles UPMEM (256 KB) ROM should be located at: %s\n", SK_UPMEM); + fprintf(stderr, "Mega CD PAL BIOS should be located at: %s\n", CD_BIOS_EU); + fprintf(stderr, "Sega CD NTSC-U BIOS should be located at: %s\n", CD_BIOS_US); + fprintf(stderr, "Mega CD NTSC-J BIOS should be located at: %s\n", CD_BIOS_JP); + fprintf(stderr, "Mega CD PAL BRAM is located at: %s\n", CD_BRAM_EU); + fprintf(stderr, "Sega CD NTSC-U BRAM is located at: %s\n", CD_BRAM_US); + fprintf(stderr, "Mega CD NTSC-J BRAM is located at: %s\n", CD_BRAM_JP); + fprintf(stderr, "Mega CD RAM CART is located at: %s\n", CART_BRAM); + + check_variables(); + if (!load_rom((char *)info->path)) + return false; + + configure_controls(); + + audio_init(44100, vdp_pal ? pal_fps : ntsc_fps); + system_init(); + system_reset(); + + if (system_hw == SYSTEM_MCD) + bram_load(); + + update_viewport(); + + return true; +} + +bool retro_load_game_special(unsigned game_type, const struct retro_game_info *info, size_t num_info) +{ + (void)game_type; + (void)info; + (void)num_info; + return FALSE; +} + +void retro_unload_game(void) +{ + if (system_hw == SYSTEM_MCD) + bram_save(); +} + +unsigned retro_get_region(void) { return vdp_pal ? RETRO_REGION_PAL : RETRO_REGION_NTSC; } + +void *retro_get_memory_data(unsigned id) +{ + if (!sram.on) + return NULL; + + switch (id) + { + case RETRO_MEMORY_SAVE_RAM: + return sram.sram; + + default: + return NULL; + } +} + +size_t retro_get_memory_size(unsigned id) +{ + if (!sram.on) + return 0; + + switch (id) + { + case RETRO_MEMORY_SAVE_RAM: + return 0x10000; + + default: + return 0; + } +} + +void retro_init(void) +{ + unsigned level, rgb565; + sms_ntsc = calloc(1, sizeof(sms_ntsc_t)); + md_ntsc = calloc(1, sizeof(md_ntsc_t)); + + init_bitmap(); + config_default(); + + level = 1; + environ_cb(RETRO_ENVIRONMENT_SET_PERFORMANCE_LEVEL, &level); + +#ifdef FRONTEND_SUPPORTS_RGB565 + rgb565 = RETRO_PIXEL_FORMAT_RGB565; + if(environ_cb(RETRO_ENVIRONMENT_SET_PIXEL_FORMAT, &rgb565)) + fprintf(stderr, "Frontend supports RGB565 - will use that instead of XRGB1555.\n"); +#endif +} + +void retro_deinit(void) +{ + audio_shutdown(); + free(md_ntsc); + free(sms_ntsc); +} + +void retro_reset(void) { system_reset(); } + +void retro_run(void) +{ + bool updated = false; + + if (system_hw == SYSTEM_MCD) + system_frame_scd(0); + else if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + system_frame_gen(0); + else + system_frame_sms(0); + + if (bitmap.viewport.changed & 1) + { + bitmap.viewport.changed &= ~1; + update_viewport(); + } + + video_cb(bitmap.data, vwidth, vheight, 1024 * 2); + audio_cb(soundbuffer, audio_update(soundbuffer)); + + environ_cb(RETRO_ENVIRONMENT_GET_VARIABLE_UPDATE, &updated); + if (updated) + { + check_variables(); + configure_controls(); + } +} diff --git a/genplus-gx/libretro/libretro.h b/genplus-gx/libretro/libretro.h new file mode 100644 index 0000000000..8a29f05ff4 --- /dev/null +++ b/genplus-gx/libretro/libretro.h @@ -0,0 +1,758 @@ +#ifndef LIBRETRO_H__ +#define LIBRETRO_H__ + +#include +#include +#include + +// Hack applied for MSVC when compiling in C89 mode as it isn't C99 compliant. +#ifdef __cplusplus +extern "C" { +#else +#if defined(_MSC_VER) && !defined(SN_TARGET_PS3) && !defined(__cplusplus) +#define bool unsigned char +#define true 1 +#define false 0 +#else +#include +#endif +#endif + +// Used for checking API/ABI mismatches that can break libretro implementations. +// It is not incremented for compatible changes to the API. +#define RETRO_API_VERSION 1 + +// Libretro's fundamental device abstractions. +#define RETRO_DEVICE_MASK 0xff +#define RETRO_DEVICE_NONE 0 + +// The JOYPAD is called RetroPad. It is essentially a Super Nintendo controller, +// but with additional L2/R2/L3/R3 buttons, similar to a PS1 DualShock. +#define RETRO_DEVICE_JOYPAD 1 + +// The mouse is a simple mouse, similar to Super Nintendo's mouse. +// X and Y coordinates are reported relatively to last poll (poll callback). +// It is up to the libretro implementation to keep track of where the mouse pointer is supposed to be on the screen. +// The frontend must make sure not to interfere with its own hardware mouse pointer. +#define RETRO_DEVICE_MOUSE 2 + +// KEYBOARD device lets one poll for raw key pressed. +// It is poll based, so input callback will return with the current pressed state. +#define RETRO_DEVICE_KEYBOARD 3 + +// Lightgun X/Y coordinates are reported relatively to last poll, similar to mouse. +#define RETRO_DEVICE_LIGHTGUN 4 + +// The ANALOG device is an extension to JOYPAD (RetroPad). +// Similar to DualShock it adds two analog sticks. +// This is treated as a separate device type as it returns values in the full analog range +// of [-0x8000, 0x7fff]. Positive X axis is right. Positive Y axis is down. +// Only use ANALOG type when polling for analog values of the axes. +#define RETRO_DEVICE_ANALOG 5 + +// Abstracts the concept of a pointing mechanism, e.g. touch. +// This allows libretro to query in absolute coordinates where on the screen a mouse (or something similar) is being placed. +// For a touch centric device, coordinates reported are the coordinates of the press. +// +// Coordinates in X and Y are reported as: +// [-0x7fff, 0x7fff]: -0x7fff corresponds to the far left/top of the screen, +// and 0x7fff corresponds to the far right/bottom of the screen. +// The "screen" is here defined as area that is passed to the frontend and later displayed on the monitor. +// The frontend is free to scale/resize this screen as it sees fit, however, +// (X, Y) = (-0x7fff, -0x7fff) will correspond to the top-left pixel of the game image, etc. +// +// To check if the pointer coordinates are valid (e.g. a touch display actually being touched), +// PRESSED returns 1 or 0. +// If using a mouse, PRESSED will usually correspond to the left mouse button. +// PRESSED will only return 1 if the pointer is inside the game screen. +// +// For multi-touch, the index variable can be used to successively query more presses. +// If index = 0 returns true for _PRESSED, coordinates can be extracted +// with _X, _Y for index = 0. One can then query _PRESSED, _X, _Y with index = 1, and so on. +// Eventually _PRESSED will return false for an index. No further presses are registered at this point. +#define RETRO_DEVICE_POINTER 6 + +// These device types are specializations of the base types above. +// They should only be used in retro_set_controller_type() to inform libretro implementations +// about use of a very specific device type. +// +// In input state callback, however, only the base type should be used in the 'device' field. +#define RETRO_DEVICE_JOYPAD_MULTITAP ((1 << 8) | RETRO_DEVICE_JOYPAD) +#define RETRO_DEVICE_LIGHTGUN_SUPER_SCOPE ((1 << 8) | RETRO_DEVICE_LIGHTGUN) +#define RETRO_DEVICE_LIGHTGUN_JUSTIFIER ((2 << 8) | RETRO_DEVICE_LIGHTGUN) +#define RETRO_DEVICE_LIGHTGUN_JUSTIFIERS ((3 << 8) | RETRO_DEVICE_LIGHTGUN) + +// Buttons for the RetroPad (JOYPAD). +// The placement of these is equivalent to placements on the Super Nintendo controller. +// L2/R2/L3/R3 buttons correspond to the PS1 DualShock. +#define RETRO_DEVICE_ID_JOYPAD_B 0 +#define RETRO_DEVICE_ID_JOYPAD_Y 1 +#define RETRO_DEVICE_ID_JOYPAD_SELECT 2 +#define RETRO_DEVICE_ID_JOYPAD_START 3 +#define RETRO_DEVICE_ID_JOYPAD_UP 4 +#define RETRO_DEVICE_ID_JOYPAD_DOWN 5 +#define RETRO_DEVICE_ID_JOYPAD_LEFT 6 +#define RETRO_DEVICE_ID_JOYPAD_RIGHT 7 +#define RETRO_DEVICE_ID_JOYPAD_A 8 +#define RETRO_DEVICE_ID_JOYPAD_X 9 +#define RETRO_DEVICE_ID_JOYPAD_L 10 +#define RETRO_DEVICE_ID_JOYPAD_R 11 +#define RETRO_DEVICE_ID_JOYPAD_L2 12 +#define RETRO_DEVICE_ID_JOYPAD_R2 13 +#define RETRO_DEVICE_ID_JOYPAD_L3 14 +#define RETRO_DEVICE_ID_JOYPAD_R3 15 + +// Index / Id values for ANALOG device. +#define RETRO_DEVICE_INDEX_ANALOG_LEFT 0 +#define RETRO_DEVICE_INDEX_ANALOG_RIGHT 1 +#define RETRO_DEVICE_ID_ANALOG_X 0 +#define RETRO_DEVICE_ID_ANALOG_Y 1 + +// Id values for MOUSE. +#define RETRO_DEVICE_ID_MOUSE_X 0 +#define RETRO_DEVICE_ID_MOUSE_Y 1 +#define RETRO_DEVICE_ID_MOUSE_LEFT 2 +#define RETRO_DEVICE_ID_MOUSE_RIGHT 3 + +// Id values for LIGHTGUN types. +#define RETRO_DEVICE_ID_LIGHTGUN_X 0 +#define RETRO_DEVICE_ID_LIGHTGUN_Y 1 +#define RETRO_DEVICE_ID_LIGHTGUN_TRIGGER 2 +#define RETRO_DEVICE_ID_LIGHTGUN_CURSOR 3 +#define RETRO_DEVICE_ID_LIGHTGUN_TURBO 4 +#define RETRO_DEVICE_ID_LIGHTGUN_PAUSE 5 +#define RETRO_DEVICE_ID_LIGHTGUN_START 6 + +// Id values for POINTER. +#define RETRO_DEVICE_ID_POINTER_X 0 +#define RETRO_DEVICE_ID_POINTER_Y 1 +#define RETRO_DEVICE_ID_POINTER_PRESSED 2 + +// Returned from retro_get_region(). +#define RETRO_REGION_NTSC 0 +#define RETRO_REGION_PAL 1 + +// Passed to retro_get_memory_data/size(). +// If the memory type doesn't apply to the implementation NULL/0 can be returned. +#define RETRO_MEMORY_MASK 0xff + +// Regular save ram. This ram is usually found on a game cartridge, backed up by a battery. +// If save game data is too complex for a single memory buffer, +// the SYSTEM_DIRECTORY environment callback can be used. +#define RETRO_MEMORY_SAVE_RAM 0 + +// Some games have a built-in clock to keep track of time. +// This memory is usually just a couple of bytes to keep track of time. +#define RETRO_MEMORY_RTC 1 + +// System ram lets a frontend peek into a game systems main RAM. +#define RETRO_MEMORY_SYSTEM_RAM 2 + +// Video ram lets a frontend peek into a game systems video RAM (VRAM). +#define RETRO_MEMORY_VIDEO_RAM 3 + +// Special memory types. +#define RETRO_MEMORY_SNES_BSX_RAM ((1 << 8) | RETRO_MEMORY_SAVE_RAM) +#define RETRO_MEMORY_SNES_BSX_PRAM ((2 << 8) | RETRO_MEMORY_SAVE_RAM) +#define RETRO_MEMORY_SNES_SUFAMI_TURBO_A_RAM ((3 << 8) | RETRO_MEMORY_SAVE_RAM) +#define RETRO_MEMORY_SNES_SUFAMI_TURBO_B_RAM ((4 << 8) | RETRO_MEMORY_SAVE_RAM) +#define RETRO_MEMORY_SNES_GAME_BOY_RAM ((5 << 8) | RETRO_MEMORY_SAVE_RAM) +#define RETRO_MEMORY_SNES_GAME_BOY_RTC ((6 << 8) | RETRO_MEMORY_RTC) + +// Special game types passed into retro_load_game_special(). +// Only used when multiple ROMs are required. +#define RETRO_GAME_TYPE_BSX 0x101 +#define RETRO_GAME_TYPE_BSX_SLOTTED 0x102 +#define RETRO_GAME_TYPE_SUFAMI_TURBO 0x103 +#define RETRO_GAME_TYPE_SUPER_GAME_BOY 0x104 + +// Keysyms used for ID in input state callback when polling RETRO_KEYBOARD. +enum retro_key +{ + RETROK_UNKNOWN = 0, + RETROK_FIRST = 0, + RETROK_BACKSPACE = 8, + RETROK_TAB = 9, + RETROK_CLEAR = 12, + RETROK_RETURN = 13, + RETROK_PAUSE = 19, + RETROK_ESCAPE = 27, + RETROK_SPACE = 32, + RETROK_EXCLAIM = 33, + RETROK_QUOTEDBL = 34, + RETROK_HASH = 35, + RETROK_DOLLAR = 36, + RETROK_AMPERSAND = 38, + RETROK_QUOTE = 39, + RETROK_LEFTPAREN = 40, + RETROK_RIGHTPAREN = 41, + RETROK_ASTERISK = 42, + RETROK_PLUS = 43, + RETROK_COMMA = 44, + RETROK_MINUS = 45, + RETROK_PERIOD = 46, + RETROK_SLASH = 47, + RETROK_0 = 48, + RETROK_1 = 49, + RETROK_2 = 50, + RETROK_3 = 51, + RETROK_4 = 52, + RETROK_5 = 53, + RETROK_6 = 54, + RETROK_7 = 55, + RETROK_8 = 56, + RETROK_9 = 57, + RETROK_COLON = 58, + RETROK_SEMICOLON = 59, + RETROK_LESS = 60, + RETROK_EQUALS = 61, + RETROK_GREATER = 62, + RETROK_QUESTION = 63, + RETROK_AT = 64, + RETROK_LEFTBRACKET = 91, + RETROK_BACKSLASH = 92, + RETROK_RIGHTBRACKET = 93, + RETROK_CARET = 94, + RETROK_UNDERSCORE = 95, + RETROK_BACKQUOTE = 96, + RETROK_a = 97, + RETROK_b = 98, + RETROK_c = 99, + RETROK_d = 100, + RETROK_e = 101, + RETROK_f = 102, + RETROK_g = 103, + RETROK_h = 104, + RETROK_i = 105, + RETROK_j = 106, + RETROK_k = 107, + RETROK_l = 108, + RETROK_m = 109, + RETROK_n = 110, + RETROK_o = 111, + RETROK_p = 112, + RETROK_q = 113, + RETROK_r = 114, + RETROK_s = 115, + RETROK_t = 116, + RETROK_u = 117, + RETROK_v = 118, + RETROK_w = 119, + RETROK_x = 120, + RETROK_y = 121, + RETROK_z = 122, + RETROK_DELETE = 127, + + RETROK_KP0 = 256, + RETROK_KP1 = 257, + RETROK_KP2 = 258, + RETROK_KP3 = 259, + RETROK_KP4 = 260, + RETROK_KP5 = 261, + RETROK_KP6 = 262, + RETROK_KP7 = 263, + RETROK_KP8 = 264, + RETROK_KP9 = 265, + RETROK_KP_PERIOD = 266, + RETROK_KP_DIVIDE = 267, + RETROK_KP_MULTIPLY = 268, + RETROK_KP_MINUS = 269, + RETROK_KP_PLUS = 270, + RETROK_KP_ENTER = 271, + RETROK_KP_EQUALS = 272, + + RETROK_UP = 273, + RETROK_DOWN = 274, + RETROK_RIGHT = 275, + RETROK_LEFT = 276, + RETROK_INSERT = 277, + RETROK_HOME = 278, + RETROK_END = 279, + RETROK_PAGEUP = 280, + RETROK_PAGEDOWN = 281, + + RETROK_F1 = 282, + RETROK_F2 = 283, + RETROK_F3 = 284, + RETROK_F4 = 285, + RETROK_F5 = 286, + RETROK_F6 = 287, + RETROK_F7 = 288, + RETROK_F8 = 289, + RETROK_F9 = 290, + RETROK_F10 = 291, + RETROK_F11 = 292, + RETROK_F12 = 293, + RETROK_F13 = 294, + RETROK_F14 = 295, + RETROK_F15 = 296, + + RETROK_NUMLOCK = 300, + RETROK_CAPSLOCK = 301, + RETROK_SCROLLOCK = 302, + RETROK_RSHIFT = 303, + RETROK_LSHIFT = 304, + RETROK_RCTRL = 305, + RETROK_LCTRL = 306, + RETROK_RALT = 307, + RETROK_LALT = 308, + RETROK_RMETA = 309, + RETROK_LMETA = 310, + RETROK_LSUPER = 311, + RETROK_RSUPER = 312, + RETROK_MODE = 313, + RETROK_COMPOSE = 314, + + RETROK_HELP = 315, + RETROK_PRINT = 316, + RETROK_SYSREQ = 317, + RETROK_BREAK = 318, + RETROK_MENU = 319, + RETROK_POWER = 320, + RETROK_EURO = 321, + RETROK_UNDO = 322, + + RETROK_LAST, + + RETROK_DUMMY = INT_MAX // Ensure sizeof(enum) == sizeof(int) +}; + +enum retro_mod +{ + RETROKMOD_NONE = 0x0000, + + RETROKMOD_SHIFT = 0x01, + RETROKMOD_CTRL = 0x02, + RETROKMOD_ALT = 0x04, + RETROKMOD_META = 0x08, + + RETROKMOD_NUMLOCK = 0x10, + RETROKMOD_CAPSLOCK = 0x20, + RETROKMOD_SCROLLOCK = 0x40, + + RETROKMOD_DUMMY = INT_MAX // Ensure sizeof(enum) == sizeof(int) +}; + +// If set, this call is not part of the public libretro API yet. It can change or be removed at any time. +#define RETRO_ENVIRONMENT_EXPERIMENTAL 0x10000 + +// Environment commands. +#define RETRO_ENVIRONMENT_SET_ROTATION 1 // const unsigned * -- + // Sets screen rotation of graphics. + // Is only implemented if rotation can be accelerated by hardware. + // Valid values are 0, 1, 2, 3, which rotates screen by 0, 90, 180, 270 degrees + // counter-clockwise respectively. + // +#define RETRO_ENVIRONMENT_GET_OVERSCAN 2 // bool * -- + // Boolean value whether or not the implementation should use overscan, or crop away overscan. + // +#define RETRO_ENVIRONMENT_GET_CAN_DUPE 3 // bool * -- + // Boolean value whether or not frontend supports frame duping, + // passing NULL to video frame callback. + // +// Environ 4, 5 are no longer supported (GET_VARIABLE / SET_VARIABLES), and reserved to avoid possible ABI clash. +#define RETRO_ENVIRONMENT_SET_MESSAGE 6 // const struct retro_message * -- + // Sets a message to be displayed in implementation-specific manner for a certain amount of 'frames'. + // Should not be used for trivial messages, which should simply be logged to stderr. +#define RETRO_ENVIRONMENT_SHUTDOWN 7 // N/A (NULL) -- + // Requests the frontend to shutdown. + // Should only be used if game has a specific + // way to shutdown the game from a menu item or similar. + // +#define RETRO_ENVIRONMENT_SET_PERFORMANCE_LEVEL 8 + // const unsigned * -- + // Gives a hint to the frontend how demanding this implementation + // is on a system. E.g. reporting a level of 2 means + // this implementation should run decently on all frontends + // of level 2 and up. + // + // It can be used by the frontend to potentially warn + // about too demanding implementations. + // + // The levels are "floating", but roughly defined as: + // 0: Low-powered embedded devices such as Raspberry Pi + // 1: 6th generation consoles, such as Wii/Xbox 1, and phones, tablets, etc. + // 2: 7th generation consoles, such as PS3/360, with sub-par CPUs. + // 3: Modern desktop/laptops with reasonably powerful CPUs. + // 4: High-end desktops with very powerful CPUs. + // + // This function can be called on a per-game basis, + // as certain games an implementation can play might be + // particularily demanding. + // If called, it should be called in retro_load_game(). + // +#define RETRO_ENVIRONMENT_GET_SYSTEM_DIRECTORY 9 + // const char ** -- + // Returns the "system" directory of the frontend. + // This directory can be used to store system specific ROMs such as BIOSes, configuration data, etc. + // The returned value can be NULL. + // If so, no such directory is defined, + // and it's up to the implementation to find a suitable directory. + // +#define RETRO_ENVIRONMENT_SET_PIXEL_FORMAT 10 + // const enum retro_pixel_format * -- + // Sets the internal pixel format used by the implementation. + // The default pixel format is RETRO_PIXEL_FORMAT_0RGB1555. + // This pixel format however, is deprecated (see enum retro_pixel_format). + // If the call returns false, the frontend does not support this pixel format. + // This function should be called inside retro_load_game() or retro_get_system_av_info(). + // +#define RETRO_ENVIRONMENT_SET_INPUT_DESCRIPTORS 11 + // const struct retro_input_descriptor * -- + // Sets an array of retro_input_descriptors. + // It is up to the frontend to present this in a usable way. + // The array is terminated by retro_input_descriptor::description being set to NULL. + // This function can be called at any time, but it is recommended to call it as early as possible. +#define RETRO_ENVIRONMENT_SET_KEYBOARD_CALLBACK 12 + // const struct retro_keyboard_callback * -- + // Sets a callback function used to notify core about keyboard events. + // +#define RETRO_ENVIRONMENT_SET_DISK_CONTROL_INTERFACE 13 + // const struct retro_disk_control_callback * -- + // Sets an interface which frontend can use to eject and insert disk images. + // This is used for games which consist of multiple images and must be manually + // swapped out by the user (e.g. PSX). +#define RETRO_ENVIRONMENT_SET_HW_RENDER (14 | RETRO_ENVIRONMENT_EXPERIMENTAL) + // struct retro_hw_render_callback * -- + // NOTE: This call is currently very experimental, and should not be considered part of the public API. + // The interface could be changed or removed at any time. + // Sets an interface to let a libretro core render with hardware acceleration. + // Should be called in retro_load_game(). + // If successful, libretro cores will be able to render to a frontend-provided framebuffer. + // The size of this framebuffer will be at least as large as max_width/max_height provided in get_av_info(). + // If HW rendering is used, pass only RETRO_HW_FRAME_BUFFER_VALID or NULL to retro_video_refresh_t. +#define RETRO_ENVIRONMENT_GET_VARIABLE 15 + // struct retro_variable * -- + // Interface to aquire user-defined information from environment + // that cannot feasibly be supported in a multi-system way. + // 'key' should be set to a key which has already been set by SET_VARIABLES. + // 'data' will be set to a value or NULL. + // +#define RETRO_ENVIRONMENT_SET_VARIABLES 16 + // const struct retro_variable * -- + // Allows an implementation to signal the environment + // which variables it might want to check for later using GET_VARIABLE. + // This allows the frontend to present these variables to a user dynamically. + // This should be called as early as possible (ideally in retro_set_environment). + // + // 'data' points to an array of retro_variable structs terminated by a { NULL, NULL } element. + // retro_variable::key should be namespaced to not collide with other implementations' keys. E.g. A core called 'foo' should use keys named as 'foo_option'. + // retro_variable::value should contain a human readable description of the key as well as a '|' delimited list of expected values. + // The number of possible options should be very limited, i.e. it should be feasible to cycle through options without a keyboard. + // First entry should be treated as a default. + // + // Example entry: + // { "foo_option", "Speed hack coprocessor X; false|true" } + // + // Text before first ';' is description. This ';' must be followed by a space, and followed by a list of possible values split up with '|'. + // Only strings are operated on. The possible values will generally be displayed and stored as-is by the frontend. + // +#define RETRO_ENVIRONMENT_GET_VARIABLE_UPDATE 17 + // bool * -- + // Result is set to true if some variables are updated by + // frontend since last call to RETRO_ENVIRONMENT_GET_VARIABLE. + // Variables should be queried with GET_VARIABLE. + +// Pass this to retro_video_refresh_t if rendering to hardware. +// Passing NULL to retro_video_refresh_t is still a frame dupe as normal. +#define RETRO_HW_FRAME_BUFFER_VALID ((void*)-1) + +// Invalidates the current HW context. +// If called, all GPU resources must be reinitialized. +// Usually called when frontend reinits video driver. +// Also called first time video driver is initialized, allowing libretro core to init resources. +typedef void (*retro_hw_context_reset_t)(void); +// Gets current framebuffer which is to be rendered to. Could change every frame potentially. +typedef uintptr_t (*retro_hw_get_current_framebuffer_t)(void); + +// Get a symbol from HW context. +typedef void (*retro_proc_address_t)(void); +typedef retro_proc_address_t (*retro_hw_get_proc_address_t)(const char *sym); + +enum retro_hw_context_type +{ + RETRO_HW_CONTEXT_NONE = 0, + RETRO_HW_CONTEXT_OPENGL, // OpenGL 2.x. Latest version available before 3.x+. + RETRO_HW_CONTEXT_OPENGLES2, // GLES 2.0 + + RETRO_HW_CONTEXT_DUMMY = INT_MAX +}; + +struct retro_hw_render_callback +{ + enum retro_hw_context_type context_type; // Which API to use. Set by libretro core. + retro_hw_context_reset_t context_reset; // Set by libretro core. + retro_hw_get_current_framebuffer_t get_current_framebuffer; // Set by frontend. + retro_hw_get_proc_address_t get_proc_address; // Set by frontend. + bool depth; // Set if render buffers should have depth component attached. +}; + +// Callback type passed in RETRO_ENVIRONMENT_SET_KEYBOARD_CALLBACK. Called by the frontend in response to keyboard events. +// down is set if the key is being pressed, or false if it is being released. +// keycode is the RETROK value of the char. +// character is the text character of the pressed key. (UTF-32). +// key_modifiers is a set of RETROKMOD values or'ed together. +typedef void (*retro_keyboard_event_t)(bool down, unsigned keycode, uint32_t character, uint16_t key_modifiers); + +struct retro_keyboard_callback +{ + retro_keyboard_event_t callback; +}; + +// Callbacks for RETRO_ENVIRONMENT_SET_DISK_CONTROL_INTERFACE. +// Should be set for implementations which can swap out multiple disk images in runtime. +// If the implementation can do this automatically, it should strive to do so. +// However, there are cases where the user must manually do so. +// +// Overview: To swap a disk image, eject the disk image with set_eject_state(true). +// Set the disk index with set_image_index(index). Insert the disk again with set_eject_state(false). + +// If ejected is true, "ejects" the virtual disk tray. +// When ejected, the disk image index can be set. +typedef bool (*retro_set_eject_state_t)(bool ejected); +// Gets current eject state. The initial state is 'not ejected'. +typedef bool (*retro_get_eject_state_t)(void); +// Gets current disk index. First disk is index 0. +// If return value is >= get_num_images(), no disk is currently inserted. +typedef unsigned (*retro_get_image_index_t)(void); +// Sets image index. Can only be called when disk is ejected. +// The implementation supports setting "no disk" by using an index >= get_num_images(). +typedef bool (*retro_set_image_index_t)(unsigned index); +// Gets total number of images which are available to use. +typedef unsigned (*retro_get_num_images_t)(void); +// +// Replaces the disk image associated with index. +// Arguments to pass in info have same requirements as retro_load_game(). +// Virtual disk tray must be ejected when calling this. +// Replacing a disk image with info = NULL will remove the disk image from the internal list. +// As a result, calls to get_image_index() can change. +// +// E.g. replace_image_index(1, NULL), and previous get_image_index() returned 4 before. +// Index 1 will be removed, and the new index is 3. +struct retro_game_info; +typedef bool (*retro_replace_image_index_t)(unsigned index, const struct retro_game_info *info); +// Adds a new valid index (get_num_images()) to the internal disk list. +// This will increment subsequent return values from get_num_images() by 1. +// This image index cannot be used until a disk image has been set with replace_image_index. +typedef bool (*retro_add_image_index_t)(void); + +struct retro_disk_control_callback +{ + retro_set_eject_state_t set_eject_state; + retro_get_eject_state_t get_eject_state; + + retro_get_image_index_t get_image_index; + retro_set_image_index_t set_image_index; + retro_get_num_images_t get_num_images; + + retro_replace_image_index_t replace_image_index; + retro_add_image_index_t add_image_index; +}; + +enum retro_pixel_format +{ + // 0RGB1555, native endian. 0 bit must be set to 0. + // This pixel format is default for compatibility concerns only. + // If a 15/16-bit pixel format is desired, consider using RGB565. + RETRO_PIXEL_FORMAT_0RGB1555 = 0, + + // XRGB8888, native endian. X bits are ignored. + RETRO_PIXEL_FORMAT_XRGB8888 = 1, + + // RGB565, native endian. This pixel format is the recommended format to use if a 15/16-bit format is desired + // as it is the pixel format that is typically available on a wide range of low-power devices. + // It is also natively supported in APIs like OpenGL ES. + RETRO_PIXEL_FORMAT_RGB565 = 2, + + // Ensure sizeof() == sizeof(int). + RETRO_PIXEL_FORMAT_UNKNOWN = INT_MAX +}; + +struct retro_message +{ + const char *msg; // Message to be displayed. + unsigned frames; // Duration in frames of message. +}; + +// Describes how the libretro implementation maps a libretro input bind +// to its internal input system through a human readable string. +// This string can be used to better let a user configure input. +struct retro_input_descriptor +{ + // Associates given parameters with a description. + unsigned port; + unsigned device; + unsigned index; + unsigned id; + + const char *description; // Human readable description for parameters. + // The pointer must remain valid until retro_unload_game() is called. +}; + +struct retro_system_info +{ + // All pointers are owned by libretro implementation, and pointers must remain valid until retro_deinit() is called. + + const char *library_name; // Descriptive name of library. Should not contain any version numbers, etc. + const char *library_version; // Descriptive version of core. + + const char *valid_extensions; // A string listing probably rom extensions the core will be able to load, separated with pipe. + // I.e. "bin|rom|iso". + // Typically used for a GUI to filter out extensions. + + bool need_fullpath; // If true, retro_load_game() is guaranteed to provide a valid pathname in retro_game_info::path. + // ::data and ::size are both invalid. + // If false, ::data and ::size are guaranteed to be valid, but ::path might not be valid. + // This is typically set to true for libretro implementations that must load from file. + // Implementations should strive for setting this to false, as it allows the frontend to perform patching, etc. + + bool block_extract; // If true, the frontend is not allowed to extract any archives before loading the real ROM. + // Necessary for certain libretro implementations that load games from zipped archives. +}; + +struct retro_game_geometry +{ + unsigned base_width; // Nominal video width of game. + unsigned base_height; // Nominal video height of game. + unsigned max_width; // Maximum possible width of game. + unsigned max_height; // Maximum possible height of game. + + float aspect_ratio; // Nominal aspect ratio of game. If aspect_ratio is <= 0.0, + // an aspect ratio of base_width / base_height is assumed. + // A frontend could override this setting if desired. +}; + +struct retro_system_timing +{ + double fps; // FPS of video content. + double sample_rate; // Sampling rate of audio. +}; + +struct retro_system_av_info +{ + struct retro_game_geometry geometry; + struct retro_system_timing timing; +}; + +struct retro_variable +{ + const char *key; // Variable to query in RETRO_ENVIRONMENT_GET_VARIABLE. + // If NULL, obtains the complete environment string if more complex parsing is necessary. + // The environment string is formatted as key-value pairs delimited by semicolons as so: + // "key1=value1;key2=value2;..." + const char *value; // Value to be obtained. If key does not exist, it is set to NULL. +}; + +struct retro_game_info +{ + const char *path; // Path to game, UTF-8 encoded. Usually used as a reference. + // May be NULL if rom was loaded from stdin or similar. + // retro_system_info::need_fullpath guaranteed that this path is valid. + const void *data; // Memory buffer of loaded game. Will be NULL if need_fullpath was set. + size_t size; // Size of memory buffer. + const char *meta; // String of implementation specific meta-data. +}; + +// Callbacks +// +// Environment callback. Gives implementations a way of performing uncommon tasks. Extensible. +typedef bool (*retro_environment_t)(unsigned cmd, void *data); + +// Render a frame. Pixel format is 15-bit 0RGB1555 native endian unless changed (see RETRO_ENVIRONMENT_SET_PIXEL_FORMAT). +// Width and height specify dimensions of buffer. +// Pitch specifices length in bytes between two lines in buffer. +// For performance reasons, it is highly recommended to have a frame that is packed in memory, i.e. pitch == width * byte_per_pixel. +// Certain graphic APIs, such as OpenGL ES, do not like textures that are not packed in memory. +typedef void (*retro_video_refresh_t)(const void *data, unsigned width, unsigned height, size_t pitch); + +// Renders a single audio frame. Should only be used if implementation generates a single sample at a time. +// Format is signed 16-bit native endian. +typedef void (*retro_audio_sample_t)(int16_t left, int16_t right); +// Renders multiple audio frames in one go. One frame is defined as a sample of left and right channels, interleaved. +// I.e. int16_t buf[4] = { l, r, l, r }; would be 2 frames. +// Only one of the audio callbacks must ever be used. +typedef size_t (*retro_audio_sample_batch_t)(const int16_t *data, size_t frames); + +// Polls input. +typedef void (*retro_input_poll_t)(void); +// Queries for input for player 'port'. device will be masked with RETRO_DEVICE_MASK. +// Specialization of devices such as RETRO_DEVICE_JOYPAD_MULTITAP that have been set with retro_set_controller_port_device() +// will still use the higher level RETRO_DEVICE_JOYPAD to request input. +typedef int16_t (*retro_input_state_t)(unsigned port, unsigned device, unsigned index, unsigned id); + +// Sets callbacks. retro_set_environment() is guaranteed to be called before retro_init(). +// The rest of the set_* functions are guaranteed to have been called before the first call to retro_run() is made. +void retro_set_environment(retro_environment_t); +void retro_set_video_refresh(retro_video_refresh_t); +void retro_set_audio_sample(retro_audio_sample_t); +void retro_set_audio_sample_batch(retro_audio_sample_batch_t); +void retro_set_input_poll(retro_input_poll_t); +void retro_set_input_state(retro_input_state_t); + +// Library global initialization/deinitialization. +void retro_init(void); +void retro_deinit(void); + +// Must return RETRO_API_VERSION. Used to validate ABI compatibility when the API is revised. +unsigned retro_api_version(void); + +// Gets statically known system info. Pointers provided in *info must be statically allocated. +// Can be called at any time, even before retro_init(). +void retro_get_system_info(struct retro_system_info *info); + +// Gets information about system audio/video timings and geometry. +// Can be called only after retro_load_game() has successfully completed. +// NOTE: The implementation of this function might not initialize every variable if needed. +// E.g. geom.aspect_ratio might not be initialized if core doesn't desire a particular aspect ratio. +void retro_get_system_av_info(struct retro_system_av_info *info); + +// Sets device to be used for player 'port'. +void retro_set_controller_port_device(unsigned port, unsigned device); + +// Resets the current game. +void retro_reset(void); + +// Runs the game for one video frame. +// During retro_run(), input_poll callback must be called at least once. +// +// If a frame is not rendered for reasons where a game "dropped" a frame, +// this still counts as a frame, and retro_run() should explicitly dupe a frame if GET_CAN_DUPE returns true. +// In this case, the video callback can take a NULL argument for data. +void retro_run(void); + +// Returns the amount of data the implementation requires to serialize internal state (save states). +// Beetween calls to retro_load_game() and retro_unload_game(), the returned size is never allowed to be larger than a previous returned value, to +// ensure that the frontend can allocate a save state buffer once. +size_t retro_serialize_size(void); + +// Serializes internal state. If failed, or size is lower than retro_serialize_size(), it should return false, true otherwise. +bool retro_serialize(void *data, size_t size); +bool retro_unserialize(const void *data, size_t size); + +void retro_cheat_reset(void); +void retro_cheat_set(unsigned index, bool enabled, const char *code); + +// Loads a game. +bool retro_load_game(const struct retro_game_info *game); + +// Loads a "special" kind of game. Should not be used except in extreme cases. +bool retro_load_game_special( + unsigned game_type, + const struct retro_game_info *info, size_t num_info +); + +// Unloads a currently loaded game. +void retro_unload_game(void); + +// Gets region of game. +unsigned retro_get_region(void); + +// Gets region of memory. +void *retro_get_memory_data(unsigned id); +size_t retro_get_memory_size(unsigned id); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/genplus-gx/libretro/link.T b/genplus-gx/libretro/link.T new file mode 100644 index 0000000000..6c94c67a5c --- /dev/null +++ b/genplus-gx/libretro/link.T @@ -0,0 +1,5 @@ +{ + global: retro_*; + local: *; +}; + diff --git a/genplus-gx/libretro/msvc/msvc-2003-xbox1.bat b/genplus-gx/libretro/msvc/msvc-2003-xbox1.bat new file mode 100644 index 0000000000..382269ea67 --- /dev/null +++ b/genplus-gx/libretro/msvc/msvc-2003-xbox1.bat @@ -0,0 +1,47 @@ +@SET VSINSTALLDIR=C:\Program Files\Microsoft Visual Studio .NET 2003\Common7\IDE +@SET VCINSTALLDIR=C:\Program Files\Microsoft Visual Studio .NET 2003 +@SET FrameworkDir=C:\WINDOWS\Microsoft.NET\Framework +@SET FrameworkVersion=v1.1.4322 +@SET FrameworkSDKDir=C:\Program Files\Microsoft Visual Studio .NET 2003\SDK\v1.1 +@rem Root of Visual Studio common files. + +@if "%VSINSTALLDIR%"=="" goto Usage +@if "%VCINSTALLDIR%"=="" set VCINSTALLDIR=%VSINSTALLDIR% + +@rem +@rem Root of Visual Studio ide installed files. +@rem +@set DevEnvDir=%VSINSTALLDIR% + +@rem +@rem Root of Visual C++ installed files. +@rem +@set MSVCDir=%VCINSTALLDIR%\VC7 + +@rem +@echo Setting environment for using Microsoft Visual Studio .NET 2003 tools. +@echo (If you have another version of Visual Studio or Visual C++ installed and wish +@echo to use its tools from the command line, run vcvars32.bat for that version.) +@rem + +@REM %VCINSTALLDIR%\Common7\Tools dir is added only for real setup. + +@set PATH=%DevEnvDir%;%MSVCDir%\BIN;%VCINSTALLDIR%\Common7\Tools;%VCINSTALLDIR%\Common7\Tools\bin\prerelease;%VCINSTALLDIR%\Common7\Tools\bin;%FrameworkSDKDir%\bin;%FrameworkDir%\%FrameworkVersion%;%PATH%; +@set INCLUDE=%MSVCDir%\ATLMFC\INCLUDE;%MSVCDir%\INCLUDE;%FrameworkSDKDir%\include;%INCLUDE%;%XDK%\xbox\include +@set LIB=%MSVCDir%\ATLMFC\LIB;%MSVCDir%\LIB;%MSVCDir%\PlatformSDK\lib;%XDK%\lib;%XDK%\xbox\lib;%LIB% + +@goto end + +:Usage + +@echo. VSINSTALLDIR variable is not set. +@echo. +@echo SYNTAX: %0 + +@goto end + +:end + +devenv /clean Release_LTCG msvc-2003-xbox1.sln +devenv /build Release_LTCG msvc-2003-xbox1.sln +exit diff --git a/genplus-gx/libretro/msvc/msvc-2003-xbox1.sln b/genplus-gx/libretro/msvc/msvc-2003-xbox1.sln new file mode 100644 index 0000000000..c463b7ed83 --- /dev/null +++ b/genplus-gx/libretro/msvc/msvc-2003-xbox1.sln @@ -0,0 +1,30 @@ +Microsoft Visual Studio Solution File, Format Version 8.00 +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "msvc-2003-xbox1", "msvc-2003-xbox1/msvc-2003-xbox1.vcproj", "{C0C3EF9B-2D9B-44D1-A83F-3617D8BA3421}" + ProjectSection(ProjectDependencies) = postProject + EndProjectSection +EndProject +Global + GlobalSection(SolutionConfiguration) = preSolution + Debug = Debug + Profile = Profile + Profile_FastCap = Profile_FastCap + Release = Release + Release_LTCG = Release_LTCG + EndGlobalSection + GlobalSection(ProjectConfiguration) = postSolution + {C0C3EF9B-2D9B-44D1-A83F-3617D8BA3421}.Debug.ActiveCfg = Debug|Xbox + {C0C3EF9B-2D9B-44D1-A83F-3617D8BA3421}.Debug.Build.0 = Debug|Xbox + {C0C3EF9B-2D9B-44D1-A83F-3617D8BA3421}.Profile.ActiveCfg = Profile|Xbox + {C0C3EF9B-2D9B-44D1-A83F-3617D8BA3421}.Profile.Build.0 = Profile|Xbox + {C0C3EF9B-2D9B-44D1-A83F-3617D8BA3421}.Profile_FastCap.ActiveCfg = Profile_FastCap|Xbox + {C0C3EF9B-2D9B-44D1-A83F-3617D8BA3421}.Profile_FastCap.Build.0 = Profile_FastCap|Xbox + {C0C3EF9B-2D9B-44D1-A83F-3617D8BA3421}.Release.ActiveCfg = Release|Xbox + {C0C3EF9B-2D9B-44D1-A83F-3617D8BA3421}.Release.Build.0 = Release|Xbox + {C0C3EF9B-2D9B-44D1-A83F-3617D8BA3421}.Release_LTCG.ActiveCfg = Release_LTCG|Xbox + {C0C3EF9B-2D9B-44D1-A83F-3617D8BA3421}.Release_LTCG.Build.0 = Release_LTCG|Xbox + EndGlobalSection + GlobalSection(ExtensibilityGlobals) = postSolution + EndGlobalSection + GlobalSection(ExtensibilityAddIns) = postSolution + EndGlobalSection +EndGlobal diff --git a/genplus-gx/libretro/msvc/msvc-2003-xbox1/msvc-2003-xbox1.vcproj b/genplus-gx/libretro/msvc/msvc-2003-xbox1/msvc-2003-xbox1.vcproj new file mode 100644 index 0000000000..aaf879cc34 --- /dev/null +++ b/genplus-gx/libretro/msvc/msvc-2003-xbox1/msvc-2003-xbox1.vcproj @@ -0,0 +1,543 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/genplus-gx/libretro/msvc/msvc-2003-xbox1/stdint.h b/genplus-gx/libretro/msvc/msvc-2003-xbox1/stdint.h new file mode 100644 index 0000000000..eb93fbc61b --- /dev/null +++ b/genplus-gx/libretro/msvc/msvc-2003-xbox1/stdint.h @@ -0,0 +1,249 @@ +// ISO C9x compliant stdint.h for Microsoft Visual Studio +// Based on ISO/IEC 9899:TC2 Committee draft (May 6, 2005) WG14/N1124 +// +// Copyright (c) 2006-2008 Alexander Chemeris +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are met: +// +// 1. Redistributions of source code must retain the above copyright notice, +// this list of conditions and the following disclaimer. +// +// 2. Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// 3. The name of the author may be used to endorse or promote products +// derived from this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED +// WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO +// EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +// OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +// WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR +// OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF +// ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +// +/////////////////////////////////////////////////////////////////////////////// +#ifndef __RARCH_STDINT_H +#define __RARCH_STDINT_H + +#if _MSC_VER && (_MSC_VER < 1600) +//pre-MSVC 2010 needs an implementation of stdint.h + +#if _MSC_VER > 1000 +#pragma once +#endif + +#include + +// For Visual Studio 6 in C++ mode and for many Visual Studio versions when +// compiling for ARM we should wrap include with 'extern "C++" {}' +// or compiler give many errors like this: +// error C2733: second C linkage of overloaded function 'wmemchr' not allowed +#ifdef __cplusplus +extern "C" { +#endif +# include +#ifdef __cplusplus +} +#endif + +// Define _W64 macros to mark types changing their size, like intptr_t. +#ifndef _W64 +# if !defined(__midl) && (defined(_X86_) || defined(_M_IX86)) && _MSC_VER >= 1300 +# define _W64 __w64 +# else +# define _W64 +# endif +#endif + + +// 7.18.1 Integer types + +// 7.18.1.1 Exact-width integer types + +// Visual Studio 6 and Embedded Visual C++ 4 doesn't +// realize that, e.g. char has the same size as __int8 +// so we give up on __intX for them. +#if (_MSC_VER < 1300) + typedef signed char int8_t; + typedef signed short int16_t; + typedef signed int int32_t; + typedef unsigned char uint8_t; + typedef unsigned short uint16_t; + typedef unsigned int uint32_t; +#else + typedef signed __int8 int8_t; + typedef signed __int16 int16_t; + typedef signed __int32 int32_t; + typedef unsigned __int8 uint8_t; + typedef unsigned __int16 uint16_t; + typedef unsigned __int32 uint32_t; +#endif +typedef signed __int64 int64_t; +typedef unsigned __int64 uint64_t; + + +// 7.18.1.2 Minimum-width integer types +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; +typedef int32_t int_least32_t; +typedef int64_t int_least64_t; +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; +typedef uint32_t uint_least32_t; +typedef uint64_t uint_least64_t; + +// 7.18.1.3 Fastest minimum-width integer types +typedef int8_t int_fast8_t; +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef int64_t int_fast64_t; +typedef uint8_t uint_fast8_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +typedef uint64_t uint_fast64_t; + +// 7.18.1.4 Integer types capable of holding object pointers +#ifdef _WIN64 // [ + typedef signed __int64 intptr_t; + typedef unsigned __int64 uintptr_t; +#else // _WIN64 ][ + typedef _W64 signed int intptr_t; + typedef _W64 unsigned int uintptr_t; +#endif // _WIN64 ] + +// 7.18.1.5 Greatest-width integer types +typedef int64_t intmax_t; +typedef uint64_t uintmax_t; + + +// 7.18.2 Limits of specified-width integer types + +#if !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS) // [ See footnote 220 at page 257 and footnote 221 at page 259 + +// 7.18.2.1 Limits of exact-width integer types +#define INT8_MIN ((int8_t)_I8_MIN) +#define INT8_MAX _I8_MAX +#define INT16_MIN ((int16_t)_I16_MIN) +#define INT16_MAX _I16_MAX +#define INT32_MIN ((int32_t)_I32_MIN) +#define INT32_MAX _I32_MAX +#define INT64_MIN ((int64_t)_I64_MIN) +#define INT64_MAX _I64_MAX +#define UINT8_MAX _UI8_MAX +#define UINT16_MAX _UI16_MAX +#define UINT32_MAX _UI32_MAX +#define UINT64_MAX _UI64_MAX + +// 7.18.2.2 Limits of minimum-width integer types +#define INT_LEAST8_MIN INT8_MIN +#define INT_LEAST8_MAX INT8_MAX +#define INT_LEAST16_MIN INT16_MIN +#define INT_LEAST16_MAX INT16_MAX +#define INT_LEAST32_MIN INT32_MIN +#define INT_LEAST32_MAX INT32_MAX +#define INT_LEAST64_MIN INT64_MIN +#define INT_LEAST64_MAX INT64_MAX +#define UINT_LEAST8_MAX UINT8_MAX +#define UINT_LEAST16_MAX UINT16_MAX +#define UINT_LEAST32_MAX UINT32_MAX +#define UINT_LEAST64_MAX UINT64_MAX + +// 7.18.2.3 Limits of fastest minimum-width integer types +#define INT_FAST8_MIN INT8_MIN +#define INT_FAST8_MAX INT8_MAX +#define INT_FAST16_MIN INT16_MIN +#define INT_FAST16_MAX INT16_MAX +#define INT_FAST32_MIN INT32_MIN +#define INT_FAST32_MAX INT32_MAX +#define INT_FAST64_MIN INT64_MIN +#define INT_FAST64_MAX INT64_MAX +#define UINT_FAST8_MAX UINT8_MAX +#define UINT_FAST16_MAX UINT16_MAX +#define UINT_FAST32_MAX UINT32_MAX +#define UINT_FAST64_MAX UINT64_MAX + +// 7.18.2.4 Limits of integer types capable of holding object pointers +#ifdef _WIN64 // [ +# define INTPTR_MIN INT64_MIN +# define INTPTR_MAX INT64_MAX +# define UINTPTR_MAX UINT64_MAX +#else // _WIN64 ][ +# define INTPTR_MIN INT32_MIN +# define INTPTR_MAX INT32_MAX +# define UINTPTR_MAX UINT32_MAX +#endif // _WIN64 ] + +// 7.18.2.5 Limits of greatest-width integer types +#define INTMAX_MIN INT64_MIN +#define INTMAX_MAX INT64_MAX +#define UINTMAX_MAX UINT64_MAX + +// 7.18.3 Limits of other integer types + +#ifdef _WIN64 // [ +# define PTRDIFF_MIN _I64_MIN +# define PTRDIFF_MAX _I64_MAX +#else // _WIN64 ][ +# define PTRDIFF_MIN _I32_MIN +# define PTRDIFF_MAX _I32_MAX +#endif // _WIN64 ] + +#define SIG_ATOMIC_MIN INT_MIN +#define SIG_ATOMIC_MAX INT_MAX + +#ifndef SIZE_MAX // [ +# ifdef _WIN64 // [ +# define SIZE_MAX _UI64_MAX +# else // _WIN64 ][ +# define SIZE_MAX _UI32_MAX +# endif // _WIN64 ] +#endif // SIZE_MAX ] + +// WCHAR_MIN and WCHAR_MAX are also defined in +#ifndef WCHAR_MIN // [ +# define WCHAR_MIN 0 +#endif // WCHAR_MIN ] +#ifndef WCHAR_MAX // [ +# define WCHAR_MAX _UI16_MAX +#endif // WCHAR_MAX ] + +#define WINT_MIN 0 +#define WINT_MAX _UI16_MAX + +#endif // __STDC_LIMIT_MACROS ] + + +// 7.18.4 Limits of other integer types + +#if !defined(__cplusplus) || defined(__STDC_CONSTANT_MACROS) // [ See footnote 224 at page 260 + +// 7.18.4.1 Macros for minimum-width integer constants + +#define INT8_C(val) val##i8 +#define INT16_C(val) val##i16 +#define INT32_C(val) val##i32 +#define INT64_C(val) val##i64 + +#define UINT8_C(val) val##ui8 +#define UINT16_C(val) val##ui16 +#define UINT32_C(val) val##ui32 +#define UINT64_C(val) val##ui64 + +// 7.18.4.2 Macros for greatest-width integer constants +#define INTMAX_C INT64_C +#define UINTMAX_C UINT64_C + +#endif // __STDC_CONSTANT_MACROS ] + +#else +//sanity for everything else +#include +#endif + +#endif diff --git a/genplus-gx/libretro/msvc/msvc-2010-360.bat b/genplus-gx/libretro/msvc/msvc-2010-360.bat new file mode 100644 index 0000000000..6ddb7de4d0 --- /dev/null +++ b/genplus-gx/libretro/msvc/msvc-2010-360.bat @@ -0,0 +1,124 @@ +@echo off + +@echo Setting environment for using Microsoft Visual Studio 2010 x86 tools. + +@call :GetVSCommonToolsDir +@if "%VS100COMNTOOLS%"=="" goto error_no_VS100COMNTOOLSDIR + +@call "%VS100COMNTOOLS%VCVarsQueryRegistry.bat" 32bit No64bit + +@if "%VSINSTALLDIR%"=="" goto error_no_VSINSTALLDIR +@if "%FrameworkDir32%"=="" goto error_no_FrameworkDIR32 +@if "%FrameworkVersion32%"=="" goto error_no_FrameworkVer32 +@if "%Framework35Version%"=="" goto error_no_Framework35Version + +@set FrameworkDir=%FrameworkDir32% +@set FrameworkVersion=%FrameworkVersion32% + +@if not "%WindowsSdkDir%" == "" ( + @set "PATH=%WindowsSdkDir%bin\NETFX 4.0 Tools;%WindowsSdkDir%bin;%PATH%" + @set "INCLUDE=%WindowsSdkDir%include;%INCLUDE%" + @set "LIB=%WindowsSdkDir%lib;%LIB%" +) + +@rem +@rem Root of Visual Studio IDE installed files. +@rem +@set DevEnvDir=%VSINSTALLDIR%Common7\IDE\ + +@rem PATH +@rem ---- +@if exist "%VSINSTALLDIR%Team Tools\Performance Tools" ( + @set "PATH=%VSINSTALLDIR%Team Tools\Performance Tools;%PATH%" +) +@if exist "%ProgramFiles%\HTML Help Workshop" set PATH=%ProgramFiles%\HTML Help Workshop;%PATH% +@if exist "%ProgramFiles(x86)%\HTML Help Workshop" set PATH=%ProgramFiles(x86)%\HTML Help Workshop;%PATH% +@if exist "%VCINSTALLDIR%VCPackages" set PATH=%VCINSTALLDIR%VCPackages;%PATH% +@set PATH=%FrameworkDir%%Framework35Version%;%PATH% +@set PATH=%FrameworkDir%%FrameworkVersion%;%PATH% +@set PATH=%VSINSTALLDIR%Common7\Tools;%PATH% +@if exist "%VCINSTALLDIR%BIN" set PATH=%VCINSTALLDIR%BIN;%PATH% +@set PATH=%DevEnvDir%;%PATH% + +@if exist "%VSINSTALLDIR%VSTSDB\Deploy" ( + @set "PATH=%VSINSTALLDIR%VSTSDB\Deploy;%PATH%" +) + +@if not "%FSHARPINSTALLDIR%" == "" ( + @set "PATH=%FSHARPINSTALLDIR%;%PATH%" +) + +@rem INCLUDE +@rem ------- +@if exist "%VCINSTALLDIR%ATLMFC\INCLUDE" set INCLUDE=%VCINSTALLDIR%ATLMFC\INCLUDE;%INCLUDE% +@if exist "%VCINSTALLDIR%INCLUDE" set INCLUDE=%VCINSTALLDIR%INCLUDE;%INCLUDE% + +@rem LIB +@rem --- +@if exist "%VCINSTALLDIR%ATLMFC\LIB" set LIB=%VCINSTALLDIR%ATLMFC\LIB;%LIB% +@if exist "%VCINSTALLDIR%LIB" set LIB=%VCINSTALLDIR%LIB;%LIB% + +@rem LIBPATH +@rem ------- +@if exist "%VCINSTALLDIR%ATLMFC\LIB" set LIBPATH=%VCINSTALLDIR%ATLMFC\LIB;%LIBPATH% +@if exist "%VCINSTALLDIR%LIB" set LIBPATH=%VCINSTALLDIR%LIB;%LIBPATH% +@set LIBPATH=%FrameworkDir%%Framework35Version%;%LIBPATH% +@set LIBPATH=%FrameworkDir%%FrameworkVersion%;%LIBPATH% + +@goto end + +@REM ----------------------------------------------------------------------- +:GetVSCommonToolsDir +@set VS100COMNTOOLS= +@call :GetVSCommonToolsDirHelper32 HKLM > nul 2>&1 +@if errorlevel 1 call :GetVSCommonToolsDirHelper32 HKCU > nul 2>&1 +@if errorlevel 1 call :GetVSCommonToolsDirHelper64 HKLM > nul 2>&1 +@if errorlevel 1 call :GetVSCommonToolsDirHelper64 HKCU > nul 2>&1 +@exit /B 0 + +:GetVSCommonToolsDirHelper32 +@for /F "tokens=1,2*" %%i in ('reg query "%1\SOFTWARE\Microsoft\VisualStudio\SxS\VS7" /v "10.0"') DO ( + @if "%%i"=="10.0" ( + @SET "VS100COMNTOOLS=%%k" + ) +) +@if "%VS100COMNTOOLS%"=="" exit /B 1 +@SET "VS100COMNTOOLS=%VS100COMNTOOLS%Common7\Tools\" +@exit /B 0 + +:GetVSCommonToolsDirHelper64 +@for /F "tokens=1,2*" %%i in ('reg query "%1\SOFTWARE\Wow6432Node\Microsoft\VisualStudio\SxS\VS7" /v "10.0"') DO ( + @if "%%i"=="10.0" ( + @SET "VS100COMNTOOLS=%%k" + ) +) +@if "%VS100COMNTOOLS%"=="" exit /B 1 +@SET "VS100COMNTOOLS=%VS100COMNTOOLS%Common7\Tools\" +@exit /B 0 + +@REM ----------------------------------------------------------------------- +:error_no_VS100COMNTOOLSDIR +@echo ERROR: Cannot determine the location of the VS Common Tools folder. +@goto end + +:error_no_VSINSTALLDIR +@echo ERROR: Cannot determine the location of the VS installation. +@goto end + +:error_no_FrameworkDIR32 +@echo ERROR: Cannot determine the location of the .NET Framework 32bit installation. +@goto end + +:error_no_FrameworkVer32 +@echo ERROR: Cannot determine the version of the .NET Framework 32bit installation. +@goto end + +:error_no_Framework35Version +@echo ERROR: Cannot determine the .NET Framework 3.5 version. +@goto end + +:end + +msbuild msvc-2010-360.sln /p:Configuration=Release_LTCG /target:clean +msbuild msvc-2010-360.sln /p:Configuration=Release_LTCG +exit diff --git a/genplus-gx/libretro/msvc/msvc-2010-360.sln b/genplus-gx/libretro/msvc/msvc-2010-360.sln new file mode 100644 index 0000000000..449143d4c4 --- /dev/null +++ b/genplus-gx/libretro/msvc/msvc-2010-360.sln @@ -0,0 +1,38 @@ + +Microsoft Visual Studio Solution File, Format Version 11.00 +# Visual Studio 2010 +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "genesis-next-msvc-2010-360", "msvc-2010-360\msvc-2010-360.vcxproj", "{00CE82EC-E948-4BB6-B726-23BF1571B05A}" +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + CodeAnalysis|Xbox 360 = CodeAnalysis|Xbox 360 + Debug|Xbox 360 = Debug|Xbox 360 + Profile_FastCap|Xbox 360 = Profile_FastCap|Xbox 360 + Profile|Xbox 360 = Profile|Xbox 360 + Release_LTCG|Xbox 360 = Release_LTCG|Xbox 360 + Release|Xbox 360 = Release|Xbox 360 + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {00CE82EC-E948-4BB6-B726-23BF1571B05A}.CodeAnalysis|Xbox 360.ActiveCfg = CodeAnalysis|Xbox 360 + {00CE82EC-E948-4BB6-B726-23BF1571B05A}.CodeAnalysis|Xbox 360.Build.0 = CodeAnalysis|Xbox 360 + {00CE82EC-E948-4BB6-B726-23BF1571B05A}.CodeAnalysis|Xbox 360.Deploy.0 = CodeAnalysis|Xbox 360 + {00CE82EC-E948-4BB6-B726-23BF1571B05A}.Debug|Xbox 360.ActiveCfg = Debug|Xbox 360 + {00CE82EC-E948-4BB6-B726-23BF1571B05A}.Debug|Xbox 360.Build.0 = Debug|Xbox 360 + {00CE82EC-E948-4BB6-B726-23BF1571B05A}.Debug|Xbox 360.Deploy.0 = Debug|Xbox 360 + {00CE82EC-E948-4BB6-B726-23BF1571B05A}.Profile_FastCap|Xbox 360.ActiveCfg = Profile_FastCap|Xbox 360 + {00CE82EC-E948-4BB6-B726-23BF1571B05A}.Profile_FastCap|Xbox 360.Build.0 = Profile_FastCap|Xbox 360 + {00CE82EC-E948-4BB6-B726-23BF1571B05A}.Profile_FastCap|Xbox 360.Deploy.0 = Profile_FastCap|Xbox 360 + {00CE82EC-E948-4BB6-B726-23BF1571B05A}.Profile|Xbox 360.ActiveCfg = Profile|Xbox 360 + {00CE82EC-E948-4BB6-B726-23BF1571B05A}.Profile|Xbox 360.Build.0 = Profile|Xbox 360 + {00CE82EC-E948-4BB6-B726-23BF1571B05A}.Profile|Xbox 360.Deploy.0 = Profile|Xbox 360 + {00CE82EC-E948-4BB6-B726-23BF1571B05A}.Release_LTCG|Xbox 360.ActiveCfg = Release_LTCG|Xbox 360 + {00CE82EC-E948-4BB6-B726-23BF1571B05A}.Release_LTCG|Xbox 360.Build.0 = Release_LTCG|Xbox 360 + {00CE82EC-E948-4BB6-B726-23BF1571B05A}.Release_LTCG|Xbox 360.Deploy.0 = Release_LTCG|Xbox 360 + {00CE82EC-E948-4BB6-B726-23BF1571B05A}.Release|Xbox 360.ActiveCfg = Release|Xbox 360 + {00CE82EC-E948-4BB6-B726-23BF1571B05A}.Release|Xbox 360.Build.0 = Release|Xbox 360 + {00CE82EC-E948-4BB6-B726-23BF1571B05A}.Release|Xbox 360.Deploy.0 = Release|Xbox 360 + EndGlobalSection + GlobalSection(SolutionProperties) = preSolution + HideSolutionNode = FALSE + EndGlobalSection +EndGlobal diff --git a/genplus-gx/libretro/msvc/msvc-2010-360/msvc-2010-360.vcxproj b/genplus-gx/libretro/msvc/msvc-2010-360/msvc-2010-360.vcxproj new file mode 100644 index 0000000000..324835b855 --- /dev/null +++ b/genplus-gx/libretro/msvc/msvc-2010-360/msvc-2010-360.vcxproj @@ -0,0 +1,373 @@ + + + + + CodeAnalysis + Xbox 360 + + + Debug + Xbox 360 + + + Profile + Xbox 360 + + + Profile_FastCap + Xbox 360 + + + Release + Xbox 360 + + + Release_LTCG + Xbox 360 + + + + + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + + + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + + + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + + + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + + + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + + + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + + + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + + + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + + + + + + + + + + + + + + + + + + + + + + + + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + + + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + + + + + + + + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + + + + + + + + + + + + + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + CompileAsC + + + + {00CE82EC-E948-4BB6-B726-23BF1571B05A} + Xbox360Proj + genesis-next-msvc-2010-360 + + + + StaticLibrary + MultiByte + + + StaticLibrary + MultiByte + + + StaticLibrary + MultiByte + + + StaticLibrary + MultiByte + + + StaticLibrary + MultiByte + + + StaticLibrary + true + MultiByte + + + + + + + + + + + + + + + + + + + + + + + + + $(OutDir)genesis_plus_gx_libretro_xdk360$(TargetExt) + + + $(OutDir)genesis_plus_gx_libretro_xdk360$(TargetExt) + + + $(OutDir)genesis_plus_gx_libretro_xdk360$(TargetExt) + + + $(OutDir)genesis_plus_gx_libretro_xdk360$(TargetExt) + + + $(OutDir)genesis_plus_gx_libretro_xdk360$(TargetExt) + + + $(OutDir)genesis_plus_gx_libretro_xdk360$(TargetExt) + + + + NotUsing + Level3 + ProgramDatabase + Disabled + false + true + false + $(OutDir)$(ProjectName).pch + MultiThreadedDebug + _DEBUG;_XBOX;_XBOX360;_LIB;INLINE=static _inline;__attribute__=;__inline__=_inline;__extension__=;USE_16BPP_RENDERING;__LIBRETRO__;FRONTEND_SUPPORTS_RGB565;%(PreprocessorDefinitions) + Callcap + $(SolutionDir)\..\..\core;$(SolutionDir)\..\..\core\cd_hw;$(SolutionDir)\..\..\core\cart_hw;$(SolutionDir)\..\..\core\sound;$(SolutionDir)\..\..\core\z80;$(SolutionDir)\..\..\core\m68k;$(SolutionDir)\..\..\core\input_hw;$(SolutionDir)\..\..\core\cart_hw\svp;$(SolutionDir)\..\..\core\ntsc;$(SolutionDir)\..\;$(SolutionDir)\..\..\;%(AdditionalIncludeDirectories) + CompileAsC + + + true + + + + + NotUsing + Level4 + ProgramDatabase + Disabled + false + true + AnalyzeOnly + false + $(OutDir)$(ProjectName).pch + MultiThreadedDebug + _DEBUG;_XBOX;_XBOX360;_LIB;%(PreprocessorDefinitions);INLINE=static _inline;__attribute__=;__inline__=_inline;__extension__=;USE_16BPP_RENDERING;__LIBRETRO__;FRONTEND_SUPPORTS_RGB565 + Callcap + $(SolutionDir)\..\..\core;$(SolutionDir)\..\..\core\cd_hw;$(SolutionDir)\..\..\core\cart_hw;$(SolutionDir)\..\..\core\sound;$(SolutionDir)\..\..\core\z80;$(SolutionDir)\..\..\core\m68k;$(SolutionDir)\..\..\core\input_hw;$(SolutionDir)\..\..\core\cart_hw\svp;$(SolutionDir)\..\..\core\ntsc;$(SolutionDir)\..\;$(SolutionDir)\..\..\;%(AdditionalIncludeDirectories) + CompileAsC + + + true + + + + + Level3 + NotUsing + Full + true + false + true + ProgramDatabase + Size + false + $(OutDir)$(ProjectName).pch + MultiThreaded + NDEBUG;_XBOX;_XBOX360;PROFILE;_LIB;__LIBRETRO__;USE_16BPP_RENDERING;INLINE=static _inline;FRONTEND_SUPPORTS_RGB565;%(PreprocessorDefinitions) + Callcap + $(SolutionDir)\..\..\core;$(SolutionDir)\..\..\core\cd_hw;$(SolutionDir)\..\..\core\cart_hw;$(SolutionDir)\..\..\core\sound;$(SolutionDir)\..\..\core\z80;$(SolutionDir)\..\..\core\m68k;$(SolutionDir)\..\..\core\input_hw;$(SolutionDir)\..\..\core\cart_hw\svp;$(SolutionDir)\..\..\core\ntsc;$(SolutionDir)\..\;$(SolutionDir)\..\..\;%(AdditionalIncludeDirectories) + CompileAsC + + + true + false + xapilib.lib;%(IgnoreSpecificDefaultLibraries) + true + + + + + Level3 + NotUsing + Full + true + false + true + ProgramDatabase + Fastcap + Size + false + $(OutDir)$(ProjectName).pch + MultiThreaded + NDEBUG;_XBOX;_XBOX360;PROFILE;FASTCAP;_LIB;__LIBRETRO__;USE_16BPP_RENDERING;INLINE=static _inline;FRONTEND_SUPPORTS_RGB565;%(PreprocessorDefinitions) + $(SolutionDir)\..\..\core;$(SolutionDir)\..\..\core\cd_hw;$(SolutionDir)\..\..\core\cart_hw;$(SolutionDir)\..\..\core\sound;$(SolutionDir)\..\..\core\z80;$(SolutionDir)\..\..\core\m68k;$(SolutionDir)\..\..\core\input_hw;$(SolutionDir)\..\..\core\cart_hw\svp;$(SolutionDir)\..\..\core\ntsc;$(SolutionDir)\..\;$(SolutionDir)\..\..\;%(AdditionalIncludeDirectories) + CompileAsC + + + true + false + true + + + + + Level3 + NotUsing + Full + true + true + ProgramDatabase + Size + false + false + $(OutDir)$(ProjectName).pch + MultiThreaded + NDEBUG;_XBOX;_XBOX360;_LIB;INLINE=static _inline;__inline__=_inline;__extension__=;USE_16BPP_RENDERING;__LIBRETRO__;FRONTEND_SUPPORTS_RGB565;%(PreprocessorDefinitions) + $(SolutionDir)\..\..\core;$(SolutionDir)\..\..\core\cd_hw;$(SolutionDir)\..\..\core\cart_hw;$(SolutionDir)\..\..\core\sound;$(SolutionDir)\..\..\core\z80;$(SolutionDir)\..\..\core\m68k;$(SolutionDir)\..\..\core\input_hw;$(SolutionDir)\..\..\core\cart_hw\svp;$(SolutionDir)\..\..\core\ntsc;$(SolutionDir)\..\;$(SolutionDir)\..\..\;%(AdditionalIncludeDirectories) + CompileAsC + + + true + true + true + + + + + Level3 + NotUsing + Full + true + true + ProgramDatabase + Size + false + false + $(OutDir)$(ProjectName).pch + MultiThreaded + NDEBUG;_XBOX;_XBOX360;LTCG;_LIB;INLINE=static _inline;__inline__=_inline;__extension__=;USE_16BPP_RENDERING;__LIBRETRO__;FRONTEND_SUPPORTS_RGB565;%(PreprocessorDefinitions) + $(SolutionDir)\..\..\core;$(SolutionDir)\..\..\core\cd_hw;$(SolutionDir)\..\..\core\cart_hw;$(SolutionDir)\..\..\core\sound;$(SolutionDir)\..\..\core\z80;$(SolutionDir)\..\..\core\m68k;$(SolutionDir)\..\..\core\input_hw;$(SolutionDir)\..\..\core\cart_hw\svp;$(SolutionDir)\..\..\core\ntsc;$(SolutionDir)\..\;$(SolutionDir)\..\..\;%(AdditionalIncludeDirectories) + CompileAsC + + + true + true + true + + + + + + diff --git a/genplus-gx/libretro/msvc/msvc-2010-360/msvc-2010-360.vcxproj.filters b/genplus-gx/libretro/msvc/msvc-2010-360/msvc-2010-360.vcxproj.filters new file mode 100644 index 0000000000..5fa17a2e40 --- /dev/null +++ b/genplus-gx/libretro/msvc/msvc-2010-360/msvc-2010-360.vcxproj.filters @@ -0,0 +1,186 @@ + + + + + {4FC737F1-C7A5-4376-A066-2A32D752A2FF} + cpp;c;cxx;def;odl;idl;hpj;bat;asm;asmx + + + {93995380-89BD-4b04-88EB-625FBE52EBFB} + h;hpp;hxx;hm;inl;inc;xsd + + + {c0268b8d-1c7d-44d5-ae67-e3e365c991b7} + + + {c3d17076-e795-431e-b50f-7606c81367b9} + + + {5351583e-dbd9-4060-8497-6ddfd31e3666} + + + {943f2af4-23b4-43eb-b9cd-91cc7af172c5} + + + {ff45bed3-12a9-437d-ac34-7e83518ba624} + + + {f0c37c57-d905-4002-a129-5b9ffc907c05} + + + {2f0a4c83-ad74-4742-baef-35fafdca0e67} + + + {c90aed8d-25e3-439e-acec-f66acc8b4c0d} + + + {d8d4356b-c678-422e-aa12-9f52ba60fdbc} + + + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files\z80 + + + Source Files\sound + + + Source Files\sound + + + Source Files\sound + + + Source Files\sound + + + Source Files\sound + + + Source Files\ntsc + + + Source Files\ntsc + + + Source Files\m68k + + + Source Files\m68k + + + Source Files\libretro + + + Source Files\input_hw + + + Source Files\input_hw + + + Source Files\input_hw + + + Source Files\input_hw + + + Source Files\input_hw + + + Source Files\input_hw + + + Source Files\input_hw + + + Source Files\input_hw + + + Source Files\input_hw + + + Source Files\input_hw + + + Source Files\cart_hw + + + Source Files\cart_hw + + + Source Files\cart_hw + + + Source Files\cart_hw + + + Source Files\cart_hw + + + Source Files\cart_hw\svp + + + Source Files\cart_hw\svp + + + Source Files\cd_hw + + + Source Files\cd_hw + + + Source Files\cd_hw + + + Source Files\cd_hw + + + Source Files\cd_hw + + + Source Files\cd_hw + + + Source Files\sound + + + Source Files\cart_hw + + + Source Files\cart_hw + + + Source Files\cart_hw + + + diff --git a/genplus-gx/libretro/msvc/msvc-2010.sln b/genplus-gx/libretro/msvc/msvc-2010.sln new file mode 100644 index 0000000000..0c72fd538b --- /dev/null +++ b/genplus-gx/libretro/msvc/msvc-2010.sln @@ -0,0 +1,20 @@ + +Microsoft Visual Studio Solution File, Format Version 11.00 +# Visual Studio 2010 +Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "msvc-2010", "msvc-2010/msvc-2010.vcxproj", "{29DF2EE7-2930-4BD3-8AC5-81A2534ACC99}" +EndProject +Global + GlobalSection(SolutionConfigurationPlatforms) = preSolution + Debug|Win32 = Debug|Win32 + Release|Win32 = Release|Win32 + EndGlobalSection + GlobalSection(ProjectConfigurationPlatforms) = postSolution + {29DF2EE7-2930-4BD3-8AC5-81A2534ACC99}.Debug|Win32.ActiveCfg = Debug|Win32 + {29DF2EE7-2930-4BD3-8AC5-81A2534ACC99}.Debug|Win32.Build.0 = Debug|Win32 + {29DF2EE7-2930-4BD3-8AC5-81A2534ACC99}.Release|Win32.ActiveCfg = Release|Win32 + {29DF2EE7-2930-4BD3-8AC5-81A2534ACC99}.Release|Win32.Build.0 = Release|Win32 + EndGlobalSection + GlobalSection(SolutionProperties) = preSolution + HideSolutionNode = FALSE + EndGlobalSection +EndGlobal diff --git a/genplus-gx/libretro/msvc/msvc-2010/libretro.def b/genplus-gx/libretro/msvc/msvc-2010/libretro.def new file mode 100644 index 0000000000..364b2ce4ce --- /dev/null +++ b/genplus-gx/libretro/msvc/msvc-2010/libretro.def @@ -0,0 +1,27 @@ +LIBRARY "libretro-prboom msvc2010" +EXPORTS +retro_set_environment +retro_set_video_refresh +retro_set_audio_sample +retro_set_audio_sample_batch +retro_set_input_poll +retro_set_input_state +retro_init +retro_deinit +retro_api_version +retro_get_system_info +retro_get_system_av_info +retro_set_controller_port_device +retro_reset +retro_run +retro_serialize_size +retro_serialize +retro_unserialize +retro_cheat_reset +retro_cheat_set +retro_load_game +retro_load_game_special +retro_unload_game +retro_get_region +retro_get_memory_data +retro_get_memory_size diff --git a/genplus-gx/libretro/msvc/msvc-2010/msvc-2010.vcxproj b/genplus-gx/libretro/msvc/msvc-2010/msvc-2010.vcxproj new file mode 100644 index 0000000000..e1fdf15d94 --- /dev/null +++ b/genplus-gx/libretro/msvc/msvc-2010/msvc-2010.vcxproj @@ -0,0 +1,145 @@ + + + + + Debug + Win32 + + + Release + Win32 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + {29DF2EE7-2930-4BD3-8AC5-81A2534ACC99} + Win32Proj + msvc2010 + genesis-next-msvc-2010 + + + + DynamicLibrary + true + Unicode + + + DynamicLibrary + false + true + Unicode + + + + + + + + + + + + + true + libgenplusgx + + + false + libgenplusgx + + + + + + Level3 + Disabled + WIN32;_DEBUG;_WINDOWS;_USRDLL;MSVC2010_EXPORTS;_CRT_SECURE_NO_WARNINGS;INLINE=static _inline;__inline__=_inline;__extension__=;LSB_FIRST;USE_32BPP_RENDERING;FRONTEND_SUPPORTS_RGB565;%(PreprocessorDefinitions) + $(SolutionDir)/../../core;$(SolutionDir)/../../utils/zlib;$(SolutionDir)/../../core/cart_hw/svp;$(SolutionDir)/../../libretro;$(SolutionDir)/../../core/m68k;$(SolutionDir)/../../core/z80;$(SolutionDir)/../../core/input_hw;$(SolutionDir)/../../core/cart_hw;$(SolutionDir)/../../core/sound;$(SolutionDir)/../../core/ntsc;$(SolutionDir)/../../core/cd_hw;%(AdditionalIncludeDirectories) + + + Windows + true + + + + + copy /y $(TargetDir)$(TargetFileName) $(ProjectDir)..\..\..\..\output\dll\$(TargetFileName) + + + + + Level3 + + + MaxSpeed + true + true + WIN32;NDEBUG;_WINDOWS;_USRDLL;MSVC2010_EXPORTS;_CRT_SECURE_NO_WARNINGS;INLINE=static _inline;__inline__=_inline;__extension__=;LSB_FIRST;USE_32BPP_RENDERING;FRONTEND_SUPPORTS_RGB565;%(PreprocessorDefinitions) + $(SolutionDir)/../../core;$(SolutionDir)/../../utils/zlib;$(SolutionDir)/../../core/cart_hw/svp;$(SolutionDir)/../../libretro;$(SolutionDir)/../../core/m68k;$(SolutionDir)/../../core/z80;$(SolutionDir)/../../core/input_hw;$(SolutionDir)/../../core/cart_hw;$(SolutionDir)/../../core/sound;$(SolutionDir)/../../core/ntsc;$(SolutionDir)/../../core/cd_hw;%(AdditionalIncludeDirectories) + + + Windows + true + true + true + + + + + copy /y $(TargetDir)$(TargetFileName) $(ProjectDir)..\..\..\..\output\dll\$(TargetFileName) + + + + + + \ No newline at end of file diff --git a/genplus-gx/libretro/msvc/msvc-2010/msvc-2010.vcxproj.filters b/genplus-gx/libretro/msvc/msvc-2010/msvc-2010.vcxproj.filters new file mode 100644 index 0000000000..de5c4cfc9a --- /dev/null +++ b/genplus-gx/libretro/msvc/msvc-2010/msvc-2010.vcxproj.filters @@ -0,0 +1,196 @@ + + + + + {4FC737F1-C7A5-4376-A066-2A32D752A2FF} + cpp;c;cc;cxx;def;odl;idl;hpj;bat;asm;asmx + + + {93995380-89BD-4b04-88EB-625FBE52EBFB} + h;hpp;hxx;hm;inl;inc;xsd + + + {67DA6AB6-F800-4c08-8B7A-83BB121AAD01} + rc;ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe;resx;tiff;tif;png;wav;mfcribbon-ms + + + {e0f9ca3b-df0f-4cf9-bde1-9fa3c945b0df} + + + {0605ef1a-d898-494c-a898-8f06000646ae} + + + {8b373848-96f7-4410-a466-5d7cb6866b0f} + + + {ea37a461-94f4-40e3-91a8-2b254b94f547} + + + {becebb08-7987-4fe3-8ee0-dd47889d4996} + + + {e66cf784-cb76-4a70-a2e0-327a3b4c96eb} + + + {39a1110f-2062-4e3c-9f43-aca63cc20cda} + + + {95e90e29-1915-4f70-b6e0-50b9dace48cf} + + + {eba4b43d-dbd8-4170-9853-e3234db6dfc0} + + + {917c9b25-741c-4702-97c5-c10ecd033b20} + + + + + Source Files\cart_hw\svp + + + Source Files\cart_hw\svp + + + Source Files\cart_hw + + + Source Files\cart_hw + + + Source Files\cart_hw + + + Source Files\cart_hw + + + Source Files\cart_hw + + + Source Files\input_hw + + + Source Files\input_hw + + + Source Files\input_hw + + + Source Files\input_hw + + + Source Files\input_hw + + + Source Files\input_hw + + + Source Files\input_hw + + + Source Files\input_hw + + + Source Files\input_hw + + + Source Files\input_hw + + + Source Files\m68k + + + Source Files\m68k + + + Source Files\ntsc + + + Source Files\ntsc + + + Source Files\sound + + + Source Files\sound + + + Source Files\sound + + + Source Files\sound + + + Source Files\sound + + + Source Files\z80 + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files + + + Source Files\cd_hw + + + Source Files\cd_hw + + + Source Files\cd_hw + + + Source Files\cd_hw + + + Source Files\cd_hw + + + Source Files\cd_hw + + + Source Files\cart_hw + + + Source Files\cart_hw + + + Source Files\cart_hw + + + Source Files\sound + + + Source Files\cinterface + + + Source Files\libretro + + + \ No newline at end of file diff --git a/genplus-gx/libretro/osd.h b/genplus-gx/libretro/osd.h new file mode 100644 index 0000000000..fad583084b --- /dev/null +++ b/genplus-gx/libretro/osd.h @@ -0,0 +1,84 @@ +#ifndef _OSD_H +#define _OSD_H + +#ifdef _MSC_VER +#include +typedef unsigned char bool; +#define strncasecmp _strnicmp +#endif + +#include +#include +#include + +#define MAX_INPUTS 8 +#define MAX_KEYS 8 +#define MAXPATHLEN 1024 + +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + +#ifndef M_PI +#define M_PI 3.1415926535897932385 +#endif + +typedef struct +{ + int8 device; + uint8 port; + uint8 padtype; +} t_input_config; + +struct +{ + char version[16]; + uint8 hq_fm; + uint8 filter; + uint8 psgBoostNoise; + uint8 dac_bits; + uint8 ym2413; + uint8 mono; + int16 psg_preamp; + int16 fm_preamp; + int16 lp_range; + int16 low_freq; + int16 high_freq; + int16 lg; + int16 mg; + int16 hg; + uint8 system; + uint8 region_detect; + uint8 master_clock; + uint8 vdp_mode; + uint8 force_dtack; + uint8 addr_error; + uint8 bios; + uint8 lock_on; + uint8 overscan; + uint8 ntsc; + uint8 gg_extra; + uint8 render; + t_input_config input[MAX_INPUTS]; +} config; + +extern char GG_ROM[256]; +extern char AR_ROM[256]; +extern char SK_ROM[256]; +extern char SK_UPMEM[256]; +extern char GG_BIOS[256]; +extern char CD_BIOS_EU[256]; +extern char CD_BIOS_US[256]; +extern char CD_BIOS_JP[256]; +extern char MS_BIOS_US[256]; +extern char MS_BIOS_EU[256]; +extern char MS_BIOS_JP[256]; + +void osd_input_update(void); +int load_archive(char *filename, unsigned char *buffer, int maxsize, char *extension); + +#endif /* _OSD_H */ diff --git a/genplus-gx/libretro/qnx/playbook/.cproject b/genplus-gx/libretro/qnx/playbook/.cproject new file mode 100644 index 0000000000..d00d641a5b --- /dev/null +++ b/genplus-gx/libretro/qnx/playbook/.cproject @@ -0,0 +1,142 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/genplus-gx/libretro/qnx/playbook/.project b/genplus-gx/libretro/qnx/playbook/.project new file mode 100644 index 0000000000..9d506c56ea --- /dev/null +++ b/genplus-gx/libretro/qnx/playbook/.project @@ -0,0 +1,85 @@ + + + Genesis-Plus-GX + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -C../../.. -fMakefile.libretro platform=qnx + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + false + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + com.qnx.tools.bbt.xml.core.bbtXMLValidationBuilder + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + com.qnx.tools.ide.bbt.core.bbtnature + org.eclipse.cdt.core.ccnature + + diff --git a/genplus-gx/libretro/scrc32.c b/genplus-gx/libretro/scrc32.c new file mode 100644 index 0000000000..dc0a137d38 --- /dev/null +++ b/genplus-gx/libretro/scrc32.c @@ -0,0 +1,79 @@ +#ifndef _S_CRC32_H +#define _S_CRC32_H + +static const unsigned long crc_table[256] = { + 0x00000000L, 0x77073096L, 0xee0e612cL, 0x990951baL, 0x076dc419L, + 0x706af48fL, 0xe963a535L, 0x9e6495a3L, 0x0edb8832L, 0x79dcb8a4L, + 0xe0d5e91eL, 0x97d2d988L, 0x09b64c2bL, 0x7eb17cbdL, 0xe7b82d07L, + 0x90bf1d91L, 0x1db71064L, 0x6ab020f2L, 0xf3b97148L, 0x84be41deL, + 0x1adad47dL, 0x6ddde4ebL, 0xf4d4b551L, 0x83d385c7L, 0x136c9856L, + 0x646ba8c0L, 0xfd62f97aL, 0x8a65c9ecL, 0x14015c4fL, 0x63066cd9L, + 0xfa0f3d63L, 0x8d080df5L, 0x3b6e20c8L, 0x4c69105eL, 0xd56041e4L, + 0xa2677172L, 0x3c03e4d1L, 0x4b04d447L, 0xd20d85fdL, 0xa50ab56bL, + 0x35b5a8faL, 0x42b2986cL, 0xdbbbc9d6L, 0xacbcf940L, 0x32d86ce3L, + 0x45df5c75L, 0xdcd60dcfL, 0xabd13d59L, 0x26d930acL, 0x51de003aL, + 0xc8d75180L, 0xbfd06116L, 0x21b4f4b5L, 0x56b3c423L, 0xcfba9599L, + 0xb8bda50fL, 0x2802b89eL, 0x5f058808L, 0xc60cd9b2L, 0xb10be924L, + 0x2f6f7c87L, 0x58684c11L, 0xc1611dabL, 0xb6662d3dL, 0x76dc4190L, + 0x01db7106L, 0x98d220bcL, 0xefd5102aL, 0x71b18589L, 0x06b6b51fL, + 0x9fbfe4a5L, 0xe8b8d433L, 0x7807c9a2L, 0x0f00f934L, 0x9609a88eL, + 0xe10e9818L, 0x7f6a0dbbL, 0x086d3d2dL, 0x91646c97L, 0xe6635c01L, + 0x6b6b51f4L, 0x1c6c6162L, 0x856530d8L, 0xf262004eL, 0x6c0695edL, + 0x1b01a57bL, 0x8208f4c1L, 0xf50fc457L, 0x65b0d9c6L, 0x12b7e950L, + 0x8bbeb8eaL, 0xfcb9887cL, 0x62dd1ddfL, 0x15da2d49L, 0x8cd37cf3L, + 0xfbd44c65L, 0x4db26158L, 0x3ab551ceL, 0xa3bc0074L, 0xd4bb30e2L, + 0x4adfa541L, 0x3dd895d7L, 0xa4d1c46dL, 0xd3d6f4fbL, 0x4369e96aL, + 0x346ed9fcL, 0xad678846L, 0xda60b8d0L, 0x44042d73L, 0x33031de5L, + 0xaa0a4c5fL, 0xdd0d7cc9L, 0x5005713cL, 0x270241aaL, 0xbe0b1010L, + 0xc90c2086L, 0x5768b525L, 0x206f85b3L, 0xb966d409L, 0xce61e49fL, + 0x5edef90eL, 0x29d9c998L, 0xb0d09822L, 0xc7d7a8b4L, 0x59b33d17L, + 0x2eb40d81L, 0xb7bd5c3bL, 0xc0ba6cadL, 0xedb88320L, 0x9abfb3b6L, + 0x03b6e20cL, 0x74b1d29aL, 0xead54739L, 0x9dd277afL, 0x04db2615L, + 0x73dc1683L, 0xe3630b12L, 0x94643b84L, 0x0d6d6a3eL, 0x7a6a5aa8L, + 0xe40ecf0bL, 0x9309ff9dL, 0x0a00ae27L, 0x7d079eb1L, 0xf00f9344L, + 0x8708a3d2L, 0x1e01f268L, 0x6906c2feL, 0xf762575dL, 0x806567cbL, + 0x196c3671L, 0x6e6b06e7L, 0xfed41b76L, 0x89d32be0L, 0x10da7a5aL, + 0x67dd4accL, 0xf9b9df6fL, 0x8ebeeff9L, 0x17b7be43L, 0x60b08ed5L, + 0xd6d6a3e8L, 0xa1d1937eL, 0x38d8c2c4L, 0x4fdff252L, 0xd1bb67f1L, + 0xa6bc5767L, 0x3fb506ddL, 0x48b2364bL, 0xd80d2bdaL, 0xaf0a1b4cL, + 0x36034af6L, 0x41047a60L, 0xdf60efc3L, 0xa867df55L, 0x316e8eefL, + 0x4669be79L, 0xcb61b38cL, 0xbc66831aL, 0x256fd2a0L, 0x5268e236L, + 0xcc0c7795L, 0xbb0b4703L, 0x220216b9L, 0x5505262fL, 0xc5ba3bbeL, + 0xb2bd0b28L, 0x2bb45a92L, 0x5cb36a04L, 0xc2d7ffa7L, 0xb5d0cf31L, + 0x2cd99e8bL, 0x5bdeae1dL, 0x9b64c2b0L, 0xec63f226L, 0x756aa39cL, + 0x026d930aL, 0x9c0906a9L, 0xeb0e363fL, 0x72076785L, 0x05005713L, + 0x95bf4a82L, 0xe2b87a14L, 0x7bb12baeL, 0x0cb61b38L, 0x92d28e9bL, + 0xe5d5be0dL, 0x7cdcefb7L, 0x0bdbdf21L, 0x86d3d2d4L, 0xf1d4e242L, + 0x68ddb3f8L, 0x1fda836eL, 0x81be16cdL, 0xf6b9265bL, 0x6fb077e1L, + 0x18b74777L, 0x88085ae6L, 0xff0f6a70L, 0x66063bcaL, 0x11010b5cL, + 0x8f659effL, 0xf862ae69L, 0x616bffd3L, 0x166ccf45L, 0xa00ae278L, + 0xd70dd2eeL, 0x4e048354L, 0x3903b3c2L, 0xa7672661L, 0xd06016f7L, + 0x4969474dL, 0x3e6e77dbL, 0xaed16a4aL, 0xd9d65adcL, 0x40df0b66L, + 0x37d83bf0L, 0xa9bcae53L, 0xdebb9ec5L, 0x47b2cf7fL, 0x30b5ffe9L, + 0xbdbdf21cL, 0xcabac28aL, 0x53b39330L, 0x24b4a3a6L, 0xbad03605L, + 0xcdd70693L, 0x54de5729L, 0x23d967bfL, 0xb3667a2eL, 0xc4614ab8L, + 0x5d681b02L, 0x2a6f2b94L, 0xb40bbe37L, 0xc30c8ea1L, 0x5a05df1bL, + 0x2d02ef8dL +}; + +#define DO1_CRC32(buf) crc = crc_table[((int)crc ^ (*buf++)) & 0xff] ^ (crc >> 8); +#define DO2_CRC32(buf) DO1_CRC32(buf); DO1_CRC32(buf); +#define DO4_CRC32(buf) DO2_CRC32(buf); DO2_CRC32(buf); +#define DO8_CRC32(buf) DO4_CRC32(buf); DO4_CRC32(buf); + +unsigned long crc32(unsigned long crc, const unsigned char *buf, unsigned int len) +{ + if (buf == 0) return 0L; + crc = crc ^ 0xffffffffL; + while (len >= 8) + { + DO8_CRC32(buf); + len -= 8; + } + if (len) do { + DO1_CRC32(buf); + } while (--len); + return crc ^ 0xffffffffL; +} + +#endif diff --git a/genplus-gx/libretro/scrc32.h b/genplus-gx/libretro/scrc32.h new file mode 100644 index 0000000000..638dddc431 --- /dev/null +++ b/genplus-gx/libretro/scrc32.h @@ -0,0 +1,6 @@ +#ifndef _S_CRC32_H +#define _S_CRC32_H + +unsigned long crc32(unsigned long crc, const unsigned char *buf, unsigned int len); + +#endif diff --git a/genplus-gx/sdl/CHANGELOG.txt b/genplus-gx/sdl/CHANGELOG.txt new file mode 100644 index 0000000000..7d7d2cc780 --- /dev/null +++ b/genplus-gx/sdl/CHANGELOG.txt @@ -0,0 +1,694 @@ +-------------------- +Genesis Plus History +-------------------- + +All recent changes were backported from the GX version (Gamecube/Wii port), maintained by Eke-Eke. +Please look at http://code.google.com/p/genplus-gx/ for more infos. + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX 1.7.4 (21/06/2013) (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core/SCD] +--------------- +* fixed access to read-only registers on Main-CPU side ("Batman Returns" platform level freeze) +* fixed & improved emulation of PRG-RAM write protection register ("Lunar Eternal Blue" japanese version freeze) +* improved SUB & MAIN-CPU synchronization ("Dracula Unleashed" freeze when using US Model 2 BIOS) +* improved CPU polling detection +* improved CDD emulation & added CD drive access time for SEEK command ("Panic!/Switch" intro missing scene) +* added missing reinitialization of MAIN-CPU PRG-RAM bank on reset +* added .OGG audio tracks support through LIBTREMOR + +[Core/Sound] +--------------- +* fixed YM2612 configurable DAC depth emulation +* improved Low-Pass filter +* added optional "MONO" output mode + +[Core/VDP] +--------------- +* fixed FIFO access timings when using invalid write code value ("Clue" menu) +* fixed DMA Copy with undocumented code value ("Fatal Labyrinth" end sequence) +* minor code fixes & optimizations + +[Core/CPU] +--------------- +* optimized 68k stack read/write functions +* fixed broken 68k address error emulation +* fixed 68k interrupt behavior (prevents interrupts from being executed multiple time when 68k is halted) +* fixed Z80 registers initial state, added proper initialization when using PBC (verified on real hardware by Charles McDonald) + +[Core/MD] +--------------- +* fixed SRAM incompatibilities between BIG ENDIAN & LITTLE ENDIAN platforms (note: this breaks old .srm files with LITTLE ENDIAN platform ports) +* added support for a few recently dumped unlicensed games +* added auto-detection of byte-swapped ROM files + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX 1.7.3 (26/11/2012) (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +no win32/SDL port changes + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX 1.7.2 (24/11/2012) (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core/SCD] +--------------- +* added default TOC for Shadow of the Beast II (prevent hangs when audio tracks are missing) +* fixed CD-DA fader muting +* fixed PCM channels panning on reset +* fixed backup RAM file management when using disc swap with Mode 1 cartridge +* incremented CD drive read latency: fixes Space Adventure Cobra (freeze when opening coffin at 2nd morgue scene) +* improved CDD emulation accuracy: fixes Snatcher (freeze at the end of Act 2) & various CD player bugs +* improved MAIN-SUB memory map mirroring in SCD mode (verified on real hardware by Charles McDonald) +* implemented cycle-accurate "stopwatch" register emulation + +[Core/Sound] +--------------- +* fixed broken PSG noise frequency +* fixed incorrect Game Gear PSG stereo emulation +* implemented cycle-accurate Game Gear PSG stereo + +[Core/VDP] +--------------- +* fixed broken VDP DMA from SVP ROM latency (graphic errors in Virtua Racing) + +[Core/MD] +--------------- +* added Super Mario World 64 (unlicensed) cartridge hardware emulation + +[Core/Input] +--------------- +* added automatic detection for CD games with Justifier/Menacer support +* improved Justifier/Menacer emulation + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX 1.7.1 (13/10/2012) (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core/SCD] +--------------- +* added support for CUE files +* added CD-DA tracks emulation (needs CUE+BIN or ISO+WAV images) +* added CD fader emulation +* added CDD "Fast FW" & "Fast RW" commands emulation +* improved CDD TOC emulation (random freezes in Sonic CD, Switch/Panic, Final Fight CD and probably many others) +* improved PCM chip synchronization with SUB-CPU (missing speeches in Willy Beamish) +* fixed PCM chip emulation (random hangs in Snatcher, missing sound effects in Switch/Panic, Final Fight CD, Wonderdog...) +* fixed Word-RAM memory mode on soft-reset (missing logo gfx effects) +* fixed SUB-CPU access to unused areas when using PC-relative instructions (Final Fight CD first boss random crash) +* fixed CPU idle loop detection on memory mode register access (Pugsy CD first boss slowdown) +* fixed Mode 1 emulation (cartridge boot mode) + +[Core/Sound] +--------------- +* replaced FIR resampler by Blip Buffer for FM resampling +* modified SN76489 core for use of Blip Buffer +* improved PSG & FM chips synchronization using Blip Buffer +* added Game Gear PSG stereo support +* fixed SG-1000 specific PSG noise +* fixed YM2612 LFO AM waveform (California Games surfing event) +* fixed YM2612 phase precision +* minor optimizations to YM2612 core + +[Core/Game Gear] +--------------- +* added support for CJ Elephant Fugitive (recently released by SMS Power) +* added Game Gear extended screen option + +[Core/Genesis] +--------------- +* added support for a few recently dumped (but unreleased) games + +[Core/General] +--------------- +* improved ROM & CD image file loading +* various code cleanup + + +--------------------------------------------------------------------------------------------------------- +Genesis Plus GX 1.7.0 (01/07/2012) (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core/SCD] +--------------- +* added Mega CD / Sega CD hardware emulation (incl. Sub 68K, CDD, CDC, PCM, GFX rotation/scaling, etc) +* added .ISO & .BIN CD image file support +* added 512K backup cartridge RAM support +* added savestate support for CD games + +NOTES: +~~~~~~ +* to play CD games, original BIOS ROM files are required in /genplus/bios/ directory: unzip & rename them to bios_CD_U.bin, bios_CD_E.bin, bios_CD_J.bin +* CD audio tracks (CD-DA) are not supported (yet) + +[Core/CPU] +--------------- +* modified 68k core for Mega CD / Sega CD support +* optimized 68k core using prebuild const tables + +[Core/VDP] +--------------- +* improved DMA accuracy +* improved accuracy of nametables register & VSRAM writes during HBLANK: fixes "The Adventures of Batman & Robin" (graphical issues during 2nd Boss fight). +* added support for 8-bit VRAM writes with undocumented code value (verified on real hardware by Nemesis) + +[Core/Sound] +--------------- +* improved synchronization between SN76489 & YM2162 cores. +* improved accuracy of SN76489 core timings. + +[Core/MD] +--------------- +* added support for some recently dumped unlicensed games. +* improved emulation of 32k bankswitch hardware used by a few unlicensed games. +* fixed behavior of Z80 banked reads from 68k RAM (verified on real hardware). +* fixed support for 128K Pro Action Replay ROM. + +[Core/MS] +--------------- +* added support for all recent korean ROM dumps by SMS Power. +* added emulation of korean multi-game mapper (4-Pak All Action) +* added pseudo-random RAM pattern initialization on Mark-III and Japanese Master System (fixes "Alibaba and 40 Thieves" & "Block Hole") +* added port $3E emulation & internal BOOTROM support (Master System & Game Gear only). + +[Core/General] +--------------- +* added an option to set VDP mode (PAL/NTSC) independently from console region. +* added an option to select original system master clock frequency (PAL/NTSC/AUTO), emulation will run at selected frequency when VSYNC is disabled. +* fixed 68k context loading/saving (Sol Deace). +* fixed C89 incompatibilities for better portability. +* removed use of "long int" type for portability on 64-bit platforms. +* moved savestate zlib compression out of emulation core (for ports that don't use it). +* various optimizations. + +[Gamecube/Wii] +--------------- +* removed ROM load device selection from Load Menu: default ROM device must now be configured in menu settings. +* added specific load buttons, browsers & saved paths for each systems, this also fixes slowdowns caused by screenshot loading when browsing from slow devices. +* added support for left/right buttons as page up/down keys in ROM browsers +* added right analog stick as default "return to menu" key for Gamecube controllers +* added alternate remappable menu key combo for Gamecube controllers +* added an option to disable VSYNC (emulator is synced with audio hardware instead of video). +* added an option to boot system from "BIOS", with or without cartridge. +* added Master System & Game Gear "BIOS" support (files should be named bios_U.sms, bios_J.sms, bios_E.sms & bios.gg and copied to /genplus/bios directory). +* replaced "Hard Reset" button by a Soft Reset for systems having a Reset button (Mega Drive / Genesis & Master System) +* State & SRAM files are now only compressed when saving to Gamecube Memory Cards +* various fixes & cleanup. +* compiled with devkitPPC r26 & libogc 1.8.11. + +[Gamecube] +---------- +* improved progressive mode support when component cable is detected (hold B during startup to switch menu video mode configuration) + + +--------------------------------------------------------------------------------------------------------- +[07/08/2011] version 1.6.0 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core/Sound] +--------------- +* added YM2413 emulation in Master System compatibility mode. +* fixed SN76489 noise boost initialization. +* minor YM2612 core optimizations. + +[Core/VDP] +--------------- +* added accurate emulation of SG-1000, Master System (315-5124, 315-5246) & Game Gear VDP. +* added support for all TMS9918 rendering modes. +* improved Mega Drive VDP timings accuracy in Master System Compatibility mode. +* fixed color palette initialization. +* fixed shifted sprites rendering in Mode 4. +* modified pixel rendering support (pixel depth is now forced at compilation time). + +[Core/CPU] +--------------- +* optimized 68k core (rewrote 68k interrupt handling, removed multiple CPU types support & unused code) for 5~8% speed improvment + +[Core/IO] +--------------- +* added accurate emulation of Master System (315-5216, 315-5237, 315-5297) & Game Gear I/O controllers. +* added Terebi Oekaki tablet emulation. +* improved Mouse emulation (fixes mouse support in Cannon Fodder). +* improved Justifier emulation (fixes gun support in Lethal Enforcers 2). +* improved 6-Buttons control pad emulation (fixes Duke Nukem 3D) +* modified lightgun emulation to use common key inputs for all devices. +* 2-buttons controller is now picked by default for Master System games. + +[Core/MD] +--------------- +* added copy-protection hardware emulation for some new dumped games (Tiny Toon Adventures 3, Mighty Morphin Power Rangers & The Battle of Red Cliffs). +* added Game Toshokan in EEPROM database (verified on real cartridge). +* fixed Micro Machines 2 - Turbo Tournament EEPROM size (verified on real cartridge). +* modified SRAM banswitch hardware emulation to be more compatible with some hacks. + +[Core/MS] +--------------- +* added Cyborg Z to Korean mapper database. + +[Core/GG] +--------------- +* added 93C46 EEPROM emulation (Majors Pro Baseball, World Series Baseball & World Series Baseball 95). + +[Core/General] +--------------- +* added support for .mdx ROM format. +* added Game Gear & SG-1000 ROM support. +* added accurate emulation of SG-1000, Master System (I, II) & Game Gear hardware models for 100% compatibility. +* updated to new Genesis Plus license (see http://cgfm2.emuviews.com/) +* removed DOS port +* various code cleanup. + + +--------------------------------------------------------------------------------------------------------- +[31/03/2011] version 1.5.0 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core/VDP] +--------------- +* added support for Master System compatibility mode (Z80 ports access mode), incl. Mode 5 rendering. +* added Mode 4 rendering for both Genesis & Master System modes. +* added alternate BG planes rendering functions (should be faster on PPC architectures). + +[Core/IO] +--------------- +* added support for Master System compatibility mode (Z80 ports access mode). +* added Master System peripherals emulation (Control Pad, Paddle, Sports Pad & Light Phaser). +* added XE-1AP (analog controller) emulation. +* added Activator emulation. + +[Core/Extra] +--------------- +* added support for all known Master System cartridge mappers. +* added copy-protection hardware emulation for a few MD unlicensed games: fixes 777 Casino (crash when talking to bunny girls). +(NB: most of those unlicensed games seem to have been already patched by ROM dumpers, main purpose is documenting them) +* added support for Top Shooter arcade board controller. (A=Shoot, B=Bet, C/RIGHT=Coins, START=Start, hold UP on startup to enter service mode) +* improved King of Fighters 98 mapper emulation (registers address decoding is now 100% accurate) +* fixed Game Genie when several codes affect same ROM address. +* fixed EEPROM types for Brian Lara Cricket & NBA Jam TE (verified on real cartridges) + +[Core/General] +--------------- +* added Master System compatibility mode emulation (automatically enabled when loading ROM file with .sms extension). +* improved savestate stability & compatibility (support for old 1.4.x savestates is preserved) +* various code cleanup & comments. + + +--------------------------------------------------------------------------------------------------------- +[04/12/2010] version 1.4.1 (Eke-Eke) +--------------------------------------------------------------------------------------------------------- + +[Core/Sound] +--------------- +* implemented Blargg's blip buffer in SN76489 core (all channels are now lineary interpolated) + +[Core/VDP] +--------------- +* improved 2-cell vscroll emulation accuracy, as verified on real hardware (Gynoug, Cutie Suzuki no Ringside Angel, Formula One, Kawasaki Superbike Challenge) +* improved VBLANK flag accuracy, as observed on real hardware. +* improved DMA operations accuracy, writes are now performed on a scanline basis: fixes Gaiares (flickering title screen). +* improved DMA Fill timing accuracy. +* fixed DMA with bad code values: fixes Williams Arcade Classics (corrupted gfx after soft reset). +* fixed horizontal resolution changes during HBLANK: fixes Bugs Bunny in Double Trouble (2nd stage). +* fixed Vertical Counter in interlace mode 1, as observed on real hardware. +* fixed horizontal border width, as observed on real hardware. +* various code improvments & optimizations. + +[Core/CPU] +--------------- +* fixed state of Z80 registers on reset (sound issues with Defender & Defender 2 in Williams Arcade Classics) +* implemented 68k undocumented flags behavior for DIVU/DIVS instructions (Bloodshot / Battle Frenzy) + +[Core/Extra] +--------------- +* improved emulation of copy-protection hardware found in some unlicensed cartridges (Mulan, Pocket Monsters II). +* enabled simultaneous use of multitap & J-CART (Super Skidmarks 6-player mode) +* improved savestate format: added DMA, SVP, cartridge mapping & internal registers state informations +* improved unlicensed ROM mappers emulation +* added Chinese Fighters III mapper support +* added Top Fighter mapper support +* fixed Barver Battle Saga mapper support +* fixed cartridge hardware soft-reset (Game Genie, SVP, ...) +* fixed Game Genie registers byte reads + + +---------------------------------------------------------------------------------------------------------------------------------------------------- +[06/30/10] version 1.4.0 (Eke-Eke) +---------------------------------------------------------------------------------------------------------------------------------------------------- + +[Core/Sound] + +* completely rewrote sound processing/mixing: sound chips are now clocked with exact output framerate +to ensure 100% smooth video & audio playback, with no lag or skipping, while rendering an accurate number +of samples per frame and keeping PSG & FM chips in sync. +* improved PSG & FM chips synchronization with CPU execution (fixed point precision). +* improved YM2612 core general accuracy (SSG-EG, CSM mode,...) (based upon Nemesis recent tests on real hardware) +* improved YM2612 LFO emulation accuracy: fixes "Spider-Man & Venom : Separation Anxiety" (intro) +* fixed YM2612 bug with Timer B: fixes "Langrisser Hikari II"/"Der Langrisser II" (Sega logo) +* fixed YM2612 context saving/loading. +* fixed YM2612 state on reset. +* removed outdated & less accurate Gens YM2612 core +* added configurable YM2612 DAC resolution emulation. +* added configurable & faster FIR resampler (thanks to Blargg & AamirM), removed libsamplerate support. +* added configurable Low-Pass filtering +* added configurable 3-Band Equalizer (thanks to Neil C). +* added an option to boost SN76489 Noise Channel. +* adjusted SN76489 cut-off frequency. + + +[Core/VDP] + +* added support for CRAM writes during horizontal blanking (Striker, Zero the Kamikaze Squirrel,...) +* added support for 2-Cell vertical scrolling in Interlaced 2 mode +* added support for some undocumented mode register bits +* added proper emulation of HV Counter latch: fixes Sunset Riders intro +* added pixel-accurate emulation of mid-line display on/off (Nigel Mansell World Championship PAL, Ren & Stimpy's Invention PAL,...) +* improved FIFO timings accuracy: fixes Sol Deace intro +* improved sprite masking accuracy (thanks to Nemesis for his test program) +* improved sprites processing accuracy: fixes (un)masked sprites in Mickey Mania (3D level), Sonic 2 (VS mode). +* improved HBLANK flag timing accuracy: fixes Mega Turrican (Sky level) +* improved horizontal blanking & HINT/VINT occurence timing accuracy, as measured on real hardware. +* improved HCounter accuracy in 40-cell mode, as measured on real hardware. +* improved color accuracy in VDP highlight mode to match results observed on real hardware + + +[Core/CPU] + +* updated Z80 core to last version (fixes interrupt Mode 0 timing and some BIT instructions). +* fixed some Z80 instructions timing. +* improved Z80 interrupt accuracy +* improved 68k accuracy (initial Reset timing + auto-vectored interrupts handling). +* improved 68k timing accuracy for DIVU/DVIS (thanks to Jorge Cwik) & MULU/MULS instructions. +* improved Z80 & 68k cpu execution/synchronization accuracy by using Master Clock as common reference (now run exactly 3420 M-Cycles per line). +* modified Z80 & 68k cores to directly use external cycle count instead of intermediate counters. + + +[Core/Extra] + +* added Game Genie hardware emulation (Game Genie ROM is now fully supported). +* added Action Replay hardware emulation (Action replay ROM is now fully supported). +* added S&K "Lock-On" hardware emulation (you can "lock" any games to Sonic & Knuckles). +* added Cartridge "hot swap" feature. +* added missing EEPROM support in some games. +* added accurate TMSS emulation (VDP lock-out) +* fixed Realtec mapper emulation: fixes missing sound in Balloon Boy / Funny World. +* fixed lightgun auto-detection: fixes default cursor position in Lethal Enforcers II. +* lots of code cleanup, bugfixes & optimization. + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [12/14/08] version 1.3.0 (Eke-Eke) +---------------------------------------------------------------------------------------------------------------------------------------------------- + +* YM2612 bugfixes (MAME core): + .fixed EG Decay->Substain transition when SL & DR are minimals: fix tracks #3 and #9 in "Mega Turrican" + .fixed a bug in SSG-EG emulation code: fix Level 1 music in "Alisia Dragoon" + .modified SSG-EG Decay End Level: fix some sound effects (ChainSaw, Zap...) in "Beavis & Butthead" + .improved Detune overflow accuracy: fix very high frequency sounds in many games + .fixed registers 0x20-0x26 Reset state: fix intro music in "B.O.B" + .reverted incorrect fix with KEY ON: fix "Flamethrower" sound effect in "Alien 3" and many others +* adjusted HCounter values: fixes line flickering in "Sonic 3D" bonus stage +* adjusted VINT timing: fixes hang-up in "V.R Troopers" +* improved HBLANK flag accuracy: fixes line flickering in "Gouketsuji Ichizoku" +* fixed broken Z80 access to WRAM: fixes hang-up in "Mamono Hunter Youko" +* modified JCART emulation: fixes corrupted tracks logo in "Micro Machines 2" +* added Blargg's NTSC Filters support (NTSC video artifacts emulation) +* optimized VDP rendering core, rewrote 68k interface (memory handlers, cycle execution, interrupts): greatly improved emulation speed + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [08/26/08] (Eke-Eke) +---------------------------------------------------------------------------------------------------------------------------------------------------- + +* YM2612(MAME): fixed LFO phase update for CH3 special mode: fix sound effects in Warlock & Aladdin (thanks to AamirM) +* YM2612(MAME): fixed EG attenuation level on "KEY ON": fix Ecco 2's splash sound +* YM2612(MAME): fixed SSG-EG emulation: fix Bubba'n Stix (Track 5) and many others +* YM2612(MAME): replaced sample interpolation with libsamplerate support, High Quality mode is now more accurate +* implemented cycle-accurate HINT timings: every timing sensitive games/demos are now *finally* working fine +* fixed a bug affecting CRAM/VSRAM DMA timings +* fixed Sprite Attribute Table address mask for VRAM writes +* improved accuracy of 68k access to Z80: fix music in Pacman 2 when entering PAUSE menu +* disabled "Address Error" emulation when UMK3 hack is loaded: fix game crashing after a round ends up +* added support for some more unlicensed games: Pocket Monster, King of Fighter 98, Soul Blade (credits to Haze) +* improved Menacer emulation: fix lightgun support in Body Count & T2: The Arcade Game +* added Konami Justifier emulation: fix lightgun support in Lethal Enforcers 1 & 2 +* added Sega Mouse emulation (Populous 2, Body Count, Shangai 2, Fun'n Games, ...) + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [07/16/08] (Eke-Eke) +---------------------------------------------------------------------------------------------------------------------------------------------------- + +* adjusted (again) HINT timings: fix Double Dragon 2 (game freezed), hopefully does not break anything else +* fixed broken EEPROM support for Codemaster games +* modified input update timings: fix Dungeons & Dragons * Warriors of the Eternal Sun (thanks to Notaz) +* added support for "Ultimate Mortal Kombat Trilogy" hack (max. size supported is 10MBytes) +* added (VERY) preliminar support for PICO roms (credits to Notaz for his documentation) +* improved YM2612 emulation (credits to Nemesis for his tests on real hardware): + .implemented phase overflow emulation: improved fix for special music instrument used in Comix Zone, Flashback, Ariel, Shaq Fu... + .improved SSG-EG emulation in MAME core (also based on additional code from Alone Coder) + .improved Timers emulation accuracy + .improved Enveloppe Generator accuracy + .fixed Channel 3 CSM mode emulation + .implemented sample interpolation in MAME core to emulate the chip at original frequency (HQ YM2612 mode, from gens) + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [06/01/08] (Eke-Eke) +---------------------------------------------------------------------------------------------------------------------------------------------------- + +* improved HCounter accuracy: fix graphic glitches in "Striker (Europe)" +* improved HINT timing accuracy: fix flickering in "Zero The Kamikaze Squirrel (USA)" +* improved rendering accuracy when backdrop color is modified during HBLANK (Road Rash I/II/III) +* fixed broken Game Genie support + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [04/19/08] (Eke-Eke) +---------------------------------------------------------------------------------------------------------------------------------------------------- + +* modified VINT timings a little bit: fix lockup during Desert Strike's intro +* corrected 68k interrupts handling: fix graphic glitches in Darius II/Sagaia + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [04/06/08] (Eke-Eke) +---------------------------------------------------------------------------------------------------------------------------------------------------- + +* updated SVP core: fix some perspective issues in Virtua Racing (thanks to Notaz) +* added internal SAT update during VRAM Fill: fix unmasked sprites during Battletech's intro +* fixed m68k core issues with gcc 4.2.3: fix Xperts, Lemmings 2, M1 Abrams Battle Tank +* forced YM2612 Enveloppe update: fix intro music in Batman&Robin (thanks to Aamir) + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [03/01/08] (Eke-Eke) +---------------------------------------------------------------------------------------------------------------------------------------------------- + +* added SVP emulation: Virtua Racing is now emulated (big thanks to Notaz and TascoDeluxe) +* fixed VDP registers behaviour when VDP Mode 4 is enabled: fix Bass Masters Classic Pro, Captain Planet & The Planeeters +* corrected a bug in DMA Fill operation: fix James Pond 3, Rockman World/Megaman Willy Wars (corrupted VRAM) +* corrected typo errors in CPU cycle counters update: fix optiom screen music in "College Slam" and probably others games. +* added preliminary support of undocumented YM2612 bug: fixes soundtracks of Shaq Fu, Spiderman, Comix Zone, Ariel and some others +* added support for mappers & copy protection devices used in many unlicensed/pirate cartridges (see cart_hw.c for details) +* rewrote memory handlers for better modularity and some (little) speedup +* reduced Savestate size + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [01/07/08] (Eke-Eke) +---------------------------------------------------------------------------------------------------------------------------------------------------- + +* fixed interleaved rom detection: roms with .smd extension should now work fine +* fixed a recently introduced bug in VDP registers writes: fixes bad colors in Toy Story (intro) +* updated list of games using EEPROM: added Sports Talk Baseball (internal memory check fixed) and Brian Lara Cricket +* fixed VINT flag update when VINT is disabled: fixes NCAA College Football +* adjusted DMA timings in H32 mode: fixes flickering in Out of this World, Kawasaki Superbike Challenge & Formula One +* adjusted line rendering and HBLANK timings: fixes flickering in Nigel Mansell's World Championship Racing, Deadly Moves/Power Athlete +* fixed unmapped ROM reads through Z80 Bank: fixes Zombie High (Proto) +* added support for custom ROM/RAM mapping used by Game no Kanzume Otokuyou + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [12/28/07] (Eke-Eke) +---------------------------------------------------------------------------------------------------------------------------------------------------- + +* many sourcecode cleanup and optimization +* completely rewrote EEPROM emulation: now support all known EEPROM types (24C01-24C65) and mappers (Sega, Acclaim, EA, Codemasters) +used in a few games (now use internal game database) as external RAM. This should at least fix save support in the following games: + . NBA Jam (alternate Acclaim mapper) + . College Slam, Frank Thomas Big Hurt Baseball (24C65 type) + . NHLPA Hockey 93, Rings of Power (EA mapper) + . Micro Machines serie, Brian Lara Cricket 96/Shane Warne Cricket (Codemasters mapper) +* external RAM is now initialized to 0xFF by default: fix Micromachines 2, Dino Dini Soccer +* fixed SRAM 16-bits memory handlers: fix some Sega Sports and EA Sports games (NFL95, NBA Action 95, NHL97, NHL98,...) +* modified WRITE_xxx & READ_xxx macros for better portability and faster memory access on BIG ENDIAN platform +* completely rewrote BIG ENDIAN support in render.c and vdp.c: rendering should be a little faster +* rewrote ROM bankswitch emulation (Super Street Fighter II): ROM access are faster, using memory pointers instead of reading ROM copy from ARAM +* fixed leftmost Window/PlaneA column render and implemented Window bug (as described by Charles Mc Donald) +* improved "Sprite Limit" and "Sprite Collision" detection accuracy +* modified RGB565 Color Palette to use the full available color range (0-31;0-63) +* implemented "cycle accurate" HV Interrupt timings: fix Sesame's Street Counting Cafe, Legend of Galahad (intro) +* improved VDP access timings accuracy (added FIFO emulation): fix Double Clutch +* improved DMA timings accuracy: fix Winter Olympics (E), Arch Rivals and probably more +* fixed HCounter again: Road Rash serie (I,II,III) don't need timing hacks anymore +* fixed VCounter in Interlaced 2 mode: fix Combat Cars "VS-Mode" +* improved Interlaced 2 mode (double resolution) rendering: Sonic 2, Combat Cars ("VS-Modes") look far better +* added TMSS BIOS support (optional) +* rewrote part of the YM2162 MAME's core: fixed internal FM timers handling, removed non-YM2612 emulation code and unused multiple cpu support +* implemented "cycle accurate" FM timers & sound samples rendering +* improved Z80 Interrupt timing accuracy: fix Sonic 3 music slowdowns +* updated Z80 & 68000 cores to last MAME versions +* improved Soft Reset emulation: X-Men 2 and Eternal Champions (random character selection) now work more like on real hardware. +* added full overscan emulation (vertical & horizontal borders) for "pixel perfect" aspect ratio (tested against a real genesis) + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [07/20/07] (Eke-Eke) +---------------------------------------------------------------------------------------------------------------------------------------------------- + +* corrected TeamPlayer support: fix multiplayer in Gauntlet 4 (Sept. version), Pengo and a lot of others +* added J-Cart support: enable multiplayer in Codemasters games (Pete Sampras, Micromachines games, Super Skidmarks) +* added serial EEPROM autodetection: fix games with bad SRAM informations in header (NBA Jam TE) +* added SVP faking: display 2D graphics in Virtua Racing (the game is however still unplayable) +* added support for more internal IO registers: fixe some unlicensed games (Wisdom Tree games...) +* added preliminary support for unmapped protection device: fix some unlicensed games with special built-in hardware (Squirell King, Lion King 2...) +* added "Soft Reset" combo (in game, use L+Z triggers): this should be like pressing the RESET button on a real Genesis and this is required + in some games to enable special features or even complete the game (ex: X-Men). + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [06/21/07] (Eke-Eke) +---------------------------------------------------------------------------------------------------------------------------------------------------- + +* added Multitap support (EA 4-Way Play and Sega Teamplayer): allowed up to four players in games supporting those peripherals +* added partial Sega Menacer lightgun support (use Analog Stick): automatically set when detecting the 6-in-1 Menacer game + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [05/18/07] (Eke-Eke) +---------------------------------------------------------------------------------------------------------------------------------------------------- + +* you can now switch between FM cores without reseting the game. FM registers value are automatically restored when switching. +* removed the previous VINT timings modification because it brokes some games (Rocket Knight, Thunderforce III,...) +* added automatic Timing configuration (VDP latency, VINT timing & alternate Line Timing) at game loading, based upon specific romname detection. +This means you can still modify some of these options afterwards but they are now automatically set/unset when loading a game which need +special timing fixes. These fixes are also automatically desactivated when the current game doesn't need them. +For information, games that are actually detected and need special timings to run properly are: + .Legend of Galahad & Road Rash series (single line not rendered properly) + .Sesame Street Counting Cafe (don't boot) + .Chaos Engine/Soldiers of Fortune (graphic glitches on scrolling) + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [05/08/07] (Eke-Eke) +---------------------------------------------------------------------------------------------------------------------------------------------------- + +* VINT timings are now a little more accurate: fixes Sesame's Street Counting Cafe +* SN76496 MAX_OUTPUT back to normal +* modified FB_WNOISE value in SN76496 core according to John Kortink's last informations +* added support for Maxim's PSG core, same as used in SMSPLUS (it becomes the default PSG core) +* updated FM core to the latest MAME version +* corrected DAC output level (fixes voices and some special FX being too low) +* added support for Gens YM2612 (FM) core (MAME's one still remains default FM core) +* added configurable preamplification for each sound cores (see Emulator Options) +* added some other configurable sound options (boost overall volume, FM improvment for Gens YM2612) + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [04/11/07] (Eke-Eke) +---------------------------------------------------------------------------------------------------------------------------------------------------- + +* corrected MAX_OUTPUT value in SN76496 core: fix PSG sound (SFX) volume + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [03/17/07] (Eke-Eke) +---------------------------------------------------------------------------------------------------------------------------------------------------- + + * added an option to enable alternate line rendering timing (fix single line error in Road Rash series and Legend of Galahad's Intro) + * Color RAM update now always reset color 0 to border color (fix color glitches in Mortal Kombat,...) (thanks to Noop's for the idea) + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [03/09/07] (Eke-Eke) +---------------------------------------------------------------------------------------------------------------------------------------------------- + +* modified HV counter tables (fix graphic glitches in Skitchin's sky, Lotus 2 Recs, Panorama Cotton, Dashin Desperados & maybe more) +* completely rewrote DMA timings emulation so that it works for all games (no more cpu freezing) +* added all DMA tranfer rates handling for each three DMA modes and added dma busy flag emulation +* modified interrupts handling on VDP register #0 and #1 writes (fix Lemmings status bar) +* added VDP RAM write latency (fix Chaos Engine/Soldier of Fortune gfx glitches) +* modified FM timers handling a bit (fix Vectorman2 music) +* corrected Sprite Limit rendering (fix Sonic 1 & Micromachines 2 title screens) +* corrected IO Registers writes (fix Decap' Attack controls, no more need for alternate input) +* corrected 6 Buttons Pad emulation (fix 6buttons detection in Mortal Kombat 3, Comix Zone and other 6-buttons compatible games) +* modified sound mixing a bit according to Generator sourcecode (FM and PSG ratios seems more correct) + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [02/07/07] (Eke-Eke) +---------------------------------------------------------------------------------------------------------------------------------------------------- + +* fixed fm timers (fix missing music in Castle of Illusion, Quackshot, Undead Line, Wonderboy in Monster Lair, Cal 50, Turbo Outrun, Thundeforce 4 and maybe more) +* added complete EEPROM emulation (save support now works fine in Wonderboy5, Megaman Willy Wars, NBA Jam...) (credits to Notaz, adapted from Picodrive code) +* added preliminar dma timing emulation (fix bottom screen in Legend of Galahad) (credits to Notaz, adapted from Picodrive code) +* hack: clear Vint pending after Hint (INT level 4) acknowledge (fix Fatal Rewind) +* hack: modify read_bus16 to return a random value (fake fetch) (fix Time Killers) +* modified cpu execution timings, with more correct hblank and interrupts timing (fix ISS Deluxe, Double Dragon 2 and certainly more) (Based on Gens code) +* modified busreq mechanism: better synchro between z80 & 68k (no need to dejitter anymore) (Based on Gens code) +* added sprite collision detection (fix Strider 2) +* modified dma fill operation for big endian platform (fix Contra Hardcorps gfx garbage) + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [05/25/03] (Charles MacDonald) +---------------------------------------------------------------------------------------------------------------------------------------------------- + + * Fixed a typo that made Z80 banked access to the VDP registers always fail. + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [05/17/03] (Charles MacDonald) +---------------------------------------------------------------------------------------------------------------------------------------------------- + + * Modified the rendering code to handle unaligned longword access to memory. + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [04/20/03] (Charles MacDonald) +---------------------------------------------------------------------------------------------------------------------------------------------------- + + * Modified 68000 emulator to prevent 'tas.b $mem' from writing data back + after a read (fixes Gargoyles). + * Fixed bug in 68000 emulator to swap order of words written for address + register indirect pre-decremented writes (fixes Jim Power graphics). + * Added support for 240-line displays (for Super Skidmarks). + * Rewrote part of the interrupt handling (fixes some raster effects). + * Removed sprite collision detection code (never really worked). + * Optimized sprite rendering inner loop. + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [04/13/03] (Charles MacDonald) +---------------------------------------------------------------------------------------------------------------------------------------------------- + * Finished up memory map for VDP DMA V-bus reads. + * Fixed handling of 68000 writes to I/O chip at even addresses. + * Fixed bit 7 handling of control register in I/O chip. + * Finished up Z80 memory map. + * Added code to handle Genesis hardware lock-ups. + * Removed some faulty code from the 68000 memory map handlers. + + +---------------------------------------------------------------------------------------------------------------------------------------------------- + [03/22/03] (Charles MacDonald) +---------------------------------------------------------------------------------------------------------------------------------------------------- + + * Completed implementation of Z80 banked memory handlers. + diff --git a/genplus-gx/sdl/LICENSE.txt b/genplus-gx/sdl/LICENSE.txt new file mode 100644 index 0000000000..a8d781cfd8 --- /dev/null +++ b/genplus-gx/sdl/LICENSE.txt @@ -0,0 +1,585 @@ + +Unless otherwise explicitly stated, all code in Genesis Plus is released +under the following license: + +Copyright Charles MacDonald +Some portions copyright Nicola Salmoria and the MAME team +All rights reserved. + +Copyright (c) 2006-2013 Eke-Eke +All rights reserved. + +Redistribution and use of this code or any derivative works are permitted +provided that the following conditions are met: + +* Redistributions may not be sold, nor may they be used in a commercial +product or activity. + +* Redistributions that are modified from the original source must include the +complete source code, including the source code for all components used by a +binary built from the modified sources. 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configure for 15-bit pixels (RGB555) +# -D16BPP_RENDERING - configure for 16-bit pixels (RGB565) +# -D32BPP_RENDERING - configure for 32-bit pixels (RGB888) + +NAME = gen_sdl.exe + +CC = gcc +CFLAGS = `sdl-config --cflags` -march=i686 -O6 -fomit-frame-pointer -Wall -Wno-strict-aliasing -ansi -std=c89 -pedantic-errors +#-g -ggdb -pg +#-fomit-frame-pointer +#LDFLAGS = -pg +DEFINES = -DLSB_FIRST -DUSE_16BPP_RENDERING -DUSE_LIBTREMOR + +SRCDIR = ../core +INCLUDES = -I$(SRCDIR) -I$(SRCDIR)/z80 -I$(SRCDIR)/m68k -I$(SRCDIR)/sound -I$(SRCDIR)/input_hw -I$(SRCDIR)/cart_hw -I$(SRCDIR)/cart_hw/svp -I$(SRCDIR)/cd_hw -I$(SRCDIR)/ntsc -I$(SRCDIR)/tremor -I$(SRCDIR)/../sdl +LIBS = `sdl-config --libs` -lz -lm + +OBJDIR = ./build_sdl + +OBJECTS = $(OBJDIR)/z80.o + +OBJECTS += $(OBJDIR)/m68kcpu.o \ + $(OBJDIR)/s68kcpu.o + +OBJECTS += $(OBJDIR)/genesis.o \ + $(OBJDIR)/vdp_ctrl.o \ + $(OBJDIR)/vdp_render.o \ + $(OBJDIR)/system.o \ + $(OBJDIR)/io_ctrl.o \ + $(OBJDIR)/mem68k.o \ + $(OBJDIR)/memz80.o \ + $(OBJDIR)/membnk.o \ + $(OBJDIR)/state.o \ + $(OBJDIR)/loadrom.o + +OBJECTS += $(OBJDIR)/input.o \ + $(OBJDIR)/gamepad.o \ + $(OBJDIR)/lightgun.o \ + $(OBJDIR)/mouse.o \ + $(OBJDIR)/activator.o \ + $(OBJDIR)/xe_a1p.o \ + $(OBJDIR)/teamplayer.o \ + $(OBJDIR)/paddle.o \ + $(OBJDIR)/sportspad.o \ + $(OBJDIR)/terebi_oekaki.o + +OBJECTS += $(OBJDIR)/sound.o \ + $(OBJDIR)/sn76489.o \ + $(OBJDIR)/ym2413.o \ + $(OBJDIR)/ym2612.o + +OBJECTS += $(OBJDIR)/blip_buf.o + +OBJECTS += $(OBJDIR)/eq.o + +OBJECTS += $(OBJDIR)/sram.o \ + $(OBJDIR)/svp.o \ + $(OBJDIR)/ssp16.o \ + $(OBJDIR)/ggenie.o \ + $(OBJDIR)/areplay.o \ + $(OBJDIR)/eeprom_93c.o \ + $(OBJDIR)/eeprom_i2c.o \ + $(OBJDIR)/eeprom_spi.o \ + $(OBJDIR)/md_cart.o \ + $(OBJDIR)/sms_cart.o + +OBJECTS += $(OBJDIR)/scd.o \ + $(OBJDIR)/cdd.o \ + $(OBJDIR)/cdc.o \ + $(OBJDIR)/gfx.o \ + $(OBJDIR)/pcm.o \ + $(OBJDIR)/cd_cart.o + +OBJECTS += $(OBJDIR)/sms_ntsc.o \ + $(OBJDIR)/md_ntsc.o + +OBJECTS += $(OBJDIR)/main.o \ + $(OBJDIR)/config.o \ + $(OBJDIR)/error.o \ + $(OBJDIR)/unzip.o \ + $(OBJDIR)/fileio.o + +OBJECTS += $(OBJDIR)/bitwise.o \ + $(OBJDIR)/block.o \ + $(OBJDIR)/codebook.o \ + $(OBJDIR)/floor0.o \ + $(OBJDIR)/floor1.o \ + $(OBJDIR)/framing.o \ + $(OBJDIR)/info.o \ + $(OBJDIR)/mapping0.o \ + $(OBJDIR)/mdct.o \ + $(OBJDIR)/registry.o \ + $(OBJDIR)/res012.o \ + $(OBJDIR)/sharedbook.o \ + $(OBJDIR)/synthesis.o \ + $(OBJDIR)/vorbisfile.o \ + $(OBJDIR)/window.o + +OBJECTS += $(OBJDIR)/icon.o + +all: $(NAME) + +$(NAME): $(OBJDIR) $(OBJECTS) + $(CC) $(LDFLAGS) $(OBJECTS) $(LIBS) -o $@ + +$(OBJDIR) : + @[ -d $@ ] || mkdir -p $@ + +$(OBJDIR)/%.o : $(SRCDIR)/%.c $(SRCDIR)/%.h + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) $< -o $@ + +$(OBJDIR)/%.o : $(SRCDIR)/sound/%.c $(SRCDIR)/sound/%.h + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) $< -o $@ + +$(OBJDIR)/%.o : $(SRCDIR)/input_hw/%.c $(SRCDIR)/input_hw/%.h + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) $< -o $@ + +$(OBJDIR)/%.o : $(SRCDIR)/cart_hw/%.c $(SRCDIR)/cart_hw/%.h + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) $< -o $@ + +$(OBJDIR)/%.o : $(SRCDIR)/cart_hw/svp/%.c + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) $< -o $@ + +$(OBJDIR)/%.o : $(SRCDIR)/cart_hw/svp/%.c $(SRCDIR)/cart_hw/svp/%.h + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) $< -o $@ + +$(OBJDIR)/%.o : $(SRCDIR)/cd_hw/%.c $(SRCDIR)/cd_hw/%.h + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) $< -o $@ + +$(OBJDIR)/%.o : $(SRCDIR)/z80/%.c $(SRCDIR)/z80/%.h + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) $< -o $@ + +$(OBJDIR)/%.o : $(SRCDIR)/m68k/%.c + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) $< -o $@ + +$(OBJDIR)/%.o : $(SRCDIR)/ntsc/%.c $(SRCDIR)/ntsc/%.h + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) $< -o $@ + +$(OBJDIR)/%.o : $(SRCDIR)/tremor/%.c $(SRCDIR)/tremor/%.h + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) $< -o $@ + +$(OBJDIR)/%.o : $(SRCDIR)/tremor/%.c + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) $< -o $@ + +$(OBJDIR)/%.o : $(SRCDIR)/../sdl/%.c $(SRCDIR)/../sdl/%.h + $(CC) -c $(CFLAGS) $(INCLUDES) $(DEFINES) $< -o $@ + +$(OBJDIR)/icon.o : + windres $(SRCDIR)/../sdl/icon.rc $@ + +pack : + strip $(NAME) + upx -9 $(NAME) + +clean: + rm -f $(OBJECTS) $(NAME) diff --git a/genplus-gx/sdl/README.txt b/genplus-gx/sdl/README.txt new file mode 100644 index 0000000000..500adecab7 --- /dev/null +++ b/genplus-gx/sdl/README.txt @@ -0,0 +1,146 @@ + +DISCLAIMER: + +THIS IS A VERY BASIC & UNSTABLE PORT WHICH ONLY PURPOSE +IS TO SHOW HOW TO USE GENESIS PLUS GX CORE & INTERFACE IT +WITH SDL IN PARTICULAR. BUILDS ARE NOT MEANT TO BE REALLY +USED FOR ANYTHING ELSE BUT EASIER CORE DEBUGGING ON WINDOWS. +PLEASE DO NOT DISTRIBUTE WIN32 BINARIES WITHOUT THIS NOTICE. +END USERS SHOULD PREFERABLY USE LIBRETRO PORT WITH RETROARCH. + +---------------------------------------------------------------------------- + Genesis Plus (Windows Port) +---------------------------------------------------------------------------- + + based on the original version 1.3 + by Charles Mac Donald + WWW: http://cgfm2.emuviews.com + + version 1.7.4 + backported from Genesis Plus GX + by Eke-Eke + WWW: http://code.google.com/p/genplus-gx + E-mail: ekeeke31@gmail.com + + + What's New + ---------- + + see CHANGELOG.txt + + + Features + --------- + + * accurate emulation of SG-1000, Mark-III, Master System (I & II), Game Gear, Genesis / Mega Drive, Sega / Mega CD hardware models (incl. backwards compatibility modes) + * NTSC (60Hz) & PAL (50Hz) video hardware emulation + * accurate CDD, CDC & GFX chip emulation (Sega/Mega CD) + * CD-DA fader emulation (Sega/Mega CD) + * Mode 1 cartridge support (Sega/Mega CD) + * highly accurate 68000 & Z80 CPU emulation + * highly accurate VDP emulation (all rendering modes, mid-line changes, undocumented registers,…) & timings (HBLANK, DMA, FIFO, HV interrupts,…) + * sample-accurate YM2612,YM2413, PSG, & PCM emulation (all sound chips are running at the original frequency) + * cycle-accurate chip synchronization (68000’s/Z80/YM2612/PSG/PCM) + * high-quality audio resampling using Blip Buffer + * basic hardware latency emulation (VDP/68k, Z80/68k) + * full overscan area emulation (horizontal & vertical color borders) + * optional Game Gear extended screen mode + * internal BOOT ROM support (Master System, Genesis / Mega Drive, Sega / Mega CD) + * optional TMSS hardware emulation (Genesis / Mega Drive) + * support for Blargg's software NTSC filters + * preliminary PICO emulation + * support for raw (.bin, .gen, .md, .sms, .gg & .sg) and interleaved (.smd & .mdx) ROM files + * support for CUE+BIN, ISO+OGG & ISO+WAV CD image files + * 2-buttons, 3-buttons & 6-buttons controllers emulation + * Sega Team Player & EA 4-Way Play multitaps emulation + * Sega Mouse emulation + * Sega Paddle Control & Sports Pad analog emulation + * Terebi Oekaki tablet emulation + * Sega Light Phaser, Menacer & Justifiers lightgun emulation + * Sega Activator & XE-1AP analog controller emulation + * SVP DSP (Virtua Racing) emulation + * J-Cart adapter (Micro Machines & Pete Sampras series, Super Skidmarks) emulation + * Backup RAM (max. 64KB), I2C (24Cxx), SPI (95xxx) & MicroWire (93C46) EEPROMs emulation + * Sega/Mega CD RAM cart (max. 512KB) emulation + * “official” ROM bankswitch hardware (Super Street Fighter 2) emulation + * “official” backup RAM bankswitch hardware (Phantasy Star 4, Legend of Thor, Sonic the Hedgehog 3) emulation + * support for all known unlicensed/pirate cartridges bankswitch & copy protection hardware + * emulation of all known Master System & Game Gear cartridge “mappers” (incl. unlicensed Korean ones) + * Game Genie & Action Replay hardware emulation + * Sonic & Knuckles “Lock-On” hardware emulation + * support for ROM image up to 10MB (Ultimate MK3 hack) + + + Usage + ----- + + The Windows version runs windowed in a 16-bit desktop with 48Hz sound using SDL but + without joystick support. + + + Controls + ----- + + Arrow Keys - Directional pad + A/Q,S,D,F - buttons A, B(1), C(2), START + W,X,C,V - buttons X, Y, Z, MODE if 6-buttons controller is enabled + Tab - Hard Reset + Esc - Exit program + + F2 - Toggle Fullscreen/Windowed mode + F4 - Toggle Audio (Turbo mode must be disabled first) + F6 - Toggle Turbo mode (Audio must be disabled first) + F7 - Load Savestate (game.gpz) + F8 - Save Savestate (game.gpz) + F9 - Toggle VDP mode: PAL(50hz)/NTSC(60hz) + F10 - Soft Reset + F11 - Toggle Border emulation + F12 - Toggle Player # (test only) + + + The mouse is used for lightguns, Sega Mouse, PICO & Terebi Oekaki tablet (automatically detected when loading supported game). + + A SRAM file (game.srm) is automatically saved on exit and loaded on startup. + + + Credits + -------- + + Core(s) improvements & additional features by Eke-Eke + + Original code by Charles MacDonald + + Original Z80 core by Juergen Buchmueller + + Original Musashi 68k core by Karl Stenerud + + Original YM2612/YM2413 cores by Jarek Burczynski & Tatsuyuki Satoh + + Original SN76489 core by Maxim + + Original SVP core by Notaz + + Blip Buffer & NTSC Video filter libraries by Shay Green (Blargg) + + 3-Band EQ implementation by Neil C + + TREMOR VORBIS decoding library by Xiph.org + + Zlib by Jean-Loup Gailly & Mark Adler + + + Aknowledgements + ---------------- + + The following emulator authors: Bart Trzynadlowski, Steve Snake, Stef, Notaz, AamirM + + The regular people at spritesmind.net and smspower.org. + + The MAME team for the CPU and sound chip emulators. + + Nemesis for the researches on the YM2612 and VDP. + + Tasco Deluxe for the documentation of Realtec mapper. + + Haze for the reverse-engineering of many unlicensed games protection. + diff --git a/genplus-gx/sdl/config.c b/genplus-gx/sdl/config.c new file mode 100644 index 0000000000..408cac5423 --- /dev/null +++ b/genplus-gx/sdl/config.c @@ -0,0 +1,52 @@ + +#include "osd.h" + +t_config config; + + +void set_config_defaults(void) +{ + int i; + + /* sound options */ + config.psg_preamp = 150; + config.fm_preamp = 100; + config.hq_fm = 1; + config.psgBoostNoise = 1; + config.filter = 1; + config.low_freq = 200; + config.high_freq = 8000; + config.lg = 1.0; + config.mg = 1.0; + config.hg = 1.0; + config.lp_range = 0x9999; /* 0.6 in 16.16 fixed point */ + config.dac_bits = 14; + config.ym2413 = 2; /* = AUTO (0 = always OFF, 1 = always ON) */ + config.mono = 0; + + /* system options */ + config.system = 0; /* = AUTO (or SYSTEM_SG, SYSTEM_MARKIII, SYSTEM_SMS, SYSTEM_SMS2, SYSTEM_GG, SYSTEM_MD) */ + config.region_detect = 0; /* = AUTO (1 = USA, 2 = EUROPE, 3 = JAPAN/NTSC, 4 = JAPAN/PAL) */ + config.vdp_mode = 0; /* = AUTO (1 = NTSC, 2 = PAL) */ + config.master_clock = 0; /* = AUTO (1 = NTSC, 2 = PAL) */ + config.force_dtack = 0; + config.addr_error = 1; + config.bios = 0; + config.lock_on = 0; /* = OFF (can be TYPE_SK, TYPE_GG & TYPE_AR) */ + + /* display options */ + config.overscan = 0; /* 3 = all borders (0 = no borders , 1 = vertical borders only, 2 = horizontal borders only) */ + config.gg_extra = 0; /* 1 = show extended Game Gear screen (256x192) */ + config.render = 0; /* 1 = double resolution output (only when interlaced mode 2 is enabled) */ + + /* controllers options */ + input.system[0] = SYSTEM_MD_GAMEPAD; + input.system[1] = SYSTEM_MD_GAMEPAD; + config.gun_cursor[0] = 1; + config.gun_cursor[1] = 1; + config.invert_mouse = 0; + for (i=0;i + +static int check_zip(char *filename); + +int load_archive(char *filename, unsigned char *buffer, int maxsize, char *extension) +{ + int size = 0; + + if(check_zip(filename)) + { + unz_file_info info; + int ret = 0; + char fname[256]; + + /* Attempt to open the archive */ + unzFile *fd = unzOpen(filename); + if (!fd) return 0; + + /* Go to first file in archive */ + ret = unzGoToFirstFile(fd); + if(ret != UNZ_OK) + { + unzClose(fd); + return 0; + } + + /* Get file informations and update filename */ + ret = unzGetCurrentFileInfo(fd, &info, fname, 256, NULL, 0, NULL, 0); + if(ret != UNZ_OK) + { + unzClose(fd); + return 0; + } + + /* Compressed filename extension */ + if (extension) + { + strncpy(extension, &fname[strlen(fname) - 3], 3); + extension[3] = 0; + } + + /* Open the file for reading */ + ret = unzOpenCurrentFile(fd); + if(ret != UNZ_OK) + { + unzClose(fd); + return 0; + } + + /* Retrieve uncompressed file size */ + size = info.uncompressed_size; + if(size > maxsize) + { + size = maxsize; + } + + /* Read (decompress) the file */ + ret = unzReadCurrentFile(fd, buffer, size); + if(ret != size) + { + unzCloseCurrentFile(fd); + unzClose(fd); + return 0; + } + + /* Close the current file */ + ret = unzCloseCurrentFile(fd); + if(ret != UNZ_OK) + { + unzClose(fd); + return 0; + } + + /* Close the archive */ + ret = unzClose(fd); + if(ret != UNZ_OK) return 0; + } + else + { + /* Open file */ + gzFile *gd = gzopen(filename, "rb"); + if (!gd) return 0; + + /* Read file data */ + size = gzread(gd, buffer, maxsize); + + /* filename extension */ + if (extension) + { + strncpy(extension, &filename[strlen(filename) - 3], 3); + extension[3] = 0; + } + + /* Close file */ + gzclose(gd); + } + + /* Return loaded ROM size */ + return size; +} + +/* + Verifies if a file is a ZIP archive or not. + Returns: 1= ZIP archive, 0= not a ZIP archive +*/ +static int check_zip(char *filename) +{ + uint8 buf[2]; + FILE *fd = fopen(filename, "rb"); + if(!fd) return (0); + fread(buf, 2, 1, fd); + fclose(fd); + if(memcmp(buf, "PK", 2) == 0) return (1); + return (0); +} diff --git a/genplus-gx/sdl/fileio.h b/genplus-gx/sdl/fileio.h new file mode 100644 index 0000000000..30db2e0ec4 --- /dev/null +++ b/genplus-gx/sdl/fileio.h @@ -0,0 +1,48 @@ +/* + * fileio.c + * + * Load a normal file, or ZIP/GZ archive. + * Returns loaded ROM size (zero if an error occured) + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Charles Mac Donald + * modified by Eke-Eke (Genesis Plus GX) + * + * Redistribution and use of this code or any derivative works are permitted + * provided that the following conditions are met: + * + * - Redistributions may not be sold, nor may they be used in a commercial + * product or activity. + * + * - Redistributions that are modified from the original source must include the + * complete source code, including the source code for all components used by a + * binary built from the modified sources. However, as a special exception, the + * source code distributed need not include anything that is normally distributed + * (in either source or binary form) with the major components (compiler, kernel, + * and so on) of the operating system on which the executable runs, unless that + * component itself accompanies the executable. + * + * - Redistributions must reproduce the above copyright notice, this list of + * conditions and the following disclaimer in the documentation and/or other + * materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************/ + +#ifndef _FILEIO_H_ +#define _FILEIO_H_ + +/* Function prototypes */ +extern int load_archive(char *filename, unsigned char *buffer, int maxsize, char *extension); + +#endif /* _FILEIO_H_ */ diff --git a/genplus-gx/sdl/icon.rc b/genplus-gx/sdl/icon.rc new file mode 100644 index 0000000000..0b47594d50 --- /dev/null +++ b/genplus-gx/sdl/icon.rc @@ -0,0 +1 @@ +MAINICON ICON "md.ico" diff --git a/genplus-gx/sdl/main.c b/genplus-gx/sdl/main.c new file mode 100644 index 0000000000..1b867e1cab --- /dev/null +++ b/genplus-gx/sdl/main.c @@ -0,0 +1,934 @@ +#ifdef __WIN32__ +#include +#else +#define MessageBox(owner, text, caption, type) printf("%s: %s\n", caption, text) +#endif + +#include "SDL.h" +#include "SDL_thread.h" + +#include "shared.h" +#include "sms_ntsc.h" +#include "md_ntsc.h" + +#define SOUND_FREQUENCY 48000 +#define SOUND_SAMPLES_SIZE 2048 + +#define VIDEO_WIDTH 320 +#define VIDEO_HEIGHT 240 + +int joynum = 0; + +int log_error = 0; +int debug_on = 0; +int turbo_mode = 0; +int use_sound = 1; +int fullscreen = 0; /* SDL_FULLSCREEN */ + +/* sound */ + +struct { + char* current_pos; + char* buffer; + int current_emulated_samples; +} sdl_sound; + + +static uint8 brm_format[0x40] = +{ + 0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x5f,0x00,0x00,0x00,0x00,0x40, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x53,0x45,0x47,0x41,0x5f,0x43,0x44,0x5f,0x52,0x4f,0x4d,0x00,0x01,0x00,0x00,0x00, + 0x52,0x41,0x4d,0x5f,0x43,0x41,0x52,0x54,0x52,0x49,0x44,0x47,0x45,0x5f,0x5f,0x5f +}; + + +static short soundframe[SOUND_SAMPLES_SIZE]; + +static void sdl_sound_callback(void *userdata, Uint8 *stream, int len) +{ + if(sdl_sound.current_emulated_samples < len) { + memset(stream, 0, len); + } + else { + memcpy(stream, sdl_sound.buffer, len); + /* loop to compensate desync */ + do { + sdl_sound.current_emulated_samples -= len; + } while(sdl_sound.current_emulated_samples > 2 * len); + memcpy(sdl_sound.buffer, + sdl_sound.current_pos - sdl_sound.current_emulated_samples, + sdl_sound.current_emulated_samples); + sdl_sound.current_pos = sdl_sound.buffer + sdl_sound.current_emulated_samples; + } +} + +static int sdl_sound_init() +{ + int n; + SDL_AudioSpec as_desired, as_obtained; + + if(SDL_Init(SDL_INIT_AUDIO) < 0) { + MessageBox(NULL, "SDL Audio initialization failed", "Error", 0); + return 0; + } + + as_desired.freq = SOUND_FREQUENCY; + as_desired.format = AUDIO_S16LSB; + as_desired.channels = 2; + as_desired.samples = SOUND_SAMPLES_SIZE; + as_desired.callback = sdl_sound_callback; + + if(SDL_OpenAudio(&as_desired, &as_obtained) == -1) { + MessageBox(NULL, "SDL Audio open failed", "Error", 0); + return 0; + } + + if(as_desired.samples != as_obtained.samples) { + MessageBox(NULL, "SDL Audio wrong setup", "Error", 0); + return 0; + } + + sdl_sound.current_emulated_samples = 0; + n = SOUND_SAMPLES_SIZE * 2 * sizeof(short) * 20; + sdl_sound.buffer = (char*)malloc(n); + if(!sdl_sound.buffer) { + MessageBox(NULL, "Can't allocate audio buffer", "Error", 0); + return 0; + } + memset(sdl_sound.buffer, 0, n); + sdl_sound.current_pos = sdl_sound.buffer; + return 1; +} + +static void sdl_sound_update(enabled) +{ + int size = audio_update(soundframe) * 2; + + if (enabled) + { + int i; + short *out; + + SDL_LockAudio(); + out = (short*)sdl_sound.current_pos; + for(i = 0; i < size; i++) + { + *out++ = soundframe[i]; + } + sdl_sound.current_pos = (char*)out; + sdl_sound.current_emulated_samples += size * sizeof(short); + SDL_UnlockAudio(); + } +} + +static void sdl_sound_close() +{ + SDL_PauseAudio(1); + SDL_CloseAudio(); + if (sdl_sound.buffer) + free(sdl_sound.buffer); +} + +/* video */ +md_ntsc_t *md_ntsc; +sms_ntsc_t *sms_ntsc; + +struct { + SDL_Surface* surf_screen; + SDL_Surface* surf_bitmap; + SDL_Rect srect; + SDL_Rect drect; + Uint32 frames_rendered; +} sdl_video; + +static int sdl_video_init() +{ + if(SDL_InitSubSystem(SDL_INIT_VIDEO) < 0) { + MessageBox(NULL, "SDL Video initialization failed", "Error", 0); + return 0; + } + sdl_video.surf_screen = SDL_SetVideoMode(VIDEO_WIDTH, VIDEO_HEIGHT, 16, SDL_SWSURFACE | fullscreen); + sdl_video.surf_bitmap = SDL_CreateRGBSurface(SDL_SWSURFACE, 720, 576, 16, 0, 0, 0, 0); + sdl_video.frames_rendered = 0; + SDL_ShowCursor(0); + return 1; +} + +static void sdl_video_update() +{ + if (system_hw == SYSTEM_MCD) + { + system_frame_scd(0); + } + else if ((system_hw & SYSTEM_PBC) == SYSTEM_MD) + { + system_frame_gen(0); + } + else + { + system_frame_sms(0); + } + + /* viewport size changed */ + if(bitmap.viewport.changed & 1) + { + bitmap.viewport.changed &= ~1; + + /* source bitmap */ + sdl_video.srect.w = bitmap.viewport.w+2*bitmap.viewport.x; + sdl_video.srect.h = bitmap.viewport.h+2*bitmap.viewport.y; + sdl_video.srect.x = 0; + sdl_video.srect.y = 0; + if (sdl_video.srect.w > VIDEO_WIDTH) + { + sdl_video.srect.x = (sdl_video.srect.w - VIDEO_WIDTH) / 2; + sdl_video.srect.w = VIDEO_WIDTH; + } + if (sdl_video.srect.h > VIDEO_HEIGHT) + { + sdl_video.srect.y = (sdl_video.srect.h - VIDEO_HEIGHT) / 2; + sdl_video.srect.h = VIDEO_HEIGHT; + } + + /* destination bitmap */ + sdl_video.drect.w = sdl_video.srect.w; + sdl_video.drect.h = sdl_video.srect.h; + sdl_video.drect.x = (VIDEO_WIDTH - sdl_video.drect.w) / 2; + sdl_video.drect.y = (VIDEO_HEIGHT - sdl_video.drect.h) / 2; + + /* clear destination surface */ + SDL_FillRect(sdl_video.surf_screen, 0, 0); + +#if 0 + if (config.render && (interlaced || config.ntsc)) rect.h *= 2; + if (config.ntsc) rect.w = (reg[12]&1) ? MD_NTSC_OUT_WIDTH(rect.w) : SMS_NTSC_OUT_WIDTH(rect.w); + if (config.ntsc) + { + sms_ntsc = (sms_ntsc_t *)malloc(sizeof(sms_ntsc_t)); + md_ntsc = (md_ntsc_t *)malloc(sizeof(md_ntsc_t)); + + switch (config.ntsc) + { + case 1: + sms_ntsc_init(sms_ntsc, &sms_ntsc_composite); + md_ntsc_init(md_ntsc, &md_ntsc_composite); + break; + case 2: + sms_ntsc_init(sms_ntsc, &sms_ntsc_svideo); + md_ntsc_init(md_ntsc, &md_ntsc_svideo); + break; + case 3: + sms_ntsc_init(sms_ntsc, &sms_ntsc_rgb); + md_ntsc_init(md_ntsc, &md_ntsc_rgb); + break; + } + } + else + { + if (sms_ntsc) + { + free(sms_ntsc); + sms_ntsc = NULL; + } + + if (md_ntsc) + { + free(md_ntsc); + md_ntsc = NULL; + } + } +#endif + } + + SDL_BlitSurface(sdl_video.surf_bitmap, &sdl_video.srect, sdl_video.surf_screen, &sdl_video.drect); + SDL_UpdateRect(sdl_video.surf_screen, 0, 0, 0, 0); + + ++sdl_video.frames_rendered; +} + +static void sdl_video_close() +{ + if (sdl_video.surf_bitmap) + SDL_FreeSurface(sdl_video.surf_bitmap); + if (sdl_video.surf_screen) + SDL_FreeSurface(sdl_video.surf_screen); +} + +/* Timer Sync */ + +struct { + SDL_sem* sem_sync; + unsigned ticks; +} sdl_sync; + +static Uint32 sdl_sync_timer_callback(Uint32 interval) +{ + SDL_SemPost(sdl_sync.sem_sync); + sdl_sync.ticks++; + if (sdl_sync.ticks == (vdp_pal ? 50 : 20)) + { + SDL_Event event; + SDL_UserEvent userevent; + + userevent.type = SDL_USEREVENT; + userevent.code = vdp_pal ? (sdl_video.frames_rendered / 3) : sdl_video.frames_rendered; + userevent.data1 = NULL; + userevent.data2 = NULL; + sdl_sync.ticks = sdl_video.frames_rendered = 0; + + event.type = SDL_USEREVENT; + event.user = userevent; + + SDL_PushEvent(&event); + } + return interval; +} + +static int sdl_sync_init() +{ + if(SDL_InitSubSystem(SDL_INIT_TIMER|SDL_INIT_EVENTTHREAD) < 0) + { + MessageBox(NULL, "SDL Timer initialization failed", "Error", 0); + return 0; + } + + sdl_sync.sem_sync = SDL_CreateSemaphore(0); + sdl_sync.ticks = 0; + return 1; +} + +static void sdl_sync_close() +{ + if(sdl_sync.sem_sync) + SDL_DestroySemaphore(sdl_sync.sem_sync); +} + +static const uint16 vc_table[4][2] = +{ + /* NTSC, PAL */ + {0xDA , 0xF2}, /* Mode 4 (192 lines) */ + {0xEA , 0x102}, /* Mode 5 (224 lines) */ + {0xDA , 0xF2}, /* Mode 4 (192 lines) */ + {0x106, 0x10A} /* Mode 5 (240 lines) */ +}; + +static int sdl_control_update(SDLKey keystate) +{ + switch (keystate) + { + case SDLK_TAB: + { + system_reset(); + break; + } + + case SDLK_F1: + { + if (SDL_ShowCursor(-1)) SDL_ShowCursor(0); + else SDL_ShowCursor(1); + break; + } + + case SDLK_F2: + { + if (fullscreen) fullscreen = 0; + else fullscreen = SDL_FULLSCREEN; + sdl_video.surf_screen = SDL_SetVideoMode(VIDEO_WIDTH, VIDEO_HEIGHT, 16, SDL_SWSURFACE | fullscreen); + break; + } + + case SDLK_F3: + { + if (config.bios == 0) config.bios = 3; + else if (config.bios == 3) config.bios = 1; + break; + } + + case SDLK_F4: + { + if (!turbo_mode) use_sound ^= 1; + break; + } + + case SDLK_F5: + { + log_error ^= 1; + break; + } + + case SDLK_F6: + { + if (!use_sound) + { + turbo_mode ^=1; + sdl_sync.ticks = 0; + } + break; + } + + case SDLK_F7: + { + FILE *f = fopen("game.gp0","rb"); + if (f) + { + uint8 buf[STATE_SIZE]; + fread(&buf, STATE_SIZE, 1, f); + state_load(buf); + fclose(f); + } + break; + } + + case SDLK_F8: + { + FILE *f = fopen("game.gp0","wb"); + if (f) + { + uint8 buf[STATE_SIZE]; + int len = state_save(buf); + fwrite(&buf, len, 1, f); + fclose(f); + } + break; + } + + case SDLK_F9: + { + config.region_detect = (config.region_detect + 1) % 5; + get_region(0); + + /* framerate has changed, reinitialize audio timings */ + audio_init(snd.sample_rate, 0); + + /* system with region BIOS should be reinitialized */ + if ((system_hw == SYSTEM_MCD) || ((system_hw & SYSTEM_SMS) && (config.bios & 1))) + { + system_init(); + system_reset(); + } + else + { + /* reinitialize I/O region register */ + if (system_hw == SYSTEM_MD) + { + io_reg[0x00] = 0x20 | region_code | (config.bios & 1); + } + else + { + io_reg[0x00] = 0x80 | (region_code >> 1); + } + + /* reinitialize VDP */ + if (vdp_pal) + { + status |= 1; + lines_per_frame = 313; + } + else + { + status &= ~1; + lines_per_frame = 262; + } + + /* reinitialize VC max value */ + switch (bitmap.viewport.h) + { + case 192: + vc_max = vc_table[0][vdp_pal]; + break; + case 224: + vc_max = vc_table[1][vdp_pal]; + break; + case 240: + vc_max = vc_table[3][vdp_pal]; + break; + } + } + break; + } + + case SDLK_F10: + { + gen_reset(0); + break; + } + + case SDLK_F11: + { + config.overscan = (config.overscan + 1) & 3; + if ((system_hw == SYSTEM_GG) && !config.gg_extra) + { + bitmap.viewport.x = (config.overscan & 2) ? 14 : -48; + } + else + { + bitmap.viewport.x = (config.overscan & 2) * 7; + } + bitmap.viewport.changed = 3; + break; + } + + case SDLK_F12: + { + joynum = (joynum + 1) % MAX_DEVICES; + while (input.dev[joynum] == NO_DEVICE) + { + joynum = (joynum + 1) % MAX_DEVICES; + } + break; + } + + case SDLK_ESCAPE: + { + return 0; + } + + default: + break; + } + + return 1; +} + +int sdl_input_update(void) +{ + uint8 *keystate = SDL_GetKeyState(NULL); + + /* reset input */ + input.pad[joynum] = 0; + + switch (input.dev[joynum]) + { + case DEVICE_LIGHTGUN: + { + /* get mouse coordinates (absolute values) */ + int x,y; + int state = SDL_GetMouseState(&x,&y); + + /* X axis */ + input.analog[joynum][0] = x - (VIDEO_WIDTH-bitmap.viewport.w)/2; + + /* Y axis */ + input.analog[joynum][1] = y - (VIDEO_HEIGHT-bitmap.viewport.h)/2; + + /* TRIGGER, B, C (Menacer only), START (Menacer & Justifier only) */ + if(state & SDL_BUTTON_LMASK) input.pad[joynum] |= INPUT_A; + if(state & SDL_BUTTON_RMASK) input.pad[joynum] |= INPUT_B; + if(state & SDL_BUTTON_MMASK) input.pad[joynum] |= INPUT_C; + if(keystate[SDLK_f]) input.pad[joynum] |= INPUT_START; + break; + } + + case DEVICE_PADDLE: + { + /* get mouse (absolute values) */ + int x; + int state = SDL_GetMouseState(&x, NULL); + + /* Range is [0;256], 128 being middle position */ + input.analog[joynum][0] = x * 256 /VIDEO_WIDTH; + + /* Button I -> 0 0 0 0 0 0 0 I*/ + if(state & SDL_BUTTON_LMASK) input.pad[joynum] |= INPUT_B; + + break; + } + + case DEVICE_SPORTSPAD: + { + /* get mouse (relative values) */ + int x,y; + int state = SDL_GetRelativeMouseState(&x,&y); + + /* Range is [0;256] */ + input.analog[joynum][0] = (unsigned char)(-x & 0xFF); + input.analog[joynum][1] = (unsigned char)(-y & 0xFF); + + /* Buttons I & II -> 0 0 0 0 0 0 II I*/ + if(state & SDL_BUTTON_LMASK) input.pad[joynum] |= INPUT_B; + if(state & SDL_BUTTON_RMASK) input.pad[joynum] |= INPUT_C; + + break; + } + + case DEVICE_MOUSE: + { + /* get mouse (relative values) */ + int x,y; + int state = SDL_GetRelativeMouseState(&x,&y); + + /* Sega Mouse range is [-256;+256] */ + input.analog[joynum][0] = x * 2; + input.analog[joynum][1] = y * 2; + + /* Vertical movement is upsidedown */ + if (!config.invert_mouse) + input.analog[joynum][1] = 0 - input.analog[joynum][1]; + + /* Start,Left,Right,Middle buttons -> 0 0 0 0 START MIDDLE RIGHT LEFT */ + if(state & SDL_BUTTON_LMASK) input.pad[joynum] |= INPUT_B; + if(state & SDL_BUTTON_RMASK) input.pad[joynum] |= INPUT_C; + if(state & SDL_BUTTON_MMASK) input.pad[joynum] |= INPUT_A; + if(keystate[SDLK_f]) input.pad[joynum] |= INPUT_START; + + break; + } + + case DEVICE_XE_A1P: + { + /* A,B,C,D,Select,START,E1,E2 buttons -> E1(?) E2(?) START SELECT(?) A B C D */ + if(keystate[SDLK_a]) input.pad[joynum] |= INPUT_START; + if(keystate[SDLK_s]) input.pad[joynum] |= INPUT_A; + if(keystate[SDLK_d]) input.pad[joynum] |= INPUT_C; + if(keystate[SDLK_f]) input.pad[joynum] |= INPUT_Y; + if(keystate[SDLK_z]) input.pad[joynum] |= INPUT_B; + if(keystate[SDLK_x]) input.pad[joynum] |= INPUT_X; + if(keystate[SDLK_c]) input.pad[joynum] |= INPUT_MODE; + if(keystate[SDLK_v]) input.pad[joynum] |= INPUT_Z; + + /* Left Analog Stick (bidirectional) */ + if(keystate[SDLK_UP]) input.analog[joynum][1]-=2; + else if(keystate[SDLK_DOWN]) input.analog[joynum][1]+=2; + else input.analog[joynum][1] = 128; + if(keystate[SDLK_LEFT]) input.analog[joynum][0]-=2; + else if(keystate[SDLK_RIGHT]) input.analog[joynum][0]+=2; + else input.analog[joynum][0] = 128; + + /* Right Analog Stick (unidirectional) */ + if(keystate[SDLK_KP8]) input.analog[joynum+1][0]-=2; + else if(keystate[SDLK_KP2]) input.analog[joynum+1][0]+=2; + else if(keystate[SDLK_KP4]) input.analog[joynum+1][0]-=2; + else if(keystate[SDLK_KP6]) input.analog[joynum+1][0]+=2; + else input.analog[joynum+1][0] = 128; + + /* Limiters */ + if (input.analog[joynum][0] > 0xFF) input.analog[joynum][0] = 0xFF; + else if (input.analog[joynum][0] < 0) input.analog[joynum][0] = 0; + if (input.analog[joynum][1] > 0xFF) input.analog[joynum][1] = 0xFF; + else if (input.analog[joynum][1] < 0) input.analog[joynum][1] = 0; + if (input.analog[joynum+1][0] > 0xFF) input.analog[joynum+1][0] = 0xFF; + else if (input.analog[joynum+1][0] < 0) input.analog[joynum+1][0] = 0; + if (input.analog[joynum+1][1] > 0xFF) input.analog[joynum+1][1] = 0xFF; + else if (input.analog[joynum+1][1] < 0) input.analog[joynum+1][1] = 0; + + break; + } + + case DEVICE_PICO: + { + /* get mouse (absolute values) */ + int x,y; + int state = SDL_GetMouseState(&x,&y); + + /* Calculate X Y axis values */ + input.analog[0][0] = 0x3c + (x * (0x17c-0x03c+1)) / VIDEO_WIDTH; + input.analog[0][1] = 0x1fc + (y * (0x2f7-0x1fc+1)) / VIDEO_HEIGHT; + + /* Map mouse buttons to player #1 inputs */ + if(state & SDL_BUTTON_MMASK) pico_current = (pico_current + 1) & 7; + if(state & SDL_BUTTON_RMASK) input.pad[0] |= INPUT_PICO_RED; + if(state & SDL_BUTTON_LMASK) input.pad[0] |= INPUT_PICO_PEN; + + break; + } + + case DEVICE_TEREBI: + { + /* get mouse (absolute values) */ + int x,y; + int state = SDL_GetMouseState(&x,&y); + + /* Calculate X Y axis values */ + input.analog[0][0] = (x * 250) / VIDEO_WIDTH; + input.analog[0][1] = (y * 250) / VIDEO_HEIGHT; + + /* Map mouse buttons to player #1 inputs */ + if(state & SDL_BUTTON_RMASK) input.pad[0] |= INPUT_B; + + break; + } + + case DEVICE_ACTIVATOR: + { + if(keystate[SDLK_g]) input.pad[joynum] |= INPUT_ACTIVATOR_7L; + if(keystate[SDLK_h]) input.pad[joynum] |= INPUT_ACTIVATOR_7U; + if(keystate[SDLK_j]) input.pad[joynum] |= INPUT_ACTIVATOR_8L; + if(keystate[SDLK_k]) input.pad[joynum] |= INPUT_ACTIVATOR_8U; + } + + default: + { + if(keystate[SDLK_a]) input.pad[joynum] |= INPUT_A; + if(keystate[SDLK_s]) input.pad[joynum] |= INPUT_B; + if(keystate[SDLK_d]) input.pad[joynum] |= INPUT_C; + if(keystate[SDLK_f]) input.pad[joynum] |= INPUT_START; + if(keystate[SDLK_z]) input.pad[joynum] |= INPUT_X; + if(keystate[SDLK_x]) input.pad[joynum] |= INPUT_Y; + if(keystate[SDLK_c]) input.pad[joynum] |= INPUT_Z; + if(keystate[SDLK_v]) input.pad[joynum] |= INPUT_MODE; + + if(keystate[SDLK_UP]) input.pad[joynum] |= INPUT_UP; + else + if(keystate[SDLK_DOWN]) input.pad[joynum] |= INPUT_DOWN; + if(keystate[SDLK_LEFT]) input.pad[joynum] |= INPUT_LEFT; + else + if(keystate[SDLK_RIGHT]) input.pad[joynum] |= INPUT_RIGHT; + + break; + } + } + return 1; +} + + +int main (int argc, char **argv) +{ + FILE *fp; + int running = 1; + + /* Print help if no game specified */ + if(argc < 2) + { + char caption[256]; + sprintf(caption, "Genesis Plus GX\\SDL\nusage: %s gamename\n", argv[0]); + MessageBox(NULL, caption, "Information", 0); + exit(1); + } + + /* set default config */ + error_init(); + set_config_defaults(); + + /* mark all BIOS as unloaded */ + system_bios = 0; + + /* Genesis BOOT ROM support (2KB max) */ + memset(boot_rom, 0xFF, 0x800); + fp = fopen(MD_BIOS, "rb"); + if (fp != NULL) + { + int i; + + /* read BOOT ROM */ + fread(boot_rom, 1, 0x800, fp); + fclose(fp); + + /* check BOOT ROM */ + if (!memcmp((char *)(boot_rom + 0x120),"GENESIS OS", 10)) + { + /* mark Genesis BIOS as loaded */ + system_bios = SYSTEM_MD; + } + + /* Byteswap ROM */ + for (i=0; i<0x800; i+=2) + { + uint8 temp = boot_rom[i]; + boot_rom[i] = boot_rom[i+1]; + boot_rom[i+1] = temp; + } + } + + /* initialize SDL */ + if(SDL_Init(0) < 0) + { + char caption[256]; + sprintf(caption, "SDL initialization failed"); + MessageBox(NULL, caption, "Error", 0); + exit(1); + } + sdl_video_init(); + if (use_sound) sdl_sound_init(); + sdl_sync_init(); + + /* initialize Genesis virtual system */ + SDL_LockSurface(sdl_video.surf_bitmap); + memset(&bitmap, 0, sizeof(t_bitmap)); + bitmap.width = 720; + bitmap.height = 576; +#if defined(USE_8BPP_RENDERING) + bitmap.pitch = (bitmap.width * 1); +#elif defined(USE_15BPP_RENDERING) + bitmap.pitch = (bitmap.width * 2); +#elif defined(USE_16BPP_RENDERING) + bitmap.pitch = (bitmap.width * 2); +#elif defined(USE_32BPP_RENDERING) + bitmap.pitch = (bitmap.width * 4); +#endif + bitmap.data = sdl_video.surf_bitmap->pixels; + SDL_UnlockSurface(sdl_video.surf_bitmap); + bitmap.viewport.changed = 3; + + /* Load game file */ + if(!load_rom(argv[1])) + { + char caption[256]; + sprintf(caption, "Error loading file `%s'.", argv[1]); + MessageBox(NULL, caption, "Error", 0); + exit(1); + } + + /* initialize system hardware */ + audio_init(SOUND_FREQUENCY, 0); + system_init(); + + /* Mega CD specific */ + if (system_hw == SYSTEM_MCD) + { + /* load internal backup RAM */ + fp = fopen("./scd.brm", "rb"); + if (fp!=NULL) + { + fread(scd.bram, 0x2000, 1, fp); + fclose(fp); + } + + /* check if internal backup RAM is formatted */ + if (memcmp(scd.bram + 0x2000 - 0x20, brm_format + 0x20, 0x20)) + { + /* clear internal backup RAM */ + memset(scd.bram, 0x00, 0x200); + + /* Internal Backup RAM size fields */ + brm_format[0x10] = brm_format[0x12] = brm_format[0x14] = brm_format[0x16] = 0x00; + brm_format[0x11] = brm_format[0x13] = brm_format[0x15] = brm_format[0x17] = (sizeof(scd.bram) / 64) - 3; + + /* format internal backup RAM */ + memcpy(scd.bram + 0x2000 - 0x40, brm_format, 0x40); + } + + /* load cartridge backup RAM */ + if (scd.cartridge.id) + { + fp = fopen("./cart.brm", "rb"); + if (fp!=NULL) + { + fread(scd.cartridge.area, scd.cartridge.mask + 1, 1, fp); + fclose(fp); + } + + /* check if cartridge backup RAM is formatted */ + if (memcmp(scd.cartridge.area + scd.cartridge.mask + 1 - 0x20, brm_format + 0x20, 0x20)) + { + /* clear cartridge backup RAM */ + memset(scd.cartridge.area, 0x00, scd.cartridge.mask + 1); + + /* Cartridge Backup RAM size fields */ + brm_format[0x10] = brm_format[0x12] = brm_format[0x14] = brm_format[0x16] = (((scd.cartridge.mask + 1) / 64) - 3) >> 8; + brm_format[0x11] = brm_format[0x13] = brm_format[0x15] = brm_format[0x17] = (((scd.cartridge.mask + 1) / 64) - 3) & 0xff; + + /* format cartridge backup RAM */ + memcpy(scd.cartridge.area + scd.cartridge.mask + 1 - sizeof(brm_format), brm_format, sizeof(brm_format)); + } + } + } + + if (sram.on) + { + /* load SRAM */ + fp = fopen("./game.srm", "rb"); + if (fp!=NULL) + { + fread(sram.sram,0x10000,1, fp); + fclose(fp); + } + } + + /* reset system hardware */ + system_reset(); + + if(use_sound) SDL_PauseAudio(0); + + /* 3 frames = 50 ms (60hz) or 60 ms (50hz) */ + if(sdl_sync.sem_sync) + SDL_SetTimer(vdp_pal ? 60 : 50, sdl_sync_timer_callback); + + /* emulation loop */ + while(running) + { + SDL_Event event; + if (SDL_PollEvent(&event)) + { + switch(event.type) + { + case SDL_USEREVENT: + { + char caption[100]; + sprintf(caption,"Genesis Plus GX - %d fps - %s)", event.user.code, (rominfo.international[0] != 0x20) ? rominfo.international : rominfo.domestic); + SDL_WM_SetCaption(caption, NULL); + break; + } + + case SDL_QUIT: + { + running = 0; + break; + } + + case SDL_KEYDOWN: + { + running = sdl_control_update(event.key.keysym.sym); + break; + } + } + } + + sdl_video_update(); + sdl_sound_update(use_sound); + + if(!turbo_mode && sdl_sync.sem_sync && sdl_video.frames_rendered % 3 == 0) + { + SDL_SemWait(sdl_sync.sem_sync); + } + } + + if (system_hw == SYSTEM_MCD) + { + /* save internal backup RAM (if formatted) */ + if (!memcmp(scd.bram + 0x2000 - 0x20, brm_format + 0x20, 0x20)) + { + fp = fopen("./scd.brm", "wb"); + if (fp!=NULL) + { + fwrite(scd.bram, 0x2000, 1, fp); + fclose(fp); + } + } + + /* save cartridge backup RAM (if formatted) */ + if (scd.cartridge.id) + { + if (!memcmp(scd.cartridge.area + scd.cartridge.mask + 1 - 0x20, brm_format + 0x20, 0x20)) + { + fp = fopen("./cart.brm", "wb"); + if (fp!=NULL) + { + fwrite(scd.cartridge.area, scd.cartridge.mask + 1, 1, fp); + fclose(fp); + } + } + } + } + + if (sram.on) + { + /* save SRAM */ + fp = fopen("./game.srm", "wb"); + if (fp!=NULL) + { + fwrite(sram.sram,0x10000,1, fp); + fclose(fp); + } + } + + audio_shutdown(); + error_shutdown(); + + sdl_video_close(); + sdl_sound_close(); + sdl_sync_close(); + SDL_Quit(); + + return 0; +} diff --git a/genplus-gx/sdl/main.h b/genplus-gx/sdl/main.h new file mode 100644 index 0000000000..dfa5d8d52e --- /dev/null +++ b/genplus-gx/sdl/main.h @@ -0,0 +1,11 @@ + +#ifndef _MAIN_H_ +#define _MAIN_H_ + +#define MAX_INPUTS 8 + +extern int debug_on; +extern int log_error; +extern int sdl_input_update(void); + +#endif /* _MAIN_H_ */ diff --git a/genplus-gx/sdl/md.ico b/genplus-gx/sdl/md.ico new file mode 100644 index 0000000000000000000000000000000000000000..7cf20f88c4ce7d1b870b7e26a1d77f28df994c3c GIT binary patch literal 42126 zcmeHQ349bq)_*{P2_cejOhQ5k1Xhmh0wEk?z#)8sXwVIO;72eR3|A!JVqih!7;tq_ z(SVAmGs7ed3FOc~P*5TPxzFVWK@>TbO9Vj-Uenh1s;YaY=kCeOZxy$TOm)?(_g>Zi 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_OSD_H_ +#define _OSD_H_ + +#include +#include +#include +#include + +#include +#include + +#include "shared.h" +#include "main.h" +#include "config.h" +#include "error.h" +#include "unzip.h" +#include "fileio.h" + +#define osd_input_update sdl_input_update + +#define GG_ROM "./ggenie.bin" +#define AR_ROM "./areplay.bin" +#define SK_ROM "./sk.bin" +#define SK_UPMEM "./sk2chip.bin" +#define CD_BIOS_US "./bios_CD_U.bin" +#define CD_BIOS_EU "./bios_CD_E.bin" +#define CD_BIOS_JP "./bios_CD_J.bin" +#define MD_BIOS "./bios_MD.bin" +#define MS_BIOS_US "./bios_U.sms" +#define MS_BIOS_EU "./bios_E.sms" +#define MS_BIOS_JP "./bios_J.sms" +#define GG_BIOS "./bios.gg" + +#endif /* _OSD_H_ */ diff --git a/genplus-gx/sdl/readme-sdl.txt b/genplus-gx/sdl/readme-sdl.txt new file mode 100644 index 0000000000..3c8eb6485a --- /dev/null +++ b/genplus-gx/sdl/readme-sdl.txt @@ -0,0 +1,5 @@ +Compile with MinGW. +You will also need to install the SDL library (http://www.libsdl.org/). +Zlib is required for zipped rom support. + +Please distribute required dlls with the executable. \ No newline at end of file diff --git a/genplus-gx/sdl/unzip.c b/genplus-gx/sdl/unzip.c new file mode 100644 index 0000000000..ef52bc6269 --- /dev/null +++ b/genplus-gx/sdl/unzip.c @@ -0,0 +1,1294 @@ +/* unzip.c -- IO on .zip files using zlib + Version 0.15 beta, Mar 19th, 1998, + + Read unzip.h for more info +*/ + + +#include +#include +#include +#include +#include "unzip.h" + +#ifdef STDC +# include +# include +# include +#endif +#ifdef NO_ERRNO_H + extern int errno; +#else + #include +#endif + + +#ifndef local + #define local static +#endif +/* compile with -Dlocal if your debugger can't find static symbols */ + + + +#if !defined(unix) && !defined(CASESENSITIVITYDEFAULT_YES) && \ + !defined(CASESENSITIVITYDEFAULT_NO) +#define CASESENSITIVITYDEFAULT_NO +#endif + + +#ifndef UNZ_BUFSIZE +#define UNZ_BUFSIZE (16384) +#endif + +#ifndef UNZ_MAXFILENAMEINZIP +#define UNZ_MAXFILENAMEINZIP (256) +#endif + +#ifndef ALLOC +# define ALLOC(size) (malloc(size)) +#endif +#ifndef TRYFREE +# define TRYFREE(p) {if (p) free(p);} +#endif + +#define SIZECENTRALDIRITEM (0x2e) +#define SIZEZIPLOCALHEADER (0x1e) + +/* I've found an old Unix (a SunOS 4.1.3_U1) without all SEEK_* defined.... */ + +#ifndef SEEK_CUR +#define SEEK_CUR 1 +#endif + +#ifndef SEEK_END +#define SEEK_END 2 +#endif + +#ifndef SEEK_SET +#define SEEK_SET 0 +#endif + +const char unz_copyright[] = + " unzip 0.15 Copyright 1998 Gilles Vollant "; + +/* unz_file_info_interntal contain internal info about a file in zipfile*/ +typedef struct unz_file_info_internal_s +{ + uLong offset_curfile;/* relative offset of local header 4 bytes */ +} unz_file_info_internal; + + +/* file_in_zip_read_info_s contain internal information about a file in zipfile, + when reading and decompress it */ +typedef struct +{ + char *read_buffer; /* internal buffer for compressed data */ + z_stream stream; /* zLib stream structure for inflate */ + + uLong pos_in_zipfile; /* position in byte on the zipfile, for fseek*/ + uLong stream_initialised; /* flag set if stream structure is initialised*/ + + uLong offset_local_extrafield;/* offset of the local extra field */ + uInt size_local_extrafield;/* size of the local extra field */ + uLong pos_local_extrafield; /* position in the local extra field in read*/ + + uLong crc32; /* crc32 of all data uncompressed */ + uLong crc32_wait; /* crc32 we must obtain after decompress all */ + uLong rest_read_compressed; /* number of byte to be decompressed */ + uLong rest_read_uncompressed;/*number of byte to be obtained after decomp*/ + FILE* file; /* io structore of the zipfile */ + uLong compression_method; /* compression method (0==store) */ + uLong byte_before_the_zipfile;/* byte before the zipfile, (>0 for sfx)*/ +} file_in_zip_read_info_s; + + +/* unz_s contain internal information about the zipfile +*/ +typedef struct +{ + FILE* file; /* io structore of the zipfile */ + unz_global_info gi; /* public global information */ + uLong byte_before_the_zipfile; /* byte before the zipfile, (>0 for sfx)*/ + uLong num_file; /* number of the current file in the zipfile*/ + uLong pos_in_central_dir; /* pos of the current file in the central dir*/ + uLong current_file_ok; /* flag about the usability of the current file*/ + uLong central_pos; /* position of the beginning of the central dir*/ + + uLong size_central_dir; /* size of the central directory */ + uLong offset_central_dir; /* offset of start of central directory with + respect to the starting disk number */ + + unz_file_info cur_file_info; /* public info about the current file in zip*/ + unz_file_info_internal cur_file_info_internal; /* private info about it*/ + file_in_zip_read_info_s* pfile_in_zip_read; /* structure about the current + file if we are decompressing it */ +} unz_s; + + +/* =========================================================================== + Read a byte from a gz_stream; update next_in and avail_in. Return EOF + for end of file. + IN assertion: the stream s has been sucessfully opened for reading. +*/ + + +local int unzlocal_getByte(fin,pi) + FILE *fin; + int *pi; +{ + unsigned char c; + int err = fread(&c, 1, 1, fin); + if (err==1) + { + *pi = (int)c; + return UNZ_OK; + } + else + { + if (ferror(fin)) + return UNZ_ERRNO; + else + return UNZ_EOF; + } +} + + +/* =========================================================================== + Reads a long in LSB order from the given gz_stream. Sets +*/ +local int unzlocal_getShort (fin,pX) + FILE* fin; + uLong *pX; +{ + uLong x ; + int i = 0; + int err; + + err = unzlocal_getByte(fin,&i); + x = (uLong)i; + + if (err==UNZ_OK) + err = unzlocal_getByte(fin,&i); + x += ((uLong)i)<<8; + + if (err==UNZ_OK) + *pX = x; + else + *pX = 0; + return err; +} + +local int unzlocal_getLong (fin,pX) + FILE* fin; + uLong *pX; +{ + uLong x ; + int i = 0; + int err; + + err = unzlocal_getByte(fin,&i); + x = (uLong)i; + + if (err==UNZ_OK) + err = unzlocal_getByte(fin,&i); + x += ((uLong)i)<<8; + + if (err==UNZ_OK) + err = unzlocal_getByte(fin,&i); + x += ((uLong)i)<<16; + + if (err==UNZ_OK) + err = unzlocal_getByte(fin,&i); + x += ((uLong)i)<<24; + + if (err==UNZ_OK) + *pX = x; + else + *pX = 0; + return err; +} + + +/* My own strcmpi / strcasecmp */ +local int strcmpcasenosensitive_internal (fileName1,fileName2) + const char* fileName1; + const char* fileName2; +{ + for (;;) + { + char c1=*(fileName1++); + char c2=*(fileName2++); + if ((c1>='a') && (c1<='z')) + c1 -= 0x20; + if ((c2>='a') && (c2<='z')) + c2 -= 0x20; + if (c1=='\0') + return ((c2=='\0') ? 0 : -1); + if (c2=='\0') + return 1; + if (c1c2) + return 1; + } +} + + +#ifdef CASESENSITIVITYDEFAULT_NO +#define CASESENSITIVITYDEFAULTVALUE 2 +#else +#define CASESENSITIVITYDEFAULTVALUE 1 +#endif + +#ifndef STRCMPCASENOSENTIVEFUNCTION +#define STRCMPCASENOSENTIVEFUNCTION strcmpcasenosensitive_internal +#endif + +/* + Compare two filename (fileName1,fileName2). + If iCaseSenisivity = 1, comparision is case sensitivity (like strcmp) + If iCaseSenisivity = 2, comparision is not case sensitivity (like strcmpi + or strcasecmp) + If iCaseSenisivity = 0, case sensitivity is defaut of your operating system + (like 1 on Unix, 2 on Windows) + +*/ +extern int ZEXPORT unzStringFileNameCompare (fileName1,fileName2,iCaseSensitivity) + const char* fileName1; + const char* fileName2; + int iCaseSensitivity; +{ + if (iCaseSensitivity==0) + iCaseSensitivity=CASESENSITIVITYDEFAULTVALUE; + + if (iCaseSensitivity==1) + return strcmp(fileName1,fileName2); + + return STRCMPCASENOSENTIVEFUNCTION(fileName1,fileName2); +} + +#define BUFREADCOMMENT (0x400) + +/* + Locate the Central directory of a zipfile (at the end, just before + the global comment) +*/ +local uLong unzlocal_SearchCentralDir(fin) + FILE *fin; +{ + unsigned char* buf; + uLong uSizeFile; + uLong uBackRead; + uLong uMaxBack=0xffff; /* maximum size of global comment */ + uLong uPosFound=0; + + if (fseek(fin,0,SEEK_END) != 0) + return 0; + + + uSizeFile = ftell( fin ); + + if (uMaxBack>uSizeFile) + uMaxBack = uSizeFile; + + buf = (unsigned char*)ALLOC(BUFREADCOMMENT+4); + if (buf==NULL) + return 0; + + uBackRead = 4; + while (uBackReaduMaxBack) + uBackRead = uMaxBack; + else + uBackRead+=BUFREADCOMMENT; + uReadPos = uSizeFile-uBackRead ; + + uReadSize = ((BUFREADCOMMENT+4) < (uSizeFile-uReadPos)) ? + (BUFREADCOMMENT+4) : (uSizeFile-uReadPos); + if (fseek(fin,uReadPos,SEEK_SET)!=0) + break; + + if (fread(buf,(uInt)uReadSize,1,fin)!=1) + break; + + for (i=(int)uReadSize-3; (i--)>0;) + if (((*(buf+i))==0x50) && ((*(buf+i+1))==0x4b) && + ((*(buf+i+2))==0x05) && ((*(buf+i+3))==0x06)) + { + uPosFound = uReadPos+i; + break; + } + + if (uPosFound!=0) + break; + } + TRYFREE(buf); + return uPosFound; +} + +/* + Open a Zip file. path contain the full pathname (by example, + on a Windows NT computer "c:\\test\\zlib109.zip" or on an Unix computer + "zlib/zlib109.zip". + If the zipfile cannot be opened (file don't exist or in not valid), the + return value is NULL. + Else, the return value is a unzFile Handle, usable with other function + of this unzip package. +*/ +extern unzFile ZEXPORT unzOpen (path) + const char *path; +{ + unz_s us; + unz_s *s; + uLong central_pos,uL; + FILE * fin ; + + uLong number_disk; /* number of the current dist, used for + spaning ZIP, unsupported, always 0*/ + uLong number_disk_with_CD; /* number the the disk with central dir, used + for spaning ZIP, unsupported, always 0*/ + uLong number_entry_CD; /* total number of entries in + the central dir + (same than number_entry on nospan) */ + + int err=UNZ_OK; + + if (unz_copyright[0]!=' ') + return NULL; + + fin=fopen(path,"rb"); + if (fin==NULL) + return NULL; + + central_pos = unzlocal_SearchCentralDir(fin); + if (central_pos==0) + err=UNZ_ERRNO; + + if (fseek(fin,central_pos,SEEK_SET)!=0) + err=UNZ_ERRNO; + + /* the signature, already checked */ + if (unzlocal_getLong(fin,&uL)!=UNZ_OK) + err=UNZ_ERRNO; + + /* number of this disk */ + if (unzlocal_getShort(fin,&number_disk)!=UNZ_OK) + err=UNZ_ERRNO; + + /* number of the disk with the start of the central directory */ + if (unzlocal_getShort(fin,&number_disk_with_CD)!=UNZ_OK) + err=UNZ_ERRNO; + + /* total number of entries in the central dir on this disk */ + if (unzlocal_getShort(fin,&us.gi.number_entry)!=UNZ_OK) + err=UNZ_ERRNO; + + /* total number of entries in the central dir */ + if (unzlocal_getShort(fin,&number_entry_CD)!=UNZ_OK) + err=UNZ_ERRNO; + + if ((number_entry_CD!=us.gi.number_entry) || + (number_disk_with_CD!=0) || + (number_disk!=0)) + err=UNZ_BADZIPFILE; + + /* size of the central directory */ + if (unzlocal_getLong(fin,&us.size_central_dir)!=UNZ_OK) + err=UNZ_ERRNO; + + /* offset of start of central directory with respect to the + starting disk number */ + if (unzlocal_getLong(fin,&us.offset_central_dir)!=UNZ_OK) + err=UNZ_ERRNO; + + /* zipfile comment length */ + if (unzlocal_getShort(fin,&us.gi.size_comment)!=UNZ_OK) + err=UNZ_ERRNO; + + if ((central_pospfile_in_zip_read!=NULL) + unzCloseCurrentFile(file); + + fclose(s->file); + TRYFREE(s); + return UNZ_OK; +} + + +/* + Write info about the ZipFile in the *pglobal_info structure. + No preparation of the structure is needed + return UNZ_OK if there is no problem. */ +extern int ZEXPORT unzGetGlobalInfo (file,pglobal_info) + unzFile file; + unz_global_info *pglobal_info; +{ + unz_s* s; + if (file==NULL) + return UNZ_PARAMERROR; + s=(unz_s*)file; + *pglobal_info=s->gi; + return UNZ_OK; +} + + +/* + Translate date/time from Dos format to tm_unz (readable more easilty) +*/ +local void unzlocal_DosDateToTmuDate (ulDosDate, ptm) + uLong ulDosDate; + tm_unz* ptm; +{ + uLong uDate; + uDate = (uLong)(ulDosDate>>16); + ptm->tm_mday = (uInt)(uDate&0x1f) ; + ptm->tm_mon = (uInt)((((uDate)&0x1E0)/0x20)-1) ; + ptm->tm_year = (uInt)(((uDate&0x0FE00)/0x0200)+1980) ; + + ptm->tm_hour = (uInt) ((ulDosDate &0xF800)/0x800); + ptm->tm_min = (uInt) ((ulDosDate&0x7E0)/0x20) ; + ptm->tm_sec = (uInt) (2*(ulDosDate&0x1f)) ; +} + +/* + Get Info about the current file in the zipfile, with internal only info +*/ +local int unzlocal_GetCurrentFileInfoInternal OF((unzFile file, + unz_file_info *pfile_info, + unz_file_info_internal + *pfile_info_internal, + char *szFileName, + uLong fileNameBufferSize, + void *extraField, + uLong extraFieldBufferSize, + char *szComment, + uLong commentBufferSize)); + +local int unzlocal_GetCurrentFileInfoInternal (file, + pfile_info, + pfile_info_internal, + szFileName, fileNameBufferSize, + extraField, extraFieldBufferSize, + szComment, commentBufferSize) + unzFile file; + unz_file_info *pfile_info; + unz_file_info_internal *pfile_info_internal; + char *szFileName; + uLong fileNameBufferSize; + void *extraField; + uLong extraFieldBufferSize; + char *szComment; + uLong commentBufferSize; +{ + unz_s* s; + unz_file_info file_info; + unz_file_info_internal file_info_internal; + int err=UNZ_OK; + uLong uMagic; + long lSeek=0; + + if (file==NULL) + return UNZ_PARAMERROR; + s=(unz_s*)file; + if (fseek(s->file,s->pos_in_central_dir+s->byte_before_the_zipfile,SEEK_SET)!=0) + err=UNZ_ERRNO; + + + /* we check the magic */ + if (err==UNZ_OK) + { + if (unzlocal_getLong(s->file,&uMagic) != UNZ_OK) + err=UNZ_ERRNO; + else if (uMagic!=0x02014b50) + err=UNZ_BADZIPFILE; + } + + if (unzlocal_getShort(s->file,&file_info.version) != UNZ_OK) + err=UNZ_ERRNO; + + if (unzlocal_getShort(s->file,&file_info.version_needed) != UNZ_OK) + err=UNZ_ERRNO; + + if (unzlocal_getShort(s->file,&file_info.flag) != UNZ_OK) + err=UNZ_ERRNO; + + if (unzlocal_getShort(s->file,&file_info.compression_method) != UNZ_OK) + err=UNZ_ERRNO; + + if (unzlocal_getLong(s->file,&file_info.dosDate) != UNZ_OK) + err=UNZ_ERRNO; + + unzlocal_DosDateToTmuDate(file_info.dosDate,&file_info.tmu_date); + + if (unzlocal_getLong(s->file,&file_info.crc) != UNZ_OK) + err=UNZ_ERRNO; + + if (unzlocal_getLong(s->file,&file_info.compressed_size) != UNZ_OK) + err=UNZ_ERRNO; + + if (unzlocal_getLong(s->file,&file_info.uncompressed_size) != UNZ_OK) + err=UNZ_ERRNO; + + if (unzlocal_getShort(s->file,&file_info.size_filename) != UNZ_OK) + err=UNZ_ERRNO; + + if (unzlocal_getShort(s->file,&file_info.size_file_extra) != UNZ_OK) + err=UNZ_ERRNO; + + if (unzlocal_getShort(s->file,&file_info.size_file_comment) != UNZ_OK) + err=UNZ_ERRNO; + + if (unzlocal_getShort(s->file,&file_info.disk_num_start) != UNZ_OK) + err=UNZ_ERRNO; + + if (unzlocal_getShort(s->file,&file_info.internal_fa) != UNZ_OK) + err=UNZ_ERRNO; + + if (unzlocal_getLong(s->file,&file_info.external_fa) != UNZ_OK) + err=UNZ_ERRNO; + + if (unzlocal_getLong(s->file,&file_info_internal.offset_curfile) != UNZ_OK) + err=UNZ_ERRNO; + + lSeek+=file_info.size_filename; + if ((err==UNZ_OK) && (szFileName!=NULL)) + { + uLong uSizeRead ; + if (file_info.size_filename0) && (fileNameBufferSize>0)) + if (fread(szFileName,(uInt)uSizeRead,1,s->file)!=1) + err=UNZ_ERRNO; + lSeek -= uSizeRead; + } + + if ((err==UNZ_OK) && (extraField!=NULL)) + { + uLong uSizeRead ; + if (file_info.size_file_extrafile,lSeek,SEEK_CUR)==0) + lSeek=0; + else + err=UNZ_ERRNO; + } + + if ((file_info.size_file_extra>0) && (extraFieldBufferSize>0)) + if (fread(extraField,(uInt)uSizeRead,1,s->file)!=1) + err=UNZ_ERRNO; + lSeek += file_info.size_file_extra - uSizeRead; + } + else + lSeek+=file_info.size_file_extra; + + if ((err==UNZ_OK) && (szComment!=NULL)) + { + uLong uSizeRead ; + if (file_info.size_file_commentfile,lSeek,SEEK_CUR)==0) + lSeek=0; + else + err=UNZ_ERRNO; + } + + if ((file_info.size_file_comment>0) && (commentBufferSize>0)) + if (fread(szComment,(uInt)uSizeRead,1,s->file)!=1) + err=UNZ_ERRNO; + lSeek+=file_info.size_file_comment - uSizeRead; + } + else + lSeek+=file_info.size_file_comment; + + if ((err==UNZ_OK) && (pfile_info!=NULL)) + *pfile_info=file_info; + + if ((err==UNZ_OK) && (pfile_info_internal!=NULL)) + *pfile_info_internal=file_info_internal; + + return err; +} + + + +/* + Write info about the ZipFile in the *pglobal_info structure. + No preparation of the structure is needed + return UNZ_OK if there is no problem. +*/ +extern int ZEXPORT unzGetCurrentFileInfo (file, + pfile_info, + szFileName, fileNameBufferSize, + extraField, extraFieldBufferSize, + szComment, commentBufferSize) + unzFile file; + unz_file_info *pfile_info; + char *szFileName; + uLong fileNameBufferSize; + void *extraField; + uLong extraFieldBufferSize; + char *szComment; + uLong commentBufferSize; +{ + return unzlocal_GetCurrentFileInfoInternal(file,pfile_info,NULL, + szFileName,fileNameBufferSize, + extraField,extraFieldBufferSize, + szComment,commentBufferSize); +} + +/* + Set the current file of the zipfile to the first file. + return UNZ_OK if there is no problem +*/ +extern int ZEXPORT unzGoToFirstFile (file) + unzFile file; +{ + int err=UNZ_OK; + unz_s* s; + if (file==NULL) + return UNZ_PARAMERROR; + s=(unz_s*)file; + s->pos_in_central_dir=s->offset_central_dir; + s->num_file=0; + err=unzlocal_GetCurrentFileInfoInternal(file,&s->cur_file_info, + &s->cur_file_info_internal, + NULL,0,NULL,0,NULL,0); + s->current_file_ok = (err == UNZ_OK); + return err; +} + + +/* + Set the current file of the zipfile to the next file. + return UNZ_OK if there is no problem + return UNZ_END_OF_LIST_OF_FILE if the actual file was the latest. +*/ +extern int ZEXPORT unzGoToNextFile (file) + unzFile file; +{ + unz_s* s; + int err; + + if (file==NULL) + return UNZ_PARAMERROR; + s=(unz_s*)file; + if (!s->current_file_ok) + return UNZ_END_OF_LIST_OF_FILE; + if (s->num_file+1==s->gi.number_entry) + return UNZ_END_OF_LIST_OF_FILE; + + s->pos_in_central_dir += SIZECENTRALDIRITEM + s->cur_file_info.size_filename + + s->cur_file_info.size_file_extra + s->cur_file_info.size_file_comment ; + s->num_file++; + err = unzlocal_GetCurrentFileInfoInternal(file,&s->cur_file_info, + &s->cur_file_info_internal, + NULL,0,NULL,0,NULL,0); + s->current_file_ok = (err == UNZ_OK); + return err; +} + + +/* + Try locate the file szFileName in the zipfile. + For the iCaseSensitivity signification, see unzipStringFileNameCompare + + return value : + UNZ_OK if the file is found. It becomes the current file. + UNZ_END_OF_LIST_OF_FILE if the file is not found +*/ +extern int ZEXPORT unzLocateFile (file, szFileName, iCaseSensitivity) + unzFile file; + const char *szFileName; + int iCaseSensitivity; +{ + unz_s* s; + int err; + + uLong num_fileSaved; + uLong pos_in_central_dirSaved; + + if (file==NULL) + return UNZ_PARAMERROR; + + if (strlen(szFileName)>=UNZ_MAXFILENAMEINZIP) + return UNZ_PARAMERROR; + + s=(unz_s*)file; + if (!s->current_file_ok) + return UNZ_END_OF_LIST_OF_FILE; + + num_fileSaved = s->num_file; + pos_in_central_dirSaved = s->pos_in_central_dir; + + err = unzGoToFirstFile(file); + + while (err == UNZ_OK) + { + char szCurrentFileName[UNZ_MAXFILENAMEINZIP+1]; + unzGetCurrentFileInfo(file,NULL, + szCurrentFileName,sizeof(szCurrentFileName)-1, + NULL,0,NULL,0); + if (unzStringFileNameCompare(szCurrentFileName, + szFileName,iCaseSensitivity)==0) + return UNZ_OK; + err = unzGoToNextFile(file); + } + + s->num_file = num_fileSaved ; + s->pos_in_central_dir = pos_in_central_dirSaved ; + return err; +} + + +/* + Read the local header of the current zipfile + Check the coherency of the local header and info in the end of central + directory about this file + store in *piSizeVar the size of extra info in local header + (filename and size of extra field data) +*/ +local int unzlocal_CheckCurrentFileCoherencyHeader (s,piSizeVar, + poffset_local_extrafield, + psize_local_extrafield) + unz_s* s; + uInt* piSizeVar; + uLong *poffset_local_extrafield; + uInt *psize_local_extrafield; +{ + uLong uMagic,uData,uFlags; + uLong size_filename; + uLong size_extra_field; + int err=UNZ_OK; + + *piSizeVar = 0; + *poffset_local_extrafield = 0; + *psize_local_extrafield = 0; + + if (fseek(s->file,s->cur_file_info_internal.offset_curfile + + s->byte_before_the_zipfile,SEEK_SET)!=0) + return UNZ_ERRNO; + + + if (err==UNZ_OK) + { + if (unzlocal_getLong(s->file,&uMagic) != UNZ_OK) + err=UNZ_ERRNO; + else if (uMagic!=0x04034b50) + err=UNZ_BADZIPFILE; + } + + if (unzlocal_getShort(s->file,&uData) != UNZ_OK) + err=UNZ_ERRNO; +/* + else if ((err==UNZ_OK) && (uData!=s->cur_file_info.wVersion)) + err=UNZ_BADZIPFILE; +*/ + if (unzlocal_getShort(s->file,&uFlags) != UNZ_OK) + err=UNZ_ERRNO; + + if (unzlocal_getShort(s->file,&uData) != UNZ_OK) + err=UNZ_ERRNO; + else if ((err==UNZ_OK) && (uData!=s->cur_file_info.compression_method)) + err=UNZ_BADZIPFILE; + + if ((err==UNZ_OK) && (s->cur_file_info.compression_method!=0) && + (s->cur_file_info.compression_method!=Z_DEFLATED)) + err=UNZ_BADZIPFILE; + + if (unzlocal_getLong(s->file,&uData) != UNZ_OK) /* date/time */ + err=UNZ_ERRNO; + + if (unzlocal_getLong(s->file,&uData) != UNZ_OK) /* crc */ + err=UNZ_ERRNO; + else if ((err==UNZ_OK) && (uData!=s->cur_file_info.crc) && + ((uFlags & 8)==0)) + err=UNZ_BADZIPFILE; + + if (unzlocal_getLong(s->file,&uData) != UNZ_OK) /* size compr */ + err=UNZ_ERRNO; + else if ((err==UNZ_OK) && (uData!=s->cur_file_info.compressed_size) && + ((uFlags & 8)==0)) + err=UNZ_BADZIPFILE; + + if (unzlocal_getLong(s->file,&uData) != UNZ_OK) /* size uncompr */ + err=UNZ_ERRNO; + else if ((err==UNZ_OK) && (uData!=s->cur_file_info.uncompressed_size) && + ((uFlags & 8)==0)) + err=UNZ_BADZIPFILE; + + + if (unzlocal_getShort(s->file,&size_filename) != UNZ_OK) + err=UNZ_ERRNO; + else if ((err==UNZ_OK) && (size_filename!=s->cur_file_info.size_filename)) + err=UNZ_BADZIPFILE; + + *piSizeVar += (uInt)size_filename; + + if (unzlocal_getShort(s->file,&size_extra_field) != UNZ_OK) + err=UNZ_ERRNO; + *poffset_local_extrafield= s->cur_file_info_internal.offset_curfile + + SIZEZIPLOCALHEADER + size_filename; + *psize_local_extrafield = (uInt)size_extra_field; + + *piSizeVar += (uInt)size_extra_field; + + return err; +} + +/* + Open for reading data the current file in the zipfile. + If there is no error and the file is opened, the return value is UNZ_OK. +*/ +extern int ZEXPORT unzOpenCurrentFile (file) + unzFile file; +{ + int err=UNZ_OK; + int Store; + uInt iSizeVar; + unz_s* s; + file_in_zip_read_info_s* pfile_in_zip_read_info; + uLong offset_local_extrafield; /* offset of the local extra field */ + uInt size_local_extrafield; /* size of the local extra field */ + + if (file==NULL) + return UNZ_PARAMERROR; + s=(unz_s*)file; + if (!s->current_file_ok) + return UNZ_PARAMERROR; + + if (s->pfile_in_zip_read != NULL) + unzCloseCurrentFile(file); + + if (unzlocal_CheckCurrentFileCoherencyHeader(s,&iSizeVar, + &offset_local_extrafield,&size_local_extrafield)!=UNZ_OK) + return UNZ_BADZIPFILE; + + pfile_in_zip_read_info = (file_in_zip_read_info_s*) + ALLOC(sizeof(file_in_zip_read_info_s)); + if (pfile_in_zip_read_info==NULL) + return UNZ_INTERNALERROR; + + pfile_in_zip_read_info->read_buffer=(char*)ALLOC(UNZ_BUFSIZE); + pfile_in_zip_read_info->offset_local_extrafield = offset_local_extrafield; + pfile_in_zip_read_info->size_local_extrafield = size_local_extrafield; + pfile_in_zip_read_info->pos_local_extrafield=0; + + if (pfile_in_zip_read_info->read_buffer==NULL) + { + TRYFREE(pfile_in_zip_read_info); + return UNZ_INTERNALERROR; + } + + pfile_in_zip_read_info->stream_initialised=0; + + if ((s->cur_file_info.compression_method!=0) && + (s->cur_file_info.compression_method!=Z_DEFLATED)) + err=UNZ_BADZIPFILE; + Store = s->cur_file_info.compression_method==0; + + pfile_in_zip_read_info->crc32_wait=s->cur_file_info.crc; + pfile_in_zip_read_info->crc32=0; + pfile_in_zip_read_info->compression_method = + s->cur_file_info.compression_method; + pfile_in_zip_read_info->file=s->file; + pfile_in_zip_read_info->byte_before_the_zipfile=s->byte_before_the_zipfile; + + pfile_in_zip_read_info->stream.total_out = 0; + + if (!Store) + { + pfile_in_zip_read_info->stream.zalloc = (alloc_func)0; + pfile_in_zip_read_info->stream.zfree = (free_func)0; + pfile_in_zip_read_info->stream.opaque = (voidpf)0; + + err=inflateInit2(&pfile_in_zip_read_info->stream, -MAX_WBITS); + if (err == Z_OK) + pfile_in_zip_read_info->stream_initialised=1; + /* windowBits is passed < 0 to tell that there is no zlib header. + * Note that in this case inflate *requires* an extra "dummy" byte + * after the compressed stream in order to complete decompression and + * return Z_STREAM_END. + * In unzip, i don't wait absolutely Z_STREAM_END because I known the + * size of both compressed and uncompressed data + */ + } + pfile_in_zip_read_info->rest_read_compressed = + s->cur_file_info.compressed_size ; + pfile_in_zip_read_info->rest_read_uncompressed = + s->cur_file_info.uncompressed_size ; + + pfile_in_zip_read_info->pos_in_zipfile = + s->cur_file_info_internal.offset_curfile + SIZEZIPLOCALHEADER + + iSizeVar; + + pfile_in_zip_read_info->stream.avail_in = (uInt)0; + + + s->pfile_in_zip_read = pfile_in_zip_read_info; + return UNZ_OK; +} + + +/* + Read bytes from the current file. + buf contain buffer where data must be copied + len the size of buf. + + return the number of byte copied if somes bytes are copied + return 0 if the end of file was reached + return <0 with error code if there is an error + (UNZ_ERRNO for IO error, or zLib error for uncompress error) +*/ +extern int ZEXPORT unzReadCurrentFile (file, buf, len) + unzFile file; + voidp buf; + unsigned len; +{ + int err=UNZ_OK; + uInt iRead = 0; + unz_s* s; + file_in_zip_read_info_s* pfile_in_zip_read_info; + if (file==NULL) + return UNZ_PARAMERROR; + s=(unz_s*)file; + pfile_in_zip_read_info=s->pfile_in_zip_read; + + if (pfile_in_zip_read_info==NULL) + return UNZ_PARAMERROR; + + if ((pfile_in_zip_read_info->read_buffer == NULL)) + return UNZ_END_OF_LIST_OF_FILE; + if (len==0) + return 0; + + pfile_in_zip_read_info->stream.next_out = (Bytef*)buf; + + pfile_in_zip_read_info->stream.avail_out = (uInt)len; + + if (len>pfile_in_zip_read_info->rest_read_uncompressed) + pfile_in_zip_read_info->stream.avail_out = + (uInt)pfile_in_zip_read_info->rest_read_uncompressed; + + while (pfile_in_zip_read_info->stream.avail_out>0) + { + if ((pfile_in_zip_read_info->stream.avail_in==0) && + (pfile_in_zip_read_info->rest_read_compressed>0)) + { + uInt uReadThis = UNZ_BUFSIZE; + if (pfile_in_zip_read_info->rest_read_compressedrest_read_compressed; + if (uReadThis == 0) + return UNZ_EOF; + if (fseek(pfile_in_zip_read_info->file, + pfile_in_zip_read_info->pos_in_zipfile + + pfile_in_zip_read_info->byte_before_the_zipfile,SEEK_SET)!=0) + return UNZ_ERRNO; + if (fread(pfile_in_zip_read_info->read_buffer,uReadThis,1, + pfile_in_zip_read_info->file)!=1) + return UNZ_ERRNO; + pfile_in_zip_read_info->pos_in_zipfile += uReadThis; + + pfile_in_zip_read_info->rest_read_compressed-=uReadThis; + + pfile_in_zip_read_info->stream.next_in = + (Bytef*)pfile_in_zip_read_info->read_buffer; + pfile_in_zip_read_info->stream.avail_in = (uInt)uReadThis; + } + + if (pfile_in_zip_read_info->compression_method==0) + { + uInt uDoCopy,i ; + if (pfile_in_zip_read_info->stream.avail_out < + pfile_in_zip_read_info->stream.avail_in) + uDoCopy = pfile_in_zip_read_info->stream.avail_out ; + else + uDoCopy = pfile_in_zip_read_info->stream.avail_in ; + + for (i=0;istream.next_out+i) = + *(pfile_in_zip_read_info->stream.next_in+i); + + pfile_in_zip_read_info->crc32 = crc32(pfile_in_zip_read_info->crc32, + pfile_in_zip_read_info->stream.next_out, + uDoCopy); + pfile_in_zip_read_info->rest_read_uncompressed-=uDoCopy; + pfile_in_zip_read_info->stream.avail_in -= uDoCopy; + pfile_in_zip_read_info->stream.avail_out -= uDoCopy; + pfile_in_zip_read_info->stream.next_out += uDoCopy; + pfile_in_zip_read_info->stream.next_in += uDoCopy; + pfile_in_zip_read_info->stream.total_out += uDoCopy; + iRead += uDoCopy; + } + else + { + uLong uTotalOutBefore,uTotalOutAfter; + const Bytef *bufBefore; + uLong uOutThis; + int flush=Z_SYNC_FLUSH; + + uTotalOutBefore = pfile_in_zip_read_info->stream.total_out; + bufBefore = pfile_in_zip_read_info->stream.next_out; + + /* + if ((pfile_in_zip_read_info->rest_read_uncompressed == + pfile_in_zip_read_info->stream.avail_out) && + (pfile_in_zip_read_info->rest_read_compressed == 0)) + flush = Z_FINISH; + */ + err=inflate(&pfile_in_zip_read_info->stream,flush); + + uTotalOutAfter = pfile_in_zip_read_info->stream.total_out; + uOutThis = uTotalOutAfter-uTotalOutBefore; + + pfile_in_zip_read_info->crc32 = + crc32(pfile_in_zip_read_info->crc32,bufBefore, + (uInt)(uOutThis)); + + pfile_in_zip_read_info->rest_read_uncompressed -= + uOutThis; + + iRead += (uInt)(uTotalOutAfter - uTotalOutBefore); + + if (err==Z_STREAM_END) + return (iRead==0) ? UNZ_EOF : iRead; + if (err!=Z_OK) + break; + } + } + + if (err==Z_OK) + return iRead; + return err; +} + + +/* + Give the current position in uncompressed data +*/ +extern z_off_t ZEXPORT unztell (file) + unzFile file; +{ + unz_s* s; + file_in_zip_read_info_s* pfile_in_zip_read_info; + if (file==NULL) + return UNZ_PARAMERROR; + s=(unz_s*)file; + pfile_in_zip_read_info=s->pfile_in_zip_read; + + if (pfile_in_zip_read_info==NULL) + return UNZ_PARAMERROR; + + return (z_off_t)pfile_in_zip_read_info->stream.total_out; +} + + +/* + return 1 if the end of file was reached, 0 elsewhere +*/ +extern int ZEXPORT unzeof (file) + unzFile file; +{ + unz_s* s; + file_in_zip_read_info_s* pfile_in_zip_read_info; + if (file==NULL) + return UNZ_PARAMERROR; + s=(unz_s*)file; + pfile_in_zip_read_info=s->pfile_in_zip_read; + + if (pfile_in_zip_read_info==NULL) + return UNZ_PARAMERROR; + + if (pfile_in_zip_read_info->rest_read_uncompressed == 0) + return 1; + else + return 0; +} + +/* + Read extra field from the current file (opened by unzOpenCurrentFile) + This is the local-header version of the extra field (sometimes, there is + more info in the local-header version than in the central-header) + + if buf==NULL, it return the size of the local extra field that can be read + + if buf!=NULL, len is the size of the buffer, the extra header is copied in + buf. + the return value is the number of bytes copied in buf, or (if <0) + the error code +*/ +extern int ZEXPORT unzGetLocalExtrafield (file,buf,len) + unzFile file; + voidp buf; + unsigned len; +{ + unz_s* s; + file_in_zip_read_info_s* pfile_in_zip_read_info; + uInt read_now; + uLong size_to_read; + + if (file==NULL) + return UNZ_PARAMERROR; + s=(unz_s*)file; + pfile_in_zip_read_info=s->pfile_in_zip_read; + + if (pfile_in_zip_read_info==NULL) + return UNZ_PARAMERROR; + + size_to_read = (pfile_in_zip_read_info->size_local_extrafield - + pfile_in_zip_read_info->pos_local_extrafield); + + if (buf==NULL) + return (int)size_to_read; + + if (len>size_to_read) + read_now = (uInt)size_to_read; + else + read_now = (uInt)len ; + + if (read_now==0) + return 0; + + if (fseek(pfile_in_zip_read_info->file, + pfile_in_zip_read_info->offset_local_extrafield + + pfile_in_zip_read_info->pos_local_extrafield,SEEK_SET)!=0) + return UNZ_ERRNO; + + if (fread(buf,(uInt)size_to_read,1,pfile_in_zip_read_info->file)!=1) + return UNZ_ERRNO; + + return (int)read_now; +} + +/* + Close the file in zip opened with unzipOpenCurrentFile + Return UNZ_CRCERROR if all the file was read but the CRC is not good +*/ +extern int ZEXPORT unzCloseCurrentFile (file) + unzFile file; +{ + int err=UNZ_OK; + + unz_s* s; + file_in_zip_read_info_s* pfile_in_zip_read_info; + if (file==NULL) + return UNZ_PARAMERROR; + s=(unz_s*)file; + pfile_in_zip_read_info=s->pfile_in_zip_read; + + if (pfile_in_zip_read_info==NULL) + return UNZ_PARAMERROR; + + + if (pfile_in_zip_read_info->rest_read_uncompressed == 0) + { + if (pfile_in_zip_read_info->crc32 != pfile_in_zip_read_info->crc32_wait) + err=UNZ_CRCERROR; + } + + + TRYFREE(pfile_in_zip_read_info->read_buffer); + pfile_in_zip_read_info->read_buffer = NULL; + if (pfile_in_zip_read_info->stream_initialised) + inflateEnd(&pfile_in_zip_read_info->stream); + + pfile_in_zip_read_info->stream_initialised = 0; + TRYFREE(pfile_in_zip_read_info); + + s->pfile_in_zip_read=NULL; + + return err; +} + + +/* + Get the global comment string of the ZipFile, in the szComment buffer. + uSizeBuf is the size of the szComment buffer. + return the number of byte copied or an error code <0 +*/ +extern int ZEXPORT unzGetGlobalComment (file, szComment, uSizeBuf) + unzFile file; + char *szComment; + uLong uSizeBuf; +{ +/* int err=UNZ_OK; */ + unz_s* s; + uLong uReadThis ; + if (file==NULL) + return UNZ_PARAMERROR; + s=(unz_s*)file; + + uReadThis = uSizeBuf; + if (uReadThis>s->gi.size_comment) + uReadThis = s->gi.size_comment; + + if (fseek(s->file,s->central_pos+22,SEEK_SET)!=0) + return UNZ_ERRNO; + + if (uReadThis>0) + { + *szComment='\0'; + if (fread(szComment,(uInt)uReadThis,1,s->file)!=1) + return UNZ_ERRNO; + } + + if ((szComment != NULL) && (uSizeBuf > s->gi.size_comment)) + *(szComment+s->gi.size_comment)='\0'; + return (int)uReadThis; +} diff --git a/genplus-gx/sdl/unzip.h b/genplus-gx/sdl/unzip.h new file mode 100644 index 0000000000..a30f79cb44 --- /dev/null +++ b/genplus-gx/sdl/unzip.h @@ -0,0 +1,273 @@ +/* unzip.h -- IO for uncompress .zip files using zlib + Version 0.15 beta, Mar 19th, 1998, + + Copyright (C) 1998 Gilles Vollant + + This unzip package allow extract file from .ZIP file, compatible with PKZip 2.04g + WinZip, InfoZip tools and compatible. + Encryption and multi volume ZipFile (span) are not supported. + Old compressions used by old PKZip 1.x are not supported + + THIS IS AN ALPHA VERSION. AT THIS STAGE OF DEVELOPPEMENT, SOMES API OR STRUCTURE + CAN CHANGE IN FUTURE VERSION !! + I WAIT FEEDBACK at mail info@winimage.com + Visit also http://www.winimage.com/zLibDll/unzip.htm for evolution + + Condition of use and distribution are the same than zlib : + + This software is provided 'as-is', without any express or implied + warranty. In no event will the authors be held liable for any damages + arising from the use of this software. + + Permission is granted to anyone to use this software for any purpose, + including commercial applications, and to alter it and redistribute it + freely, subject to the following restrictions: + + 1. The origin of this software must not be misrepresented; you must not + claim that you wrote the original software. If you use this software + in a product, an acknowledgment in the product documentation would be + appreciated but is not required. + 2. Altered source versions must be plainly marked as such, and must not be + misrepresented as being the original software. + 3. This notice may not be removed or altered from any source distribution. +*/ + +/* for more info about .ZIP format, see + ftp://ftp.cdrom.com/pub/infozip/doc/appnote-970311-iz.zip + PkWare has also a specification at : + ftp://ftp.pkware.com/probdesc.zip */ + +#ifndef _unz_H +#define _unz_H + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef _ZLIB_H +#include "zlib.h" +#endif + +#if defined(STRICTUNZIP) || defined(STRICTZIPUNZIP) +/* like the STRICT of WIN32, we define a pointer that cannot be converted + from (void*) without cast */ +typedef struct TagunzFile__ { int unused; } unzFile__; +typedef unzFile__ *unzFile; +#else +typedef voidp unzFile; +#endif + + +#define UNZ_OK (0) +#define UNZ_END_OF_LIST_OF_FILE (-100) +#define UNZ_ERRNO (Z_ERRNO) +#define UNZ_EOF (0) +#define UNZ_PARAMERROR (-102) +#define UNZ_BADZIPFILE (-103) +#define UNZ_INTERNALERROR (-104) +#define UNZ_CRCERROR (-105) + +/* tm_unz contain date/time info */ +typedef struct tm_unz_s +{ + uInt tm_sec; /* seconds after the minute - [0,59] */ + uInt tm_min; /* minutes after the hour - [0,59] */ + uInt tm_hour; /* hours since midnight - [0,23] */ + uInt tm_mday; /* day of the month - [1,31] */ + uInt tm_mon; /* months since January - [0,11] */ + uInt tm_year; /* years - [1980..2044] */ +} tm_unz; + +/* unz_global_info structure contain global data about the ZIPfile + These data comes from the end of central dir */ +typedef struct unz_global_info_s +{ + uLong number_entry; /* total number of entries in + the central dir on this disk */ + uLong size_comment; /* size of the global comment of the zipfile */ +} unz_global_info; + + +/* unz_file_info contain information about a file in the zipfile */ +typedef struct unz_file_info_s +{ + uLong version; /* version made by 2 bytes */ + uLong version_needed; /* version needed to extract 2 bytes */ + uLong flag; /* general purpose bit flag 2 bytes */ + uLong compression_method; /* compression method 2 bytes */ + uLong dosDate; /* last mod file date in Dos fmt 4 bytes */ + uLong crc; /* crc-32 4 bytes */ + uLong compressed_size; /* compressed size 4 bytes */ + uLong uncompressed_size; /* uncompressed size 4 bytes */ + uLong size_filename; /* filename length 2 bytes */ + uLong size_file_extra; /* extra field length 2 bytes */ + uLong size_file_comment; /* file comment length 2 bytes */ + + uLong disk_num_start; /* disk number start 2 bytes */ + uLong internal_fa; /* internal file attributes 2 bytes */ + uLong external_fa; /* external file attributes 4 bytes */ + + tm_unz tmu_date; +} unz_file_info; + +extern int ZEXPORT unzStringFileNameCompare OF ((const char* fileName1, + const char* fileName2, + int iCaseSensitivity)); +/* + Compare two filename (fileName1,fileName2). + If iCaseSenisivity = 1, comparision is case sensitivity (like strcmp) + If iCaseSenisivity = 2, comparision is not case sensitivity (like strcmpi + or strcasecmp) + If iCaseSenisivity = 0, case sensitivity is defaut of your operating system + (like 1 on Unix, 2 on Windows) +*/ + + +extern unzFile ZEXPORT unzOpen OF((const char *path)); +/* + Open a Zip file. path contain the full pathname (by example, + on a Windows NT computer "c:\\zlib\\zlib111.zip" or on an Unix computer + "zlib/zlib111.zip". + If the zipfile cannot be opened (file don't exist or in not valid), the + return value is NULL. + Else, the return value is a unzFile Handle, usable with other function + of this unzip package. +*/ + +extern int ZEXPORT unzClose OF((unzFile file)); +/* + Close a ZipFile opened with unzipOpen. + If there is files inside the .Zip opened with unzOpenCurrentFile (see later), + these files MUST be closed with unzipCloseCurrentFile before call unzipClose. + return UNZ_OK if there is no problem. */ + +extern int ZEXPORT unzGetGlobalInfo OF((unzFile file, + unz_global_info *pglobal_info)); +/* + Write info about the ZipFile in the *pglobal_info structure. + No preparation of the structure is needed + return UNZ_OK if there is no problem. */ + + +extern int ZEXPORT unzGetGlobalComment OF((unzFile file, + char *szComment, + uLong uSizeBuf)); +/* + Get the global comment string of the ZipFile, in the szComment buffer. + uSizeBuf is the size of the szComment buffer. + return the number of byte copied or an error code <0 +*/ + + +/***************************************************************************/ +/* Unzip package allow you browse the directory of the zipfile */ + +extern int ZEXPORT unzGoToFirstFile OF((unzFile file)); +/* + Set the current file of the zipfile to the first file. + return UNZ_OK if there is no problem +*/ + +extern int ZEXPORT unzGoToNextFile OF((unzFile file)); +/* + Set the current file of the zipfile to the next file. + return UNZ_OK if there is no problem + return UNZ_END_OF_LIST_OF_FILE if the actual file was the latest. +*/ + +extern int ZEXPORT unzLocateFile OF((unzFile file, + const char *szFileName, + int iCaseSensitivity)); +/* + Try locate the file szFileName in the zipfile. + For the iCaseSensitivity signification, see unzStringFileNameCompare + + return value : + UNZ_OK if the file is found. It becomes the current file. + UNZ_END_OF_LIST_OF_FILE if the file is not found +*/ + + +extern int ZEXPORT unzGetCurrentFileInfo OF((unzFile file, + unz_file_info *pfile_info, + char *szFileName, + uLong fileNameBufferSize, + void *extraField, + uLong extraFieldBufferSize, + char *szComment, + uLong commentBufferSize)); +/* + Get Info about the current file + if pfile_info!=NULL, the *pfile_info structure will contain somes info about + the current file + if szFileName!=NULL, the filemane string will be copied in szFileName + (fileNameBufferSize is the size of the buffer) + if extraField!=NULL, the extra field information will be copied in extraField + (extraFieldBufferSize is the size of the buffer). + This is the Central-header version of the extra field + if szComment!=NULL, the comment string of the file will be copied in szComment + (commentBufferSize is the size of the buffer) +*/ + +/***************************************************************************/ +/* for reading the content of the current zipfile, you can open it, read data + from it, and close it (you can close it before reading all the file) + */ + +extern int ZEXPORT unzOpenCurrentFile OF((unzFile file)); +/* + Open for reading data the current file in the zipfile. + If there is no error, the return value is UNZ_OK. +*/ + +extern int ZEXPORT unzCloseCurrentFile OF((unzFile file)); +/* + Close the file in zip opened with unzOpenCurrentFile + Return UNZ_CRCERROR if all the file was read but the CRC is not good +*/ + +extern int ZEXPORT unzReadCurrentFile OF((unzFile file, + voidp buf, + unsigned len)); +/* + Read bytes from the current file (opened by unzOpenCurrentFile) + buf contain buffer where data must be copied + len the size of buf. + + return the number of byte copied if somes bytes are copied + return 0 if the end of file was reached + return <0 with error code if there is an error + (UNZ_ERRNO for IO error, or zLib error for uncompress error) +*/ + +extern z_off_t ZEXPORT unztell OF((unzFile file)); +/* + Give the current position in uncompressed data +*/ + +extern int ZEXPORT unzeof OF((unzFile file)); +/* + return 1 if the end of file was reached, 0 elsewhere +*/ + +extern int ZEXPORT unzGetLocalExtrafield OF((unzFile file, + voidp buf, + unsigned len)); +/* + Read extra field from the current file (opened by unzOpenCurrentFile) + This is the local-header version of the extra field (sometimes, there is + more info in the local-header version than in the central-header) + + if buf==NULL, it return the size of the local extra field + + if buf!=NULL, len is the size of the buffer, the extra header is copied in + buf. + the return value is the number of bytes copied in buf, or (if <0) + the error code +*/ + +#ifdef __cplusplus +} +#endif + +#endif /* _unz_H */ diff --git a/output/dll/libgenplusgx.dll b/output/dll/libgenplusgx.dll new file mode 100644 index 0000000000000000000000000000000000000000..118904bc49ae8a08dcdeed1718e1ea9a5a69da89 GIT binary patch literal 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