won't miss that code
This commit is contained in:
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e487f1494c
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a3a761d028
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@ -9,7 +9,6 @@
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#endif
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#include "shared.h"
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#include "state.h"
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#include "genesis.h"
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#include "md_ntsc.h"
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#include "sms_ntsc.h"
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@ -765,99 +765,6 @@ void md_cart_reset(int hard_reset)
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}
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}
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int md_cart_context_save(uint8 *state)
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{
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int i;
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int bufferptr = 0;
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uint8 *base;
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/* cartridge mapping */
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for (i=0; i<0x40; i++)
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{
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/* get base address */
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base = m68k.memory_map[i].base;
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if (base == sram.sram)
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{
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/* SRAM */
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state[bufferptr++] = 0xff;
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}
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else
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{
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/* ROM */
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state[bufferptr++] = ((base - cart.rom) >> 16) & 0xff;
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}
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}
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/* hardware registers */
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save_param(cart.hw.regs, sizeof(cart.hw.regs));
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/* SVP */
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if (svp)
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{
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save_param(svp->iram_rom, 0x800);
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save_param(svp->dram,sizeof(svp->dram));
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save_param(&svp->ssp1601,sizeof(ssp1601_t));
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}
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return bufferptr;
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}
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int md_cart_context_load(uint8 *state)
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{
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int i;
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int bufferptr = 0;
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uint8 offset;
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/* cartridge mapping */
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for (i=0; i<0x40; i++)
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{
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/* get offset */
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offset = state[bufferptr++];
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if (offset == 0xff)
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{
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/* SRAM */
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m68k.memory_map[i].base = sram.sram;
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m68k.memory_map[i].read8 = sram_read_byte;
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m68k.memory_map[i].read16 = sram_read_word;
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m68k.memory_map[i].write8 = sram_write_byte;
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m68k.memory_map[i].write16 = sram_write_word;
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zbank_memory_map[i].read = sram_read_byte;
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zbank_memory_map[i].write = sram_write_byte;
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}
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else
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{
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/* check if SRAM was mapped there before loading state */
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if (m68k.memory_map[i].base == sram.sram)
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{
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m68k.memory_map[i].read8 = NULL;
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m68k.memory_map[i].read16 = NULL;
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m68k.memory_map[i].write8 = m68k_unused_8_w;
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m68k.memory_map[i].write16 = m68k_unused_16_w;
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zbank_memory_map[i].read = NULL;
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zbank_memory_map[i].write = zbank_unused_w;
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}
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/* ROM */
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m68k.memory_map[i].base = cart.rom + (offset << 16);
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}
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}
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/* hardware registers */
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load_param(cart.hw.regs, sizeof(cart.hw.regs));
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/* SVP */
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if (svp)
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{
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load_param(svp->iram_rom, 0x800);
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load_param(svp->dram,sizeof(svp->dram));
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load_param(&svp->ssp1601,sizeof(ssp1601_t));
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}
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return bufferptr;
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}
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/************************************************************
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MAPPER handlers
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@ -84,7 +84,5 @@ typedef struct
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/* Function prototypes */
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extern void md_cart_init(void);
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extern void md_cart_reset(int hard_reset);
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extern int md_cart_context_save(uint8 *state);
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extern int md_cart_context_load(uint8 *state);
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#endif
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@ -703,20 +703,6 @@ int sms_cart_region_detect(void)
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return REGION_USA;
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}
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int sms_cart_context_save(uint8 *state)
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{
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int bufferptr = 0;
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save_param(slot.fcr, 4);
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return bufferptr;
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}
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int sms_cart_context_load(uint8 *state)
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{
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int bufferptr = 0;
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load_param(slot.fcr, 4);
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return bufferptr;
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}
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static void mapper_reset(void)
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{
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int i;
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@ -48,8 +48,6 @@ extern void sms_cart_init(void);
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extern void sms_cart_reset(void);
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extern void sms_cart_switch(uint8 mode);
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extern int sms_cart_region_detect(void);
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extern int sms_cart_context_save(uint8 *state);
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extern int sms_cart_context_load(uint8 *state);
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#endif
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@ -228,48 +228,6 @@ void sram_write_word(unsigned int address, unsigned int data)
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// the variables in SRAM_T are all part of "configuration", so we don't have to save those.
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// the only thing that needs to be saved is the SRAM itself and the SEEPROM struct (if applicable)
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int sram_context_save(uint8 *state)
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{
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int bufferptr = 0;
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if (!sram.on)
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return 0;
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save_param(sram.sram, sram_get_actual_size());
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switch (sram.custom)
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{
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case 1:
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save_param(&eeprom_i2c, sizeof(eeprom_i2c));
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break;
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case 2:
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save_param(&spi_eeprom, sizeof(spi_eeprom));
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break;
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case 3:
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save_param(&eeprom_93c, sizeof(eeprom_93c));
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break;
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}
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return bufferptr;
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}
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int sram_context_load(uint8 *state)
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{
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int bufferptr = 0;
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if (!sram.on)
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return 0;
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load_param(sram.sram, sram_get_actual_size());
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switch (sram.custom)
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{
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case 1:
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load_param(&eeprom_i2c, sizeof(eeprom_i2c));
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break;
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case 2:
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load_param(&spi_eeprom, sizeof(spi_eeprom));
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break;
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case 3:
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load_param(&eeprom_93c, sizeof(eeprom_93c));
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break;
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}
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return bufferptr;
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}
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int sram_get_actual_size()
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{
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if (!sram.on)
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extern void sram_write_byte(unsigned int address, unsigned int data);
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extern void sram_write_word(unsigned int address, unsigned int data);
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extern int sram_context_save(uint8 *state);
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extern int sram_context_load(uint8 *state);
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extern int sram_get_actual_size();
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/* global variables */
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@ -111,75 +111,6 @@ void cdc_reset(void)
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}
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}
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int cdc_context_save(uint8 *state)
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{
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uint8 tmp8;
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int bufferptr = 0;
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if (cdc.dma_w == pcm_ram_dma_w)
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{
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tmp8 = 1;
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}
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else if (cdc.dma_w == prg_ram_dma_w)
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{
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tmp8 = 2;
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}
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else if (cdc.dma_w == word_ram_0_dma_w)
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{
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tmp8 = 3;
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}
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else if (cdc.dma_w == word_ram_1_dma_w)
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{
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tmp8 = 4;
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}
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else if (cdc.dma_w == word_ram_2M_dma_w)
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{
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tmp8 = 5;
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}
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else
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{
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tmp8 = 0;
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}
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save_param(&cdc, sizeof(cdc));
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save_param(&tmp8, 1);
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return bufferptr;
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}
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int cdc_context_load(uint8 *state)
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{
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uint8 tmp8;
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int bufferptr = 0;
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load_param(&cdc, sizeof(cdc));
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load_param(&tmp8, 1);
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switch (tmp8)
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{
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case 1:
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cdc.dma_w = pcm_ram_dma_w;
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break;
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case 2:
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cdc.dma_w = prg_ram_dma_w;
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break;
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case 3:
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cdc.dma_w = word_ram_0_dma_w;
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break;
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case 4:
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cdc.dma_w = word_ram_1_dma_w;
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break;
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case 5:
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cdc.dma_w = word_ram_2M_dma_w;
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break;
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default:
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cdc.dma_w = 0;
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break;
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}
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return bufferptr;
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}
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void cdc_dma_update(void)
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{
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/* maximal transfer length */
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/* Function prototypes */
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extern void cdc_init(void);
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extern void cdc_reset(void);
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extern int cdc_context_save(uint8 *state);
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extern int cdc_context_load(uint8 *state);
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extern void cdc_dma_update(void);
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extern int cdc_decoder_update(uint32 header);
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extern void cdc_reg_w(unsigned char data);
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@ -194,41 +194,6 @@ void cdd_reset(void)
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cdd.audio[0] = cdd.audio[1] = 0;
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}
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int cdd_context_save(uint8 *state)
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{
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int bufferptr = 0;
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save_param(&cdd.cycles, sizeof(cdd.cycles));
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save_param(&cdd.latency, sizeof(cdd.latency));
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save_param(&cdd.index, sizeof(cdd.index));
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save_param(&cdd.lba, sizeof(cdd.lba));
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save_param(&cdd.scanOffset, sizeof(cdd.scanOffset));
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save_param(&cdd.volume, sizeof(cdd.volume));
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save_param(&cdd.status, sizeof(cdd.status));
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save_param(&cdd.sampleOffset, sizeof(cdd.sampleOffset));
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save_param(&cdd.sampleLba, sizeof(cdd.sampleLba));
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return bufferptr;
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}
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int cdd_context_load(uint8 *state)
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{
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int lba;
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int bufferptr = 0;
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load_param(&cdd.cycles, sizeof(cdd.cycles));
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load_param(&cdd.latency, sizeof(cdd.latency));
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load_param(&cdd.index, sizeof(cdd.index));
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load_param(&cdd.lba, sizeof(cdd.lba));
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load_param(&cdd.scanOffset, sizeof(cdd.scanOffset));
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load_param(&cdd.volume, sizeof(cdd.volume));
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load_param(&cdd.status, sizeof(cdd.status));
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load_param(&cdd.sampleOffset, sizeof(cdd.sampleOffset));
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load_param(&cdd.sampleLba, sizeof(cdd.sampleLba));
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return bufferptr;
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}
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void cdd_unload(void)
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{
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cdd.loaded = 0;
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@ -96,8 +96,6 @@ typedef struct
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/* Function prototypes */
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extern void cdd_init(blip_t* left, blip_t* right);
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extern void cdd_reset(void);
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extern int cdd_context_save(uint8 *state);
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extern int cdd_context_load(uint8 *state);
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extern int cdd_load(const char *key, char *header);
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extern void cdd_unload(void);
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extern void cdd_read_data(uint8 *dst);
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@ -425,50 +425,6 @@ void gfx_reset(void)
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gfx.cycles = 0;
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}
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int gfx_context_save(uint8 *state)
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{
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uint32 tmp32;
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int bufferptr = 0;
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save_param(&gfx.cycles, sizeof(gfx.cycles));
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save_param(&gfx.cyclesPerLine, sizeof(gfx.cyclesPerLine));
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save_param(&gfx.dotMask, sizeof(gfx.dotMask));
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save_param(&gfx.stampShift, sizeof(gfx.stampShift));
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save_param(&gfx.mapShift, sizeof(gfx.mapShift));
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save_param(&gfx.bufferOffset, sizeof(gfx.bufferOffset));
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save_param(&gfx.bufferStart, sizeof(gfx.bufferStart));
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tmp32 = (uint8 *)(gfx.tracePtr) - scd.word_ram_2M;
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save_param(&tmp32, 4);
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tmp32 = (uint8 *)(gfx.mapPtr) - scd.word_ram_2M;
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save_param(&tmp32, 4);
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return bufferptr;
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}
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int gfx_context_load(uint8 *state)
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{
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uint32 tmp32;
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int bufferptr = 0;
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load_param(&gfx.cycles, sizeof(gfx.cycles));
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load_param(&gfx.cyclesPerLine, sizeof(gfx.cyclesPerLine));
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load_param(&gfx.dotMask, sizeof(gfx.dotMask));
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load_param(&gfx.stampShift, sizeof(gfx.stampShift));
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load_param(&gfx.mapShift, sizeof(gfx.mapShift));
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load_param(&gfx.bufferOffset, sizeof(gfx.bufferOffset));
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load_param(&gfx.bufferStart, sizeof(gfx.bufferStart));
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load_param(&tmp32, 4);
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gfx.tracePtr = (uint16 *)(scd.word_ram_2M + tmp32);
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load_param(&tmp32, 4);
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gfx.mapPtr = (uint16 *)(scd.word_ram_2M + tmp32);
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return bufferptr;
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}
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INLINE void gfx_render(uint32 bufferIndex, uint32 width)
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{
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uint8 pixel_in, pixel_out;
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@ -108,8 +108,7 @@ extern void cell_ram_1_write8(unsigned int address, unsigned int data);
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/***************************************************************/
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extern void gfx_init(void);
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extern void gfx_reset(void);
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extern int gfx_context_save(uint8 *state);
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extern int gfx_context_load(uint8 *state);
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extern void gfx_start(unsigned int base, int cycles);
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extern void gfx_update(int cycles);
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@ -82,42 +82,6 @@ void pcm_reset(void)
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blip_clear(blip[1]);
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}
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int pcm_context_save(uint8 *state)
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{
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uint8 tmp8;
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int bufferptr = 0;
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tmp8 = (pcm.bank - pcm.ram) >> 12;
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save_param(pcm.chan, sizeof(pcm.chan));
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save_param(pcm.out, sizeof(pcm.out));
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save_param(&tmp8, 1);
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save_param(&pcm.enabled, sizeof(pcm.enabled));
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save_param(&pcm.status, sizeof(pcm.status));
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save_param(&pcm.index, sizeof(pcm.index));
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save_param(pcm.ram, sizeof(pcm.ram));
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return bufferptr;
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}
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int pcm_context_load(uint8 *state)
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{
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uint8 tmp8;
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int bufferptr = 0;
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load_param(pcm.chan, sizeof(pcm.chan));
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load_param(pcm.out, sizeof(pcm.out));
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load_param(&tmp8, 1);
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pcm.bank = &pcm.ram[(tmp8 & 0x0f) << 12];
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load_param(&pcm.enabled, sizeof(pcm.enabled));
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load_param(&pcm.status, sizeof(pcm.status));
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load_param(&pcm.index, sizeof(pcm.index));
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load_param(pcm.ram, sizeof(pcm.ram));
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return bufferptr;
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}
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void pcm_run(unsigned int length)
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{
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@ -1360,300 +1360,6 @@ void scd_end_frame(unsigned int cycles)
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s68k.poll.cycle = 0;
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}
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int scd_context_save(uint8 *state)
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{
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uint16 tmp16;
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uint32 tmp32;
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int bufferptr = 0;
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/* internal harware */
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save_param(scd.regs, sizeof(scd.regs));
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save_param(&scd.cycles, sizeof(scd.cycles));
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save_param(&scd.timer, sizeof(scd.timer));
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save_param(&scd.pending, sizeof(scd.pending));
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save_param(&scd.dmna, sizeof(scd.dmna));
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/* GFX processor */
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bufferptr += gfx_context_save(&state[bufferptr]);
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/* CD Data controller */
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bufferptr += cdc_context_save(&state[bufferptr]);
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/* CD Drive processor */
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bufferptr += cdd_context_save(&state[bufferptr]);
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/* PCM chip */
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bufferptr += pcm_context_save(&state[bufferptr]);
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/* PRG-RAM */
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save_param(scd.prg_ram, sizeof(scd.prg_ram));
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/* Word-RAM */
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if (scd.regs[0x03>>1].byte.l & 0x04)
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{
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/* 1M mode */
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save_param(scd.word_ram, sizeof(scd.word_ram));
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}
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else
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{
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/* 2M mode */
|
||||
save_param(scd.word_ram_2M, sizeof(scd.word_ram_2M));
|
||||
}
|
||||
|
||||
/* MAIN-CPU & SUB-CPU polling */
|
||||
save_param(&m68k.poll, sizeof(m68k.poll));
|
||||
save_param(&s68k.poll, sizeof(s68k.poll));
|
||||
|
||||
/* H-INT default vector */
|
||||
tmp16 = *(uint16 *)(m68k.memory_map[scd.cartridge.boot].base + 0x72);
|
||||
save_param(&tmp16, 2);
|
||||
|
||||
/* SUB-CPU internal state */
|
||||
save_param(&s68k.cycles, sizeof(s68k.cycles));
|
||||
save_param(&s68k.int_level, sizeof(s68k.int_level));
|
||||
save_param(&s68k.stopped, sizeof(s68k.stopped));
|
||||
|
||||
/* SUB-CPU registers */
|
||||
tmp32 = s68k_get_reg(M68K_REG_D0); save_param(&tmp32, 4);
|
||||
tmp32 = s68k_get_reg(M68K_REG_D1); save_param(&tmp32, 4);
|
||||
tmp32 = s68k_get_reg(M68K_REG_D2); save_param(&tmp32, 4);
|
||||
tmp32 = s68k_get_reg(M68K_REG_D3); save_param(&tmp32, 4);
|
||||
tmp32 = s68k_get_reg(M68K_REG_D4); save_param(&tmp32, 4);
|
||||
tmp32 = s68k_get_reg(M68K_REG_D5); save_param(&tmp32, 4);
|
||||
tmp32 = s68k_get_reg(M68K_REG_D6); save_param(&tmp32, 4);
|
||||
tmp32 = s68k_get_reg(M68K_REG_D7); save_param(&tmp32, 4);
|
||||
tmp32 = s68k_get_reg(M68K_REG_A0); save_param(&tmp32, 4);
|
||||
tmp32 = s68k_get_reg(M68K_REG_A1); save_param(&tmp32, 4);
|
||||
tmp32 = s68k_get_reg(M68K_REG_A2); save_param(&tmp32, 4);
|
||||
tmp32 = s68k_get_reg(M68K_REG_A3); save_param(&tmp32, 4);
|
||||
tmp32 = s68k_get_reg(M68K_REG_A4); save_param(&tmp32, 4);
|
||||
tmp32 = s68k_get_reg(M68K_REG_A5); save_param(&tmp32, 4);
|
||||
tmp32 = s68k_get_reg(M68K_REG_A6); save_param(&tmp32, 4);
|
||||
tmp32 = s68k_get_reg(M68K_REG_A7); save_param(&tmp32, 4);
|
||||
tmp32 = s68k_get_reg(M68K_REG_PC); save_param(&tmp32, 4);
|
||||
tmp16 = s68k_get_reg(M68K_REG_SR); save_param(&tmp16, 2);
|
||||
tmp32 = s68k_get_reg(M68K_REG_USP); save_param(&tmp32, 4);
|
||||
tmp32 = s68k_get_reg(M68K_REG_ISP); save_param(&tmp32, 4);
|
||||
|
||||
/* bootable MD cartridge */
|
||||
if (scd.cartridge.boot)
|
||||
{
|
||||
bufferptr += md_cart_context_save(&state[bufferptr]);
|
||||
}
|
||||
|
||||
save_param(scd.bram, 0x2000);
|
||||
// we don't save scd.cartridge.id separately, so it must be non-changing!
|
||||
if (scd.cartridge.id)
|
||||
save_param(scd.cartridge.area, scd.cartridge.mask + 1);
|
||||
|
||||
return bufferptr;
|
||||
}
|
||||
|
||||
int scd_context_load(uint8 *state)
|
||||
{
|
||||
int i;
|
||||
uint16 tmp16;
|
||||
uint32 tmp32;
|
||||
int bufferptr = 0;
|
||||
|
||||
/* internal harware */
|
||||
load_param(scd.regs, sizeof(scd.regs));
|
||||
load_param(&scd.cycles, sizeof(scd.cycles));
|
||||
load_param(&scd.timer, sizeof(scd.timer));
|
||||
load_param(&scd.pending, sizeof(scd.pending));
|
||||
load_param(&scd.dmna, sizeof(scd.dmna));
|
||||
|
||||
/* GFX processor */
|
||||
bufferptr += gfx_context_load(&state[bufferptr]);
|
||||
|
||||
/* CD Data controller */
|
||||
bufferptr += cdc_context_load(&state[bufferptr]);
|
||||
|
||||
/* CD Drive processor */
|
||||
bufferptr += cdd_context_load(&state[bufferptr]);
|
||||
|
||||
/* PCM chip */
|
||||
bufferptr += pcm_context_load(&state[bufferptr]);
|
||||
|
||||
/* PRG-RAM */
|
||||
load_param(scd.prg_ram, sizeof(scd.prg_ram));
|
||||
|
||||
/* PRG-RAM 128k bank mapped to $020000-$03FFFF (resp. $420000-$43FFFF) */
|
||||
m68k.memory_map[scd.cartridge.boot + 0x02].base = scd.prg_ram + ((scd.regs[0x03>>1].byte.l & 0xc0) << 11);
|
||||
m68k.memory_map[scd.cartridge.boot + 0x03].base = m68k.memory_map[scd.cartridge.boot + 0x02].base + 0x10000;
|
||||
|
||||
/* Word-RAM */
|
||||
if (scd.regs[0x03>>1].byte.l & 0x04)
|
||||
{
|
||||
/* 1M Mode */
|
||||
load_param(scd.word_ram, sizeof(scd.word_ram));
|
||||
|
||||
if (scd.regs[0x03>>1].byte.l & 0x01)
|
||||
{
|
||||
/* Word-RAM 1 assigned to MAIN-CPU */
|
||||
for (i=scd.cartridge.boot+0x20; i<scd.cartridge.boot+0x22; i++)
|
||||
{
|
||||
/* Word-RAM 1 data mapped at $200000-$21FFFF */
|
||||
m68k.memory_map[i].base = scd.word_ram[1] + ((i & 0x01) << 16);
|
||||
}
|
||||
|
||||
for (i=scd.cartridge.boot+0x22; i<scd.cartridge.boot+0x24; i++)
|
||||
{
|
||||
/* VRAM cell image mapped at $220000-$23FFFF */
|
||||
m68k.memory_map[i].read8 = cell_ram_1_read8;
|
||||
m68k.memory_map[i].read16 = cell_ram_1_read16;
|
||||
m68k.memory_map[i].write8 = cell_ram_1_write8;
|
||||
m68k.memory_map[i].write16 = cell_ram_1_write16;
|
||||
zbank_memory_map[i].read = cell_ram_1_read8;
|
||||
zbank_memory_map[i].write = cell_ram_1_write8;
|
||||
}
|
||||
|
||||
/* Word-RAM 0 assigned to SUB-CPU */
|
||||
for (i=0x08; i<0x0c; i++)
|
||||
{
|
||||
/* DOT image mapped at $080000-$0BFFFF */
|
||||
s68k.memory_map[i].read8 = dot_ram_0_read8;
|
||||
s68k.memory_map[i].read16 = dot_ram_0_read16;
|
||||
s68k.memory_map[i].write8 = dot_ram_0_write8;
|
||||
s68k.memory_map[i].write16 = dot_ram_0_write16;
|
||||
}
|
||||
|
||||
for (i=0x0c; i<0x0e; i++)
|
||||
{
|
||||
/* Word-RAM 0 data mapped at $0C0000-$0DFFFF */
|
||||
s68k.memory_map[i].base = scd.word_ram[0] + ((i & 0x01) << 16);
|
||||
s68k.memory_map[i].read8 = NULL;
|
||||
s68k.memory_map[i].read16 = NULL;
|
||||
s68k.memory_map[i].write8 = NULL;
|
||||
s68k.memory_map[i].write16 = NULL;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Word-RAM 0 assigned to MAIN-CPU */
|
||||
for (i=scd.cartridge.boot+0x20; i<scd.cartridge.boot+0x22; i++)
|
||||
{
|
||||
/* Word-RAM 0 data mapped at $200000-$21FFFF */
|
||||
m68k.memory_map[i].base = scd.word_ram[0] + ((i & 0x01) << 16);
|
||||
}
|
||||
|
||||
for (i=scd.cartridge.boot+0x22; i<scd.cartridge.boot+0x24; i++)
|
||||
{
|
||||
/* VRAM cell image mapped at $220000-$23FFFF */
|
||||
m68k.memory_map[i].read8 = cell_ram_0_read8;
|
||||
m68k.memory_map[i].read16 = cell_ram_0_read16;
|
||||
m68k.memory_map[i].write8 = cell_ram_0_write8;
|
||||
m68k.memory_map[i].write16 = cell_ram_0_write16;
|
||||
zbank_memory_map[i].read = cell_ram_0_read8;
|
||||
zbank_memory_map[i].write = cell_ram_0_write8;
|
||||
}
|
||||
|
||||
/* Word-RAM 1 assigned to SUB-CPU */
|
||||
for (i=0x08; i<0x0c; i++)
|
||||
{
|
||||
/* DOT image mapped at $080000-$0BFFFF */
|
||||
s68k.memory_map[i].read8 = dot_ram_1_read8;
|
||||
s68k.memory_map[i].read16 = dot_ram_1_read16;
|
||||
s68k.memory_map[i].write8 = dot_ram_1_write8;
|
||||
s68k.memory_map[i].write16 = dot_ram_1_write16;
|
||||
}
|
||||
|
||||
for (i=0x0c; i<0x0e; i++)
|
||||
{
|
||||
/* Word-RAM 1 data mapped at $0C0000-$0DFFFF */
|
||||
s68k.memory_map[i].base = scd.word_ram[1] + ((i & 0x01) << 16);
|
||||
s68k.memory_map[i].read8 = NULL;
|
||||
s68k.memory_map[i].read16 = NULL;
|
||||
s68k.memory_map[i].write8 = NULL;
|
||||
s68k.memory_map[i].write16 = NULL;
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* 2M mode */
|
||||
load_param(scd.word_ram_2M, sizeof(scd.word_ram_2M));
|
||||
|
||||
for (i=scd.cartridge.boot+0x20; i<scd.cartridge.boot+0x24; i++)
|
||||
{
|
||||
/* MAIN-CPU: $200000-$23FFFF is mapped to 256K Word-RAM */
|
||||
m68k.memory_map[i].base = scd.word_ram_2M + ((i & 0x03) << 16);
|
||||
m68k.memory_map[i].read8 = NULL;
|
||||
m68k.memory_map[i].read16 = NULL;
|
||||
m68k.memory_map[i].write8 = NULL;
|
||||
m68k.memory_map[i].write16 = NULL;
|
||||
zbank_memory_map[i].read = NULL;
|
||||
zbank_memory_map[i].write = NULL;
|
||||
}
|
||||
|
||||
for (i=0x08; i<0x0c; i++)
|
||||
{
|
||||
/* SUB-CPU: $080000-$0BFFFF is mapped to 256K Word-RAM */
|
||||
s68k.memory_map[i].read8 = NULL;
|
||||
s68k.memory_map[i].read16 = NULL;
|
||||
s68k.memory_map[i].write8 = NULL;
|
||||
s68k.memory_map[i].write16 = NULL;
|
||||
}
|
||||
|
||||
for (i=0x0c; i<0x0e; i++)
|
||||
{
|
||||
/* SUB-CPU: $0C0000-$0DFFFF is unmapped */
|
||||
s68k.memory_map[i].read8 = s68k_read_bus_8;
|
||||
s68k.memory_map[i].read16 = s68k_read_bus_16;
|
||||
s68k.memory_map[i].write8 = s68k_unused_8_w;
|
||||
s68k.memory_map[i].write16 = s68k_unused_16_w;
|
||||
}
|
||||
}
|
||||
|
||||
/* MAIN-CPU & SUB-CPU polling */
|
||||
load_param(&m68k.poll, sizeof(m68k.poll));
|
||||
load_param(&s68k.poll, sizeof(s68k.poll));
|
||||
|
||||
/* H-INT default vector */
|
||||
load_param(&tmp16, 2);
|
||||
*(uint16 *)(m68k.memory_map[scd.cartridge.boot].base + 0x72) = tmp16;
|
||||
|
||||
/* SUB-CPU internal state */
|
||||
load_param(&s68k.cycles, sizeof(s68k.cycles));
|
||||
load_param(&s68k.int_level, sizeof(s68k.int_level));
|
||||
load_param(&s68k.stopped, sizeof(s68k.stopped));
|
||||
|
||||
/* SUB-CPU registers */
|
||||
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_D0, tmp32);
|
||||
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_D1, tmp32);
|
||||
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_D2, tmp32);
|
||||
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_D3, tmp32);
|
||||
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_D4, tmp32);
|
||||
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_D5, tmp32);
|
||||
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_D6, tmp32);
|
||||
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_D7, tmp32);
|
||||
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_A0, tmp32);
|
||||
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_A1, tmp32);
|
||||
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_A2, tmp32);
|
||||
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_A3, tmp32);
|
||||
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_A4, tmp32);
|
||||
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_A5, tmp32);
|
||||
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_A6, tmp32);
|
||||
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_A7, tmp32);
|
||||
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_PC, tmp32);
|
||||
load_param(&tmp16, 2); s68k_set_reg(M68K_REG_SR, tmp16);
|
||||
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_USP,tmp32);
|
||||
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_ISP,tmp32);
|
||||
|
||||
/* bootable MD cartridge hardware */
|
||||
if (scd.cartridge.boot)
|
||||
{
|
||||
bufferptr += md_cart_context_load(&state[bufferptr]);
|
||||
}
|
||||
|
||||
load_param(scd.bram, 0x2000);
|
||||
// we don't save scd.cartridge.id separately, so it must be non-changing!
|
||||
if (scd.cartridge.id)
|
||||
load_param(scd.cartridge.area, scd.cartridge.mask + 1);
|
||||
|
||||
return bufferptr;
|
||||
}
|
||||
|
||||
int scd_68k_irq_ack(int level)
|
||||
{
|
||||
#ifdef LOG_SCD
|
||||
|
|
|
@ -82,8 +82,6 @@ extern void scd_init(void);
|
|||
extern void scd_reset(int hard);
|
||||
extern void scd_update(unsigned int cycles);
|
||||
extern void scd_end_frame(unsigned int cycles);
|
||||
extern int scd_context_load(uint8 *state);
|
||||
extern int scd_context_save(uint8 *state);
|
||||
extern int scd_68k_irq_ack(int level);
|
||||
extern void prg_ram_dma_w(unsigned int words);
|
||||
|
||||
|
|
|
@ -29,7 +29,6 @@
|
|||
#include "ggenie.h"
|
||||
#include "areplay.h"
|
||||
#include "svp.h"
|
||||
#include "state.h"
|
||||
|
||||
#endif /* _SHARED_H_ */
|
||||
|
||||
|
|
|
@ -202,48 +202,6 @@ int sound_update(unsigned int cycles)
|
|||
return blip_samples_avail(snd.blips[0][0]);
|
||||
}
|
||||
|
||||
int sound_context_save(uint8 *state)
|
||||
{
|
||||
int bufferptr = 0;
|
||||
|
||||
if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
|
||||
{
|
||||
bufferptr = YM2612SaveContext(state);
|
||||
}
|
||||
else
|
||||
{
|
||||
save_param(YM2413GetContextPtr(),YM2413GetContextSize());
|
||||
}
|
||||
|
||||
save_param(SN76489_GetContextPtr(),SN76489_GetContextSize());
|
||||
|
||||
save_param(&fm_cycles_start,sizeof(fm_cycles_start));
|
||||
|
||||
return bufferptr;
|
||||
}
|
||||
|
||||
int sound_context_load(uint8 *state)
|
||||
{
|
||||
int bufferptr = 0;
|
||||
|
||||
if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
|
||||
{
|
||||
bufferptr = YM2612LoadContext(state);
|
||||
YM2612Config(config.dac_bits);
|
||||
}
|
||||
else
|
||||
{
|
||||
load_param(YM2413GetContextPtr(),YM2413GetContextSize());
|
||||
}
|
||||
|
||||
load_param(SN76489_GetContextPtr(),SN76489_GetContextSize());
|
||||
|
||||
load_param(&fm_cycles_start,sizeof(fm_cycles_start));
|
||||
fm_cycles_count = fm_cycles_start;
|
||||
|
||||
return bufferptr;
|
||||
}
|
||||
|
||||
void fm_reset(unsigned int cycles)
|
||||
{
|
||||
/* synchronize FM chip with CPU */
|
||||
|
|
|
@ -2123,57 +2123,3 @@ void YM2612Config(unsigned char dac_bits)
|
|||
}
|
||||
}
|
||||
}
|
||||
|
||||
int YM2612LoadContext(unsigned char *state)
|
||||
{
|
||||
int c,s;
|
||||
uint8 index;
|
||||
int bufferptr = 0;
|
||||
|
||||
/* restore YM2612 context */
|
||||
load_param(&ym2612, sizeof(ym2612));
|
||||
|
||||
/* restore DT table address pointer for each channel slots */
|
||||
for (c=0; c<6; c++)
|
||||
{
|
||||
for (s=0; s<4; s++)
|
||||
{
|
||||
load_param(&index,sizeof(index));
|
||||
bufferptr += sizeof(index);
|
||||
ym2612.CH[c].SLOT[s].DT = ym2612.OPN.ST.dt_tab[index&7];
|
||||
}
|
||||
}
|
||||
|
||||
/* restore outputs connections */
|
||||
setup_connection(&ym2612.CH[0],0);
|
||||
setup_connection(&ym2612.CH[1],1);
|
||||
setup_connection(&ym2612.CH[2],2);
|
||||
setup_connection(&ym2612.CH[3],3);
|
||||
setup_connection(&ym2612.CH[4],4);
|
||||
setup_connection(&ym2612.CH[5],5);
|
||||
|
||||
return bufferptr;
|
||||
}
|
||||
|
||||
int YM2612SaveContext(unsigned char *state)
|
||||
{
|
||||
int c,s;
|
||||
uint8 index;
|
||||
int bufferptr = 0;
|
||||
|
||||
/* save YM2612 context */
|
||||
save_param(&ym2612, sizeof(ym2612));
|
||||
|
||||
/* save DT table index for each channel slots */
|
||||
for (c=0; c<6; c++)
|
||||
{
|
||||
for (s=0; s<4; s++)
|
||||
{
|
||||
index = (ym2612.CH[c].SLOT[s].DT - ym2612.OPN.ST.dt_tab[0]) >> 5;
|
||||
save_param(&index,sizeof(index));
|
||||
bufferptr += sizeof(index);
|
||||
}
|
||||
}
|
||||
|
||||
return bufferptr;
|
||||
}
|
||||
|
|
|
@ -22,8 +22,6 @@ extern void YM2612ResetChip(void);
|
|||
extern void YM2612Update(int *buffer, int length);
|
||||
extern void YM2612Write(unsigned int a, unsigned int v);
|
||||
extern unsigned int YM2612Read(void);
|
||||
extern int YM2612LoadContext(unsigned char *state);
|
||||
extern int YM2612SaveContext(unsigned char *state);
|
||||
|
||||
extern INT32 *ym2612_lfo_pm_table;
|
||||
|
||||
|
|
|
@ -1,295 +0,0 @@
|
|||
/***************************************************************************************
|
||||
* Genesis Plus
|
||||
* Savestate support
|
||||
*
|
||||
* Copyright (C) 2007-2012 Eke-Eke (Genesis Plus GX)
|
||||
*
|
||||
* Redistribution and use of this code or any derivative works are permitted
|
||||
* provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions may not be sold, nor may they be used in a commercial
|
||||
* product or activity.
|
||||
*
|
||||
* - Redistributions that are modified from the original source must include the
|
||||
* complete source code, including the source code for all components used by a
|
||||
* binary built from the modified sources. However, as a special exception, the
|
||||
* source code distributed need not include anything that is normally distributed
|
||||
* (in either source or binary form) with the major components (compiler, kernel,
|
||||
* and so on) of the operating system on which the executable runs, unless that
|
||||
* component itself accompanies the executable.
|
||||
*
|
||||
* - Redistributions must reproduce the above copyright notice, this list of
|
||||
* conditions and the following disclaimer in the documentation and/or other
|
||||
* materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************************/
|
||||
|
||||
#include "shared.h"
|
||||
|
||||
int state_load(unsigned char *state)
|
||||
{
|
||||
int i, bufferptr = 0;
|
||||
|
||||
/* signature check (GENPLUS-GX x.x.x) */
|
||||
char version[17];
|
||||
load_param(version,16);
|
||||
version[16] = 0;
|
||||
if (memcmp(version,STATE_VERSION,11))
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* version check (keep compatibility with previous & current state version) */
|
||||
if ((version[11] < 0x31) || (version[13] < 0x37) || (version[15] < 0x31))
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* reset system */
|
||||
system_reset();
|
||||
|
||||
/* enable VDP access for TMSS systems */
|
||||
for (i=0xc0; i<0xe0; i+=8)
|
||||
{
|
||||
m68k.memory_map[i].read8 = vdp_read_byte;
|
||||
m68k.memory_map[i].read16 = vdp_read_word;
|
||||
m68k.memory_map[i].write8 = vdp_write_byte;
|
||||
m68k.memory_map[i].write16 = vdp_write_word;
|
||||
zbank_memory_map[i].read = zbank_read_vdp;
|
||||
zbank_memory_map[i].write = zbank_write_vdp;
|
||||
}
|
||||
|
||||
/* GENESIS */
|
||||
if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
|
||||
{
|
||||
load_param(work_ram, sizeof(work_ram));
|
||||
load_param(zram, sizeof(zram));
|
||||
load_param(&zstate, sizeof(zstate));
|
||||
load_param(&zbank, sizeof(zbank));
|
||||
if (zstate == 3)
|
||||
{
|
||||
m68k.memory_map[0xa0].read8 = z80_read_byte;
|
||||
m68k.memory_map[0xa0].read16 = z80_read_word;
|
||||
m68k.memory_map[0xa0].write8 = z80_write_byte;
|
||||
m68k.memory_map[0xa0].write16 = z80_write_word;
|
||||
}
|
||||
else
|
||||
{
|
||||
m68k.memory_map[0xa0].read8 = m68k_read_bus_8;
|
||||
m68k.memory_map[0xa0].read16 = m68k_read_bus_16;
|
||||
m68k.memory_map[0xa0].write8 = m68k_unused_8_w;
|
||||
m68k.memory_map[0xa0].write16 = m68k_unused_16_w;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
load_param(work_ram, 0x2000);
|
||||
}
|
||||
|
||||
/* IO */
|
||||
load_param(io_reg, sizeof(io_reg));
|
||||
load_param(gamepad, sizeof(gamepad));
|
||||
if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
|
||||
{
|
||||
io_reg[0] = region_code | 0x20 | (config.bios & 1);
|
||||
}
|
||||
else
|
||||
{
|
||||
io_reg[0] = 0x80 | (region_code >> 1);
|
||||
}
|
||||
|
||||
/* VDP */
|
||||
bufferptr += vdp_context_load(&state[bufferptr], version[15]);
|
||||
|
||||
/* SOUND */
|
||||
bufferptr += sound_context_load(&state[bufferptr]);
|
||||
if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
|
||||
{
|
||||
SN76489_Init(snd.blips[0][0], snd.blips[0][1], SN_INTEGRATED);
|
||||
SN76489_Config(0, config.psg_preamp, config.psgBoostNoise, 0xff);
|
||||
}
|
||||
else
|
||||
{
|
||||
SN76489_Init(snd.blips[0][0], snd.blips[0][1], (system_hw < SYSTEM_MARKIII) ? SN_DISCRETE : SN_INTEGRATED);
|
||||
SN76489_Config(0, config.psg_preamp, config.psgBoostNoise, io_reg[6]);
|
||||
}
|
||||
|
||||
/* 68000 */
|
||||
if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
|
||||
{
|
||||
uint16 tmp16;
|
||||
uint32 tmp32;
|
||||
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D0, tmp32);
|
||||
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D1, tmp32);
|
||||
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D2, tmp32);
|
||||
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D3, tmp32);
|
||||
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D4, tmp32);
|
||||
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D5, tmp32);
|
||||
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D6, tmp32);
|
||||
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D7, tmp32);
|
||||
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A0, tmp32);
|
||||
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A1, tmp32);
|
||||
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A2, tmp32);
|
||||
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A3, tmp32);
|
||||
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A4, tmp32);
|
||||
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A5, tmp32);
|
||||
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A6, tmp32);
|
||||
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A7, tmp32);
|
||||
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_PC, tmp32);
|
||||
load_param(&tmp16, 2); m68k_set_reg(M68K_REG_SR, tmp16);
|
||||
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_USP,tmp32);
|
||||
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_ISP,tmp32);
|
||||
|
||||
load_param(&m68k.cycles, sizeof(m68k.cycles));
|
||||
load_param(&m68k.int_level, sizeof(m68k.int_level));
|
||||
load_param(&m68k.stopped, sizeof(m68k.stopped));
|
||||
}
|
||||
|
||||
/* Z80 */
|
||||
load_param(&Z80, sizeof(Z80_Regs));
|
||||
Z80.irq_callback = z80_irq_callback;
|
||||
|
||||
/* Extra HW */
|
||||
if (system_hw == SYSTEM_MCD)
|
||||
{
|
||||
/* handle case of MD cartridge using or not CD hardware */
|
||||
char id[5];
|
||||
load_param(id,4);
|
||||
id[4] = 0;
|
||||
|
||||
/* check if CD hardware was enabled before attempting to restore */
|
||||
if (memcmp(id,"SCD!",4))
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* CD hardware */
|
||||
bufferptr += scd_context_load(&state[bufferptr]);
|
||||
}
|
||||
else if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
|
||||
{
|
||||
/* MD cartridge hardware */
|
||||
bufferptr += md_cart_context_load(&state[bufferptr]);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* MS cartridge hardware */
|
||||
bufferptr += sms_cart_context_load(&state[bufferptr]);
|
||||
sms_cart_switch(~io_reg[0x0E]);
|
||||
}
|
||||
|
||||
bufferptr += sram_context_load(&state[bufferptr]);
|
||||
|
||||
load_param(&bitmap.viewport, sizeof(bitmap.viewport));
|
||||
|
||||
return bufferptr;
|
||||
}
|
||||
|
||||
int state_save(unsigned char *state)
|
||||
{
|
||||
/* buffer size */
|
||||
int bufferptr = 0;
|
||||
|
||||
/* version string */
|
||||
char version[16];
|
||||
strncpy(version,STATE_VERSION,16);
|
||||
save_param(version, 16);
|
||||
|
||||
/* GENESIS */
|
||||
if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
|
||||
{
|
||||
save_param(work_ram, sizeof(work_ram));
|
||||
save_param(zram, sizeof(zram));
|
||||
save_param(&zstate, sizeof(zstate));
|
||||
save_param(&zbank, sizeof(zbank));
|
||||
}
|
||||
else
|
||||
{
|
||||
save_param(work_ram, 0x2000);
|
||||
}
|
||||
|
||||
/* IO */
|
||||
save_param(io_reg, sizeof(io_reg));
|
||||
save_param(gamepad, sizeof(gamepad));
|
||||
|
||||
/* VDP */
|
||||
bufferptr += vdp_context_save(&state[bufferptr]);
|
||||
|
||||
/* SOUND */
|
||||
bufferptr += sound_context_save(&state[bufferptr]);
|
||||
|
||||
/* 68000 */
|
||||
if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
|
||||
{
|
||||
uint16 tmp16;
|
||||
uint32 tmp32;
|
||||
tmp32 = m68k_get_reg(M68K_REG_D0); save_param(&tmp32, 4);
|
||||
tmp32 = m68k_get_reg(M68K_REG_D1); save_param(&tmp32, 4);
|
||||
tmp32 = m68k_get_reg(M68K_REG_D2); save_param(&tmp32, 4);
|
||||
tmp32 = m68k_get_reg(M68K_REG_D3); save_param(&tmp32, 4);
|
||||
tmp32 = m68k_get_reg(M68K_REG_D4); save_param(&tmp32, 4);
|
||||
tmp32 = m68k_get_reg(M68K_REG_D5); save_param(&tmp32, 4);
|
||||
tmp32 = m68k_get_reg(M68K_REG_D6); save_param(&tmp32, 4);
|
||||
tmp32 = m68k_get_reg(M68K_REG_D7); save_param(&tmp32, 4);
|
||||
tmp32 = m68k_get_reg(M68K_REG_A0); save_param(&tmp32, 4);
|
||||
tmp32 = m68k_get_reg(M68K_REG_A1); save_param(&tmp32, 4);
|
||||
tmp32 = m68k_get_reg(M68K_REG_A2); save_param(&tmp32, 4);
|
||||
tmp32 = m68k_get_reg(M68K_REG_A3); save_param(&tmp32, 4);
|
||||
tmp32 = m68k_get_reg(M68K_REG_A4); save_param(&tmp32, 4);
|
||||
tmp32 = m68k_get_reg(M68K_REG_A5); save_param(&tmp32, 4);
|
||||
tmp32 = m68k_get_reg(M68K_REG_A6); save_param(&tmp32, 4);
|
||||
tmp32 = m68k_get_reg(M68K_REG_A7); save_param(&tmp32, 4);
|
||||
tmp32 = m68k_get_reg(M68K_REG_PC); save_param(&tmp32, 4);
|
||||
tmp16 = m68k_get_reg(M68K_REG_SR); save_param(&tmp16, 2);
|
||||
tmp32 = m68k_get_reg(M68K_REG_USP); save_param(&tmp32, 4);
|
||||
tmp32 = m68k_get_reg(M68K_REG_ISP); save_param(&tmp32, 4);
|
||||
|
||||
save_param(&m68k.cycles, sizeof(m68k.cycles));
|
||||
save_param(&m68k.int_level, sizeof(m68k.int_level));
|
||||
save_param(&m68k.stopped, sizeof(m68k.stopped));
|
||||
}
|
||||
|
||||
/* Z80 */
|
||||
save_param(&Z80, sizeof(Z80_Regs));
|
||||
|
||||
/* External HW */
|
||||
if (system_hw == SYSTEM_MCD)
|
||||
{
|
||||
/* CD hardware ID flag */
|
||||
char id[5];
|
||||
strncpy(id,"SCD!",4);
|
||||
save_param(id, 4);
|
||||
|
||||
/* CD hardware */
|
||||
bufferptr += scd_context_save(&state[bufferptr]);
|
||||
}
|
||||
else if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
|
||||
{
|
||||
/* MD cartridge hardware */
|
||||
bufferptr += md_cart_context_save(&state[bufferptr]);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* MS cartridge hardware */
|
||||
bufferptr += sms_cart_context_save(&state[bufferptr]);
|
||||
}
|
||||
|
||||
bufferptr += sram_context_save(&state[bufferptr]);
|
||||
|
||||
save_param(&bitmap.viewport, sizeof(bitmap.viewport));
|
||||
|
||||
/* return total size */
|
||||
return bufferptr;
|
||||
}
|
|
@ -1,57 +0,0 @@
|
|||
/***************************************************************************************
|
||||
* Genesis Plus
|
||||
* Savestate support
|
||||
*
|
||||
* Copyright (C) 2007-2012 Eke-Eke (Genesis Plus GX)
|
||||
*
|
||||
* Redistribution and use of this code or any derivative works are permitted
|
||||
* provided that the following conditions are met:
|
||||
*
|
||||
* - Redistributions may not be sold, nor may they be used in a commercial
|
||||
* product or activity.
|
||||
*
|
||||
* - Redistributions that are modified from the original source must include the
|
||||
* complete source code, including the source code for all components used by a
|
||||
* binary built from the modified sources. However, as a special exception, the
|
||||
* source code distributed need not include anything that is normally distributed
|
||||
* (in either source or binary form) with the major components (compiler, kernel,
|
||||
* and so on) of the operating system on which the executable runs, unless that
|
||||
* component itself accompanies the executable.
|
||||
*
|
||||
* - Redistributions must reproduce the above copyright notice, this list of
|
||||
* conditions and the following disclaimer in the documentation and/or other
|
||||
* materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************************/
|
||||
|
||||
#ifndef _STATE_H_
|
||||
#define _STATE_H_
|
||||
|
||||
#define STATE_SIZE 0xfd000
|
||||
#define STATE_VERSION "GENPLUS-GX 1.7.5"
|
||||
|
||||
#define load_param(param, size) \
|
||||
memcpy(param, &state[bufferptr], size); \
|
||||
bufferptr+= size;
|
||||
|
||||
#define save_param(param, size) \
|
||||
memcpy(&state[bufferptr], param, size); \
|
||||
bufferptr+= size;
|
||||
|
||||
/* Function prototypes */
|
||||
extern int state_load(unsigned char *state);
|
||||
extern int state_save(unsigned char *state);
|
||||
|
||||
#endif
|
|
@ -438,148 +438,6 @@ void vdp_reset(void)
|
|||
color_update_m4(0x40, 0x00);
|
||||
}
|
||||
|
||||
int vdp_context_save(uint8 *state)
|
||||
{
|
||||
int bufferptr = 0;
|
||||
|
||||
save_param(sat, sizeof(sat));
|
||||
save_param(vram, sizeof(vram));
|
||||
save_param(cram, sizeof(cram));
|
||||
save_param(vsram, sizeof(vsram));
|
||||
save_param(reg, sizeof(reg));
|
||||
save_param(&addr, sizeof(addr));
|
||||
save_param(&addr_latch, sizeof(addr_latch));
|
||||
save_param(&code, sizeof(code));
|
||||
save_param(&pending, sizeof(pending));
|
||||
save_param(&status, sizeof(status));
|
||||
save_param(&dmafill, sizeof(dmafill));
|
||||
save_param(&fifo_idx, sizeof(fifo_idx));
|
||||
save_param(&fifo, sizeof(fifo));
|
||||
save_param(&hint_pending, sizeof(hint_pending));
|
||||
save_param(&vint_pending, sizeof(vint_pending));
|
||||
save_param(&dma_length, sizeof(dma_length));
|
||||
save_param(&dma_type, sizeof(dma_type));
|
||||
save_param(&dma_src, sizeof(dma_src));
|
||||
save_param(&cached_write, sizeof(cached_write));
|
||||
return bufferptr;
|
||||
}
|
||||
|
||||
int vdp_context_load(uint8 *state, uint8 version)
|
||||
{
|
||||
int i, bufferptr = 0;
|
||||
uint8 temp_reg[0x20];
|
||||
|
||||
load_param(sat, sizeof(sat));
|
||||
load_param(vram, sizeof(vram));
|
||||
load_param(cram, sizeof(cram));
|
||||
load_param(vsram, sizeof(vsram));
|
||||
load_param(temp_reg, sizeof(temp_reg));
|
||||
|
||||
/* restore VDP registers */
|
||||
if (system_hw < SYSTEM_MD)
|
||||
{
|
||||
if (system_hw > SYSTEM_SG)
|
||||
{
|
||||
for (i=0;i<0x10;i++)
|
||||
{
|
||||
pending = 1;
|
||||
addr_latch = temp_reg[i];
|
||||
vdp_sms_ctrl_w(0x80 | i);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
for (i=0;i<0x08;i++)
|
||||
{
|
||||
pending = 1;
|
||||
addr_latch = temp_reg[i];
|
||||
vdp_tms_ctrl_w(0x80 | i);
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
for (i=0;i<0x20;i++)
|
||||
{
|
||||
vdp_reg_w(i, temp_reg[i], 0);
|
||||
}
|
||||
}
|
||||
|
||||
load_param(&addr, sizeof(addr));
|
||||
load_param(&addr_latch, sizeof(addr_latch));
|
||||
load_param(&code, sizeof(code));
|
||||
load_param(&pending, sizeof(pending));
|
||||
load_param(&status, sizeof(status));
|
||||
|
||||
/* 1.7.1 state compatibility */
|
||||
if (version < 0x35)
|
||||
{
|
||||
uint16 temp;
|
||||
load_param(&temp, 2);
|
||||
dmafill = temp >> 8;
|
||||
temp &= 0xff;
|
||||
fifo_idx = 0;
|
||||
fifo[0] = fifo[1] = fifo[2] = fifo[3] = (temp << 8) | temp;
|
||||
}
|
||||
else
|
||||
{
|
||||
load_param(&dmafill, sizeof(dmafill));
|
||||
load_param(&fifo_idx, sizeof(fifo_idx));
|
||||
load_param(&fifo, sizeof(fifo));
|
||||
}
|
||||
|
||||
load_param(&hint_pending, sizeof(hint_pending));
|
||||
load_param(&vint_pending, sizeof(vint_pending));
|
||||
load_param(&dma_length, sizeof(dma_length));
|
||||
load_param(&dma_type, sizeof(dma_type));
|
||||
load_param(&dma_src, sizeof(dma_src));
|
||||
load_param(&cached_write, sizeof(cached_write));
|
||||
|
||||
/* restore FIFO byte access flag */
|
||||
fifo_byte_access = ((code & 0x0F) < 0x03);
|
||||
|
||||
/* restore current NTSC/PAL mode */
|
||||
if (system_hw & SYSTEM_MD)
|
||||
{
|
||||
status = (status & ~1) | vdp_pal;
|
||||
}
|
||||
|
||||
if (reg[1] & 0x04)
|
||||
{
|
||||
/* Mode 5 */
|
||||
bg_list_index = 0x800;
|
||||
|
||||
/* reinitialize palette */
|
||||
color_update_m5(0, *(uint16 *)&cram[border << 1]);
|
||||
for(i = 1; i < 0x40; i++)
|
||||
{
|
||||
color_update_m5(i, *(uint16 *)&cram[i << 1]);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Modes 0,1,2,3,4 */
|
||||
bg_list_index = 0x200;
|
||||
|
||||
/* reinitialize palette */
|
||||
for(i = 0; i < 0x20; i ++)
|
||||
{
|
||||
color_update_m4(i, *(uint16 *)&cram[i << 1]);
|
||||
}
|
||||
color_update_m4(0x40, *(uint16 *)&cram[(0x10 | (border & 0x0F)) << 1]);
|
||||
}
|
||||
|
||||
/* invalidate cache */
|
||||
for (i=0;i<bg_list_index;i++)
|
||||
{
|
||||
bg_name_list[i]=i;
|
||||
bg_name_dirty[i]=0xFF;
|
||||
}
|
||||
|
||||
return bufferptr;
|
||||
}
|
||||
|
||||
|
||||
/*--------------------------------------------------------------------------*/
|
||||
/* DMA update function (Mega Drive VDP only) */
|
||||
/*--------------------------------------------------------------------------*/
|
||||
|
|
|
@ -89,8 +89,6 @@ extern unsigned int (*vdp_z80_data_r)(void);
|
|||
/* Function prototypes */
|
||||
extern void vdp_init(void);
|
||||
extern void vdp_reset(void);
|
||||
extern int vdp_context_save(uint8 *state);
|
||||
extern int vdp_context_load(uint8 *state, uint8 version);
|
||||
extern void vdp_dma_update(unsigned int cycles);
|
||||
extern void vdp_68k_ctrl_w(unsigned int data);
|
||||
extern void vdp_z80_ctrl_w(unsigned int data);
|
||||
|
|
Loading…
Reference in New Issue