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BizHawk
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won't miss that code

This commit is contained in:
nattthebear 2016-03-23 21:37:33 -04:00
parent e487f1494c
commit a3a761d028
24 changed files with 110 additions and 1346 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
waterbox/gpgx/cinterface/cinterface.c
View File

@ -9,7 +9,6 @@
#endif
#include "shared.h"
#include "state.h"
#include "genesis.h"
#include "md_ntsc.h"
#include "sms_ntsc.h"

173
waterbox/gpgx/core/cart_hw/md_cart.c
View File

@ -126,7 +126,7 @@ static const md_entry_t rom_database[CART_CNT] =
/* Super King Kong 99 */
{0x0000,0x7d6e,0x60,0x7f,{{0x00,0x00,0x00,0x00},{0xf00007,0xf00007,0xf00007,0xffffff},{0x600001,0x600003,0x600005,0x000000},0,1,NULL,NULL,default_regs_r,custom_regs_w}},
/* Gunfight 3-in-1 */
{0x0000,0x6ff8,0x60,0x7f,{{0x00,0x00,0x00,0x00},{0xf00007,0xf00007,0xf00007,0xffffff},{0x600001,0x600003,0x600005,0x000000},0,1,NULL,NULL,default_regs_r,custom_regs_w}},
{0x0000,0x6ff8,0x60,0x7f,{{0x00,0x00,0x00,0x00},{0xf00007,0xf00007,0xf00007,0xffffff},{0x600001,0x600003,0x600005,0x000000},0,1,NULL,NULL,default_regs_r,custom_regs_w}},
/* Pokemon Stadium */
{0x0000,0x843c,0x70,0x7f,{{0x00,0x00,0x00,0x00},{0xffffff,0xffffff,0xffffff,0xffffff},{0x000000,0x000000,0x000000,0x000000},0,1,NULL,NULL,NULL,custom_regs_w}},
@ -240,7 +240,7 @@ static const md_entry_t rom_database[CART_CNT] =
/************************************************************
Cart Hardware initialization
Cart Hardware initialization
*************************************************************/
void md_cart_init(void)
@ -248,9 +248,9 @@ void md_cart_init(void)
int i;
/***************************************************************************************************************
CARTRIDGE ROM MIRRORING
CARTRIDGE ROM MIRRORING
***************************************************************************************************************
MD Cartridge area is mapped to $000000-$3fffff:
-> when accessing ROM, 68k address lines A1 to A21 can be used by the internal cartridge hardware to decode
@ -286,7 +286,7 @@ void md_cart_init(void)
2/ total ROM size is not a factor of 2: ROM is padded up to 2^k then mirrored each 2^k bytes.
******************************************************************************************************************/
/* calculate nearest size with factor of 2 */
unsigned int size = 0x10000;
while (cart.romsize > size)
@ -319,7 +319,7 @@ void md_cart_init(void)
cart.mask = size - 1;
/**********************************************
DEFAULT CARTRIDGE MAPPING
DEFAULT CARTRIDGE MAPPING
***********************************************/
for (i=0; i<0x40; i++)
{
@ -364,7 +364,7 @@ void md_cart_init(void)
}
/**********************************************
BACKUP MEMORY
BACKUP MEMORY
***********************************************/
sram_init();
eeprom_i2c_init();
@ -387,7 +387,7 @@ void md_cart_init(void)
}
/**********************************************
SVP CHIP
SVP CHIP
***********************************************/
svp = NULL;
if (strstr(rominfo.international,"Virtua Racing"))
@ -407,7 +407,7 @@ void md_cart_init(void)
}
/**********************************************
J-CART
J-CART
***********************************************/
cart.special = 0;
if ((strstr(rominfo.product,"00000000") && (rominfo.checksum == 0x168b)) || /* Super Skidmarks, Micro Machines Military */
@ -439,9 +439,9 @@ void md_cart_init(void)
}
/**********************************************
LOCK-ON
LOCK-ON
***********************************************/
/* clear existing patches */
ggenie_shutdown();
areplay_shutdown();
@ -464,7 +464,7 @@ void md_cart_init(void)
case TYPE_SK:
{
FILE *f;
/* store S&K ROM above cartridge ROM (and before backup memory) */
if (cart.romsize > 0x600000) break;
@ -485,7 +485,7 @@ void md_cart_init(void)
fread(cart.rom + 0x900000 + i, 0x1000, 1, f);
}
fclose(f);
#ifdef LSB_FIRST
for (i=0; i<0x200000; i+=2)
{
@ -494,7 +494,7 @@ void md_cart_init(void)
cart.rom[i + 0x600000] = cart.rom[i + 0x600000 + 1];
cart.rom[i + 0x600000 + 1] = temp;
}
for (i=0; i<0x40000; i+=2)
{
/* Byteswap ROM */
@ -723,7 +723,7 @@ void md_cart_reset(int hard_reset)
m68k.memory_map[i].base = cart.rom + ((i<<16) & cart.mask);
}
}
/* SVP chip */
if (svp)
{
@ -765,105 +765,12 @@ void md_cart_reset(int hard_reset)
}
}
int md_cart_context_save(uint8 *state)
{
int i;
int bufferptr = 0;
uint8 *base;
/* cartridge mapping */
for (i=0; i<0x40; i++)
{
/* get base address */
base = m68k.memory_map[i].base;
if (base == sram.sram)
{
/* SRAM */
state[bufferptr++] = 0xff;
}
else
{
/* ROM */
state[bufferptr++] = ((base - cart.rom) >> 16) & 0xff;
}
}
/* hardware registers */
save_param(cart.hw.regs, sizeof(cart.hw.regs));
/* SVP */
if (svp)
{
save_param(svp->iram_rom, 0x800);
save_param(svp->dram,sizeof(svp->dram));
save_param(&svp->ssp1601,sizeof(ssp1601_t));
}
return bufferptr;
}
int md_cart_context_load(uint8 *state)
{
int i;
int bufferptr = 0;
uint8 offset;
/* cartridge mapping */
for (i=0; i<0x40; i++)
{
/* get offset */
offset = state[bufferptr++];
if (offset == 0xff)
{
/* SRAM */
m68k.memory_map[i].base = sram.sram;
m68k.memory_map[i].read8 = sram_read_byte;
m68k.memory_map[i].read16 = sram_read_word;
m68k.memory_map[i].write8 = sram_write_byte;
m68k.memory_map[i].write16 = sram_write_word;
zbank_memory_map[i].read = sram_read_byte;
zbank_memory_map[i].write = sram_write_byte;
}
else
{
/* check if SRAM was mapped there before loading state */
if (m68k.memory_map[i].base == sram.sram)
{
m68k.memory_map[i].read8 = NULL;
m68k.memory_map[i].read16 = NULL;
m68k.memory_map[i].write8 = m68k_unused_8_w;
m68k.memory_map[i].write16 = m68k_unused_16_w;
zbank_memory_map[i].read = NULL;
zbank_memory_map[i].write = zbank_unused_w;
}
/* ROM */
m68k.memory_map[i].base = cart.rom + (offset << 16);
}
}
/* hardware registers */
load_param(cart.hw.regs, sizeof(cart.hw.regs));
/* SVP */
if (svp)
{
load_param(svp->iram_rom, 0x800);
load_param(svp->dram,sizeof(svp->dram));
load_param(&svp->ssp1601,sizeof(ssp1601_t));
}
return bufferptr;
}
/************************************************************
MAPPER handlers
MAPPER handlers
*************************************************************/
/*
/*
"official" ROM/SRAM bankswitch (Phantasy Star IV, Story of Thor/Beyond Oasis, Sonic 3 & Knuckles)
*/
static void mapper_sega_w(uint32 data)
@ -923,13 +830,13 @@ static void mapper_sega_w(uint32 data)
/*
Super Street Fighter 2 ROM bankswitch
documented by Bart Trzynadlowski (http://www.trzy.org/files/ssf2.txt)
documented by Bart Trzynadlowski (http://www.trzy.org/files/ssf2.txt)
*/
static void mapper_ssf2_w(uint32 address, uint32 data)
{
/* 8 x 512k banks */
address = (address << 2) & 0x38;
/* bank 0 remains unchanged */
if (address)
{
@ -943,7 +850,7 @@ static void mapper_ssf2_w(uint32 address, uint32 data)
}
}
/*
/*
SF-001 mapper
*/
static void mapper_sf001_w(uint32 address, uint32 data)
@ -1039,7 +946,7 @@ static void mapper_sf001_w(uint32 address, uint32 data)
}
}
/*
/*
SF-002 mapper
*/
static void mapper_sf002_w(uint32 address, uint32 data)
@ -1063,7 +970,7 @@ static void mapper_sf002_w(uint32 address, uint32 data)
}
}
/*
/*
SF-004 mapper
*/
static void mapper_sf004_w(uint32 address, uint32 data)
@ -1204,7 +1111,7 @@ static uint32 mapper_sf004_r(uint32 address)
return (((m68k.memory_map[0x00].base - cart.rom) >> 18) << 4);
}
/*
/*
T-5740xx-xx mapper
*/
static void mapper_t5740_w(uint32 address, uint32 data)
@ -1286,7 +1193,7 @@ static uint32 mapper_t5740_r(uint32 address)
return READ_BYTE(cart.rom, address);
}
/*
/*
Super Mario World 64 (unlicensed) mapper
*/
static void mapper_smw_64_w(uint32 address, uint32 data)
@ -1453,7 +1360,7 @@ static uint32 mapper_smw_64_r(uint32 address)
}
}
/*
/*
Realtec ROM bankswitch (Earth Defend, Balloon Boy & Funny World, Whac-A-Critter)
(Note: register usage is inverted in TascoDlx documentation)
*/
@ -1461,7 +1368,7 @@ static void mapper_realtec_w(uint32 address, uint32 data)
{
switch (address)
{
case 0x402000:
case 0x402000:
{
/* number of mapped 64k blocks (the written value is a number of 128k blocks) */
cart.hw.regs[2] = data << 1;
@ -1475,7 +1382,7 @@ static void mapper_realtec_w(uint32 address, uint32 data)
return;
}
case 0x400000:
case 0x400000:
{
/* 00000yy1 */
cart.hw.regs[1] = data & 6;
@ -1527,13 +1434,13 @@ static void mapper_seganet_w(uint32 address, uint32 data)
}
}
/*
/*
Custom ROM Bankswitch used in Soul Edge VS Samurai Spirits, Top Fighter, Mulan, Pocket Monsters II, Lion King 3, Super King Kong 99, Pokemon Stadium
*/
static void mapper_32k_w(uint32 data)
{
int i;
/* 64 x 32k banks */
if (data)
{
@ -1557,7 +1464,7 @@ static void mapper_32k_w(uint32 data)
}
}
/*
/*
Custom ROM Bankswitch used in Chinese Fighter III
*/
static void mapper_64k_w(uint32 data)
@ -1583,7 +1490,7 @@ static void mapper_64k_w(uint32 data)
}
}
/*
/*
Custom ROM Bankswitch used in pirate "Multi-in-1" cartridges, A Bug's Life, King of Fighter 99, Pocket Monster, Rockman X3
*/
static void mapper_64k_multi_w(uint32 address)
@ -1604,7 +1511,7 @@ static uint32 mapper_radica_r(uint32 address)
{
int i = 0;
address = (address >> 1);
/* 64 x 64k banks */
for (i = 0; i < 64; i++)
{
@ -1616,7 +1523,7 @@ static uint32 mapper_radica_r(uint32 address)
/************************************************************
default !TIME signal handler
default !TIME signal handler
*************************************************************/
static void default_time_w(uint32 address, uint32 data)
@ -1696,7 +1603,7 @@ static uint32 custom_regs_r(uint32 address)
static void custom_regs_w(uint32 address, uint32 data)
{
uint8 temp;
/* ROM bankswitch */
if ((address >> 16) > 0x6f)
{
@ -1770,25 +1677,25 @@ static void tekken_regs_w(uint32 address, uint32 data)
cart.hw.regs[0]= 0x00;
break;
}
case 0x02:
{
/* read only ? */
break;
}
case 0x0c:
{
/* data output mode bit 0 ? (game writes $01) */
break;
}
case 0x0e:
{
/* data output mode bit 1 ? (never written by game) */
break;
}
default:
{
/* data input (only connected to D0 ?)*/
@ -1870,9 +1777,9 @@ static void topshooter_w(uint32 address, uint32 data)
/* Sega Channel hardware (not emulated) */
/*
/*
$A13004: BUSY ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
$A13004: BUSY ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?
Unused read16 00A13004 (00005B54)
Unused read16 00A13004 (00005B70)

2
waterbox/gpgx/core/cart_hw/md_cart.h
View File

@ -84,7 +84,5 @@ typedef struct
/* Function prototypes */
extern void md_cart_init(void);
extern void md_cart_reset(int hard_reset);
extern int md_cart_context_save(uint8 *state);
extern int md_cart_context_load(uint8 *state);
#endif

32
waterbox/gpgx/core/cart_hw/sms_cart.c
View File

@ -481,8 +481,8 @@ void sms_cart_init(void)
input.system[1] = SYSTEM_MS_GAMEPAD;
/* default gun offset */
input.x_offset = 20;
input.y_offset = 0;
input.x_offset = 20;
input.y_offset = 0;
/* SpaceGun & Gangster Town use different gun offset */
if ((crc == 0x5359762D) || (crc == 0x5FC74D2A))
@ -515,7 +515,7 @@ void sms_cart_init(void)
cart_rom.pages = 0;
}
}
else
else
{
/* mark Master System & Game Gear BIOS as unloaded */
system_bios &= ~(SYSTEM_SMS | SYSTEM_GG);
@ -703,20 +703,6 @@ int sms_cart_region_detect(void)
return REGION_USA;
}
int sms_cart_context_save(uint8 *state)
{
int bufferptr = 0;
save_param(slot.fcr, 4);
return bufferptr;
}
int sms_cart_context_load(uint8 *state)
{
int bufferptr = 0;
load_param(slot.fcr, 4);
return bufferptr;
}
static void mapper_reset(void)
{
int i;
@ -904,7 +890,7 @@ static void mapper_8k_w(int offset, unsigned int data)
/* cartridge ROM page (8k) */
uint8 page = data % slot.pages;
/* Save frame control register data */
slot.fcr[offset] = data;
@ -919,7 +905,7 @@ static void mapper_8k_w(int offset, unsigned int data)
}
break;
}
case 1: /* cartridge ROM bank (8k) at $A000-$BFFF */
{
for (i = 0x28; i < 0x30; i++)
@ -928,7 +914,7 @@ static void mapper_8k_w(int offset, unsigned int data)
}
break;
}
case 2: /* cartridge ROM bank (8k) at $4000-$5FFF */
{
for (i = 0x10; i < 0x18; i++)
@ -937,7 +923,7 @@ static void mapper_8k_w(int offset, unsigned int data)
}
break;
}
case 3: /* cartridge ROM bank (8k) at $6000-$7FFF */
{
for (i = 0x18; i < 0x20; i++)
@ -953,7 +939,7 @@ static void mapper_8k_w(int offset, unsigned int data)
CHEATS_UPDATE();
#endif
}
static void mapper_16k_w(int offset, unsigned int data)
{
int i;
@ -986,7 +972,7 @@ static void mapper_16k_w(int offset, unsigned int data)
{
/* cartridge ROM page (16k) */
page = slot.fcr[3] % slot.pages;
/* page index increment (SEGA mapper) */
if ((data & 0x03) && (slot.mapper == MAPPER_SEGA))
{

2
waterbox/gpgx/core/cart_hw/sms_cart.h
View File

@ -48,8 +48,6 @@ extern void sms_cart_init(void);
extern void sms_cart_reset(void);
extern void sms_cart_switch(uint8 mode);
extern int sms_cart_region_detect(void);
extern int sms_cart_context_save(uint8 *state);
extern int sms_cart_context_load(uint8 *state);
#endif

48
waterbox/gpgx/core/cart_hw/sram.c
View File

@ -52,8 +52,8 @@ T_SRAM sram;
* 1B4h: dc.l RAM start address
* 1B8h: dc.l RAM end address
* x 1 for BACKUP (not volatile), 0 for volatile RAM
* yz 10 if even address only
* 11 if odd address only
* yz 10 if even address only
* 11 if odd address only
* 00 if both even and odd address
* 01 others (serial EEPROM, RAM with 4-bit data bus, etc)
* abc 001 if SRAM
@ -132,7 +132,7 @@ void sram_init()
sram.start = 0x200001;
sram.end = 0x203fff;
}
else if (((rominfo.realchecksum == 0xaeaa) || (rominfo.realchecksum == 0x8dba)) &&
else if (((rominfo.realchecksum == 0xaeaa) || (rominfo.realchecksum == 0x8dba)) &&
(rominfo.checksum == 0x8104))
{
/* Xin Qigai Wangzi (use uncommon area) */
@ -228,48 +228,6 @@ void sram_write_word(unsigned int address, unsigned int data)
// the variables in SRAM_T are all part of "configuration", so we don't have to save those.
// the only thing that needs to be saved is the SRAM itself and the SEEPROM struct (if applicable)
int sram_context_save(uint8 *state)
{
int bufferptr = 0;
if (!sram.on)
return 0;
save_param(sram.sram, sram_get_actual_size());
switch (sram.custom)
{
case 1:
save_param(&eeprom_i2c, sizeof(eeprom_i2c));
break;
case 2:
save_param(&spi_eeprom, sizeof(spi_eeprom));
break;
case 3:
save_param(&eeprom_93c, sizeof(eeprom_93c));
break;
}
return bufferptr;
}
int sram_context_load(uint8 *state)
{
int bufferptr = 0;
if (!sram.on)
return 0;
load_param(sram.sram, sram_get_actual_size());
switch (sram.custom)
{
case 1:
load_param(&eeprom_i2c, sizeof(eeprom_i2c));
break;
case 2:
load_param(&spi_eeprom, sizeof(spi_eeprom));
break;
case 3:
load_param(&eeprom_93c, sizeof(eeprom_93c));
break;
}
return bufferptr;
}
int sram_get_actual_size()
{
if (!sram.on)

2
waterbox/gpgx/core/cart_hw/sram.h
View File

@ -57,8 +57,6 @@ extern unsigned int sram_read_word(unsigned int address);
extern void sram_write_byte(unsigned int address, unsigned int data);
extern void sram_write_word(unsigned int address, unsigned int data);
extern int sram_context_save(uint8 *state);
extern int sram_context_load(uint8 *state);
extern int sram_get_actual_size();
/* global variables */

81
waterbox/gpgx/core/cd_hw/cdc.c
View File

@ -111,75 +111,6 @@ void cdc_reset(void)
}
}
int cdc_context_save(uint8 *state)
{
uint8 tmp8;
int bufferptr = 0;
if (cdc.dma_w == pcm_ram_dma_w)
{
tmp8 = 1;
}
else if (cdc.dma_w == prg_ram_dma_w)
{
tmp8 = 2;
}
else if (cdc.dma_w == word_ram_0_dma_w)
{
tmp8 = 3;
}
else if (cdc.dma_w == word_ram_1_dma_w)
{
tmp8 = 4;
}
else if (cdc.dma_w == word_ram_2M_dma_w)
{
tmp8 = 5;
}
else
{
tmp8 = 0;
}
save_param(&cdc, sizeof(cdc));
save_param(&tmp8, 1);
return bufferptr;
}
int cdc_context_load(uint8 *state)
{
uint8 tmp8;
int bufferptr = 0;
load_param(&cdc, sizeof(cdc));
load_param(&tmp8, 1);
switch (tmp8)
{
case 1:
cdc.dma_w = pcm_ram_dma_w;
break;
case 2:
cdc.dma_w = prg_ram_dma_w;
break;
case 3:
cdc.dma_w = word_ram_0_dma_w;
break;
case 4:
cdc.dma_w = word_ram_1_dma_w;
break;
case 5:
cdc.dma_w = word_ram_2M_dma_w;
break;
default:
cdc.dma_w = 0;
break;
}
return bufferptr;
}
void cdc_dma_update(void)
{
/* maximal transfer length */
@ -302,7 +233,7 @@ int cdc_decoder_update(uint32 header)
return 1;
}
}
/* keep decoding same data block if Buffer Write is disabled */
return 0;
}
@ -498,7 +429,7 @@ void cdc_reg_w(unsigned char data)
/* set MODE bit according to CTRL1 register & clear FORM bit */
cdc.stat[2] = cdc.ctrl[1] & BIT_MODRQ;
}
else
else
{
/* set MODE & FORM bits according to CTRL1 register */
cdc.stat[2] = cdc.ctrl[1] & (BIT_MODRQ | BIT_FORMRQ);
@ -517,7 +448,7 @@ void cdc_reg_w(unsigned char data)
/* set MODE bit according to CTRL1 register & clear FORM bit */
cdc.stat[2] = data & BIT_MODRQ;
}
else
else
{
/* set MODE & FORM bits according to CTRL1 register */
cdc.stat[2] = data & (BIT_MODRQ | BIT_FORMRQ);
@ -532,7 +463,7 @@ void cdc_reg_w(unsigned char data)
cdc.pt.byte.l = data;
scd.regs[0x04>>1].byte.l = 0x0d;
break;
case 0x0d: /* PTH */
cdc.pt.byte.h = data;
scd.regs[0x04>>1].byte.l = 0x0e;
@ -620,7 +551,7 @@ unsigned char cdc_reg_r(void)
/* clear pending decoder interrupt */
cdc.ifstat |= BIT_DECI;
#if 0
/* no pending data transfer end interrupt */
if ((cdc.ifstat | BIT_DTEI) || !(cdc.ifctrl & BIT_DTEIEN))
@ -658,7 +589,7 @@ unsigned short cdc_host_r(void)
#ifdef LOG_CDC
error("CDC host read 0x%04x -> 0x%04x (dbc=0x%x) (%X)\n", cdc.dac.w, data, cdc.dbc.w, s68k.pc);
#endif
/* increment data address counter */
cdc.dac.w += 2;

4
waterbox/gpgx/core/cd_hw/cdc.h
View File

@ -55,13 +55,11 @@ typedef struct
int cycles;
void (*dma_w)(unsigned int words); /* DMA transfer callback */
uint8 ram[0x4000 + 2352]; /* 16K external RAM (with one block overhead to handle buffer overrun) */
} cdc_t;
} cdc_t;
/* Function prototypes */
extern void cdc_init(void);
extern void cdc_reset(void);
extern int cdc_context_save(uint8 *state);
extern int cdc_context_load(uint8 *state);
extern void cdc_dma_update(void);
extern int cdc_decoder_update(uint32 header);
extern void cdc_reg_w(unsigned char data);

35
waterbox/gpgx/core/cd_hw/cdd.c
View File

@ -194,41 +194,6 @@ void cdd_reset(void)
cdd.audio[0] = cdd.audio[1] = 0;
}
int cdd_context_save(uint8 *state)
{
int bufferptr = 0;
save_param(&cdd.cycles, sizeof(cdd.cycles));
save_param(&cdd.latency, sizeof(cdd.latency));
save_param(&cdd.index, sizeof(cdd.index));
save_param(&cdd.lba, sizeof(cdd.lba));
save_param(&cdd.scanOffset, sizeof(cdd.scanOffset));
save_param(&cdd.volume, sizeof(cdd.volume));
save_param(&cdd.status, sizeof(cdd.status));
save_param(&cdd.sampleOffset, sizeof(cdd.sampleOffset));
save_param(&cdd.sampleLba, sizeof(cdd.sampleLba));
return bufferptr;
}
int cdd_context_load(uint8 *state)
{
int lba;
int bufferptr = 0;
load_param(&cdd.cycles, sizeof(cdd.cycles));
load_param(&cdd.latency, sizeof(cdd.latency));
load_param(&cdd.index, sizeof(cdd.index));
load_param(&cdd.lba, sizeof(cdd.lba));
load_param(&cdd.scanOffset, sizeof(cdd.scanOffset));
load_param(&cdd.volume, sizeof(cdd.volume));
load_param(&cdd.status, sizeof(cdd.status));
load_param(&cdd.sampleOffset, sizeof(cdd.sampleOffset));
load_param(&cdd.sampleLba, sizeof(cdd.sampleLba));
return bufferptr;
}
void cdd_unload(void)
{
cdd.loaded = 0;

8
waterbox/gpgx/core/cd_hw/cdd.h
View File

@ -66,7 +66,7 @@ typedef struct
{
int start;
int end;
} track_t;
} track_t;
/* CD TOC */
typedef struct
@ -74,7 +74,7 @@ typedef struct
int end;
int last;
track_t tracks[CD_MAX_TRACKS];
} toc_t;
} toc_t;
/* CDD hardware */
typedef struct
@ -91,13 +91,11 @@ typedef struct
uint8 status;
toc_t toc;
int16 audio[2];
} cdd_t;
} cdd_t;
/* Function prototypes */
extern void cdd_init(blip_t* left, blip_t* right);
extern void cdd_reset(void);
extern int cdd_context_save(uint8 *state);
extern int cdd_context_load(uint8 *state);
extern int cdd_load(const char *key, char *header);
extern void cdd_unload(void);
extern void cdd_read_data(uint8 *dst);

82
waterbox/gpgx/core/cd_hw/gfx.c
View File

@ -47,10 +47,10 @@ void word_ram_0_dma_w(unsigned int words)
/* CDC buffer source address */
uint16 src_index = cdc.dac.w & 0x3ffe;
/* WORD-RAM destination address*/
uint32 dst_index = (scd.regs[0x0a>>1].w << 3) & 0x1fffe;
/* update DMA destination address */
scd.regs[0x0a>>1].w += (words >> 2);
@ -85,10 +85,10 @@ void word_ram_1_dma_w(unsigned int words)
/* CDC buffer source address */
uint16 src_index = cdc.dac.w & 0x3ffe;
/* WORD-RAM destination address*/
uint32 dst_index = ((scd.regs[0x0a>>1].w << 3) & 0x1fffe);
/* update DMA destination address */
scd.regs[0x0a>>1].w += (words >> 2);
@ -123,10 +123,10 @@ void word_ram_2M_dma_w(unsigned int words)
/* CDC buffer source address */
uint16 src_index = cdc.dac.w & 0x3ffe;
/* WORD-RAM destination address*/
uint32 dst_index = (scd.regs[0x0a>>1].w << 3) & 0x3fffe;
/* update DMA destination address */
scd.regs[0x0a>>1].w += (words >> 2);
@ -320,16 +320,16 @@ void gfx_init(void)
/* $220000-$22FFFF corresponds to $200000-$20FFFF */
for (i=0; i<0x4000; i++)
{
offset = (i & 0x07) << 8; /* cell vline (0-7) */
offset = (i & 0x07) << 8; /* cell vline (0-7) */
offset = offset | (((i >> 8) & 0x3f) << 2); /* cell x offset (0-63) */
offset = offset | (((i >> 3) & 0x1f) << 11); /* cell y offset (0-31) */
gfx.lut_offset[i] = offset;
}
/* $230000-$237FFF corresponds to $210000-$217FFF */
for (i=0x4000; i<0x6000; i++)
{
offset = (i & 0x07) << 8; /* cell vline (0-7) */
offset = (i & 0x07) << 8; /* cell vline (0-7) */
offset = offset | (((i >> 7) & 0x3f) << 2); /* cell x offset (0-63) */
offset = offset | (((i >> 3) & 0x0f) << 11); /* cell y offset (0-15) */
gfx.lut_offset[i] = offset;
@ -338,7 +338,7 @@ void gfx_init(void)
/* $238000-$23BFFF corresponds to $218000-$21BFFF */
for (i=0x6000; i<0x7000; i++)
{
offset = (i & 0x07) << 8; /* cell vline (0-7) */
offset = (i & 0x07) << 8; /* cell vline (0-7) */
offset = offset | (((i >> 6) & 0x3f) << 2); /* cell x offset (0-63) */
offset = offset | (((i >> 3) & 0x07) << 11); /* cell y offset (0-7) */
gfx.lut_offset[i] = offset | 0x8000;
@ -347,7 +347,7 @@ void gfx_init(void)
/* $23C000-$23DFFF corresponds to $21C000-$21DFFF */
for (i=0x7000; i<0x7800; i++)
{
offset = (i & 0x07) << 8; /* cell vline (0-7) */
offset = (i & 0x07) << 8; /* cell vline (0-7) */
offset = offset | (((i >> 5) & 0x3f) << 2); /* cell x offset (0-63) */
offset = offset | (((i >> 3) & 0x03) << 11); /* cell y offset (0-3) */
gfx.lut_offset[i] = offset | 0xc000;
@ -356,7 +356,7 @@ void gfx_init(void)
/* $23E000-$23FFFF corresponds to $21E000-$21FFFF */
for (i=0x7800; i<0x8000; i++)
{
offset = (i & 0x07) << 8; /* cell vline (0-7) */
offset = (i & 0x07) << 8; /* cell vline (0-7) */
offset = offset | (((i >> 5) & 0x3f) << 2); /* cell x offset (0-63) */
offset = offset | (((i >> 3) & 0x03) << 11); /* cell y offset (0-3) */
gfx.lut_offset[i] = offset | 0xe000;
@ -391,7 +391,7 @@ void gfx_init(void)
row = (i >> 6) & mask;
col = (i >> 4) & mask;
if (i & 4) { col = col ^ mask; } /* HFLIP (always first) */
if (i & 4) { col = col ^ mask; } /* HFLIP (always first) */
if (i & 2) { col = col ^ mask; row = row ^ mask; } /* ROLL1 */
if (i & 1) { temp = col; col = row ^ mask; row = temp; } /* ROLL0 */
@ -410,7 +410,7 @@ void gfx_init(void)
row = (i >> 6) & 7;
col = (i >> 3) & 7;
if (i & 4) { col = col ^ 7; } /* HFLIP (always first) */
if (i & 4) { col = col ^ 7; } /* HFLIP (always first) */
if (i & 2) { col = col ^ 7; row = row ^ 7; } /* ROLL1 */
if (i & 1) { temp = col; col = row ^ 7; row = temp; } /* ROLL0 */
@ -420,55 +420,11 @@ void gfx_init(void)
}
void gfx_reset(void)
{
{
/* Reset cycle counter */
gfx.cycles = 0;
}
int gfx_context_save(uint8 *state)
{
uint32 tmp32;
int bufferptr = 0;
save_param(&gfx.cycles, sizeof(gfx.cycles));
save_param(&gfx.cyclesPerLine, sizeof(gfx.cyclesPerLine));
save_param(&gfx.dotMask, sizeof(gfx.dotMask));
save_param(&gfx.stampShift, sizeof(gfx.stampShift));
save_param(&gfx.mapShift, sizeof(gfx.mapShift));
save_param(&gfx.bufferOffset, sizeof(gfx.bufferOffset));
save_param(&gfx.bufferStart, sizeof(gfx.bufferStart));
tmp32 = (uint8 *)(gfx.tracePtr) - scd.word_ram_2M;
save_param(&tmp32, 4);
tmp32 = (uint8 *)(gfx.mapPtr) - scd.word_ram_2M;
save_param(&tmp32, 4);
return bufferptr;
}
int gfx_context_load(uint8 *state)
{
uint32 tmp32;
int bufferptr = 0;
load_param(&gfx.cycles, sizeof(gfx.cycles));
load_param(&gfx.cyclesPerLine, sizeof(gfx.cyclesPerLine));
load_param(&gfx.dotMask, sizeof(gfx.dotMask));
load_param(&gfx.stampShift, sizeof(gfx.stampShift));
load_param(&gfx.mapShift, sizeof(gfx.mapShift));
load_param(&gfx.bufferOffset, sizeof(gfx.bufferOffset));
load_param(&gfx.bufferStart, sizeof(gfx.bufferStart));
load_param(&tmp32, 4);
gfx.tracePtr = (uint16 *)(scd.word_ram_2M + tmp32);
load_param(&tmp32, 4);
gfx.mapPtr = (uint16 *)(scd.word_ram_2M + tmp32);
return bufferptr;
}
INLINE void gfx_render(uint32 bufferIndex, uint32 width)
{
uint8 pixel_in, pixel_out;
@ -531,7 +487,7 @@ INLINE void gfx_render(uint32 bufferIndex, uint32 width)
/* s = stamp size (0=16x16, 1=32x32) */
/* hrr = HFLIP & ROTATION bits */
stamp_index |= gfx.lut_cell[stamp_data | ((scd.regs[0x58>>1].byte.l & 0x02) << 2 ) | ((ypos >> 8) & 0xc0) | ((xpos >> 10) & 0x30)] << 6;
/* pixel offset (0-63) */
/* table entry = yyyxxxhrr (9 bits) */
/* with: yyy = pixel row (0-7) = (ypos >> 11) & 7 */
@ -602,7 +558,7 @@ void gfx_start(unsigned int base, int cycles)
if (!(scd.regs[0x02>>1].byte.l & 0x04))
{
uint32 mask;
/* trace vector pointer */
gfx.tracePtr = (uint16 *)(scd.word_ram_2M + ((base << 2) & 0x3fff8));
@ -654,7 +610,7 @@ void gfx_start(unsigned int base, int cycles)
gfx.cycles = cycles;
/* update GFX chip timings (see AC3:Thunderhawk / Thunderstrike) */
gfx.cyclesPerLine = 4 * 5 * scd.regs[0x62>>1].w;
gfx.cyclesPerLine = 4 * 5 * scd.regs[0x62>>1].w;
/* start graphics operation */
scd.regs[0x58>>1].byte.h = 0x80;
@ -691,7 +647,7 @@ void gfx_update(int cycles)
/* end of graphics operation */
scd.regs[0x58>>1].byte.h = 0;
/* SUB-CPU idle on register $58 polling ? */
if (s68k.stopped & (1<<0x08))
{

3
waterbox/gpgx/core/cd_hw/gfx.h
View File

@ -108,8 +108,7 @@ extern void cell_ram_1_write8(unsigned int address, unsigned int data);
/***************************************************************/
extern void gfx_init(void);
extern void gfx_reset(void);
extern int gfx_context_save(uint8 *state);
extern int gfx_context_load(uint8 *state);
extern void gfx_start(unsigned int base, int cycles);
extern void gfx_update(int cycles);

42
waterbox/gpgx/core/cd_hw/pcm.c
View File

@ -82,42 +82,6 @@ void pcm_reset(void)
blip_clear(blip[1]);
}
int pcm_context_save(uint8 *state)
{
uint8 tmp8;
int bufferptr = 0;
tmp8 = (pcm.bank - pcm.ram) >> 12;
save_param(pcm.chan, sizeof(pcm.chan));
save_param(pcm.out, sizeof(pcm.out));
save_param(&tmp8, 1);
save_param(&pcm.enabled, sizeof(pcm.enabled));
save_param(&pcm.status, sizeof(pcm.status));
save_param(&pcm.index, sizeof(pcm.index));
save_param(pcm.ram, sizeof(pcm.ram));
return bufferptr;
}
int pcm_context_load(uint8 *state)
{
uint8 tmp8;
int bufferptr = 0;
load_param(pcm.chan, sizeof(pcm.chan));
load_param(pcm.out, sizeof(pcm.out));
load_param(&tmp8, 1);
pcm.bank = &pcm.ram[(tmp8 & 0x0f) << 12];
load_param(&pcm.enabled, sizeof(pcm.enabled));
load_param(&pcm.status, sizeof(pcm.status));
load_param(&pcm.index, sizeof(pcm.index));
load_param(pcm.ram, sizeof(pcm.ram));
return bufferptr;
}
void pcm_run(unsigned int length)
{
@ -128,7 +92,7 @@ void pcm_run(unsigned int length)
if (pcm.enabled)
{
int i, j, l, r;
/* generate PCM samples */
for (i=0; i<length; i++)
{
@ -413,10 +377,10 @@ void pcm_ram_dma_w(unsigned int words)
/* CDC buffer source address */
uint16 src_index = cdc.dac.w & 0x3ffe;
/* PCM-RAM destination address*/
uint16 dst_index = (scd.regs[0x0a>>1].w << 2) & 0xffe;
/* update DMA destination address */
scd.regs[0x0a>>1].w += (words >> 1);

334
waterbox/gpgx/core/cd_hw/scd.c
View File

@ -82,10 +82,10 @@ void prg_ram_dma_w(unsigned int words)
/* CDC buffer source address */
uint16 src_index = cdc.dac.w & 0x3ffe;
/* PRG-RAM destination address*/
uint32 dst_index = (scd.regs[0x0a>>1].w << 3) & 0x7fffe;
/* update DMA destination address */
scd.regs[0x0a>>1].w += (words >> 2);
@ -310,7 +310,7 @@ static unsigned int scd_read_byte(unsigned int address)
#endif
return data;
}
/* LED status */
if (address == 0xff8000)
{
@ -330,10 +330,10 @@ static unsigned int scd_read_byte(unsigned int address)
{
/* shifted 4-bit input (xxxx00) */
uint8 bits = (scd.regs[0x4e>>1].w >> (((address & 6) ^ 6) << 1)) << 2;
/* color code */
uint8 code = scd.regs[0x4c>>1].byte.l;
/* 16-bit font data (4 pixels = 16 bits) */
uint16 data = (code >> (bits & 4)) & 0x0f;
@ -411,10 +411,10 @@ static unsigned int scd_read_word(unsigned int address)
{
/* shifted 4-bit input (xxxx00) */
uint8 bits = (scd.regs[0x4e>>1].w >> (((address & 6) ^ 6) << 1)) << 2;
/* color code */
uint8 code = scd.regs[0x4c>>1].byte.l;
/* 16-bit font data (4 pixels = 16 bits) */
uint16 data = (code >> (bits & 4)) & 0x0f;
@ -539,7 +539,7 @@ static void scd_write_byte(unsigned int address, unsigned int data)
case 0x01: /* RESET status */
{
/* RESET bit cleared ? */
/* RESET bit cleared ? */
if (!(data & 0x01))
{
/* reset CD hardware */
@ -556,7 +556,7 @@ static void scd_write_byte(unsigned int address, unsigned int data)
if ((data ^ scd.regs[0x03 >> 1].byte.l) & 0x05)
{
int i;
/* MODE bit */
if (data & 0x04)
{
@ -666,7 +666,7 @@ static void scd_write_byte(unsigned int address, unsigned int data)
/* RET bit set during 1M mode ? */
data |= ~scd.dmna & 0x01;
/* check if RET bit is cleared */
if (!(data & 0x01))
{
@ -678,7 +678,7 @@ static void scd_write_byte(unsigned int address, unsigned int data)
return;
}
}
/* RET bit set in 2M mode */
if (data & 0x01)
{
@ -810,7 +810,7 @@ static void scd_write_word(unsigned int address, unsigned int data)
/* only update LED status (register $00 is reserved for MAIN-CPU, use $06 instead) */
scd.regs[0x06>>1].byte.h = data >> 8;
/* RESET bit cleared ? */
/* RESET bit cleared ? */
if (!(data & 0x01))
{
/* reset CD hardware */
@ -937,7 +937,7 @@ static void scd_write_word(unsigned int address, unsigned int data)
/* RET bit set during 1M mode ? */
data |= ~scd.dmna & 0x01;
/* check if RET bit is cleared */
if (!(data & 0x01))
{
@ -949,7 +949,7 @@ static void scd_write_word(unsigned int address, unsigned int data)
return;
}
}
/* RET bit set in 2M mode */
if (data & 0x01)
{
@ -1026,7 +1026,7 @@ static void scd_write_word(unsigned int address, unsigned int data)
/* clear pending level 1 interrupt if disabled ("Batman Returns" option menu) */
scd.pending &= ~(data & 0x02);
/* update IRQ level */
s68k_update_irq((scd.pending & data) >> 1);
return;
@ -1046,7 +1046,7 @@ static void scd_write_word(unsigned int address, unsigned int data)
case 0x66: /* Trace vector base address */
{
scd.regs[0x66>>1].w = data;
/* start GFX operation */
gfx_start(data, s68k.cycles);
return;
@ -1071,7 +1071,7 @@ static void scd_write_word(unsigned int address, unsigned int data)
void scd_init(void)
{
int i;
/****************************************************************/
/* MAIN-CPU low memory map ($000000-$7FFFFF) */
/****************************************************************/
@ -1122,7 +1122,7 @@ void scd_init(void)
zbank_memory_map[i].read = NULL;
zbank_memory_map[i].write = NULL;
}
/****************************************************************/
/* SUB-CPU memory map ($000000-$FFFFFF) */
/****************************************************************/
@ -1148,7 +1148,7 @@ void scd_init(void)
s68k.memory_map[i].write8 = NULL;
s68k.memory_map[i].write16 = NULL;
}
/* $0C0000-$FD0000: Unused area (Word-RAM mirrored ?) */
for (i=0x0c; i<0xfd; i++)
{
@ -1193,7 +1193,7 @@ void scd_reset(int hard)
if (hard)
{
int i;
/* Clear all ASIC registers by default */
memset(scd.regs, 0, sizeof(scd.regs));
@ -1360,300 +1360,6 @@ void scd_end_frame(unsigned int cycles)
s68k.poll.cycle = 0;
}
int scd_context_save(uint8 *state)
{
uint16 tmp16;
uint32 tmp32;
int bufferptr = 0;
/* internal harware */
save_param(scd.regs, sizeof(scd.regs));
save_param(&scd.cycles, sizeof(scd.cycles));
save_param(&scd.timer, sizeof(scd.timer));
save_param(&scd.pending, sizeof(scd.pending));
save_param(&scd.dmna, sizeof(scd.dmna));
/* GFX processor */
bufferptr += gfx_context_save(&state[bufferptr]);
/* CD Data controller */
bufferptr += cdc_context_save(&state[bufferptr]);
/* CD Drive processor */
bufferptr += cdd_context_save(&state[bufferptr]);
/* PCM chip */
bufferptr += pcm_context_save(&state[bufferptr]);
/* PRG-RAM */
save_param(scd.prg_ram, sizeof(scd.prg_ram));
/* Word-RAM */
if (scd.regs[0x03>>1].byte.l & 0x04)
{
/* 1M mode */
save_param(scd.word_ram, sizeof(scd.word_ram));
}
else
{
/* 2M mode */
save_param(scd.word_ram_2M, sizeof(scd.word_ram_2M));
}
/* MAIN-CPU & SUB-CPU polling */
save_param(&m68k.poll, sizeof(m68k.poll));
save_param(&s68k.poll, sizeof(s68k.poll));
/* H-INT default vector */
tmp16 = *(uint16 *)(m68k.memory_map[scd.cartridge.boot].base + 0x72);
save_param(&tmp16, 2);
/* SUB-CPU internal state */
save_param(&s68k.cycles, sizeof(s68k.cycles));
save_param(&s68k.int_level, sizeof(s68k.int_level));
save_param(&s68k.stopped, sizeof(s68k.stopped));
/* SUB-CPU registers */
tmp32 = s68k_get_reg(M68K_REG_D0); save_param(&tmp32, 4);
tmp32 = s68k_get_reg(M68K_REG_D1); save_param(&tmp32, 4);
tmp32 = s68k_get_reg(M68K_REG_D2); save_param(&tmp32, 4);
tmp32 = s68k_get_reg(M68K_REG_D3); save_param(&tmp32, 4);
tmp32 = s68k_get_reg(M68K_REG_D4); save_param(&tmp32, 4);
tmp32 = s68k_get_reg(M68K_REG_D5); save_param(&tmp32, 4);
tmp32 = s68k_get_reg(M68K_REG_D6); save_param(&tmp32, 4);
tmp32 = s68k_get_reg(M68K_REG_D7); save_param(&tmp32, 4);
tmp32 = s68k_get_reg(M68K_REG_A0); save_param(&tmp32, 4);
tmp32 = s68k_get_reg(M68K_REG_A1); save_param(&tmp32, 4);
tmp32 = s68k_get_reg(M68K_REG_A2); save_param(&tmp32, 4);
tmp32 = s68k_get_reg(M68K_REG_A3); save_param(&tmp32, 4);
tmp32 = s68k_get_reg(M68K_REG_A4); save_param(&tmp32, 4);
tmp32 = s68k_get_reg(M68K_REG_A5); save_param(&tmp32, 4);
tmp32 = s68k_get_reg(M68K_REG_A6); save_param(&tmp32, 4);
tmp32 = s68k_get_reg(M68K_REG_A7); save_param(&tmp32, 4);
tmp32 = s68k_get_reg(M68K_REG_PC); save_param(&tmp32, 4);
tmp16 = s68k_get_reg(M68K_REG_SR); save_param(&tmp16, 2);
tmp32 = s68k_get_reg(M68K_REG_USP); save_param(&tmp32, 4);
tmp32 = s68k_get_reg(M68K_REG_ISP); save_param(&tmp32, 4);
/* bootable MD cartridge */
if (scd.cartridge.boot)
{
bufferptr += md_cart_context_save(&state[bufferptr]);
}
save_param(scd.bram, 0x2000);
// we don't save scd.cartridge.id separately, so it must be non-changing!
if (scd.cartridge.id)
save_param(scd.cartridge.area, scd.cartridge.mask + 1);
return bufferptr;
}
int scd_context_load(uint8 *state)
{
int i;
uint16 tmp16;
uint32 tmp32;
int bufferptr = 0;
/* internal harware */
load_param(scd.regs, sizeof(scd.regs));
load_param(&scd.cycles, sizeof(scd.cycles));
load_param(&scd.timer, sizeof(scd.timer));
load_param(&scd.pending, sizeof(scd.pending));
load_param(&scd.dmna, sizeof(scd.dmna));
/* GFX processor */
bufferptr += gfx_context_load(&state[bufferptr]);
/* CD Data controller */
bufferptr += cdc_context_load(&state[bufferptr]);
/* CD Drive processor */
bufferptr += cdd_context_load(&state[bufferptr]);
/* PCM chip */
bufferptr += pcm_context_load(&state[bufferptr]);
/* PRG-RAM */
load_param(scd.prg_ram, sizeof(scd.prg_ram));
/* PRG-RAM 128k bank mapped to $020000-$03FFFF (resp. $420000-$43FFFF) */
m68k.memory_map[scd.cartridge.boot + 0x02].base = scd.prg_ram + ((scd.regs[0x03>>1].byte.l & 0xc0) << 11);
m68k.memory_map[scd.cartridge.boot + 0x03].base = m68k.memory_map[scd.cartridge.boot + 0x02].base + 0x10000;
/* Word-RAM */
if (scd.regs[0x03>>1].byte.l & 0x04)
{
/* 1M Mode */
load_param(scd.word_ram, sizeof(scd.word_ram));
if (scd.regs[0x03>>1].byte.l & 0x01)
{
/* Word-RAM 1 assigned to MAIN-CPU */
for (i=scd.cartridge.boot+0x20; i<scd.cartridge.boot+0x22; i++)
{
/* Word-RAM 1 data mapped at $200000-$21FFFF */
m68k.memory_map[i].base = scd.word_ram[1] + ((i & 0x01) << 16);
}
for (i=scd.cartridge.boot+0x22; i<scd.cartridge.boot+0x24; i++)
{
/* VRAM cell image mapped at $220000-$23FFFF */
m68k.memory_map[i].read8 = cell_ram_1_read8;
m68k.memory_map[i].read16 = cell_ram_1_read16;
m68k.memory_map[i].write8 = cell_ram_1_write8;
m68k.memory_map[i].write16 = cell_ram_1_write16;
zbank_memory_map[i].read = cell_ram_1_read8;
zbank_memory_map[i].write = cell_ram_1_write8;
}
/* Word-RAM 0 assigned to SUB-CPU */
for (i=0x08; i<0x0c; i++)
{
/* DOT image mapped at $080000-$0BFFFF */
s68k.memory_map[i].read8 = dot_ram_0_read8;
s68k.memory_map[i].read16 = dot_ram_0_read16;
s68k.memory_map[i].write8 = dot_ram_0_write8;
s68k.memory_map[i].write16 = dot_ram_0_write16;
}
for (i=0x0c; i<0x0e; i++)
{
/* Word-RAM 0 data mapped at $0C0000-$0DFFFF */
s68k.memory_map[i].base = scd.word_ram[0] + ((i & 0x01) << 16);
s68k.memory_map[i].read8 = NULL;
s68k.memory_map[i].read16 = NULL;
s68k.memory_map[i].write8 = NULL;
s68k.memory_map[i].write16 = NULL;
}
}
else
{
/* Word-RAM 0 assigned to MAIN-CPU */
for (i=scd.cartridge.boot+0x20; i<scd.cartridge.boot+0x22; i++)
{
/* Word-RAM 0 data mapped at $200000-$21FFFF */
m68k.memory_map[i].base = scd.word_ram[0] + ((i & 0x01) << 16);
}
for (i=scd.cartridge.boot+0x22; i<scd.cartridge.boot+0x24; i++)
{
/* VRAM cell image mapped at $220000-$23FFFF */
m68k.memory_map[i].read8 = cell_ram_0_read8;
m68k.memory_map[i].read16 = cell_ram_0_read16;
m68k.memory_map[i].write8 = cell_ram_0_write8;
m68k.memory_map[i].write16 = cell_ram_0_write16;
zbank_memory_map[i].read = cell_ram_0_read8;
zbank_memory_map[i].write = cell_ram_0_write8;
}
/* Word-RAM 1 assigned to SUB-CPU */
for (i=0x08; i<0x0c; i++)
{
/* DOT image mapped at $080000-$0BFFFF */
s68k.memory_map[i].read8 = dot_ram_1_read8;
s68k.memory_map[i].read16 = dot_ram_1_read16;
s68k.memory_map[i].write8 = dot_ram_1_write8;
s68k.memory_map[i].write16 = dot_ram_1_write16;
}
for (i=0x0c; i<0x0e; i++)
{
/* Word-RAM 1 data mapped at $0C0000-$0DFFFF */
s68k.memory_map[i].base = scd.word_ram[1] + ((i & 0x01) << 16);
s68k.memory_map[i].read8 = NULL;
s68k.memory_map[i].read16 = NULL;
s68k.memory_map[i].write8 = NULL;
s68k.memory_map[i].write16 = NULL;
}
}
}
else
{
/* 2M mode */
load_param(scd.word_ram_2M, sizeof(scd.word_ram_2M));
for (i=scd.cartridge.boot+0x20; i<scd.cartridge.boot+0x24; i++)
{
/* MAIN-CPU: $200000-$23FFFF is mapped to 256K Word-RAM */
m68k.memory_map[i].base = scd.word_ram_2M + ((i & 0x03) << 16);
m68k.memory_map[i].read8 = NULL;
m68k.memory_map[i].read16 = NULL;
m68k.memory_map[i].write8 = NULL;
m68k.memory_map[i].write16 = NULL;
zbank_memory_map[i].read = NULL;
zbank_memory_map[i].write = NULL;
}
for (i=0x08; i<0x0c; i++)
{
/* SUB-CPU: $080000-$0BFFFF is mapped to 256K Word-RAM */
s68k.memory_map[i].read8 = NULL;
s68k.memory_map[i].read16 = NULL;
s68k.memory_map[i].write8 = NULL;
s68k.memory_map[i].write16 = NULL;
}
for (i=0x0c; i<0x0e; i++)
{
/* SUB-CPU: $0C0000-$0DFFFF is unmapped */
s68k.memory_map[i].read8 = s68k_read_bus_8;
s68k.memory_map[i].read16 = s68k_read_bus_16;
s68k.memory_map[i].write8 = s68k_unused_8_w;
s68k.memory_map[i].write16 = s68k_unused_16_w;
}
}
/* MAIN-CPU & SUB-CPU polling */
load_param(&m68k.poll, sizeof(m68k.poll));
load_param(&s68k.poll, sizeof(s68k.poll));
/* H-INT default vector */
load_param(&tmp16, 2);
*(uint16 *)(m68k.memory_map[scd.cartridge.boot].base + 0x72) = tmp16;
/* SUB-CPU internal state */
load_param(&s68k.cycles, sizeof(s68k.cycles));
load_param(&s68k.int_level, sizeof(s68k.int_level));
load_param(&s68k.stopped, sizeof(s68k.stopped));
/* SUB-CPU registers */
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_D0, tmp32);
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_D1, tmp32);
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_D2, tmp32);
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_D3, tmp32);
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_D4, tmp32);
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_D5, tmp32);
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_D6, tmp32);
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_D7, tmp32);
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_A0, tmp32);
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_A1, tmp32);
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_A2, tmp32);
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_A3, tmp32);
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_A4, tmp32);
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_A5, tmp32);
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_A6, tmp32);
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_A7, tmp32);
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_PC, tmp32);
load_param(&tmp16, 2); s68k_set_reg(M68K_REG_SR, tmp16);
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_USP,tmp32);
load_param(&tmp32, 4); s68k_set_reg(M68K_REG_ISP,tmp32);
/* bootable MD cartridge hardware */
if (scd.cartridge.boot)
{
bufferptr += md_cart_context_load(&state[bufferptr]);
}
load_param(scd.bram, 0x2000);
// we don't save scd.cartridge.id separately, so it must be non-changing!
if (scd.cartridge.id)
load_param(scd.cartridge.area, scd.cartridge.mask + 1);
return bufferptr;
}
int scd_68k_irq_ack(int level)
{
#ifdef LOG_SCD

2
waterbox/gpgx/core/cd_hw/scd.h
View File

@ -82,8 +82,6 @@ extern void scd_init(void);
extern void scd_reset(int hard);
extern void scd_update(unsigned int cycles);
extern void scd_end_frame(unsigned int cycles);
extern int scd_context_load(uint8 *state);
extern int scd_context_save(uint8 *state);
extern int scd_68k_irq_ack(int level);
extern void prg_ram_dma_w(unsigned int words);

1
waterbox/gpgx/core/shared.h
View File

@ -29,7 +29,6 @@
#include "ggenie.h"
#include "areplay.h"
#include "svp.h"
#include "state.h"
#endif /* _SHARED_H_ */

52
waterbox/gpgx/core/sound/sound.c
View File

@ -116,7 +116,7 @@ void sound_reset(void)
/* reset FM buffer pointer */
fm_ptr = fm_buffer;
/* reset FM cycle counters */
fm_cycles_start = fm_cycles_count = 0;
}
@ -152,7 +152,7 @@ int sound_update(unsigned int cycles)
delta = ((*ptr++ * preamp) / 100) - l;
l += delta;
blip_add_delta(snd.blips[0][0], time, delta);
/* right channel */
delta = ((*ptr++ * preamp) / 100) - r;
r += delta;
@ -172,7 +172,7 @@ int sound_update(unsigned int cycles)
delta = ((*ptr++ * preamp) / 100) - l;
l += delta;
blip_add_delta_fast(snd.blips[0][0], time, delta);
/* right channel */
delta = ((*ptr++ * preamp) / 100) - r;
r += delta;
@ -193,7 +193,7 @@ int sound_update(unsigned int cycles)
/* adjust FM cycle counters for next frame */
fm_cycles_count = fm_cycles_start = time - cycles;
/* end of blip buffers time frame */
blip_end_frame(snd.blips[0][0], cycles);
blip_end_frame(snd.blips[0][1], cycles);
@ -202,48 +202,6 @@ int sound_update(unsigned int cycles)
return blip_samples_avail(snd.blips[0][0]);
}
int sound_context_save(uint8 *state)
{
int bufferptr = 0;
if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
{
bufferptr = YM2612SaveContext(state);
}
else
{
save_param(YM2413GetContextPtr(),YM2413GetContextSize());
}
save_param(SN76489_GetContextPtr(),SN76489_GetContextSize());
save_param(&fm_cycles_start,sizeof(fm_cycles_start));
return bufferptr;
}
int sound_context_load(uint8 *state)
{
int bufferptr = 0;
if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
{
bufferptr = YM2612LoadContext(state);
YM2612Config(config.dac_bits);
}
else
{
load_param(YM2413GetContextPtr(),YM2413GetContextSize());
}
load_param(SN76489_GetContextPtr(),SN76489_GetContextSize());
load_param(&fm_cycles_start,sizeof(fm_cycles_start));
fm_cycles_count = fm_cycles_start;
return bufferptr;
}
void fm_reset(unsigned int cycles)
{
/* synchronize FM chip with CPU */
@ -260,7 +218,7 @@ void fm_write(unsigned int cycles, unsigned int address, unsigned int data)
{
fm_update(cycles);
}
/* write FM register */
YM_Write(address, data);
}

54
waterbox/gpgx/core/sound/ym2612.c
View File

@ -2123,57 +2123,3 @@ void YM2612Config(unsigned char dac_bits)
}
}
}
int YM2612LoadContext(unsigned char *state)
{
int c,s;
uint8 index;
int bufferptr = 0;
/* restore YM2612 context */
load_param(&ym2612, sizeof(ym2612));
/* restore DT table address pointer for each channel slots */
for (c=0; c<6; c++)
{
for (s=0; s<4; s++)
{
load_param(&index,sizeof(index));
bufferptr += sizeof(index);
ym2612.CH[c].SLOT[s].DT = ym2612.OPN.ST.dt_tab[index&7];
}
}
/* restore outputs connections */
setup_connection(&ym2612.CH[0],0);
setup_connection(&ym2612.CH[1],1);
setup_connection(&ym2612.CH[2],2);
setup_connection(&ym2612.CH[3],3);
setup_connection(&ym2612.CH[4],4);
setup_connection(&ym2612.CH[5],5);
return bufferptr;
}
int YM2612SaveContext(unsigned char *state)
{
int c,s;
uint8 index;
int bufferptr = 0;
/* save YM2612 context */
save_param(&ym2612, sizeof(ym2612));
/* save DT table index for each channel slots */
for (c=0; c<6; c++)
{
for (s=0; s<4; s++)
{
index = (ym2612.CH[c].SLOT[s].DT - ym2612.OPN.ST.dt_tab[0]) >> 5;
save_param(&index,sizeof(index));
bufferptr += sizeof(index);
}
}
return bufferptr;
}

2
waterbox/gpgx/core/sound/ym2612.h
View File

@ -22,8 +22,6 @@ extern void YM2612ResetChip(void);
extern void YM2612Update(int *buffer, int length);
extern void YM2612Write(unsigned int a, unsigned int v);
extern unsigned int YM2612Read(void);
extern int YM2612LoadContext(unsigned char *state);
extern int YM2612SaveContext(unsigned char *state);
extern INT32 *ym2612_lfo_pm_table;

295
waterbox/gpgx/core/state.c
View File

@ -1,295 +0,0 @@
/***************************************************************************************
* Genesis Plus
* Savestate support
*
* Copyright (C) 2007-2012 Eke-Eke (Genesis Plus GX)
*
* Redistribution and use of this code or any derivative works are permitted
* provided that the following conditions are met:
*
* - Redistributions may not be sold, nor may they be used in a commercial
* product or activity.
*
* - Redistributions that are modified from the original source must include the
* complete source code, including the source code for all components used by a
* binary built from the modified sources. However, as a special exception, the
* source code distributed need not include anything that is normally distributed
* (in either source or binary form) with the major components (compiler, kernel,
* and so on) of the operating system on which the executable runs, unless that
* component itself accompanies the executable.
*
* - Redistributions must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************************/
#include "shared.h"
int state_load(unsigned char *state)
{
int i, bufferptr = 0;
/* signature check (GENPLUS-GX x.x.x) */
char version[17];
load_param(version,16);
version[16] = 0;
if (memcmp(version,STATE_VERSION,11))
{
return 0;
}
/* version check (keep compatibility with previous & current state version) */
if ((version[11] < 0x31) || (version[13] < 0x37) || (version[15] < 0x31))
{
return 0;
}
/* reset system */
system_reset();
/* enable VDP access for TMSS systems */
for (i=0xc0; i<0xe0; i+=8)
{
m68k.memory_map[i].read8 = vdp_read_byte;
m68k.memory_map[i].read16 = vdp_read_word;
m68k.memory_map[i].write8 = vdp_write_byte;
m68k.memory_map[i].write16 = vdp_write_word;
zbank_memory_map[i].read = zbank_read_vdp;
zbank_memory_map[i].write = zbank_write_vdp;
}
/* GENESIS */
if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
{
load_param(work_ram, sizeof(work_ram));
load_param(zram, sizeof(zram));
load_param(&zstate, sizeof(zstate));
load_param(&zbank, sizeof(zbank));
if (zstate == 3)
{
m68k.memory_map[0xa0].read8 = z80_read_byte;
m68k.memory_map[0xa0].read16 = z80_read_word;
m68k.memory_map[0xa0].write8 = z80_write_byte;
m68k.memory_map[0xa0].write16 = z80_write_word;
}
else
{
m68k.memory_map[0xa0].read8 = m68k_read_bus_8;
m68k.memory_map[0xa0].read16 = m68k_read_bus_16;
m68k.memory_map[0xa0].write8 = m68k_unused_8_w;
m68k.memory_map[0xa0].write16 = m68k_unused_16_w;
}
}
else
{
load_param(work_ram, 0x2000);
}
/* IO */
load_param(io_reg, sizeof(io_reg));
load_param(gamepad, sizeof(gamepad));
if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
{
io_reg[0] = region_code | 0x20 | (config.bios & 1);
}
else
{
io_reg[0] = 0x80 | (region_code >> 1);
}
/* VDP */
bufferptr += vdp_context_load(&state[bufferptr], version[15]);
/* SOUND */
bufferptr += sound_context_load(&state[bufferptr]);
if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
{
SN76489_Init(snd.blips[0][0], snd.blips[0][1], SN_INTEGRATED);
SN76489_Config(0, config.psg_preamp, config.psgBoostNoise, 0xff);
}
else
{
SN76489_Init(snd.blips[0][0], snd.blips[0][1], (system_hw < SYSTEM_MARKIII) ? SN_DISCRETE : SN_INTEGRATED);
SN76489_Config(0, config.psg_preamp, config.psgBoostNoise, io_reg[6]);
}
/* 68000 */
if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
{
uint16 tmp16;
uint32 tmp32;
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D0, tmp32);
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D1, tmp32);
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D2, tmp32);
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D3, tmp32);
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D4, tmp32);
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D5, tmp32);
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D6, tmp32);
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_D7, tmp32);
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A0, tmp32);
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A1, tmp32);
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A2, tmp32);
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A3, tmp32);
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A4, tmp32);
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A5, tmp32);
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A6, tmp32);
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_A7, tmp32);
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_PC, tmp32);
load_param(&tmp16, 2); m68k_set_reg(M68K_REG_SR, tmp16);
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_USP,tmp32);
load_param(&tmp32, 4); m68k_set_reg(M68K_REG_ISP,tmp32);
load_param(&m68k.cycles, sizeof(m68k.cycles));
load_param(&m68k.int_level, sizeof(m68k.int_level));
load_param(&m68k.stopped, sizeof(m68k.stopped));
}
/* Z80 */
load_param(&Z80, sizeof(Z80_Regs));
Z80.irq_callback = z80_irq_callback;
/* Extra HW */
if (system_hw == SYSTEM_MCD)
{
/* handle case of MD cartridge using or not CD hardware */
char id[5];
load_param(id,4);
id[4] = 0;
/* check if CD hardware was enabled before attempting to restore */
if (memcmp(id,"SCD!",4))
{
return 0;
}
/* CD hardware */
bufferptr += scd_context_load(&state[bufferptr]);
}
else if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
{
/* MD cartridge hardware */
bufferptr += md_cart_context_load(&state[bufferptr]);
}
else
{
/* MS cartridge hardware */
bufferptr += sms_cart_context_load(&state[bufferptr]);
sms_cart_switch(~io_reg[0x0E]);
}
bufferptr += sram_context_load(&state[bufferptr]);
load_param(&bitmap.viewport, sizeof(bitmap.viewport));
return bufferptr;
}
int state_save(unsigned char *state)
{
/* buffer size */
int bufferptr = 0;
/* version string */
char version[16];
strncpy(version,STATE_VERSION,16);
save_param(version, 16);
/* GENESIS */
if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
{
save_param(work_ram, sizeof(work_ram));
save_param(zram, sizeof(zram));
save_param(&zstate, sizeof(zstate));
save_param(&zbank, sizeof(zbank));
}
else
{
save_param(work_ram, 0x2000);
}
/* IO */
save_param(io_reg, sizeof(io_reg));
save_param(gamepad, sizeof(gamepad));
/* VDP */
bufferptr += vdp_context_save(&state[bufferptr]);
/* SOUND */
bufferptr += sound_context_save(&state[bufferptr]);
/* 68000 */
if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
{
uint16 tmp16;
uint32 tmp32;
tmp32 = m68k_get_reg(M68K_REG_D0); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(M68K_REG_D1); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(M68K_REG_D2); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(M68K_REG_D3); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(M68K_REG_D4); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(M68K_REG_D5); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(M68K_REG_D6); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(M68K_REG_D7); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(M68K_REG_A0); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(M68K_REG_A1); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(M68K_REG_A2); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(M68K_REG_A3); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(M68K_REG_A4); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(M68K_REG_A5); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(M68K_REG_A6); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(M68K_REG_A7); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(M68K_REG_PC); save_param(&tmp32, 4);
tmp16 = m68k_get_reg(M68K_REG_SR); save_param(&tmp16, 2);
tmp32 = m68k_get_reg(M68K_REG_USP); save_param(&tmp32, 4);
tmp32 = m68k_get_reg(M68K_REG_ISP); save_param(&tmp32, 4);
save_param(&m68k.cycles, sizeof(m68k.cycles));
save_param(&m68k.int_level, sizeof(m68k.int_level));
save_param(&m68k.stopped, sizeof(m68k.stopped));
}
/* Z80 */
save_param(&Z80, sizeof(Z80_Regs));
/* External HW */
if (system_hw == SYSTEM_MCD)
{
/* CD hardware ID flag */
char id[5];
strncpy(id,"SCD!",4);
save_param(id, 4);
/* CD hardware */
bufferptr += scd_context_save(&state[bufferptr]);
}
else if ((system_hw & SYSTEM_PBC) == SYSTEM_MD)
{
/* MD cartridge hardware */
bufferptr += md_cart_context_save(&state[bufferptr]);
}
else
{
/* MS cartridge hardware */
bufferptr += sms_cart_context_save(&state[bufferptr]);
}
bufferptr += sram_context_save(&state[bufferptr]);
save_param(&bitmap.viewport, sizeof(bitmap.viewport));
/* return total size */
return bufferptr;
}

57
waterbox/gpgx/core/state.h
View File

@ -1,57 +0,0 @@
/***************************************************************************************
* Genesis Plus
* Savestate support
*
* Copyright (C) 2007-2012 Eke-Eke (Genesis Plus GX)
*
* Redistribution and use of this code or any derivative works are permitted
* provided that the following conditions are met:
*
* - Redistributions may not be sold, nor may they be used in a commercial
* product or activity.
*
* - Redistributions that are modified from the original source must include the
* complete source code, including the source code for all components used by a
* binary built from the modified sources. However, as a special exception, the
* source code distributed need not include anything that is normally distributed
* (in either source or binary form) with the major components (compiler, kernel,
* and so on) of the operating system on which the executable runs, unless that
* component itself accompanies the executable.
*
* - Redistributions must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************************/
#ifndef _STATE_H_
#define _STATE_H_
#define STATE_SIZE 0xfd000
#define STATE_VERSION "GENPLUS-GX 1.7.5"
#define load_param(param, size) \
memcpy(param, &state[bufferptr], size); \
bufferptr+= size;
#define save_param(param, size) \
memcpy(&state[bufferptr], param, size); \
bufferptr+= size;
/* Function prototypes */
extern int state_load(unsigned char *state);
extern int state_save(unsigned char *state);
#endif

142
waterbox/gpgx/core/vdp_ctrl.c
View File

@ -438,148 +438,6 @@ void vdp_reset(void)
color_update_m4(0x40, 0x00);
}
int vdp_context_save(uint8 *state)
{
int bufferptr = 0;
save_param(sat, sizeof(sat));
save_param(vram, sizeof(vram));
save_param(cram, sizeof(cram));
save_param(vsram, sizeof(vsram));
save_param(reg, sizeof(reg));
save_param(&addr, sizeof(addr));
save_param(&addr_latch, sizeof(addr_latch));
save_param(&code, sizeof(code));
save_param(&pending, sizeof(pending));
save_param(&status, sizeof(status));
save_param(&dmafill, sizeof(dmafill));
save_param(&fifo_idx, sizeof(fifo_idx));
save_param(&fifo, sizeof(fifo));
save_param(&hint_pending, sizeof(hint_pending));
save_param(&vint_pending, sizeof(vint_pending));
save_param(&dma_length, sizeof(dma_length));
save_param(&dma_type, sizeof(dma_type));
save_param(&dma_src, sizeof(dma_src));
save_param(&cached_write, sizeof(cached_write));
return bufferptr;
}
int vdp_context_load(uint8 *state, uint8 version)
{
int i, bufferptr = 0;
uint8 temp_reg[0x20];
load_param(sat, sizeof(sat));
load_param(vram, sizeof(vram));
load_param(cram, sizeof(cram));
load_param(vsram, sizeof(vsram));
load_param(temp_reg, sizeof(temp_reg));
/* restore VDP registers */
if (system_hw < SYSTEM_MD)
{
if (system_hw > SYSTEM_SG)
{
for (i=0;i<0x10;i++)
{
pending = 1;
addr_latch = temp_reg[i];
vdp_sms_ctrl_w(0x80 | i);
}
}
else
{
for (i=0;i<0x08;i++)
{
pending = 1;
addr_latch = temp_reg[i];
vdp_tms_ctrl_w(0x80 | i);
}
}
}
else
{
for (i=0;i<0x20;i++)
{
vdp_reg_w(i, temp_reg[i], 0);
}
}
load_param(&addr, sizeof(addr));
load_param(&addr_latch, sizeof(addr_latch));
load_param(&code, sizeof(code));
load_param(&pending, sizeof(pending));
load_param(&status, sizeof(status));
/* 1.7.1 state compatibility */
if (version < 0x35)
{
uint16 temp;
load_param(&temp, 2);
dmafill = temp >> 8;
temp &= 0xff;
fifo_idx = 0;
fifo[0] = fifo[1] = fifo[2] = fifo[3] = (temp << 8) | temp;
}
else
{
load_param(&dmafill, sizeof(dmafill));
load_param(&fifo_idx, sizeof(fifo_idx));
load_param(&fifo, sizeof(fifo));
}
load_param(&hint_pending, sizeof(hint_pending));
load_param(&vint_pending, sizeof(vint_pending));
load_param(&dma_length, sizeof(dma_length));
load_param(&dma_type, sizeof(dma_type));
load_param(&dma_src, sizeof(dma_src));
load_param(&cached_write, sizeof(cached_write));
/* restore FIFO byte access flag */
fifo_byte_access = ((code & 0x0F) < 0x03);
/* restore current NTSC/PAL mode */
if (system_hw & SYSTEM_MD)
{
status = (status & ~1) | vdp_pal;
}
if (reg[1] & 0x04)
{
/* Mode 5 */
bg_list_index = 0x800;
/* reinitialize palette */
color_update_m5(0, *(uint16 *)&cram[border << 1]);
for(i = 1; i < 0x40; i++)
{
color_update_m5(i, *(uint16 *)&cram[i << 1]);
}
}
else
{
/* Modes 0,1,2,3,4 */
bg_list_index = 0x200;
/* reinitialize palette */
for(i = 0; i < 0x20; i ++)
{
color_update_m4(i, *(uint16 *)&cram[i << 1]);
}
color_update_m4(0x40, *(uint16 *)&cram[(0x10 | (border & 0x0F)) << 1]);
}
/* invalidate cache */
for (i=0;i<bg_list_index;i++)
{
bg_name_list[i]=i;
bg_name_dirty[i]=0xFF;
}
return bufferptr;
}
/*--------------------------------------------------------------------------*/
/* DMA update function (Mega Drive VDP only) */
/*--------------------------------------------------------------------------*/

2
waterbox/gpgx/core/vdp_ctrl.h
View File

@ -89,8 +89,6 @@ extern unsigned int (*vdp_z80_data_r)(void);
/* Function prototypes */
extern void vdp_init(void);
extern void vdp_reset(void);
extern int vdp_context_save(uint8 *state);
extern int vdp_context_load(uint8 *state, uint8 version);
extern void vdp_dma_update(unsigned int cycles);
extern void vdp_68k_ctrl_w(unsigned int data);
extern void vdp_z80_ctrl_w(unsigned int data);