From 9f4b6f1ecf19f2a74d84fb83fd09eeace38eddd5 Mon Sep 17 00:00:00 2001
From: alyosha-tas <alexei.f.k@gmail.com>
Date: Mon, 4 Jun 2018 08:57:12 -0400
Subject: [PATCH] z80: Bus timing on interrupts

---
 .../CPUs/Z80A/Interrupts.cs                   | 48 +++++++++++--------
 .../CPUs/Z80A/Registers.cs                    |  7 +++
 2 files changed, 35 insertions(+), 20 deletions(-)

diff --git a/BizHawk.Emulation.Cores/CPUs/Z80A/Interrupts.cs b/BizHawk.Emulation.Cores/CPUs/Z80A/Interrupts.cs
index 648590c92b..442fe109f6 100644
--- a/BizHawk.Emulation.Cores/CPUs/Z80A/Interrupts.cs
+++ b/BizHawk.Emulation.Cores/CPUs/Z80A/Interrupts.cs
@@ -34,16 +34,18 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
 		{
 			cur_instr = new ushort[]
 						{DEC16, SPl, SPh,
+						TR, ALU, PCl,
 						WAIT,
-						WR, SPl, SPh, PCh,
-						DEC16, SPl, SPh,
+						WR_DEC, SPl, SPh, PCh,
+						TR16, PCl, PCh, NMI_V, ZERO,
 						WAIT,
-						WR, SPl, SPh, PCl,
-						ASGN, PCl, 0x66,
-						ASGN, PCh, 0,
+						WR, SPl, SPh, ALU,
+						IDLE,						
 						WAIT,
 						OP_F,
 						OP };
+
+			BUSRQ = new ushort[] { 0, SPl, 0, 0, SPl, 0, 0, PCl, 0, 0, 0 };
 		}
 
 		// Mode 0 interrupts only take effect if a CALL or RST is on the data bus
@@ -56,55 +58,61 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
 			cur_instr = new ushort[]
 						{IDLE,
 						WAIT,
-						RD, ALU, PCl, PCh,
-						INC16, PCl, PCh,
+						RD_INC, ALU, PCl, PCh,
+						IDLE,
 						WAIT,
 						OP_F,
 						OP };
+
+			BUSRQ = new ushort[] { PCl, 0, 0, PCl, 0, 0, 0 };
 		}
 
 		// Just jump to $0038
 		private void INTERRUPT_1()
 		{
 			cur_instr = new ushort[]
-						{DEC16, SPl, SPh,
-						WAIT,
-						WR, SPl, SPh, PCh,
+						{IDLE,
+						ASGN, ALU, PCl,
 						DEC16, SPl, SPh,
-						WAIT,
-						WR, SPl, SPh, PCl,
-						ASGN, PCl, 0x38,
 						IDLE,
-						ASGN, PCh, 0,
+						WAIT,
+						WR_DEC, SPl, SPh, PCh,
+						TR16, PCl, PCh, IRQ_V, ZERO,
+						WAIT,
+						WR, SPl, SPh, ALU,
 						IDLE,
 						WAIT,
 						OP_F,
 						OP };
+
+			BUSRQ = new ushort[] { 0, 0, 0, SPl, 0, 0, SPl, 0, 0, PCl, 0, 0, 0 };
 		}
 
 		// Interrupt mode 2 uses the I vector combined with a byte on the data bus
 		private void INTERRUPT_2()
 		{
 			cur_instr = new ushort[]
-						{IDLE,
-						WAIT,
-						FTCH_DB,
-						TR16, Z, W, DB, I,
+						{FTCH_DB,
+						IDLE,
 						DEC16, SPl, SPh,
+						TR16, Z, W, DB, I,						
 						WAIT,
-						WR, SPl, SPh, PCh,
-						DEC16, SPl, SPh,
+						WR_DEC, SPl, SPh, PCh,
+						IDLE,
 						WAIT,
 						WR, SPl, SPh, PCl,
 						IDLE,
 						WAIT,
 						RD_INC, PCl, Z, W,
 						IDLE,
+						WAIT,
 						RD, PCh, Z, W,
 						IDLE,
 						WAIT,
 						OP_F,
 						OP };
+
+			BUSRQ = new ushort[] { 0, 0, 0, SPl, 0, 0, SPl, 0, 0, Z, 0, 0, Z, 0 ,0 ,PCl, 0, 0, 0 };
 		}
 
 		private static ushort[] INT_vectors = new ushort[] {0x40, 0x48, 0x50, 0x58, 0x60};
diff --git a/BizHawk.Emulation.Cores/CPUs/Z80A/Registers.cs b/BizHawk.Emulation.Cores/CPUs/Z80A/Registers.cs
index 0e8dde3435..b1fd71d5b9 100644
--- a/BizHawk.Emulation.Cores/CPUs/Z80A/Registers.cs
+++ b/BizHawk.Emulation.Cores/CPUs/Z80A/Registers.cs
@@ -40,6 +40,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
 		public ushort H_s = 30;
 		public ushort L_s = 31;
 		public ushort DB = 32;
+		public ushort IRQ_V = 34; // IRQ mode 1 vector
+		public ushort NMI_V = 35; // NMI vector
 
 		public ushort[] Regs = new ushort[36];
 
@@ -112,6 +114,11 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
 				Regs[i] = 0;
 			}
 
+			// the IRQ1 vector is 0x38
+			Regs[IRQ_V] = 0x38;
+			// The NMI vector is constant 0x66
+			Regs[NMI_V] = 0x66;
+
 			FlagI = false;
 			FlagW = false;
 		}