diff --git a/BizHawk.Emulation/CPUs/MOS 6502/Execute.cs b/BizHawk.Emulation/CPUs/MOS 6502/Execute.cs index 250b2021c2..15b580ac1d 100644 --- a/BizHawk.Emulation/CPUs/MOS 6502/Execute.cs +++ b/BizHawk.Emulation/CPUs/MOS 6502/Execute.cs @@ -54,6 +54,7 @@ namespace BizHawk.Emulation.CPUs.M6502 PendingCycles -= 6; TotalExecutedCycles += 6; break; case 0x04: // NOP zp + PC += 1; PendingCycles -= 3; TotalExecutedCycles += 3; break; case 0x05: // ORA zp @@ -89,6 +90,7 @@ namespace BizHawk.Emulation.CPUs.M6502 PendingCycles -= 2; TotalExecutedCycles += 2; break; case 0x0C: // NOP (addr) + PC += 2; PendingCycles -= 4; TotalExecutedCycles += 4; break; case 0x0D: // ORA addr @@ -127,6 +129,7 @@ namespace BizHawk.Emulation.CPUs.M6502 PendingCycles -= 5; TotalExecutedCycles += 5; break; case 0x14: // NOP zp,X + PC += 1; PendingCycles -= 4; TotalExecutedCycles += 4; break; case 0x15: // ORA zp,X @@ -162,6 +165,7 @@ namespace BizHawk.Emulation.CPUs.M6502 PendingCycles -= 2; TotalExecutedCycles += 2; break; case 0x1C: // NOP (addr,X) + PC += 1; PendingCycles -= 4; TotalExecutedCycles += 4; break; case 0x1D: // ORA addr,X* @@ -288,6 +292,7 @@ FlagT = true;//this seems wrong PendingCycles -= 5; TotalExecutedCycles += 5; break; case 0x34: // NOP zp,X + PC += 1; PendingCycles -= 4; TotalExecutedCycles += 4; break; case 0x35: // AND zp,X @@ -323,6 +328,7 @@ FlagT = true;//this seems wrong PendingCycles -= 2; TotalExecutedCycles += 2; break; case 0x3C: // NOP (addr,X) + PC += 1; PendingCycles -= 4; TotalExecutedCycles += 4; break; case 0x3D: // AND addr,X* @@ -359,6 +365,7 @@ FlagT = true;// this seems wrong PendingCycles -= 6; TotalExecutedCycles += 6; break; case 0x44: // NOP zp + PC += 1; PendingCycles -= 3; TotalExecutedCycles += 3; break; case 0x45: // EOR zp @@ -432,6 +439,7 @@ FlagT = true;// this seems wrong PendingCycles -= 5; TotalExecutedCycles += 5; break; case 0x54: // NOP zp,X + PC += 1; PendingCycles -= 4; TotalExecutedCycles += 4; break; case 0x55: // EOR zp,X @@ -468,6 +476,7 @@ FlagT = true;// this seems wrong PendingCycles -= 2; TotalExecutedCycles += 2; break; case 0x5C: // NOP (addr,X) + PC += 1; PendingCycles -= 4; TotalExecutedCycles += 4; break; case 0x5D: // EOR addr,X* @@ -506,6 +515,7 @@ FlagT = true;// this seems wrong PendingCycles -= 6; TotalExecutedCycles += 6; break; case 0x64: // NOP zp + PC += 1; PendingCycles -= 3; TotalExecutedCycles += 3; break; case 0x65: // ADC zp @@ -593,6 +603,7 @@ FlagT = true;// this seems wrong PendingCycles -= 5; TotalExecutedCycles += 5; break; case 0x74: // NOP zp,X + PC += 1; PendingCycles -= 4; TotalExecutedCycles += 4; break; case 0x75: // ADC zp,X @@ -635,6 +646,7 @@ FlagT = true;// this seems wrong PendingCycles -= 2; TotalExecutedCycles += 2; break; case 0x7C: // NOP (addr,X) + PC += 1; PendingCycles -= 4; TotalExecutedCycles += 4; break; case 0x7D: // ADC addr,X* @@ -661,6 +673,7 @@ FlagT = true;// this seems wrong PendingCycles -= 7; TotalExecutedCycles += 7; break; case 0x80: // NOP #nn + PC += 1; PendingCycles -= 2; TotalExecutedCycles += 2; break; case 0x81: // STA (addr,X) @@ -670,6 +683,7 @@ FlagT = true;// this seems wrong PendingCycles -= 6; TotalExecutedCycles += 6; break; case 0x82: // NOP #nn + PC += 1; PendingCycles -= 2; TotalExecutedCycles += 2; break; case 0x84: // STY zp @@ -692,6 +706,7 @@ FlagT = true;// this seems wrong PendingCycles -= 2; TotalExecutedCycles += 2; break; case 0x89: // NOP #nn + PC += 1; PendingCycles -= 2; TotalExecutedCycles += 2; break; case 0x8A: // TXA @@ -921,6 +936,7 @@ FlagT = true;// this seems wrong PendingCycles -= 6; break; case 0xC2: // NOP #nn + PC += 1; PendingCycles -= 2; TotalExecutedCycles += 2; break; case 0xC4: // CPY zp @@ -1002,6 +1018,7 @@ FlagT = true;// this seems wrong PendingCycles -= 5; break; case 0xD4: // NOP zp,X + PC += 1; PendingCycles -= 4; TotalExecutedCycles += 4; break; case 0xD5: // CMP zp,X @@ -1037,6 +1054,7 @@ FlagT = true;// this seems wrong PendingCycles -= 2; TotalExecutedCycles += 2; break; case 0xDC: // NOP (addr,X) + PC += 1; PendingCycles -= 4; TotalExecutedCycles += 4; break; case 0xDD: // CMP addr,X* @@ -1075,6 +1093,7 @@ FlagT = true;// this seems wrong PendingCycles -= 6; TotalExecutedCycles += 6; break; case 0xE2: // NOP #nn + PC += 1; PendingCycles -= 2; TotalExecutedCycles += 2; break; case 0xE4: // CPX zp @@ -1163,6 +1182,7 @@ FlagT = true;// this seems wrong PendingCycles -= 5; TotalExecutedCycles += 5; break; case 0xF4: // NOP zp,X + PC += 1; PendingCycles -= 4; TotalExecutedCycles += 4; break; case 0xF5: // SBC zp,X @@ -1202,6 +1222,7 @@ FlagT = true;// this seems wrong PendingCycles -= 2; TotalExecutedCycles += 2; break; case 0xFC: // NOP (addr,X) + PC += 1; PendingCycles -= 4; TotalExecutedCycles += 4; break; case 0xFD: // SBC addr,X* diff --git a/CpuCoreGenerator/MOS 6502/Instructions.cs b/CpuCoreGenerator/MOS 6502/Instructions.cs index d9b9766bb6..2ab9a0b802 100644 --- a/CpuCoreGenerator/MOS 6502/Instructions.cs +++ b/CpuCoreGenerator/MOS 6502/Instructions.cs @@ -212,6 +212,11 @@ namespace M6502 private void NOP(OpcodeInfo op, TextWriter w) { + // This code is quite insufficient, but at least, we have to increment program counter appropriately. + // For immediate addressing mode, it will be correct, and it will fix desyncs of "Puzznic (J)" and "Puzznic (U)". + // For other addressing modes, I don't know whether they access memory, so further investigation will be needed. + if (op.Size > 1) + w.WriteLine(Spaces+"PC += {0};", op.Size-1); w.WriteLine(Spaces+"PendingCycles -= {0}; TotalExecutedCycles += {0};", op.Cycles); }