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c64- clean tabs, document some regs, VIC screen memory fetch added

This commit is contained in:
saxxonpike 2012-11-03 17:57:14 +00:00
parent 747c3db7cb
commit 97bdd9be9c
7 changed files with 1411 additions and 1380 deletions
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95
BizHawk.Emulation/Computers/Commodore64/C64.core.cs
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@ -9,19 +9,19 @@ namespace BizHawk.Emulation.Computers.Commodore64
{
public partial class C64 : IEmulator
{
// source
public Cartridge cart;
public bool cartInserted;
// source
public Cartridge cart;
public bool cartInserted;
public byte[] inputFile;
// chipset
public Cia cia1;
public Cia cia2;
// chipset
public Cia cia1;
public Cia cia2;
public MOS6502X cpu;
public Memory mem;
public Sid sid;
public VicII vic;
public VicSignals vicSignal;
public Memory mem;
public Sid sid;
public VicII vic;
public VicSignals vicSignal;
private void HardReset()
{
@ -30,50 +30,53 @@ namespace BizHawk.Emulation.Computers.Commodore64
cpu.WriteMemory = WriteMemory;
cpu.DummyReadMemory = PeekMemory;
// initialize cia timers
cia1 = new Cia(Cia.DummyReadPort, Cia.DummyReadPort, Cia.DummyWritePort, Cia.DummyWritePort);
cia2 = new Cia(Cia.DummyReadPort, Cia.DummyReadPort, Cia.DummyWritePort, Cia.DummyWritePort);
// initialize cia timers
cia1 = new Cia(Cia.DummyReadPort, Cia.DummyReadPort, Cia.DummyWritePort, Cia.DummyWritePort);
cia2 = new Cia(Cia.DummyReadPort, Cia.DummyReadPort, Cia.DummyWritePort, Cia.DummyWritePort);
// initialize vic
vicSignal = new VicSignals();
vic = new VicII(vicSignal, VicIIMode.NTSC);
// initialize vic
vicSignal = new VicSignals();
vic = new VicII(vicSignal, VicIIMode.NTSC);
// initialize sid
sid = new Sid();
// initialize sid
sid = new Sid();
// initialize memory (this must be done AFTER all other chips are initialized)
string romPath = Path.Combine(Environment.GetFolderPath(Environment.SpecialFolder.Desktop), "C64Kernal");
mem = new Memory(romPath, vic, sid, cia1, cia2);
cia2.ReadPortA = mem.CIA2ReadPortA;
cia2.ReadPortB = mem.CIA2ReadPortB;
cia2.WritePortA = mem.CIA2WritePortA;
cia2.WritePortB = mem.CIA2WritePortB;
// initialize memory (this must be done AFTER all other chips are initialized)
string romPath = Path.Combine(Environment.GetFolderPath(Environment.SpecialFolder.Desktop), "C64Kernal");
mem = new Memory(romPath, vic, sid, cia1, cia2);
vic.mem = mem;
// initialize media
Cartridge cart = new Cartridge(inputFile);
if (cart.valid)
{
mem.ApplyCartridge(cart);
}
// initialize ports
cia2.ReadPortA = mem.CIA2ReadPortA;
cia2.ReadPortB = mem.CIA2ReadPortB;
cia2.WritePortA = mem.CIA2WritePortA;
cia2.WritePortB = mem.CIA2WritePortB;
// initialize cpu (hard reset vector)
cpu.PC = (ushort)(ReadMemory(0xFFFC) + (ReadMemory(0xFFFD) << 8));
// initialize media
Cartridge cart = new Cartridge(inputFile);
if (cart.valid)
{
mem.ApplyCartridge(cart);
}
// initialize cpu (hard reset vector)
cpu.PC = (ushort)(ReadMemory(0xFFFC) + (ReadMemory(0xFFFD) << 8));
}
public byte PeekMemory(ushort addr)
{
return mem.Peek(addr);
}
public byte PeekMemory(ushort addr)
{
return mem.Peek(addr);
}
public byte PeekMemoryInt(int addr)
{
return mem.Peek((ushort)(addr & 0xFFFF));
}
public byte PeekMemoryInt(int addr)
{
return mem.Peek((ushort)(addr & 0xFFFF));
}
public void PokeMemoryInt(int addr, byte val)
{
// todo
}
public void PokeMemoryInt(int addr, byte val)
{
// todo
}
public byte ReadMemory(ushort addr)
{
@ -82,7 +85,7 @@ namespace BizHawk.Emulation.Computers.Commodore64
public void WriteMemory(ushort addr, byte value)
{
mem.Write(addr, value);
mem.Write(addr, value);
}
}
}

60
BizHawk.Emulation/Computers/Commodore64/C64.cs
View File

@ -11,12 +11,12 @@ namespace BizHawk.Emulation.Computers.Commodore64
{
public C64(GameInfo game, byte[] rom, string romextension)
{
inputFile = rom;
SetupMemoryDomains();
CoreOutputComm = new CoreOutputComm();
CoreInputComm = new CoreInputComm();
HardReset();
videoProvider = new MyVideoProvider(vic);
inputFile = rom;
SetupMemoryDomains();
CoreOutputComm = new CoreOutputComm();
CoreInputComm = new CoreInputComm();
HardReset();
videoProvider = new MyVideoProvider(vic);
}
public string SystemId { get { return "C64"; } }
@ -88,23 +88,23 @@ namespace BizHawk.Emulation.Computers.Commodore64
_frame++;
_islag = true;
int cyclesPerSecond = (14318181 / 14 / 60);
int cyclesPerSecond = (14318181 / 14 / 60);
for (int i = 0; i < cyclesPerSecond; i++)
{
if (vicSignal.Interrupt || cia1.interrupt || cia2.interrupt)
{
cpu.IRQ = true;
}
if (vicSignal.AllowCpu)
{
cpu.ExecuteOne();
}
vic.PerformCycle();
sid.PerformCycle();
cia1.PerformCycle();
cia2.PerformCycle();
}
for (int i = 0; i < cyclesPerSecond; i++)
{
if (vicSignal.Interrupt || cia1.interrupt || cia2.interrupt)
{
cpu.IRQ = true;
}
if (vicSignal.AllowCpu)
{
cpu.ExecuteOne();
}
vic.PerformCycle();
sid.PerformCycle();
cia1.PerformCycle();
cia2.PerformCycle();
}
if (_islag)
{
@ -129,20 +129,20 @@ namespace BizHawk.Emulation.Computers.Commodore64
VicII vic;
public MyVideoProvider(VicII vic)
{
this.vic = vic;
this.vic = vic;
buffer = new int[vic.visibleWidth * vic.visibleHeight];
top = 0;
bottom = vic.visibleHeight - 1;
left = 0;
right = vic.visibleWidth - 1;
buffer = new int[vic.visibleWidth * vic.visibleHeight];
top = 0;
bottom = vic.visibleHeight - 1;
left = 0;
right = vic.visibleWidth - 1;
}
int[] buffer;
public void FillFrameBuffer()
{
Array.Copy(vic.buffer, buffer, buffer.Length);
Array.Copy(vic.buffer, buffer, buffer.Length);
}
public int[] GetVideoBuffer()
@ -159,7 +159,7 @@ namespace BizHawk.Emulation.Computers.Commodore64
private void SetupMemoryDomains()
{
var domains = new List<MemoryDomain>(1);
domains.Add(new MemoryDomain("RAM", 0x10000, Endian.Little, new Func<int, byte>(PeekMemoryInt), new Action<int,byte>(PokeMemoryInt))); //TODO
domains.Add(new MemoryDomain("RAM", 0x10000, Endian.Little, new Func<int, byte>(PeekMemoryInt), new Action<int,byte>(PokeMemoryInt))); //TODO
memoryDomains = domains.AsReadOnly();
}

216
BizHawk.Emulation/Computers/Commodore64/Cartridge.cs
View File

@ -6,135 +6,135 @@ using System.Text;
namespace BizHawk.Emulation.Computers.Commodore64
{
public class CartridgeChip
{
public int address;
public int bank;
public byte[] data;
public ushort romMask;
public int type;
}
public class CartridgeChip
{
public int address;
public int bank;
public byte[] data;
public ushort romMask;
public int type;
}
public class Cartridge
{
public List<CartridgeChip> chips;
public bool exRomPin;
public bool gamePin;
public int type;
public bool valid;
public int version;
public class Cartridge
{
public List<CartridgeChip> chips;
public bool exRomPin;
public bool gamePin;
public int type;
public bool valid;
public int version;
public Cartridge(byte[] rom)
{
chips = new List<CartridgeChip>();
public Cartridge(byte[] rom)
{
chips = new List<CartridgeChip>();
if (rom.Length >= 0x50)
{
MemoryStream source = new MemoryStream(rom);
BinaryReader reader = new BinaryReader(source);
string idString;
if (rom.Length >= 0x50)
{
MemoryStream source = new MemoryStream(rom);
BinaryReader reader = new BinaryReader(source);
string idString;
// note: cartridge files store values big-endian.
// note: cartridge files store values big-endian.
idString = new string(reader.ReadChars(16));
if (idString == "C64 CARTRIDGE ")
{
int headerLength = 0;
headerLength = reader.ReadByte();
headerLength <<= 8;
headerLength |= reader.ReadByte();
headerLength <<= 8;
headerLength |= reader.ReadByte();
headerLength <<= 8;
headerLength |= reader.ReadByte();
idString = new string(reader.ReadChars(16));
if (idString == "C64 CARTRIDGE ")
{
int headerLength = 0;
headerLength = reader.ReadByte();
headerLength <<= 8;
headerLength |= reader.ReadByte();
headerLength <<= 8;
headerLength |= reader.ReadByte();
headerLength <<= 8;
headerLength |= reader.ReadByte();
version = reader.ReadByte();
version <<= 8;
version |= reader.ReadByte();
version = reader.ReadByte();
version <<= 8;
version |= reader.ReadByte();
type = reader.ReadByte();
type <<= 8;
type |= reader.ReadByte();
type = reader.ReadByte();
type <<= 8;
type |= reader.ReadByte();
exRomPin = (reader.ReadByte() == 1);
gamePin = (reader.ReadByte() == 1);
exRomPin = (reader.ReadByte() == 1);
gamePin = (reader.ReadByte() == 1);
reader.ReadBytes(6); // reserved
reader.ReadBytes(32); // name
reader.ReadBytes(6); // reserved
reader.ReadBytes(32); // name
// skip the rest, don't need this info
if (headerLength > 0x40)
{
reader.ReadBytes(headerLength - 0x40);
}
// skip the rest, don't need this info
if (headerLength > 0x40)
{
reader.ReadBytes(headerLength - 0x40);
}
while (source.Position < rom.Length)
{
string chipID = new string(reader.ReadChars(4));
while (source.Position < rom.Length)
{
string chipID = new string(reader.ReadChars(4));
if (chipID == "CHIP")
{
CartridgeChip chip = new CartridgeChip();
if (chipID == "CHIP")
{
CartridgeChip chip = new CartridgeChip();
int packetLength;
packetLength = reader.ReadByte();
packetLength <<= 8;
packetLength |= reader.ReadByte();
packetLength <<= 8;
packetLength |= reader.ReadByte();
packetLength <<= 8;
packetLength |= reader.ReadByte();
packetLength -= 16;
int packetLength;
packetLength = reader.ReadByte();
packetLength <<= 8;
packetLength |= reader.ReadByte();
packetLength <<= 8;
packetLength |= reader.ReadByte();
packetLength <<= 8;
packetLength |= reader.ReadByte();
packetLength -= 16;
chip.type = reader.ReadByte();
chip.type <<= 8;
chip.type |= reader.ReadByte();
chip.type = reader.ReadByte();
chip.type <<= 8;
chip.type |= reader.ReadByte();
chip.bank = reader.ReadByte();
chip.bank <<= 8;
chip.bank |= reader.ReadByte();
chip.bank = reader.ReadByte();
chip.bank <<= 8;
chip.bank |= reader.ReadByte();
chip.address = reader.ReadByte();
chip.address <<= 8;
chip.address |= reader.ReadByte();
chip.address = reader.ReadByte();
chip.address <<= 8;
chip.address |= reader.ReadByte();
int size;
size = reader.ReadByte();
size <<= 8;
size |= reader.ReadByte();
int size;
size = reader.ReadByte();
size <<= 8;
size |= reader.ReadByte();
chip.data = reader.ReadBytes(size);
chip.romMask = (ushort)(size - 1);
chip.data = reader.ReadBytes(size);
chip.romMask = (ushort)(size - 1);
packetLength -= size;
if (packetLength > 0)
{
// discard extra bytes
reader.ReadBytes(packetLength);
}
packetLength -= size;
if (packetLength > 0)
{
// discard extra bytes
reader.ReadBytes(packetLength);
}
chips.Add(chip);
}
else
{
break;
}
}
chips.Add(chip);
}
else
{
break;
}
}
valid = (chips.Count > 0);
}
}
}
valid = (chips.Count > 0);
}
}
}
public byte Read(ushort addr)
{
CartridgeChip currentChip = chips[0];
return currentChip.data[addr & currentChip.romMask];
}
public byte Read(ushort addr)
{
CartridgeChip currentChip = chips[0];
return currentChip.data[addr & currentChip.romMask];
}
public void Write(ushort addr, byte val)
{
// can't write to rom but we can process DE00/DF00 here
}
}
public void Write(ushort addr, byte val)
{
// can't write to rom but we can process DE00/DF00 here
}
}
}

472
BizHawk.Emulation/Computers/Commodore64/Cia.cs
View File

@ -5,259 +5,259 @@ using System.Text;
namespace BizHawk.Emulation.Computers.Commodore64
{
public class Cia
{
public int alarmTime;
public bool alarmWriteEnabled;
public int cycles;
public bool flagPin;
public bool flagPinInterrupt;
public bool flagPinInterruptEnabled;
public bool[] generatePositiveEdgeOnUnderflow = new bool[2];
public bool interrupt;
public bool[] loadStartValue = new bool[2];
public bool palMode;
public byte[] regs;
public int shiftRegisterCycles;
public bool shiftRegisterInterrupt;
public bool shiftRegisterInterruptEnabled;
public bool shiftRegisterIsOutput;
public bool[] stopOnUnderflow = new bool[2];
public int timeOfDay;
public bool timeOfDayAlarmInterrupt;
public bool timeOfDayAlarmInterruptEnabled;
public int[] timerConfig = new int[2];
public bool[] timerEnabled = new bool[2];
public bool[] timerInterruptEnabled = new bool[2];
public ushort[] timerLatch = new ushort[2];
public bool[] timerUnderflowMonitor = new bool[2];
public ushort[] timerValue = new ushort[2];
public bool[] underflowTimerInterrupt = new bool[2];
public bool[] underflowTimerInterruptEnabled = new bool[2];
public class Cia
{
public int alarmTime;
public bool alarmWriteEnabled;
public int cycles;
public bool flagPin;
public bool flagPinInterrupt;
public bool flagPinInterruptEnabled;
public bool[] generatePositiveEdgeOnUnderflow = new bool[2];
public bool interrupt;
public bool[] loadStartValue = new bool[2];
public bool palMode;
public byte[] regs;
public int shiftRegisterCycles;
public bool shiftRegisterInterrupt;
public bool shiftRegisterInterruptEnabled;
public bool shiftRegisterIsOutput;
public bool[] stopOnUnderflow = new bool[2];
public int timeOfDay;
public bool timeOfDayAlarmInterrupt;
public bool timeOfDayAlarmInterruptEnabled;
public int[] timerConfig = new int[2];
public bool[] timerEnabled = new bool[2];
public bool[] timerInterruptEnabled = new bool[2];
public ushort[] timerLatch = new ushort[2];
public bool[] timerUnderflowMonitor = new bool[2];
public ushort[] timerValue = new ushort[2];
public bool[] underflowTimerInterrupt = new bool[2];
public bool[] underflowTimerInterruptEnabled = new bool[2];
public Func<byte> ReadPortA;
public Func<byte> ReadPortB;
public Action<byte, byte> WritePortA;
public Action<byte, byte> WritePortB;
public Func<byte> ReadPortA;
public Func<byte> ReadPortB;
public Action<byte, byte> WritePortA;
public Action<byte, byte> WritePortB;
public Cia(Func<byte> funcReadPortA, Func<byte> funcReadPortB, Action<byte, byte> actWritePortA, Action<byte, byte> actWritePortB)
{
ReadPortA = funcReadPortA;
ReadPortB = funcReadPortB;
WritePortA = actWritePortA;
WritePortB = actWritePortB;
HardReset();
}
public Cia(Func<byte> funcReadPortA, Func<byte> funcReadPortB, Action<byte, byte> actWritePortA, Action<byte, byte> actWritePortB)
{
ReadPortA = funcReadPortA;
ReadPortB = funcReadPortB;
WritePortA = actWritePortA;
WritePortB = actWritePortB;
HardReset();
}
static public byte DummyReadPort()
{
return 0x00;
}
static public byte DummyReadPort()
{
return 0x00;
}
static public void DummyWritePort(byte val, byte direction)
{
// do nothing
}
static public void DummyWritePort(byte val, byte direction)
{
// do nothing
}
public void HardReset()
{
regs = new byte[0x10];
Write(0x0004, 0xFF);
Write(0x0005, 0xFF);
Write(0x0006, 0xFF);
Write(0x0007, 0xFF);
Write(0x000B, 0x01);
public void HardReset()
{
regs = new byte[0x10];
Write(0x0004, 0xFF);
Write(0x0005, 0xFF);
Write(0x0006, 0xFF);
Write(0x0007, 0xFF);
Write(0x000B, 0x01);
}
}
public void PerformCycle()
{
unchecked
{
for (int i = 0; i < 2; i++)
{
if (timerConfig[i] == 0)
TimerTick(i);
}
}
public void PerformCycle()
{
unchecked
{
for (int i = 0; i < 2; i++)
{
if (timerConfig[i] == 0)
TimerTick(i);
}
}
regs[0x04] = (byte)(timerValue[0] & 0xFF);
regs[0x05] = (byte)(timerValue[0] >> 8);
regs[0x06] = (byte)(timerValue[1] & 0xFF);
regs[0x07] = (byte)(timerValue[1] >> 8);
}
regs[0x04] = (byte)(timerValue[0] & 0xFF);
regs[0x05] = (byte)(timerValue[0] >> 8);
regs[0x06] = (byte)(timerValue[1] & 0xFF);
regs[0x07] = (byte)(timerValue[1] >> 8);
}
public void PollSerial(ref bool bit)
{
// this has the same effect as raising CNT
public void PollSerial(ref bool bit)
{
// this has the same effect as raising CNT
for (int i = 0; i < 2; i++)
{
switch (timerConfig[i])
{
case 1:
case 3:
TimerTick(i);
break;
}
}
if (shiftRegisterIsOutput)
{
bit = ((regs[0x0C] & 0x01) != 0x00);
regs[0x0C] >>= 1;
}
else
{
regs[0x0C] >>= 1;
if (bit)
regs[0x0C] |= 0x80;
}
}
for (int i = 0; i < 2; i++)
{
switch (timerConfig[i])
{
case 1:
case 3:
TimerTick(i);
break;
}
}
if (shiftRegisterIsOutput)
{
bit = ((regs[0x0C] & 0x01) != 0x00);
regs[0x0C] >>= 1;
}
else
{
regs[0x0C] >>= 1;
if (bit)
regs[0x0C] |= 0x80;
}
}
public byte Read(ushort addr)
{
byte result = 0;
addr &= 0x0F;
public byte Read(ushort addr)
{
byte result = 0;
addr &= 0x0F;
switch (addr)
{
case 0x00:
result = ReadPortA();
regs[addr] = result;
break;
case 0x01:
result = ReadPortB();
regs[addr] = result;
break;
case 0x0D:
result = regs[addr];
shiftRegisterInterrupt = false;
timeOfDayAlarmInterrupt = false;
underflowTimerInterrupt[0] = false;
underflowTimerInterrupt[1] = false;
interrupt = false;
UpdateInterruptReg();
break;
default:
result = regs[addr];
break;
}
switch (addr)
{
case 0x00:
result = ReadPortA();
regs[addr] = result;
break;
case 0x01:
result = ReadPortB();
regs[addr] = result;
break;
case 0x0D:
result = regs[addr];
shiftRegisterInterrupt = false;
timeOfDayAlarmInterrupt = false;
underflowTimerInterrupt[0] = false;
underflowTimerInterrupt[1] = false;
interrupt = false;
UpdateInterruptReg();
break;
default:
result = regs[addr];
break;
}
return result;
}
return result;
}
public void TimerTick(int index)
{
if (timerEnabled[index])
{
unchecked
{
timerValue[index]--;
}
if (timerValue[index] == 0xFFFF)
{
if (underflowTimerInterruptEnabled[index])
{
underflowTimerInterrupt[index] = true;
interrupt = true;
}
public void TimerTick(int index)
{
if (timerEnabled[index])
{
unchecked
{
timerValue[index]--;
}
if (timerValue[index] == 0xFFFF)
{
if (underflowTimerInterruptEnabled[index])
{
underflowTimerInterrupt[index] = true;
interrupt = true;
}
// timer B can count on timer A's underflows
if (index == 0)
{
switch (timerConfig[1])
{
case 2:
case 3:
TimerTick(1);
break;
}
}
}
}
}
// timer B can count on timer A's underflows
if (index == 0)
{
switch (timerConfig[1])
{
case 2:
case 3:
TimerTick(1);
break;
}
}
}
}
}
public void UpdateInterruptReg()
{
byte result;
result = (byte)(shiftRegisterInterrupt ? 0x01 : 0x00);
result |= (byte)(timeOfDayAlarmInterrupt ? 0x02 : 0x00);
result |= (byte)(underflowTimerInterrupt[0] ? 0x04 : 0x00);
result |= (byte)(underflowTimerInterrupt[1] ? 0x08 : 0x00);
result |= (byte)(flagPinInterrupt ? 0x10 : 0x00);
result |= (byte)(interrupt ? 0x80 : 0x00);
regs[0x0D] = result;
}
public void UpdateInterruptReg()
{
byte result;
result = (byte)(shiftRegisterInterrupt ? 0x01 : 0x00);
result |= (byte)(timeOfDayAlarmInterrupt ? 0x02 : 0x00);
result |= (byte)(underflowTimerInterrupt[0] ? 0x04 : 0x00);
result |= (byte)(underflowTimerInterrupt[1] ? 0x08 : 0x00);
result |= (byte)(flagPinInterrupt ? 0x10 : 0x00);
result |= (byte)(interrupt ? 0x80 : 0x00);
regs[0x0D] = result;
}
public void Write(ushort addr, byte val)
{
bool allowWrite = true;
addr &= 0x0F;
public void Write(ushort addr, byte val)
{
bool allowWrite = true;
addr &= 0x0F;
switch (addr)
{
case 0x00:
WritePortA(val, regs[0x02]);
allowWrite = false;
break;
case 0x01:
WritePortB(val, regs[0x03]);
allowWrite = false;
break;
case 0x04:
timerValue[0] &= 0xFF00;
timerValue[0] |= val;
break;
case 0x05:
timerValue[0] &= 0xFF;
timerValue[0] |= (ushort)(val << 8);
break;
case 0x06:
timerValue[1] &= 0xFF00;
timerValue[1] |= val;
break;
case 0x07:
timerValue[1] &= 0xFF;
timerValue[1] |= (ushort)(val << 8);
break;
case 0x0D:
if ((val & 0x01) != 0x00)
timerInterruptEnabled[0] = ((val & 0x80) != 0x00);
if ((val & 0x02) != 0x00)
timerInterruptEnabled[1] = ((val & 0x80) != 0x00);
if ((val & 0x04) != 0x00)
timeOfDayAlarmInterruptEnabled = ((val & 0x80) != 0x00);
if ((val & 0x08) != 0x00)
shiftRegisterInterruptEnabled = ((val & 0x80) != 0x00);
if ((val & 0x10) != 0x00)
flagPinInterruptEnabled = ((val & 0x80) != 0x00);
allowWrite = false;
break;
case 0x0E:
timerEnabled[0] = ((val & 0x01) != 0x00);
timerUnderflowMonitor[0] = ((val & 0x02) != 0x00);
generatePositiveEdgeOnUnderflow[0] = ((val & 0x04) != 0x00);
stopOnUnderflow[0] = ((val & 0x08) != 0x00);
loadStartValue[0] = ((val & 0x10) != 0x00);
timerConfig[0] = ((val & 0x20) >> 5);
shiftRegisterIsOutput = ((val & 0x40) != 0x00);
palMode = ((val & 0x80) != 0x00);
break;
case 0x0F:
timerEnabled[1] = ((val & 0x01) != 0x00);
timerUnderflowMonitor[1] = ((val & 0x02) != 0x00);
generatePositiveEdgeOnUnderflow[1] = ((val & 0x04) != 0x00);
stopOnUnderflow[1] = ((val & 0x08) != 0x00);
loadStartValue[1] = ((val & 0x10) != 0x00);
timerConfig[1] = ((val & 0x60) >> 5);
alarmWriteEnabled = ((val & 0x80) != 0x00);
break;
default:
break;
}
switch (addr)
{
case 0x00:
WritePortA(val, regs[0x02]);
allowWrite = false;
break;
case 0x01:
WritePortB(val, regs[0x03]);
allowWrite = false;
break;
case 0x04:
timerValue[0] &= 0xFF00;
timerValue[0] |= val;
break;
case 0x05:
timerValue[0] &= 0xFF;
timerValue[0] |= (ushort)(val << 8);
break;
case 0x06:
timerValue[1] &= 0xFF00;
timerValue[1] |= val;
break;
case 0x07:
timerValue[1] &= 0xFF;
timerValue[1] |= (ushort)(val << 8);
break;
case 0x0D:
if ((val & 0x01) != 0x00)
timerInterruptEnabled[0] = ((val & 0x80) != 0x00);
if ((val & 0x02) != 0x00)
timerInterruptEnabled[1] = ((val & 0x80) != 0x00);
if ((val & 0x04) != 0x00)
timeOfDayAlarmInterruptEnabled = ((val & 0x80) != 0x00);
if ((val & 0x08) != 0x00)
shiftRegisterInterruptEnabled = ((val & 0x80) != 0x00);
if ((val & 0x10) != 0x00)
flagPinInterruptEnabled = ((val & 0x80) != 0x00);
allowWrite = false;
break;
case 0x0E:
timerEnabled[0] = ((val & 0x01) != 0x00);
timerUnderflowMonitor[0] = ((val & 0x02) != 0x00);
generatePositiveEdgeOnUnderflow[0] = ((val & 0x04) != 0x00);
stopOnUnderflow[0] = ((val & 0x08) != 0x00);
loadStartValue[0] = ((val & 0x10) != 0x00);
timerConfig[0] = ((val & 0x20) >> 5);
shiftRegisterIsOutput = ((val & 0x40) != 0x00);
palMode = ((val & 0x80) != 0x00);
break;
case 0x0F:
timerEnabled[1] = ((val & 0x01) != 0x00);
timerUnderflowMonitor[1] = ((val & 0x02) != 0x00);
generatePositiveEdgeOnUnderflow[1] = ((val & 0x04) != 0x00);
stopOnUnderflow[1] = ((val & 0x08) != 0x00);
loadStartValue[1] = ((val & 0x10) != 0x00);
timerConfig[1] = ((val & 0x60) >> 5);
alarmWriteEnabled = ((val & 0x80) != 0x00);
break;
default:
break;
}
if (allowWrite)
regs[addr] = val;
}
}
if (allowWrite)
regs[addr] = val;
}
}
}

894
BizHawk.Emulation/Computers/Commodore64/MemBus.cs
View File

@ -6,487 +6,487 @@ using System.Text;
namespace BizHawk.Emulation.Computers.Commodore64
{
public enum MemoryDesignation
{
Disabled,
RAM,
Basic,
Kernal,
IO,
Character,
ROMLo,
ROMHi,
Vic,
Sid,
ColorRam,
Cia1,
Cia2,
Expansion1,
Expansion2
}
public enum MemoryDesignation
{
Disabled,
RAM,
Basic,
Kernal,
IO,
Character,
ROMLo,
ROMHi,
Vic,
Sid,
ColorRam,
Cia1,
Cia2,
Expansion1,
Expansion2
}
public class MemoryLayout
{
public MemoryDesignation Mem1000 = MemoryDesignation.RAM;
public MemoryDesignation Mem8000 = MemoryDesignation.RAM;
public MemoryDesignation MemA000 = MemoryDesignation.RAM;
public MemoryDesignation MemC000 = MemoryDesignation.RAM;
public MemoryDesignation MemD000 = MemoryDesignation.RAM;
public MemoryDesignation MemE000 = MemoryDesignation.RAM;
}
public class MemoryLayout
{
public MemoryDesignation Mem1000 = MemoryDesignation.RAM;
public MemoryDesignation Mem8000 = MemoryDesignation.RAM;
public MemoryDesignation MemA000 = MemoryDesignation.RAM;
public MemoryDesignation MemC000 = MemoryDesignation.RAM;
public MemoryDesignation MemD000 = MemoryDesignation.RAM;
public MemoryDesignation MemE000 = MemoryDesignation.RAM;
}
public class Memory
{
// chips
public Cia cia1;
public Cia cia2;
public VicII vic;
public Sid sid;
public class Memory
{
// chips
public Cia cia1;
public Cia cia2;
public VicII vic;
public Sid sid;
// storage
public Cartridge cart;
public bool cartInserted = false;
// storage
public Cartridge cart;
public bool cartInserted = false;
// roms
public byte[] basicRom;
public byte[] charRom;
public bool exRomPin = true;
public bool gamePin = true;
public byte[] kernalRom;
public MemoryLayout layout;
// roms
public byte[] basicRom;
public byte[] charRom;
public bool exRomPin = true;
public bool gamePin = true;
public byte[] kernalRom;
public MemoryLayout layout;
// ram
public byte cia2A;
public byte cia2B;
public byte[] colorRam;
public byte[] ram;
public ushort vicOffset;
// ram
public byte cia2A;
public byte cia2B;
public byte[] colorRam;
public byte[] ram;
public ushort vicOffset;
// registers
public byte busData;
public byte cpu00; // register $00
public byte cpu01; // register $01
public bool readTrigger = true;
public bool writeTrigger = true;
// registers
public byte busData;
public byte cpu00; // register $00
public byte cpu01; // register $01
public bool readTrigger = true;
public bool writeTrigger = true;
public Memory(string sourceFolder, VicII newVic, Sid newSid, Cia newCia1, Cia newCia2)
{
ram = new byte[0x10000];
WipeMemory();
public Memory(string sourceFolder, VicII newVic, Sid newSid, Cia newCia1, Cia newCia2)
{
ram = new byte[0x10000];
WipeMemory();
string basicFile = "basic";
string charFile = "chargen";
string kernalFile = "kernal";
string basicFile = "basic";
string charFile = "chargen";
string kernalFile = "kernal";
basicRom = File.ReadAllBytes(Path.Combine(sourceFolder, basicFile));
charRom = File.ReadAllBytes(Path.Combine(sourceFolder, charFile));
kernalRom = File.ReadAllBytes(Path.Combine(sourceFolder, kernalFile));
colorRam = new byte[0x1000];
basicRom = File.ReadAllBytes(Path.Combine(sourceFolder, basicFile));
charRom = File.ReadAllBytes(Path.Combine(sourceFolder, charFile));
kernalRom = File.ReadAllBytes(Path.Combine(sourceFolder, kernalFile));
colorRam = new byte[0x1000];
vic = newVic;
sid = newSid;
cia1 = newCia1;
cia2 = newCia2;
cpu00 = 0x2F;
cpu01 = 0x37;
vic = newVic;
sid = newSid;
cia1 = newCia1;
cia2 = newCia2;
cpu00 = 0x2F;
cpu01 = 0x37;
layout = new MemoryLayout();
UpdateLayout();
}
layout = new MemoryLayout();
UpdateLayout();
}
public void ApplyCartridge(Cartridge newCart)
{
cart = newCart;
cartInserted = true;
exRomPin = cart.exRomPin;
gamePin = cart.gamePin;
UpdateLayout();
}
public void ApplyCartridge(Cartridge newCart)
{
cart = newCart;
cartInserted = true;
exRomPin = cart.exRomPin;
gamePin = cart.gamePin;
UpdateLayout();
}
public byte CIA2ReadPortA()
{
return cia2A;
}
public byte CIA2ReadPortA()
{
return cia2A;
}
public byte CIA2ReadPortB()
{
return cia2B;
}
public byte CIA2ReadPortB()
{
return cia2B;
}
public void CIA2WritePortA(byte val, byte direction)
{
cia2A &= (byte)~direction;
cia2A |= (byte)(val & direction);
public void CIA2WritePortA(byte val, byte direction)
{
cia2A &= (byte)~direction;
cia2A |= (byte)(val & direction);
vicOffset = (ushort)((cia2A & 0x03) << 14);
}
vicOffset = (ushort)((cia2A & 0x03) << 14);
}
public void CIA2WritePortB(byte val, byte direction)
{
cia2B &= (byte)~direction;
cia2B |= (byte)(val & direction);
}
public void CIA2WritePortB(byte val, byte direction)
{
cia2B &= (byte)~direction;
cia2B |= (byte)(val & direction);
}
public MemoryDesignation GetDesignation(ushort addr)
{
MemoryDesignation result;
public MemoryDesignation GetDesignation(ushort addr)
{
MemoryDesignation result;
if (addr < 0x1000)
{
result = MemoryDesignation.RAM;
}
else if (addr < 0x8000)
{
result = layout.Mem1000;
}
else if (addr < 0xA000)
{
result = layout.Mem8000;
}
else if (addr < 0xC000)
{
result = layout.MemA000;
}
else if (addr < 0xD000)
{
result = layout.MemC000;
}
else if (addr < 0xE000)
{
result = layout.MemD000;
}
else
{
result = layout.MemE000;
}
if (addr < 0x1000)
{
result = MemoryDesignation.RAM;
}
else if (addr < 0x8000)
{
result = layout.Mem1000;
}
else if (addr < 0xA000)
{
result = layout.Mem8000;
}
else if (addr < 0xC000)
{
result = layout.MemA000;
}
else if (addr < 0xD000)
{
result = layout.MemC000;
}
else if (addr < 0xE000)
{
result = layout.MemD000;
}
else
{
result = layout.MemE000;
}
if (result == MemoryDesignation.IO)
{
addr &= 0x0FFF;
if (addr < 0x0400)
{
result = MemoryDesignation.Vic;
}
else if (addr < 0x0800)
{
result = MemoryDesignation.Sid;
}
else if (addr < 0x0C00)
{
result = MemoryDesignation.ColorRam;
}
else if (addr < 0x0D00)
{
result = MemoryDesignation.Cia1;
}
else if (addr < 0x0E00)
{
result = MemoryDesignation.Cia2;
}
else if (addr < 0x0F00)
{
result = MemoryDesignation.Expansion1;
}
else
{
result = MemoryDesignation.Expansion2;
}
}
if (result == MemoryDesignation.IO)
{
addr &= 0x0FFF;
if (addr < 0x0400)
{
result = MemoryDesignation.Vic;
}
else if (addr < 0x0800)
{
result = MemoryDesignation.Sid;
}
else if (addr < 0x0C00)
{
result = MemoryDesignation.ColorRam;
}
else if (addr < 0x0D00)
{
result = MemoryDesignation.Cia1;
}
else if (addr < 0x0E00)
{
result = MemoryDesignation.Cia2;
}
else if (addr < 0x0F00)
{
result = MemoryDesignation.Expansion1;
}
else
{
result = MemoryDesignation.Expansion2;
}
}
return result;
}
return result;
}
public byte Peek(ushort addr)
{
byte result;
public byte Peek(ushort addr)
{
byte result;
if (addr == 0x0000)
{
result = cpu00;
}
else if (addr == 0x0001)
{
result = cpu01;
}
else
{
MemoryDesignation des = GetDesignation(addr);
if (addr == 0x0000)
{
result = cpu00;
}
else if (addr == 0x0001)
{
result = cpu01;
}
else
{
MemoryDesignation des = GetDesignation(addr);
switch (des)
{
case MemoryDesignation.Basic:
result = basicRom[addr & 0x1FFF];
break;
case MemoryDesignation.Character:
result = charRom[addr & 0x0FFF];
break;
case MemoryDesignation.Vic:
result = vic.regs[addr & 0x3F];
break;
case MemoryDesignation.Sid:
result = sid.regs[addr & 0x1F];
break;
case MemoryDesignation.ColorRam:
result = colorRam[addr & 0x03FF];
break;
case MemoryDesignation.Cia1:
result = cia1.regs[addr & 0x0F];
break;
case MemoryDesignation.Cia2:
result = cia2.regs[addr & 0x0F];
break;
case MemoryDesignation.Expansion1:
result = 0;
break;
case MemoryDesignation.Expansion2:
result = 0;
break;
case MemoryDesignation.Kernal:
result = kernalRom[addr & 0x1FFF];
break;
case MemoryDesignation.RAM:
result = ram[addr];
break;
case MemoryDesignation.ROMHi:
result = cart.chips[0].data[addr & cart.chips[0].romMask];
break;
case MemoryDesignation.ROMLo:
result = cart.chips[0].data[addr & cart.chips[0].romMask];
break;
default:
return 0;
}
}
switch (des)
{
case MemoryDesignation.Basic:
result = basicRom[addr & 0x1FFF];
break;
case MemoryDesignation.Character:
result = charRom[addr & 0x0FFF];
break;
case MemoryDesignation.Vic:
result = vic.regs[addr & 0x3F];
break;
case MemoryDesignation.Sid:
result = sid.regs[addr & 0x1F];
break;
case MemoryDesignation.ColorRam:
result = colorRam[addr & 0x03FF];
break;
case MemoryDesignation.Cia1:
result = cia1.regs[addr & 0x0F];
break;
case MemoryDesignation.Cia2:
result = cia2.regs[addr & 0x0F];
break;
case MemoryDesignation.Expansion1:
result = 0;
break;
case MemoryDesignation.Expansion2:
result = 0;
break;
case MemoryDesignation.Kernal:
result = kernalRom[addr & 0x1FFF];
break;
case MemoryDesignation.RAM:
result = ram[addr];
break;
case MemoryDesignation.ROMHi:
result = cart.chips[0].data[addr & cart.chips[0].romMask];
break;
case MemoryDesignation.ROMLo:
result = cart.chips[0].data[addr & cart.chips[0].romMask];
break;
default:
return 0;
}
}
busData = result;
return result;
}
busData = result;
return result;
}
public byte Read(ushort addr)
{
byte result;
public byte Read(ushort addr)
{
byte result;
if (addr == 0x0000)
{
result = cpu00;
}
else if (addr == 0x0001)
{
result = cpu01;
}
else
{
MemoryDesignation des = GetDesignation(addr);
if (addr == 0x0000)
{
result = cpu00;
}
else if (addr == 0x0001)
{
result = cpu01;
}
else
{
MemoryDesignation des = GetDesignation(addr);
switch (des)
{
case MemoryDesignation.Basic:
result = basicRom[addr & 0x1FFF];
break;
case MemoryDesignation.Character:
result = charRom[addr & 0x0FFF];
break;
case MemoryDesignation.Vic:
result = vic.Read(addr);
break;
case MemoryDesignation.Sid:
result = sid.Read(addr);
break;
case MemoryDesignation.ColorRam:
result = ReadColorRam(addr);
break;
case MemoryDesignation.Cia1:
result = cia1.Read(addr);
break;
case MemoryDesignation.Cia2:
result = cia2.Read(addr);
break;
case MemoryDesignation.Expansion1:
result = 0;
break;
case MemoryDesignation.Expansion2:
result = 0;
break;
case MemoryDesignation.Kernal:
result = kernalRom[addr & 0x1FFF];
break;
case MemoryDesignation.RAM:
result = ram[addr];
break;
case MemoryDesignation.ROMHi:
result = cart.Read(addr);
break;
case MemoryDesignation.ROMLo:
result = cart.Read(addr);
break;
default:
return 0;
}
}
switch (des)
{
case MemoryDesignation.Basic:
result = basicRom[addr & 0x1FFF];
break;
case MemoryDesignation.Character:
result = charRom[addr & 0x0FFF];
break;
case MemoryDesignation.Vic:
result = vic.Read(addr);
break;
case MemoryDesignation.Sid:
result = sid.Read(addr);
break;
case MemoryDesignation.ColorRam:
result = ReadColorRam(addr);
break;
case MemoryDesignation.Cia1:
result = cia1.Read(addr);
break;
case MemoryDesignation.Cia2:
result = cia2.Read(addr);
break;
case MemoryDesignation.Expansion1:
result = 0;
break;
case MemoryDesignation.Expansion2:
result = 0;
break;
case MemoryDesignation.Kernal:
result = kernalRom[addr & 0x1FFF];
break;
case MemoryDesignation.RAM:
result = ram[addr];
break;
case MemoryDesignation.ROMHi:
result = cart.Read(addr);
break;
case MemoryDesignation.ROMLo:
result = cart.Read(addr);
break;
default:
return 0;
}
}
busData = result;
return result;
}
busData = result;
return result;
}
public byte ReadColorRam(ushort addr)
{
return (byte)((busData & 0xF0) | (colorRam[addr & 0x03FF]));
}
public byte ReadColorRam(ushort addr)
{
return (byte)((busData & 0xF0) | (colorRam[addr & 0x03FF]));
}
public void UpdateLayout()
{
bool loRom = ((cpu01 & 0x01) != 0);
bool hiRom = ((cpu01 & 0x02) != 0);
bool ioEnable = ((cpu01 & 0x04) != 0);
public void UpdateLayout()
{
bool loRom = ((cpu01 & 0x01) != 0);
bool hiRom = ((cpu01 & 0x02) != 0);
bool ioEnable = ((cpu01 & 0x04) != 0);
if (loRom && hiRom && exRomPin && gamePin)
{
layout.Mem1000 = MemoryDesignation.RAM;
layout.Mem8000 = MemoryDesignation.RAM;
layout.MemA000 = MemoryDesignation.Basic;
layout.MemC000 = MemoryDesignation.RAM;
layout.MemD000 = ioEnable ? MemoryDesignation.IO : MemoryDesignation.Character;
layout.MemE000 = MemoryDesignation.Kernal;
}
else if (loRom && !hiRom && exRomPin)
{
layout.Mem1000 = MemoryDesignation.RAM;
layout.Mem8000 = MemoryDesignation.RAM;
layout.MemA000 = MemoryDesignation.RAM;
layout.MemC000 = MemoryDesignation.RAM;
layout.MemD000 = ioEnable ? MemoryDesignation.IO : MemoryDesignation.Character;
layout.MemE000 = MemoryDesignation.RAM;
}
else if (loRom && !hiRom && !exRomPin && !gamePin)
{
layout.Mem1000 = MemoryDesignation.RAM;
layout.Mem8000 = MemoryDesignation.RAM;
layout.MemA000 = MemoryDesignation.RAM;
layout.MemC000 = MemoryDesignation.RAM;
layout.MemD000 = ioEnable ? MemoryDesignation.IO : MemoryDesignation.RAM;
layout.MemE000 = MemoryDesignation.RAM;
}
else if ((!loRom && hiRom && gamePin) || (!loRom && !hiRom && !exRomPin))
{
layout.Mem1000 = MemoryDesignation.RAM;
layout.Mem8000 = MemoryDesignation.RAM;
layout.MemA000 = MemoryDesignation.RAM;
layout.MemC000 = MemoryDesignation.RAM;
layout.MemD000 = ioEnable ? MemoryDesignation.IO : MemoryDesignation.Character;
layout.MemE000 = MemoryDesignation.Kernal;
}
else if (!loRom && !hiRom && gamePin)
{
layout.Mem1000 = MemoryDesignation.RAM;
layout.Mem8000 = MemoryDesignation.RAM;
layout.MemA000 = MemoryDesignation.RAM;
layout.MemC000 = MemoryDesignation.RAM;
layout.MemD000 = MemoryDesignation.RAM;
layout.MemE000 = MemoryDesignation.RAM;
}
else if (loRom && hiRom && gamePin && !exRomPin)
{
layout.Mem1000 = MemoryDesignation.RAM;
layout.Mem8000 = MemoryDesignation.ROMLo;
layout.MemA000 = MemoryDesignation.Basic;
layout.MemC000 = MemoryDesignation.RAM;
layout.MemD000 = ioEnable ? MemoryDesignation.IO : MemoryDesignation.Character;
layout.MemE000 = MemoryDesignation.Kernal;
}
else if (!loRom && hiRom && !gamePin && !exRomPin)
{
layout.Mem1000 = MemoryDesignation.RAM;
layout.Mem8000 = MemoryDesignation.RAM;
layout.MemA000 = MemoryDesignation.ROMHi;
layout.MemC000 = MemoryDesignation.RAM;
layout.MemD000 = ioEnable ? MemoryDesignation.IO : MemoryDesignation.Character;
layout.MemE000 = MemoryDesignation.Kernal;
}
else if (loRom && hiRom && !gamePin && !exRomPin)
{
layout.Mem1000 = MemoryDesignation.RAM;
layout.Mem8000 = MemoryDesignation.ROMLo;
layout.MemA000 = MemoryDesignation.ROMHi;
layout.MemC000 = MemoryDesignation.RAM;
layout.MemD000 = ioEnable ? MemoryDesignation.IO : MemoryDesignation.Character;
layout.MemE000 = MemoryDesignation.Kernal;
}
else if (!gamePin && exRomPin)
{
layout.Mem1000 = MemoryDesignation.Disabled;
layout.Mem8000 = MemoryDesignation.ROMLo;
layout.MemA000 = MemoryDesignation.Disabled;
layout.MemC000 = MemoryDesignation.Disabled;
layout.MemD000 = MemoryDesignation.IO;
layout.MemE000 = MemoryDesignation.ROMHi;
}
}
if (loRom && hiRom && exRomPin && gamePin)
{
layout.Mem1000 = MemoryDesignation.RAM;
layout.Mem8000 = MemoryDesignation.RAM;
layout.MemA000 = MemoryDesignation.Basic;
layout.MemC000 = MemoryDesignation.RAM;
layout.MemD000 = ioEnable ? MemoryDesignation.IO : MemoryDesignation.Character;
layout.MemE000 = MemoryDesignation.Kernal;
}
else if (loRom && !hiRom && exRomPin)
{
layout.Mem1000 = MemoryDesignation.RAM;
layout.Mem8000 = MemoryDesignation.RAM;
layout.MemA000 = MemoryDesignation.RAM;
layout.MemC000 = MemoryDesignation.RAM;
layout.MemD000 = ioEnable ? MemoryDesignation.IO : MemoryDesignation.Character;
layout.MemE000 = MemoryDesignation.RAM;
}
else if (loRom && !hiRom && !exRomPin && !gamePin)
{
layout.Mem1000 = MemoryDesignation.RAM;
layout.Mem8000 = MemoryDesignation.RAM;
layout.MemA000 = MemoryDesignation.RAM;
layout.MemC000 = MemoryDesignation.RAM;
layout.MemD000 = ioEnable ? MemoryDesignation.IO : MemoryDesignation.RAM;
layout.MemE000 = MemoryDesignation.RAM;
}
else if ((!loRom && hiRom && gamePin) || (!loRom && !hiRom && !exRomPin))
{
layout.Mem1000 = MemoryDesignation.RAM;
layout.Mem8000 = MemoryDesignation.RAM;
layout.MemA000 = MemoryDesignation.RAM;
layout.MemC000 = MemoryDesignation.RAM;
layout.MemD000 = ioEnable ? MemoryDesignation.IO : MemoryDesignation.Character;
layout.MemE000 = MemoryDesignation.Kernal;
}
else if (!loRom && !hiRom && gamePin)
{
layout.Mem1000 = MemoryDesignation.RAM;
layout.Mem8000 = MemoryDesignation.RAM;
layout.MemA000 = MemoryDesignation.RAM;
layout.MemC000 = MemoryDesignation.RAM;
layout.MemD000 = MemoryDesignation.RAM;
layout.MemE000 = MemoryDesignation.RAM;
}
else if (loRom && hiRom && gamePin && !exRomPin)
{
layout.Mem1000 = MemoryDesignation.RAM;
layout.Mem8000 = MemoryDesignation.ROMLo;
layout.MemA000 = MemoryDesignation.Basic;
layout.MemC000 = MemoryDesignation.RAM;
layout.MemD000 = ioEnable ? MemoryDesignation.IO : MemoryDesignation.Character;
layout.MemE000 = MemoryDesignation.Kernal;
}
else if (!loRom && hiRom && !gamePin && !exRomPin)
{
layout.Mem1000 = MemoryDesignation.RAM;
layout.Mem8000 = MemoryDesignation.RAM;
layout.MemA000 = MemoryDesignation.ROMHi;
layout.MemC000 = MemoryDesignation.RAM;
layout.MemD000 = ioEnable ? MemoryDesignation.IO : MemoryDesignation.Character;
layout.MemE000 = MemoryDesignation.Kernal;
}
else if (loRom && hiRom && !gamePin && !exRomPin)
{
layout.Mem1000 = MemoryDesignation.RAM;
layout.Mem8000 = MemoryDesignation.ROMLo;
layout.MemA000 = MemoryDesignation.ROMHi;
layout.MemC000 = MemoryDesignation.RAM;
layout.MemD000 = ioEnable ? MemoryDesignation.IO : MemoryDesignation.Character;
layout.MemE000 = MemoryDesignation.Kernal;
}
else if (!gamePin && exRomPin)
{
layout.Mem1000 = MemoryDesignation.Disabled;
layout.Mem8000 = MemoryDesignation.ROMLo;
layout.MemA000 = MemoryDesignation.Disabled;
layout.MemC000 = MemoryDesignation.Disabled;
layout.MemD000 = MemoryDesignation.IO;
layout.MemE000 = MemoryDesignation.ROMHi;
}
}
public byte VicRead(ushort addr)
{
addr = (ushort)(addr & 0x1FFF);
if (addr >= 0x1000 && addr < 0x2000)
return charRom[addr & 0x0FFF];
else
return ram[addr | vicOffset];
}
public byte VicRead(ushort addr)
{
addr = (ushort)(addr & 0x1FFF);
if (addr >= 0x1000 && addr < 0x2000)
return charRom[addr & 0x0FFF];
else
return ram[addr | vicOffset];
}
public void WipeMemory()
{
for (int i = 0; i < 0x10000; i += 0x80)
{
for (int j = 0; j < 0x40; j++)
ram[i + j] = 0x00;
for (int j = 0x40; j < 0x80; j++)
ram[i + j] = 0xFF;
}
}
public void WipeMemory()
{
for (int i = 0; i < 0x10000; i += 0x80)
{
for (int j = 0; j < 0x40; j++)
ram[i + j] = 0x00;
for (int j = 0x40; j < 0x80; j++)
ram[i + j] = 0xFF;
}
}
public void Write(ushort addr, byte val)
{
if (addr == 0x0000)
{
cpu00 = val;
}
else if (addr == 0x0001)
{
cpu01 &= (byte)(~cpu00);
cpu01 |= (byte)(cpu00 & val);
UpdateLayout();
}
else
{
MemoryDesignation des = GetDesignation(addr);
public void Write(ushort addr, byte val)
{
if (addr == 0x0000)
{
cpu00 = val;
}
else if (addr == 0x0001)
{
cpu01 &= (byte)(~cpu00);
cpu01 |= (byte)(cpu00 & val);
UpdateLayout();
}
else
{
MemoryDesignation des = GetDesignation(addr);
switch (des)
{
case MemoryDesignation.Vic:
vic.Write(addr, val);
break;
case MemoryDesignation.Sid:
sid.Write(addr, val);
break;
case MemoryDesignation.ColorRam:
colorRam[addr & 0x03FF] = (byte)(val & 0x0F);
break;
case MemoryDesignation.Cia1:
cia1.Write(addr, val);
break;
case MemoryDesignation.Cia2:
cia2.Write(addr, val);
break;
case MemoryDesignation.Expansion1:
break;
case MemoryDesignation.Expansion2:
break;
case MemoryDesignation.RAM:
ram[addr] = val;
break;
default:
break;
}
}
busData = val;
}
}
switch (des)
{
case MemoryDesignation.Vic:
vic.Write(addr, val);
break;
case MemoryDesignation.Sid:
sid.Write(addr, val);
break;
case MemoryDesignation.ColorRam:
colorRam[addr & 0x03FF] = (byte)(val & 0x0F);
break;
case MemoryDesignation.Cia1:
cia1.Write(addr, val);
break;
case MemoryDesignation.Cia2:
cia2.Write(addr, val);
break;
case MemoryDesignation.Expansion1:
break;
case MemoryDesignation.Expansion2:
break;
case MemoryDesignation.RAM:
ram[addr] = val;
break;
default:
break;
}
}
busData = val;
}
}
}

64
BizHawk.Emulation/Computers/Commodore64/Sid.cs
View File

@ -5,41 +5,41 @@ using System.Text;
namespace BizHawk.Emulation.Computers.Commodore64
{
public enum SidMode
{
Sid6581,
Sid8580
}
public enum SidMode
{
Sid6581,
Sid8580
}
public class Sid
{
public byte[] regs;
public class Sid
{
public byte[] regs;
public Sid()
{
regs = new byte[0x20];
}
public Sid()
{
regs = new byte[0x20];
}
public void PerformCycle()
{
}
public void PerformCycle()
{
}
public byte Read(ushort addr)
{
switch (addr & 0x1F)
{
default:
return 0;
}
}
public byte Read(ushort addr)
{
switch (addr & 0x1F)
{
default:
return 0;
}
}
public void Write(ushort addr, byte val)
{
switch (addr & 0x1F)
{
default:
break;
}
}
}
public void Write(ushort addr, byte val)
{
switch (addr & 0x1F)
{
default:
break;
}
}
}
}

990
BizHawk.Emulation/Computers/Commodore64/VicII.cs
View File

File diff suppressed because it is too large Load Diff