bsnes: Pull upstream fixes
Contains - 3ca0504e67e89d37e24fce87183332f7ec577867: Extend the Super Famicom LOROM-RAM#A memory map. - dab534b6584e4debef2c9572e6b6588a604d79a9: wdc65816: fix PLB wrapping in emulation mode - ccbe394e7d4bc5f5596544813d887da161af3ca6: wdc65816: emulate (direct,X) wraparound bug in emulation mode - 79770f6207a5d244652644c5e2d9f4328bd974ac: implementation of SA-1 BW-RAM protection
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@ -205,9 +205,10 @@ E S.h = 0x01;
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auto WDC65816::instructionPullB() -> void {
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idle();
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idle();
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L B = pull();
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L B = pullN();
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ZF = B == 0;
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NF = B & 0x80;
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E S.h = 0x01;
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}
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auto WDC65816::instructionPullP() -> void {
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@ -113,8 +113,8 @@ auto WDC65816::instructionIndexedIndirectRead8(alu8 op) -> void {
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U.l = fetch();
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idle2();
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idle();
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V.l = readDirect(U.l + X.w + 0);
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V.h = readDirect(U.l + X.w + 1);
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V.l = readDirectX(U.l + X.w, 0);
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V.h = readDirectX(U.l + X.w, 1);
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L W.l = readBank(V.w + 0);
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alu(W.l);
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}
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@ -123,8 +123,8 @@ auto WDC65816::instructionIndexedIndirectRead16(alu16 op) -> void {
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U.l = fetch();
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idle2();
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idle();
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V.l = readDirect(U.l + X.w + 0);
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V.h = readDirect(U.l + X.w + 1);
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V.l = readDirectX(U.l + X.w, 0);
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V.h = readDirectX(U.l + X.w, 1);
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W.l = readBank(V.w + 0);
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L W.h = readBank(V.w + 1);
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alu(W.w);
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@ -90,8 +90,8 @@ auto WDC65816::instructionIndexedIndirectWrite8() -> void {
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U.l = fetch();
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idle2();
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idle();
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V.l = readDirect(U.l + X.w + 0);
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V.h = readDirect(U.l + X.w + 1);
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V.l = readDirectX(U.l + X.w, 0);
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V.h = readDirectX(U.l + X.w, 1);
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L writeBank(V.w + 0, A.l);
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}
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@ -99,8 +99,8 @@ auto WDC65816::instructionIndexedIndirectWrite16() -> void {
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U.l = fetch();
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idle2();
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idle();
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V.l = readDirect(U.l + X.w + 0);
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V.h = readDirect(U.l + X.w + 1);
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V.l = readDirectX(U.l + X.w, 0);
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V.h = readDirectX(U.l + X.w, 1);
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writeBank(V.w + 0, A.l);
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L writeBank(V.w + 1, A.h);
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}
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@ -59,6 +59,13 @@ auto WDC65816::writeDirect(uint address, uint8 data) -> void {
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write(D.w + address & 0xffff, data);
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}
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auto WDC65816::readDirectX(uint address, uint offset) -> uint8 {
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// The (direct,X) addressing mode has a bug in which the high byte is
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// wrapped within the page if E = 1 and D&0xFF != 0.
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if(EF && D.l) return read(((D.w + address) & 0xffff00) | ((D.w + address + offset) & 0xff));
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else return readDirect(address + offset);
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}
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auto WDC65816::readDirectN(uint address) -> uint8 {
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return read(D.w + address & 0xffff);
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}
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@ -58,6 +58,7 @@ struct WDC65816 {
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alwaysinline auto pushN(uint8 data) -> void;
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alwaysinline auto readDirect(uint address) -> uint8;
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alwaysinline auto writeDirect(uint address, uint8 data) -> void;
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alwaysinline auto readDirectX(uint address, uint offset) -> uint8;
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alwaysinline auto readDirectN(uint address) -> uint8;
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alwaysinline auto readBank(uint address) -> uint8;
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alwaysinline auto writeBank(uint address, uint8 data) -> void;
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@ -39,6 +39,8 @@ auto SA1::BWRAM::writeCPU(uint address, uint8 data) -> void {
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address = sa1.mmio.sbm * 0x2000 + (address & 0x1fff);
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}
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//note: BW-RAM protection works only when both SWEN and CWEN are disabled.
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if(!sa1.mmio.swen && !sa1.mmio.cwen && (address & 0x3ffff) < 0x100 << sa1.mmio.bwp) return;
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return write(address, data);
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}
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@ -71,6 +73,15 @@ auto SA1::BWRAM::readLinear(uint address, uint8 data) -> uint8 {
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}
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auto SA1::BWRAM::writeLinear(uint address, uint8 data) -> void {
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//note: BW-RAM protection works only when both SWEN and CWEN are disabled.
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//this is required for Kirby's Dream Land 3 to work:
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//* BWPA = 02 (protect 400000-4003ff)
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//* SWEN = 80 (writes enabled)
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//* CWEN = 00 (writes disabled)
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//KDL3 proceeds to write to 4001ax and 40032x which must succeed.
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//note: BWPA also affects SA-1 protection
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if(!sa1.mmio.swen && !sa1.mmio.cwen && (address & 0x3ffff) < 0x100 << sa1.mmio.bwp) return;
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return write(address, data);
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}
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@ -108,8 +108,16 @@ auto SA1::writeIOCPU(uint address, uint8 data) -> void {
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//(CCNT) SA-1 control
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case 0x2200: {
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if(mmio.sa1_resb && !(data & 0x20)) {
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//reset SA-1 CPU (PC bank set to 0x00)
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//reset SA-1 CPU (PC bank and data bank set to 0x00, clear STP status)
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r.pc.d = mmio.crv;
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r.b = 0x00;
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r.stp = false;
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//todo: probably needs a SA-1 CPU reset
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//reset r.s, r.e, r.wai ...
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//reset io status
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//todo: reset timing is unknown, CIWP is set to 0 at reset
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mmio.ciwp = 0x00;
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}
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mmio.sa1_irq = (data & 0x80);
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@ -37,7 +37,7 @@ auto SA1::read(uint address) -> uint8 {
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}
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if((address & 0x40e000) == 0x006000 //00-3f,80-bf:6000-7fff
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|| (address & 0xf00000) == 0x400000 //40-4f:0000-ffff
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|| (address & 0xe00000) == 0x400000 //40-5f:0000-ffff
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|| (address & 0xf00000) == 0x600000 //60-6f:0000-ffff
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) {
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step();
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@ -81,7 +81,7 @@ auto SA1::write(uint address, uint8 data) -> void {
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}
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if((address & 0x40e000) == 0x006000 //00-3f,80-bf:6000-7fff
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|| (address & 0xf00000) == 0x400000 //40-4f:0000-ffff
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|| (address & 0xe00000) == 0x400000 //40-5f:0000-ffff
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|| (address & 0xf00000) == 0x600000 //60-6f:0000-ffff
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) {
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step();
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@ -848,7 +848,7 @@ const unsigned char Boards[32230] = {
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97,112,32,97,100,100,114,101,115,115,61,55,48,45,55,100,44,102,48,45,102,102,58,48,48,48,48,45,55,102,102,102,
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32,109,97,115,107,61,48,120,56,48,48,48,10,10,98,111,97,114,100,58,32,76,79,82,79,77,45,82,65,77,35,65,
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10,32,32,109,101,109,111,114,121,32,116,121,112,101,61,82,79,77,32,99,111,110,116,101,110,116,61,80,114,111,103,114,
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97,109,10,32,32,32,32,109,97,112,32,97,100,100,114,101,115,115,61,48,48,45,51,102,44,56,48,45,98,102,58,56,
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97,109,10,32,32,32,32,109,97,112,32,97,100,100,114,101,115,115,61,48,48,45,54,102,44,56,48,45,101,102,58,56,
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48,48,48,45,102,102,102,102,32,109,97,115,107,61,48,120,56,48,48,48,10,32,32,109,101,109,111,114,121,32,116,121,
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112,101,61,82,65,77,32,99,111,110,116,101,110,116,61,83,97,118,101,10,32,32,32,32,109,97,112,32,97,100,100,114,
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101,115,115,61,55,48,45,55,100,44,102,48,45,102,102,58,48,48,48,48,45,102,102,102,102,32,109,97,115,107,61,48,
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