From 9166b0b9319d29b14993cd15b79cb6f169ca50f0 Mon Sep 17 00:00:00 2001
From: Asnivor <coding@asnitech.co.uk>
Date: Wed, 13 Jun 2018 07:55:23 +0100
Subject: [PATCH] ZXHawk: wire up +2a/+3 memory contention model (MREQ)

---
 .../Computers/SinclairSpectrum/Machine/CPUMonitor.cs | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/CPUMonitor.cs b/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/CPUMonitor.cs
index 8838abe75e..50ff4ced4a 100644
--- a/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/CPUMonitor.cs
+++ b/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/CPUMonitor.cs
@@ -30,7 +30,17 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
         /// </summary>
         public ushort BUSRQ
         {
-            get {  return _cpu.BUSRQ[_cpu.bus_pntr]; }
+            get
+            {
+                switch (machineType)
+                {
+                    case MachineType.ZXSpectrum128Plus2a:
+                    case MachineType.ZXSpectrum128Plus3:
+                        return _cpu.MEMRQ[_cpu.bus_pntr];
+                    default:
+                        return _cpu.BUSRQ[_cpu.mem_pntr];
+                }
+            }
         }
 
         #endregion