z80: add a MEMRQ vector for memory contention for zx spectrum
This commit is contained in:
parent
5ec469f2f3
commit
8c3afc189a
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@ -22,6 +22,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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public ushort instr_swap;
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public ushort[] cur_instr;
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public ushort[] BUSRQ;
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public ushort[] MEMRQ;
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public byte opcode;
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public bool NO_prefix, CB_prefix, IX_prefix, EXTD_prefix, IY_prefix, IXCB_prefix, IYCB_prefix;
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public bool IXCB_prefetch, IYCB_prefetch; // value is fetched before opcode
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@ -46,6 +46,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP };
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BUSRQ = new ushort[] { 0, SPh, 0, 0, SPh, 0, 0, PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { 0, SPh, 0, 0, SPh, 0, 0, PCh, 0, 0, 0 };
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}
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// Mode 0 interrupts only take effect if a CALL or RST is on the data bus
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@ -65,6 +66,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP };
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BUSRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, 0 };
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}
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// Just jump to $0038
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@ -86,6 +88,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP };
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BUSRQ = new ushort[] { I, 0, 0, SPh, 0, 0, SPh, 0, 0, PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { I, 0, 0, SPh, 0, 0, SPh, 0, 0, PCh, 0, 0, 0 };
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}
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// Interrupt mode 2 uses the I vector combined with a byte on the data bus
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@ -113,6 +116,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP };
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BUSRQ = new ushort[] { I, 0, 0, SPh, 0, 0, SPh, 0, 0, W, 0, 0, W, 0 ,0 ,PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { I, 0, 0, SPh, 0, 0, SPh, 0, 0, W, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
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}
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private static ushort[] INT_vectors = new ushort[] {0x40, 0x48, 0x50, 0x58, 0x60};
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@ -15,7 +15,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP_F,
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OP };
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BUSRQ = new ushort[] {PCh, 0, 0, 0 };
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BUSRQ = new ushort[] { PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { PCh, 0, 0, 0 };
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}
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// NOTE: In a real Z80, this operation just flips a switch to choose between 2 registers
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@ -29,6 +30,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP };
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BUSRQ = new ushort[] { PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { PCh, 0, 0, 0 };
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}
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private void EXX_()
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@ -40,6 +42,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP };
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BUSRQ = new ushort[] { PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { PCh, 0, 0, 0 };
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}
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// this exchanges 2 16 bit registers
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@ -52,6 +55,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP };
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BUSRQ = new ushort[] { PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { PCh, 0, 0, 0 };
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}
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private void INC_16(ushort src_l, ushort src_h)
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@ -64,7 +68,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP_F,
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OP };
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BUSRQ = new ushort[] {I, I, PCh, 0, 0, 0};
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BUSRQ = new ushort[] { I, I, PCh, 0, 0, 0};
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MEMRQ = new ushort[] { 0, 0, PCh, 0, 0, 0 };
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}
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@ -78,7 +83,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP_F,
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OP };
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BUSRQ = new ushort[] {I, I, PCh, 0, 0, 0};
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BUSRQ = new ushort[] { I, I, PCh, 0, 0, 0};
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MEMRQ = new ushort[] { 0, 0, PCh, 0, 0, 0 };
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}
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// this is done in two steps technically, but the flags don't work out using existing funcitons
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@ -98,7 +104,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP_F,
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OP };
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BUSRQ = new ushort[] {I, I, I, I, I, I, I, PCh, 0, 0, 0 };
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BUSRQ = new ushort[] { I, I, I, I, I, I, I, PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { 0, 0, 0, 0, 0, 0, 0, PCh, 0, 0, 0 };
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}
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private void REG_OP(ushort operation, ushort dest, ushort src)
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@ -109,7 +116,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP_F,
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OP };
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BUSRQ = new ushort[] {PCh, 0, 0, 0 };
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BUSRQ = new ushort[] { PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { PCh, 0, 0, 0 };
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}
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// Operations using the I and R registers take one T-cycle longer
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@ -123,6 +131,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP };
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BUSRQ = new ushort[] { I, PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { 0, PCh, 0, 0, 0 };
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}
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// note: do not use DEC here since no flags are affected by this operation
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@ -145,7 +154,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP_F,
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OP };
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BUSRQ = new ushort[] {I, PCh, 0, 0, PCh, PCh, PCh, PCh, PCh, PCh, 0, 0, 0};
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BUSRQ = new ushort[] { I, PCh, 0, 0, PCh, PCh, PCh, PCh, PCh, PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { 0, PCh, 0, 0, 0, 0, 0, 0, 0, PCh, 0, 0, 0 };
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}
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else
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{
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@ -159,7 +169,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP_F,
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OP };
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BUSRQ = new ushort[] {I, PCh, 0, 0, PCh, 0, 0, 0};
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BUSRQ = new ushort[] { I, PCh, 0, 0, PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { 0, PCh, 0, 0, PCh, 0, 0, 0 };
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}
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}
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@ -171,7 +182,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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IDLE,
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HALT };
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BUSRQ = new ushort[] {PCh, 0, 0, 0 };
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BUSRQ = new ushort[] { PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { PCh, 0, 0, 0 };
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}
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private void JR_COND(bool cond)
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@ -192,7 +204,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP_F,
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OP };
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BUSRQ = new ushort[] {PCh, 0, 0, PCh, PCh, PCh, PCh, PCh, PCh, 0, 0, 0};
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BUSRQ = new ushort[] { PCh, 0, 0, PCh, PCh, PCh, PCh, PCh, PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { PCh, 0, 0, 0, 0, 0, 0, 0, PCh, 0, 0, 0 };
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}
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else
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{
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@ -205,7 +218,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP_F,
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OP };
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BUSRQ = new ushort[] {PCh, 0, 0, PCh, 0, 0, 0};
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BUSRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, 0 };
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}
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}
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@ -225,7 +239,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP_F,
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OP };
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BUSRQ = new ushort[] {PCh, 0, 0, PCh, 0, 0, W, 0, 0, 0};
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BUSRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, W, 0, 0, 0 };
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MEMRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, W, 0, 0, 0 };
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}
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else
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{
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@ -241,7 +256,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP_F,
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OP };
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BUSRQ = new ushort[] {PCh, 0, 0, PCh, 0, 0, PCh, 0, 0, 0};
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BUSRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, PCh, 0, 0, 0 };
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}
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}
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@ -259,7 +275,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP_F,
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OP };
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BUSRQ = new ushort[] {SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0};
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BUSRQ = new ushort[] { SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0 };
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MEMRQ = new ushort[] { SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0 };
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}
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private void RETI_()
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@ -276,7 +293,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP_F,
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OP };
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BUSRQ = new ushort[] {SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0};
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BUSRQ = new ushort[] { SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0 };
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MEMRQ = new ushort[] { SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0 };
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}
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private void RETN_()
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@ -293,7 +311,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP_F,
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OP };
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BUSRQ = new ushort[] {SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0};
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BUSRQ = new ushort[] { SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0 };
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MEMRQ = new ushort[] { SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0 };
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}
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@ -314,7 +333,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP_F,
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OP };
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BUSRQ = new ushort[] {I, SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0};
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BUSRQ = new ushort[] { I, SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0 };
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MEMRQ = new ushort[] { 0, SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0 };
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}
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else
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{
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@ -325,7 +345,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP_F,
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OP };
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BUSRQ = new ushort[] {I, PCh, 0, 0, 0};
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BUSRQ = new ushort[] { I, PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { 0, PCh, 0, 0, 0 };
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}
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}
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@ -338,10 +359,10 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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WAIT,
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RD_INC, Z, PCl, PCh,
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IDLE,
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DEC16, SPl, SPh,
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WAIT,
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RD_INC, W, PCl, PCh,
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IDLE,
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RD, W, PCl, PCh,
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INC16, PCl, PCh,
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DEC16, SPl, SPh,
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WAIT,
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WR_DEC, SPl, SPh, PCh,
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IDLE,
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@ -352,7 +373,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP_F,
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OP };
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BUSRQ = new ushort[] {PCh, 0, 0, PCh, 0, 0, PCh, SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0};
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BUSRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, PCh, SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0 };
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MEMRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, 0, SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0 };
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}
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else
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{
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@ -369,6 +391,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP };
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BUSRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, PCh, 0, 0, 0 };
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}
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}
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@ -381,6 +404,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP };
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BUSRQ = new ushort[] { PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { PCh, 0, 0, 0 };
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}
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private void BIT_OP(ushort operation, ushort bit, ushort src)
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@ -392,6 +416,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP };
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BUSRQ = new ushort[] { PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { PCh, 0, 0, 0 };
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}
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private void PUSH_(ushort src_l, ushort src_h)
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@ -410,6 +435,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP };
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BUSRQ = new ushort[] { I, SPh, 0, 0, SPh, 0, 0, PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { 0, SPh, 0, 0, SPh, 0, 0, PCh, 0, 0, 0 };
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}
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OP };
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BUSRQ = new ushort[] { SPh, 0, 0, SPh, 0, 0, PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { SPh, 0, 0, SPh, 0, 0, PCh, 0, 0, 0 };
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}
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private void RST_(ushort n)
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OP };
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BUSRQ = new ushort[] { I, SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0 };
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MEMRQ = new ushort[] { 0, SPh, 0, 0, SPh, 0, 0, W, 0, 0, 0 };
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}
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private void PREFIX_(ushort src)
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PREFIX, src};
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BUSRQ = new ushort[] { PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { PCh, 0, 0, 0 };
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}
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private void PREFETCH_(ushort src)
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PREFIX, src,};
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BUSRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, PCh, PCh };
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MEMRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, 0, 0 };
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}
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private void DI_()
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@ -494,6 +524,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP };
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BUSRQ = new ushort[] { PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { PCh, 0, 0, 0 };
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}
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private void EI_()
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@ -505,6 +536,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP };
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BUSRQ = new ushort[] { PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { PCh, 0, 0, 0 };
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}
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private void JP_16(ushort src_l, ushort src_h)
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@ -516,6 +548,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP };
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BUSRQ = new ushort[] { src_h, 0, 0, 0 };
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MEMRQ = new ushort[] { src_h, 0, 0, 0 };
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}
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private void LD_SP_16(ushort src_l, ushort src_h)
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@ -529,6 +562,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP };
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BUSRQ = new ushort[] { I, I, PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { 0, 0, PCh, 0, 0, 0 };
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}
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private void OUT_()
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@ -546,7 +580,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP_F,
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OP};
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BUSRQ = new ushort[] { PCh, 0, 0, WIO1, WIO2, WIO3, WIO4, PCh, 0, 0, 0};
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BUSRQ = new ushort[] { PCh, 0, 0, WIO1, WIO2, WIO3, WIO4, PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { PCh, 0, 0, WIO1, WIO2, WIO3, WIO4, PCh, 0, 0, 0 };
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}
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private void OUT_REG_(ushort dest, ushort src)
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@ -562,6 +597,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP};
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BUSRQ = new ushort[] { BIO1, BIO2, BIO3, BIO4, PCh, 0, 0, 0 };
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MEMRQ = new ushort[] { BIO1, BIO2, BIO3, BIO4, PCh, 0, 0, 0 };
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}
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private void IN_()
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@ -580,6 +616,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
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OP};
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|
||||
BUSRQ = new ushort[] { PCh, 0, 0, WIO1, WIO2, WIO3, WIO4, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { PCh, 0, 0, WIO1, WIO2, WIO3, WIO4, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void IN_REG_(ushort dest, ushort src)
|
||||
|
@ -595,6 +632,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP};
|
||||
|
||||
BUSRQ = new ushort[] { BIO1, BIO2, BIO3, BIO4, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { BIO1, BIO2, BIO3, BIO4, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void REG_OP_16_(ushort op, ushort dest_l, ushort dest_h, ushort src_l, ushort src_h)
|
||||
|
@ -613,6 +651,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP};
|
||||
|
||||
BUSRQ = new ushort[] { I, I, I, I, I, I, I, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, 0, 0, 0, 0, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void INT_MODE_(ushort src)
|
||||
|
@ -624,6 +663,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void RRD_()
|
||||
|
@ -645,6 +685,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { H, 0, 0, H, H, H, H, W, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { H, 0, 0, 0, 0, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void RLD_()
|
||||
|
@ -666,6 +707,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { H, 0, 0, H, H, H, H, W, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { H, 0, 0, 0, 0, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
@ -18,6 +18,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { src_h, 0, 0, src_h, src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { src_h, 0, 0, 0, src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void BIT_OP_IND(ushort operation, ushort bit, ushort src_l, ushort src_h)
|
||||
|
@ -36,6 +37,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { src_h, 0, 0, src_h, src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { src_h, 0, 0, 0, src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
// Note that this operation uses I_BIT, same as indexed BIT.
|
||||
|
@ -55,6 +57,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { src_h, 0, 0, src_h, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { src_h, 0, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void REG_OP_IND_INC(ushort operation, ushort dest, ushort src_l, ushort src_h)
|
||||
|
@ -69,6 +72,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void REG_OP_IND(ushort operation, ushort dest, ushort src_l, ushort src_h)
|
||||
|
@ -83,6 +87,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
// different because HL doesn't effect WZ
|
||||
|
@ -98,6 +103,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { H, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { H, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void LD_16_IND_nn(ushort src_l, ushort src_h)
|
||||
|
@ -121,6 +127,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, W, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, W, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void LD_IND_16_nn(ushort dest_l, ushort dest_h)
|
||||
|
@ -144,6 +151,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, W, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, W, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void LD_8_IND_nn(ushort src)
|
||||
|
@ -164,6 +172,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void LD_IND_8_nn(ushort dest)
|
||||
|
@ -184,6 +193,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void LD_8_IND(ushort dest_l, ushort dest_h, ushort src)
|
||||
|
@ -198,6 +208,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { dest_h, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { dest_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
// seperate HL needed since it doesn't effect the WZ pair
|
||||
|
@ -213,6 +224,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { H, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { H, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void LD_8_IND_IND(ushort dest_l, ushort dest_h, ushort src_l, ushort src_h)
|
||||
|
@ -230,6 +242,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { src_h, 0, 0, dest_h, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { src_h, 0, 0, dest_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void LD_IND_8_INC(ushort dest, ushort src_l, ushort src_h)
|
||||
|
@ -244,6 +257,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void LD_IND_16(ushort dest_l, ushort dest_h, ushort src_l, ushort src_h)
|
||||
|
@ -261,6 +275,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { src_h, 0, 0, src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { src_h, 0, 0, src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void INC_8_IND(ushort src_l, ushort src_h)
|
||||
|
@ -279,6 +294,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { src_h, 0, 0, src_h, src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { src_h, 0, 0, 0, src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void DEC_8_IND(ushort src_l, ushort src_h)
|
||||
|
@ -297,6 +313,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { src_h, 0, 0, src_h, src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { src_h, 0, 0, 0, src_h, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
// NOTE: WZ implied for the wollowing 3 functions
|
||||
|
@ -316,6 +333,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { W, 0, 0, W, W, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { W, 0, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void I_BIT_OP(ushort operation, ushort bit, ushort dest)
|
||||
|
@ -334,6 +352,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { W, 0, 0, W, W, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { W, 0, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void I_BIT_TE(ushort bit)
|
||||
|
@ -349,6 +368,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { W, 0, 0, W, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { W, 0, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void I_OP_n(ushort operation, ushort src_l, ushort src_h)
|
||||
|
@ -356,13 +376,13 @@
|
|||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
WAIT,
|
||||
RD_INC, ALU, PCl, PCh,
|
||||
RD, ALU, PCl, PCh,
|
||||
IDLE,
|
||||
IDLE,
|
||||
TR16, Z, W, src_l, src_h,
|
||||
ADDS, Z, W, ALU, ZERO,
|
||||
IDLE,
|
||||
IDLE,
|
||||
INC16, PCl, PCh,
|
||||
WAIT,
|
||||
RD, ALU, Z, W,
|
||||
operation, ALU,
|
||||
|
@ -375,6 +395,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, PCh, PCh, PCh, PCh, PCh, W, 0, 0, W, W, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { PCh, 0, 0, 0, 0, 0, 0, 0, W, 0, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void I_OP_n_n(ushort src_l, ushort src_h)
|
||||
|
@ -385,10 +406,10 @@
|
|||
RD_INC, ALU, PCl, PCh,
|
||||
ADDS, Z, W, ALU, ZERO,
|
||||
WAIT,
|
||||
RD_INC, ALU, PCl, PCh,
|
||||
IDLE,
|
||||
RD, ALU, PCl, PCh,
|
||||
IDLE,
|
||||
IDLE,
|
||||
INC16, PCl, PCh,
|
||||
WAIT,
|
||||
WR, Z, W, ALU,
|
||||
IDLE,
|
||||
|
@ -397,6 +418,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, PCh, PCh, W, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { PCh, 0, 0, PCh, 0, 0, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void I_REG_OP_IND_n(ushort operation, ushort dest, ushort src_l, ushort src_h)
|
||||
|
@ -404,13 +426,13 @@
|
|||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
WAIT,
|
||||
RD_INC, ALU, PCl, PCh,
|
||||
RD, ALU, PCl, PCh,
|
||||
IDLE,
|
||||
TR16, Z, W, src_l, src_h,
|
||||
IDLE,
|
||||
ADDS, Z, W, ALU, ZERO,
|
||||
IDLE,
|
||||
IDLE,
|
||||
INC16, PCl, PCh,
|
||||
WAIT,
|
||||
RD, ALU, Z, W,
|
||||
operation, dest, ALU,
|
||||
|
@ -419,6 +441,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, PCh, PCh, PCh, PCh, PCh, W, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { PCh, 0, 0, 0, 0, 0, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void I_LD_8_IND_n(ushort dest_l, ushort dest_h, ushort src)
|
||||
|
@ -426,13 +449,13 @@
|
|||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
WAIT,
|
||||
RD_INC, ALU, PCl, PCh,
|
||||
RD, ALU, PCl, PCh,
|
||||
IDLE,
|
||||
IDLE,
|
||||
TR16, Z, W, dest_l, dest_h,
|
||||
ADDS, Z, W, ALU, ZERO,
|
||||
IDLE,
|
||||
IDLE,
|
||||
INC16, PCl, PCh,
|
||||
WAIT,
|
||||
WR, Z, W, src,
|
||||
IDLE,
|
||||
|
@ -441,6 +464,7 @@
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, PCh, PCh, PCh, PCh, PCh, Z, 0, 0, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { PCh, 0, 0, 0, 0, 0, 0, 0, Z, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void LD_OP_R(ushort operation, ushort repeat_instr)
|
||||
|
@ -456,6 +480,7 @@
|
|||
SET_FL_LD_R, 0, operation, repeat_instr};
|
||||
|
||||
BUSRQ = new ushort[] { H, 0, 0, D, 0, 0, D, D };
|
||||
MEMRQ = new ushort[] { H, 0, 0, D, 0, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void CP_OP_R(ushort operation, ushort repeat_instr)
|
||||
|
@ -471,6 +496,7 @@
|
|||
SET_FL_CP_R, 1, operation, repeat_instr};
|
||||
|
||||
BUSRQ = new ushort[] { H, 0, 0, H, H, H, H, H };
|
||||
MEMRQ = new ushort[] { H, 0, 0, 0, 0, 0, 0, 0 };
|
||||
}
|
||||
|
||||
private void IN_OP_R(ushort operation, ushort repeat_instr)
|
||||
|
@ -486,6 +512,7 @@
|
|||
REP_OP_I, L, H, ALU, operation, 2, operation, repeat_instr };
|
||||
|
||||
BUSRQ = new ushort[] { I, BIO1, BIO2, BIO3, BIO4, H, 0, 0};
|
||||
MEMRQ = new ushort[] { 0, BIO1, BIO2, BIO3, BIO4, H, 0, 0 };
|
||||
}
|
||||
|
||||
private void OUT_OP_R(ushort operation, ushort repeat_instr)
|
||||
|
@ -501,6 +528,7 @@
|
|||
REP_OP_O, C, B, ALU, operation, 3, operation, repeat_instr };
|
||||
|
||||
BUSRQ = new ushort[] { I, H, 0, 0, BIO1, BIO2, BIO3, BIO4 };
|
||||
MEMRQ = new ushort[] { 0, H, 0, 0, BIO1, BIO2, BIO3, BIO4 };
|
||||
}
|
||||
|
||||
// this is an indirect change of a a 16 bit register with memory
|
||||
|
@ -509,25 +537,26 @@
|
|||
cur_instr = new ushort[]
|
||||
{IDLE,
|
||||
WAIT,
|
||||
RD, Z, dest_l, dest_h,
|
||||
INC16, dest_l, dest_h,
|
||||
IDLE,
|
||||
RD_INC, Z, dest_l, dest_h,
|
||||
IDLE,
|
||||
WAIT,
|
||||
RD, W, dest_l, dest_h,
|
||||
IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WR_DEC, dest_l, dest_h, src_h,
|
||||
IDLE,
|
||||
IDLE,
|
||||
IDLE,
|
||||
WAIT,
|
||||
WR, dest_l, dest_h, src_l,
|
||||
IDLE,
|
||||
IDLE,
|
||||
TR16, src_l, src_h, Z, W,
|
||||
WAIT,
|
||||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { dest_h, 0, 0, 0, dest_h, 0, 0, dest_h, 0, 0, 0, 0, dest_h, 0, 0, PCh, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { dest_h, 0, 0, dest_h, 0, 0, dest_h, dest_h, 0, 0, dest_h, 0, 0, dest_h, dest_h, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { dest_h, 0, 0, dest_h, 0, 0, 0, dest_h, 0, 0, dest_h, 0, 0, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
@ -103,6 +103,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
instr_pntr = 0; bus_pntr = 0;
|
||||
NO_prefix = true;
|
||||
}
|
||||
|
@ -509,6 +510,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP};
|
||||
|
||||
BUSRQ = new ushort[] { D, D, D, D, D, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, 0, 0, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -518,7 +520,8 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP_F,
|
||||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
}
|
||||
instr_pntr = 0; bus_pntr = 0;
|
||||
break;
|
||||
|
@ -543,6 +546,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP};
|
||||
|
||||
BUSRQ = new ushort[] { H, H, H, H, H, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, 0, 0, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -553,6 +557,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
}
|
||||
instr_pntr = 0; bus_pntr = 0;
|
||||
break;
|
||||
|
@ -620,6 +625,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP};
|
||||
|
||||
BUSRQ = new ushort[] { H, H, H, H, H, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, 0, 0, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -630,6 +636,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
}
|
||||
instr_pntr = 0; bus_pntr = 0;
|
||||
break;
|
||||
|
@ -679,6 +686,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
|
||||
|
||||
BUSRQ = new ushort[] { B, B, B, B, B, PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { 0, 0, 0, 0, 0, PCh, 0, 0, 0 };
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -689,6 +697,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
OP };
|
||||
|
||||
BUSRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
MEMRQ = new ushort[] { PCh, 0, 0, 0 };
|
||||
}
|
||||
instr_pntr = 0; bus_pntr = 0;
|
||||
break;
|
||||
|
@ -767,6 +776,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
|
|||
ser.Sync("bus_pntr", ref bus_pntr);
|
||||
ser.Sync("cur_instr", ref cur_instr, false);
|
||||
ser.Sync("BUSRQ", ref BUSRQ, false);
|
||||
ser.Sync("MEMRQ", ref MEMRQ, false);
|
||||
ser.Sync("instr_swap", ref instr_swap);
|
||||
ser.Sync("opcode", ref opcode);
|
||||
ser.Sync("FlagI", ref FlagI);
|
||||
|
|
Loading…
Reference in New Issue