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ZXHawk: Small performance increase (rendering cycle now happens only when it needs to)

This commit is contained in:
Asnivor 2018-06-07 15:33:58 +01:00
parent b0af0e48e0
commit 843dc7a69a
11 changed files with 36 additions and 27 deletions
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2
BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/CPUMonitor.cs
View File

@ -61,8 +61,6 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
/// </summary>
public void ExecuteCycle()
{
_machine.ULADevice.RenderScreen((int)_machine.CurrentFrameCycle);
// is the next CPU cycle causing a BUSRQ or IORQ?
if (BUSRQ > 0)
{

2
BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/SpectrumBase.cs
View File

@ -167,7 +167,9 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
while (CurrentFrameCycle < ULADevice.FrameLength)
{
ULADevice.CheckForInterrupt(CurrentFrameCycle);
CPUMon.ExecuteCycle();
// cycle the tape device
if (UPDDiskDevice == null || !UPDDiskDevice.FDD_IsDiskLoaded)
TapeDevice.TapeCycle();

4
BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ULA.cs
View File

@ -589,10 +589,6 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
// check boundaries
if (toCycle > FrameCycleLength)
toCycle = FrameCycleLength;
if (LastTState > toCycle)
LastTState = toCycle - 2;
if (toCycle < 0)
toCycle = 0;
// render the required number of cycles
for (int t = LastTState; t < toCycle; t++)

2
BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum128K/ZX128.Memory.cs
View File

@ -134,6 +134,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
// RAM 0x4000 (RAM5 - Bank5 or shadow bank RAM7)
case 1:
ULADevice.RenderScreen((int)CurrentFrameCycle);
RAM5[addr % 0x4000] = value;
break;
@ -162,6 +163,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
RAM4[addr % 0x4000] = value;
break;
case 5:
ULADevice.RenderScreen((int)CurrentFrameCycle);
RAM5[addr % 0x4000] = value;
break;
case 6:

6
BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum128KPlus2a/ZX128Plus2a.Memory.cs
View File

@ -236,9 +236,11 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
break;
case 1:
case 2:
ULADevice.RenderScreen((int)CurrentFrameCycle);
RAM5[addr % 0x4000] = value;
break;
case 3:
ULADevice.RenderScreen((int)CurrentFrameCycle);
RAM7[addr % 0x4000] = value;
break;
}
@ -265,6 +267,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
RAM3[addr % 0x4000] = value;
break;
case 1:
ULADevice.RenderScreen((int)CurrentFrameCycle);
RAM7[addr % 0x4000] = value;
break;
}
@ -299,6 +302,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
// RAM 0x4000 (RAM5 - Bank5 only)
case 1:
ULADevice.RenderScreen((int)CurrentFrameCycle);
RAM5[addr % 0x4000] = value;
break;
@ -327,12 +331,14 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
RAM4[addr % 0x4000] = value;
break;
case 5:
ULADevice.RenderScreen((int)CurrentFrameCycle);
RAM5[addr % 0x4000] = value;
break;
case 6:
RAM6[addr % 0x4000] = value;
break;
case 7:
ULADevice.RenderScreen((int)CurrentFrameCycle);
RAM7[addr % 0x4000] = value;
break;
}

6
BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum128KPlus2a/ZX128Plus2a.Port.cs
View File

@ -144,7 +144,11 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
*/
// Border - LSB 3 bits hold the border colour
ULADevice.BorderColor = value & BORDER_BIT;
if (ULADevice.BorderColor != (value & BORDER_BIT))
{
ULADevice.RenderScreen((int)CurrentFrameCycle);
ULADevice.BorderColor = value & BORDER_BIT;
}
// Buzzer
BuzzerDevice.ProcessPulseValue((value & EAR_BIT) != 0);

8
BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum128KPlus3/ZX128Plus3.Memory.cs
View File

@ -236,10 +236,12 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
break;
case 1:
case 2:
ULADevice.RenderScreen((int)CurrentFrameCycle);
RAM5[addr % 0x4000] = value;
break;
case 3:
RAM7[addr % 0x4000] = value;
ULADevice.RenderScreen((int)CurrentFrameCycle);
RAM7[addr % 0x4000] = value;
break;
}
break;
@ -265,6 +267,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
RAM3[addr % 0x4000] = value;
break;
case 1:
ULADevice.RenderScreen((int)CurrentFrameCycle);
RAM7[addr % 0x4000] = value;
break;
}
@ -299,6 +302,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
// RAM 0x4000 (RAM5 - Bank5 only)
case 1:
ULADevice.RenderScreen((int)CurrentFrameCycle);
RAM5[addr % 0x4000] = value;
break;
@ -327,12 +331,14 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
RAM4[addr % 0x4000] = value;
break;
case 5:
ULADevice.RenderScreen((int)CurrentFrameCycle);
RAM5[addr % 0x4000] = value;
break;
case 6:
RAM6[addr % 0x4000] = value;
break;
case 7:
ULADevice.RenderScreen((int)CurrentFrameCycle);
RAM7[addr % 0x4000] = value;
break;
}

6
BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum128KPlus3/ZX128Plus3.Port.cs
View File

@ -150,7 +150,11 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
*/
// Border - LSB 3 bits hold the border colour
ULADevice.BorderColor = value & BORDER_BIT;
if (ULADevice.BorderColor != (value & BORDER_BIT))
{
ULADevice.RenderScreen((int)CurrentFrameCycle);
ULADevice.BorderColor = value & BORDER_BIT;
}
// Buzzer
BuzzerDevice.ProcessPulseValue((value & EAR_BIT) != 0);

15
BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum16K/ZX16.cs
View File

@ -85,6 +85,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
// cannot write to ROM
break;
case 1:
ULADevice.RenderScreen((int)CurrentFrameCycle);
RAM0[index] = value;
break;
}
@ -98,11 +99,6 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
/// <returns></returns>
public override byte ReadMemory(ushort addr)
{
/*
if (IsContended(addr))
CPU.TotalExecutedCycles += ULADevice.GetContentionValue((int)CurrentFrameCycle);
*/
var data = ReadBus(addr);
return data;
}
@ -115,15 +111,6 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
/// <param name="value"></param>
public override void WriteMemory(ushort addr, byte value)
{
/*
// apply contention if necessary
if (IsContended(addr))
{
ULADevice.RenderScreen((int)CurrentFrameCycle);
CPU.TotalExecutedCycles += ULADevice.GetContentionValue((int)CurrentFrameCycle);
}
*/
WriteBus(addr, value);
}

1
BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum48K/ZX48.Memory.cs
View File

@ -77,6 +77,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
// cannot write to ROM
break;
case 1:
ULADevice.RenderScreen((int)CurrentFrameCycle);
RAM0[index] = value;
break;
case 2:

7
BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum48K/ZX48.Port.cs
View File

@ -82,8 +82,11 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
*/
// Border - LSB 3 bits hold the border colour
//ULADevice.RenderScreen((int)CurrentFrameCycle);
ULADevice.BorderColor = value & BORDER_BIT;
if (ULADevice.BorderColor != (value & BORDER_BIT))
{
ULADevice.RenderScreen((int)CurrentFrameCycle);
ULADevice.BorderColor = value & BORDER_BIT;
}
// Buzzer
BuzzerDevice.ProcessPulseValue((value & EAR_BIT) != 0);