z80: make TotalExecutedCycles long and change related variables accordingly

This commit is contained in:
alyosha-tas 2018-03-18 09:55:56 -04:00
parent dbb90a996d
commit 81e80acf86
15 changed files with 145 additions and 146 deletions

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@ -4,8 +4,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
{ {
public partial class Z80A public partial class Z80A
{ {
private int totalExecutedCycles; public long TotalExecutedCycles;
public int TotalExecutedCycles { get { return totalExecutedCycles; } set { totalExecutedCycles = value; } }
private int EI_pending; private int EI_pending;

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@ -602,7 +602,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
FTCH_DB_Func(); FTCH_DB_Func();
break; break;
} }
totalExecutedCycles++; TotalExecutedCycles++;
} }
// tracer stuff // tracer stuff
@ -669,7 +669,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
ser.Sync("IFF1", ref iff1); ser.Sync("IFF1", ref iff1);
ser.Sync("IFF2", ref iff2); ser.Sync("IFF2", ref iff2);
ser.Sync("Halted", ref halted); ser.Sync("Halted", ref halted);
ser.Sync("ExecutedCycles", ref totalExecutedCycles); ser.Sync("ExecutedCycles", ref TotalExecutedCycles);
ser.Sync("EI_pending", ref EI_pending); ser.Sync("EI_pending", ref EI_pending);
ser.Sync("instruction_pointer", ref instr_pntr); ser.Sync("instruction_pointer", ref instr_pntr);

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@ -12,35 +12,35 @@ namespace BizHawk.Emulation.Cores.Calculators
{ {
return new Dictionary<string, RegisterValue> return new Dictionary<string, RegisterValue>
{ {
["A"] = _cpu.Regs[_cpu.A], ["A"] = _cpu.Regs[_cpu.A],
["AF"] = _cpu.Regs[_cpu.F] + (_cpu.Regs[_cpu.A] << 8), ["AF"] = _cpu.Regs[_cpu.F] + (_cpu.Regs[_cpu.A] << 8),
["B"] = _cpu.Regs[_cpu.B], ["B"] = _cpu.Regs[_cpu.B],
["BC"] = _cpu.Regs[_cpu.C] + (_cpu.Regs[_cpu.B] << 8), ["BC"] = _cpu.Regs[_cpu.C] + (_cpu.Regs[_cpu.B] << 8),
["C"] = _cpu.Regs[_cpu.C], ["C"] = _cpu.Regs[_cpu.C],
["D"] = _cpu.Regs[_cpu.D], ["D"] = _cpu.Regs[_cpu.D],
["DE"] = _cpu.Regs[_cpu.E] + (_cpu.Regs[_cpu.D] << 8), ["DE"] = _cpu.Regs[_cpu.E] + (_cpu.Regs[_cpu.D] << 8),
["E"] = _cpu.Regs[_cpu.E], ["E"] = _cpu.Regs[_cpu.E],
["F"] = _cpu.Regs[_cpu.F], ["F"] = _cpu.Regs[_cpu.F],
["H"] = _cpu.Regs[_cpu.H], ["H"] = _cpu.Regs[_cpu.H],
["HL"] = _cpu.Regs[_cpu.L] + (_cpu.Regs[_cpu.H] << 8), ["HL"] = _cpu.Regs[_cpu.L] + (_cpu.Regs[_cpu.H] << 8),
["I"] = _cpu.Regs[_cpu.I], ["I"] = _cpu.Regs[_cpu.I],
["IX"] = _cpu.Regs[_cpu.Ixl] + (_cpu.Regs[_cpu.Ixh] << 8), ["IX"] = _cpu.Regs[_cpu.Ixl] + (_cpu.Regs[_cpu.Ixh] << 8),
["IY"] = _cpu.Regs[_cpu.Iyl] + (_cpu.Regs[_cpu.Iyh] << 8), ["IY"] = _cpu.Regs[_cpu.Iyl] + (_cpu.Regs[_cpu.Iyh] << 8),
["L"] = _cpu.Regs[_cpu.L], ["L"] = _cpu.Regs[_cpu.L],
["PC"] = _cpu.Regs[_cpu.PCl] + (_cpu.Regs[_cpu.PCh] << 8), ["PC"] = _cpu.Regs[_cpu.PCl] + (_cpu.Regs[_cpu.PCh] << 8),
["R"] = _cpu.Regs[_cpu.R], ["R"] = _cpu.Regs[_cpu.R],
["Shadow AF"] = _cpu.Regs[_cpu.F_s] + (_cpu.Regs[_cpu.A_s] << 8), ["Shadow AF"] = _cpu.Regs[_cpu.F_s] + (_cpu.Regs[_cpu.A_s] << 8),
["Shadow BC"] = _cpu.Regs[_cpu.C_s] + (_cpu.Regs[_cpu.B_s] << 8), ["Shadow BC"] = _cpu.Regs[_cpu.C_s] + (_cpu.Regs[_cpu.B_s] << 8),
["Shadow DE"] = _cpu.Regs[_cpu.E_s] + (_cpu.Regs[_cpu.D_s] << 8), ["Shadow DE"] = _cpu.Regs[_cpu.E_s] + (_cpu.Regs[_cpu.D_s] << 8),
["Shadow HL"] = _cpu.Regs[_cpu.L_s] + (_cpu.Regs[_cpu.H_s] << 8), ["Shadow HL"] = _cpu.Regs[_cpu.L_s] + (_cpu.Regs[_cpu.H_s] << 8),
["SP"] = _cpu.Regs[_cpu.Iyl] + (_cpu.Regs[_cpu.Iyh] << 8), ["SP"] = _cpu.Regs[_cpu.Iyl] + (_cpu.Regs[_cpu.Iyh] << 8),
["Flag C"] = _cpu.FlagC, ["Flag C"] = _cpu.FlagC,
["Flag N"] = _cpu.FlagN, ["Flag N"] = _cpu.FlagN,
["Flag P/V"] = _cpu.FlagP, ["Flag P/V"] = _cpu.FlagP,
["Flag 3rd"] = _cpu.Flag3, ["Flag 3rd"] = _cpu.Flag3,
["Flag H"] = _cpu.FlagH, ["Flag H"] = _cpu.FlagH,
["Flag 5th"] = _cpu.Flag5, ["Flag 5th"] = _cpu.Flag5,
["Flag Z"] = _cpu.FlagZ, ["Flag Z"] = _cpu.FlagZ,
["Flag S"] = _cpu.FlagS ["Flag S"] = _cpu.FlagS
}; };
} }
@ -49,85 +49,85 @@ namespace BizHawk.Emulation.Cores.Calculators
{ {
switch (register) switch (register)
{ {
default: default:
throw new InvalidOperationException(); throw new InvalidOperationException();
case "A": case "A":
_cpu.Regs[_cpu.A] = (ushort)value; _cpu.Regs[_cpu.A] = (ushort)value;
break; break;
case "AF": case "AF":
_cpu.Regs[_cpu.F] = (ushort)(value & 0xFF); _cpu.Regs[_cpu.F] = (ushort)(value & 0xFF);
_cpu.Regs[_cpu.A] = (ushort)(value & 0xFF00); _cpu.Regs[_cpu.A] = (ushort)(value & 0xFF00);
break; break;
case "B": case "B":
_cpu.Regs[_cpu.B] = (ushort)value; _cpu.Regs[_cpu.B] = (ushort)value;
break; break;
case "BC": case "BC":
_cpu.Regs[_cpu.C] = (ushort)(value & 0xFF); _cpu.Regs[_cpu.C] = (ushort)(value & 0xFF);
_cpu.Regs[_cpu.B] = (ushort)(value & 0xFF00); _cpu.Regs[_cpu.B] = (ushort)(value & 0xFF00);
break; break;
case "C": case "C":
_cpu.Regs[_cpu.C] = (ushort)value; _cpu.Regs[_cpu.C] = (ushort)value;
break; break;
case "D": case "D":
_cpu.Regs[_cpu.D] = (ushort)value; _cpu.Regs[_cpu.D] = (ushort)value;
break; break;
case "DE": case "DE":
_cpu.Regs[_cpu.E] = (ushort)(value & 0xFF); _cpu.Regs[_cpu.E] = (ushort)(value & 0xFF);
_cpu.Regs[_cpu.D] = (ushort)(value & 0xFF00); _cpu.Regs[_cpu.D] = (ushort)(value & 0xFF00);
break; break;
case "E": case "E":
_cpu.Regs[_cpu.E] = (ushort)value; _cpu.Regs[_cpu.E] = (ushort)value;
break; break;
case "F": case "F":
_cpu.Regs[_cpu.F] = (ushort)value; _cpu.Regs[_cpu.F] = (ushort)value;
break; break;
case "H": case "H":
_cpu.Regs[_cpu.H] = (ushort)value; _cpu.Regs[_cpu.H] = (ushort)value;
break; break;
case "HL": case "HL":
_cpu.Regs[_cpu.L] = (ushort)(value & 0xFF); _cpu.Regs[_cpu.L] = (ushort)(value & 0xFF);
_cpu.Regs[_cpu.H] = (ushort)(value & 0xFF00); _cpu.Regs[_cpu.H] = (ushort)(value & 0xFF00);
break; break;
case "I": case "I":
_cpu.Regs[_cpu.I] = (ushort)value; _cpu.Regs[_cpu.I] = (ushort)value;
break; break;
case "IX": case "IX":
_cpu.Regs[_cpu.Ixl] = (ushort)(value & 0xFF); _cpu.Regs[_cpu.Ixl] = (ushort)(value & 0xFF);
_cpu.Regs[_cpu.Ixh] = (ushort)(value & 0xFF00); _cpu.Regs[_cpu.Ixh] = (ushort)(value & 0xFF00);
break; break;
case "IY": case "IY":
_cpu.Regs[_cpu.Iyl] = (ushort)(value & 0xFF); _cpu.Regs[_cpu.Iyl] = (ushort)(value & 0xFF);
_cpu.Regs[_cpu.Iyh] = (ushort)(value & 0xFF00); _cpu.Regs[_cpu.Iyh] = (ushort)(value & 0xFF00);
break; break;
case "L": case "L":
_cpu.Regs[_cpu.L] = (ushort)value; _cpu.Regs[_cpu.L] = (ushort)value;
break; break;
case "PC": case "PC":
_cpu.Regs[_cpu.PCl] = (ushort)(value & 0xFF); _cpu.Regs[_cpu.PCl] = (ushort)(value & 0xFF);
_cpu.Regs[_cpu.PCh] = (ushort)(value & 0xFF00); _cpu.Regs[_cpu.PCh] = (ushort)(value & 0xFF00);
break; break;
case "R": case "R":
_cpu.Regs[_cpu.R] = (ushort)value; _cpu.Regs[_cpu.R] = (ushort)value;
break; break;
case "Shadow AF": case "Shadow AF":
_cpu.Regs[_cpu.F_s] = (ushort)(value & 0xFF); _cpu.Regs[_cpu.F_s] = (ushort)(value & 0xFF);
_cpu.Regs[_cpu.A_s] = (ushort)(value & 0xFF00); _cpu.Regs[_cpu.A_s] = (ushort)(value & 0xFF00);
break; break;
case "Shadow BC": case "Shadow BC":
_cpu.Regs[_cpu.C_s] = (ushort)(value & 0xFF); _cpu.Regs[_cpu.C_s] = (ushort)(value & 0xFF);
_cpu.Regs[_cpu.B_s] = (ushort)(value & 0xFF00); _cpu.Regs[_cpu.B_s] = (ushort)(value & 0xFF00);
break; break;
case "Shadow DE": case "Shadow DE":
_cpu.Regs[_cpu.E_s] = (ushort)(value & 0xFF); _cpu.Regs[_cpu.E_s] = (ushort)(value & 0xFF);
_cpu.Regs[_cpu.D_s] = (ushort)(value & 0xFF00); _cpu.Regs[_cpu.D_s] = (ushort)(value & 0xFF00);
break; break;
case "Shadow HL": case "Shadow HL":
_cpu.Regs[_cpu.L_s] = (ushort)(value & 0xFF); _cpu.Regs[_cpu.L_s] = (ushort)(value & 0xFF);
_cpu.Regs[_cpu.H_s] = (ushort)(value & 0xFF00); _cpu.Regs[_cpu.H_s] = (ushort)(value & 0xFF00);
break; break;
case "SP": case "SP":
_cpu.Regs[_cpu.SPl] = (ushort)(value & 0xFF); _cpu.Regs[_cpu.SPl] = (ushort)(value & 0xFF);
_cpu.Regs[_cpu.SPh] = (ushort)(value & 0xFF00); _cpu.Regs[_cpu.SPh] = (ushort)(value & 0xFF00);
break; break;
} }
} }
@ -145,6 +145,6 @@ namespace BizHawk.Emulation.Cores.Calculators
return false; return false;
} }
public int TotalExecutedCycles => _cpu.TotalExecutedCycles; public int TotalExecutedCycles => (int)_cpu.TotalExecutedCycles;
} }
} }

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@ -60,7 +60,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
/// </summary> /// </summary>
private long _frameStart; private long _frameStart;
private bool _tapeMode; private bool _tapeMode;
private int _tStatesPerFrame; private long _tStatesPerFrame;
private int _sampleRate; private int _sampleRate;
private int _samplesPerFrame; private int _samplesPerFrame;
private int _tStatesPerSample; private int _tStatesPerSample;
@ -78,7 +78,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
/// <summary> /// <summary>
/// The last T-State (cpu cycle) that the last pulse was received /// The last T-State (cpu cycle) that the last pulse was received
/// </summary> /// </summary>
public int LastPulseTState { get; set; } public long LastPulseTState { get; set; }
#region Construction & Initialisation #region Construction & Initialisation
@ -95,7 +95,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
_sampleRate = sampleRate; _sampleRate = sampleRate;
_tStatesPerFrame = tStatesPerFrame; _tStatesPerFrame = tStatesPerFrame;
_tStatesPerSample = 79; _tStatesPerSample = 79;
_samplesPerFrame = _tStatesPerFrame / _tStatesPerSample; _samplesPerFrame = (int)_tStatesPerFrame / _tStatesPerSample;
/* /*

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@ -21,6 +21,6 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
/// <summary> /// <summary>
/// Pulse length in Z80 T-States (cycles) /// Pulse length in Z80 T-States (cycles)
/// </summary> /// </summary>
public int Length { get; set; } public long Length { get; set; }
} }
} }

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@ -91,17 +91,17 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
/// <summary> /// <summary>
/// The current cycle (T-State) that we are at in the frame /// The current cycle (T-State) that we are at in the frame
/// </summary> /// </summary>
public int _frameCycles; public long _frameCycles;
/// <summary> /// <summary>
/// Stores where we are in the frame after each CPU cycle /// Stores where we are in the frame after each CPU cycle
/// </summary> /// </summary>
public int LastFrameStartCPUTick; public long LastFrameStartCPUTick;
/// <summary> /// <summary>
/// Gets the current frame cycle according to the CPU tick count /// Gets the current frame cycle according to the CPU tick count
/// </summary> /// </summary>
public virtual int CurrentFrameCycle => CPU.TotalExecutedCycles - LastFrameStartCPUTick; public virtual long CurrentFrameCycle => CPU.TotalExecutedCycles - LastFrameStartCPUTick;
/// <summary> /// <summary>
/// Non-Deterministic bools /// Non-Deterministic bools

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@ -105,11 +105,11 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
/// <summary> /// <summary>
/// Cycle at which the last render update took place /// Cycle at which the last render update took place
/// </summary> /// </summary>
protected int lastTState; protected long lastTState;
/// <summary> /// <summary>
/// T-States elapsed since last render update /// T-States elapsed since last render update
/// </summary> /// </summary>
protected int elapsedTStates; protected long elapsedTStates;
/// <summary> /// <summary>
/// T-State of top left raster pixel /// T-State of top left raster pixel
/// </summary> /// </summary>
@ -279,7 +279,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
/// Generates an interrupt in the current phase if needed /// Generates an interrupt in the current phase if needed
/// </summary> /// </summary>
/// <param name="currentCycle"></param> /// <param name="currentCycle"></param>
public virtual void CheckForInterrupt(int currentCycle) public virtual void CheckForInterrupt(long currentCycle)
{ {
if (InterruptRevoked) if (InterruptRevoked)
{ {
@ -430,7 +430,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
/// Updates the screen buffer based on the number of T-States supplied /// Updates the screen buffer based on the number of T-States supplied
/// </summary> /// </summary>
/// <param name="_tstates"></param> /// <param name="_tstates"></param>
public virtual void UpdateScreenBuffer(int _tstates) public virtual void UpdateScreenBuffer(long _tstates)
{ {
if (_tstates < actualULAStart) if (_tstates < actualULAStart)
{ {
@ -448,7 +448,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
//It takes 4 tstates to write 1 byte. Or, 2 pixels per t-state. //It takes 4 tstates to write 1 byte. Or, 2 pixels per t-state.
int numBytes = (elapsedTStates >> 2) + ((elapsedTStates % 4) > 0 ? 1 : 0); long numBytes = (elapsedTStates >> 2) + ((elapsedTStates % 4) > 0 ? 1 : 0);
int pixelData; int pixelData;
int pixel2Data = 0xff; int pixel2Data = 0xff;

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@ -57,7 +57,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
{ {
// If this is an unused port the floating memory bus should be returned // If this is an unused port the floating memory bus should be returned
// Floating bus is read on the previous cycle // Floating bus is read on the previous cycle
int _tStates = CurrentFrameCycle - 1; long _tStates = CurrentFrameCycle - 1;
// if we are on the top or bottom border return 0xff // if we are on the top or bottom border return 0xff
if ((_tStates < ULADevice.contentionStartPeriod) || (_tStates > ULADevice.contentionEndPeriod)) if ((_tStates < ULADevice.contentionStartPeriod) || (_tStates > ULADevice.contentionEndPeriod))
@ -160,7 +160,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
// get a BitArray of the value byte // get a BitArray of the value byte
BitArray bits = new BitArray(new byte[] { value }); BitArray bits = new BitArray(new byte[] { value });
int currT = CPU.TotalExecutedCycles; long currT = CPU.TotalExecutedCycles;
AYDevice.WritePort(port, value); AYDevice.WritePort(port, value);

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@ -57,7 +57,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
{ {
// If this is an unused port the floating memory bus should be returned // If this is an unused port the floating memory bus should be returned
// Floating bus is read on the previous cycle // Floating bus is read on the previous cycle
int _tStates = CurrentFrameCycle - 1; long _tStates = CurrentFrameCycle - 1;
// if we are on the top or bottom border return 0xff // if we are on the top or bottom border return 0xff
if ((_tStates < ULADevice.contentionStartPeriod) || (_tStates > ULADevice.contentionEndPeriod)) if ((_tStates < ULADevice.contentionStartPeriod) || (_tStates > ULADevice.contentionEndPeriod))

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@ -57,7 +57,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
{ {
// If this is an unused port the floating memory bus should be returned // If this is an unused port the floating memory bus should be returned
// Floating bus is read on the previous cycle // Floating bus is read on the previous cycle
int _tStates = CurrentFrameCycle - 1; long _tStates = CurrentFrameCycle - 1;
// if we are on the top or bottom border return 0xff // if we are on the top or bottom border return 0xff
if ((_tStates < ULADevice.contentionStartPeriod) || (_tStates > ULADevice.contentionEndPeriod)) if ((_tStates < ULADevice.contentionStartPeriod) || (_tStates > ULADevice.contentionEndPeriod))

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@ -60,7 +60,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
// If this is an unused port the floating memory bus should be returned // If this is an unused port the floating memory bus should be returned
// Floating bus is read on the previous cycle // Floating bus is read on the previous cycle
int _tStates = CurrentFrameCycle - 1; long _tStates = CurrentFrameCycle - 1;
// if we are on the top or bottom border return 0xff // if we are on the top or bottom border return 0xff
if ((_tStates < ULADevice.contentionStartPeriod) || (_tStates > ULADevice.contentionEndPeriod)) if ((_tStates < ULADevice.contentionStartPeriod) || (_tStates > ULADevice.contentionEndPeriod))

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@ -142,6 +142,6 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
throw new NotImplementedException(); throw new NotImplementedException();
} }
public int TotalExecutedCycles => _cpu.TotalExecutedCycles; public int TotalExecutedCycles => (int)_cpu.TotalExecutedCycles;
} }
} }

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@ -142,6 +142,6 @@ namespace BizHawk.Emulation.Cores.ColecoVision
throw new NotImplementedException(); throw new NotImplementedException();
} }
public int TotalExecutedCycles => _cpu.TotalExecutedCycles; public int TotalExecutedCycles => (int)_cpu.TotalExecutedCycles;
} }
} }

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@ -144,7 +144,7 @@ namespace BizHawk.Emulation.Cores.Sega.MasterSystem
public int TotalExecutedCycles public int TotalExecutedCycles
{ {
get { return Cpu.TotalExecutedCycles; } get { return (int)Cpu.TotalExecutedCycles; }
} }
} }
} }

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@ -21,15 +21,15 @@ namespace BizHawk.Emulation.Cores.Components
const int SampleRate = 44100; const int SampleRate = 44100;
private static readonly byte[] LogScale = { 0, 10, 13, 16, 20, 26, 32, 40, 51, 64, 81, 102, 128, 161, 203, 255 }; private static readonly byte[] LogScale = { 0, 10, 13, 16, 20, 26, 32, 40, 51, 64, 81, 102, 128, 161, 203, 255 };
public void Mix(short[] samples, int start, int len, int maxVolume) public void Mix(short[] samples, long start, long len, int maxVolume)
{ {
if (Volume == 0) return; if (Volume == 0) return;
float adjustedWaveLengthInSamples = SampleRate / (Noise ? (Frequency / (float)Wave.Length) : Frequency); float adjustedWaveLengthInSamples = SampleRate / (Noise ? (Frequency / (float)Wave.Length) : Frequency);
float moveThroughWaveRate = Wave.Length / adjustedWaveLengthInSamples; float moveThroughWaveRate = Wave.Length / adjustedWaveLengthInSamples;
int end = start + len; long end = start + len;
for (int i = start; i < end; ) for (long i = start; i < end; )
{ {
short value = Wave[(int)WaveOffset]; short value = Wave[(int)WaveOffset];
@ -46,7 +46,7 @@ namespace BizHawk.Emulation.Cores.Components
public byte PsgLatch; public byte PsgLatch;
private readonly Queue<QueuedCommand> commands = new Queue<QueuedCommand>(256); private readonly Queue<QueuedCommand> commands = new Queue<QueuedCommand>(256);
int frameStartTime, frameStopTime; long frameStartTime, frameStopTime;
const int PsgBase = 111861; const int PsgBase = 111861;
@ -84,7 +84,7 @@ namespace BizHawk.Emulation.Cores.Components
} }
} }
public void BeginFrame(int cycles) public void BeginFrame(long cycles)
{ {
while (commands.Count > 0) while (commands.Count > 0)
{ {
@ -94,12 +94,12 @@ namespace BizHawk.Emulation.Cores.Components
frameStartTime = cycles; frameStartTime = cycles;
} }
public void EndFrame(int cycles) public void EndFrame(long cycles)
{ {
frameStopTime = cycles; frameStopTime = cycles;
} }
public void WritePsgData(byte value, int cycles) public void WritePsgData(byte value, long cycles)
{ {
commands.Enqueue(new QueuedCommand { Value = value, Time = cycles - frameStartTime }); commands.Enqueue(new QueuedCommand { Value = value, Time = cycles - frameStartTime });
} }
@ -227,15 +227,15 @@ namespace BizHawk.Emulation.Cores.Components
public void DiscardSamples() { commands.Clear(); } public void DiscardSamples() { commands.Clear(); }
public void GetSamples(short[] samples) public void GetSamples(short[] samples)
{ {
int elapsedCycles = frameStopTime - frameStartTime; long elapsedCycles = frameStopTime - frameStartTime;
if (elapsedCycles == 0) if (elapsedCycles == 0)
elapsedCycles = 1; // hey it's better than diving by zero elapsedCycles = 1; // hey it's better than diving by zero
int start = 0; long start = 0;
while (commands.Count > 0) while (commands.Count > 0)
{ {
var cmd = commands.Dequeue(); var cmd = commands.Dequeue();
int pos = ((cmd.Time * samples.Length) / elapsedCycles) & ~1; long pos = ((cmd.Time * samples.Length) / elapsedCycles) & ~1;
GetSamplesImmediate(samples, start, pos - start); GetSamplesImmediate(samples, start, pos - start);
start = pos; start = pos;
WritePsgDataImmediate(cmd.Value); WritePsgDataImmediate(cmd.Value);
@ -243,16 +243,16 @@ namespace BizHawk.Emulation.Cores.Components
GetSamplesImmediate(samples, start, samples.Length - start); GetSamplesImmediate(samples, start, samples.Length - start);
} }
public void GetSamplesImmediate(short[] samples, int start, int len) public void GetSamplesImmediate(short[] samples, long start, long len)
{ {
for (int i = 0; i < 4; i++) for (long i = 0; i < 4; i++)
Channels[i].Mix(samples, start, len, MaxVolume); Channels[i].Mix(samples, start, len, MaxVolume);
} }
class QueuedCommand class QueuedCommand
{ {
public byte Value; public byte Value;
public int Time; public long Time;
} }
} }
} }