From 7d34bdbeb0c1b38d3ee8e7e8f7e609fac1da3fdd Mon Sep 17 00:00:00 2001 From: alyosha-tas Date: Sun, 19 Jan 2020 18:39:56 -0500 Subject: [PATCH] MSXHawk: cpu work --- libHawk/MSXHawk/MSXHawk/Memory.h | 12 +- libHawk/MSXHawk/MSXHawk/Z80A.cpp | 5 +- libHawk/MSXHawk/MSXHawk/Z80A.h | 3591 ++++++++++++++++-------------- 3 files changed, 1903 insertions(+), 1705 deletions(-) diff --git a/libHawk/MSXHawk/MSXHawk/Memory.h b/libHawk/MSXHawk/MSXHawk/Memory.h index 5bd394b5bd..4e772d8bf1 100644 --- a/libHawk/MSXHawk/MSXHawk/Memory.h +++ b/libHawk/MSXHawk/MSXHawk/Memory.h @@ -15,10 +15,10 @@ namespace MSXHawk { public: - VDP* vdp_pntr; - SN76489sms* psg_pntr; - Z80A* cpu_pntr; - uint8_t* rom; + VDP* vdp_pntr = nullptr; + SN76489sms* psg_pntr = nullptr; + Z80A* cpu_pntr = nullptr; + uint8_t* rom = nullptr; // initialized by core loading, not savestated uint32_t rom_size; @@ -39,8 +39,8 @@ namespace MSXHawk uint8_t Port3F = 0xFF; uint8_t PortDE = 0x00; uint8_t reg_FFFC, reg_FFFD, reg_FFFE, reg_FFFF; - uint8_t ram[0x2000]; - uint8_t cart_ram[0x8000]; + uint8_t ram[0x2000] = {}; + uint8_t cart_ram[0x8000] = {}; MemoryManager() { diff --git a/libHawk/MSXHawk/MSXHawk/Z80A.cpp b/libHawk/MSXHawk/MSXHawk/Z80A.cpp index 686747e2bc..2b4924bdd3 100644 --- a/libHawk/MSXHawk/MSXHawk/Z80A.cpp +++ b/libHawk/MSXHawk/MSXHawk/Z80A.cpp @@ -11,7 +11,10 @@ namespace MSXHawk { void Z80A::Memory_Write(uint32_t addr, uint8_t value) { - mem_ctrl->MemoryWrite(addr, value); + if ((addr & 0xFFFF) >= 0xFFFC) + { + mem_ctrl->MemoryWrite(addr, value); + } } void Z80A::HW_Write(uint32_t addr, uint8_t value) diff --git a/libHawk/MSXHawk/MSXHawk/Z80A.h b/libHawk/MSXHawk/MSXHawk/Z80A.h index 10bcc7c72f..f07fbb7883 100644 --- a/libHawk/MSXHawk/MSXHawk/Z80A.h +++ b/libHawk/MSXHawk/MSXHawk/Z80A.h @@ -50,6 +50,7 @@ namespace MSXHawk bool IFF2; bool nonMaskableInterrupt; bool nonMaskableInterruptPending; + bool jp_cond_chk; uint8_t opcode; uint8_t temp_R; @@ -66,19 +67,58 @@ namespace MSXHawk uint32_t mem_pntr = 0; uint32_t irq_pntr = 0; uint32_t IRQS; - uint32_t cur_instr[38] = {}; // fixed size - do not change at runtime - uint32_t BUSRQ[19] = {}; // fixed size - do not change at runtime - uint32_t MEMRQ[19] = {}; // fixed size - do not change at runtime + + // since absolute pointer locations are not saved, we need to know where current pointer is looking in order to load it + // this combined with opcode and instr_pntr gives the current cpu execution location + uint8_t instr_bank; + + uint32_t* cur_instr_ofst = nullptr; + uint32_t* cur_bus_ofst = nullptr; + uint32_t* cur_mem_ofst = nullptr; + uint32_t* cur_irqs_ofst = nullptr; uint64_t TotalExecutedCycles; // non-state variables + // EXCEPTION!: Ztemp2 must be stated to restore the instruction vector + bool checker; uint32_t Ztemp1, Ztemp2, Ztemp3, Ztemp4; uint32_t Reg16_d, Reg16_s, ans, temp, carry, dest_t, src_t; + uint32_t cur_instr[38] = {}; // only used for building + uint32_t BUSRQ[19] = {}; // only used for building + uint32_t MEMRQ[19] = {}; // only used for building // built on initialization bool TableParity [256] = {}; + uint32_t NoIndexIRQS[256] = {}; + uint32_t CBIndexIRQS[256] = {}; + uint32_t EXTIndexIRQS[256] = {}; + uint32_t IXIndexIRQS[256] = {}; + uint32_t IYIndexIRQS[256] = {}; + uint32_t IXYCBIndexIRQS[256] = {}; + + uint32_t NoIndex[256 * 38] = {}; + uint32_t CBIndex[256 * 38] = {}; + uint32_t EXTIndex[256 * 38] = {}; + uint32_t IXIndex[256 * 38] = {}; + uint32_t IYIndex[256 * 38] = {}; + uint32_t IXYCBIndex[256 * 38] = {}; + + uint32_t NoIndexBUSRQ[256 * 19] = {}; + uint32_t CBIndexBUSRQ[256 * 19] = {}; + uint32_t EXTIndexBUSRQ[256 * 19] = {}; + uint32_t IXIndexBUSRQ[256 * 19] = {}; + uint32_t IYIndexBUSRQ[256 * 19] = {}; + uint32_t IXYCBIndexBUSRQ[256 * 19] = {}; + + uint32_t NoIndexMEMRQ[256 * 19] = {}; + uint32_t CBIndexMEMRQ[256 * 19] = {}; + uint32_t EXTIndexMEMRQ[256 * 19] = {}; + uint32_t IXIndexMEMRQ[256 * 19] = {}; + uint32_t IYIndexMEMRQ[256 * 19] = {}; + uint32_t IXYCBIndexMEMRQ[256 * 19] = {}; + #pragma endregion #pragma region Constant Declarations @@ -91,6 +131,19 @@ namespace MSXHawk const static uint32_t IYCBpre = 5; const static uint32_t IXYprefetch = 6; + // test conditions + const static uint32_t ALWAYS_T = 0; + const static uint32_t ALWAYS_F = 1; + const static uint32_t FLAG_Z = 2; + const static uint32_t FLAG_NZ = 3; + const static uint32_t FLAG_C = 4; + const static uint32_t FLAG_NC = 5; + const static uint32_t FLAG_P = 6; + const static uint32_t FLAG_NP = 7; + const static uint32_t FLAG_S = 8; + const static uint32_t FLAG_NS = 9; + const static uint32_t B_ZERO = 10; + // operations that can take place in an instruction const static uint32_t IDLE = 0; const static uint32_t OP = 1; @@ -168,6 +221,12 @@ namespace MSXHawk const static uint32_t WR_INC_WA = 73; // A -> W after WR_INC const static uint32_t RD_OP = 74; const static uint32_t IORQ = 75; + const static uint32_t PREFT_ASGN = 76; + const static uint32_t PREX_ASGN = 77; + const static uint32_t JP_COND_TR = 78; + const static uint32_t ASGN_B = 79; + const static uint32_t COND_CHK = 80; + // registers const static uint32_t PCl = 0; @@ -218,6 +277,70 @@ namespace MSXHawk const static uint32_t WIO2 = 106; const static uint32_t WIO3 = 107; const static uint32_t WIO4 = 108; + + // Special vectors + uint32_t False_IRQS[5] = + { + 5, // DJNZ + 4, // JR Cond + 7, // JP COND + 2, // RET COND + 7 // CALL + }; + + // reset + uint32_t Reset_CPU[7] = { IDLE, + DEC16, F, A, + DEC16, SPl, SPh }; + + uint32_t Reset_BUSRQ[3] = { 0, 0, 0 }; + uint32_t Reset_MEMRQ[3] = { 0, 0, 0 }; + uint32_t Reset_IRQS = 3; + + // ld_op_r + uint32_t LD_OP_R_INST[17] = { DEC16, PCl, PCh, + DEC16, PCl, PCh, + TR16, Z, W, PCl, PCh, + INC16, Z, W, + Ztemp2, E, D }; + + uint32_t LD_OP_R_BUSRQ[5] = { D, D, D, D, D }; + uint32_t LD_OP_R_MEMRQ[5] = { 0, 0, 0, 0, 0 }; + uint32_t LD_OP_R_IRQS = 5; + + // ld_cp_r + uint32_t LD_CP_R_INST[17] = { DEC16, PCl, PCh, + DEC16, PCl, PCh, + TR16, Z, W, PCl, PCh, + INC16, Z, W, + Ztemp2, L, H }; + + uint32_t LD_CP_R_BUSRQ[5] = { H, H, H, H, H }; + uint32_t LD_CP_R_MEMRQ[5] = { 0, 0, 0, 0, 0 }; + uint32_t LD_CP_R_IRQS = 5; + + // rep_op_i + uint32_t REP_OP_I_INST[11] = { IDLE, + IDLE, + DEC16, PCl, PCh, + DEC16, PCl, PCh, + Ztemp2, L, H }; + + uint32_t REP_OP_I_BUSRQ[5] = { H, H, H, H, H }; + uint32_t REP_OP_I_MEMRQ[5] = { 0, 0, 0, 0, 0 }; + uint32_t REP_OP_I_IRQS = 5; + + // rep_op_o + uint32_t REP_OP_O_INST[11] = { IDLE, + IDLE, + DEC16, PCl, PCh, + DEC16, PCl, PCh, + IDLE }; + + uint32_t REP_OP_O_BUSRQ[5] = { B, B, B, B, B }; + uint32_t REP_OP_O_MEMRQ[5] = { 0, 0, 0, 0, 0 }; + uint32_t REP_OP_O_IRQS = 5; + #pragma endregion #pragma region Z80 functions @@ -226,6 +349,7 @@ namespace MSXHawk { Reset(); InitTableParity(); + BuildInstructionTables(); } inline bool FlagCget() { return (Regs[5] & 0x01) != 0; }; @@ -275,9 +399,12 @@ namespace MSXHawk ResetInterrupts(); TotalExecutedCycles = 0; - PopulateCURINSTR(IDLE, - DEC16, F, A, - DEC16, SPl, SPh); + cur_instr_ofst = &Reset_CPU[0]; + cur_bus_ofst = &Reset_BUSRQ[0]; + cur_mem_ofst = &Reset_MEMRQ[0]; + cur_irqs_ofst = &Reset_IRQS; + + instr_bank = 6; PopulateBUSRQ(0, 0, 0); PopulateMEMRQ(0, 0, 0); @@ -286,11 +413,88 @@ namespace MSXHawk NO_prefix = true; } + void FetchInstruction() + { + if (NO_prefix) + { + cur_instr_ofst = &NoIndex[opcode * 38]; + cur_bus_ofst = &NoIndexBUSRQ[opcode * 19]; + cur_mem_ofst = &NoIndexMEMRQ[opcode * 19]; + cur_irqs_ofst = &NoIndexIRQS[opcode]; + + instr_bank = 0; + } + else if (CB_prefix) + { + CB_prefix = false; + NO_prefix = true; + + cur_instr_ofst = &CBIndex[opcode * 38]; + cur_bus_ofst = &CBIndexBUSRQ[opcode * 19]; + cur_mem_ofst = &CBIndexMEMRQ[opcode * 19]; + cur_irqs_ofst = &CBIndexIRQS[opcode]; + + instr_bank = 1; + } + else if (EXTD_prefix) + { + EXTD_prefix = false; + NO_prefix = true; + + cur_instr_ofst = &EXTIndex[opcode * 38]; + cur_bus_ofst = &EXTIndexBUSRQ[opcode * 19]; + cur_mem_ofst = &EXTIndexMEMRQ[opcode * 19]; + cur_irqs_ofst = &EXTIndexIRQS[opcode]; + + instr_bank = 2; + } + else if (IX_prefix) + { + IX_prefix = false; + NO_prefix = true; + + cur_instr_ofst = &IXIndex[opcode * 38]; + cur_bus_ofst = &IXIndexBUSRQ[opcode * 19]; + cur_mem_ofst = &IXIndexMEMRQ[opcode * 19]; + cur_irqs_ofst = &IXIndexIRQS[opcode]; + + instr_bank = 3; + } + else if (IY_prefix) + { + IY_prefix = false; + NO_prefix = true; + + cur_instr_ofst = &IYIndex[opcode * 38]; + cur_bus_ofst = &IYIndexBUSRQ[opcode * 19]; + cur_mem_ofst = &IYIndexMEMRQ[opcode * 19]; + cur_irqs_ofst = &IYIndexIRQS[opcode]; + + instr_bank = 4; + } + else if (IXCB_prefix || IYCB_prefix) + { + // the first byte fetched is the prefetch value to use with the instruction + // we pick Ix or Iy here, the indexed value is stored in WZ + // In this way, we don't need to pass them as an argument to the I_Funcs. + IXCB_prefix = false; + IYCB_prefix = false; + NO_prefix = true; + + cur_instr_ofst = &IXYCBIndex[opcode * 38]; + cur_bus_ofst = &IXYCBIndexBUSRQ[opcode * 19]; + cur_mem_ofst = &IXYCBIndexMEMRQ[opcode * 19]; + cur_irqs_ofst = &IXYCBIndexIRQS[opcode]; + + instr_bank = 5; + } + } + // Execute instructions void ExecuteOne() { bus_pntr++; mem_pntr++; - switch (cur_instr[instr_pntr++]) + switch (cur_instr_ofst[instr_pntr++]) { case IDLE: // do nothing @@ -331,204 +535,204 @@ namespace MSXHawk Regs[R] = ((Regs[R] & 0x80) | temp_R); break; case RD: - Read_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + Read_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); instr_pntr += 3; break; case WR: - Write_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + Write_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); instr_pntr += 3; break; case RD_INC: - Read_INC_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + Read_INC_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); instr_pntr += 3; break; case RD_INC_TR_PC: - Read_INC_TR_PC_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2], cur_instr[instr_pntr + 3]); + Read_INC_TR_PC_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2], cur_instr_ofst[instr_pntr + 3]); instr_pntr += 4; break; case RD_OP: - if (cur_instr[instr_pntr++] == 1) { Read_INC_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); } - else { Read_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); } + if (cur_instr_ofst[instr_pntr++] == 1) { Read_INC_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); } + else { Read_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); } instr_pntr += 3; - switch (cur_instr[instr_pntr]) + switch (cur_instr_ofst[instr_pntr]) { case ADD8: - ADD8_Func(cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + ADD8_Func(cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); break; case ADC8: - ADC8_Func(cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + ADC8_Func(cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); break; case SUB8: - SUB8_Func(cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + SUB8_Func(cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); break; case SBC8: - SBC8_Func(cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + SBC8_Func(cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); break; case AND8: - AND8_Func(cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + AND8_Func(cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); break; case XOR8: - XOR8_Func(cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + XOR8_Func(cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); break; case OR8: - OR8_Func(cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + OR8_Func(cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); break; case CP8: - CP8_Func(cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + CP8_Func(cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); break; case TR: - TR_Func(cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + TR_Func(cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); break; } instr_pntr += 3; break; case WR_INC: - Write_INC_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + Write_INC_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); instr_pntr += 3; break; case WR_DEC: - Write_DEC_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + Write_DEC_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); instr_pntr += 3; break; case WR_TR_PC: - Write_TR_PC_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + Write_TR_PC_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); instr_pntr += 3; break; case WR_INC_WA: - Write_INC_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + Write_INC_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); instr_pntr += 3; Regs[W] = Regs[A]; break; case TR: - TR_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1]); + TR_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1]); instr_pntr += 2; break; case TR16: - TR16_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2], cur_instr[instr_pntr + 3]); + TR16_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2], cur_instr_ofst[instr_pntr + 3]); instr_pntr += 4; break; case ADD16: - ADD16_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2], cur_instr[instr_pntr + 3]); + ADD16_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2], cur_instr_ofst[instr_pntr + 3]); instr_pntr += 4; break; case ADD8: - ADD8_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1]); + ADD8_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1]); instr_pntr += 2; break; case SUB8: - SUB8_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1]); + SUB8_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1]); instr_pntr += 2; break; case ADC8: - ADC8_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1]); + ADC8_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1]); instr_pntr += 2; break; case ADC16: - ADC_16_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2], cur_instr[instr_pntr + 3]); + ADC_16_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2], cur_instr_ofst[instr_pntr + 3]); instr_pntr += 4; break; case SBC8: - SBC8_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1]); + SBC8_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1]); instr_pntr += 2; break; case SBC16: - SBC_16_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2], cur_instr[instr_pntr + 3]); + SBC_16_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2], cur_instr_ofst[instr_pntr + 3]); instr_pntr += 4; break; case INC16: - INC16_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1]); + INC16_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1]); instr_pntr += 2; break; case INC8: - INC8_Func(cur_instr[instr_pntr]); + INC8_Func(cur_instr_ofst[instr_pntr]); instr_pntr += 1; break; case DEC16: - DEC16_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1]); + DEC16_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1]); instr_pntr += 2; break; case DEC8: - DEC8_Func(cur_instr[instr_pntr]); + DEC8_Func(cur_instr_ofst[instr_pntr]); instr_pntr += 1; break; case RLC: - RLC_Func(cur_instr[instr_pntr]); + RLC_Func(cur_instr_ofst[instr_pntr]); instr_pntr += 1; break; case RL: - RL_Func(cur_instr[instr_pntr]); + RL_Func(cur_instr_ofst[instr_pntr]); instr_pntr += 1; break; case RRC: - RRC_Func(cur_instr[instr_pntr]); + RRC_Func(cur_instr_ofst[instr_pntr]); instr_pntr += 1; break; case RR: - RR_Func(cur_instr[instr_pntr]); + RR_Func(cur_instr_ofst[instr_pntr]); instr_pntr += 1; break; case CPL: - CPL_Func(cur_instr[instr_pntr]); + CPL_Func(cur_instr_ofst[instr_pntr]); instr_pntr += 1; break; case DA: - DA_Func(cur_instr[instr_pntr]); + DA_Func(cur_instr_ofst[instr_pntr]); instr_pntr += 1; break; case SCF: - SCF_Func(cur_instr[instr_pntr]); + SCF_Func(cur_instr_ofst[instr_pntr]); instr_pntr += 1; break; case CCF: - CCF_Func(cur_instr[instr_pntr]); + CCF_Func(cur_instr_ofst[instr_pntr]); instr_pntr += 1; break; case AND8: - AND8_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1]); + AND8_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1]); instr_pntr += 2; break; case XOR8: - XOR8_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1]); + XOR8_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1]); instr_pntr += 2; break; case OR8: - OR8_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1]); + OR8_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1]); instr_pntr += 2; break; case CP8: - CP8_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1]); + CP8_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1]); instr_pntr += 2; break; case SLA: - SLA_Func(cur_instr[instr_pntr]); + SLA_Func(cur_instr_ofst[instr_pntr]); instr_pntr += 1; break; case SRA: - SRA_Func(cur_instr[instr_pntr]); + SRA_Func(cur_instr_ofst[instr_pntr]); instr_pntr += 1; break; case SRL: - SRL_Func(cur_instr[instr_pntr]); + SRL_Func(cur_instr_ofst[instr_pntr]); instr_pntr += 1; break; case SLL: - SLL_Func(cur_instr[instr_pntr]); + SLL_Func(cur_instr_ofst[instr_pntr]); instr_pntr += 1; break; case BIT: - BIT_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1]); + BIT_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1]); instr_pntr += 2; break; case I_BIT: - I_BIT_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1]); + I_BIT_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1]); instr_pntr += 2; break; case RES: - RES_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1]); + RES_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1]); instr_pntr += 2; break; case SET: - SET_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1]); + SET_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1]); instr_pntr += 2; break; case EI: @@ -546,7 +750,7 @@ namespace MSXHawk EXCH_16_Func(L_s, H_s, L, H); break; case EXCH_16: - EXCH_16_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2], cur_instr[instr_pntr + 3]); + EXCH_16_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2], cur_instr_ofst[instr_pntr + 3]); instr_pntr += 4; break; case PREFIX: @@ -577,17 +781,13 @@ namespace MSXHawk FetchInstruction(); instr_pntr = bus_pntr = mem_pntr = irq_pntr = 0; I_skip = true; - - // for prefetched case, the PC stays on the BUS one cycle longer - if ((src_t == IXCBpre) || (src_t == IYCBpre)) { BUSRQ[0] = PCh; } - break; case ASGN: - ASGN_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1]); + ASGN_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1]); instr_pntr += 2; break; case ADDS: - ADDS_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2], cur_instr[instr_pntr + 3]); + ADDS_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2], cur_instr_ofst[instr_pntr + 3]); instr_pntr += 4; break; case EI_RETI: @@ -599,60 +799,58 @@ namespace MSXHawk IFF1 = IFF2; break; case OUT: - OUT_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + OUT_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); instr_pntr += 3; break; case OUT_INC: - OUT_INC_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + OUT_INC_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); instr_pntr += 3; break; case IN: - IN_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + IN_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); instr_pntr += 3; break; case IN_INC: - IN_INC_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + IN_INC_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); instr_pntr += 3; break; case IN_A_N_INC: - IN_A_N_INC_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + IN_A_N_INC_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); instr_pntr += 3; break; case NEG: - NEG_8_Func(cur_instr[instr_pntr]); + NEG_8_Func(cur_instr_ofst[instr_pntr]); instr_pntr += 1; break; case INT_MODE: - interruptMode = cur_instr[instr_pntr]; + interruptMode = cur_instr_ofst[instr_pntr]; instr_pntr += 1; break; case RRD: - RRD_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1]); + RRD_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1]); instr_pntr += 2; break; case RLD: - RLD_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1]); + RLD_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1]); instr_pntr += 2; break; case SET_FL_LD_R: DEC16_Func(C, B); SET_FL_LD_Func(); - Ztemp1 = cur_instr[instr_pntr++]; - Ztemp2 = cur_instr[instr_pntr++]; - Ztemp3 = cur_instr[instr_pntr++]; + Ztemp1 = cur_instr_ofst[instr_pntr++]; + Ztemp2 = cur_instr_ofst[instr_pntr++]; + Ztemp3 = cur_instr_ofst[instr_pntr++]; if (((Regs[C] | (Regs[B] << 8)) != 0) && (Ztemp3 > 0)) { - PopulateCURINSTR(DEC16, PCl, PCh, - DEC16, PCl, PCh, - TR16, Z, W, PCl, PCh, - INC16, Z, W, - Ztemp2, E, D); + cur_instr_ofst = &LD_OP_R_INST[0]; + cur_instr_ofst[14] = Ztemp2; + cur_bus_ofst = &LD_OP_R_BUSRQ[0]; + cur_mem_ofst = &LD_OP_R_MEMRQ[0]; + cur_irqs_ofst = &LD_OP_R_IRQS; - PopulateBUSRQ(D, D, D, D, D); - PopulateMEMRQ(0, 0, 0, 0, 0); - IRQS = 5; + instr_bank = 7; instr_pntr = mem_pntr = bus_pntr = irq_pntr = 0; I_skip = true; @@ -666,22 +864,19 @@ namespace MSXHawk case SET_FL_CP_R: SET_FL_CP_Func(); - Ztemp1 = cur_instr[instr_pntr++]; - Ztemp2 = cur_instr[instr_pntr++]; - Ztemp3 = cur_instr[instr_pntr++]; + Ztemp1 = cur_instr_ofst[instr_pntr++]; + Ztemp2 = cur_instr_ofst[instr_pntr++]; + Ztemp3 = cur_instr_ofst[instr_pntr++]; if (((Regs[C] | (Regs[B] << 8)) != 0) && (Ztemp3 > 0) && !FlagZget()) { + cur_instr_ofst = &LD_CP_R_INST[0]; + cur_instr_ofst[14] = Ztemp2; + cur_bus_ofst = &LD_CP_R_BUSRQ[0]; + cur_mem_ofst = &LD_CP_R_MEMRQ[0]; + cur_irqs_ofst = &LD_CP_R_IRQS; - PopulateCURINSTR(DEC16, PCl, PCh, - DEC16, PCl, PCh, - TR16, Z, W, PCl, PCh, - INC16, Z, W, - Ztemp2, L, H); - - PopulateBUSRQ(H, H, H, H, H); - PopulateMEMRQ(0, 0, 0, 0, 0); - IRQS = 5; + instr_bank = 8; instr_pntr = mem_pntr = bus_pntr = irq_pntr = 0; I_skip = true; @@ -693,8 +888,8 @@ namespace MSXHawk } break; case SET_FL_IR: - dest_t = cur_instr[instr_pntr++]; - TR_Func(dest_t, cur_instr[instr_pntr++]); + dest_t = cur_instr_ofst[instr_pntr++]; + TR_Func(dest_t, cur_instr_ofst[instr_pntr++]); SET_FL_IR_Func(dest_t); break; case FTCH_DB: @@ -708,14 +903,14 @@ namespace MSXHawk } break; case RST: - Regs[Z] = cur_instr[instr_pntr++]; + Regs[Z] = cur_instr_ofst[instr_pntr++]; Regs[W] = 0; break; case REP_OP_I: - Write_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + Write_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); instr_pntr += 3; - Ztemp4 = cur_instr[instr_pntr++]; + Ztemp4 = cur_instr_ofst[instr_pntr++]; if (Ztemp4 == DEC16) { TR16_Func(Z, W, C, B); @@ -743,21 +938,19 @@ namespace MSXHawk FlagPset(TableParity[((Regs[ALU] + Regs[C] + 1) & 7) ^ Regs[B]]); } - Ztemp1 = cur_instr[instr_pntr++]; - Ztemp2 = cur_instr[instr_pntr++]; - Ztemp3 = cur_instr[instr_pntr++]; + Ztemp1 = cur_instr_ofst[instr_pntr++]; + Ztemp2 = cur_instr_ofst[instr_pntr++]; + Ztemp3 = cur_instr_ofst[instr_pntr++]; if ((Regs[B] != 0) && (Ztemp3 > 0)) { - PopulateCURINSTR(IDLE, - IDLE, - DEC16, PCl, PCh, - DEC16, PCl, PCh, - Ztemp2, L, H); + cur_instr_ofst = &REP_OP_I_INST[0]; + cur_instr_ofst[8] = Ztemp2; + cur_bus_ofst = &REP_OP_I_BUSRQ[0]; + cur_mem_ofst = &REP_OP_I_MEMRQ[0]; + cur_irqs_ofst = &REP_OP_I_IRQS; - PopulateBUSRQ(H, H, H, H, H); - PopulateMEMRQ(0, 0, 0, 0, 0); - IRQS = 5; + instr_bank = 9; instr_pntr = mem_pntr = bus_pntr = irq_pntr = 0; I_skip = true; @@ -769,10 +962,10 @@ namespace MSXHawk } break; case REP_OP_O: - OUT_Func(cur_instr[instr_pntr], cur_instr[instr_pntr + 1], cur_instr[instr_pntr + 2]); + OUT_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2]); instr_pntr += 3; - Ztemp4 = cur_instr[instr_pntr++]; + Ztemp4 = cur_instr_ofst[instr_pntr++]; if (Ztemp4 == DEC16) { DEC16_Func(L, H); @@ -795,38 +988,133 @@ namespace MSXHawk FlagCset((Regs[ALU] + Regs[L]) > 0xFF); FlagPset(TableParity[((Regs[ALU] + Regs[L]) & 7) ^ (Regs[B])]); - Ztemp1 = cur_instr[instr_pntr++]; - Ztemp2 = cur_instr[instr_pntr++]; - Ztemp3 = cur_instr[instr_pntr++]; + Ztemp1 = cur_instr_ofst[instr_pntr++]; + Ztemp2 = cur_instr_ofst[instr_pntr++]; + Ztemp3 = cur_instr_ofst[instr_pntr++]; if ((Regs[B] != 0) && (Ztemp3 > 0)) { - PopulateCURINSTR - (IDLE, - IDLE, - DEC16, PCl, PCh, - DEC16, PCl, PCh, - IDLE); + cur_instr_ofst = &REP_OP_O_INST[0]; + cur_bus_ofst = &REP_OP_O_BUSRQ[0]; + cur_mem_ofst = &REP_OP_O_MEMRQ[0]; + cur_irqs_ofst = &REP_OP_O_IRQS; - PopulateBUSRQ(B, B, B, B, B); - PopulateMEMRQ(0, 0, 0, 0, 0); - IRQS = 5; + instr_bank = 10; instr_pntr = mem_pntr = bus_pntr = irq_pntr = 0; I_skip = true; } break; - case IORQ: //IRQACKCallback(); break; + case PREFT_ASGN: + if (cur_instr_ofst[instr_pntr++] == IXCBpre) + { + Regs[W] = Regs[Ixh]; + Regs[Z] = Regs[Ixl]; + } + else + { + Regs[W] = Regs[Iyh]; + Regs[Z] = Regs[Iyl]; + }; + break; + case PREX_ASGN: + PRE_SRC = cur_instr_ofst[instr_pntr++]; + break; + case JP_COND_TR: + if (jp_cond_chk) + { + Read_INC_TR_PC_Func(cur_instr_ofst[instr_pntr], cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2], cur_instr_ofst[instr_pntr + 3]); + instr_pntr += 4; + } + else + { + // NOTE: Start at 1 since we skip the Z in the instruction vector + Read_INC_Func(cur_instr_ofst[instr_pntr + 1], cur_instr_ofst[instr_pntr + 2], cur_instr_ofst[instr_pntr + 3]); + instr_pntr += 3; + } + break; + case ASGN_B: + Regs[B] = (uint8_t)((Regs[B] - 1) & 0xFF); + break; + case COND_CHK: + checker = false; + switch (cur_instr_ofst[instr_pntr++]) + { + case ALWAYS_T: + checker = true; + break; + case ALWAYS_F: + checker = false; + break; + case FLAG_Z: + checker = FlagZget(); + break; + case FLAG_NZ: + checker = !FlagZget(); + break; + case FLAG_C: + checker = FlagCget(); + break; + case FLAG_NC: + checker = !FlagCget(); + break; + case FLAG_P: + checker = FlagPget(); + break; + case FLAG_NP: + checker = !FlagPget(); + break; + case FLAG_S: + checker = FlagSget(); + break; + case FLAG_NS: + checker = !FlagSget(); + break; + case B_ZERO: + checker = (Regs[B] - 1) != 0; + break; + } + + // true condition is what is representedin the instruction vectors + // for false condition, we need to advance the IRQS pointer dependent on which instruction is calling + if (checker) + { + instr_pntr++; + } + else + { + switch (cur_instr_ofst[instr_pntr++]) + { + case 0: // DJNZ + cur_irqs_ofst = &False_IRQS[0]; + break; + case 1: // JR COND + cur_irqs_ofst = &False_IRQS[1]; + break; + case 2: // JP COND + cur_irqs_ofst = &False_IRQS[2]; + break; + case 3: // RET COND + cur_irqs_ofst = &False_IRQS[3]; + break; + case 4: // CALL + cur_irqs_ofst = &False_IRQS[4]; + break; + } + } + + jp_cond_chk = checker; + break; } if (I_skip) { I_skip = false; } - else if (++irq_pntr == IRQS) + else if (++irq_pntr == cur_irqs_ofst[0]) { if (EI_pending > 0) { @@ -1375,7 +1663,7 @@ namespace MSXHawk WAIT, WR, Z, W, ALU); - PopulateBUSRQ(0, W, 0, 0, W, W, 0, 0); + PopulateBUSRQ(PCh, W, 0, 0, W, W, 0, 0); PopulateMEMRQ(0, W, 0, 0, 0, W, 0, 0); IRQS = 8; }; @@ -1391,7 +1679,7 @@ namespace MSXHawk WAIT, WR, Z, W, ALU); - PopulateBUSRQ(0, W, 0, 0, W, W, 0, 0); + PopulateBUSRQ(PCh, W, 0, 0, W, W, 0, 0); PopulateMEMRQ(0, W, 0, 0, 0, W, 0, 0); IRQS = 8; }; @@ -1404,7 +1692,7 @@ namespace MSXHawk RD, ALU, Z, W, I_BIT, bit, ALU); - PopulateBUSRQ(0, W, 0, 0, W); + PopulateBUSRQ(PCh, W, 0, 0, W); PopulateMEMRQ(0, W, 0, 0, 0); IRQS = 5; }; @@ -1692,35 +1980,20 @@ namespace MSXHawk // note: do not use DEC here since no flags are affected by this operation void DJNZ_() { - if ((Regs[B] - 1) != 0) - { - PopulateCURINSTR(IDLE, - IDLE, - ASGN, B, (uint32_t)((Regs[B] - 1) & 0xFF), - WAIT, - RD_INC, Z, PCl, PCh, - IDLE, - IDLE, - ASGN, W, 0, - ADDS, PCl, PCh, Z, W, - TR16, Z, W, PCl, PCh); + PopulateCURINSTR(COND_CHK, B_ZERO, 0, + IDLE, + ASGN_B, + WAIT, + RD_INC, ALU, PCl, PCh, + IDLE, + IDLE, + ASGN, W, 0, + ADDS, PCl, PCh, ALU, W, + TR16, Z, W, PCl, PCh); - PopulateBUSRQ(0, I, PCh, 0, 0, PCh, PCh, PCh, PCh, PCh); - PopulateMEMRQ(0, 0, PCh, 0, 0, 0, 0, 0, 0, 0); - IRQS = 10; - } - else - { - PopulateCURINSTR(IDLE, - IDLE, - ASGN, B, (uint32_t)((Regs[B] - 1) & 0xFF), - WAIT, - RD_INC, ALU, PCl, PCh); - - PopulateBUSRQ(0, I, PCh, 0, 0); - PopulateMEMRQ(0, 0, PCh, 0, 0); - IRQS = 5; - }; + PopulateBUSRQ(0, I, PCh, 0, 0, PCh, PCh, PCh, PCh, PCh); + PopulateMEMRQ(0, 0, PCh, 0, 0, 0, 0, 0, 0, 0); + IRQS = 10; }; void HALT_() @@ -1732,68 +2005,36 @@ namespace MSXHawk IRQS = 1; }; - void JR_COND(bool cond) + void JR_COND(uint32_t cond) { - if (cond) - { - PopulateCURINSTR(IDLE, - IDLE, - WAIT, - RD_INC, Z, PCl, PCh, - IDLE, - ASGN, W, 0, - IDLE, - ADDS, PCl, PCh, Z, W, - TR16, Z, W, PCl, PCh); + PopulateCURINSTR(COND_CHK, cond, 1, + IDLE, + WAIT, + RD_INC, ALU, PCl, PCh, + IDLE, + ASGN, W, 0, + IDLE, + ADDS, PCl, PCh, ALU, W, + TR16, Z, W, PCl, PCh); - PopulateBUSRQ(0, PCh, 0, 0, PCh, PCh, PCh, PCh, PCh); - PopulateMEMRQ(0, PCh, 0, 0, 0, 0, 0, 0, 0); - IRQS = 9; - } - else - { - PopulateCURINSTR - (IDLE, - IDLE, - WAIT, - RD_INC, ALU, PCl, PCh); - - PopulateBUSRQ(0, PCh, 0, 0); - PopulateMEMRQ(0, PCh, 0, 0); - IRQS = 4; - }; + PopulateBUSRQ(0, PCh, 0, 0, PCh, PCh, PCh, PCh, PCh); + PopulateMEMRQ(0, PCh, 0, 0, 0, 0, 0, 0, 0); + IRQS = 9; }; - void JP_COND(bool cond) + void JP_COND(uint32_t cond) { - if (cond) - { - PopulateCURINSTR(IDLE, - IDLE, - WAIT, - RD_INC, Z, PCl, PCh, - IDLE, - WAIT, - RD_INC_TR_PC, Z, W, PCl, PCh); + PopulateCURINSTR(COND_CHK, cond, 2, + IDLE, + WAIT, + RD_INC, Z, PCl, PCh, + IDLE, + WAIT, + JP_COND_TR, Z, W, PCl, PCh); - PopulateBUSRQ(0, PCh, 0, 0, PCh, 0, 0); - PopulateMEMRQ(0, PCh, 0, 0, PCh, 0, 0); - IRQS = 7; - } - else - { - PopulateCURINSTR(IDLE, - IDLE, - WAIT, - RD_INC, Z, PCl, PCh, - IDLE, - WAIT, - RD_INC, W, PCl, PCh); - - PopulateBUSRQ(0, PCh, 0, 0, PCh, 0, 0); - PopulateMEMRQ(0, PCh, 0, 0, PCh, 0, 0); - IRQS = 7; - }; + PopulateBUSRQ(0, PCh, 0, 0, PCh, 0, 0); + PopulateMEMRQ(0, PCh, 0, 0, PCh, 0, 0); + IRQS = 7; }; void RET_() @@ -1841,72 +2082,42 @@ namespace MSXHawk IRQS = 7; }; - - void RET_COND(bool cond) + void RET_COND(uint32_t cond) { - if (cond) - { - PopulateCURINSTR(IDLE, - IDLE, - IDLE, - WAIT, - RD_INC, Z, SPl, SPh, - IDLE, - WAIT, - RD_INC_TR_PC, Z, W, SPl, SPh); + PopulateCURINSTR(COND_CHK, cond, 3, + IDLE, + IDLE, + WAIT, + RD_INC, Z, SPl, SPh, + IDLE, + WAIT, + RD_INC_TR_PC, Z, W, SPl, SPh); - PopulateBUSRQ(0, I, SPh, 0, 0, SPh, 0, 0); - PopulateMEMRQ(0, 0, SPh, 0, 0, SPh, 0, 0); - IRQS = 8; - } - else - { - PopulateCURINSTR(IDLE, - IDLE); - - PopulateBUSRQ(0, I); - PopulateMEMRQ(0, 0); - IRQS = 2; - }; + PopulateBUSRQ(0, I, SPh, 0, 0, SPh, 0, 0); + PopulateMEMRQ(0, 0, SPh, 0, 0, SPh, 0, 0); + IRQS = 8; }; - void CALL_COND(bool cond) + void CALL_COND(uint32_t cond) { - if (cond) - { - PopulateCURINSTR(IDLE, - IDLE, - WAIT, - RD_INC, Z, PCl, PCh, - IDLE, - WAIT, - RD, W, PCl, PCh, - INC16, PCl, PCh, - DEC16, SPl, SPh, - WAIT, - WR_DEC, SPl, SPh, PCh, - IDLE, - WAIT, - WR_TR_PC, SPl, SPh, PCl); + PopulateCURINSTR(COND_CHK, cond, 4, + IDLE, + WAIT, + RD_INC, Z, PCl, PCh, + IDLE, + WAIT, + RD_INC, W, PCl, PCh, + IDLE, + DEC16, SPl, SPh, + WAIT, + WR_DEC, SPl, SPh, PCh, + IDLE, + WAIT, + WR_TR_PC, SPl, SPh, PCl); - PopulateBUSRQ(0, PCh, 0, 0, PCh, 0, 0, PCh, SPh, 0, 0, SPh, 0, 0); - PopulateMEMRQ(0, PCh, 0, 0, PCh, 0, 0, 0, SPh, 0, 0, SPh, 0, 0); - IRQS = 14; - } - else - { - PopulateCURINSTR(IDLE, - IDLE, - WAIT, - RD_INC, Z, PCl, PCh, - IDLE, - WAIT, - RD_INC, W, PCl, PCh); - - PopulateBUSRQ(0, PCh, 0, 0, PCh, 0, 0); - PopulateMEMRQ(0, PCh, 0, 0, PCh, 0, 0); - IRQS = 7; - }; + PopulateBUSRQ(0, PCh, 0, 0, PCh, 0, 0, PCh, SPh, 0, 0, SPh, 0, 0); + PopulateMEMRQ(0, PCh, 0, 0, PCh, 0, 0, 0, SPh, 0, 0, SPh, 0, 0); + IRQS = 14; }; void INT_OP(uint32_t operation, uint32_t src) @@ -1977,13 +2188,11 @@ namespace MSXHawk void PREFIX_(uint32_t src) { - PopulateCURINSTR(IDLE, + PopulateCURINSTR(PREX_ASGN, src, IDLE, WAIT, PREFIX); - PRE_SRC = src; - PopulateBUSRQ(0, PCh, 0, 0); PopulateMEMRQ(0, PCh, 0, 0); IRQS = -1; // prefix does not get interrupted @@ -1991,19 +2200,8 @@ namespace MSXHawk void PREFETCH_(uint32_t src) { - if (src == IXCBpre) - { - Regs[W] = Regs[Ixh]; - Regs[Z] = Regs[Ixl]; - } - else - { - Regs[W] = Regs[Iyh]; - Regs[Z] = Regs[Iyl]; - }; - - PopulateCURINSTR(IDLE, - IDLE, + PopulateCURINSTR(PREFT_ASGN, src, + PREX_ASGN, src, WAIT, RD_INC, ALU, PCl, PCh, ADDS, Z, W, ALU, ZERO, @@ -2011,10 +2209,6 @@ namespace MSXHawk IDLE, PREFIX); - PRE_SRC = src; - - //Console.WriteLine(TotalExecutedCycles); - PopulateBUSRQ(0, PCh, 0, 0, PCh, 0, 0, PCh); PopulateMEMRQ(0, PCh, 0, 0, PCh, 0, 0, 0); IRQS = -1; // prefetch does not get interrupted @@ -2183,1424 +2377,1425 @@ namespace MSXHawk #pragma region Decode - void FetchInstruction() + void BuildInstructionTables() { - if (NO_prefix) + for (int i = 0; i < 256; i++) { - switch (opcode) + switch (i) { - case 0x00: NOP_(); break; // NOP - case 0x01: LD_IND_16(C, B, PCl, PCh); break; // LD BC, nn - case 0x02: LD_8_IND(C, B, A); break; // LD (BC), A - case 0x03: INC_16(C, B); break; // INC BC - case 0x04: INT_OP(INC8, B); break; // INC B - case 0x05: INT_OP(DEC8, B); break; // DEC B - case 0x06: LD_IND_8_INC(B, PCl, PCh); break; // LD B, n - case 0x07: INT_OP(RLC, Aim); break; // RLCA - case 0x08: EXCH_(); break; // EXCH AF, AF' - case 0x09: ADD_16(L, H, C, B); break; // ADD HL, BC - case 0x0A: REG_OP_IND(TR, A, C, B); break; // LD A, (BC) - case 0x0B: DEC_16(C, B); break; // DEC BC - case 0x0C: INT_OP(INC8, C); break; // INC C - case 0x0D: INT_OP(DEC8, C); break; // DEC C - case 0x0E: LD_IND_8_INC(C, PCl, PCh); break; // LD C, n - case 0x0F: INT_OP(RRC, Aim); break; // RRCA - case 0x10: DJNZ_(); break; // DJNZ B - case 0x11: LD_IND_16(E, D, PCl, PCh); break; // LD DE, nn - case 0x12: LD_8_IND(E, D, A); break; // LD (DE), A - case 0x13: INC_16(E, D); break; // INC DE - case 0x14: INT_OP(INC8, D); break; // INC D - case 0x15: INT_OP(DEC8, D); break; // DEC D - case 0x16: LD_IND_8_INC(D, PCl, PCh); break; // LD D, n - case 0x17: INT_OP(RL, Aim); break; // RLA - case 0x18: JR_COND(true); break; // JR, r8 - case 0x19: ADD_16(L, H, E, D); break; // ADD HL, DE - case 0x1A: REG_OP_IND(TR, A, E, D); break; // LD A, (DE) - case 0x1B: DEC_16(E, D); break; // DEC DE - case 0x1C: INT_OP(INC8, E); break; // INC E - case 0x1D: INT_OP(DEC8, E); break; // DEC E - case 0x1E: LD_IND_8_INC(E, PCl, PCh); break; // LD E, n - case 0x1F: INT_OP(RR, Aim); break; // RRA - case 0x20: JR_COND(!FlagZget()); break; // JR NZ, r8 - case 0x21: LD_IND_16(L, H, PCl, PCh); break; // LD HL, nn - case 0x22: LD_16_IND_nn(L, H); break; // LD (nn), HL - case 0x23: INC_16(L, H); break; // INC HL - case 0x24: INT_OP(INC8, H); break; // INC H - case 0x25: INT_OP(DEC8, H); break; // DEC H - case 0x26: LD_IND_8_INC(H, PCl, PCh); break; // LD H, n - case 0x27: INT_OP(DA, A); break; // DAA - case 0x28: JR_COND(FlagZget()); break; // JR Z, r8 - case 0x29: ADD_16(L, H, L, H); break; // ADD HL, HL - case 0x2A: LD_IND_16_nn(L, H); break; // LD HL, (nn) - case 0x2B: DEC_16(L, H); break; // DEC HL - case 0x2C: INT_OP(INC8, L); break; // INC L - case 0x2D: INT_OP(DEC8, L); break; // DEC L - case 0x2E: LD_IND_8_INC(L, PCl, PCh); break; // LD L, n - case 0x2F: INT_OP(CPL, A); break; // CPL - case 0x30: JR_COND(!FlagCget()); break; // JR NC, r8 - case 0x31: LD_IND_16(SPl, SPh, PCl, PCh); break; // LD SP, nn - case 0x32: LD_8_IND_nn(A); break; // LD (nn), A - case 0x33: INC_16(SPl, SPh); break; // INC SP - case 0x34: INC_8_IND(L, H); break; // INC (HL) - case 0x35: DEC_8_IND(L, H); break; // DEC (HL) - case 0x36: LD_8_IND_IND(L, H, PCl, PCh); break; // LD (HL), n - case 0x37: INT_OP(SCF, A); break; // SCF - case 0x38: JR_COND(FlagCget()); break; // JR C, r8 - case 0x39: ADD_16(L, H, SPl, SPh); break; // ADD HL, SP - case 0x3A: LD_IND_8_nn(A); break; // LD A, (nn) - case 0x3B: DEC_16(SPl, SPh); break; // DEC SP - case 0x3C: INT_OP(INC8, A); break; // INC A - case 0x3D: INT_OP(DEC8, A); break; // DEC A - case 0x3E: LD_IND_8_INC(A, PCl, PCh); break; // LD A, n - case 0x3F: INT_OP(CCF, A); break; // CCF - case 0x40: REG_OP(TR, B, B); break; // LD B, B - case 0x41: REG_OP(TR, B, C); break; // LD B, C - case 0x42: REG_OP(TR, B, D); break; // LD B, D - case 0x43: REG_OP(TR, B, E); break; // LD B, E - case 0x44: REG_OP(TR, B, H); break; // LD B, H - case 0x45: REG_OP(TR, B, L); break; // LD B, L - case 0x46: REG_OP_IND_HL(TR, B); break; // LD B, (HL) - case 0x47: REG_OP(TR, B, A); break; // LD B, A - case 0x48: REG_OP(TR, C, B); break; // LD C, B - case 0x49: REG_OP(TR, C, C); break; // LD C, C - case 0x4A: REG_OP(TR, C, D); break; // LD C, D - case 0x4B: REG_OP(TR, C, E); break; // LD C, E - case 0x4C: REG_OP(TR, C, H); break; // LD C, H - case 0x4D: REG_OP(TR, C, L); break; // LD C, L - case 0x4E: REG_OP_IND_HL(TR, C); break; // LD C, (HL) - case 0x4F: REG_OP(TR, C, A); break; // LD C, A - case 0x50: REG_OP(TR, D, B); break; // LD D, B - case 0x51: REG_OP(TR, D, C); break; // LD D, C - case 0x52: REG_OP(TR, D, D); break; // LD D, D - case 0x53: REG_OP(TR, D, E); break; // LD D, E - case 0x54: REG_OP(TR, D, H); break; // LD D, H - case 0x55: REG_OP(TR, D, L); break; // LD D, L - case 0x56: REG_OP_IND_HL(TR, D); break; // LD D, (HL) - case 0x57: REG_OP(TR, D, A); break; // LD D, A - case 0x58: REG_OP(TR, E, B); break; // LD E, B - case 0x59: REG_OP(TR, E, C); break; // LD E, C - case 0x5A: REG_OP(TR, E, D); break; // LD E, D - case 0x5B: REG_OP(TR, E, E); break; // LD E, E - case 0x5C: REG_OP(TR, E, H); break; // LD E, H - case 0x5D: REG_OP(TR, E, L); break; // LD E, L - case 0x5E: REG_OP_IND_HL(TR, E); break; // LD E, (HL) - case 0x5F: REG_OP(TR, E, A); break; // LD E, A - case 0x60: REG_OP(TR, H, B); break; // LD H, B - case 0x61: REG_OP(TR, H, C); break; // LD H, C - case 0x62: REG_OP(TR, H, D); break; // LD H, D - case 0x63: REG_OP(TR, H, E); break; // LD H, E - case 0x64: REG_OP(TR, H, H); break; // LD H, H - case 0x65: REG_OP(TR, H, L); break; // LD H, L - case 0x66: REG_OP_IND_HL(TR, H); break; // LD H, (HL) - case 0x67: REG_OP(TR, H, A); break; // LD H, A - case 0x68: REG_OP(TR, L, B); break; // LD L, B - case 0x69: REG_OP(TR, L, C); break; // LD L, C - case 0x6A: REG_OP(TR, L, D); break; // LD L, D - case 0x6B: REG_OP(TR, L, E); break; // LD L, E - case 0x6C: REG_OP(TR, L, H); break; // LD L, H - case 0x6D: REG_OP(TR, L, L); break; // LD L, L - case 0x6E: REG_OP_IND_HL(TR, L); break; // LD L, (HL) - case 0x6F: REG_OP(TR, L, A); break; // LD L, A - case 0x70: LD_8_IND_HL(B); break; // LD (HL), B - case 0x71: LD_8_IND_HL(C); break; // LD (HL), C - case 0x72: LD_8_IND_HL(D); break; // LD (HL), D - case 0x73: LD_8_IND_HL(E); break; // LD (HL), E - case 0x74: LD_8_IND_HL(H); break; // LD (HL), H - case 0x75: LD_8_IND_HL(L); break; // LD (HL), L - case 0x76: HALT_(); break; // HALT - case 0x77: LD_8_IND_HL(A); break; // LD (HL), A - case 0x78: REG_OP(TR, A, B); break; // LD A, B - case 0x79: REG_OP(TR, A, C); break; // LD A, C - case 0x7A: REG_OP(TR, A, D); break; // LD A, D - case 0x7B: REG_OP(TR, A, E); break; // LD A, E - case 0x7C: REG_OP(TR, A, H); break; // LD A, H - case 0x7D: REG_OP(TR, A, L); break; // LD A, L - case 0x7E: REG_OP_IND_HL(TR, A); break; // LD A, (HL) - case 0x7F: REG_OP(TR, A, A); break; // LD A, A - case 0x80: REG_OP(ADD8, A, B); break; // ADD A, B - case 0x81: REG_OP(ADD8, A, C); break; // ADD A, C - case 0x82: REG_OP(ADD8, A, D); break; // ADD A, D - case 0x83: REG_OP(ADD8, A, E); break; // ADD A, E - case 0x84: REG_OP(ADD8, A, H); break; // ADD A, H - case 0x85: REG_OP(ADD8, A, L); break; // ADD A, L - case 0x86: REG_OP_IND(ADD8, A, L, H); break; // ADD A, (HL) - case 0x87: REG_OP(ADD8, A, A); break; // ADD A, A - case 0x88: REG_OP(ADC8, A, B); break; // ADC A, B - case 0x89: REG_OP(ADC8, A, C); break; // ADC A, C - case 0x8A: REG_OP(ADC8, A, D); break; // ADC A, D - case 0x8B: REG_OP(ADC8, A, E); break; // ADC A, E - case 0x8C: REG_OP(ADC8, A, H); break; // ADC A, H - case 0x8D: REG_OP(ADC8, A, L); break; // ADC A, L - case 0x8E: REG_OP_IND(ADC8, A, L, H); break; // ADC A, (HL) - case 0x8F: REG_OP(ADC8, A, A); break; // ADC A, A - case 0x90: REG_OP(SUB8, A, B); break; // SUB A, B - case 0x91: REG_OP(SUB8, A, C); break; // SUB A, C - case 0x92: REG_OP(SUB8, A, D); break; // SUB A, D - case 0x93: REG_OP(SUB8, A, E); break; // SUB A, E - case 0x94: REG_OP(SUB8, A, H); break; // SUB A, H - case 0x95: REG_OP(SUB8, A, L); break; // SUB A, L - case 0x96: REG_OP_IND(SUB8, A, L, H); break; // SUB A, (HL) - case 0x97: REG_OP(SUB8, A, A); break; // SUB A, A - case 0x98: REG_OP(SBC8, A, B); break; // SBC A, B - case 0x99: REG_OP(SBC8, A, C); break; // SBC A, C - case 0x9A: REG_OP(SBC8, A, D); break; // SBC A, D - case 0x9B: REG_OP(SBC8, A, E); break; // SBC A, E - case 0x9C: REG_OP(SBC8, A, H); break; // SBC A, H - case 0x9D: REG_OP(SBC8, A, L); break; // SBC A, L - case 0x9E: REG_OP_IND(SBC8, A, L, H); break; // SBC A, (HL) - case 0x9F: REG_OP(SBC8, A, A); break; // SBC A, A - case 0xA0: REG_OP(AND8, A, B); break; // AND A, B - case 0xA1: REG_OP(AND8, A, C); break; // AND A, C - case 0xA2: REG_OP(AND8, A, D); break; // AND A, D - case 0xA3: REG_OP(AND8, A, E); break; // AND A, E - case 0xA4: REG_OP(AND8, A, H); break; // AND A, H - case 0xA5: REG_OP(AND8, A, L); break; // AND A, L - case 0xA6: REG_OP_IND(AND8, A, L, H); break; // AND A, (HL) - case 0xA7: REG_OP(AND8, A, A); break; // AND A, A - case 0xA8: REG_OP(XOR8, A, B); break; // XOR A, B - case 0xA9: REG_OP(XOR8, A, C); break; // XOR A, C - case 0xAA: REG_OP(XOR8, A, D); break; // XOR A, D - case 0xAB: REG_OP(XOR8, A, E); break; // XOR A, E - case 0xAC: REG_OP(XOR8, A, H); break; // XOR A, H - case 0xAD: REG_OP(XOR8, A, L); break; // XOR A, L - case 0xAE: REG_OP_IND(XOR8, A, L, H); break; // XOR A, (HL) - case 0xAF: REG_OP(XOR8, A, A); break; // XOR A, A - case 0xB0: REG_OP(OR8, A, B); break; // OR A, B - case 0xB1: REG_OP(OR8, A, C); break; // OR A, C - case 0xB2: REG_OP(OR8, A, D); break; // OR A, D - case 0xB3: REG_OP(OR8, A, E); break; // OR A, E - case 0xB4: REG_OP(OR8, A, H); break; // OR A, H - case 0xB5: REG_OP(OR8, A, L); break; // OR A, L - case 0xB6: REG_OP_IND(OR8, A, L, H); break; // OR A, (HL) - case 0xB7: REG_OP(OR8, A, A); break; // OR A, A - case 0xB8: REG_OP(CP8, A, B); break; // CP A, B - case 0xB9: REG_OP(CP8, A, C); break; // CP A, C - case 0xBA: REG_OP(CP8, A, D); break; // CP A, D - case 0xBB: REG_OP(CP8, A, E); break; // CP A, E - case 0xBC: REG_OP(CP8, A, H); break; // CP A, H - case 0xBD: REG_OP(CP8, A, L); break; // CP A, L - case 0xBE: REG_OP_IND(CP8, A, L, H); break; // CP A, (HL) - case 0xBF: REG_OP(CP8, A, A); break; // CP A, A - case 0xC0: RET_COND(!FlagZget()); break; // Ret NZ - case 0xC1: POP_(C, B); break; // POP BC - case 0xC2: JP_COND(!FlagZget()); break; // JP NZ - case 0xC3: JP_COND(true); break; // JP - case 0xC4: CALL_COND(!FlagZget()); break; // CALL NZ - case 0xC5: PUSH_(C, B); break; // PUSH BC - case 0xC6: REG_OP_IND_INC(ADD8, A, PCl, PCh); break; // ADD A, n - case 0xC7: RST_(0); break; // RST 0 - case 0xC8: RET_COND(FlagZget()); break; // RET Z - case 0xC9: RET_(); break; // RET - case 0xCA: JP_COND(FlagZget()); break; // JP Z - case 0xCB: PREFIX_(CBpre); break; // PREFIX CB - case 0xCC: CALL_COND(FlagZget()); break; // CALL Z - case 0xCD: CALL_COND(true); break; // CALL - case 0xCE: REG_OP_IND_INC(ADC8, A, PCl, PCh); break; // ADC A, n - case 0xCF: RST_(0x08); break; // RST 0x08 - case 0xD0: RET_COND(!FlagCget()); break; // Ret NC - case 0xD1: POP_(E, D); break; // POP DE - case 0xD2: JP_COND(!FlagCget()); break; // JP NC - case 0xD3: OUT_(); break; // OUT A - case 0xD4: CALL_COND(!FlagCget()); break; // CALL NC - case 0xD5: PUSH_(E, D); break; // PUSH DE - case 0xD6: REG_OP_IND_INC(SUB8, A, PCl, PCh); break; // SUB A, n - case 0xD7: RST_(0x10); break; // RST 0x10 - case 0xD8: RET_COND(FlagCget()); break; // RET C - case 0xD9: EXX_(); break; // EXX - case 0xDA: JP_COND(FlagCget()); break; // JP C - case 0xDB: IN_(); break; // IN A - case 0xDC: CALL_COND(FlagCget()); break; // CALL C - case 0xDD: PREFIX_(IXpre); break; // PREFIX IX - case 0xDE: REG_OP_IND_INC(SBC8, A, PCl, PCh); break; // SBC A, n - case 0xDF: RST_(0x18); break; // RST 0x18 - case 0xE0: RET_COND(!FlagPget()); break; // RET Po - case 0xE1: POP_(L, H); break; // POP HL - case 0xE2: JP_COND(!FlagPget()); break; // JP Po - case 0xE3: EXCH_16_IND_(SPl, SPh, L, H); break; // ex (SP), HL - case 0xE4: CALL_COND(!FlagPget()); break; // CALL Po - case 0xE5: PUSH_(L, H); break; // PUSH HL - case 0xE6: REG_OP_IND_INC(AND8, A, PCl, PCh); break; // AND A, n - case 0xE7: RST_(0x20); break; // RST 0x20 - case 0xE8: RET_COND(FlagPget()); break; // RET Pe - case 0xE9: JP_16(L, H); break; // JP (HL) - case 0xEA: JP_COND(FlagPget()); break; // JP Pe - case 0xEB: EXCH_16_(E, D, L, H); break; // ex DE, HL - case 0xEC: CALL_COND(FlagPget()); break; // CALL Pe - case 0xED: PREFIX_(EXTDpre); break; // PREFIX EXTD - case 0xEE: REG_OP_IND_INC(XOR8, A, PCl, PCh); break; // XOR A, n - case 0xEF: RST_(0x28); break; // RST 0x28 - case 0xF0: RET_COND(!FlagSget()); break; // RET p - case 0xF1: POP_(F, A); break; // POP AF - case 0xF2: JP_COND(!FlagSget()); break; // JP p - case 0xF3: DI_(); break; // DI - case 0xF4: CALL_COND(!FlagSget()); break; // CALL p - case 0xF5: PUSH_(F, A); break; // PUSH AF - case 0xF6: REG_OP_IND_INC(OR8, A, PCl, PCh); break; // OR A, n - case 0xF7: RST_(0x30); break; // RST 0x30 - case 0xF8: RET_COND(FlagSget()); break; // RET M - case 0xF9: LD_SP_16(L, H); break; // LD SP, HL - case 0xFA: JP_COND(FlagSget()); break; // JP M - case 0xFB: EI_(); break; // EI - case 0xFC: CALL_COND(FlagSget()); break; // CALL M - case 0xFD: PREFIX_(IYpre); break; // PREFIX IY - case 0xFE: REG_OP_IND_INC(CP8, A, PCl, PCh); break; // CP A, n - case 0xFF: RST_(0x38); break; // RST 0x38 + case 0x00: NOP_(); break; // NOP + case 0x01: LD_IND_16(C, B, PCl, PCh); break; // LD BC, nn + case 0x02: LD_8_IND(C, B, A); break; // LD (BC), A + case 0x03: INC_16(C, B); break; // INC BC + case 0x04: INT_OP(INC8, B); break; // INC B + case 0x05: INT_OP(DEC8, B); break; // DEC B + case 0x06: LD_IND_8_INC(B, PCl, PCh); break; // LD B, n + case 0x07: INT_OP(RLC, Aim); break; // RLCA + case 0x08: EXCH_(); break; // EXCH AF, AF' + case 0x09: ADD_16(L, H, C, B); break; // ADD HL, BC + case 0x0A: REG_OP_IND(TR, A, C, B); break; // LD A, (BC) + case 0x0B: DEC_16(C, B); break; // DEC BC + case 0x0C: INT_OP(INC8, C); break; // INC C + case 0x0D: INT_OP(DEC8, C); break; // DEC C + case 0x0E: LD_IND_8_INC(C, PCl, PCh); break; // LD C, n + case 0x0F: INT_OP(RRC, Aim); break; // RRCA + case 0x10: DJNZ_(); break; // DJNZ B + case 0x11: LD_IND_16(E, D, PCl, PCh); break; // LD DE, nn + case 0x12: LD_8_IND(E, D, A); break; // LD (DE), A + case 0x13: INC_16(E, D); break; // INC DE + case 0x14: INT_OP(INC8, D); break; // INC D + case 0x15: INT_OP(DEC8, D); break; // DEC D + case 0x16: LD_IND_8_INC(D, PCl, PCh); break; // LD D, n + case 0x17: INT_OP(RL, Aim); break; // RLA + case 0x18: JR_COND(ALWAYS_T); break; // JR, r8 + case 0x19: ADD_16(L, H, E, D); break; // ADD HL, DE + case 0x1A: REG_OP_IND(TR, A, E, D); break; // LD A, (DE) + case 0x1B: DEC_16(E, D); break; // DEC DE + case 0x1C: INT_OP(INC8, E); break; // INC E + case 0x1D: INT_OP(DEC8, E); break; // DEC E + case 0x1E: LD_IND_8_INC(E, PCl, PCh); break; // LD E, n + case 0x1F: INT_OP(RR, Aim); break; // RRA + case 0x20: JR_COND(FLAG_NZ); break; // JR NZ, r8 + case 0x21: LD_IND_16(L, H, PCl, PCh); break; // LD HL, nn + case 0x22: LD_16_IND_nn(L, H); break; // LD (nn), HL + case 0x23: INC_16(L, H); break; // INC HL + case 0x24: INT_OP(INC8, H); break; // INC H + case 0x25: INT_OP(DEC8, H); break; // DEC H + case 0x26: LD_IND_8_INC(H, PCl, PCh); break; // LD H, n + case 0x27: INT_OP(DA, A); break; // DAA + case 0x28: JR_COND(FLAG_Z); break; // JR Z, r8 + case 0x29: ADD_16(L, H, L, H); break; // ADD HL, HL + case 0x2A: LD_IND_16_nn(L, H); break; // LD HL, (nn) + case 0x2B: DEC_16(L, H); break; // DEC HL + case 0x2C: INT_OP(INC8, L); break; // INC L + case 0x2D: INT_OP(DEC8, L); break; // DEC L + case 0x2E: LD_IND_8_INC(L, PCl, PCh); break; // LD L, n + case 0x2F: INT_OP(CPL, A); break; // CPL + case 0x30: JR_COND(FLAG_NC); break; // JR NC, r8 + case 0x31: LD_IND_16(SPl, SPh, PCl, PCh); break; // LD SP, nn + case 0x32: LD_8_IND_nn(A); break; // LD (nn), A + case 0x33: INC_16(SPl, SPh); break; // INC SP + case 0x34: INC_8_IND(L, H); break; // INC (HL) + case 0x35: DEC_8_IND(L, H); break; // DEC (HL) + case 0x36: LD_8_IND_IND(L, H, PCl, PCh); break; // LD (HL), n + case 0x37: INT_OP(SCF, A); break; // SCF + case 0x38: JR_COND(FLAG_C); break; // JR C, r8 + case 0x39: ADD_16(L, H, SPl, SPh); break; // ADD HL, SP + case 0x3A: LD_IND_8_nn(A); break; // LD A, (nn) + case 0x3B: DEC_16(SPl, SPh); break; // DEC SP + case 0x3C: INT_OP(INC8, A); break; // INC A + case 0x3D: INT_OP(DEC8, A); break; // DEC A + case 0x3E: LD_IND_8_INC(A, PCl, PCh); break; // LD A, n + case 0x3F: INT_OP(CCF, A); break; // CCF + case 0x40: REG_OP(TR, B, B); break; // LD B, B + case 0x41: REG_OP(TR, B, C); break; // LD B, C + case 0x42: REG_OP(TR, B, D); break; // LD B, D + case 0x43: REG_OP(TR, B, E); break; // LD B, E + case 0x44: REG_OP(TR, B, H); break; // LD B, H + case 0x45: REG_OP(TR, B, L); break; // LD B, L + case 0x46: REG_OP_IND_HL(TR, B); break; // LD B, (HL) + case 0x47: REG_OP(TR, B, A); break; // LD B, A + case 0x48: REG_OP(TR, C, B); break; // LD C, B + case 0x49: REG_OP(TR, C, C); break; // LD C, C + case 0x4A: REG_OP(TR, C, D); break; // LD C, D + case 0x4B: REG_OP(TR, C, E); break; // LD C, E + case 0x4C: REG_OP(TR, C, H); break; // LD C, H + case 0x4D: REG_OP(TR, C, L); break; // LD C, L + case 0x4E: REG_OP_IND_HL(TR, C); break; // LD C, (HL) + case 0x4F: REG_OP(TR, C, A); break; // LD C, A + case 0x50: REG_OP(TR, D, B); break; // LD D, B + case 0x51: REG_OP(TR, D, C); break; // LD D, C + case 0x52: REG_OP(TR, D, D); break; // LD D, D + case 0x53: REG_OP(TR, D, E); break; // LD D, E + case 0x54: REG_OP(TR, D, H); break; // LD D, H + case 0x55: REG_OP(TR, D, L); break; // LD D, L + case 0x56: REG_OP_IND_HL(TR, D); break; // LD D, (HL) + case 0x57: REG_OP(TR, D, A); break; // LD D, A + case 0x58: REG_OP(TR, E, B); break; // LD E, B + case 0x59: REG_OP(TR, E, C); break; // LD E, C + case 0x5A: REG_OP(TR, E, D); break; // LD E, D + case 0x5B: REG_OP(TR, E, E); break; // LD E, E + case 0x5C: REG_OP(TR, E, H); break; // LD E, H + case 0x5D: REG_OP(TR, E, L); break; // LD E, L + case 0x5E: REG_OP_IND_HL(TR, E); break; // LD E, (HL) + case 0x5F: REG_OP(TR, E, A); break; // LD E, A + case 0x60: REG_OP(TR, H, B); break; // LD H, B + case 0x61: REG_OP(TR, H, C); break; // LD H, C + case 0x62: REG_OP(TR, H, D); break; // LD H, D + case 0x63: REG_OP(TR, H, E); break; // LD H, E + case 0x64: REG_OP(TR, H, H); break; // LD H, H + case 0x65: REG_OP(TR, H, L); break; // LD H, L + case 0x66: REG_OP_IND_HL(TR, H); break; // LD H, (HL) + case 0x67: REG_OP(TR, H, A); break; // LD H, A + case 0x68: REG_OP(TR, L, B); break; // LD L, B + case 0x69: REG_OP(TR, L, C); break; // LD L, C + case 0x6A: REG_OP(TR, L, D); break; // LD L, D + case 0x6B: REG_OP(TR, L, E); break; // LD L, E + case 0x6C: REG_OP(TR, L, H); break; // LD L, H + case 0x6D: REG_OP(TR, L, L); break; // LD L, L + case 0x6E: REG_OP_IND_HL(TR, L); break; // LD L, (HL) + case 0x6F: REG_OP(TR, L, A); break; // LD L, A + case 0x70: LD_8_IND_HL(B); break; // LD (HL), B + case 0x71: LD_8_IND_HL(C); break; // LD (HL), C + case 0x72: LD_8_IND_HL(D); break; // LD (HL), D + case 0x73: LD_8_IND_HL(E); break; // LD (HL), E + case 0x74: LD_8_IND_HL(H); break; // LD (HL), H + case 0x75: LD_8_IND_HL(L); break; // LD (HL), L + case 0x76: HALT_(); break; // HALT + case 0x77: LD_8_IND_HL(A); break; // LD (HL), A + case 0x78: REG_OP(TR, A, B); break; // LD A, B + case 0x79: REG_OP(TR, A, C); break; // LD A, C + case 0x7A: REG_OP(TR, A, D); break; // LD A, D + case 0x7B: REG_OP(TR, A, E); break; // LD A, E + case 0x7C: REG_OP(TR, A, H); break; // LD A, H + case 0x7D: REG_OP(TR, A, L); break; // LD A, L + case 0x7E: REG_OP_IND_HL(TR, A); break; // LD A, (HL) + case 0x7F: REG_OP(TR, A, A); break; // LD A, A + case 0x80: REG_OP(ADD8, A, B); break; // ADD A, B + case 0x81: REG_OP(ADD8, A, C); break; // ADD A, C + case 0x82: REG_OP(ADD8, A, D); break; // ADD A, D + case 0x83: REG_OP(ADD8, A, E); break; // ADD A, E + case 0x84: REG_OP(ADD8, A, H); break; // ADD A, H + case 0x85: REG_OP(ADD8, A, L); break; // ADD A, L + case 0x86: REG_OP_IND(ADD8, A, L, H); break; // ADD A, (HL) + case 0x87: REG_OP(ADD8, A, A); break; // ADD A, A + case 0x88: REG_OP(ADC8, A, B); break; // ADC A, B + case 0x89: REG_OP(ADC8, A, C); break; // ADC A, C + case 0x8A: REG_OP(ADC8, A, D); break; // ADC A, D + case 0x8B: REG_OP(ADC8, A, E); break; // ADC A, E + case 0x8C: REG_OP(ADC8, A, H); break; // ADC A, H + case 0x8D: REG_OP(ADC8, A, L); break; // ADC A, L + case 0x8E: REG_OP_IND(ADC8, A, L, H); break; // ADC A, (HL) + case 0x8F: REG_OP(ADC8, A, A); break; // ADC A, A + case 0x90: REG_OP(SUB8, A, B); break; // SUB A, B + case 0x91: REG_OP(SUB8, A, C); break; // SUB A, C + case 0x92: REG_OP(SUB8, A, D); break; // SUB A, D + case 0x93: REG_OP(SUB8, A, E); break; // SUB A, E + case 0x94: REG_OP(SUB8, A, H); break; // SUB A, H + case 0x95: REG_OP(SUB8, A, L); break; // SUB A, L + case 0x96: REG_OP_IND(SUB8, A, L, H); break; // SUB A, (HL) + case 0x97: REG_OP(SUB8, A, A); break; // SUB A, A + case 0x98: REG_OP(SBC8, A, B); break; // SBC A, B + case 0x99: REG_OP(SBC8, A, C); break; // SBC A, C + case 0x9A: REG_OP(SBC8, A, D); break; // SBC A, D + case 0x9B: REG_OP(SBC8, A, E); break; // SBC A, E + case 0x9C: REG_OP(SBC8, A, H); break; // SBC A, H + case 0x9D: REG_OP(SBC8, A, L); break; // SBC A, L + case 0x9E: REG_OP_IND(SBC8, A, L, H); break; // SBC A, (HL) + case 0x9F: REG_OP(SBC8, A, A); break; // SBC A, A + case 0xA0: REG_OP(AND8, A, B); break; // AND A, B + case 0xA1: REG_OP(AND8, A, C); break; // AND A, C + case 0xA2: REG_OP(AND8, A, D); break; // AND A, D + case 0xA3: REG_OP(AND8, A, E); break; // AND A, E + case 0xA4: REG_OP(AND8, A, H); break; // AND A, H + case 0xA5: REG_OP(AND8, A, L); break; // AND A, L + case 0xA6: REG_OP_IND(AND8, A, L, H); break; // AND A, (HL) + case 0xA7: REG_OP(AND8, A, A); break; // AND A, A + case 0xA8: REG_OP(XOR8, A, B); break; // XOR A, B + case 0xA9: REG_OP(XOR8, A, C); break; // XOR A, C + case 0xAA: REG_OP(XOR8, A, D); break; // XOR A, D + case 0xAB: REG_OP(XOR8, A, E); break; // XOR A, E + case 0xAC: REG_OP(XOR8, A, H); break; // XOR A, H + case 0xAD: REG_OP(XOR8, A, L); break; // XOR A, L + case 0xAE: REG_OP_IND(XOR8, A, L, H); break; // XOR A, (HL) + case 0xAF: REG_OP(XOR8, A, A); break; // XOR A, A + case 0xB0: REG_OP(OR8, A, B); break; // OR A, B + case 0xB1: REG_OP(OR8, A, C); break; // OR A, C + case 0xB2: REG_OP(OR8, A, D); break; // OR A, D + case 0xB3: REG_OP(OR8, A, E); break; // OR A, E + case 0xB4: REG_OP(OR8, A, H); break; // OR A, H + case 0xB5: REG_OP(OR8, A, L); break; // OR A, L + case 0xB6: REG_OP_IND(OR8, A, L, H); break; // OR A, (HL) + case 0xB7: REG_OP(OR8, A, A); break; // OR A, A + case 0xB8: REG_OP(CP8, A, B); break; // CP A, B + case 0xB9: REG_OP(CP8, A, C); break; // CP A, C + case 0xBA: REG_OP(CP8, A, D); break; // CP A, D + case 0xBB: REG_OP(CP8, A, E); break; // CP A, E + case 0xBC: REG_OP(CP8, A, H); break; // CP A, H + case 0xBD: REG_OP(CP8, A, L); break; // CP A, L + case 0xBE: REG_OP_IND(CP8, A, L, H); break; // CP A, (HL) + case 0xBF: REG_OP(CP8, A, A); break; // CP A, A + case 0xC0: RET_COND(FLAG_NZ); break; // Ret NZ + case 0xC1: POP_(C, B); break; // POP BC + case 0xC2: JP_COND(FLAG_NZ); break; // JP NZ + case 0xC3: JP_COND(ALWAYS_T); break; // JP + case 0xC4: CALL_COND(FLAG_NZ); break; // CALL NZ + case 0xC5: PUSH_(C, B); break; // PUSH BC + case 0xC6: REG_OP_IND_INC(ADD8, A, PCl, PCh); break; // ADD A, n + case 0xC7: RST_(0); break; // RST 0 + case 0xC8: RET_COND(FLAG_Z); break; // RET Z + case 0xC9: RET_(); break; // RET + case 0xCA: JP_COND(FLAG_Z); break; // JP Z + case 0xCB: PREFIX_(CBpre); break; // PREFIX CB + case 0xCC: CALL_COND(FLAG_Z); break; // CALL Z + case 0xCD: CALL_COND(ALWAYS_T); break; // CALL + case 0xCE: REG_OP_IND_INC(ADC8, A, PCl, PCh); break; // ADC A, n + case 0xCF: RST_(0x08); break; // RST 0x08 + case 0xD0: RET_COND(FLAG_NC); break; // Ret NC + case 0xD1: POP_(E, D); break; // POP DE + case 0xD2: JP_COND(FLAG_NC); break; // JP NC + case 0xD3: OUT_(); break; // OUT A + case 0xD4: CALL_COND(FLAG_NC); break; // CALL NC + case 0xD5: PUSH_(E, D); break; // PUSH DE + case 0xD6: REG_OP_IND_INC(SUB8, A, PCl, PCh); break; // SUB A, n + case 0xD7: RST_(0x10); break; // RST 0x10 + case 0xD8: RET_COND(FLAG_C); break; // RET C + case 0xD9: EXX_(); break; // EXX + case 0xDA: JP_COND(FLAG_C); break; // JP C + case 0xDB: IN_(); break; // IN A + case 0xDC: CALL_COND(FLAG_C); break; // CALL C + case 0xDD: PREFIX_(IXpre); break; // PREFIX IX + case 0xDE: REG_OP_IND_INC(SBC8, A, PCl, PCh); break; // SBC A, n + case 0xDF: RST_(0x18); break; // RST 0x18 + case 0xE0: RET_COND(FLAG_NP); break; // RET Po + case 0xE1: POP_(L, H); break; // POP HL + case 0xE2: JP_COND(FLAG_NP); break; // JP Po + case 0xE3: EXCH_16_IND_(SPl, SPh, L, H); break; // ex (SP), HL + case 0xE4: CALL_COND(FLAG_NP); break; // CALL Po + case 0xE5: PUSH_(L, H); break; // PUSH HL + case 0xE6: REG_OP_IND_INC(AND8, A, PCl, PCh); break; // AND A, n + case 0xE7: RST_(0x20); break; // RST 0x20 + case 0xE8: RET_COND(FLAG_P); break; // RET Pe + case 0xE9: JP_16(L, H); break; // JP (HL) + case 0xEA: JP_COND(FLAG_P); break; // JP Pe + case 0xEB: EXCH_16_(E, D, L, H); break; // ex DE, HL + case 0xEC: CALL_COND(FLAG_P); break; // CALL Pe + case 0xED: PREFIX_(EXTDpre); break; // PREFIX EXTD + case 0xEE: REG_OP_IND_INC(XOR8, A, PCl, PCh); break; // XOR A, n + case 0xEF: RST_(0x28); break; // RST 0x28 + case 0xF0: RET_COND(FLAG_NS); break; // RET p + case 0xF1: POP_(F, A); break; // POP AF + case 0xF2: JP_COND(FLAG_NS); break; // JP p + case 0xF3: DI_(); break; // DI + case 0xF4: CALL_COND(FLAG_NS); break; // CALL p + case 0xF5: PUSH_(F, A); break; // PUSH AF + case 0xF6: REG_OP_IND_INC(OR8, A, PCl, PCh); break; // OR A, n + case 0xF7: RST_(0x30); break; // RST 0x30 + case 0xF8: RET_COND(FLAG_S); break; // RET M + case 0xF9: LD_SP_16(L, H); break; // LD SP, HL + case 0xFA: JP_COND(FLAG_S); break; // JP M + case 0xFB: EI_(); break; // EI + case 0xFC: CALL_COND(FLAG_S); break; // CALL M + case 0xFD: PREFIX_(IYpre); break; // PREFIX IY + case 0xFE: REG_OP_IND_INC(CP8, A, PCl, PCh); break; // CP A, n + case 0xFF: RST_(0x38); break; // RST 0x38 } - } - else if (CB_prefix) - { - CB_prefix = false; - NO_prefix = true; - switch (opcode) - { - case 0x00: INT_OP(RLC, B); break; // RLC B - case 0x01: INT_OP(RLC, C); break; // RLC C - case 0x02: INT_OP(RLC, D); break; // RLC D - case 0x03: INT_OP(RLC, E); break; // RLC E - case 0x04: INT_OP(RLC, H); break; // RLC H - case 0x05: INT_OP(RLC, L); break; // RLC L - case 0x06: INT_OP_IND(RLC, L, H); break; // RLC (HL) - case 0x07: INT_OP(RLC, A); break; // RLC A - case 0x08: INT_OP(RRC, B); break; // RRC B - case 0x09: INT_OP(RRC, C); break; // RRC C - case 0x0A: INT_OP(RRC, D); break; // RRC D - case 0x0B: INT_OP(RRC, E); break; // RRC E - case 0x0C: INT_OP(RRC, H); break; // RRC H - case 0x0D: INT_OP(RRC, L); break; // RRC L - case 0x0E: INT_OP_IND(RRC, L, H); break; // RRC (HL) - case 0x0F: INT_OP(RRC, A); break; // RRC A - case 0x10: INT_OP(RL, B); break; // RL B - case 0x11: INT_OP(RL, C); break; // RL C - case 0x12: INT_OP(RL, D); break; // RL D - case 0x13: INT_OP(RL, E); break; // RL E - case 0x14: INT_OP(RL, H); break; // RL H - case 0x15: INT_OP(RL, L); break; // RL L - case 0x16: INT_OP_IND(RL, L, H); break; // RL (HL) - case 0x17: INT_OP(RL, A); break; // RL A - case 0x18: INT_OP(RR, B); break; // RR B - case 0x19: INT_OP(RR, C); break; // RR C - case 0x1A: INT_OP(RR, D); break; // RR D - case 0x1B: INT_OP(RR, E); break; // RR E - case 0x1C: INT_OP(RR, H); break; // RR H - case 0x1D: INT_OP(RR, L); break; // RR L - case 0x1E: INT_OP_IND(RR, L, H); break; // RR (HL) - case 0x1F: INT_OP(RR, A); break; // RR A - case 0x20: INT_OP(SLA, B); break; // SLA B - case 0x21: INT_OP(SLA, C); break; // SLA C - case 0x22: INT_OP(SLA, D); break; // SLA D - case 0x23: INT_OP(SLA, E); break; // SLA E - case 0x24: INT_OP(SLA, H); break; // SLA H - case 0x25: INT_OP(SLA, L); break; // SLA L - case 0x26: INT_OP_IND(SLA, L, H); break; // SLA (HL) - case 0x27: INT_OP(SLA, A); break; // SLA A - case 0x28: INT_OP(SRA, B); break; // SRA B - case 0x29: INT_OP(SRA, C); break; // SRA C - case 0x2A: INT_OP(SRA, D); break; // SRA D - case 0x2B: INT_OP(SRA, E); break; // SRA E - case 0x2C: INT_OP(SRA, H); break; // SRA H - case 0x2D: INT_OP(SRA, L); break; // SRA L - case 0x2E: INT_OP_IND(SRA, L, H); break; // SRA (HL) - case 0x2F: INT_OP(SRA, A); break; // SRA A - case 0x30: INT_OP(SLL, B); break; // SLL B - case 0x31: INT_OP(SLL, C); break; // SLL C - case 0x32: INT_OP(SLL, D); break; // SLL D - case 0x33: INT_OP(SLL, E); break; // SLL E - case 0x34: INT_OP(SLL, H); break; // SLL H - case 0x35: INT_OP(SLL, L); break; // SLL L - case 0x36: INT_OP_IND(SLL, L, H); break; // SLL (HL) - case 0x37: INT_OP(SLL, A); break; // SLL A - case 0x38: INT_OP(SRL, B); break; // SRL B - case 0x39: INT_OP(SRL, C); break; // SRL C - case 0x3A: INT_OP(SRL, D); break; // SRL D - case 0x3B: INT_OP(SRL, E); break; // SRL E - case 0x3C: INT_OP(SRL, H); break; // SRL H - case 0x3D: INT_OP(SRL, L); break; // SRL L - case 0x3E: INT_OP_IND(SRL, L, H); break; // SRL (HL) - case 0x3F: INT_OP(SRL, A); break; // SRL A - case 0x40: BIT_OP(BIT, 0, B); break; // BIT 0, B - case 0x41: BIT_OP(BIT, 0, C); break; // BIT 0, C - case 0x42: BIT_OP(BIT, 0, D); break; // BIT 0, D - case 0x43: BIT_OP(BIT, 0, E); break; // BIT 0, E - case 0x44: BIT_OP(BIT, 0, H); break; // BIT 0, H - case 0x45: BIT_OP(BIT, 0, L); break; // BIT 0, L - case 0x46: BIT_TE_IND(BIT, 0, L, H); break; // BIT 0, (HL) - case 0x47: BIT_OP(BIT, 0, A); break; // BIT 0, A - case 0x48: BIT_OP(BIT, 1, B); break; // BIT 1, B - case 0x49: BIT_OP(BIT, 1, C); break; // BIT 1, C - case 0x4A: BIT_OP(BIT, 1, D); break; // BIT 1, D - case 0x4B: BIT_OP(BIT, 1, E); break; // BIT 1, E - case 0x4C: BIT_OP(BIT, 1, H); break; // BIT 1, H - case 0x4D: BIT_OP(BIT, 1, L); break; // BIT 1, L - case 0x4E: BIT_TE_IND(BIT, 1, L, H); break; // BIT 1, (HL) - case 0x4F: BIT_OP(BIT, 1, A); break; // BIT 1, A - case 0x50: BIT_OP(BIT, 2, B); break; // BIT 2, B - case 0x51: BIT_OP(BIT, 2, C); break; // BIT 2, C - case 0x52: BIT_OP(BIT, 2, D); break; // BIT 2, D - case 0x53: BIT_OP(BIT, 2, E); break; // BIT 2, E - case 0x54: BIT_OP(BIT, 2, H); break; // BIT 2, H - case 0x55: BIT_OP(BIT, 2, L); break; // BIT 2, L - case 0x56: BIT_TE_IND(BIT, 2, L, H); break; // BIT 2, (HL) - case 0x57: BIT_OP(BIT, 2, A); break; // BIT 2, A - case 0x58: BIT_OP(BIT, 3, B); break; // BIT 3, B - case 0x59: BIT_OP(BIT, 3, C); break; // BIT 3, C - case 0x5A: BIT_OP(BIT, 3, D); break; // BIT 3, D - case 0x5B: BIT_OP(BIT, 3, E); break; // BIT 3, E - case 0x5C: BIT_OP(BIT, 3, H); break; // BIT 3, H - case 0x5D: BIT_OP(BIT, 3, L); break; // BIT 3, L - case 0x5E: BIT_TE_IND(BIT, 3, L, H); break; // BIT 3, (HL) - case 0x5F: BIT_OP(BIT, 3, A); break; // BIT 3, A - case 0x60: BIT_OP(BIT, 4, B); break; // BIT 4, B - case 0x61: BIT_OP(BIT, 4, C); break; // BIT 4, C - case 0x62: BIT_OP(BIT, 4, D); break; // BIT 4, D - case 0x63: BIT_OP(BIT, 4, E); break; // BIT 4, E - case 0x64: BIT_OP(BIT, 4, H); break; // BIT 4, H - case 0x65: BIT_OP(BIT, 4, L); break; // BIT 4, L - case 0x66: BIT_TE_IND(BIT, 4, L, H); break; // BIT 4, (HL) - case 0x67: BIT_OP(BIT, 4, A); break; // BIT 4, A - case 0x68: BIT_OP(BIT, 5, B); break; // BIT 5, B - case 0x69: BIT_OP(BIT, 5, C); break; // BIT 5, C - case 0x6A: BIT_OP(BIT, 5, D); break; // BIT 5, D - case 0x6B: BIT_OP(BIT, 5, E); break; // BIT 5, E - case 0x6C: BIT_OP(BIT, 5, H); break; // BIT 5, H - case 0x6D: BIT_OP(BIT, 5, L); break; // BIT 5, L - case 0x6E: BIT_TE_IND(BIT, 5, L, H); break; // BIT 5, (HL) - case 0x6F: BIT_OP(BIT, 5, A); break; // BIT 5, A - case 0x70: BIT_OP(BIT, 6, B); break; // BIT 6, B - case 0x71: BIT_OP(BIT, 6, C); break; // BIT 6, C - case 0x72: BIT_OP(BIT, 6, D); break; // BIT 6, D - case 0x73: BIT_OP(BIT, 6, E); break; // BIT 6, E - case 0x74: BIT_OP(BIT, 6, H); break; // BIT 6, H - case 0x75: BIT_OP(BIT, 6, L); break; // BIT 6, L - case 0x76: BIT_TE_IND(BIT, 6, L, H); break; // BIT 6, (HL) - case 0x77: BIT_OP(BIT, 6, A); break; // BIT 6, A - case 0x78: BIT_OP(BIT, 7, B); break; // BIT 7, B - case 0x79: BIT_OP(BIT, 7, C); break; // BIT 7, C - case 0x7A: BIT_OP(BIT, 7, D); break; // BIT 7, D - case 0x7B: BIT_OP(BIT, 7, E); break; // BIT 7, E - case 0x7C: BIT_OP(BIT, 7, H); break; // BIT 7, H - case 0x7D: BIT_OP(BIT, 7, L); break; // BIT 7, L - case 0x7E: BIT_TE_IND(BIT, 7, L, H); break; // BIT 7, (HL) - case 0x7F: BIT_OP(BIT, 7, A); break; // BIT 7, A - case 0x80: BIT_OP(RES, 0, B); break; // RES 0, B - case 0x81: BIT_OP(RES, 0, C); break; // RES 0, C - case 0x82: BIT_OP(RES, 0, D); break; // RES 0, D - case 0x83: BIT_OP(RES, 0, E); break; // RES 0, E - case 0x84: BIT_OP(RES, 0, H); break; // RES 0, H - case 0x85: BIT_OP(RES, 0, L); break; // RES 0, L - case 0x86: BIT_OP_IND(RES, 0, L, H); break; // RES 0, (HL) - case 0x87: BIT_OP(RES, 0, A); break; // RES 0, A - case 0x88: BIT_OP(RES, 1, B); break; // RES 1, B - case 0x89: BIT_OP(RES, 1, C); break; // RES 1, C - case 0x8A: BIT_OP(RES, 1, D); break; // RES 1, D - case 0x8B: BIT_OP(RES, 1, E); break; // RES 1, E - case 0x8C: BIT_OP(RES, 1, H); break; // RES 1, H - case 0x8D: BIT_OP(RES, 1, L); break; // RES 1, L - case 0x8E: BIT_OP_IND(RES, 1, L, H); break; // RES 1, (HL) - case 0x8F: BIT_OP(RES, 1, A); break; // RES 1, A - case 0x90: BIT_OP(RES, 2, B); break; // RES 2, B - case 0x91: BIT_OP(RES, 2, C); break; // RES 2, C - case 0x92: BIT_OP(RES, 2, D); break; // RES 2, D - case 0x93: BIT_OP(RES, 2, E); break; // RES 2, E - case 0x94: BIT_OP(RES, 2, H); break; // RES 2, H - case 0x95: BIT_OP(RES, 2, L); break; // RES 2, L - case 0x96: BIT_OP_IND(RES, 2, L, H); break; // RES 2, (HL) - case 0x97: BIT_OP(RES, 2, A); break; // RES 2, A - case 0x98: BIT_OP(RES, 3, B); break; // RES 3, B - case 0x99: BIT_OP(RES, 3, C); break; // RES 3, C - case 0x9A: BIT_OP(RES, 3, D); break; // RES 3, D - case 0x9B: BIT_OP(RES, 3, E); break; // RES 3, E - case 0x9C: BIT_OP(RES, 3, H); break; // RES 3, H - case 0x9D: BIT_OP(RES, 3, L); break; // RES 3, L - case 0x9E: BIT_OP_IND(RES, 3, L, H); break; // RES 3, (HL) - case 0x9F: BIT_OP(RES, 3, A); break; // RES 3, A - case 0xA0: BIT_OP(RES, 4, B); break; // RES 4, B - case 0xA1: BIT_OP(RES, 4, C); break; // RES 4, C - case 0xA2: BIT_OP(RES, 4, D); break; // RES 4, D - case 0xA3: BIT_OP(RES, 4, E); break; // RES 4, E - case 0xA4: BIT_OP(RES, 4, H); break; // RES 4, H - case 0xA5: BIT_OP(RES, 4, L); break; // RES 4, L - case 0xA6: BIT_OP_IND(RES, 4, L, H); break; // RES 4, (HL) - case 0xA7: BIT_OP(RES, 4, A); break; // RES 4, A - case 0xA8: BIT_OP(RES, 5, B); break; // RES 5, B - case 0xA9: BIT_OP(RES, 5, C); break; // RES 5, C - case 0xAA: BIT_OP(RES, 5, D); break; // RES 5, D - case 0xAB: BIT_OP(RES, 5, E); break; // RES 5, E - case 0xAC: BIT_OP(RES, 5, H); break; // RES 5, H - case 0xAD: BIT_OP(RES, 5, L); break; // RES 5, L - case 0xAE: BIT_OP_IND(RES, 5, L, H); break; // RES 5, (HL) - case 0xAF: BIT_OP(RES, 5, A); break; // RES 5, A - case 0xB0: BIT_OP(RES, 6, B); break; // RES 6, B - case 0xB1: BIT_OP(RES, 6, C); break; // RES 6, C - case 0xB2: BIT_OP(RES, 6, D); break; // RES 6, D - case 0xB3: BIT_OP(RES, 6, E); break; // RES 6, E - case 0xB4: BIT_OP(RES, 6, H); break; // RES 6, H - case 0xB5: BIT_OP(RES, 6, L); break; // RES 6, L - case 0xB6: BIT_OP_IND(RES, 6, L, H); break; // RES 6, (HL) - case 0xB7: BIT_OP(RES, 6, A); break; // RES 6, A - case 0xB8: BIT_OP(RES, 7, B); break; // RES 7, B - case 0xB9: BIT_OP(RES, 7, C); break; // RES 7, C - case 0xBA: BIT_OP(RES, 7, D); break; // RES 7, D - case 0xBB: BIT_OP(RES, 7, E); break; // RES 7, E - case 0xBC: BIT_OP(RES, 7, H); break; // RES 7, H - case 0xBD: BIT_OP(RES, 7, L); break; // RES 7, L - case 0xBE: BIT_OP_IND(RES, 7, L, H); break; // RES 7, (HL) - case 0xBF: BIT_OP(RES, 7, A); break; // RES 7, A - case 0xC0: BIT_OP(SET, 0, B); break; // SET 0, B - case 0xC1: BIT_OP(SET, 0, C); break; // SET 0, C - case 0xC2: BIT_OP(SET, 0, D); break; // SET 0, D - case 0xC3: BIT_OP(SET, 0, E); break; // SET 0, E - case 0xC4: BIT_OP(SET, 0, H); break; // SET 0, H - case 0xC5: BIT_OP(SET, 0, L); break; // SET 0, L - case 0xC6: BIT_OP_IND(SET, 0, L, H); break; // SET 0, (HL) - case 0xC7: BIT_OP(SET, 0, A); break; // SET 0, A - case 0xC8: BIT_OP(SET, 1, B); break; // SET 1, B - case 0xC9: BIT_OP(SET, 1, C); break; // SET 1, C - case 0xCA: BIT_OP(SET, 1, D); break; // SET 1, D - case 0xCB: BIT_OP(SET, 1, E); break; // SET 1, E - case 0xCC: BIT_OP(SET, 1, H); break; // SET 1, H - case 0xCD: BIT_OP(SET, 1, L); break; // SET 1, L - case 0xCE: BIT_OP_IND(SET, 1, L, H); break; // SET 1, (HL) - case 0xCF: BIT_OP(SET, 1, A); break; // SET 1, A - case 0xD0: BIT_OP(SET, 2, B); break; // SET 2, B - case 0xD1: BIT_OP(SET, 2, C); break; // SET 2, C - case 0xD2: BIT_OP(SET, 2, D); break; // SET 2, D - case 0xD3: BIT_OP(SET, 2, E); break; // SET 2, E - case 0xD4: BIT_OP(SET, 2, H); break; // SET 2, H - case 0xD5: BIT_OP(SET, 2, L); break; // SET 2, L - case 0xD6: BIT_OP_IND(SET, 2, L, H); break; // SET 2, (HL) - case 0xD7: BIT_OP(SET, 2, A); break; // SET 2, A - case 0xD8: BIT_OP(SET, 3, B); break; // SET 3, B - case 0xD9: BIT_OP(SET, 3, C); break; // SET 3, C - case 0xDA: BIT_OP(SET, 3, D); break; // SET 3, D - case 0xDB: BIT_OP(SET, 3, E); break; // SET 3, E - case 0xDC: BIT_OP(SET, 3, H); break; // SET 3, H - case 0xDD: BIT_OP(SET, 3, L); break; // SET 3, L - case 0xDE: BIT_OP_IND(SET, 3, L, H); break; // SET 3, (HL) - case 0xDF: BIT_OP(SET, 3, A); break; // SET 3, A - case 0xE0: BIT_OP(SET, 4, B); break; // SET 4, B - case 0xE1: BIT_OP(SET, 4, C); break; // SET 4, C - case 0xE2: BIT_OP(SET, 4, D); break; // SET 4, D - case 0xE3: BIT_OP(SET, 4, E); break; // SET 4, E - case 0xE4: BIT_OP(SET, 4, H); break; // SET 4, H - case 0xE5: BIT_OP(SET, 4, L); break; // SET 4, L - case 0xE6: BIT_OP_IND(SET, 4, L, H); break; // SET 4, (HL) - case 0xE7: BIT_OP(SET, 4, A); break; // SET 4, A - case 0xE8: BIT_OP(SET, 5, B); break; // SET 5, B - case 0xE9: BIT_OP(SET, 5, C); break; // SET 5, C - case 0xEA: BIT_OP(SET, 5, D); break; // SET 5, D - case 0xEB: BIT_OP(SET, 5, E); break; // SET 5, E - case 0xEC: BIT_OP(SET, 5, H); break; // SET 5, H - case 0xED: BIT_OP(SET, 5, L); break; // SET 5, L - case 0xEE: BIT_OP_IND(SET, 5, L, H); break; // SET 5, (HL) - case 0xEF: BIT_OP(SET, 5, A); break; // SET 5, A - case 0xF0: BIT_OP(SET, 6, B); break; // SET 6, B - case 0xF1: BIT_OP(SET, 6, C); break; // SET 6, C - case 0xF2: BIT_OP(SET, 6, D); break; // SET 6, D - case 0xF3: BIT_OP(SET, 6, E); break; // SET 6, E - case 0xF4: BIT_OP(SET, 6, H); break; // SET 6, H - case 0xF5: BIT_OP(SET, 6, L); break; // SET 6, L - case 0xF6: BIT_OP_IND(SET, 6, L, H); break; // SET 6, (HL) - case 0xF7: BIT_OP(SET, 6, A); break; // SET 6, A - case 0xF8: BIT_OP(SET, 7, B); break; // SET 7, B - case 0xF9: BIT_OP(SET, 7, C); break; // SET 7, C - case 0xFA: BIT_OP(SET, 7, D); break; // SET 7, D - case 0xFB: BIT_OP(SET, 7, E); break; // SET 7, E - case 0xFC: BIT_OP(SET, 7, H); break; // SET 7, H - case 0xFD: BIT_OP(SET, 7, L); break; // SET 7, L - case 0xFE: BIT_OP_IND(SET, 7, L, H); break; // SET 7, (HL) - case 0xFF: BIT_OP(SET, 7, A); break; // SET 7, A - } - } - else if (EXTD_prefix) - { - // NOTE: Much of EXTD is empty - EXTD_prefix = false; - NO_prefix = true; + + std::memcpy(&NoIndex[i * 38], &cur_instr, 38); + std::memcpy(&NoIndexBUSRQ[i * 19], &BUSRQ, 19); + std::memcpy(&NoIndexMEMRQ[i * 19], &MEMRQ, 19); + NoIndexIRQS[i] = IRQS; switch (opcode) { - case 0x40: IN_REG_(B, C); break; // IN B, (C) - case 0x41: OUT_REG_(C, B); break; // OUT (C), B - case 0x42: REG_OP_16_(SBC16, L, H, C, B); break; // SBC HL, BC - case 0x43: LD_16_IND_nn(C, B); break; // LD (nn), BC - case 0x44: INT_OP(NEG, A); break; // NEG - case 0x45: RETN_(); break; // RETN - case 0x46: INT_MODE_(0); break; // IM $0 - case 0x47: REG_OP_IR(TR, I, A); break; // LD I, A - case 0x48: IN_REG_(C, C); break; // IN C, (C) - case 0x49: OUT_REG_(C, C); break; // OUT (C), C - case 0x4A: REG_OP_16_(ADC16, L, H, C, B); break; // ADC HL, BC - case 0x4B: LD_IND_16_nn(C, B); break; // LD BC, (nn) - case 0x4C: INT_OP(NEG, A); break; // NEG - case 0x4D: RETI_(); break; // RETI - case 0x4E: INT_MODE_(0); break; // IM $0 - case 0x4F: REG_OP_IR(TR, R, A); break; // LD R, A - case 0x50: IN_REG_(D, C); break; // IN D, (C) - case 0x51: OUT_REG_(C, D); break; // OUT (C), D - case 0x52: REG_OP_16_(SBC16, L, H, E, D); break; // SBC HL, DE - case 0x53: LD_16_IND_nn(E, D); break; // LD (nn), DE - case 0x54: INT_OP(NEG, A); break; // NEG - case 0x55: RETN_(); break; // RETN - case 0x56: INT_MODE_(1); break; // IM $1 - case 0x57: REG_OP_IR(TR, A, I); break; // LD A, I - case 0x58: IN_REG_(E, C); break; // IN E, (C) - case 0x59: OUT_REG_(C, E); break; // OUT (C), E - case 0x5A: REG_OP_16_(ADC16, L, H, E, D); break; // ADC HL, DE - case 0x5B: LD_IND_16_nn(E, D); break; // LD DE, (nn) - case 0x5C: INT_OP(NEG, A); break; // NEG - case 0x5D: RETN_(); break; // RETI - case 0x5E: INT_MODE_(2); break; // IM $0 - case 0x5F: REG_OP_IR(TR, A, R); break; // LD A, R - case 0x60: IN_REG_(H, C); break; // IN H, (C) - case 0x61: OUT_REG_(C, H); break; // OUT (C), H - case 0x62: REG_OP_16_(SBC16, L, H, L, H); break; // SBC HL, HL - case 0x63: LD_16_IND_nn(L, H); break; // LD (nn), HL - case 0x64: INT_OP(NEG, A); break; // NEG - case 0x65: RETN_(); break; // RETN - case 0x66: INT_MODE_(0); break; // IM $0 - case 0x67: RRD_(); break; // RRD - case 0x68: IN_REG_(L, C); break; // IN L, (C) - case 0x69: OUT_REG_(C, L); break; // OUT (C), L - case 0x6A: REG_OP_16_(ADC16, L, H, L, H); break; // ADC HL, HL - case 0x6B: LD_IND_16_nn(L, H); break; // LD HL, (nn) - case 0x6C: INT_OP(NEG, A); break; // NEG - case 0x6D: RETN_(); break; // RETI - case 0x6E: INT_MODE_(0); break; // IM $0 - case 0x6F: RLD_(); break; // LD R, A - case 0x70: IN_REG_(ALU, C); break; // IN 0, (C) - case 0x71: OUT_REG_(C, ZERO); break; // OUT (C), 0 - case 0x72: REG_OP_16_(SBC16, L, H, SPl, SPh); break; // SBC HL, SP - case 0x73: LD_16_IND_nn(SPl, SPh); break; // LD (nn), SP - case 0x74: INT_OP(NEG, A); break; // NEG - case 0x75: RETN_(); break; // RETN - case 0x76: INT_MODE_(1); break; // IM $1 - case 0x77: NOP_(); break; // NOP - case 0x78: IN_REG_(A, C); break; // IN A, (C) - case 0x79: OUT_REG_(C, A); break; // OUT (C), A - case 0x7A: REG_OP_16_(ADC16, L, H, SPl, SPh); break; // ADC HL, SP - case 0x7B: LD_IND_16_nn(SPl, SPh); break; // LD SP, (nn) - case 0x7C: INT_OP(NEG, A); break; // NEG - case 0x7D: RETN_(); break; // RETI - case 0x7E: INT_MODE_(2); break; // IM $2 - case 0x7F: NOP_(); break; // NOP - case 0xA0: LD_OP_R(INC16, 0); break; // LDI - case 0xA1: CP_OP_R(INC16, 0); break; // CPI - case 0xA2: IN_OP_R(INC16, 0); break; // INI - case 0xA3: OUT_OP_R(INC16, 0); break; // OUTI - case 0xA8: LD_OP_R(DEC16, 0); break; // LDD - case 0xA9: CP_OP_R(DEC16, 0); break; // CPD - case 0xAA: IN_OP_R(DEC16, 0); break; // IND - case 0xAB: OUT_OP_R(DEC16, 0); break; // OUTD - case 0xB0: LD_OP_R(INC16, 1); break; // LDIR - case 0xB1: CP_OP_R(INC16, 1); break; // CPIR - case 0xB2: IN_OP_R(INC16, 1); break; // INIR - case 0xB3: OUT_OP_R(INC16, 1); break; // OTIR - case 0xB8: LD_OP_R(DEC16, 1); break; // LDDR - case 0xB9: CP_OP_R(DEC16, 1); break; // CPDR - case 0xBA: IN_OP_R(DEC16, 1); break; // INDR - case 0xBB: OUT_OP_R(DEC16, 1); break; // OTDR - default: NOP_(); break; // NOP - + case 0x00: INT_OP(RLC, B); break; // RLC B + case 0x01: INT_OP(RLC, C); break; // RLC C + case 0x02: INT_OP(RLC, D); break; // RLC D + case 0x03: INT_OP(RLC, E); break; // RLC E + case 0x04: INT_OP(RLC, H); break; // RLC H + case 0x05: INT_OP(RLC, L); break; // RLC L + case 0x06: INT_OP_IND(RLC, L, H); break; // RLC (HL) + case 0x07: INT_OP(RLC, A); break; // RLC A + case 0x08: INT_OP(RRC, B); break; // RRC B + case 0x09: INT_OP(RRC, C); break; // RRC C + case 0x0A: INT_OP(RRC, D); break; // RRC D + case 0x0B: INT_OP(RRC, E); break; // RRC E + case 0x0C: INT_OP(RRC, H); break; // RRC H + case 0x0D: INT_OP(RRC, L); break; // RRC L + case 0x0E: INT_OP_IND(RRC, L, H); break; // RRC (HL) + case 0x0F: INT_OP(RRC, A); break; // RRC A + case 0x10: INT_OP(RL, B); break; // RL B + case 0x11: INT_OP(RL, C); break; // RL C + case 0x12: INT_OP(RL, D); break; // RL D + case 0x13: INT_OP(RL, E); break; // RL E + case 0x14: INT_OP(RL, H); break; // RL H + case 0x15: INT_OP(RL, L); break; // RL L + case 0x16: INT_OP_IND(RL, L, H); break; // RL (HL) + case 0x17: INT_OP(RL, A); break; // RL A + case 0x18: INT_OP(RR, B); break; // RR B + case 0x19: INT_OP(RR, C); break; // RR C + case 0x1A: INT_OP(RR, D); break; // RR D + case 0x1B: INT_OP(RR, E); break; // RR E + case 0x1C: INT_OP(RR, H); break; // RR H + case 0x1D: INT_OP(RR, L); break; // RR L + case 0x1E: INT_OP_IND(RR, L, H); break; // RR (HL) + case 0x1F: INT_OP(RR, A); break; // RR A + case 0x20: INT_OP(SLA, B); break; // SLA B + case 0x21: INT_OP(SLA, C); break; // SLA C + case 0x22: INT_OP(SLA, D); break; // SLA D + case 0x23: INT_OP(SLA, E); break; // SLA E + case 0x24: INT_OP(SLA, H); break; // SLA H + case 0x25: INT_OP(SLA, L); break; // SLA L + case 0x26: INT_OP_IND(SLA, L, H); break; // SLA (HL) + case 0x27: INT_OP(SLA, A); break; // SLA A + case 0x28: INT_OP(SRA, B); break; // SRA B + case 0x29: INT_OP(SRA, C); break; // SRA C + case 0x2A: INT_OP(SRA, D); break; // SRA D + case 0x2B: INT_OP(SRA, E); break; // SRA E + case 0x2C: INT_OP(SRA, H); break; // SRA H + case 0x2D: INT_OP(SRA, L); break; // SRA L + case 0x2E: INT_OP_IND(SRA, L, H); break; // SRA (HL) + case 0x2F: INT_OP(SRA, A); break; // SRA A + case 0x30: INT_OP(SLL, B); break; // SLL B + case 0x31: INT_OP(SLL, C); break; // SLL C + case 0x32: INT_OP(SLL, D); break; // SLL D + case 0x33: INT_OP(SLL, E); break; // SLL E + case 0x34: INT_OP(SLL, H); break; // SLL H + case 0x35: INT_OP(SLL, L); break; // SLL L + case 0x36: INT_OP_IND(SLL, L, H); break; // SLL (HL) + case 0x37: INT_OP(SLL, A); break; // SLL A + case 0x38: INT_OP(SRL, B); break; // SRL B + case 0x39: INT_OP(SRL, C); break; // SRL C + case 0x3A: INT_OP(SRL, D); break; // SRL D + case 0x3B: INT_OP(SRL, E); break; // SRL E + case 0x3C: INT_OP(SRL, H); break; // SRL H + case 0x3D: INT_OP(SRL, L); break; // SRL L + case 0x3E: INT_OP_IND(SRL, L, H); break; // SRL (HL) + case 0x3F: INT_OP(SRL, A); break; // SRL A + case 0x40: BIT_OP(BIT, 0, B); break; // BIT 0, B + case 0x41: BIT_OP(BIT, 0, C); break; // BIT 0, C + case 0x42: BIT_OP(BIT, 0, D); break; // BIT 0, D + case 0x43: BIT_OP(BIT, 0, E); break; // BIT 0, E + case 0x44: BIT_OP(BIT, 0, H); break; // BIT 0, H + case 0x45: BIT_OP(BIT, 0, L); break; // BIT 0, L + case 0x46: BIT_TE_IND(BIT, 0, L, H); break; // BIT 0, (HL) + case 0x47: BIT_OP(BIT, 0, A); break; // BIT 0, A + case 0x48: BIT_OP(BIT, 1, B); break; // BIT 1, B + case 0x49: BIT_OP(BIT, 1, C); break; // BIT 1, C + case 0x4A: BIT_OP(BIT, 1, D); break; // BIT 1, D + case 0x4B: BIT_OP(BIT, 1, E); break; // BIT 1, E + case 0x4C: BIT_OP(BIT, 1, H); break; // BIT 1, H + case 0x4D: BIT_OP(BIT, 1, L); break; // BIT 1, L + case 0x4E: BIT_TE_IND(BIT, 1, L, H); break; // BIT 1, (HL) + case 0x4F: BIT_OP(BIT, 1, A); break; // BIT 1, A + case 0x50: BIT_OP(BIT, 2, B); break; // BIT 2, B + case 0x51: BIT_OP(BIT, 2, C); break; // BIT 2, C + case 0x52: BIT_OP(BIT, 2, D); break; // BIT 2, D + case 0x53: BIT_OP(BIT, 2, E); break; // BIT 2, E + case 0x54: BIT_OP(BIT, 2, H); break; // BIT 2, H + case 0x55: BIT_OP(BIT, 2, L); break; // BIT 2, L + case 0x56: BIT_TE_IND(BIT, 2, L, H); break; // BIT 2, (HL) + case 0x57: BIT_OP(BIT, 2, A); break; // BIT 2, A + case 0x58: BIT_OP(BIT, 3, B); break; // BIT 3, B + case 0x59: BIT_OP(BIT, 3, C); break; // BIT 3, C + case 0x5A: BIT_OP(BIT, 3, D); break; // BIT 3, D + case 0x5B: BIT_OP(BIT, 3, E); break; // BIT 3, E + case 0x5C: BIT_OP(BIT, 3, H); break; // BIT 3, H + case 0x5D: BIT_OP(BIT, 3, L); break; // BIT 3, L + case 0x5E: BIT_TE_IND(BIT, 3, L, H); break; // BIT 3, (HL) + case 0x5F: BIT_OP(BIT, 3, A); break; // BIT 3, A + case 0x60: BIT_OP(BIT, 4, B); break; // BIT 4, B + case 0x61: BIT_OP(BIT, 4, C); break; // BIT 4, C + case 0x62: BIT_OP(BIT, 4, D); break; // BIT 4, D + case 0x63: BIT_OP(BIT, 4, E); break; // BIT 4, E + case 0x64: BIT_OP(BIT, 4, H); break; // BIT 4, H + case 0x65: BIT_OP(BIT, 4, L); break; // BIT 4, L + case 0x66: BIT_TE_IND(BIT, 4, L, H); break; // BIT 4, (HL) + case 0x67: BIT_OP(BIT, 4, A); break; // BIT 4, A + case 0x68: BIT_OP(BIT, 5, B); break; // BIT 5, B + case 0x69: BIT_OP(BIT, 5, C); break; // BIT 5, C + case 0x6A: BIT_OP(BIT, 5, D); break; // BIT 5, D + case 0x6B: BIT_OP(BIT, 5, E); break; // BIT 5, E + case 0x6C: BIT_OP(BIT, 5, H); break; // BIT 5, H + case 0x6D: BIT_OP(BIT, 5, L); break; // BIT 5, L + case 0x6E: BIT_TE_IND(BIT, 5, L, H); break; // BIT 5, (HL) + case 0x6F: BIT_OP(BIT, 5, A); break; // BIT 5, A + case 0x70: BIT_OP(BIT, 6, B); break; // BIT 6, B + case 0x71: BIT_OP(BIT, 6, C); break; // BIT 6, C + case 0x72: BIT_OP(BIT, 6, D); break; // BIT 6, D + case 0x73: BIT_OP(BIT, 6, E); break; // BIT 6, E + case 0x74: BIT_OP(BIT, 6, H); break; // BIT 6, H + case 0x75: BIT_OP(BIT, 6, L); break; // BIT 6, L + case 0x76: BIT_TE_IND(BIT, 6, L, H); break; // BIT 6, (HL) + case 0x77: BIT_OP(BIT, 6, A); break; // BIT 6, A + case 0x78: BIT_OP(BIT, 7, B); break; // BIT 7, B + case 0x79: BIT_OP(BIT, 7, C); break; // BIT 7, C + case 0x7A: BIT_OP(BIT, 7, D); break; // BIT 7, D + case 0x7B: BIT_OP(BIT, 7, E); break; // BIT 7, E + case 0x7C: BIT_OP(BIT, 7, H); break; // BIT 7, H + case 0x7D: BIT_OP(BIT, 7, L); break; // BIT 7, L + case 0x7E: BIT_TE_IND(BIT, 7, L, H); break; // BIT 7, (HL) + case 0x7F: BIT_OP(BIT, 7, A); break; // BIT 7, A + case 0x80: BIT_OP(RES, 0, B); break; // RES 0, B + case 0x81: BIT_OP(RES, 0, C); break; // RES 0, C + case 0x82: BIT_OP(RES, 0, D); break; // RES 0, D + case 0x83: BIT_OP(RES, 0, E); break; // RES 0, E + case 0x84: BIT_OP(RES, 0, H); break; // RES 0, H + case 0x85: BIT_OP(RES, 0, L); break; // RES 0, L + case 0x86: BIT_OP_IND(RES, 0, L, H); break; // RES 0, (HL) + case 0x87: BIT_OP(RES, 0, A); break; // RES 0, A + case 0x88: BIT_OP(RES, 1, B); break; // RES 1, B + case 0x89: BIT_OP(RES, 1, C); break; // RES 1, C + case 0x8A: BIT_OP(RES, 1, D); break; // RES 1, D + case 0x8B: BIT_OP(RES, 1, E); break; // RES 1, E + case 0x8C: BIT_OP(RES, 1, H); break; // RES 1, H + case 0x8D: BIT_OP(RES, 1, L); break; // RES 1, L + case 0x8E: BIT_OP_IND(RES, 1, L, H); break; // RES 1, (HL) + case 0x8F: BIT_OP(RES, 1, A); break; // RES 1, A + case 0x90: BIT_OP(RES, 2, B); break; // RES 2, B + case 0x91: BIT_OP(RES, 2, C); break; // RES 2, C + case 0x92: BIT_OP(RES, 2, D); break; // RES 2, D + case 0x93: BIT_OP(RES, 2, E); break; // RES 2, E + case 0x94: BIT_OP(RES, 2, H); break; // RES 2, H + case 0x95: BIT_OP(RES, 2, L); break; // RES 2, L + case 0x96: BIT_OP_IND(RES, 2, L, H); break; // RES 2, (HL) + case 0x97: BIT_OP(RES, 2, A); break; // RES 2, A + case 0x98: BIT_OP(RES, 3, B); break; // RES 3, B + case 0x99: BIT_OP(RES, 3, C); break; // RES 3, C + case 0x9A: BIT_OP(RES, 3, D); break; // RES 3, D + case 0x9B: BIT_OP(RES, 3, E); break; // RES 3, E + case 0x9C: BIT_OP(RES, 3, H); break; // RES 3, H + case 0x9D: BIT_OP(RES, 3, L); break; // RES 3, L + case 0x9E: BIT_OP_IND(RES, 3, L, H); break; // RES 3, (HL) + case 0x9F: BIT_OP(RES, 3, A); break; // RES 3, A + case 0xA0: BIT_OP(RES, 4, B); break; // RES 4, B + case 0xA1: BIT_OP(RES, 4, C); break; // RES 4, C + case 0xA2: BIT_OP(RES, 4, D); break; // RES 4, D + case 0xA3: BIT_OP(RES, 4, E); break; // RES 4, E + case 0xA4: BIT_OP(RES, 4, H); break; // RES 4, H + case 0xA5: BIT_OP(RES, 4, L); break; // RES 4, L + case 0xA6: BIT_OP_IND(RES, 4, L, H); break; // RES 4, (HL) + case 0xA7: BIT_OP(RES, 4, A); break; // RES 4, A + case 0xA8: BIT_OP(RES, 5, B); break; // RES 5, B + case 0xA9: BIT_OP(RES, 5, C); break; // RES 5, C + case 0xAA: BIT_OP(RES, 5, D); break; // RES 5, D + case 0xAB: BIT_OP(RES, 5, E); break; // RES 5, E + case 0xAC: BIT_OP(RES, 5, H); break; // RES 5, H + case 0xAD: BIT_OP(RES, 5, L); break; // RES 5, L + case 0xAE: BIT_OP_IND(RES, 5, L, H); break; // RES 5, (HL) + case 0xAF: BIT_OP(RES, 5, A); break; // RES 5, A + case 0xB0: BIT_OP(RES, 6, B); break; // RES 6, B + case 0xB1: BIT_OP(RES, 6, C); break; // RES 6, C + case 0xB2: BIT_OP(RES, 6, D); break; // RES 6, D + case 0xB3: BIT_OP(RES, 6, E); break; // RES 6, E + case 0xB4: BIT_OP(RES, 6, H); break; // RES 6, H + case 0xB5: BIT_OP(RES, 6, L); break; // RES 6, L + case 0xB6: BIT_OP_IND(RES, 6, L, H); break; // RES 6, (HL) + case 0xB7: BIT_OP(RES, 6, A); break; // RES 6, A + case 0xB8: BIT_OP(RES, 7, B); break; // RES 7, B + case 0xB9: BIT_OP(RES, 7, C); break; // RES 7, C + case 0xBA: BIT_OP(RES, 7, D); break; // RES 7, D + case 0xBB: BIT_OP(RES, 7, E); break; // RES 7, E + case 0xBC: BIT_OP(RES, 7, H); break; // RES 7, H + case 0xBD: BIT_OP(RES, 7, L); break; // RES 7, L + case 0xBE: BIT_OP_IND(RES, 7, L, H); break; // RES 7, (HL) + case 0xBF: BIT_OP(RES, 7, A); break; // RES 7, A + case 0xC0: BIT_OP(SET, 0, B); break; // SET 0, B + case 0xC1: BIT_OP(SET, 0, C); break; // SET 0, C + case 0xC2: BIT_OP(SET, 0, D); break; // SET 0, D + case 0xC3: BIT_OP(SET, 0, E); break; // SET 0, E + case 0xC4: BIT_OP(SET, 0, H); break; // SET 0, H + case 0xC5: BIT_OP(SET, 0, L); break; // SET 0, L + case 0xC6: BIT_OP_IND(SET, 0, L, H); break; // SET 0, (HL) + case 0xC7: BIT_OP(SET, 0, A); break; // SET 0, A + case 0xC8: BIT_OP(SET, 1, B); break; // SET 1, B + case 0xC9: BIT_OP(SET, 1, C); break; // SET 1, C + case 0xCA: BIT_OP(SET, 1, D); break; // SET 1, D + case 0xCB: BIT_OP(SET, 1, E); break; // SET 1, E + case 0xCC: BIT_OP(SET, 1, H); break; // SET 1, H + case 0xCD: BIT_OP(SET, 1, L); break; // SET 1, L + case 0xCE: BIT_OP_IND(SET, 1, L, H); break; // SET 1, (HL) + case 0xCF: BIT_OP(SET, 1, A); break; // SET 1, A + case 0xD0: BIT_OP(SET, 2, B); break; // SET 2, B + case 0xD1: BIT_OP(SET, 2, C); break; // SET 2, C + case 0xD2: BIT_OP(SET, 2, D); break; // SET 2, D + case 0xD3: BIT_OP(SET, 2, E); break; // SET 2, E + case 0xD4: BIT_OP(SET, 2, H); break; // SET 2, H + case 0xD5: BIT_OP(SET, 2, L); break; // SET 2, L + case 0xD6: BIT_OP_IND(SET, 2, L, H); break; // SET 2, (HL) + case 0xD7: BIT_OP(SET, 2, A); break; // SET 2, A + case 0xD8: BIT_OP(SET, 3, B); break; // SET 3, B + case 0xD9: BIT_OP(SET, 3, C); break; // SET 3, C + case 0xDA: BIT_OP(SET, 3, D); break; // SET 3, D + case 0xDB: BIT_OP(SET, 3, E); break; // SET 3, E + case 0xDC: BIT_OP(SET, 3, H); break; // SET 3, H + case 0xDD: BIT_OP(SET, 3, L); break; // SET 3, L + case 0xDE: BIT_OP_IND(SET, 3, L, H); break; // SET 3, (HL) + case 0xDF: BIT_OP(SET, 3, A); break; // SET 3, A + case 0xE0: BIT_OP(SET, 4, B); break; // SET 4, B + case 0xE1: BIT_OP(SET, 4, C); break; // SET 4, C + case 0xE2: BIT_OP(SET, 4, D); break; // SET 4, D + case 0xE3: BIT_OP(SET, 4, E); break; // SET 4, E + case 0xE4: BIT_OP(SET, 4, H); break; // SET 4, H + case 0xE5: BIT_OP(SET, 4, L); break; // SET 4, L + case 0xE6: BIT_OP_IND(SET, 4, L, H); break; // SET 4, (HL) + case 0xE7: BIT_OP(SET, 4, A); break; // SET 4, A + case 0xE8: BIT_OP(SET, 5, B); break; // SET 5, B + case 0xE9: BIT_OP(SET, 5, C); break; // SET 5, C + case 0xEA: BIT_OP(SET, 5, D); break; // SET 5, D + case 0xEB: BIT_OP(SET, 5, E); break; // SET 5, E + case 0xEC: BIT_OP(SET, 5, H); break; // SET 5, H + case 0xED: BIT_OP(SET, 5, L); break; // SET 5, L + case 0xEE: BIT_OP_IND(SET, 5, L, H); break; // SET 5, (HL) + case 0xEF: BIT_OP(SET, 5, A); break; // SET 5, A + case 0xF0: BIT_OP(SET, 6, B); break; // SET 6, B + case 0xF1: BIT_OP(SET, 6, C); break; // SET 6, C + case 0xF2: BIT_OP(SET, 6, D); break; // SET 6, D + case 0xF3: BIT_OP(SET, 6, E); break; // SET 6, E + case 0xF4: BIT_OP(SET, 6, H); break; // SET 6, H + case 0xF5: BIT_OP(SET, 6, L); break; // SET 6, L + case 0xF6: BIT_OP_IND(SET, 6, L, H); break; // SET 6, (HL) + case 0xF7: BIT_OP(SET, 6, A); break; // SET 6, A + case 0xF8: BIT_OP(SET, 7, B); break; // SET 7, B + case 0xF9: BIT_OP(SET, 7, C); break; // SET 7, C + case 0xFA: BIT_OP(SET, 7, D); break; // SET 7, D + case 0xFB: BIT_OP(SET, 7, E); break; // SET 7, E + case 0xFC: BIT_OP(SET, 7, H); break; // SET 7, H + case 0xFD: BIT_OP(SET, 7, L); break; // SET 7, L + case 0xFE: BIT_OP_IND(SET, 7, L, H); break; // SET 7, (HL) + case 0xFF: BIT_OP(SET, 7, A); break; // SET 7, A } - } - else if (IX_prefix) - { - IX_prefix = false; - NO_prefix = true; + + std::memcpy(&CBIndex[i * 38], &cur_instr, 38); + std::memcpy(&CBIndexBUSRQ[i * 19], &BUSRQ, 19); + std::memcpy(&CBIndexMEMRQ[i * 19], &MEMRQ, 19); + CBIndexIRQS[i] = IRQS; switch (opcode) { - case 0x00: NOP_(); break; // NOP - case 0x01: LD_IND_16(C, B, PCl, PCh); break; // LD BC, nn - case 0x02: LD_8_IND(C, B, A); break; // LD (BC), A - case 0x03: INC_16(C, B); break; // INC BC - case 0x04: INT_OP(INC8, B); break; // INC B - case 0x05: INT_OP(DEC8, B); break; // DEC B - case 0x06: LD_IND_8_INC(B, PCl, PCh); break; // LD B, n - case 0x07: INT_OP(RLC, Aim); break; // RLCA - case 0x08: EXCH_(); break; // EXCH AF, AF' - case 0x09: ADD_16(Ixl, Ixh, C, B); break; // ADD Ix, BC - case 0x0A: REG_OP_IND(TR, A, C, B); break; // LD A, (BC) - case 0x0B: DEC_16(C, B); break; // DEC BC - case 0x0C: INT_OP(INC8, C); break; // INC C - case 0x0D: INT_OP(DEC8, C); break; // DEC C - case 0x0E: LD_IND_8_INC(C, PCl, PCh); break; // LD C, n - case 0x0F: INT_OP(RRC, Aim); break; // RRCA - case 0x10: DJNZ_(); break; // DJNZ B - case 0x11: LD_IND_16(E, D, PCl, PCh); break; // LD DE, nn - case 0x12: LD_8_IND(E, D, A); break; // LD (DE), A - case 0x13: INC_16(E, D); break; // INC DE - case 0x14: INT_OP(INC8, D); break; // INC D - case 0x15: INT_OP(DEC8, D); break; // DEC D - case 0x16: LD_IND_8_INC(D, PCl, PCh); break; // LD D, n - case 0x17: INT_OP(RL, Aim); break; // RLA - case 0x18: JR_COND(true); break; // JR, r8 - case 0x19: ADD_16(Ixl, Ixh, E, D); break; // ADD Ix, DE - case 0x1A: REG_OP_IND(TR, A, E, D); break; // LD A, (DE) - case 0x1B: DEC_16(E, D); break; // DEC DE - case 0x1C: INT_OP(INC8, E); break; // INC E - case 0x1D: INT_OP(DEC8, E); break; // DEC E - case 0x1E: LD_IND_8_INC(E, PCl, PCh); break; // LD E, n - case 0x1F: INT_OP(RR, Aim); break; // RRA - case 0x20: JR_COND(!FlagZget()); break; // JR NZ, r8 - case 0x21: LD_IND_16(Ixl, Ixh, PCl, PCh); break; // LD Ix, nn - case 0x22: LD_16_IND_nn(Ixl, Ixh); break; // LD (nn), Ix - case 0x23: INC_16(Ixl, Ixh); break; // INC Ix - case 0x24: INT_OP(INC8, Ixh); break; // INC Ixh - case 0x25: INT_OP(DEC8, Ixh); break; // DEC Ixh - case 0x26: LD_IND_8_INC(Ixh, PCl, PCh); break; // LD Ixh, n - case 0x27: INT_OP(DA, A); break; // DAA - case 0x28: JR_COND(FlagZget()); break; // JR Z, r8 - case 0x29: ADD_16(Ixl, Ixh, Ixl, Ixh); break; // ADD Ix, Ix - case 0x2A: LD_IND_16_nn(Ixl, Ixh); break; // LD Ix, (nn) - case 0x2B: DEC_16(Ixl, Ixh); break; // DEC Ix - case 0x2C: INT_OP(INC8, Ixl); break; // INC Ixl - case 0x2D: INT_OP(DEC8, Ixl); break; // DEC Ixl - case 0x2E: LD_IND_8_INC(Ixl, PCl, PCh); break; // LD Ixl, n - case 0x2F: INT_OP(CPL, A); break; // CPL - case 0x30: JR_COND(!FlagCget()); break; // JR NC, r8 - case 0x31: LD_IND_16(SPl, SPh, PCl, PCh); break; // LD SP, nn - case 0x32: LD_8_IND_nn(A); break; // LD (nn), A - case 0x33: INC_16(SPl, SPh); break; // INC SP - case 0x34: I_OP_n(INC8, Ixl, Ixh); break; // INC (Ix + n) - case 0x35: I_OP_n(DEC8, Ixl, Ixh); break; // DEC (Ix + n) - case 0x36: I_OP_n_n(Ixl, Ixh); break; // LD (Ix + n), n - case 0x37: INT_OP(SCF, A); break; // SCF - case 0x38: JR_COND(FlagCget()); break; // JR C, r8 - case 0x39: ADD_16(Ixl, Ixh, SPl, SPh); break; // ADD Ix, SP - case 0x3A: LD_IND_8_nn(A); break; // LD A, (nn) - case 0x3B: DEC_16(SPl, SPh); break; // DEC SP - case 0x3C: INT_OP(INC8, A); break; // INC A - case 0x3D: INT_OP(DEC8, A); break; // DEC A - case 0x3E: LD_IND_8_INC(A, PCl, PCh); break; // LD A, n - case 0x3F: INT_OP(CCF, A); break; // CCF - case 0x40: REG_OP(TR, B, B); break; // LD B, B - case 0x41: REG_OP(TR, B, C); break; // LD B, C - case 0x42: REG_OP(TR, B, D); break; // LD B, D - case 0x43: REG_OP(TR, B, E); break; // LD B, E - case 0x44: REG_OP(TR, B, Ixh); break; // LD B, Ixh - case 0x45: REG_OP(TR, B, Ixl); break; // LD B, Ixl - case 0x46: I_REG_OP_IND_n(TR, B, Ixl, Ixh); break; // LD B, (Ix + n) - case 0x47: REG_OP(TR, B, A); break; // LD B, A - case 0x48: REG_OP(TR, C, B); break; // LD C, B - case 0x49: REG_OP(TR, C, C); break; // LD C, C - case 0x4A: REG_OP(TR, C, D); break; // LD C, D - case 0x4B: REG_OP(TR, C, E); break; // LD C, E - case 0x4C: REG_OP(TR, C, Ixh); break; // LD C, Ixh - case 0x4D: REG_OP(TR, C, Ixl); break; // LD C, Ixl - case 0x4E: I_REG_OP_IND_n(TR, C, Ixl, Ixh); break; // LD C, (Ix + n) - case 0x4F: REG_OP(TR, C, A); break; // LD C, A - case 0x50: REG_OP(TR, D, B); break; // LD D, B - case 0x51: REG_OP(TR, D, C); break; // LD D, C - case 0x52: REG_OP(TR, D, D); break; // LD D, D - case 0x53: REG_OP(TR, D, E); break; // LD D, E - case 0x54: REG_OP(TR, D, Ixh); break; // LD D, Ixh - case 0x55: REG_OP(TR, D, Ixl); break; // LD D, Ixl - case 0x56: I_REG_OP_IND_n(TR, D, Ixl, Ixh); break; // LD D, (Ix + n) - case 0x57: REG_OP(TR, D, A); break; // LD D, A - case 0x58: REG_OP(TR, E, B); break; // LD E, B - case 0x59: REG_OP(TR, E, C); break; // LD E, C - case 0x5A: REG_OP(TR, E, D); break; // LD E, D - case 0x5B: REG_OP(TR, E, E); break; // LD E, E - case 0x5C: REG_OP(TR, E, Ixh); break; // LD E, Ixh - case 0x5D: REG_OP(TR, E, Ixl); break; // LD E, Ixl - case 0x5E: I_REG_OP_IND_n(TR, E, Ixl, Ixh); break; // LD E, (Ix + n) - case 0x5F: REG_OP(TR, E, A); break; // LD E, A - case 0x60: REG_OP(TR, Ixh, B); break; // LD Ixh, B - case 0x61: REG_OP(TR, Ixh, C); break; // LD Ixh, C - case 0x62: REG_OP(TR, Ixh, D); break; // LD Ixh, D - case 0x63: REG_OP(TR, Ixh, E); break; // LD Ixh, E - case 0x64: REG_OP(TR, Ixh, Ixh); break; // LD Ixh, Ixh - case 0x65: REG_OP(TR, Ixh, Ixl); break; // LD Ixh, Ixl - case 0x66: I_REG_OP_IND_n(TR, H, Ixl, Ixh); break; // LD H, (Ix + n) - case 0x67: REG_OP(TR, Ixh, A); break; // LD Ixh, A - case 0x68: REG_OP(TR, Ixl, B); break; // LD Ixl, B - case 0x69: REG_OP(TR, Ixl, C); break; // LD Ixl, C - case 0x6A: REG_OP(TR, Ixl, D); break; // LD Ixl, D - case 0x6B: REG_OP(TR, Ixl, E); break; // LD Ixl, E - case 0x6C: REG_OP(TR, Ixl, Ixh); break; // LD Ixl, Ixh - case 0x6D: REG_OP(TR, Ixl, Ixl); break; // LD Ixl, Ixl - case 0x6E: I_REG_OP_IND_n(TR, L, Ixl, Ixh); break; // LD L, (Ix + n) - case 0x6F: REG_OP(TR, Ixl, A); break; // LD Ixl, A - case 0x70: I_LD_8_IND_n(Ixl, Ixh, B); break; // LD (Ix + n), B - case 0x71: I_LD_8_IND_n(Ixl, Ixh, C); break; // LD (Ix + n), C - case 0x72: I_LD_8_IND_n(Ixl, Ixh, D); break; // LD (Ix + n), D - case 0x73: I_LD_8_IND_n(Ixl, Ixh, E); break; // LD (Ix + n), E - case 0x74: I_LD_8_IND_n(Ixl, Ixh, H); break; // LD (Ix + n), H - case 0x75: I_LD_8_IND_n(Ixl, Ixh, L); break; // LD (Ix + n), L - case 0x76: HALT_(); break; // HALT - case 0x77: I_LD_8_IND_n(Ixl, Ixh, A); break; // LD (Ix + n), A - case 0x78: REG_OP(TR, A, B); break; // LD A, B - case 0x79: REG_OP(TR, A, C); break; // LD A, C - case 0x7A: REG_OP(TR, A, D); break; // LD A, D - case 0x7B: REG_OP(TR, A, E); break; // LD A, E - case 0x7C: REG_OP(TR, A, Ixh); break; // LD A, Ixh - case 0x7D: REG_OP(TR, A, Ixl); break; // LD A, Ixl - case 0x7E: I_REG_OP_IND_n(TR, A, Ixl, Ixh); break; // LD A, (Ix + n) - case 0x7F: REG_OP(TR, A, A); break; // LD A, A - case 0x80: REG_OP(ADD8, A, B); break; // ADD A, B - case 0x81: REG_OP(ADD8, A, C); break; // ADD A, C - case 0x82: REG_OP(ADD8, A, D); break; // ADD A, D - case 0x83: REG_OP(ADD8, A, E); break; // ADD A, E - case 0x84: REG_OP(ADD8, A, Ixh); break; // ADD A, Ixh - case 0x85: REG_OP(ADD8, A, Ixl); break; // ADD A, Ixl - case 0x86: I_REG_OP_IND_n(ADD8, A, Ixl, Ixh); break; // ADD A, (Ix + n) - case 0x87: REG_OP(ADD8, A, A); break; // ADD A, A - case 0x88: REG_OP(ADC8, A, B); break; // ADC A, B - case 0x89: REG_OP(ADC8, A, C); break; // ADC A, C - case 0x8A: REG_OP(ADC8, A, D); break; // ADC A, D - case 0x8B: REG_OP(ADC8, A, E); break; // ADC A, E - case 0x8C: REG_OP(ADC8, A, Ixh); break; // ADC A, Ixh - case 0x8D: REG_OP(ADC8, A, Ixl); break; // ADC A, Ixl - case 0x8E: I_REG_OP_IND_n(ADC8, A, Ixl, Ixh); break; // ADC A, (Ix + n) - case 0x8F: REG_OP(ADC8, A, A); break; // ADC A, A - case 0x90: REG_OP(SUB8, A, B); break; // SUB A, B - case 0x91: REG_OP(SUB8, A, C); break; // SUB A, C - case 0x92: REG_OP(SUB8, A, D); break; // SUB A, D - case 0x93: REG_OP(SUB8, A, E); break; // SUB A, E - case 0x94: REG_OP(SUB8, A, Ixh); break; // SUB A, Ixh - case 0x95: REG_OP(SUB8, A, Ixl); break; // SUB A, Ixl - case 0x96: I_REG_OP_IND_n(SUB8, A, Ixl, Ixh); break; // SUB A, (Ix + n) - case 0x97: REG_OP(SUB8, A, A); break; // SUB A, A - case 0x98: REG_OP(SBC8, A, B); break; // SBC A, B - case 0x99: REG_OP(SBC8, A, C); break; // SBC A, C - case 0x9A: REG_OP(SBC8, A, D); break; // SBC A, D - case 0x9B: REG_OP(SBC8, A, E); break; // SBC A, E - case 0x9C: REG_OP(SBC8, A, Ixh); break; // SBC A, Ixh - case 0x9D: REG_OP(SBC8, A, Ixl); break; // SBC A, Ixl - case 0x9E: I_REG_OP_IND_n(SBC8, A, Ixl, Ixh); break; // SBC A, (Ix + n) - case 0x9F: REG_OP(SBC8, A, A); break; // SBC A, A - case 0xA0: REG_OP(AND8, A, B); break; // AND A, B - case 0xA1: REG_OP(AND8, A, C); break; // AND A, C - case 0xA2: REG_OP(AND8, A, D); break; // AND A, D - case 0xA3: REG_OP(AND8, A, E); break; // AND A, E - case 0xA4: REG_OP(AND8, A, Ixh); break; // AND A, Ixh - case 0xA5: REG_OP(AND8, A, Ixl); break; // AND A, Ixl - case 0xA6: I_REG_OP_IND_n(AND8, A, Ixl, Ixh); break; // AND A, (Ix + n) - case 0xA7: REG_OP(AND8, A, A); break; // AND A, A - case 0xA8: REG_OP(XOR8, A, B); break; // XOR A, B - case 0xA9: REG_OP(XOR8, A, C); break; // XOR A, C - case 0xAA: REG_OP(XOR8, A, D); break; // XOR A, D - case 0xAB: REG_OP(XOR8, A, E); break; // XOR A, E - case 0xAC: REG_OP(XOR8, A, Ixh); break; // XOR A, Ixh - case 0xAD: REG_OP(XOR8, A, Ixl); break; // XOR A, Ixl - case 0xAE: I_REG_OP_IND_n(XOR8, A, Ixl, Ixh); break; // XOR A, (Ix + n) - case 0xAF: REG_OP(XOR8, A, A); break; // XOR A, A - case 0xB0: REG_OP(OR8, A, B); break; // OR A, B - case 0xB1: REG_OP(OR8, A, C); break; // OR A, C - case 0xB2: REG_OP(OR8, A, D); break; // OR A, D - case 0xB3: REG_OP(OR8, A, E); break; // OR A, E - case 0xB4: REG_OP(OR8, A, Ixh); break; // OR A, Ixh - case 0xB5: REG_OP(OR8, A, Ixl); break; // OR A, Ixl - case 0xB6: I_REG_OP_IND_n(OR8, A, Ixl, Ixh); break; // OR A, (Ix + n) - case 0xB7: REG_OP(OR8, A, A); break; // OR A, A - case 0xB8: REG_OP(CP8, A, B); break; // CP A, B - case 0xB9: REG_OP(CP8, A, C); break; // CP A, C - case 0xBA: REG_OP(CP8, A, D); break; // CP A, D - case 0xBB: REG_OP(CP8, A, E); break; // CP A, E - case 0xBC: REG_OP(CP8, A, Ixh); break; // CP A, Ixh - case 0xBD: REG_OP(CP8, A, Ixl); break; // CP A, Ixl - case 0xBE: I_REG_OP_IND_n(CP8, A, Ixl, Ixh); break; // CP A, (Ix + n) - case 0xBF: REG_OP(CP8, A, A); break; // CP A, A - case 0xC0: RET_COND(!FlagZget()); break; // Ret NZ - case 0xC1: POP_(C, B); break; // POP BC - case 0xC2: JP_COND(!FlagZget()); break; // JP NZ - case 0xC3: JP_COND(true); break; // JP - case 0xC4: CALL_COND(!FlagZget()); break; // CALL NZ - case 0xC5: PUSH_(C, B); break; // PUSH BC - case 0xC6: REG_OP_IND_INC(ADD8, A, PCl, PCh); break; // ADD A, n - case 0xC7: RST_(0); break; // RST 0 - case 0xC8: RET_COND(FlagZget()); break; // RET Z - case 0xC9: RET_(); break; // RET - case 0xCA: JP_COND(FlagZget()); break; // JP Z - case 0xCB: PREFETCH_(IXCBpre); break; // PREFIX IXCB - case 0xCC: CALL_COND(FlagZget()); break; // CALL Z - case 0xCD: CALL_COND(true); break; // CALL - case 0xCE: REG_OP_IND_INC(ADC8, A, PCl, PCh); break; // ADC A, n - case 0xCF: RST_(0x08); break; // RST 0x08 - case 0xD0: RET_COND(!FlagCget()); break; // Ret NC - case 0xD1: POP_(E, D); break; // POP DE - case 0xD2: JP_COND(!FlagCget()); break; // JP NC - case 0xD3: OUT_(); break; // OUT A - case 0xD4: CALL_COND(!FlagCget()); break; // CALL NC - case 0xD5: PUSH_(E, D); break; // PUSH DE - case 0xD6: REG_OP_IND_INC(SUB8, A, PCl, PCh); break; // SUB A, n - case 0xD7: RST_(0x10); break; // RST 0x10 - case 0xD8: RET_COND(FlagCget()); break; // RET C - case 0xD9: EXX_(); break; // EXX - case 0xDA: JP_COND(FlagCget()); break; // JP C - case 0xDB: IN_(); break; // IN A - case 0xDC: CALL_COND(FlagCget()); break; // CALL C - case 0xDD: PREFIX_(IXpre); break; // IX Prefix - case 0xDE: REG_OP_IND_INC(SBC8, A, PCl, PCh); break; // SBC A, n - case 0xDF: RST_(0x18); break; // RST 0x18 - case 0xE0: RET_COND(!FlagPget()); break; // RET Po - case 0xE1: POP_(Ixl, Ixh); break; // POP Ix - case 0xE2: JP_COND(!FlagPget()); break; // JP Po - case 0xE3: EXCH_16_IND_(SPl, SPh, Ixl, Ixh); break; // ex (SP), Ix - case 0xE4: CALL_COND(!FlagPget()); break; // CALL Po - case 0xE5: PUSH_(Ixl, Ixh); break; // PUSH Ix - case 0xE6: REG_OP_IND_INC(AND8, A, PCl, PCh); break; // AND A, n - case 0xE7: RST_(0x20); break; // RST 0x20 - case 0xE8: RET_COND(FlagPget()); break; // RET Pe - case 0xE9: JP_16(Ixl, Ixh); break; // JP (Ix) - case 0xEA: JP_COND(FlagPget()); break; // JP Pe - case 0xEB: EXCH_16_(E, D, L, H); break; // ex DE, HL - case 0xEC: CALL_COND(FlagPget()); break; // CALL Pe - case 0xED: PREFIX_(EXTDpre); break; // EXTD Prefix - case 0xEE: REG_OP_IND_INC(XOR8, A, PCl, PCh); break; // XOR A, n - case 0xEF: RST_(0x28); break; // RST 0x28 - case 0xF0: RET_COND(!FlagSget()); break; // RET p - case 0xF1: POP_(F, A); break; // POP AF - case 0xF2: JP_COND(!FlagSget()); break; // JP p - case 0xF3: DI_(); break; // DI - case 0xF4: CALL_COND(!FlagSget()); break; // CALL p - case 0xF5: PUSH_(F, A); break; // PUSH AF - case 0xF6: REG_OP_IND_INC(OR8, A, PCl, PCh); break; // OR A, n - case 0xF7: RST_(0x30); break; // RST 0x30 - case 0xF8: RET_COND(FlagSget()); break; // RET M - case 0xF9: LD_SP_16(Ixl, Ixh); break; // LD SP, Ix - case 0xFA: JP_COND(FlagSget()); break; // JP M - case 0xFB: EI_(); break; // EI - case 0xFC: CALL_COND(FlagSget()); break; // CALL M - case 0xFD: PREFIX_(IYpre); break; // IY Prefix - case 0xFE: REG_OP_IND_INC(CP8, A, PCl, PCh); break; // CP A, n - case 0xFF: RST_(0x38); break; // RST $38 + case 0x40: IN_REG_(B, C); break; // IN B, (C) + case 0x41: OUT_REG_(C, B); break; // OUT (C), B + case 0x42: REG_OP_16_(SBC16, L, H, C, B); break; // SBC HL, BC + case 0x43: LD_16_IND_nn(C, B); break; // LD (nn), BC + case 0x44: INT_OP(NEG, A); break; // NEG + case 0x45: RETN_(); break; // RETN + case 0x46: INT_MODE_(0); break; // IM $0 + case 0x47: REG_OP_IR(TR, I, A); break; // LD I, A + case 0x48: IN_REG_(C, C); break; // IN C, (C) + case 0x49: OUT_REG_(C, C); break; // OUT (C), C + case 0x4A: REG_OP_16_(ADC16, L, H, C, B); break; // ADC HL, BC + case 0x4B: LD_IND_16_nn(C, B); break; // LD BC, (nn) + case 0x4C: INT_OP(NEG, A); break; // NEG + case 0x4D: RETI_(); break; // RETI + case 0x4E: INT_MODE_(0); break; // IM $0 + case 0x4F: REG_OP_IR(TR, R, A); break; // LD R, A + case 0x50: IN_REG_(D, C); break; // IN D, (C) + case 0x51: OUT_REG_(C, D); break; // OUT (C), D + case 0x52: REG_OP_16_(SBC16, L, H, E, D); break; // SBC HL, DE + case 0x53: LD_16_IND_nn(E, D); break; // LD (nn), DE + case 0x54: INT_OP(NEG, A); break; // NEG + case 0x55: RETN_(); break; // RETN + case 0x56: INT_MODE_(1); break; // IM $1 + case 0x57: REG_OP_IR(TR, A, I); break; // LD A, I + case 0x58: IN_REG_(E, C); break; // IN E, (C) + case 0x59: OUT_REG_(C, E); break; // OUT (C), E + case 0x5A: REG_OP_16_(ADC16, L, H, E, D); break; // ADC HL, DE + case 0x5B: LD_IND_16_nn(E, D); break; // LD DE, (nn) + case 0x5C: INT_OP(NEG, A); break; // NEG + case 0x5D: RETN_(); break; // RETI + case 0x5E: INT_MODE_(2); break; // IM $0 + case 0x5F: REG_OP_IR(TR, A, R); break; // LD A, R + case 0x60: IN_REG_(H, C); break; // IN H, (C) + case 0x61: OUT_REG_(C, H); break; // OUT (C), H + case 0x62: REG_OP_16_(SBC16, L, H, L, H); break; // SBC HL, HL + case 0x63: LD_16_IND_nn(L, H); break; // LD (nn), HL + case 0x64: INT_OP(NEG, A); break; // NEG + case 0x65: RETN_(); break; // RETN + case 0x66: INT_MODE_(0); break; // IM $0 + case 0x67: RRD_(); break; // RRD + case 0x68: IN_REG_(L, C); break; // IN L, (C) + case 0x69: OUT_REG_(C, L); break; // OUT (C), L + case 0x6A: REG_OP_16_(ADC16, L, H, L, H); break; // ADC HL, HL + case 0x6B: LD_IND_16_nn(L, H); break; // LD HL, (nn) + case 0x6C: INT_OP(NEG, A); break; // NEG + case 0x6D: RETN_(); break; // RETI + case 0x6E: INT_MODE_(0); break; // IM $0 + case 0x6F: RLD_(); break; // LD R, A + case 0x70: IN_REG_(ALU, C); break; // IN 0, (C) + case 0x71: OUT_REG_(C, ZERO); break; // OUT (C), 0 + case 0x72: REG_OP_16_(SBC16, L, H, SPl, SPh); break; // SBC HL, SP + case 0x73: LD_16_IND_nn(SPl, SPh); break; // LD (nn), SP + case 0x74: INT_OP(NEG, A); break; // NEG + case 0x75: RETN_(); break; // RETN + case 0x76: INT_MODE_(1); break; // IM $1 + case 0x77: NOP_(); break; // NOP + case 0x78: IN_REG_(A, C); break; // IN A, (C) + case 0x79: OUT_REG_(C, A); break; // OUT (C), A + case 0x7A: REG_OP_16_(ADC16, L, H, SPl, SPh); break; // ADC HL, SP + case 0x7B: LD_IND_16_nn(SPl, SPh); break; // LD SP, (nn) + case 0x7C: INT_OP(NEG, A); break; // NEG + case 0x7D: RETN_(); break; // RETI + case 0x7E: INT_MODE_(2); break; // IM $2 + case 0x7F: NOP_(); break; // NOP + case 0xA0: LD_OP_R(INC16, 0); break; // LDI + case 0xA1: CP_OP_R(INC16, 0); break; // CPI + case 0xA2: IN_OP_R(INC16, 0); break; // INI + case 0xA3: OUT_OP_R(INC16, 0); break; // OUTI + case 0xA8: LD_OP_R(DEC16, 0); break; // LDD + case 0xA9: CP_OP_R(DEC16, 0); break; // CPD + case 0xAA: IN_OP_R(DEC16, 0); break; // IND + case 0xAB: OUT_OP_R(DEC16, 0); break; // OUTD + case 0xB0: LD_OP_R(INC16, 1); break; // LDIR + case 0xB1: CP_OP_R(INC16, 1); break; // CPIR + case 0xB2: IN_OP_R(INC16, 1); break; // INIR + case 0xB3: OUT_OP_R(INC16, 1); break; // OTIR + case 0xB8: LD_OP_R(DEC16, 1); break; // LDDR + case 0xB9: CP_OP_R(DEC16, 1); break; // CPDR + case 0xBA: IN_OP_R(DEC16, 1); break; // INDR + case 0xBB: OUT_OP_R(DEC16, 1); break; // OTDR + default: NOP_(); break; // NOP + } - } - else if (IY_prefix) - { - IY_prefix = false; - NO_prefix = true; + + std::memcpy(&EXTIndex[i * 38], &cur_instr, 38); + std::memcpy(&EXTIndexBUSRQ[i * 19], &BUSRQ, 19); + std::memcpy(&EXTIndexMEMRQ[i * 19], &MEMRQ, 19); + EXTIndexIRQS[i] = IRQS; switch (opcode) { - case 0x00: NOP_(); break; // NOP - case 0x01: LD_IND_16(C, B, PCl, PCh); break; // LD BC, nn - case 0x02: LD_8_IND(C, B, A); break; // LD (BC), A - case 0x03: INC_16(C, B); break; // INC BC - case 0x04: INT_OP(INC8, B); break; // INC B - case 0x05: INT_OP(DEC8, B); break; // DEC B - case 0x06: LD_IND_8_INC(B, PCl, PCh); break; // LD B, n - case 0x07: INT_OP(RLC, Aim); break; // RLCA - case 0x08: EXCH_(); break; // EXCH AF, AF' - case 0x09: ADD_16(Iyl, Iyh, C, B); break; // ADD Iy, BC - case 0x0A: REG_OP_IND(TR, A, C, B); break; // LD A, (BC) - case 0x0B: DEC_16(C, B); break; // DEC BC - case 0x0C: INT_OP(INC8, C); break; // INC C - case 0x0D: INT_OP(DEC8, C); break; // DEC C - case 0x0E: LD_IND_8_INC(C, PCl, PCh); break; // LD C, n - case 0x0F: INT_OP(RRC, Aim); break; // RRCA - case 0x10: DJNZ_(); break; // DJNZ B - case 0x11: LD_IND_16(E, D, PCl, PCh); break; // LD DE, nn - case 0x12: LD_8_IND(E, D, A); break; // LD (DE), A - case 0x13: INC_16(E, D); break; // INC DE - case 0x14: INT_OP(INC8, D); break; // INC D - case 0x15: INT_OP(DEC8, D); break; // DEC D - case 0x16: LD_IND_8_INC(D, PCl, PCh); break; // LD D, n - case 0x17: INT_OP(RL, Aim); break; // RLA - case 0x18: JR_COND(true); break; // JR, r8 - case 0x19: ADD_16(Iyl, Iyh, E, D); break; // ADD Iy, DE - case 0x1A: REG_OP_IND(TR, A, E, D); break; // LD A, (DE) - case 0x1B: DEC_16(E, D); break; // DEC DE - case 0x1C: INT_OP(INC8, E); break; // INC E - case 0x1D: INT_OP(DEC8, E); break; // DEC E - case 0x1E: LD_IND_8_INC(E, PCl, PCh); break; // LD E, n - case 0x1F: INT_OP(RR, Aim); break; // RRA - case 0x20: JR_COND(!FlagZget()); break; // JR NZ, r8 - case 0x21: LD_IND_16(Iyl, Iyh, PCl, PCh); break; // LD Iy, nn - case 0x22: LD_16_IND_nn(Iyl, Iyh); break; // LD (nn), Iy - case 0x23: INC_16(Iyl, Iyh); break; // INC Iy - case 0x24: INT_OP(INC8, Iyh); break; // INC Iyh - case 0x25: INT_OP(DEC8, Iyh); break; // DEC Iyh - case 0x26: LD_IND_8_INC(Iyh, PCl, PCh); break; // LD Iyh, n - case 0x27: INT_OP(DA, A); break; // DAA - case 0x28: JR_COND(FlagZget()); break; // JR Z, r8 - case 0x29: ADD_16(Iyl, Iyh, Iyl, Iyh); break; // ADD Iy, Iy - case 0x2A: LD_IND_16_nn(Iyl, Iyh); break; // LD Iy, (nn) - case 0x2B: DEC_16(Iyl, Iyh); break; // DEC Iy - case 0x2C: INT_OP(INC8, Iyl); break; // INC Iyl - case 0x2D: INT_OP(DEC8, Iyl); break; // DEC Iyl - case 0x2E: LD_IND_8_INC(Iyl, PCl, PCh); break; // LD Iyl, n - case 0x2F: INT_OP(CPL, A); break; // CPL - case 0x30: JR_COND(!FlagCget()); break; // JR NC, r8 - case 0x31: LD_IND_16(SPl, SPh, PCl, PCh); break; // LD SP, nn - case 0x32: LD_8_IND_nn(A); break; // LD (nn), A - case 0x33: INC_16(SPl, SPh); break; // INC SP - case 0x34: I_OP_n(INC8, Iyl, Iyh); break; // INC (Iy + n) - case 0x35: I_OP_n(DEC8, Iyl, Iyh); break; // DEC (Iy + n) - case 0x36: I_OP_n_n(Iyl, Iyh); break; // LD (Iy + n), n - case 0x37: INT_OP(SCF, A); break; // SCF - case 0x38: JR_COND(FlagCget()); break; // JR C, r8 - case 0x39: ADD_16(Iyl, Iyh, SPl, SPh); break; // ADD Iy, SP - case 0x3A: LD_IND_8_nn(A); break; // LD A, (nn) - case 0x3B: DEC_16(SPl, SPh); break; // DEC SP - case 0x3C: INT_OP(INC8, A); break; // INC A - case 0x3D: INT_OP(DEC8, A); break; // DEC A - case 0x3E: LD_IND_8_INC(A, PCl, PCh); break; // LD A, n - case 0x3F: INT_OP(CCF, A); break; // CCF - case 0x40: REG_OP(TR, B, B); break; // LD B, B - case 0x41: REG_OP(TR, B, C); break; // LD B, C - case 0x42: REG_OP(TR, B, D); break; // LD B, D - case 0x43: REG_OP(TR, B, E); break; // LD B, E - case 0x44: REG_OP(TR, B, Iyh); break; // LD B, Iyh - case 0x45: REG_OP(TR, B, Iyl); break; // LD B, Iyl - case 0x46: I_REG_OP_IND_n(TR, B, Iyl, Iyh); break; // LD B, (Iy + n) - case 0x47: REG_OP(TR, B, A); break; // LD B, A - case 0x48: REG_OP(TR, C, B); break; // LD C, B - case 0x49: REG_OP(TR, C, C); break; // LD C, C - case 0x4A: REG_OP(TR, C, D); break; // LD C, D - case 0x4B: REG_OP(TR, C, E); break; // LD C, E - case 0x4C: REG_OP(TR, C, Iyh); break; // LD C, Iyh - case 0x4D: REG_OP(TR, C, Iyl); break; // LD C, Iyl - case 0x4E: I_REG_OP_IND_n(TR, C, Iyl, Iyh); break; // LD C, (Iy + n) - case 0x4F: REG_OP(TR, C, A); break; // LD C, A - case 0x50: REG_OP(TR, D, B); break; // LD D, B - case 0x51: REG_OP(TR, D, C); break; // LD D, C - case 0x52: REG_OP(TR, D, D); break; // LD D, D - case 0x53: REG_OP(TR, D, E); break; // LD D, E - case 0x54: REG_OP(TR, D, Iyh); break; // LD D, Iyh - case 0x55: REG_OP(TR, D, Iyl); break; // LD D, Iyl - case 0x56: I_REG_OP_IND_n(TR, D, Iyl, Iyh); break; // LD D, (Iy + n) - case 0x57: REG_OP(TR, D, A); break; // LD D, A - case 0x58: REG_OP(TR, E, B); break; // LD E, B - case 0x59: REG_OP(TR, E, C); break; // LD E, C - case 0x5A: REG_OP(TR, E, D); break; // LD E, D - case 0x5B: REG_OP(TR, E, E); break; // LD E, E - case 0x5C: REG_OP(TR, E, Iyh); break; // LD E, Iyh - case 0x5D: REG_OP(TR, E, Iyl); break; // LD E, Iyl - case 0x5E: I_REG_OP_IND_n(TR, E, Iyl, Iyh); break; // LD E, (Iy + n) - case 0x5F: REG_OP(TR, E, A); break; // LD E, A - case 0x60: REG_OP(TR, Iyh, B); break; // LD Iyh, B - case 0x61: REG_OP(TR, Iyh, C); break; // LD Iyh, C - case 0x62: REG_OP(TR, Iyh, D); break; // LD Iyh, D - case 0x63: REG_OP(TR, Iyh, E); break; // LD Iyh, E - case 0x64: REG_OP(TR, Iyh, Iyh); break; // LD Iyh, Iyh - case 0x65: REG_OP(TR, Iyh, Iyl); break; // LD Iyh, Iyl - case 0x66: I_REG_OP_IND_n(TR, H, Iyl, Iyh); break; // LD H, (Iy + n) - case 0x67: REG_OP(TR, Iyh, A); break; // LD Iyh, A - case 0x68: REG_OP(TR, Iyl, B); break; // LD Iyl, B - case 0x69: REG_OP(TR, Iyl, C); break; // LD Iyl, C - case 0x6A: REG_OP(TR, Iyl, D); break; // LD Iyl, D - case 0x6B: REG_OP(TR, Iyl, E); break; // LD Iyl, E - case 0x6C: REG_OP(TR, Iyl, Iyh); break; // LD Iyl, Iyh - case 0x6D: REG_OP(TR, Iyl, Iyl); break; // LD Iyl, Iyl - case 0x6E: I_REG_OP_IND_n(TR, L, Iyl, Iyh); break; // LD L, (Iy + n) - case 0x6F: REG_OP(TR, Iyl, A); break; // LD Iyl, A - case 0x70: I_LD_8_IND_n(Iyl, Iyh, B); break; // LD (Iy + n), B - case 0x71: I_LD_8_IND_n(Iyl, Iyh, C); break; // LD (Iy + n), C - case 0x72: I_LD_8_IND_n(Iyl, Iyh, D); break; // LD (Iy + n), D - case 0x73: I_LD_8_IND_n(Iyl, Iyh, E); break; // LD (Iy + n), E - case 0x74: I_LD_8_IND_n(Iyl, Iyh, H); break; // LD (Iy + n), H - case 0x75: I_LD_8_IND_n(Iyl, Iyh, L); break; // LD (Iy + n), L - case 0x76: HALT_(); break; // HALT - case 0x77: I_LD_8_IND_n(Iyl, Iyh, A); break; // LD (Iy + n), A - case 0x78: REG_OP(TR, A, B); break; // LD A, B - case 0x79: REG_OP(TR, A, C); break; // LD A, C - case 0x7A: REG_OP(TR, A, D); break; // LD A, D - case 0x7B: REG_OP(TR, A, E); break; // LD A, E - case 0x7C: REG_OP(TR, A, Iyh); break; // LD A, Iyh - case 0x7D: REG_OP(TR, A, Iyl); break; // LD A, Iyl - case 0x7E: I_REG_OP_IND_n(TR, A, Iyl, Iyh); break; // LD A, (Iy + n) - case 0x7F: REG_OP(TR, A, A); break; // LD A, A - case 0x80: REG_OP(ADD8, A, B); break; // ADD A, B - case 0x81: REG_OP(ADD8, A, C); break; // ADD A, C - case 0x82: REG_OP(ADD8, A, D); break; // ADD A, D - case 0x83: REG_OP(ADD8, A, E); break; // ADD A, E - case 0x84: REG_OP(ADD8, A, Iyh); break; // ADD A, Iyh - case 0x85: REG_OP(ADD8, A, Iyl); break; // ADD A, Iyl - case 0x86: I_REG_OP_IND_n(ADD8, A, Iyl, Iyh); break; // ADD A, (Iy + n) - case 0x87: REG_OP(ADD8, A, A); break; // ADD A, A - case 0x88: REG_OP(ADC8, A, B); break; // ADC A, B - case 0x89: REG_OP(ADC8, A, C); break; // ADC A, C - case 0x8A: REG_OP(ADC8, A, D); break; // ADC A, D - case 0x8B: REG_OP(ADC8, A, E); break; // ADC A, E - case 0x8C: REG_OP(ADC8, A, Iyh); break; // ADC A, Iyh - case 0x8D: REG_OP(ADC8, A, Iyl); break; // ADC A, Iyl - case 0x8E: I_REG_OP_IND_n(ADC8, A, Iyl, Iyh); break; // ADC A, (Iy + n) - case 0x8F: REG_OP(ADC8, A, A); break; // ADC A, A - case 0x90: REG_OP(SUB8, A, B); break; // SUB A, B - case 0x91: REG_OP(SUB8, A, C); break; // SUB A, C - case 0x92: REG_OP(SUB8, A, D); break; // SUB A, D - case 0x93: REG_OP(SUB8, A, E); break; // SUB A, E - case 0x94: REG_OP(SUB8, A, Iyh); break; // SUB A, Iyh - case 0x95: REG_OP(SUB8, A, Iyl); break; // SUB A, Iyl - case 0x96: I_REG_OP_IND_n(SUB8, A, Iyl, Iyh); break; // SUB A, (Iy + n) - case 0x97: REG_OP(SUB8, A, A); break; // SUB A, A - case 0x98: REG_OP(SBC8, A, B); break; // SBC A, B - case 0x99: REG_OP(SBC8, A, C); break; // SBC A, C - case 0x9A: REG_OP(SBC8, A, D); break; // SBC A, D - case 0x9B: REG_OP(SBC8, A, E); break; // SBC A, E - case 0x9C: REG_OP(SBC8, A, Iyh); break; // SBC A, Iyh - case 0x9D: REG_OP(SBC8, A, Iyl); break; // SBC A, Iyl - case 0x9E: I_REG_OP_IND_n(SBC8, A, Iyl, Iyh); break; // SBC A, (Iy + n) - case 0x9F: REG_OP(SBC8, A, A); break; // SBC A, A - case 0xA0: REG_OP(AND8, A, B); break; // AND A, B - case 0xA1: REG_OP(AND8, A, C); break; // AND A, C - case 0xA2: REG_OP(AND8, A, D); break; // AND A, D - case 0xA3: REG_OP(AND8, A, E); break; // AND A, E - case 0xA4: REG_OP(AND8, A, Iyh); break; // AND A, Iyh - case 0xA5: REG_OP(AND8, A, Iyl); break; // AND A, Iyl - case 0xA6: I_REG_OP_IND_n(AND8, A, Iyl, Iyh); break; // AND A, (Iy + n) - case 0xA7: REG_OP(AND8, A, A); break; // AND A, A - case 0xA8: REG_OP(XOR8, A, B); break; // XOR A, B - case 0xA9: REG_OP(XOR8, A, C); break; // XOR A, C - case 0xAA: REG_OP(XOR8, A, D); break; // XOR A, D - case 0xAB: REG_OP(XOR8, A, E); break; // XOR A, E - case 0xAC: REG_OP(XOR8, A, Iyh); break; // XOR A, Iyh - case 0xAD: REG_OP(XOR8, A, Iyl); break; // XOR A, Iyl - case 0xAE: I_REG_OP_IND_n(XOR8, A, Iyl, Iyh); break; // XOR A, (Iy + n) - case 0xAF: REG_OP(XOR8, A, A); break; // XOR A, A - case 0xB0: REG_OP(OR8, A, B); break; // OR A, B - case 0xB1: REG_OP(OR8, A, C); break; // OR A, C - case 0xB2: REG_OP(OR8, A, D); break; // OR A, D - case 0xB3: REG_OP(OR8, A, E); break; // OR A, E - case 0xB4: REG_OP(OR8, A, Iyh); break; // OR A, Iyh - case 0xB5: REG_OP(OR8, A, Iyl); break; // OR A, Iyl - case 0xB6: I_REG_OP_IND_n(OR8, A, Iyl, Iyh); break; // OR A, (Iy + n) - case 0xB7: REG_OP(OR8, A, A); break; // OR A, A - case 0xB8: REG_OP(CP8, A, B); break; // CP A, B - case 0xB9: REG_OP(CP8, A, C); break; // CP A, C - case 0xBA: REG_OP(CP8, A, D); break; // CP A, D - case 0xBB: REG_OP(CP8, A, E); break; // CP A, E - case 0xBC: REG_OP(CP8, A, Iyh); break; // CP A, Iyh - case 0xBD: REG_OP(CP8, A, Iyl); break; // CP A, Iyl - case 0xBE: I_REG_OP_IND_n(CP8, A, Iyl, Iyh); break; // CP A, (Iy + n) - case 0xBF: REG_OP(CP8, A, A); break; // CP A, A - case 0xC0: RET_COND(!FlagZget()); break; // Ret NZ - case 0xC1: POP_(C, B); break; // POP BC - case 0xC2: JP_COND(!FlagZget()); break; // JP NZ - case 0xC3: JP_COND(true); break; // JP - case 0xC4: CALL_COND(!FlagZget()); break; // CALL NZ - case 0xC5: PUSH_(C, B); break; // PUSH BC - case 0xC6: REG_OP_IND_INC(ADD8, A, PCl, PCh); break; // ADD A, n - case 0xC7: RST_(0); break; // RST 0 - case 0xC8: RET_COND(FlagZget()); break; // RET Z - case 0xC9: RET_(); break; // RET - case 0xCA: JP_COND(FlagZget()); break; // JP Z - case 0xCB: PREFETCH_(IYCBpre); break; // PREFIX IyCB - case 0xCC: CALL_COND(FlagZget()); break; // CALL Z - case 0xCD: CALL_COND(true); break; // CALL - case 0xCE: REG_OP_IND_INC(ADC8, A, PCl, PCh); break; // ADC A, n - case 0xCF: RST_(0x08); break; // RST 0x08 - case 0xD0: RET_COND(!FlagCget()); break; // Ret NC - case 0xD1: POP_(E, D); break; // POP DE - case 0xD2: JP_COND(!FlagCget()); break; // JP NC - case 0xD3: OUT_(); break; // OUT A - case 0xD4: CALL_COND(!FlagCget()); break; // CALL NC - case 0xD5: PUSH_(E, D); break; // PUSH DE - case 0xD6: REG_OP_IND_INC(SUB8, A, PCl, PCh); break; // SUB A, n - case 0xD7: RST_(0x10); break; // RST 0x10 - case 0xD8: RET_COND(FlagCget()); break; // RET C - case 0xD9: EXX_(); break; // EXX - case 0xDA: JP_COND(FlagCget()); break; // JP C - case 0xDB: IN_(); break; // IN A - case 0xDC: CALL_COND(FlagCget()); break; // CALL C - case 0xDD: PREFIX_(IXpre); break; // IX Prefix - case 0xDE: REG_OP_IND_INC(SBC8, A, PCl, PCh); break; // SBC A, n - case 0xDF: RST_(0x18); break; // RST 0x18 - case 0xE0: RET_COND(!FlagPget()); break; // RET Po - case 0xE1: POP_(Iyl, Iyh); break; // POP Iy - case 0xE2: JP_COND(!FlagPget()); break; // JP Po - case 0xE3: EXCH_16_IND_(SPl, SPh, Iyl, Iyh); break; // ex (SP), Iy - case 0xE4: CALL_COND(!FlagPget()); break; // CALL Po - case 0xE5: PUSH_(Iyl, Iyh); break; // PUSH Iy - case 0xE6: REG_OP_IND_INC(AND8, A, PCl, PCh); break; // AND A, n - case 0xE7: RST_(0x20); break; // RST 0x20 - case 0xE8: RET_COND(FlagPget()); break; // RET Pe - case 0xE9: JP_16(Iyl, Iyh); break; // JP (Iy) - case 0xEA: JP_COND(FlagPget()); break; // JP Pe - case 0xEB: EXCH_16_(E, D, L, H); break; // ex DE, HL - case 0xEC: CALL_COND(FlagPget()); break; // CALL Pe - case 0xED: PREFIX_(EXTDpre); break; // EXTD Prefix - case 0xEE: REG_OP_IND_INC(XOR8, A, PCl, PCh); break; // XOR A, n - case 0xEF: RST_(0x28); break; // RST 0x28 - case 0xF0: RET_COND(!FlagSget()); break; // RET p - case 0xF1: POP_(F, A); break; // POP AF - case 0xF2: JP_COND(!FlagSget()); break; // JP p - case 0xF3: DI_(); break; // DI - case 0xF4: CALL_COND(!FlagSget()); break; // CALL p - case 0xF5: PUSH_(F, A); break; // PUSH AF - case 0xF6: REG_OP_IND_INC(OR8, A, PCl, PCh); break; // OR A, n - case 0xF7: RST_(0x30); break; // RST 0x30 - case 0xF8: RET_COND(FlagSget()); break; // RET M - case 0xF9: LD_SP_16(Iyl, Iyh); break; // LD SP, Iy - case 0xFA: JP_COND(FlagSget()); break; // JP M - case 0xFB: EI_(); break; // EI - case 0xFC: CALL_COND(FlagSget()); break; // CALL M - case 0xFD: PREFIX_(IYpre); break; // IY Prefix - case 0xFE: REG_OP_IND_INC(CP8, A, PCl, PCh); break; // CP A, n - case 0xFF: RST_(0x38); break; // RST $38 + case 0x00: NOP_(); break; // NOP + case 0x01: LD_IND_16(C, B, PCl, PCh); break; // LD BC, nn + case 0x02: LD_8_IND(C, B, A); break; // LD (BC), A + case 0x03: INC_16(C, B); break; // INC BC + case 0x04: INT_OP(INC8, B); break; // INC B + case 0x05: INT_OP(DEC8, B); break; // DEC B + case 0x06: LD_IND_8_INC(B, PCl, PCh); break; // LD B, n + case 0x07: INT_OP(RLC, Aim); break; // RLCA + case 0x08: EXCH_(); break; // EXCH AF, AF' + case 0x09: ADD_16(Ixl, Ixh, C, B); break; // ADD Ix, BC + case 0x0A: REG_OP_IND(TR, A, C, B); break; // LD A, (BC) + case 0x0B: DEC_16(C, B); break; // DEC BC + case 0x0C: INT_OP(INC8, C); break; // INC C + case 0x0D: INT_OP(DEC8, C); break; // DEC C + case 0x0E: LD_IND_8_INC(C, PCl, PCh); break; // LD C, n + case 0x0F: INT_OP(RRC, Aim); break; // RRCA + case 0x10: DJNZ_(); break; // DJNZ B + case 0x11: LD_IND_16(E, D, PCl, PCh); break; // LD DE, nn + case 0x12: LD_8_IND(E, D, A); break; // LD (DE), A + case 0x13: INC_16(E, D); break; // INC DE + case 0x14: INT_OP(INC8, D); break; // INC D + case 0x15: INT_OP(DEC8, D); break; // DEC D + case 0x16: LD_IND_8_INC(D, PCl, PCh); break; // LD D, n + case 0x17: INT_OP(RL, Aim); break; // RLA + case 0x18: JR_COND(ALWAYS_T); break; // JR, r8 + case 0x19: ADD_16(Ixl, Ixh, E, D); break; // ADD Ix, DE + case 0x1A: REG_OP_IND(TR, A, E, D); break; // LD A, (DE) + case 0x1B: DEC_16(E, D); break; // DEC DE + case 0x1C: INT_OP(INC8, E); break; // INC E + case 0x1D: INT_OP(DEC8, E); break; // DEC E + case 0x1E: LD_IND_8_INC(E, PCl, PCh); break; // LD E, n + case 0x1F: INT_OP(RR, Aim); break; // RRA + case 0x20: JR_COND(FLAG_NZ); break; // JR NZ, r8 + case 0x21: LD_IND_16(Ixl, Ixh, PCl, PCh); break; // LD Ix, nn + case 0x22: LD_16_IND_nn(Ixl, Ixh); break; // LD (nn), Ix + case 0x23: INC_16(Ixl, Ixh); break; // INC Ix + case 0x24: INT_OP(INC8, Ixh); break; // INC Ixh + case 0x25: INT_OP(DEC8, Ixh); break; // DEC Ixh + case 0x26: LD_IND_8_INC(Ixh, PCl, PCh); break; // LD Ixh, n + case 0x27: INT_OP(DA, A); break; // DAA + case 0x28: JR_COND(FLAG_Z); break; // JR Z, r8 + case 0x29: ADD_16(Ixl, Ixh, Ixl, Ixh); break; // ADD Ix, Ix + case 0x2A: LD_IND_16_nn(Ixl, Ixh); break; // LD Ix, (nn) + case 0x2B: DEC_16(Ixl, Ixh); break; // DEC Ix + case 0x2C: INT_OP(INC8, Ixl); break; // INC Ixl + case 0x2D: INT_OP(DEC8, Ixl); break; // DEC Ixl + case 0x2E: LD_IND_8_INC(Ixl, PCl, PCh); break; // LD Ixl, n + case 0x2F: INT_OP(CPL, A); break; // CPL + case 0x30: JR_COND(FLAG_NC); break; // JR NC, r8 + case 0x31: LD_IND_16(SPl, SPh, PCl, PCh); break; // LD SP, nn + case 0x32: LD_8_IND_nn(A); break; // LD (nn), A + case 0x33: INC_16(SPl, SPh); break; // INC SP + case 0x34: I_OP_n(INC8, Ixl, Ixh); break; // INC (Ix + n) + case 0x35: I_OP_n(DEC8, Ixl, Ixh); break; // DEC (Ix + n) + case 0x36: I_OP_n_n(Ixl, Ixh); break; // LD (Ix + n), n + case 0x37: INT_OP(SCF, A); break; // SCF + case 0x38: JR_COND(FLAG_C); break; // JR C, r8 + case 0x39: ADD_16(Ixl, Ixh, SPl, SPh); break; // ADD Ix, SP + case 0x3A: LD_IND_8_nn(A); break; // LD A, (nn) + case 0x3B: DEC_16(SPl, SPh); break; // DEC SP + case 0x3C: INT_OP(INC8, A); break; // INC A + case 0x3D: INT_OP(DEC8, A); break; // DEC A + case 0x3E: LD_IND_8_INC(A, PCl, PCh); break; // LD A, n + case 0x3F: INT_OP(CCF, A); break; // CCF + case 0x40: REG_OP(TR, B, B); break; // LD B, B + case 0x41: REG_OP(TR, B, C); break; // LD B, C + case 0x42: REG_OP(TR, B, D); break; // LD B, D + case 0x43: REG_OP(TR, B, E); break; // LD B, E + case 0x44: REG_OP(TR, B, Ixh); break; // LD B, Ixh + case 0x45: REG_OP(TR, B, Ixl); break; // LD B, Ixl + case 0x46: I_REG_OP_IND_n(TR, B, Ixl, Ixh); break; // LD B, (Ix + n) + case 0x47: REG_OP(TR, B, A); break; // LD B, A + case 0x48: REG_OP(TR, C, B); break; // LD C, B + case 0x49: REG_OP(TR, C, C); break; // LD C, C + case 0x4A: REG_OP(TR, C, D); break; // LD C, D + case 0x4B: REG_OP(TR, C, E); break; // LD C, E + case 0x4C: REG_OP(TR, C, Ixh); break; // LD C, Ixh + case 0x4D: REG_OP(TR, C, Ixl); break; // LD C, Ixl + case 0x4E: I_REG_OP_IND_n(TR, C, Ixl, Ixh); break; // LD C, (Ix + n) + case 0x4F: REG_OP(TR, C, A); break; // LD C, A + case 0x50: REG_OP(TR, D, B); break; // LD D, B + case 0x51: REG_OP(TR, D, C); break; // LD D, C + case 0x52: REG_OP(TR, D, D); break; // LD D, D + case 0x53: REG_OP(TR, D, E); break; // LD D, E + case 0x54: REG_OP(TR, D, Ixh); break; // LD D, Ixh + case 0x55: REG_OP(TR, D, Ixl); break; // LD D, Ixl + case 0x56: I_REG_OP_IND_n(TR, D, Ixl, Ixh); break; // LD D, (Ix + n) + case 0x57: REG_OP(TR, D, A); break; // LD D, A + case 0x58: REG_OP(TR, E, B); break; // LD E, B + case 0x59: REG_OP(TR, E, C); break; // LD E, C + case 0x5A: REG_OP(TR, E, D); break; // LD E, D + case 0x5B: REG_OP(TR, E, E); break; // LD E, E + case 0x5C: REG_OP(TR, E, Ixh); break; // LD E, Ixh + case 0x5D: REG_OP(TR, E, Ixl); break; // LD E, Ixl + case 0x5E: I_REG_OP_IND_n(TR, E, Ixl, Ixh); break; // LD E, (Ix + n) + case 0x5F: REG_OP(TR, E, A); break; // LD E, A + case 0x60: REG_OP(TR, Ixh, B); break; // LD Ixh, B + case 0x61: REG_OP(TR, Ixh, C); break; // LD Ixh, C + case 0x62: REG_OP(TR, Ixh, D); break; // LD Ixh, D + case 0x63: REG_OP(TR, Ixh, E); break; // LD Ixh, E + case 0x64: REG_OP(TR, Ixh, Ixh); break; // LD Ixh, Ixh + case 0x65: REG_OP(TR, Ixh, Ixl); break; // LD Ixh, Ixl + case 0x66: I_REG_OP_IND_n(TR, H, Ixl, Ixh); break; // LD H, (Ix + n) + case 0x67: REG_OP(TR, Ixh, A); break; // LD Ixh, A + case 0x68: REG_OP(TR, Ixl, B); break; // LD Ixl, B + case 0x69: REG_OP(TR, Ixl, C); break; // LD Ixl, C + case 0x6A: REG_OP(TR, Ixl, D); break; // LD Ixl, D + case 0x6B: REG_OP(TR, Ixl, E); break; // LD Ixl, E + case 0x6C: REG_OP(TR, Ixl, Ixh); break; // LD Ixl, Ixh + case 0x6D: REG_OP(TR, Ixl, Ixl); break; // LD Ixl, Ixl + case 0x6E: I_REG_OP_IND_n(TR, L, Ixl, Ixh); break; // LD L, (Ix + n) + case 0x6F: REG_OP(TR, Ixl, A); break; // LD Ixl, A + case 0x70: I_LD_8_IND_n(Ixl, Ixh, B); break; // LD (Ix + n), B + case 0x71: I_LD_8_IND_n(Ixl, Ixh, C); break; // LD (Ix + n), C + case 0x72: I_LD_8_IND_n(Ixl, Ixh, D); break; // LD (Ix + n), D + case 0x73: I_LD_8_IND_n(Ixl, Ixh, E); break; // LD (Ix + n), E + case 0x74: I_LD_8_IND_n(Ixl, Ixh, H); break; // LD (Ix + n), H + case 0x75: I_LD_8_IND_n(Ixl, Ixh, L); break; // LD (Ix + n), L + case 0x76: HALT_(); break; // HALT + case 0x77: I_LD_8_IND_n(Ixl, Ixh, A); break; // LD (Ix + n), A + case 0x78: REG_OP(TR, A, B); break; // LD A, B + case 0x79: REG_OP(TR, A, C); break; // LD A, C + case 0x7A: REG_OP(TR, A, D); break; // LD A, D + case 0x7B: REG_OP(TR, A, E); break; // LD A, E + case 0x7C: REG_OP(TR, A, Ixh); break; // LD A, Ixh + case 0x7D: REG_OP(TR, A, Ixl); break; // LD A, Ixl + case 0x7E: I_REG_OP_IND_n(TR, A, Ixl, Ixh); break; // LD A, (Ix + n) + case 0x7F: REG_OP(TR, A, A); break; // LD A, A + case 0x80: REG_OP(ADD8, A, B); break; // ADD A, B + case 0x81: REG_OP(ADD8, A, C); break; // ADD A, C + case 0x82: REG_OP(ADD8, A, D); break; // ADD A, D + case 0x83: REG_OP(ADD8, A, E); break; // ADD A, E + case 0x84: REG_OP(ADD8, A, Ixh); break; // ADD A, Ixh + case 0x85: REG_OP(ADD8, A, Ixl); break; // ADD A, Ixl + case 0x86: I_REG_OP_IND_n(ADD8, A, Ixl, Ixh); break; // ADD A, (Ix + n) + case 0x87: REG_OP(ADD8, A, A); break; // ADD A, A + case 0x88: REG_OP(ADC8, A, B); break; // ADC A, B + case 0x89: REG_OP(ADC8, A, C); break; // ADC A, C + case 0x8A: REG_OP(ADC8, A, D); break; // ADC A, D + case 0x8B: REG_OP(ADC8, A, E); break; // ADC A, E + case 0x8C: REG_OP(ADC8, A, Ixh); break; // ADC A, Ixh + case 0x8D: REG_OP(ADC8, A, Ixl); break; // ADC A, Ixl + case 0x8E: I_REG_OP_IND_n(ADC8, A, Ixl, Ixh); break; // ADC A, (Ix + n) + case 0x8F: REG_OP(ADC8, A, A); break; // ADC A, A + case 0x90: REG_OP(SUB8, A, B); break; // SUB A, B + case 0x91: REG_OP(SUB8, A, C); break; // SUB A, C + case 0x92: REG_OP(SUB8, A, D); break; // SUB A, D + case 0x93: REG_OP(SUB8, A, E); break; // SUB A, E + case 0x94: REG_OP(SUB8, A, Ixh); break; // SUB A, Ixh + case 0x95: REG_OP(SUB8, A, Ixl); break; // SUB A, Ixl + case 0x96: I_REG_OP_IND_n(SUB8, A, Ixl, Ixh); break; // SUB A, (Ix + n) + case 0x97: REG_OP(SUB8, A, A); break; // SUB A, A + case 0x98: REG_OP(SBC8, A, B); break; // SBC A, B + case 0x99: REG_OP(SBC8, A, C); break; // SBC A, C + case 0x9A: REG_OP(SBC8, A, D); break; // SBC A, D + case 0x9B: REG_OP(SBC8, A, E); break; // SBC A, E + case 0x9C: REG_OP(SBC8, A, Ixh); break; // SBC A, Ixh + case 0x9D: REG_OP(SBC8, A, Ixl); break; // SBC A, Ixl + case 0x9E: I_REG_OP_IND_n(SBC8, A, Ixl, Ixh); break; // SBC A, (Ix + n) + case 0x9F: REG_OP(SBC8, A, A); break; // SBC A, A + case 0xA0: REG_OP(AND8, A, B); break; // AND A, B + case 0xA1: REG_OP(AND8, A, C); break; // AND A, C + case 0xA2: REG_OP(AND8, A, D); break; // AND A, D + case 0xA3: REG_OP(AND8, A, E); break; // AND A, E + case 0xA4: REG_OP(AND8, A, Ixh); break; // AND A, Ixh + case 0xA5: REG_OP(AND8, A, Ixl); break; // AND A, Ixl + case 0xA6: I_REG_OP_IND_n(AND8, A, Ixl, Ixh); break; // AND A, (Ix + n) + case 0xA7: REG_OP(AND8, A, A); break; // AND A, A + case 0xA8: REG_OP(XOR8, A, B); break; // XOR A, B + case 0xA9: REG_OP(XOR8, A, C); break; // XOR A, C + case 0xAA: REG_OP(XOR8, A, D); break; // XOR A, D + case 0xAB: REG_OP(XOR8, A, E); break; // XOR A, E + case 0xAC: REG_OP(XOR8, A, Ixh); break; // XOR A, Ixh + case 0xAD: REG_OP(XOR8, A, Ixl); break; // XOR A, Ixl + case 0xAE: I_REG_OP_IND_n(XOR8, A, Ixl, Ixh); break; // XOR A, (Ix + n) + case 0xAF: REG_OP(XOR8, A, A); break; // XOR A, A + case 0xB0: REG_OP(OR8, A, B); break; // OR A, B + case 0xB1: REG_OP(OR8, A, C); break; // OR A, C + case 0xB2: REG_OP(OR8, A, D); break; // OR A, D + case 0xB3: REG_OP(OR8, A, E); break; // OR A, E + case 0xB4: REG_OP(OR8, A, Ixh); break; // OR A, Ixh + case 0xB5: REG_OP(OR8, A, Ixl); break; // OR A, Ixl + case 0xB6: I_REG_OP_IND_n(OR8, A, Ixl, Ixh); break; // OR A, (Ix + n) + case 0xB7: REG_OP(OR8, A, A); break; // OR A, A + case 0xB8: REG_OP(CP8, A, B); break; // CP A, B + case 0xB9: REG_OP(CP8, A, C); break; // CP A, C + case 0xBA: REG_OP(CP8, A, D); break; // CP A, D + case 0xBB: REG_OP(CP8, A, E); break; // CP A, E + case 0xBC: REG_OP(CP8, A, Ixh); break; // CP A, Ixh + case 0xBD: REG_OP(CP8, A, Ixl); break; // CP A, Ixl + case 0xBE: I_REG_OP_IND_n(CP8, A, Ixl, Ixh); break; // CP A, (Ix + n) + case 0xBF: REG_OP(CP8, A, A); break; // CP A, A + case 0xC0: RET_COND(FLAG_NZ); break; // Ret NZ + case 0xC1: POP_(C, B); break; // POP BC + case 0xC2: JP_COND(FLAG_NZ); break; // JP NZ + case 0xC3: JP_COND(ALWAYS_T); break; // JP + case 0xC4: CALL_COND(FLAG_NZ); break; // CALL NZ + case 0xC5: PUSH_(C, B); break; // PUSH BC + case 0xC6: REG_OP_IND_INC(ADD8, A, PCl, PCh); break; // ADD A, n + case 0xC7: RST_(0); break; // RST 0 + case 0xC8: RET_COND(FLAG_Z); break; // RET Z + case 0xC9: RET_(); break; // RET + case 0xCA: JP_COND(FLAG_Z); break; // JP Z + case 0xCB: PREFETCH_(IXCBpre); break; // PREFIX IXCB + case 0xCC: CALL_COND(FLAG_Z); break; // CALL Z + case 0xCD: CALL_COND(ALWAYS_T); break; // CALL + case 0xCE: REG_OP_IND_INC(ADC8, A, PCl, PCh); break; // ADC A, n + case 0xCF: RST_(0x08); break; // RST 0x08 + case 0xD0: RET_COND(FLAG_NC); break; // Ret NC + case 0xD1: POP_(E, D); break; // POP DE + case 0xD2: JP_COND(FLAG_NC); break; // JP NC + case 0xD3: OUT_(); break; // OUT A + case 0xD4: CALL_COND(FLAG_NC); break; // CALL NC + case 0xD5: PUSH_(E, D); break; // PUSH DE + case 0xD6: REG_OP_IND_INC(SUB8, A, PCl, PCh); break; // SUB A, n + case 0xD7: RST_(0x10); break; // RST 0x10 + case 0xD8: RET_COND(FLAG_C); break; // RET C + case 0xD9: EXX_(); break; // EXX + case 0xDA: JP_COND(FLAG_C); break; // JP C + case 0xDB: IN_(); break; // IN A + case 0xDC: CALL_COND(FLAG_C); break; // CALL C + case 0xDD: PREFIX_(IXpre); break; // IX Prefix + case 0xDE: REG_OP_IND_INC(SBC8, A, PCl, PCh); break; // SBC A, n + case 0xDF: RST_(0x18); break; // RST 0x18 + case 0xE0: RET_COND(FLAG_NP); break; // RET Po + case 0xE1: POP_(Ixl, Ixh); break; // POP Ix + case 0xE2: JP_COND(FLAG_NP); break; // JP Po + case 0xE3: EXCH_16_IND_(SPl, SPh, Ixl, Ixh); break; // ex (SP), Ix + case 0xE4: CALL_COND(FLAG_NP); break; // CALL Po + case 0xE5: PUSH_(Ixl, Ixh); break; // PUSH Ix + case 0xE6: REG_OP_IND_INC(AND8, A, PCl, PCh); break; // AND A, n + case 0xE7: RST_(0x20); break; // RST 0x20 + case 0xE8: RET_COND(FLAG_P); break; // RET Pe + case 0xE9: JP_16(Ixl, Ixh); break; // JP (Ix) + case 0xEA: JP_COND(FLAG_P); break; // JP Pe + case 0xEB: EXCH_16_(E, D, L, H); break; // ex DE, HL + case 0xEC: CALL_COND(FLAG_P); break; // CALL Pe + case 0xED: PREFIX_(EXTDpre); break; // EXTD Prefix + case 0xEE: REG_OP_IND_INC(XOR8, A, PCl, PCh); break; // XOR A, n + case 0xEF: RST_(0x28); break; // RST 0x28 + case 0xF0: RET_COND(FLAG_NS); break; // RET p + case 0xF1: POP_(F, A); break; // POP AF + case 0xF2: JP_COND(FLAG_NS); break; // JP p + case 0xF3: DI_(); break; // DI + case 0xF4: CALL_COND(FLAG_NS); break; // CALL p + case 0xF5: PUSH_(F, A); break; // PUSH AF + case 0xF6: REG_OP_IND_INC(OR8, A, PCl, PCh); break; // OR A, n + case 0xF7: RST_(0x30); break; // RST 0x30 + case 0xF8: RET_COND(FLAG_S); break; // RET M + case 0xF9: LD_SP_16(Ixl, Ixh); break; // LD SP, Ix + case 0xFA: JP_COND(FLAG_S); break; // JP M + case 0xFB: EI_(); break; // EI + case 0xFC: CALL_COND(FLAG_S); break; // CALL M + case 0xFD: PREFIX_(IYpre); break; // IY Prefix + case 0xFE: REG_OP_IND_INC(CP8, A, PCl, PCh); break; // CP A, n + case 0xFF: RST_(0x38); break; // RST $38 } - } - else if (IXCB_prefix || IYCB_prefix) - { - // the first byte fetched is the prefetch value to use with the instruction - // we pick Ix or Iy here, the indexed value is stored in WZ - // In this way, we don't need to pass them as an argument to the I_Funcs. - IXCB_prefix = false; - IYCB_prefix = false; - NO_prefix = true; + + std::memcpy(&IXIndex[i * 38], &cur_instr, 38); + std::memcpy(&IXIndexBUSRQ[i * 19], &BUSRQ, 19); + std::memcpy(&IXIndexMEMRQ[i * 19], &MEMRQ, 19); + IXIndexIRQS[i] = IRQS; + + switch (opcode) + { + case 0x00: NOP_(); break; // NOP + case 0x01: LD_IND_16(C, B, PCl, PCh); break; // LD BC, nn + case 0x02: LD_8_IND(C, B, A); break; // LD (BC), A + case 0x03: INC_16(C, B); break; // INC BC + case 0x04: INT_OP(INC8, B); break; // INC B + case 0x05: INT_OP(DEC8, B); break; // DEC B + case 0x06: LD_IND_8_INC(B, PCl, PCh); break; // LD B, n + case 0x07: INT_OP(RLC, Aim); break; // RLCA + case 0x08: EXCH_(); break; // EXCH AF, AF' + case 0x09: ADD_16(Iyl, Iyh, C, B); break; // ADD Iy, BC + case 0x0A: REG_OP_IND(TR, A, C, B); break; // LD A, (BC) + case 0x0B: DEC_16(C, B); break; // DEC BC + case 0x0C: INT_OP(INC8, C); break; // INC C + case 0x0D: INT_OP(DEC8, C); break; // DEC C + case 0x0E: LD_IND_8_INC(C, PCl, PCh); break; // LD C, n + case 0x0F: INT_OP(RRC, Aim); break; // RRCA + case 0x10: DJNZ_(); break; // DJNZ B + case 0x11: LD_IND_16(E, D, PCl, PCh); break; // LD DE, nn + case 0x12: LD_8_IND(E, D, A); break; // LD (DE), A + case 0x13: INC_16(E, D); break; // INC DE + case 0x14: INT_OP(INC8, D); break; // INC D + case 0x15: INT_OP(DEC8, D); break; // DEC D + case 0x16: LD_IND_8_INC(D, PCl, PCh); break; // LD D, n + case 0x17: INT_OP(RL, Aim); break; // RLA + case 0x18: JR_COND(ALWAYS_T); break; // JR, r8 + case 0x19: ADD_16(Iyl, Iyh, E, D); break; // ADD Iy, DE + case 0x1A: REG_OP_IND(TR, A, E, D); break; // LD A, (DE) + case 0x1B: DEC_16(E, D); break; // DEC DE + case 0x1C: INT_OP(INC8, E); break; // INC E + case 0x1D: INT_OP(DEC8, E); break; // DEC E + case 0x1E: LD_IND_8_INC(E, PCl, PCh); break; // LD E, n + case 0x1F: INT_OP(RR, Aim); break; // RRA + case 0x20: JR_COND(FLAG_NZ); break; // JR NZ, r8 + case 0x21: LD_IND_16(Iyl, Iyh, PCl, PCh); break; // LD Iy, nn + case 0x22: LD_16_IND_nn(Iyl, Iyh); break; // LD (nn), Iy + case 0x23: INC_16(Iyl, Iyh); break; // INC Iy + case 0x24: INT_OP(INC8, Iyh); break; // INC Iyh + case 0x25: INT_OP(DEC8, Iyh); break; // DEC Iyh + case 0x26: LD_IND_8_INC(Iyh, PCl, PCh); break; // LD Iyh, n + case 0x27: INT_OP(DA, A); break; // DAA + case 0x28: JR_COND(FLAG_Z); break; // JR Z, r8 + case 0x29: ADD_16(Iyl, Iyh, Iyl, Iyh); break; // ADD Iy, Iy + case 0x2A: LD_IND_16_nn(Iyl, Iyh); break; // LD Iy, (nn) + case 0x2B: DEC_16(Iyl, Iyh); break; // DEC Iy + case 0x2C: INT_OP(INC8, Iyl); break; // INC Iyl + case 0x2D: INT_OP(DEC8, Iyl); break; // DEC Iyl + case 0x2E: LD_IND_8_INC(Iyl, PCl, PCh); break; // LD Iyl, n + case 0x2F: INT_OP(CPL, A); break; // CPL + case 0x30: JR_COND(FLAG_NC); break; // JR NC, r8 + case 0x31: LD_IND_16(SPl, SPh, PCl, PCh); break; // LD SP, nn + case 0x32: LD_8_IND_nn(A); break; // LD (nn), A + case 0x33: INC_16(SPl, SPh); break; // INC SP + case 0x34: I_OP_n(INC8, Iyl, Iyh); break; // INC (Iy + n) + case 0x35: I_OP_n(DEC8, Iyl, Iyh); break; // DEC (Iy + n) + case 0x36: I_OP_n_n(Iyl, Iyh); break; // LD (Iy + n), n + case 0x37: INT_OP(SCF, A); break; // SCF + case 0x38: JR_COND(FLAG_C); break; // JR C, r8 + case 0x39: ADD_16(Iyl, Iyh, SPl, SPh); break; // ADD Iy, SP + case 0x3A: LD_IND_8_nn(A); break; // LD A, (nn) + case 0x3B: DEC_16(SPl, SPh); break; // DEC SP + case 0x3C: INT_OP(INC8, A); break; // INC A + case 0x3D: INT_OP(DEC8, A); break; // DEC A + case 0x3E: LD_IND_8_INC(A, PCl, PCh); break; // LD A, n + case 0x3F: INT_OP(CCF, A); break; // CCF + case 0x40: REG_OP(TR, B, B); break; // LD B, B + case 0x41: REG_OP(TR, B, C); break; // LD B, C + case 0x42: REG_OP(TR, B, D); break; // LD B, D + case 0x43: REG_OP(TR, B, E); break; // LD B, E + case 0x44: REG_OP(TR, B, Iyh); break; // LD B, Iyh + case 0x45: REG_OP(TR, B, Iyl); break; // LD B, Iyl + case 0x46: I_REG_OP_IND_n(TR, B, Iyl, Iyh); break; // LD B, (Iy + n) + case 0x47: REG_OP(TR, B, A); break; // LD B, A + case 0x48: REG_OP(TR, C, B); break; // LD C, B + case 0x49: REG_OP(TR, C, C); break; // LD C, C + case 0x4A: REG_OP(TR, C, D); break; // LD C, D + case 0x4B: REG_OP(TR, C, E); break; // LD C, E + case 0x4C: REG_OP(TR, C, Iyh); break; // LD C, Iyh + case 0x4D: REG_OP(TR, C, Iyl); break; // LD C, Iyl + case 0x4E: I_REG_OP_IND_n(TR, C, Iyl, Iyh); break; // LD C, (Iy + n) + case 0x4F: REG_OP(TR, C, A); break; // LD C, A + case 0x50: REG_OP(TR, D, B); break; // LD D, B + case 0x51: REG_OP(TR, D, C); break; // LD D, C + case 0x52: REG_OP(TR, D, D); break; // LD D, D + case 0x53: REG_OP(TR, D, E); break; // LD D, E + case 0x54: REG_OP(TR, D, Iyh); break; // LD D, Iyh + case 0x55: REG_OP(TR, D, Iyl); break; // LD D, Iyl + case 0x56: I_REG_OP_IND_n(TR, D, Iyl, Iyh); break; // LD D, (Iy + n) + case 0x57: REG_OP(TR, D, A); break; // LD D, A + case 0x58: REG_OP(TR, E, B); break; // LD E, B + case 0x59: REG_OP(TR, E, C); break; // LD E, C + case 0x5A: REG_OP(TR, E, D); break; // LD E, D + case 0x5B: REG_OP(TR, E, E); break; // LD E, E + case 0x5C: REG_OP(TR, E, Iyh); break; // LD E, Iyh + case 0x5D: REG_OP(TR, E, Iyl); break; // LD E, Iyl + case 0x5E: I_REG_OP_IND_n(TR, E, Iyl, Iyh); break; // LD E, (Iy + n) + case 0x5F: REG_OP(TR, E, A); break; // LD E, A + case 0x60: REG_OP(TR, Iyh, B); break; // LD Iyh, B + case 0x61: REG_OP(TR, Iyh, C); break; // LD Iyh, C + case 0x62: REG_OP(TR, Iyh, D); break; // LD Iyh, D + case 0x63: REG_OP(TR, Iyh, E); break; // LD Iyh, E + case 0x64: REG_OP(TR, Iyh, Iyh); break; // LD Iyh, Iyh + case 0x65: REG_OP(TR, Iyh, Iyl); break; // LD Iyh, Iyl + case 0x66: I_REG_OP_IND_n(TR, H, Iyl, Iyh); break; // LD H, (Iy + n) + case 0x67: REG_OP(TR, Iyh, A); break; // LD Iyh, A + case 0x68: REG_OP(TR, Iyl, B); break; // LD Iyl, B + case 0x69: REG_OP(TR, Iyl, C); break; // LD Iyl, C + case 0x6A: REG_OP(TR, Iyl, D); break; // LD Iyl, D + case 0x6B: REG_OP(TR, Iyl, E); break; // LD Iyl, E + case 0x6C: REG_OP(TR, Iyl, Iyh); break; // LD Iyl, Iyh + case 0x6D: REG_OP(TR, Iyl, Iyl); break; // LD Iyl, Iyl + case 0x6E: I_REG_OP_IND_n(TR, L, Iyl, Iyh); break; // LD L, (Iy + n) + case 0x6F: REG_OP(TR, Iyl, A); break; // LD Iyl, A + case 0x70: I_LD_8_IND_n(Iyl, Iyh, B); break; // LD (Iy + n), B + case 0x71: I_LD_8_IND_n(Iyl, Iyh, C); break; // LD (Iy + n), C + case 0x72: I_LD_8_IND_n(Iyl, Iyh, D); break; // LD (Iy + n), D + case 0x73: I_LD_8_IND_n(Iyl, Iyh, E); break; // LD (Iy + n), E + case 0x74: I_LD_8_IND_n(Iyl, Iyh, H); break; // LD (Iy + n), H + case 0x75: I_LD_8_IND_n(Iyl, Iyh, L); break; // LD (Iy + n), L + case 0x76: HALT_(); break; // HALT + case 0x77: I_LD_8_IND_n(Iyl, Iyh, A); break; // LD (Iy + n), A + case 0x78: REG_OP(TR, A, B); break; // LD A, B + case 0x79: REG_OP(TR, A, C); break; // LD A, C + case 0x7A: REG_OP(TR, A, D); break; // LD A, D + case 0x7B: REG_OP(TR, A, E); break; // LD A, E + case 0x7C: REG_OP(TR, A, Iyh); break; // LD A, Iyh + case 0x7D: REG_OP(TR, A, Iyl); break; // LD A, Iyl + case 0x7E: I_REG_OP_IND_n(TR, A, Iyl, Iyh); break; // LD A, (Iy + n) + case 0x7F: REG_OP(TR, A, A); break; // LD A, A + case 0x80: REG_OP(ADD8, A, B); break; // ADD A, B + case 0x81: REG_OP(ADD8, A, C); break; // ADD A, C + case 0x82: REG_OP(ADD8, A, D); break; // ADD A, D + case 0x83: REG_OP(ADD8, A, E); break; // ADD A, E + case 0x84: REG_OP(ADD8, A, Iyh); break; // ADD A, Iyh + case 0x85: REG_OP(ADD8, A, Iyl); break; // ADD A, Iyl + case 0x86: I_REG_OP_IND_n(ADD8, A, Iyl, Iyh); break; // ADD A, (Iy + n) + case 0x87: REG_OP(ADD8, A, A); break; // ADD A, A + case 0x88: REG_OP(ADC8, A, B); break; // ADC A, B + case 0x89: REG_OP(ADC8, A, C); break; // ADC A, C + case 0x8A: REG_OP(ADC8, A, D); break; // ADC A, D + case 0x8B: REG_OP(ADC8, A, E); break; // ADC A, E + case 0x8C: REG_OP(ADC8, A, Iyh); break; // ADC A, Iyh + case 0x8D: REG_OP(ADC8, A, Iyl); break; // ADC A, Iyl + case 0x8E: I_REG_OP_IND_n(ADC8, A, Iyl, Iyh); break; // ADC A, (Iy + n) + case 0x8F: REG_OP(ADC8, A, A); break; // ADC A, A + case 0x90: REG_OP(SUB8, A, B); break; // SUB A, B + case 0x91: REG_OP(SUB8, A, C); break; // SUB A, C + case 0x92: REG_OP(SUB8, A, D); break; // SUB A, D + case 0x93: REG_OP(SUB8, A, E); break; // SUB A, E + case 0x94: REG_OP(SUB8, A, Iyh); break; // SUB A, Iyh + case 0x95: REG_OP(SUB8, A, Iyl); break; // SUB A, Iyl + case 0x96: I_REG_OP_IND_n(SUB8, A, Iyl, Iyh); break; // SUB A, (Iy + n) + case 0x97: REG_OP(SUB8, A, A); break; // SUB A, A + case 0x98: REG_OP(SBC8, A, B); break; // SBC A, B + case 0x99: REG_OP(SBC8, A, C); break; // SBC A, C + case 0x9A: REG_OP(SBC8, A, D); break; // SBC A, D + case 0x9B: REG_OP(SBC8, A, E); break; // SBC A, E + case 0x9C: REG_OP(SBC8, A, Iyh); break; // SBC A, Iyh + case 0x9D: REG_OP(SBC8, A, Iyl); break; // SBC A, Iyl + case 0x9E: I_REG_OP_IND_n(SBC8, A, Iyl, Iyh); break; // SBC A, (Iy + n) + case 0x9F: REG_OP(SBC8, A, A); break; // SBC A, A + case 0xA0: REG_OP(AND8, A, B); break; // AND A, B + case 0xA1: REG_OP(AND8, A, C); break; // AND A, C + case 0xA2: REG_OP(AND8, A, D); break; // AND A, D + case 0xA3: REG_OP(AND8, A, E); break; // AND A, E + case 0xA4: REG_OP(AND8, A, Iyh); break; // AND A, Iyh + case 0xA5: REG_OP(AND8, A, Iyl); break; // AND A, Iyl + case 0xA6: I_REG_OP_IND_n(AND8, A, Iyl, Iyh); break; // AND A, (Iy + n) + case 0xA7: REG_OP(AND8, A, A); break; // AND A, A + case 0xA8: REG_OP(XOR8, A, B); break; // XOR A, B + case 0xA9: REG_OP(XOR8, A, C); break; // XOR A, C + case 0xAA: REG_OP(XOR8, A, D); break; // XOR A, D + case 0xAB: REG_OP(XOR8, A, E); break; // XOR A, E + case 0xAC: REG_OP(XOR8, A, Iyh); break; // XOR A, Iyh + case 0xAD: REG_OP(XOR8, A, Iyl); break; // XOR A, Iyl + case 0xAE: I_REG_OP_IND_n(XOR8, A, Iyl, Iyh); break; // XOR A, (Iy + n) + case 0xAF: REG_OP(XOR8, A, A); break; // XOR A, A + case 0xB0: REG_OP(OR8, A, B); break; // OR A, B + case 0xB1: REG_OP(OR8, A, C); break; // OR A, C + case 0xB2: REG_OP(OR8, A, D); break; // OR A, D + case 0xB3: REG_OP(OR8, A, E); break; // OR A, E + case 0xB4: REG_OP(OR8, A, Iyh); break; // OR A, Iyh + case 0xB5: REG_OP(OR8, A, Iyl); break; // OR A, Iyl + case 0xB6: I_REG_OP_IND_n(OR8, A, Iyl, Iyh); break; // OR A, (Iy + n) + case 0xB7: REG_OP(OR8, A, A); break; // OR A, A + case 0xB8: REG_OP(CP8, A, B); break; // CP A, B + case 0xB9: REG_OP(CP8, A, C); break; // CP A, C + case 0xBA: REG_OP(CP8, A, D); break; // CP A, D + case 0xBB: REG_OP(CP8, A, E); break; // CP A, E + case 0xBC: REG_OP(CP8, A, Iyh); break; // CP A, Iyh + case 0xBD: REG_OP(CP8, A, Iyl); break; // CP A, Iyl + case 0xBE: I_REG_OP_IND_n(CP8, A, Iyl, Iyh); break; // CP A, (Iy + n) + case 0xBF: REG_OP(CP8, A, A); break; // CP A, A + case 0xC0: RET_COND(FLAG_NZ); break; // Ret NZ + case 0xC1: POP_(C, B); break; // POP BC + case 0xC2: JP_COND(FLAG_NZ); break; // JP NZ + case 0xC3: JP_COND(ALWAYS_T); break; // JP + case 0xC4: CALL_COND(FLAG_NZ); break; // CALL NZ + case 0xC5: PUSH_(C, B); break; // PUSH BC + case 0xC6: REG_OP_IND_INC(ADD8, A, PCl, PCh); break; // ADD A, n + case 0xC7: RST_(0); break; // RST 0 + case 0xC8: RET_COND(FLAG_Z); break; // RET Z + case 0xC9: RET_(); break; // RET + case 0xCA: JP_COND(FLAG_Z); break; // JP Z + case 0xCB: PREFETCH_(IYCBpre); break; // PREFIX IyCB + case 0xCC: CALL_COND(FLAG_Z); break; // CALL Z + case 0xCD: CALL_COND(ALWAYS_T); break; // CALL + case 0xCE: REG_OP_IND_INC(ADC8, A, PCl, PCh); break; // ADC A, n + case 0xCF: RST_(0x08); break; // RST 0x08 + case 0xD0: RET_COND(FLAG_NC); break; // Ret NC + case 0xD1: POP_(E, D); break; // POP DE + case 0xD2: JP_COND(FLAG_NC); break; // JP NC + case 0xD3: OUT_(); break; // OUT A + case 0xD4: CALL_COND(FLAG_NC); break; // CALL NC + case 0xD5: PUSH_(E, D); break; // PUSH DE + case 0xD6: REG_OP_IND_INC(SUB8, A, PCl, PCh); break; // SUB A, n + case 0xD7: RST_(0x10); break; // RST 0x10 + case 0xD8: RET_COND(FLAG_C); break; // RET C + case 0xD9: EXX_(); break; // EXX + case 0xDA: JP_COND(FLAG_C); break; // JP C + case 0xDB: IN_(); break; // IN A + case 0xDC: CALL_COND(FLAG_C); break; // CALL C + case 0xDD: PREFIX_(IXpre); break; // IX Prefix + case 0xDE: REG_OP_IND_INC(SBC8, A, PCl, PCh); break; // SBC A, n + case 0xDF: RST_(0x18); break; // RST 0x18 + case 0xE0: RET_COND(FLAG_NP); break; // RET Po + case 0xE1: POP_(Iyl, Iyh); break; // POP Iy + case 0xE2: JP_COND(FLAG_NP); break; // JP Po + case 0xE3: EXCH_16_IND_(SPl, SPh, Iyl, Iyh); break; // ex (SP), Iy + case 0xE4: CALL_COND(FLAG_NP); break; // CALL Po + case 0xE5: PUSH_(Iyl, Iyh); break; // PUSH Iy + case 0xE6: REG_OP_IND_INC(AND8, A, PCl, PCh); break; // AND A, n + case 0xE7: RST_(0x20); break; // RST 0x20 + case 0xE8: RET_COND(FLAG_P); break; // RET Pe + case 0xE9: JP_16(Iyl, Iyh); break; // JP (Iy) + case 0xEA: JP_COND(FLAG_P); break; // JP Pe + case 0xEB: EXCH_16_(E, D, L, H); break; // ex DE, HL + case 0xEC: CALL_COND(FLAG_P); break; // CALL Pe + case 0xED: PREFIX_(EXTDpre); break; // EXTD Prefix + case 0xEE: REG_OP_IND_INC(XOR8, A, PCl, PCh); break; // XOR A, n + case 0xEF: RST_(0x28); break; // RST 0x28 + case 0xF0: RET_COND(FLAG_NS); break; // RET p + case 0xF1: POP_(F, A); break; // POP AF + case 0xF2: JP_COND(FLAG_NS); break; // JP p + case 0xF3: DI_(); break; // DI + case 0xF4: CALL_COND(FLAG_NS); break; // CALL p + case 0xF5: PUSH_(F, A); break; // PUSH AF + case 0xF6: REG_OP_IND_INC(OR8, A, PCl, PCh); break; // OR A, n + case 0xF7: RST_(0x30); break; // RST 0x30 + case 0xF8: RET_COND(FLAG_S); break; // RET M + case 0xF9: LD_SP_16(Iyl, Iyh); break; // LD SP, Iy + case 0xFA: JP_COND(FLAG_S); break; // JP M + case 0xFB: EI_(); break; // EI + case 0xFC: CALL_COND(FLAG_S); break; // CALL M + case 0xFD: PREFIX_(IYpre); break; // IY Prefix + case 0xFE: REG_OP_IND_INC(CP8, A, PCl, PCh); break; // CP A, n + case 0xFF: RST_(0x38); break; // RST $38 + } + + std::memcpy(&IYIndex[i * 38], &cur_instr, 38); + std::memcpy(&IYIndexBUSRQ[i * 19], &BUSRQ, 19); + std::memcpy(&IYIndexMEMRQ[i * 19], &MEMRQ, 19); + IYIndexIRQS[i] = IRQS; switch (opcode) { - case 0x00: I_INT_OP(RLC, B); break; // RLC (I* + n) -> B - case 0x01: I_INT_OP(RLC, C); break; // RLC (I* + n) -> C - case 0x02: I_INT_OP(RLC, D); break; // RLC (I* + n) -> D - case 0x03: I_INT_OP(RLC, E); break; // RLC (I* + n) -> E - case 0x04: I_INT_OP(RLC, H); break; // RLC (I* + n) -> H - case 0x05: I_INT_OP(RLC, L); break; // RLC (I* + n) -> L - case 0x06: I_INT_OP(RLC, ALU); break; // RLC (I* + n) - case 0x07: I_INT_OP(RLC, A); break; // RLC (I* + n) -> A - case 0x08: I_INT_OP(RRC, B); break; // RRC (I* + n) -> B - case 0x09: I_INT_OP(RRC, C); break; // RRC (I* + n) -> C - case 0x0A: I_INT_OP(RRC, D); break; // RRC (I* + n) -> D - case 0x0B: I_INT_OP(RRC, E); break; // RRC (I* + n) -> E - case 0x0C: I_INT_OP(RRC, H); break; // RRC (I* + n) -> H - case 0x0D: I_INT_OP(RRC, L); break; // RRC (I* + n) -> L - case 0x0E: I_INT_OP(RRC, ALU); break; // RRC (I* + n) - case 0x0F: I_INT_OP(RRC, A); break; // RRC (I* + n) -> A - case 0x10: I_INT_OP(RL, B); break; // RL (I* + n) -> B - case 0x11: I_INT_OP(RL, C); break; // RL (I* + n) -> C - case 0x12: I_INT_OP(RL, D); break; // RL (I* + n) -> D - case 0x13: I_INT_OP(RL, E); break; // RL (I* + n) -> E - case 0x14: I_INT_OP(RL, H); break; // RL (I* + n) -> H - case 0x15: I_INT_OP(RL, L); break; // RL (I* + n) -> L - case 0x16: I_INT_OP(RL, ALU); break; // RL (I* + n) - case 0x17: I_INT_OP(RL, A); break; // RL (I* + n) -> A - case 0x18: I_INT_OP(RR, B); break; // RR (I* + n) -> B - case 0x19: I_INT_OP(RR, C); break; // RR (I* + n) -> C - case 0x1A: I_INT_OP(RR, D); break; // RR (I* + n) -> D - case 0x1B: I_INT_OP(RR, E); break; // RR (I* + n) -> E - case 0x1C: I_INT_OP(RR, H); break; // RR (I* + n) -> H - case 0x1D: I_INT_OP(RR, L); break; // RR (I* + n) -> L - case 0x1E: I_INT_OP(RR, ALU); break; // RR (I* + n) - case 0x1F: I_INT_OP(RR, A); break; // RR (I* + n) -> A - case 0x20: I_INT_OP(SLA, B); break; // SLA (I* + n) -> B - case 0x21: I_INT_OP(SLA, C); break; // SLA (I* + n) -> C - case 0x22: I_INT_OP(SLA, D); break; // SLA (I* + n) -> D - case 0x23: I_INT_OP(SLA, E); break; // SLA (I* + n) -> E - case 0x24: I_INT_OP(SLA, H); break; // SLA (I* + n) -> H - case 0x25: I_INT_OP(SLA, L); break; // SLA (I* + n) -> L - case 0x26: I_INT_OP(SLA, ALU); break; // SLA (I* + n) - case 0x27: I_INT_OP(SLA, A); break; // SLA (I* + n) -> A - case 0x28: I_INT_OP(SRA, B); break; // SRA (I* + n) -> B - case 0x29: I_INT_OP(SRA, C); break; // SRA (I* + n) -> C - case 0x2A: I_INT_OP(SRA, D); break; // SRA (I* + n) -> D - case 0x2B: I_INT_OP(SRA, E); break; // SRA (I* + n) -> E - case 0x2C: I_INT_OP(SRA, H); break; // SRA (I* + n) -> H - case 0x2D: I_INT_OP(SRA, L); break; // SRA (I* + n) -> L - case 0x2E: I_INT_OP(SRA, ALU); break; // SRA (I* + n) - case 0x2F: I_INT_OP(SRA, A); break; // SRA (I* + n) -> A - case 0x30: I_INT_OP(SLL, B); break; // SLL (I* + n) -> B - case 0x31: I_INT_OP(SLL, C); break; // SLL (I* + n) -> C - case 0x32: I_INT_OP(SLL, D); break; // SLL (I* + n) -> D - case 0x33: I_INT_OP(SLL, E); break; // SLL (I* + n) -> E - case 0x34: I_INT_OP(SLL, H); break; // SLL (I* + n) -> H - case 0x35: I_INT_OP(SLL, L); break; // SLL (I* + n) -> L - case 0x36: I_INT_OP(SLL, ALU); break; // SLL (I* + n) - case 0x37: I_INT_OP(SLL, A); break; // SLL (I* + n) -> A - case 0x38: I_INT_OP(SRL, B); break; // SRL (I* + n) -> B - case 0x39: I_INT_OP(SRL, C); break; // SRL (I* + n) -> C - case 0x3A: I_INT_OP(SRL, D); break; // SRL (I* + n) -> D - case 0x3B: I_INT_OP(SRL, E); break; // SRL (I* + n) -> E - case 0x3C: I_INT_OP(SRL, H); break; // SRL (I* + n) -> H - case 0x3D: I_INT_OP(SRL, L); break; // SRL (I* + n) -> L - case 0x3E: I_INT_OP(SRL, ALU); break; // SRL (I* + n) - case 0x3F: I_INT_OP(SRL, A); break; // SRL (I* + n) -> A - case 0x40: I_BIT_TE(0); break; // BIT 0, (I* + n) - case 0x41: I_BIT_TE(0); break; // BIT 0, (I* + n) - case 0x42: I_BIT_TE(0); break; // BIT 0, (I* + n) - case 0x43: I_BIT_TE(0); break; // BIT 0, (I* + n) - case 0x44: I_BIT_TE(0); break; // BIT 0, (I* + n) - case 0x45: I_BIT_TE(0); break; // BIT 0, (I* + n) - case 0x46: I_BIT_TE(0); break; // BIT 0, (I* + n) - case 0x47: I_BIT_TE(0); break; // BIT 0, (I* + n) - case 0x48: I_BIT_TE(1); break; // BIT 1, (I* + n) - case 0x49: I_BIT_TE(1); break; // BIT 1, (I* + n) - case 0x4A: I_BIT_TE(1); break; // BIT 1, (I* + n) - case 0x4B: I_BIT_TE(1); break; // BIT 1, (I* + n) - case 0x4C: I_BIT_TE(1); break; // BIT 1, (I* + n) - case 0x4D: I_BIT_TE(1); break; // BIT 1, (I* + n) - case 0x4E: I_BIT_TE(1); break; // BIT 1, (I* + n) - case 0x4F: I_BIT_TE(1); break; // BIT 1, (I* + n) - case 0x50: I_BIT_TE(2); break; // BIT 2, (I* + n) - case 0x51: I_BIT_TE(2); break; // BIT 2, (I* + n) - case 0x52: I_BIT_TE(2); break; // BIT 2, (I* + n) - case 0x53: I_BIT_TE(2); break; // BIT 2, (I* + n) - case 0x54: I_BIT_TE(2); break; // BIT 2, (I* + n) - case 0x55: I_BIT_TE(2); break; // BIT 2, (I* + n) - case 0x56: I_BIT_TE(2); break; // BIT 2, (I* + n) - case 0x57: I_BIT_TE(2); break; // BIT 2, (I* + n) - case 0x58: I_BIT_TE(3); break; // BIT 3, (I* + n) - case 0x59: I_BIT_TE(3); break; // BIT 3, (I* + n) - case 0x5A: I_BIT_TE(3); break; // BIT 3, (I* + n) - case 0x5B: I_BIT_TE(3); break; // BIT 3, (I* + n) - case 0x5C: I_BIT_TE(3); break; // BIT 3, (I* + n) - case 0x5D: I_BIT_TE(3); break; // BIT 3, (I* + n) - case 0x5E: I_BIT_TE(3); break; // BIT 3, (I* + n) - case 0x5F: I_BIT_TE(3); break; // BIT 3, (I* + n) - case 0x60: I_BIT_TE(4); break; // BIT 4, (I* + n) - case 0x61: I_BIT_TE(4); break; // BIT 4, (I* + n) - case 0x62: I_BIT_TE(4); break; // BIT 4, (I* + n) - case 0x63: I_BIT_TE(4); break; // BIT 4, (I* + n) - case 0x64: I_BIT_TE(4); break; // BIT 4, (I* + n) - case 0x65: I_BIT_TE(4); break; // BIT 4, (I* + n) - case 0x66: I_BIT_TE(4); break; // BIT 4, (I* + n) - case 0x67: I_BIT_TE(4); break; // BIT 4, (I* + n) - case 0x68: I_BIT_TE(5); break; // BIT 5, (I* + n) - case 0x69: I_BIT_TE(5); break; // BIT 5, (I* + n) - case 0x6A: I_BIT_TE(5); break; // BIT 5, (I* + n) - case 0x6B: I_BIT_TE(5); break; // BIT 5, (I* + n) - case 0x6C: I_BIT_TE(5); break; // BIT 5, (I* + n) - case 0x6D: I_BIT_TE(5); break; // BIT 5, (I* + n) - case 0x6E: I_BIT_TE(5); break; // BIT 5, (I* + n) - case 0x6F: I_BIT_TE(5); break; // BIT 5, (I* + n) - case 0x70: I_BIT_TE(6); break; // BIT 6, (I* + n) - case 0x71: I_BIT_TE(6); break; // BIT 6, (I* + n) - case 0x72: I_BIT_TE(6); break; // BIT 6, (I* + n) - case 0x73: I_BIT_TE(6); break; // BIT 6, (I* + n) - case 0x74: I_BIT_TE(6); break; // BIT 6, (I* + n) - case 0x75: I_BIT_TE(6); break; // BIT 6, (I* + n) - case 0x76: I_BIT_TE(6); break; // BIT 6, (I* + n) - case 0x77: I_BIT_TE(6); break; // BIT 6, (I* + n) - case 0x78: I_BIT_TE(7); break; // BIT 7, (I* + n) - case 0x79: I_BIT_TE(7); break; // BIT 7, (I* + n) - case 0x7A: I_BIT_TE(7); break; // BIT 7, (I* + n) - case 0x7B: I_BIT_TE(7); break; // BIT 7, (I* + n) - case 0x7C: I_BIT_TE(7); break; // BIT 7, (I* + n) - case 0x7D: I_BIT_TE(7); break; // BIT 7, (I* + n) - case 0x7E: I_BIT_TE(7); break; // BIT 7, (I* + n) - case 0x7F: I_BIT_TE(7); break; // BIT 7, (I* + n) - case 0x80: I_BIT_OP(RES, 0, B); break; // RES 0, (I* + n) -> B - case 0x81: I_BIT_OP(RES, 0, C); break; // RES 0, (I* + n) -> C - case 0x82: I_BIT_OP(RES, 0, D); break; // RES 0, (I* + n) -> D - case 0x83: I_BIT_OP(RES, 0, E); break; // RES 0, (I* + n) -> E - case 0x84: I_BIT_OP(RES, 0, H); break; // RES 0, (I* + n) -> H - case 0x85: I_BIT_OP(RES, 0, L); break; // RES 0, (I* + n) -> L - case 0x86: I_BIT_OP(RES, 0, ALU); break; // RES 0, (I* + n) - case 0x87: I_BIT_OP(RES, 0, A); break; // RES 0, (I* + n) -> A - case 0x88: I_BIT_OP(RES, 1, B); break; // RES 1, (I* + n) -> B - case 0x89: I_BIT_OP(RES, 1, C); break; // RES 1, (I* + n) -> C - case 0x8A: I_BIT_OP(RES, 1, D); break; // RES 1, (I* + n) -> D - case 0x8B: I_BIT_OP(RES, 1, E); break; // RES 1, (I* + n) -> E - case 0x8C: I_BIT_OP(RES, 1, H); break; // RES 1, (I* + n) -> H - case 0x8D: I_BIT_OP(RES, 1, L); break; // RES 1, (I* + n) -> L - case 0x8E: I_BIT_OP(RES, 1, ALU); break; // RES 1, (I* + n) - case 0x8F: I_BIT_OP(RES, 1, A); break; // RES 1, (I* + n) -> A - case 0x90: I_BIT_OP(RES, 2, B); break; // RES 2, (I* + n) -> B - case 0x91: I_BIT_OP(RES, 2, C); break; // RES 2, (I* + n) -> C - case 0x92: I_BIT_OP(RES, 2, D); break; // RES 2, (I* + n) -> D - case 0x93: I_BIT_OP(RES, 2, E); break; // RES 2, (I* + n) -> E - case 0x94: I_BIT_OP(RES, 2, H); break; // RES 2, (I* + n) -> H - case 0x95: I_BIT_OP(RES, 2, L); break; // RES 2, (I* + n) -> L - case 0x96: I_BIT_OP(RES, 2, ALU); break; // RES 2, (I* + n) - case 0x97: I_BIT_OP(RES, 2, A); break; // RES 2, (I* + n) -> A - case 0x98: I_BIT_OP(RES, 3, B); break; // RES 3, (I* + n) -> B - case 0x99: I_BIT_OP(RES, 3, C); break; // RES 3, (I* + n) -> C - case 0x9A: I_BIT_OP(RES, 3, D); break; // RES 3, (I* + n) -> D - case 0x9B: I_BIT_OP(RES, 3, E); break; // RES 3, (I* + n) -> E - case 0x9C: I_BIT_OP(RES, 3, H); break; // RES 3, (I* + n) -> H - case 0x9D: I_BIT_OP(RES, 3, L); break; // RES 3, (I* + n) -> L - case 0x9E: I_BIT_OP(RES, 3, ALU); break; // RES 3, (I* + n) - case 0x9F: I_BIT_OP(RES, 3, A); break; // RES 3, (I* + n) -> A - case 0xA0: I_BIT_OP(RES, 4, B); break; // RES 4, (I* + n) -> B - case 0xA1: I_BIT_OP(RES, 4, C); break; // RES 4, (I* + n) -> C - case 0xA2: I_BIT_OP(RES, 4, D); break; // RES 4, (I* + n) -> D - case 0xA3: I_BIT_OP(RES, 4, E); break; // RES 4, (I* + n) -> E - case 0xA4: I_BIT_OP(RES, 4, H); break; // RES 4, (I* + n) -> H - case 0xA5: I_BIT_OP(RES, 4, L); break; // RES 4, (I* + n) -> L - case 0xA6: I_BIT_OP(RES, 4, ALU); break; // RES 4, (I* + n) - case 0xA7: I_BIT_OP(RES, 4, A); break; // RES 4, (I* + n) -> A - case 0xA8: I_BIT_OP(RES, 5, B); break; // RES 5, (I* + n) -> B - case 0xA9: I_BIT_OP(RES, 5, C); break; // RES 5, (I* + n) -> C - case 0xAA: I_BIT_OP(RES, 5, D); break; // RES 5, (I* + n) -> D - case 0xAB: I_BIT_OP(RES, 5, E); break; // RES 5, (I* + n) -> E - case 0xAC: I_BIT_OP(RES, 5, H); break; // RES 5, (I* + n) -> H - case 0xAD: I_BIT_OP(RES, 5, L); break; // RES 5, (I* + n) -> L - case 0xAE: I_BIT_OP(RES, 5, ALU); break; // RES 5, (I* + n) - case 0xAF: I_BIT_OP(RES, 5, A); break; // RES 5, (I* + n) -> A - case 0xB0: I_BIT_OP(RES, 6, B); break; // RES 6, (I* + n) -> B - case 0xB1: I_BIT_OP(RES, 6, C); break; // RES 6, (I* + n) -> C - case 0xB2: I_BIT_OP(RES, 6, D); break; // RES 6, (I* + n) -> D - case 0xB3: I_BIT_OP(RES, 6, E); break; // RES 6, (I* + n) -> E - case 0xB4: I_BIT_OP(RES, 6, H); break; // RES 6, (I* + n) -> H - case 0xB5: I_BIT_OP(RES, 6, L); break; // RES 6, (I* + n) -> L - case 0xB6: I_BIT_OP(RES, 6, ALU); break; // RES 6, (I* + n) - case 0xB7: I_BIT_OP(RES, 6, A); break; // RES 6, (I* + n) -> A - case 0xB8: I_BIT_OP(RES, 7, B); break; // RES 7, (I* + n) -> B - case 0xB9: I_BIT_OP(RES, 7, C); break; // RES 7, (I* + n) -> C - case 0xBA: I_BIT_OP(RES, 7, D); break; // RES 7, (I* + n) -> D - case 0xBB: I_BIT_OP(RES, 7, E); break; // RES 7, (I* + n) -> E - case 0xBC: I_BIT_OP(RES, 7, H); break; // RES 7, (I* + n) -> H - case 0xBD: I_BIT_OP(RES, 7, L); break; // RES 7, (I* + n) -> L - case 0xBE: I_BIT_OP(RES, 7, ALU); break; // RES 7, (I* + n) - case 0xBF: I_BIT_OP(RES, 7, A); break; // RES 7, (I* + n) -> A - case 0xC0: I_BIT_OP(SET, 0, B); break; // SET 0, (I* + n) -> B - case 0xC1: I_BIT_OP(SET, 0, C); break; // SET 0, (I* + n) -> C - case 0xC2: I_BIT_OP(SET, 0, D); break; // SET 0, (I* + n) -> D - case 0xC3: I_BIT_OP(SET, 0, E); break; // SET 0, (I* + n) -> E - case 0xC4: I_BIT_OP(SET, 0, H); break; // SET 0, (I* + n) -> H - case 0xC5: I_BIT_OP(SET, 0, L); break; // SET 0, (I* + n) -> L - case 0xC6: I_BIT_OP(SET, 0, ALU); break; // SET 0, (I* + n) - case 0xC7: I_BIT_OP(SET, 0, A); break; // SET 0, (I* + n) -> A - case 0xC8: I_BIT_OP(SET, 1, B); break; // SET 1, (I* + n) -> B - case 0xC9: I_BIT_OP(SET, 1, C); break; // SET 1, (I* + n) -> C - case 0xCA: I_BIT_OP(SET, 1, D); break; // SET 1, (I* + n) -> D - case 0xCB: I_BIT_OP(SET, 1, E); break; // SET 1, (I* + n) -> E - case 0xCC: I_BIT_OP(SET, 1, H); break; // SET 1, (I* + n) -> H - case 0xCD: I_BIT_OP(SET, 1, L); break; // SET 1, (I* + n) -> L - case 0xCE: I_BIT_OP(SET, 1, ALU); break; // SET 1, (I* + n) - case 0xCF: I_BIT_OP(SET, 1, A); break; // SET 1, (I* + n) -> A - case 0xD0: I_BIT_OP(SET, 2, B); break; // SET 2, (I* + n) -> B - case 0xD1: I_BIT_OP(SET, 2, C); break; // SET 2, (I* + n) -> C - case 0xD2: I_BIT_OP(SET, 2, D); break; // SET 2, (I* + n) -> D - case 0xD3: I_BIT_OP(SET, 2, E); break; // SET 2, (I* + n) -> E - case 0xD4: I_BIT_OP(SET, 2, H); break; // SET 2, (I* + n) -> H - case 0xD5: I_BIT_OP(SET, 2, L); break; // SET 2, (I* + n) -> L - case 0xD6: I_BIT_OP(SET, 2, ALU); break; // SET 2, (I* + n) - case 0xD7: I_BIT_OP(SET, 2, A); break; // SET 2, (I* + n) -> A - case 0xD8: I_BIT_OP(SET, 3, B); break; // SET 3, (I* + n) -> B - case 0xD9: I_BIT_OP(SET, 3, C); break; // SET 3, (I* + n) -> C - case 0xDA: I_BIT_OP(SET, 3, D); break; // SET 3, (I* + n) -> D - case 0xDB: I_BIT_OP(SET, 3, E); break; // SET 3, (I* + n) -> E - case 0xDC: I_BIT_OP(SET, 3, H); break; // SET 3, (I* + n) -> H - case 0xDD: I_BIT_OP(SET, 3, L); break; // SET 3, (I* + n) -> L - case 0xDE: I_BIT_OP(SET, 3, ALU); break; // SET 3, (I* + n) - case 0xDF: I_BIT_OP(SET, 3, A); break; // SET 3, (I* + n) -> A - case 0xE0: I_BIT_OP(SET, 4, B); break; // SET 4, (I* + n) -> B - case 0xE1: I_BIT_OP(SET, 4, C); break; // SET 4, (I* + n) -> C - case 0xE2: I_BIT_OP(SET, 4, D); break; // SET 4, (I* + n) -> D - case 0xE3: I_BIT_OP(SET, 4, E); break; // SET 4, (I* + n) -> E - case 0xE4: I_BIT_OP(SET, 4, H); break; // SET 4, (I* + n) -> H - case 0xE5: I_BIT_OP(SET, 4, L); break; // SET 4, (I* + n) -> L - case 0xE6: I_BIT_OP(SET, 4, ALU); break; // SET 4, (I* + n) - case 0xE7: I_BIT_OP(SET, 4, A); break; // SET 4, (I* + n) -> A - case 0xE8: I_BIT_OP(SET, 5, B); break; // SET 5, (I* + n) -> B - case 0xE9: I_BIT_OP(SET, 5, C); break; // SET 5, (I* + n) -> C - case 0xEA: I_BIT_OP(SET, 5, D); break; // SET 5, (I* + n) -> D - case 0xEB: I_BIT_OP(SET, 5, E); break; // SET 5, (I* + n) -> E - case 0xEC: I_BIT_OP(SET, 5, H); break; // SET 5, (I* + n) -> H - case 0xED: I_BIT_OP(SET, 5, L); break; // SET 5, (I* + n) -> L - case 0xEE: I_BIT_OP(SET, 5, ALU); break; // SET 5, (I* + n) - case 0xEF: I_BIT_OP(SET, 5, A); break; // SET 5, (I* + n) -> A - case 0xF0: I_BIT_OP(SET, 6, B); break; // SET 6, (I* + n) -> B - case 0xF1: I_BIT_OP(SET, 6, C); break; // SET 6, (I* + n) -> C - case 0xF2: I_BIT_OP(SET, 6, D); break; // SET 6, (I* + n) -> D - case 0xF3: I_BIT_OP(SET, 6, E); break; // SET 6, (I* + n) -> E - case 0xF4: I_BIT_OP(SET, 6, H); break; // SET 6, (I* + n) -> H - case 0xF5: I_BIT_OP(SET, 6, L); break; // SET 6, (I* + n) -> L - case 0xF6: I_BIT_OP(SET, 6, ALU); break; // SET 6, (I* + n) - case 0xF7: I_BIT_OP(SET, 6, A); break; // SET 6, (I* + n) -> A - case 0xF8: I_BIT_OP(SET, 7, B); break; // SET 7, (I* + n) -> B - case 0xF9: I_BIT_OP(SET, 7, C); break; // SET 7, (I* + n) -> C - case 0xFA: I_BIT_OP(SET, 7, D); break; // SET 7, (I* + n) -> D - case 0xFB: I_BIT_OP(SET, 7, E); break; // SET 7, (I* + n) -> E - case 0xFC: I_BIT_OP(SET, 7, H); break; // SET 7, (I* + n) -> H - case 0xFD: I_BIT_OP(SET, 7, L); break; // SET 7, (I* + n) -> L - case 0xFE: I_BIT_OP(SET, 7, ALU); break; // SET 7, (I* + n) - case 0xFF: I_BIT_OP(SET, 7, A); break; // SET 7, (I* + n) -> A + case 0x00: I_INT_OP(RLC, B); break; // RLC (I* + n) -> B + case 0x01: I_INT_OP(RLC, C); break; // RLC (I* + n) -> C + case 0x02: I_INT_OP(RLC, D); break; // RLC (I* + n) -> D + case 0x03: I_INT_OP(RLC, E); break; // RLC (I* + n) -> E + case 0x04: I_INT_OP(RLC, H); break; // RLC (I* + n) -> H + case 0x05: I_INT_OP(RLC, L); break; // RLC (I* + n) -> L + case 0x06: I_INT_OP(RLC, ALU); break; // RLC (I* + n) + case 0x07: I_INT_OP(RLC, A); break; // RLC (I* + n) -> A + case 0x08: I_INT_OP(RRC, B); break; // RRC (I* + n) -> B + case 0x09: I_INT_OP(RRC, C); break; // RRC (I* + n) -> C + case 0x0A: I_INT_OP(RRC, D); break; // RRC (I* + n) -> D + case 0x0B: I_INT_OP(RRC, E); break; // RRC (I* + n) -> E + case 0x0C: I_INT_OP(RRC, H); break; // RRC (I* + n) -> H + case 0x0D: I_INT_OP(RRC, L); break; // RRC (I* + n) -> L + case 0x0E: I_INT_OP(RRC, ALU); break; // RRC (I* + n) + case 0x0F: I_INT_OP(RRC, A); break; // RRC (I* + n) -> A + case 0x10: I_INT_OP(RL, B); break; // RL (I* + n) -> B + case 0x11: I_INT_OP(RL, C); break; // RL (I* + n) -> C + case 0x12: I_INT_OP(RL, D); break; // RL (I* + n) -> D + case 0x13: I_INT_OP(RL, E); break; // RL (I* + n) -> E + case 0x14: I_INT_OP(RL, H); break; // RL (I* + n) -> H + case 0x15: I_INT_OP(RL, L); break; // RL (I* + n) -> L + case 0x16: I_INT_OP(RL, ALU); break; // RL (I* + n) + case 0x17: I_INT_OP(RL, A); break; // RL (I* + n) -> A + case 0x18: I_INT_OP(RR, B); break; // RR (I* + n) -> B + case 0x19: I_INT_OP(RR, C); break; // RR (I* + n) -> C + case 0x1A: I_INT_OP(RR, D); break; // RR (I* + n) -> D + case 0x1B: I_INT_OP(RR, E); break; // RR (I* + n) -> E + case 0x1C: I_INT_OP(RR, H); break; // RR (I* + n) -> H + case 0x1D: I_INT_OP(RR, L); break; // RR (I* + n) -> L + case 0x1E: I_INT_OP(RR, ALU); break; // RR (I* + n) + case 0x1F: I_INT_OP(RR, A); break; // RR (I* + n) -> A + case 0x20: I_INT_OP(SLA, B); break; // SLA (I* + n) -> B + case 0x21: I_INT_OP(SLA, C); break; // SLA (I* + n) -> C + case 0x22: I_INT_OP(SLA, D); break; // SLA (I* + n) -> D + case 0x23: I_INT_OP(SLA, E); break; // SLA (I* + n) -> E + case 0x24: I_INT_OP(SLA, H); break; // SLA (I* + n) -> H + case 0x25: I_INT_OP(SLA, L); break; // SLA (I* + n) -> L + case 0x26: I_INT_OP(SLA, ALU); break; // SLA (I* + n) + case 0x27: I_INT_OP(SLA, A); break; // SLA (I* + n) -> A + case 0x28: I_INT_OP(SRA, B); break; // SRA (I* + n) -> B + case 0x29: I_INT_OP(SRA, C); break; // SRA (I* + n) -> C + case 0x2A: I_INT_OP(SRA, D); break; // SRA (I* + n) -> D + case 0x2B: I_INT_OP(SRA, E); break; // SRA (I* + n) -> E + case 0x2C: I_INT_OP(SRA, H); break; // SRA (I* + n) -> H + case 0x2D: I_INT_OP(SRA, L); break; // SRA (I* + n) -> L + case 0x2E: I_INT_OP(SRA, ALU); break; // SRA (I* + n) + case 0x2F: I_INT_OP(SRA, A); break; // SRA (I* + n) -> A + case 0x30: I_INT_OP(SLL, B); break; // SLL (I* + n) -> B + case 0x31: I_INT_OP(SLL, C); break; // SLL (I* + n) -> C + case 0x32: I_INT_OP(SLL, D); break; // SLL (I* + n) -> D + case 0x33: I_INT_OP(SLL, E); break; // SLL (I* + n) -> E + case 0x34: I_INT_OP(SLL, H); break; // SLL (I* + n) -> H + case 0x35: I_INT_OP(SLL, L); break; // SLL (I* + n) -> L + case 0x36: I_INT_OP(SLL, ALU); break; // SLL (I* + n) + case 0x37: I_INT_OP(SLL, A); break; // SLL (I* + n) -> A + case 0x38: I_INT_OP(SRL, B); break; // SRL (I* + n) -> B + case 0x39: I_INT_OP(SRL, C); break; // SRL (I* + n) -> C + case 0x3A: I_INT_OP(SRL, D); break; // SRL (I* + n) -> D + case 0x3B: I_INT_OP(SRL, E); break; // SRL (I* + n) -> E + case 0x3C: I_INT_OP(SRL, H); break; // SRL (I* + n) -> H + case 0x3D: I_INT_OP(SRL, L); break; // SRL (I* + n) -> L + case 0x3E: I_INT_OP(SRL, ALU); break; // SRL (I* + n) + case 0x3F: I_INT_OP(SRL, A); break; // SRL (I* + n) -> A + case 0x40: I_BIT_TE(0); break; // BIT 0, (I* + n) + case 0x41: I_BIT_TE(0); break; // BIT 0, (I* + n) + case 0x42: I_BIT_TE(0); break; // BIT 0, (I* + n) + case 0x43: I_BIT_TE(0); break; // BIT 0, (I* + n) + case 0x44: I_BIT_TE(0); break; // BIT 0, (I* + n) + case 0x45: I_BIT_TE(0); break; // BIT 0, (I* + n) + case 0x46: I_BIT_TE(0); break; // BIT 0, (I* + n) + case 0x47: I_BIT_TE(0); break; // BIT 0, (I* + n) + case 0x48: I_BIT_TE(1); break; // BIT 1, (I* + n) + case 0x49: I_BIT_TE(1); break; // BIT 1, (I* + n) + case 0x4A: I_BIT_TE(1); break; // BIT 1, (I* + n) + case 0x4B: I_BIT_TE(1); break; // BIT 1, (I* + n) + case 0x4C: I_BIT_TE(1); break; // BIT 1, (I* + n) + case 0x4D: I_BIT_TE(1); break; // BIT 1, (I* + n) + case 0x4E: I_BIT_TE(1); break; // BIT 1, (I* + n) + case 0x4F: I_BIT_TE(1); break; // BIT 1, (I* + n) + case 0x50: I_BIT_TE(2); break; // BIT 2, (I* + n) + case 0x51: I_BIT_TE(2); break; // BIT 2, (I* + n) + case 0x52: I_BIT_TE(2); break; // BIT 2, (I* + n) + case 0x53: I_BIT_TE(2); break; // BIT 2, (I* + n) + case 0x54: I_BIT_TE(2); break; // BIT 2, (I* + n) + case 0x55: I_BIT_TE(2); break; // BIT 2, (I* + n) + case 0x56: I_BIT_TE(2); break; // BIT 2, (I* + n) + case 0x57: I_BIT_TE(2); break; // BIT 2, (I* + n) + case 0x58: I_BIT_TE(3); break; // BIT 3, (I* + n) + case 0x59: I_BIT_TE(3); break; // BIT 3, (I* + n) + case 0x5A: I_BIT_TE(3); break; // BIT 3, (I* + n) + case 0x5B: I_BIT_TE(3); break; // BIT 3, (I* + n) + case 0x5C: I_BIT_TE(3); break; // BIT 3, (I* + n) + case 0x5D: I_BIT_TE(3); break; // BIT 3, (I* + n) + case 0x5E: I_BIT_TE(3); break; // BIT 3, (I* + n) + case 0x5F: I_BIT_TE(3); break; // BIT 3, (I* + n) + case 0x60: I_BIT_TE(4); break; // BIT 4, (I* + n) + case 0x61: I_BIT_TE(4); break; // BIT 4, (I* + n) + case 0x62: I_BIT_TE(4); break; // BIT 4, (I* + n) + case 0x63: I_BIT_TE(4); break; // BIT 4, (I* + n) + case 0x64: I_BIT_TE(4); break; // BIT 4, (I* + n) + case 0x65: I_BIT_TE(4); break; // BIT 4, (I* + n) + case 0x66: I_BIT_TE(4); break; // BIT 4, (I* + n) + case 0x67: I_BIT_TE(4); break; // BIT 4, (I* + n) + case 0x68: I_BIT_TE(5); break; // BIT 5, (I* + n) + case 0x69: I_BIT_TE(5); break; // BIT 5, (I* + n) + case 0x6A: I_BIT_TE(5); break; // BIT 5, (I* + n) + case 0x6B: I_BIT_TE(5); break; // BIT 5, (I* + n) + case 0x6C: I_BIT_TE(5); break; // BIT 5, (I* + n) + case 0x6D: I_BIT_TE(5); break; // BIT 5, (I* + n) + case 0x6E: I_BIT_TE(5); break; // BIT 5, (I* + n) + case 0x6F: I_BIT_TE(5); break; // BIT 5, (I* + n) + case 0x70: I_BIT_TE(6); break; // BIT 6, (I* + n) + case 0x71: I_BIT_TE(6); break; // BIT 6, (I* + n) + case 0x72: I_BIT_TE(6); break; // BIT 6, (I* + n) + case 0x73: I_BIT_TE(6); break; // BIT 6, (I* + n) + case 0x74: I_BIT_TE(6); break; // BIT 6, (I* + n) + case 0x75: I_BIT_TE(6); break; // BIT 6, (I* + n) + case 0x76: I_BIT_TE(6); break; // BIT 6, (I* + n) + case 0x77: I_BIT_TE(6); break; // BIT 6, (I* + n) + case 0x78: I_BIT_TE(7); break; // BIT 7, (I* + n) + case 0x79: I_BIT_TE(7); break; // BIT 7, (I* + n) + case 0x7A: I_BIT_TE(7); break; // BIT 7, (I* + n) + case 0x7B: I_BIT_TE(7); break; // BIT 7, (I* + n) + case 0x7C: I_BIT_TE(7); break; // BIT 7, (I* + n) + case 0x7D: I_BIT_TE(7); break; // BIT 7, (I* + n) + case 0x7E: I_BIT_TE(7); break; // BIT 7, (I* + n) + case 0x7F: I_BIT_TE(7); break; // BIT 7, (I* + n) + case 0x80: I_BIT_OP(RES, 0, B); break; // RES 0, (I* + n) -> B + case 0x81: I_BIT_OP(RES, 0, C); break; // RES 0, (I* + n) -> C + case 0x82: I_BIT_OP(RES, 0, D); break; // RES 0, (I* + n) -> D + case 0x83: I_BIT_OP(RES, 0, E); break; // RES 0, (I* + n) -> E + case 0x84: I_BIT_OP(RES, 0, H); break; // RES 0, (I* + n) -> H + case 0x85: I_BIT_OP(RES, 0, L); break; // RES 0, (I* + n) -> L + case 0x86: I_BIT_OP(RES, 0, ALU); break; // RES 0, (I* + n) + case 0x87: I_BIT_OP(RES, 0, A); break; // RES 0, (I* + n) -> A + case 0x88: I_BIT_OP(RES, 1, B); break; // RES 1, (I* + n) -> B + case 0x89: I_BIT_OP(RES, 1, C); break; // RES 1, (I* + n) -> C + case 0x8A: I_BIT_OP(RES, 1, D); break; // RES 1, (I* + n) -> D + case 0x8B: I_BIT_OP(RES, 1, E); break; // RES 1, (I* + n) -> E + case 0x8C: I_BIT_OP(RES, 1, H); break; // RES 1, (I* + n) -> H + case 0x8D: I_BIT_OP(RES, 1, L); break; // RES 1, (I* + n) -> L + case 0x8E: I_BIT_OP(RES, 1, ALU); break; // RES 1, (I* + n) + case 0x8F: I_BIT_OP(RES, 1, A); break; // RES 1, (I* + n) -> A + case 0x90: I_BIT_OP(RES, 2, B); break; // RES 2, (I* + n) -> B + case 0x91: I_BIT_OP(RES, 2, C); break; // RES 2, (I* + n) -> C + case 0x92: I_BIT_OP(RES, 2, D); break; // RES 2, (I* + n) -> D + case 0x93: I_BIT_OP(RES, 2, E); break; // RES 2, (I* + n) -> E + case 0x94: I_BIT_OP(RES, 2, H); break; // RES 2, (I* + n) -> H + case 0x95: I_BIT_OP(RES, 2, L); break; // RES 2, (I* + n) -> L + case 0x96: I_BIT_OP(RES, 2, ALU); break; // RES 2, (I* + n) + case 0x97: I_BIT_OP(RES, 2, A); break; // RES 2, (I* + n) -> A + case 0x98: I_BIT_OP(RES, 3, B); break; // RES 3, (I* + n) -> B + case 0x99: I_BIT_OP(RES, 3, C); break; // RES 3, (I* + n) -> C + case 0x9A: I_BIT_OP(RES, 3, D); break; // RES 3, (I* + n) -> D + case 0x9B: I_BIT_OP(RES, 3, E); break; // RES 3, (I* + n) -> E + case 0x9C: I_BIT_OP(RES, 3, H); break; // RES 3, (I* + n) -> H + case 0x9D: I_BIT_OP(RES, 3, L); break; // RES 3, (I* + n) -> L + case 0x9E: I_BIT_OP(RES, 3, ALU); break; // RES 3, (I* + n) + case 0x9F: I_BIT_OP(RES, 3, A); break; // RES 3, (I* + n) -> A + case 0xA0: I_BIT_OP(RES, 4, B); break; // RES 4, (I* + n) -> B + case 0xA1: I_BIT_OP(RES, 4, C); break; // RES 4, (I* + n) -> C + case 0xA2: I_BIT_OP(RES, 4, D); break; // RES 4, (I* + n) -> D + case 0xA3: I_BIT_OP(RES, 4, E); break; // RES 4, (I* + n) -> E + case 0xA4: I_BIT_OP(RES, 4, H); break; // RES 4, (I* + n) -> H + case 0xA5: I_BIT_OP(RES, 4, L); break; // RES 4, (I* + n) -> L + case 0xA6: I_BIT_OP(RES, 4, ALU); break; // RES 4, (I* + n) + case 0xA7: I_BIT_OP(RES, 4, A); break; // RES 4, (I* + n) -> A + case 0xA8: I_BIT_OP(RES, 5, B); break; // RES 5, (I* + n) -> B + case 0xA9: I_BIT_OP(RES, 5, C); break; // RES 5, (I* + n) -> C + case 0xAA: I_BIT_OP(RES, 5, D); break; // RES 5, (I* + n) -> D + case 0xAB: I_BIT_OP(RES, 5, E); break; // RES 5, (I* + n) -> E + case 0xAC: I_BIT_OP(RES, 5, H); break; // RES 5, (I* + n) -> H + case 0xAD: I_BIT_OP(RES, 5, L); break; // RES 5, (I* + n) -> L + case 0xAE: I_BIT_OP(RES, 5, ALU); break; // RES 5, (I* + n) + case 0xAF: I_BIT_OP(RES, 5, A); break; // RES 5, (I* + n) -> A + case 0xB0: I_BIT_OP(RES, 6, B); break; // RES 6, (I* + n) -> B + case 0xB1: I_BIT_OP(RES, 6, C); break; // RES 6, (I* + n) -> C + case 0xB2: I_BIT_OP(RES, 6, D); break; // RES 6, (I* + n) -> D + case 0xB3: I_BIT_OP(RES, 6, E); break; // RES 6, (I* + n) -> E + case 0xB4: I_BIT_OP(RES, 6, H); break; // RES 6, (I* + n) -> H + case 0xB5: I_BIT_OP(RES, 6, L); break; // RES 6, (I* + n) -> L + case 0xB6: I_BIT_OP(RES, 6, ALU); break; // RES 6, (I* + n) + case 0xB7: I_BIT_OP(RES, 6, A); break; // RES 6, (I* + n) -> A + case 0xB8: I_BIT_OP(RES, 7, B); break; // RES 7, (I* + n) -> B + case 0xB9: I_BIT_OP(RES, 7, C); break; // RES 7, (I* + n) -> C + case 0xBA: I_BIT_OP(RES, 7, D); break; // RES 7, (I* + n) -> D + case 0xBB: I_BIT_OP(RES, 7, E); break; // RES 7, (I* + n) -> E + case 0xBC: I_BIT_OP(RES, 7, H); break; // RES 7, (I* + n) -> H + case 0xBD: I_BIT_OP(RES, 7, L); break; // RES 7, (I* + n) -> L + case 0xBE: I_BIT_OP(RES, 7, ALU); break; // RES 7, (I* + n) + case 0xBF: I_BIT_OP(RES, 7, A); break; // RES 7, (I* + n) -> A + case 0xC0: I_BIT_OP(SET, 0, B); break; // SET 0, (I* + n) -> B + case 0xC1: I_BIT_OP(SET, 0, C); break; // SET 0, (I* + n) -> C + case 0xC2: I_BIT_OP(SET, 0, D); break; // SET 0, (I* + n) -> D + case 0xC3: I_BIT_OP(SET, 0, E); break; // SET 0, (I* + n) -> E + case 0xC4: I_BIT_OP(SET, 0, H); break; // SET 0, (I* + n) -> H + case 0xC5: I_BIT_OP(SET, 0, L); break; // SET 0, (I* + n) -> L + case 0xC6: I_BIT_OP(SET, 0, ALU); break; // SET 0, (I* + n) + case 0xC7: I_BIT_OP(SET, 0, A); break; // SET 0, (I* + n) -> A + case 0xC8: I_BIT_OP(SET, 1, B); break; // SET 1, (I* + n) -> B + case 0xC9: I_BIT_OP(SET, 1, C); break; // SET 1, (I* + n) -> C + case 0xCA: I_BIT_OP(SET, 1, D); break; // SET 1, (I* + n) -> D + case 0xCB: I_BIT_OP(SET, 1, E); break; // SET 1, (I* + n) -> E + case 0xCC: I_BIT_OP(SET, 1, H); break; // SET 1, (I* + n) -> H + case 0xCD: I_BIT_OP(SET, 1, L); break; // SET 1, (I* + n) -> L + case 0xCE: I_BIT_OP(SET, 1, ALU); break; // SET 1, (I* + n) + case 0xCF: I_BIT_OP(SET, 1, A); break; // SET 1, (I* + n) -> A + case 0xD0: I_BIT_OP(SET, 2, B); break; // SET 2, (I* + n) -> B + case 0xD1: I_BIT_OP(SET, 2, C); break; // SET 2, (I* + n) -> C + case 0xD2: I_BIT_OP(SET, 2, D); break; // SET 2, (I* + n) -> D + case 0xD3: I_BIT_OP(SET, 2, E); break; // SET 2, (I* + n) -> E + case 0xD4: I_BIT_OP(SET, 2, H); break; // SET 2, (I* + n) -> H + case 0xD5: I_BIT_OP(SET, 2, L); break; // SET 2, (I* + n) -> L + case 0xD6: I_BIT_OP(SET, 2, ALU); break; // SET 2, (I* + n) + case 0xD7: I_BIT_OP(SET, 2, A); break; // SET 2, (I* + n) -> A + case 0xD8: I_BIT_OP(SET, 3, B); break; // SET 3, (I* + n) -> B + case 0xD9: I_BIT_OP(SET, 3, C); break; // SET 3, (I* + n) -> C + case 0xDA: I_BIT_OP(SET, 3, D); break; // SET 3, (I* + n) -> D + case 0xDB: I_BIT_OP(SET, 3, E); break; // SET 3, (I* + n) -> E + case 0xDC: I_BIT_OP(SET, 3, H); break; // SET 3, (I* + n) -> H + case 0xDD: I_BIT_OP(SET, 3, L); break; // SET 3, (I* + n) -> L + case 0xDE: I_BIT_OP(SET, 3, ALU); break; // SET 3, (I* + n) + case 0xDF: I_BIT_OP(SET, 3, A); break; // SET 3, (I* + n) -> A + case 0xE0: I_BIT_OP(SET, 4, B); break; // SET 4, (I* + n) -> B + case 0xE1: I_BIT_OP(SET, 4, C); break; // SET 4, (I* + n) -> C + case 0xE2: I_BIT_OP(SET, 4, D); break; // SET 4, (I* + n) -> D + case 0xE3: I_BIT_OP(SET, 4, E); break; // SET 4, (I* + n) -> E + case 0xE4: I_BIT_OP(SET, 4, H); break; // SET 4, (I* + n) -> H + case 0xE5: I_BIT_OP(SET, 4, L); break; // SET 4, (I* + n) -> L + case 0xE6: I_BIT_OP(SET, 4, ALU); break; // SET 4, (I* + n) + case 0xE7: I_BIT_OP(SET, 4, A); break; // SET 4, (I* + n) -> A + case 0xE8: I_BIT_OP(SET, 5, B); break; // SET 5, (I* + n) -> B + case 0xE9: I_BIT_OP(SET, 5, C); break; // SET 5, (I* + n) -> C + case 0xEA: I_BIT_OP(SET, 5, D); break; // SET 5, (I* + n) -> D + case 0xEB: I_BIT_OP(SET, 5, E); break; // SET 5, (I* + n) -> E + case 0xEC: I_BIT_OP(SET, 5, H); break; // SET 5, (I* + n) -> H + case 0xED: I_BIT_OP(SET, 5, L); break; // SET 5, (I* + n) -> L + case 0xEE: I_BIT_OP(SET, 5, ALU); break; // SET 5, (I* + n) + case 0xEF: I_BIT_OP(SET, 5, A); break; // SET 5, (I* + n) -> A + case 0xF0: I_BIT_OP(SET, 6, B); break; // SET 6, (I* + n) -> B + case 0xF1: I_BIT_OP(SET, 6, C); break; // SET 6, (I* + n) -> C + case 0xF2: I_BIT_OP(SET, 6, D); break; // SET 6, (I* + n) -> D + case 0xF3: I_BIT_OP(SET, 6, E); break; // SET 6, (I* + n) -> E + case 0xF4: I_BIT_OP(SET, 6, H); break; // SET 6, (I* + n) -> H + case 0xF5: I_BIT_OP(SET, 6, L); break; // SET 6, (I* + n) -> L + case 0xF6: I_BIT_OP(SET, 6, ALU); break; // SET 6, (I* + n) + case 0xF7: I_BIT_OP(SET, 6, A); break; // SET 6, (I* + n) -> A + case 0xF8: I_BIT_OP(SET, 7, B); break; // SET 7, (I* + n) -> B + case 0xF9: I_BIT_OP(SET, 7, C); break; // SET 7, (I* + n) -> C + case 0xFA: I_BIT_OP(SET, 7, D); break; // SET 7, (I* + n) -> D + case 0xFB: I_BIT_OP(SET, 7, E); break; // SET 7, (I* + n) -> E + case 0xFC: I_BIT_OP(SET, 7, H); break; // SET 7, (I* + n) -> H + case 0xFD: I_BIT_OP(SET, 7, L); break; // SET 7, (I* + n) -> L + case 0xFE: I_BIT_OP(SET, 7, ALU); break; // SET 7, (I* + n) + case 0xFF: I_BIT_OP(SET, 7, A); break; // SET 7, (I* + n) -> A } + + std::memcpy(&IXYCBIndex[i * 38], &cur_instr, 38); + std::memcpy(&IXYCBIndexBUSRQ[i * 19], &BUSRQ, 19); + std::memcpy(&IXYCBIndexMEMRQ[i * 19], &MEMRQ, 19); + IXYCBIndexIRQS[i] = IRQS; } } @@ -5260,8 +5455,8 @@ namespace MSXHawk MEMRQ[i] |= (*loader << 16); loader++; MEMRQ[i] |= (*loader << 24); loader++; } - TotalExecutedCycles = *loader; loader++; TotalExecutedCycles |= (*loader << 8); loader++; - TotalExecutedCycles |= (*loader << 16); loader++; TotalExecutedCycles |= (*loader << 24); loader++; + TotalExecutedCycles = *loader; loader++; TotalExecutedCycles |= ((uint64_t)*loader << 8); loader++; + TotalExecutedCycles |= ((uint64_t)*loader << 16); loader++; TotalExecutedCycles |= ((uint64_t)*loader << 24); loader++; TotalExecutedCycles |= ((uint64_t)*loader << 32); loader++; TotalExecutedCycles |= ((uint64_t)*loader << 40); loader++; TotalExecutedCycles |= ((uint64_t)*loader << 48); loader++; TotalExecutedCycles |= ((uint64_t)*loader << 56); loader++;