GBHawk: fix x-scroll latch and add some notes
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parent
8449f9fcb8
commit
7a4c5afce4
src/BizHawk.Emulation.Cores
CPUs/LR35902
Consoles/Nintendo/GBHawk
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@ -5,7 +5,7 @@ namespace BizHawk.Emulation.Cores.Components.LR35902
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public ulong TotalExecutedCycles;
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private int EI_pending;
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private bool interrupts_enabled;
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public bool interrupts_enabled;
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// variables for executing instructions
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public int instr_pntr = 0;
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@ -163,9 +163,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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scroll_x = value;
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break;
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case 0xFF44: // LY
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// writing to LY has no effect on GBC (zen intergalactic ninja does this on initialization)
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//LY = 0; /*reset*/
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//LY_read = 0;
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// writing to LY has no effect, confirmed by gambatte test roms
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break;
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case 0xFF45: // LYC
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// tests indicate that latching writes to LYC should take place 4 cycles after the write
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@ -597,15 +595,6 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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}
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else if (!rendering_complete)
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{
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if (cycle == 85)
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{
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// x-scroll is expected to be latched one cycle later
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// this is fine since nothing has started in the rendering until the second cycle
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// calculate the column number of the tile to start with
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x_tile = scroll_x >> 3;
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render_offset = scroll_offset = scroll_x % 8;
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}
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// render the screen and handle hblank
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render(cycle - 85);
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}
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@ -658,12 +647,6 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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OAM_access_write = false;
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VRAM_access_read = false;
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VRAM_access_write = false;
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// x-scroll is expected to be latched one cycle later
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// this is fine since nothing has started in the rendering until the second cycle
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// calculate the column number of the tile to start with
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x_tile = scroll_x >> 3;
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render_offset = scroll_offset = scroll_x % 8;
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}
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// render the screen and handle hblank
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@ -1119,7 +1102,11 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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{
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// here we set up rendering
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pre_render = false;
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// x scroll is latched here
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x_tile = scroll_x >> 3;
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render_offset = scroll_offset = scroll_x % 8;
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render_counter = 0;
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latch_counter = 0;
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read_case = 0;
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@ -159,9 +159,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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scroll_x = value;
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break;
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case 0xFF44: // LY
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// writing to LY has no effect on GBC (zen intergalactic ninja does this on initialization)
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//LY = 0; /*reset*/
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//LY_read = 0;
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// writing to LY has no effect, confirmed by gambatte test roms
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break;
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case 0xFF45: // LYC
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// tests indicate that latching writes to LYC should take place 4 cycles after the write
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@ -587,15 +585,6 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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}
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else if (!rendering_complete)
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{
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if (cycle == 85)
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{
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// x-scroll is expected to be latched one cycle later
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// this is fine since nothing has started in the rendering until the second cycle
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// calculate the column number of the tile to start with
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x_tile = scroll_x >> 3;
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render_offset = scroll_offset = scroll_x % 8;
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}
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// render the screen and handle hblank
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render(cycle - 85);
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}
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@ -649,12 +638,6 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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OAM_access_write = false;
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VRAM_access_write = false;
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VRAM_access_read = false;
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// x-scroll is expected to be latched one cycle later
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// this is fine since nothing has started in the rendering until the second cycle
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// calculate the column number of the tile to start with
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x_tile = scroll_x >> 3;
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render_offset = scroll_offset = scroll_x % 8;
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}
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// render the screen and handle hblank
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@ -1074,7 +1057,11 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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{
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// here we set up rendering
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pre_render = false;
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// calculate the column number of the tile to start with
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x_tile = scroll_x >> 3;
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render_offset = scroll_offset = scroll_x % 8;
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render_counter = 0;
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latch_counter = 0;
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read_case = 0;
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@ -1238,14 +1225,24 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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VRAM_access_read = true;
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VRAM_access_write = true;
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read_case = 18;
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if (Core.double_speed)
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{
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STAT &= 0xFC;
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STAT |= 0x00;
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if (STAT.Bit(3)) { HBL_INT = true; }
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// the CPU has to be able to see the transition from mode 3 to mode 0 to start HDMA
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}
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}
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else
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{
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STAT &= 0xFC;
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STAT |= 0x00;
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if (STAT.Bit(3)) { HBL_INT = true; }
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// the CPU has to be able to see the transition from mode 3 to mode 0 to start HDMA
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if (!Core.double_speed)
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{
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STAT &= 0xFC;
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STAT |= 0x00;
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if (STAT.Bit(3)) { HBL_INT = true; }
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// the CPU has to be able to see the transition from mode 3 to mode 0 to start HDMA
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}
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}
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}
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break;
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@ -8,6 +8,8 @@ using BizHawk.Emulation.Cores.Consoles.Nintendo.Gameboy;
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using System.Runtime.InteropServices;
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// TODO: mode1_disableint_gbc.gbc behaves differently between GBC and GBA, why?
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// TODO: oam_dma_start.gb does not behave as expected but test still passes through lucky coincidences / test deficiency
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// TODO: LYC interrupt behaves differently in GBC and GB compat mode
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namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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{
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@ -54,6 +54,8 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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case 0xFF41: // STAT
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// writing to STAT during mode 0 or 1 causes a STAT IRQ
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// this appears to be a glitchy LYC compare
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if (!value.Bit(6)) { LYC_INT = false; }
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if (LCDC.Bit(7))
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{
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if (((STAT & 3) == 0) || ((STAT & 3) == 1))
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@ -73,7 +75,6 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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}
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STAT = (byte)((value & 0xF8) | (STAT & 7) | 0x80);
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//if (!STAT.Bit(6)) { LYC_INT = false; }
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if (!STAT.Bit(4)) { VBL_INT = false; }
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break;
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case 0xFF42: // SCY
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@ -83,8 +84,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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scroll_x = value;
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break;
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case 0xFF44: // LY
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// writing to LY has no effect on GBC, not sure about GB (zen intergalactic ninja does this on initialization)
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LY = 0; /*reset*/
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// writing to LY has no effect, confirmed by gambatte test roms
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break;
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case 0xFF45: // LYC
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LYC = value;
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@ -298,15 +298,6 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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}
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else if (!rendering_complete)
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{
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if (cycle == 85)
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{
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// x-scroll is expected to be latched one cycle later
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// this is fine since nothing has started in the rendering until the second cycle
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// calculate the column number of the tile to start with
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x_tile = scroll_x >> 3;
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render_offset = scroll_offset = scroll_x % 8;
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}
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// render the screen and handle hblank
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render(cycle - 85);
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}
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@ -361,12 +352,6 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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OAM_INT = false;
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OAM_access_write = false;
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VRAM_access_write = false;
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// x-scroll is expected to be latched one cycle later
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// this is fine since nothing has started in the rendering until the second cycle
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// calculate the column number of the tile to start with
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x_tile = scroll_x >> 3;
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render_offset = scroll_offset = scroll_x % 8;
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}
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// render the screen and handle hblank
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@ -733,7 +718,11 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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{
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// here we set up rendering
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pre_render = false;
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// x scroll is latched here
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x_tile = scroll_x >> 3;
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render_offset = scroll_offset = scroll_x % 8;
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render_counter = 0;
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latch_counter = 0;
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read_case = 0;
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@ -37,6 +37,7 @@ namespace BizHawk.Emulation.Cores.Nintendo.GBHawk
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// Interrupt flags
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case 0xFF0F:
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// TODO: Maybe some PPU bits are immediately visible, see 10spritesPrLine_10xposA7_m0irq_2_dmg08_cgb04c_out2.gbc
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ret = REG_FF0F_OLD;
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break;
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