more reg get/setting and tracing support for gpu/dsp

This commit is contained in:
CasualPokePlayer 2022-09-24 04:14:28 -07:00
parent ef18a76064
commit 740cd1f8d4
6 changed files with 37 additions and 7 deletions

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@ -3,6 +3,8 @@
#include "settings.h"
#include "memory.h"
#include "tom.h"
#include "gpu.h"
#include "dsp.h"
#include "joystick.h"
#include "m68000/m68kinterface.h"
@ -298,22 +300,44 @@ EXPORT void SetMemoryCallback(u32 which, void (*callback)(u32))
}
}
void (*TraceCallback)(u32*) = 0;
void (*CPUTraceCallback)(u32*) = 0;
void (*GPUTraceCallback)(u32, u32*) = 0;
void (*DSPTraceCallback)(u32, u32*) = 0;
EXPORT void SetTraceCallback(void (*callback)(u32*))
EXPORT void SetTraceCallbacks(void (*ccb)(u32*), void (*gcb)(u32, u32*), void (*dcb)(u32, u32*))
{
TraceCallback = callback;
CPUTraceCallback = ccb;
GPUTraceCallback = gcb;
DSPTraceCallback = dcb;
}
extern u32 gpu_pc;
extern u32 dsp_pc;
EXPORT void GetRegisters(u32* regs)
{
for (u32 i = 0; i < 18; i++)
{
regs[i] = m68k_get_reg(NULL, (m68k_register_t)i);
}
memcpy(&regs[18], gpu_reg_bank_0, 128);
memcpy(&regs[50], gpu_reg_bank_1, 128);
memcpy(&regs[82], dsp_reg_bank_0, 128);
memcpy(&regs[114], dsp_reg_bank_1, 128);
regs[146] = gpu_pc;
regs[147] = dsp_pc;
}
EXPORT void SetRegister(u32 which, u32 val)
{
m68k_set_reg((m68k_register_t)which, val);
switch (which)
{
case 0 ... 17: m68k_set_reg((m68k_register_t)which, val); break;
case 18 ... 49: gpu_reg_bank_0[which - 18] = val; break;
case 50 ... 81: gpu_reg_bank_1[which - 50] = val; break;
case 82 ... 113: dsp_reg_bank_0[which - 82] = val; break;
case 114 ... 145: dsp_reg_bank_1[which - 114] = val; break;
case 146: gpu_pc = val; break;
case 147: dsp_pc = val; break;
}
}

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@ -606,6 +606,8 @@ void DSPExec(int32_t cycles)
{
while (cycles > 0 && DSP_RUNNING)
{
MAYBE_CALLBACK(DSPTraceCallback, dsp_pc, dsp_reg);
if (IMASKCleared)
{
DSPHandleIRQsNP();

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@ -631,6 +631,8 @@ void GPUExec(int32_t cycles)
while (cycles > 0 && GPU_RUNNING)
{
MAYBE_CALLBACK(GPUTraceCallback, gpu_pc, gpu_reg);
uint16_t opcode = GPUReadWord(gpu_pc, GPU);
uint32_t index = opcode >> 10;
gpu_opcode_first_parameter = (opcode >> 5) & 0x1F;

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@ -68,14 +68,14 @@ void M68KInstructionHook(void)
}
}
if (__builtin_expect(!!TraceCallback, false))
if (__builtin_expect(!!CPUTraceCallback, false))
{
uint32_t regs[18];
for (uint32_t i = 0; i < 18; i++)
{
regs[i] = m68k_get_reg(NULL, (m68k_register_t)i);
}
TraceCallback(regs);
CPUTraceCallback(regs);
}
MAYBE_CALLBACK(ExecuteCallback, m68k_get_reg(NULL, M68K_REG_PC));

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@ -44,7 +44,9 @@ extern void (*ReadCallback)(uint32_t);
extern void (*WriteCallback)(uint32_t);
extern void (*ExecuteCallback)(uint32_t);
extern void (*TraceCallback)(uint32_t*);
extern void (*CPUTraceCallback)(uint32_t*);
extern void (*GPUTraceCallback)(uint32_t, uint32_t*);
extern void (*DSPTraceCallback)(uint32_t, uint32_t*);
#define MAYBE_CALLBACK(callback, ...) do { if (__builtin_expect(!!callback, false)) callback(__VA_ARGS__); } while (0)