From 724f5db816643d211407c7e2743265484bb25759 Mon Sep 17 00:00:00 2001 From: alyosha-tas Date: Sun, 19 Apr 2020 22:52:34 -0400 Subject: [PATCH] O2Hawk: cpu work --- .../CPUs/Intel8048/I8048.cs | 29 +++++++++++-------- .../CPUs/Intel8048/OP_Tables.cs | 7 ++++- 2 files changed, 23 insertions(+), 13 deletions(-) diff --git a/BizHawk.Emulation.Cores/CPUs/Intel8048/I8048.cs b/BizHawk.Emulation.Cores/CPUs/Intel8048/I8048.cs index c6e0b5e106..6715b46d50 100644 --- a/BizHawk.Emulation.Cores/CPUs/Intel8048/I8048.cs +++ b/BizHawk.Emulation.Cores/CPUs/Intel8048/I8048.cs @@ -421,18 +421,23 @@ namespace BizHawk.Emulation.Cores.Components.I8048 break; case TEST_COND: reg_d_ad = cur_instr[instr_pntr++]; - if ((reg_d_ad == 0) && !TF) { cur_instr[instr_pntr + 9] = IDLE; } - if ((reg_d_ad == 1) && T0) { cur_instr[instr_pntr + 9] = IDLE; } - if ((reg_d_ad == 2) && !T0) { cur_instr[instr_pntr + 9] = IDLE; } - if ((reg_d_ad == 3) && T1) { cur_instr[instr_pntr + 9] = IDLE; } - if ((reg_d_ad == 4) && !T1) { cur_instr[instr_pntr + 9] = IDLE; } - if ((reg_d_ad == 5) && !F1) { cur_instr[instr_pntr + 9] = IDLE; } - if ((reg_d_ad == 6) && IRQPending) { cur_instr[instr_pntr + 9] = IDLE; } - if ((reg_d_ad == 7) && (Regs[A] == 0)) { cur_instr[instr_pntr + 9] = IDLE; } - if ((reg_d_ad == 8) && !FlagF0) { cur_instr[instr_pntr + 9] = IDLE; } - if ((reg_d_ad == 9) && (Regs[A] != 0)) { cur_instr[instr_pntr + 9] = IDLE; } - if ((reg_d_ad == 10) && FlagC) { cur_instr[instr_pntr + 9] = IDLE; } - if ((reg_d_ad == 11) && !FlagC) { cur_instr[instr_pntr + 9] = IDLE; } + + bool test_pass = true; + if ((reg_d_ad == 0) && !TF) { test_pass = false; } + if ((reg_d_ad == 1) && T0) { test_pass = false; } + if ((reg_d_ad == 2) && !T0) { test_pass = false; } + if ((reg_d_ad == 3) && T1) { test_pass = false; } + if ((reg_d_ad == 4) && !T1) { test_pass = false; } + if ((reg_d_ad == 5) && !F1) { test_pass = false; } + if ((reg_d_ad == 6) && IRQPending) { test_pass = false; } + if ((reg_d_ad == 7) && (Regs[A] == 0)) { test_pass = false; } + if ((reg_d_ad == 8) && !FlagF0) { test_pass = false; } + if ((reg_d_ad == 9) && (Regs[A] != 0)) { test_pass = false; } + if ((reg_d_ad == 10) && FlagC) { test_pass = false; } + if ((reg_d_ad == 11) && !FlagC) { test_pass = false; } + + if (test_pass) { cur_instr[instr_pntr + 6] = ALU2; } + else { cur_instr[instr_pntr + 9] = IDLE; } break; } diff --git a/BizHawk.Emulation.Cores/CPUs/Intel8048/OP_Tables.cs b/BizHawk.Emulation.Cores/CPUs/Intel8048/OP_Tables.cs index 38becc6b0b..f1b1142017 100644 --- a/BizHawk.Emulation.Cores/CPUs/Intel8048/OP_Tables.cs +++ b/BizHawk.Emulation.Cores/CPUs/Intel8048/OP_Tables.cs @@ -433,11 +433,13 @@ namespace BizHawk.Emulation.Cores.Components.I8048 { if (Regs[A].Bit(Tebit)) { + // NOTE: no PC increment here, jump is relative to last 256 address block before increment. + // so for a JPB starting at 0xFE does not overflow to 0x100 before the jump PopulateCURINSTR(IDLE, IDLE, IDLE, RD, ALU, PC, - INC11, PC, + IDLE, IDLE, IDLE, IDLE, @@ -461,6 +463,9 @@ namespace BizHawk.Emulation.Cores.Components.I8048 public void JP_COND(ushort COND, ushort SPEC) { + // NOTE: PC increment here gets replaced with ALU2 if ondition met, jump is relative to last 256 address block before increment. + // so for a JPC starting at 0xFE does not overflow to 0x100 before the jump + PopulateCURINSTR(IDLE, TEST_COND, COND, IDLE,