Add files via upload
This commit is contained in:
parent
83cf32e9a9
commit
6e5eaba155
File diff suppressed because it is too large
Load Diff
|
@ -66,6 +66,9 @@ class Cartridge {
|
||||||
public:
|
public:
|
||||||
void setStatePtrs(SaveState &);
|
void setStatePtrs(SaveState &);
|
||||||
void loadState(const SaveState &);
|
void loadState(const SaveState &);
|
||||||
|
|
||||||
|
bool use_bios;
|
||||||
|
unsigned loc_bios_length;
|
||||||
|
|
||||||
bool loaded() const { return mbc.get(); }
|
bool loaded() const { return mbc.get(); }
|
||||||
|
|
||||||
|
@ -97,13 +100,15 @@ public:
|
||||||
|
|
||||||
bool getMemoryArea(int which, unsigned char **data, int *length) const;
|
bool getMemoryArea(int which, unsigned char **data, int *length) const;
|
||||||
|
|
||||||
int loadROM(const char *romfiledata, unsigned romfilelength, bool forceDmg, bool multicartCompat);
|
int loadROM(const char *romfiledata, unsigned romfilelength, const char *biosfiledata, unsigned biosfilelength, bool forceDmg, bool multicartCompat);
|
||||||
const char * romTitle() const { return reinterpret_cast<const char *>(memptrs.romdata() + 0x134); }
|
const char * romTitle() const { return reinterpret_cast<const char *>(memptrs.romdata() + 0x134); }
|
||||||
|
|
||||||
void setRTCCallback(std::uint32_t (*callback)()) {
|
void setRTCCallback(std::uint32_t (*callback)()) {
|
||||||
rtc.setRTCCallback(callback);
|
rtc.setRTCCallback(callback);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void bios_remap(int setting);
|
||||||
|
|
||||||
template<bool isReader>void SyncState(NewState *ns);
|
template<bool isReader>void SyncState(NewState *ns);
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -1,151 +1,159 @@
|
||||||
/***************************************************************************
|
/***************************************************************************
|
||||||
* Copyright (C) 2007-2010 by Sindre Aamås *
|
* Copyright (C) 2007-2010 by Sindre Aamås *
|
||||||
* aamas@stud.ntnu.no *
|
* aamas@stud.ntnu.no *
|
||||||
* *
|
* *
|
||||||
* This program is free software; you can redistribute it and/or modify *
|
* This program is free software; you can redistribute it and/or modify *
|
||||||
* it under the terms of the GNU General Public License version 2 as *
|
* it under the terms of the GNU General Public License version 2 as *
|
||||||
* published by the Free Software Foundation. *
|
* published by the Free Software Foundation. *
|
||||||
* *
|
* *
|
||||||
* This program is distributed in the hope that it will be useful, *
|
* This program is distributed in the hope that it will be useful, *
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
||||||
* GNU General Public License version 2 for more details. *
|
* GNU General Public License version 2 for more details. *
|
||||||
* *
|
* *
|
||||||
* You should have received a copy of the GNU General Public License *
|
* You should have received a copy of the GNU General Public License *
|
||||||
* version 2 along with this program; if not, write to the *
|
* version 2 along with this program; if not, write to the *
|
||||||
* Free Software Foundation, Inc., *
|
* Free Software Foundation, Inc., *
|
||||||
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
|
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
|
||||||
***************************************************************************/
|
***************************************************************************/
|
||||||
#include "memptrs.h"
|
#include "memptrs.h"
|
||||||
#include <algorithm>
|
#include <algorithm>
|
||||||
#include <cstring>
|
#include <cstring>
|
||||||
|
|
||||||
namespace gambatte {
|
namespace gambatte {
|
||||||
|
|
||||||
MemPtrs::MemPtrs()
|
MemPtrs::MemPtrs()
|
||||||
: rmem_(), wmem_(), romdata_(), wramdata_(), vrambankptr_(0), rsrambankptr_(0),
|
: rmem_(), wmem_(), romdata_(), wramdata_(), vrambankptr_(0), rsrambankptr_(0),
|
||||||
wsrambankptr_(0), memchunk_(0), rambankdata_(0), wramdataend_(0), oamDmaSrc_(OAM_DMA_SRC_OFF),
|
wsrambankptr_(0), memchunk_(0), rambankdata_(0), wramdataend_(0), oamDmaSrc_(OAM_DMA_SRC_OFF),
|
||||||
memchunk_len(0)
|
memchunk_len(0)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
MemPtrs::~MemPtrs() {
|
MemPtrs::~MemPtrs() {
|
||||||
delete []memchunk_;
|
delete []memchunk_;
|
||||||
}
|
}
|
||||||
|
|
||||||
void MemPtrs::reset(const unsigned rombanks, const unsigned rambanks, const unsigned wrambanks) {
|
void MemPtrs::reset(const unsigned rombanks, const unsigned rambanks, const unsigned wrambanks) {
|
||||||
delete []memchunk_;
|
delete []memchunk_;
|
||||||
memchunk_len = 0x4000 + rombanks * 0x4000ul + 0x4000 + rambanks * 0x2000ul + wrambanks * 0x1000ul + 0x4000;
|
delete []biosdata_;
|
||||||
memchunk_ = new unsigned char[memchunk_len];
|
delete []notbiosdata_;
|
||||||
|
|
||||||
romdata_[0] = romdata();
|
memchunk_len = 0x4000 + rombanks * 0x4000ul + 0x4000 + rambanks * 0x2000ul + wrambanks * 0x1000ul + 0x4000;
|
||||||
rambankdata_ = romdata_[0] + rombanks * 0x4000ul + 0x4000;
|
memchunk_ = new unsigned char[memchunk_len];
|
||||||
wramdata_[0] = rambankdata_ + rambanks * 0x2000ul;
|
|
||||||
wramdataend_ = wramdata_[0] + wrambanks * 0x1000ul;
|
romdata_[0] = romdata();
|
||||||
|
|
||||||
std::memset(rdisabledRamw(), 0xFF, 0x2000);
|
rambankdata_ = romdata_[0] + rombanks * 0x4000ul + 0x4000;
|
||||||
|
wramdata_[0] = rambankdata_ + rambanks * 0x2000ul;
|
||||||
oamDmaSrc_ = OAM_DMA_SRC_OFF;
|
wramdataend_ = wramdata_[0] + wrambanks * 0x1000ul;
|
||||||
rmem_[0x3] = rmem_[0x2] = rmem_[0x1] = rmem_[0x0] = romdata_[0];
|
|
||||||
rmem_[0xC] = wmem_[0xC] = wramdata_[0] - 0xC000;
|
std::memset(rdisabledRamw(), 0xFF, 0x2000);
|
||||||
rmem_[0xE] = wmem_[0xE] = wramdata_[0] - 0xE000;
|
|
||||||
setRombank(1);
|
oamDmaSrc_ = OAM_DMA_SRC_OFF;
|
||||||
setRambank(0, 0);
|
rmem_[0x3] = rmem_[0x2] = rmem_[0x1] = rmem_[0x0] = romdata_[0];
|
||||||
setVrambank(0);
|
rmem_[0xC] = wmem_[0xC] = wramdata_[0] - 0xC000;
|
||||||
setWrambank(1);
|
rmem_[0xE] = wmem_[0xE] = wramdata_[0] - 0xE000;
|
||||||
|
setRombank(1);
|
||||||
// we save only the ram areas
|
setRambank(0, 0);
|
||||||
memchunk_saveoffs = vramdata() - memchunk_;
|
setVrambank(0);
|
||||||
memchunk_savelen = wramdataend() - memchunk_ - memchunk_saveoffs;
|
setWrambank(1);
|
||||||
}
|
|
||||||
|
// we save only the ram areas
|
||||||
void MemPtrs::setRombank0(const unsigned bank) {
|
memchunk_saveoffs = vramdata() - memchunk_;
|
||||||
romdata_[0] = romdata() + bank * 0x4000ul;
|
memchunk_savelen = wramdataend() - memchunk_ - memchunk_saveoffs;
|
||||||
rmem_[0x3] = rmem_[0x2] = rmem_[0x1] = rmem_[0x0] = romdata_[0];
|
}
|
||||||
disconnectOamDmaAreas();
|
|
||||||
}
|
void MemPtrs::setRombank0(const unsigned bank) {
|
||||||
|
|
||||||
void MemPtrs::setRombank(const unsigned bank) {
|
romdata_[0] = romdata() + bank * 0x4000ul;
|
||||||
romdata_[1] = romdata() + bank * 0x4000ul - 0x4000;
|
|
||||||
rmem_[0x7] = rmem_[0x6] = rmem_[0x5] = rmem_[0x4] = romdata_[1];
|
rmem_[0x3] = rmem_[0x2] = rmem_[0x1] = rmem_[0x0] = romdata_[0];
|
||||||
disconnectOamDmaAreas();
|
disconnectOamDmaAreas();
|
||||||
}
|
}
|
||||||
|
|
||||||
void MemPtrs::setRambank(const unsigned flags, const unsigned rambank) {
|
void MemPtrs::setRombank(const unsigned bank) {
|
||||||
unsigned char *const srambankptr = flags & RTC_EN
|
|
||||||
? 0
|
romdata_[1] = romdata() + bank * 0x4000ul - 0x4000;
|
||||||
: (rambankdata() != rambankdataend()
|
|
||||||
? rambankdata_ + rambank * 0x2000ul - 0xA000 : wdisabledRam() - 0xA000);
|
rmem_[0x7] = rmem_[0x6] = rmem_[0x5] = rmem_[0x4] = romdata_[1];
|
||||||
|
disconnectOamDmaAreas();
|
||||||
rsrambankptr_ = (flags & READ_EN) && srambankptr != wdisabledRam() - 0xA000 ? srambankptr : rdisabledRamw() - 0xA000;
|
}
|
||||||
wsrambankptr_ = flags & WRITE_EN ? srambankptr : wdisabledRam() - 0xA000;
|
|
||||||
rmem_[0xB] = rmem_[0xA] = rsrambankptr_;
|
void MemPtrs::setRambank(const unsigned flags, const unsigned rambank) {
|
||||||
wmem_[0xB] = wmem_[0xA] = wsrambankptr_;
|
unsigned char *const srambankptr = flags & RTC_EN
|
||||||
disconnectOamDmaAreas();
|
? 0
|
||||||
}
|
: (rambankdata() != rambankdataend()
|
||||||
|
? rambankdata_ + rambank * 0x2000ul - 0xA000 : wdisabledRam() - 0xA000);
|
||||||
void MemPtrs::setWrambank(const unsigned bank) {
|
|
||||||
wramdata_[1] = wramdata_[0] + ((bank & 0x07) ? (bank & 0x07) : 1) * 0x1000;
|
rsrambankptr_ = (flags & READ_EN) && srambankptr != wdisabledRam() - 0xA000 ? srambankptr : rdisabledRamw() - 0xA000;
|
||||||
rmem_[0xD] = wmem_[0xD] = wramdata_[1] - 0xD000;
|
wsrambankptr_ = flags & WRITE_EN ? srambankptr : wdisabledRam() - 0xA000;
|
||||||
disconnectOamDmaAreas();
|
rmem_[0xB] = rmem_[0xA] = rsrambankptr_;
|
||||||
}
|
wmem_[0xB] = wmem_[0xA] = wsrambankptr_;
|
||||||
|
disconnectOamDmaAreas();
|
||||||
void MemPtrs::setOamDmaSrc(const OamDmaSrc oamDmaSrc) {
|
}
|
||||||
rmem_[0x3] = rmem_[0x2] = rmem_[0x1] = rmem_[0x0] = romdata_[0];
|
|
||||||
rmem_[0x7] = rmem_[0x6] = rmem_[0x5] = rmem_[0x4] = romdata_[1];
|
void MemPtrs::setWrambank(const unsigned bank) {
|
||||||
rmem_[0xB] = rmem_[0xA] = rsrambankptr_;
|
wramdata_[1] = wramdata_[0] + ((bank & 0x07) ? (bank & 0x07) : 1) * 0x1000;
|
||||||
wmem_[0xB] = wmem_[0xA] = wsrambankptr_;
|
rmem_[0xD] = wmem_[0xD] = wramdata_[1] - 0xD000;
|
||||||
rmem_[0xC] = wmem_[0xC] = wramdata_[0] - 0xC000;
|
disconnectOamDmaAreas();
|
||||||
rmem_[0xD] = wmem_[0xD] = wramdata_[1] - 0xD000;
|
}
|
||||||
rmem_[0xE] = wmem_[0xE] = wramdata_[0] - 0xE000;
|
|
||||||
|
void MemPtrs::setOamDmaSrc(const OamDmaSrc oamDmaSrc) {
|
||||||
oamDmaSrc_ = oamDmaSrc;
|
rmem_[0x3] = rmem_[0x2] = rmem_[0x1] = rmem_[0x0] = romdata_[0];
|
||||||
disconnectOamDmaAreas();
|
rmem_[0x7] = rmem_[0x6] = rmem_[0x5] = rmem_[0x4] = romdata_[1];
|
||||||
}
|
rmem_[0xB] = rmem_[0xA] = rsrambankptr_;
|
||||||
|
wmem_[0xB] = wmem_[0xA] = wsrambankptr_;
|
||||||
void MemPtrs::disconnectOamDmaAreas() {
|
rmem_[0xC] = wmem_[0xC] = wramdata_[0] - 0xC000;
|
||||||
if (isCgb(*this)) {
|
rmem_[0xD] = wmem_[0xD] = wramdata_[1] - 0xD000;
|
||||||
switch (oamDmaSrc_) {
|
rmem_[0xE] = wmem_[0xE] = wramdata_[0] - 0xE000;
|
||||||
case OAM_DMA_SRC_ROM: // fall through
|
|
||||||
case OAM_DMA_SRC_SRAM:
|
oamDmaSrc_ = oamDmaSrc;
|
||||||
case OAM_DMA_SRC_INVALID:
|
disconnectOamDmaAreas();
|
||||||
std::fill(rmem_, rmem_ + 8, static_cast<unsigned char *>(0));
|
}
|
||||||
rmem_[0xB] = rmem_[0xA] = 0;
|
|
||||||
wmem_[0xB] = wmem_[0xA] = 0;
|
void MemPtrs::disconnectOamDmaAreas() {
|
||||||
break;
|
if (isCgb(*this)) {
|
||||||
case OAM_DMA_SRC_VRAM:
|
switch (oamDmaSrc_) {
|
||||||
break;
|
case OAM_DMA_SRC_ROM: // fall through
|
||||||
case OAM_DMA_SRC_WRAM:
|
case OAM_DMA_SRC_SRAM:
|
||||||
rmem_[0xE] = rmem_[0xD] = rmem_[0xC] = 0;
|
case OAM_DMA_SRC_INVALID:
|
||||||
wmem_[0xE] = wmem_[0xD] = wmem_[0xC] = 0;
|
std::fill(rmem_, rmem_ + 8, static_cast<unsigned char *>(0));
|
||||||
break;
|
rmem_[0xB] = rmem_[0xA] = 0;
|
||||||
case OAM_DMA_SRC_OFF:
|
wmem_[0xB] = wmem_[0xA] = 0;
|
||||||
break;
|
break;
|
||||||
}
|
case OAM_DMA_SRC_VRAM:
|
||||||
} else {
|
break;
|
||||||
switch (oamDmaSrc_) {
|
case OAM_DMA_SRC_WRAM:
|
||||||
case OAM_DMA_SRC_ROM: // fall through
|
rmem_[0xE] = rmem_[0xD] = rmem_[0xC] = 0;
|
||||||
case OAM_DMA_SRC_SRAM:
|
wmem_[0xE] = wmem_[0xD] = wmem_[0xC] = 0;
|
||||||
case OAM_DMA_SRC_WRAM:
|
break;
|
||||||
case OAM_DMA_SRC_INVALID:
|
case OAM_DMA_SRC_OFF:
|
||||||
std::fill(rmem_, rmem_ + 8, static_cast<unsigned char *>(0));
|
break;
|
||||||
rmem_[0xB] = rmem_[0xA] = 0;
|
}
|
||||||
wmem_[0xB] = wmem_[0xA] = 0;
|
} else {
|
||||||
rmem_[0xE] = rmem_[0xD] = rmem_[0xC] = 0;
|
switch (oamDmaSrc_) {
|
||||||
wmem_[0xE] = wmem_[0xD] = wmem_[0xC] = 0;
|
case OAM_DMA_SRC_ROM: // fall through
|
||||||
break;
|
case OAM_DMA_SRC_SRAM:
|
||||||
case OAM_DMA_SRC_VRAM:
|
case OAM_DMA_SRC_WRAM:
|
||||||
break;
|
case OAM_DMA_SRC_INVALID:
|
||||||
case OAM_DMA_SRC_OFF:
|
std::fill(rmem_, rmem_ + 8, static_cast<unsigned char *>(0));
|
||||||
break;
|
rmem_[0xB] = rmem_[0xA] = 0;
|
||||||
}
|
wmem_[0xB] = wmem_[0xA] = 0;
|
||||||
}
|
rmem_[0xE] = rmem_[0xD] = rmem_[0xC] = 0;
|
||||||
}
|
wmem_[0xE] = wmem_[0xD] = wmem_[0xC] = 0;
|
||||||
|
break;
|
||||||
// all pointers here are relative to memchunk_
|
case OAM_DMA_SRC_VRAM:
|
||||||
#define MSS(a) RSS(a,memchunk_)
|
break;
|
||||||
#define MSL(a) RSL(a,memchunk_)
|
case OAM_DMA_SRC_OFF:
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
// all pointers here are relative to memchunk_
|
||||||
|
#define MSS(a) RSS(a,memchunk_)
|
||||||
|
#define MSL(a) RSL(a,memchunk_)
|
||||||
|
|
||||||
SYNCFUNC(MemPtrs)
|
SYNCFUNC(MemPtrs)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
|
@ -216,5 +224,5 @@ SYNCFUNC(MemPtrs)
|
||||||
MSS(wramdataend_);
|
MSS(wramdataend_);
|
||||||
NSS(oamDmaSrc_);
|
NSS(oamDmaSrc_);
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
|
@ -1,93 +1,96 @@
|
||||||
/***************************************************************************
|
/***************************************************************************
|
||||||
* Copyright (C) 2007-2010 by Sindre Aamås *
|
* Copyright (C) 2007-2010 by Sindre Aamås *
|
||||||
* aamas@stud.ntnu.no *
|
* aamas@stud.ntnu.no *
|
||||||
* *
|
* *
|
||||||
* This program is free software; you can redistribute it and/or modify *
|
* This program is free software; you can redistribute it and/or modify *
|
||||||
* it under the terms of the GNU General Public License version 2 as *
|
* it under the terms of the GNU General Public License version 2 as *
|
||||||
* published by the Free Software Foundation. *
|
* published by the Free Software Foundation. *
|
||||||
* *
|
* *
|
||||||
* This program is distributed in the hope that it will be useful, *
|
* This program is distributed in the hope that it will be useful, *
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
||||||
* GNU General Public License version 2 for more details. *
|
* GNU General Public License version 2 for more details. *
|
||||||
* *
|
* *
|
||||||
* You should have received a copy of the GNU General Public License *
|
* You should have received a copy of the GNU General Public License *
|
||||||
* version 2 along with this program; if not, write to the *
|
* version 2 along with this program; if not, write to the *
|
||||||
* Free Software Foundation, Inc., *
|
* Free Software Foundation, Inc., *
|
||||||
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
|
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
|
||||||
***************************************************************************/
|
***************************************************************************/
|
||||||
#ifndef MEMPTRS_H
|
#ifndef MEMPTRS_H
|
||||||
#define MEMPTRS_H
|
#define MEMPTRS_H
|
||||||
|
|
||||||
#include "newstate.h"
|
#include "newstate.h"
|
||||||
|
|
||||||
namespace gambatte {
|
namespace gambatte {
|
||||||
|
|
||||||
enum OamDmaSrc { OAM_DMA_SRC_ROM, OAM_DMA_SRC_SRAM, OAM_DMA_SRC_VRAM,
|
enum OamDmaSrc { OAM_DMA_SRC_ROM, OAM_DMA_SRC_SRAM, OAM_DMA_SRC_VRAM,
|
||||||
OAM_DMA_SRC_WRAM, OAM_DMA_SRC_INVALID, OAM_DMA_SRC_OFF };
|
OAM_DMA_SRC_WRAM, OAM_DMA_SRC_INVALID, OAM_DMA_SRC_OFF };
|
||||||
|
|
||||||
class MemPtrs {
|
class MemPtrs {
|
||||||
const unsigned char *rmem_[0x10];
|
const unsigned char *rmem_[0x10];
|
||||||
unsigned char *wmem_[0x10];
|
unsigned char *wmem_[0x10];
|
||||||
|
|
||||||
unsigned char *romdata_[2];
|
unsigned char *romdata_[2];
|
||||||
unsigned char *wramdata_[2];
|
unsigned char *wramdata_[2];
|
||||||
unsigned char *vrambankptr_;
|
unsigned char *vrambankptr_;
|
||||||
unsigned char *rsrambankptr_;
|
unsigned char *rsrambankptr_;
|
||||||
unsigned char *wsrambankptr_;
|
unsigned char *wsrambankptr_;
|
||||||
unsigned char *memchunk_;
|
unsigned char *memchunk_;
|
||||||
unsigned char *rambankdata_;
|
unsigned char *rambankdata_;
|
||||||
unsigned char *wramdataend_;
|
unsigned char *wramdataend_;
|
||||||
|
|
||||||
OamDmaSrc oamDmaSrc_;
|
OamDmaSrc oamDmaSrc_;
|
||||||
|
|
||||||
int memchunk_len;
|
int memchunk_len;
|
||||||
int memchunk_saveoffs;
|
int memchunk_saveoffs;
|
||||||
int memchunk_savelen;
|
int memchunk_savelen;
|
||||||
|
|
||||||
MemPtrs(const MemPtrs &);
|
MemPtrs(const MemPtrs &);
|
||||||
MemPtrs & operator=(const MemPtrs &);
|
MemPtrs & operator=(const MemPtrs &);
|
||||||
void disconnectOamDmaAreas();
|
void disconnectOamDmaAreas();
|
||||||
unsigned char * rdisabledRamw() const { return wramdataend_ ; }
|
unsigned char * rdisabledRamw() const { return wramdataend_ ; }
|
||||||
unsigned char * wdisabledRam() const { return wramdataend_ + 0x2000; }
|
unsigned char * wdisabledRam() const { return wramdataend_ + 0x2000; }
|
||||||
public:
|
public:
|
||||||
enum RamFlag { READ_EN = 1, WRITE_EN = 2, RTC_EN = 4 };
|
unsigned char *biosdata_;
|
||||||
|
unsigned char *notbiosdata_;
|
||||||
MemPtrs();
|
|
||||||
~MemPtrs();
|
enum RamFlag { READ_EN = 1, WRITE_EN = 2, RTC_EN = 4 };
|
||||||
void reset(unsigned rombanks, unsigned rambanks, unsigned wrambanks);
|
|
||||||
|
MemPtrs();
|
||||||
const unsigned char * rmem(unsigned area) const { return rmem_[area]; }
|
~MemPtrs();
|
||||||
unsigned char * wmem(unsigned area) const { return wmem_[area]; }
|
void reset(unsigned rombanks, unsigned rambanks, unsigned wrambanks);
|
||||||
unsigned char * vramdata() const { return rambankdata_ - 0x4000; }
|
|
||||||
unsigned char * vramdataend() const { return rambankdata_; }
|
const unsigned char * rmem(unsigned area) const { return rmem_[area]; }
|
||||||
unsigned char * romdata() const { return memchunk_ + 0x4000; }
|
unsigned char * wmem(unsigned area) const { return wmem_[area]; }
|
||||||
unsigned char * romdata(unsigned area) const { return romdata_[area]; }
|
unsigned char * vramdata() const { return rambankdata_ - 0x4000; }
|
||||||
unsigned char * romdataend() const { return rambankdata_ - 0x4000; }
|
unsigned char * vramdataend() const { return rambankdata_; }
|
||||||
unsigned char * wramdata(unsigned area) const { return wramdata_[area]; }
|
unsigned char * romdata() const { return memchunk_ + 0x4000;}
|
||||||
unsigned char * wramdataend() const { return wramdataend_; }
|
unsigned char * romdata(unsigned area) const { return romdata_[area]; }
|
||||||
unsigned char * rambankdata() const { return rambankdata_; }
|
unsigned char * romdataend() const { return rambankdata_ - 0x4000; }
|
||||||
unsigned char * rambankdataend() const { return wramdata_[0]; }
|
unsigned char * wramdata(unsigned area) const { return wramdata_[area]; }
|
||||||
const unsigned char * rdisabledRam() const { return rdisabledRamw(); }
|
unsigned char * wramdataend() const { return wramdataend_; }
|
||||||
const unsigned char * rsrambankptr() const { return rsrambankptr_; }
|
unsigned char * rambankdata() const { return rambankdata_; }
|
||||||
unsigned char * wsrambankptr() const { return wsrambankptr_; }
|
unsigned char * rambankdataend() const { return wramdata_[0]; }
|
||||||
unsigned char * vrambankptr() const { return vrambankptr_; }
|
const unsigned char * rdisabledRam() const { return rdisabledRamw(); }
|
||||||
OamDmaSrc oamDmaSrc() const { return oamDmaSrc_; }
|
const unsigned char * rsrambankptr() const { return rsrambankptr_; }
|
||||||
|
unsigned char * wsrambankptr() const { return wsrambankptr_; }
|
||||||
void setRombank0(unsigned bank);
|
unsigned char * vrambankptr() const { return vrambankptr_; }
|
||||||
void setRombank(unsigned bank);
|
OamDmaSrc oamDmaSrc() const { return oamDmaSrc_; }
|
||||||
void setRambank(unsigned ramFlags, unsigned rambank);
|
|
||||||
void setVrambank(unsigned bank) { vrambankptr_ = vramdata() + bank * 0x2000ul - 0x8000; }
|
void setRombank0(unsigned bank);
|
||||||
void setWrambank(unsigned bank);
|
void setRombank(unsigned bank);
|
||||||
void setOamDmaSrc(OamDmaSrc oamDmaSrc);
|
void setRambank(unsigned ramFlags, unsigned rambank);
|
||||||
|
void setVrambank(unsigned bank) { vrambankptr_ = vramdata() + bank * 0x2000ul - 0x8000; }
|
||||||
|
void setWrambank(unsigned bank);
|
||||||
|
void setOamDmaSrc(OamDmaSrc oamDmaSrc);
|
||||||
|
|
||||||
template<bool isReader>void SyncState(NewState *ns);
|
template<bool isReader>void SyncState(NewState *ns);
|
||||||
};
|
};
|
||||||
|
|
||||||
inline bool isCgb(const MemPtrs &memptrs) {
|
inline bool isCgb(const MemPtrs &memptrs) {
|
||||||
return memptrs.wramdataend() - memptrs.wramdata(0) == 0x8000;
|
return memptrs.wramdataend() - memptrs.wramdata(0) == 0x8000;
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
Loading…
Reference in New Issue