ShuriZma
/
BizHawk
mirror of https://github.com/TASEmulators/BizHawk.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

rename MemEventId to IntEventId

This commit is contained in:
MrWint 2019-05-25 22:53:41 +02:00
parent 8247df4be5
commit 6bda071d5f
7 changed files with 113 additions and 109 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
libgambatte/src/interruptrequester.cpp
View File

@ -29,14 +29,14 @@ void InterruptRequester::loadState(const SaveState &state) {
iereg_ = state.mem.ioamhram.get()[0x1FF] & 0x1F;
intFlags.set(state.mem.IME, state.mem.halted);
eventTimes.setValue<INTERRUPTS>(intFlags.imeOrHalted() && pendingIrqs() ? minIntTime : static_cast<unsigned long>(disabled_time));
eventTimes.setValue<intevent_interrupts>(intFlags.imeOrHalted() && pendingIrqs() ? minIntTime : static_cast<unsigned long>(disabled_time));
}
void InterruptRequester::resetCc(const unsigned long oldCc, const unsigned long newCc) {
minIntTime = minIntTime < oldCc ? 0 : minIntTime - (oldCc - newCc);
if (eventTimes.value(INTERRUPTS) != disabled_time)
eventTimes.setValue<INTERRUPTS>(minIntTime);
if (eventTimes.value(intevent_interrupts) != disabled_time)
eventTimes.setValue<intevent_interrupts>(minIntTime);
}
void InterruptRequester::ei(const unsigned long cc) {
@ -44,35 +44,35 @@ void InterruptRequester::ei(const unsigned long cc) {
minIntTime = cc + 1;
if (pendingIrqs())
eventTimes.setValue<INTERRUPTS>(minIntTime);
eventTimes.setValue<intevent_interrupts>(minIntTime);
}
void InterruptRequester::di() {
intFlags.unsetIme();
if (!intFlags.imeOrHalted())
eventTimes.setValue<INTERRUPTS>(disabled_time);
eventTimes.setValue<intevent_interrupts>(disabled_time);
}
void InterruptRequester::halt() {
intFlags.setHalted();
if (pendingIrqs())
eventTimes.setValue<INTERRUPTS>(minIntTime);
eventTimes.setValue<intevent_interrupts>(minIntTime);
}
void InterruptRequester::unhalt() {
intFlags.unsetHalted();
if (!intFlags.imeOrHalted())
eventTimes.setValue<INTERRUPTS>(disabled_time);
eventTimes.setValue<intevent_interrupts>(disabled_time);
}
void InterruptRequester::flagIrq(const unsigned bit) {
ifreg_ |= bit;
if (intFlags.imeOrHalted() && pendingIrqs())
eventTimes.setValue<INTERRUPTS>(minIntTime);
eventTimes.setValue<intevent_interrupts>(minIntTime);
}
void InterruptRequester::ackIrq(const unsigned bit) {
@ -84,14 +84,14 @@ void InterruptRequester::setIereg(const unsigned iereg) {
iereg_ = iereg & 0x1F;
if (intFlags.imeOrHalted())
eventTimes.setValue<INTERRUPTS>(pendingIrqs() ? minIntTime : static_cast<unsigned long>(disabled_time));
eventTimes.setValue<intevent_interrupts>(pendingIrqs() ? minIntTime : static_cast<unsigned long>(disabled_time));
}
void InterruptRequester::setIfreg(const unsigned ifreg) {
ifreg_ = ifreg;
if (intFlags.imeOrHalted())
eventTimes.setValue<INTERRUPTS>(pendingIrqs() ? minIntTime : static_cast<unsigned long>(disabled_time));
eventTimes.setValue<intevent_interrupts>(pendingIrqs() ? minIntTime : static_cast<unsigned long>(disabled_time));
}
SYNCFUNC(InterruptRequester)

22
libgambatte/src/interruptrequester.h
View File

@ -25,10 +25,10 @@
namespace gambatte {
struct SaveState;
enum MemEventId { UNHALT, END, BLIT, SERIAL, OAM, DMA, TIMA, VIDEO, INTERRUPTS };
enum IntEventId { intevent_unhalt, intevent_end, intevent_blit, intevent_serial, intevent_oam, intevent_dma, intevent_tima, intevent_video, intevent_interrupts };
class InterruptRequester {
MinKeeper<INTERRUPTS + 1> eventTimes;
MinKeeper<intevent_interrupts + 1> eventTimes;
unsigned long minIntTime;
unsigned ifreg_;
unsigned iereg_;
@ -76,20 +76,20 @@ public:
void setIereg(unsigned iereg);
void setIfreg(unsigned ifreg);
MemEventId minEventId() const { return static_cast<MemEventId>(eventTimes.min()); }
IntEventId minEventId() const { return static_cast<IntEventId>(eventTimes.min()); }
unsigned long minEventTime() const { return eventTimes.minValue(); }
template<MemEventId id> void setEventTime(unsigned long value) { eventTimes.setValue<id>(value); }
void setEventTime(const MemEventId id, unsigned long value) { eventTimes.setValue(id, value); }
unsigned long eventTime(MemEventId id) const { return eventTimes.value(id); }
template<IntEventId id> void setEventTime(unsigned long value) { eventTimes.setValue<id>(value); }
void setEventTime(const IntEventId id, unsigned long value) { eventTimes.setValue(id, value); }
unsigned long eventTime(IntEventId id) const { return eventTimes.value(id); }
template<bool isReader>void SyncState(NewState *ns);
};
inline void flagHdmaReq(InterruptRequester &intreq) { intreq.setEventTime<DMA>(0); }
inline void flagGdmaReq(InterruptRequester &intreq) { intreq.setEventTime<DMA>(1); }
inline void ackDmaReq(InterruptRequester &intreq) { intreq.setEventTime<DMA>(disabled_time); }
inline bool hdmaReqFlagged(const InterruptRequester &intreq) { return intreq.eventTime(DMA) == 0; }
inline bool gdmaReqFlagged(const InterruptRequester &intreq) { return intreq.eventTime(DMA) == 1; }
inline void flagHdmaReq(InterruptRequester &intreq) { intreq.setEventTime<intevent_dma>(0); }
inline void flagGdmaReq(InterruptRequester &intreq) { intreq.setEventTime<intevent_dma>(1); }
inline void ackDmaReq(InterruptRequester &intreq) { intreq.setEventTime<intevent_dma>(disabled_time); }
inline bool hdmaReqFlagged(const InterruptRequester &intreq) { return intreq.eventTime(intevent_dma) == 0; }
inline bool gdmaReqFlagged(const InterruptRequester &intreq) { return intreq.eventTime(intevent_dma) == 1; }
}

110
libgambatte/src/memory.cpp
View File

@ -45,8 +45,8 @@ Memory::Memory(const Interrupter &interrupter_in, unsigned short &sp, unsigned s
SP(sp),
PC(pc)
{
intreq.setEventTime<BLIT>(144*456ul);
intreq.setEventTime<END>(0);
intreq.setEventTime<intevent_blit>(144*456ul);
intreq.setEventTime<intevent_end>(0);
}
void Memory::setStatePtrs(SaveState &state) {
@ -74,14 +74,14 @@ void Memory::loadState(const SaveState &state) {
intreq.loadState(state);
divLastUpdate = state.mem.divLastUpdate;
intreq.setEventTime<SERIAL>(state.mem.nextSerialtime > state.cpu.cycleCounter ? state.mem.nextSerialtime : state.cpu.cycleCounter);
intreq.setEventTime<UNHALT>(state.mem.unhaltTime);
intreq.setEventTime<intevent_serial>(state.mem.nextSerialtime > state.cpu.cycleCounter ? state.mem.nextSerialtime : state.cpu.cycleCounter);
intreq.setEventTime<intevent_unhalt>(state.mem.unhaltTime);
lastOamDmaUpdate = state.mem.lastOamDmaUpdate;
dmaSource = state.mem.dmaSource;
dmaDestination = state.mem.dmaDestination;
oamDmaPos = state.mem.oamDmaPos;
serialCnt = intreq.eventTime(SERIAL) != disabled_time
? serialCntFrom(intreq.eventTime(SERIAL) - state.cpu.cycleCounter, ioamhram[0x102] & isCgb() * 2)
serialCnt = intreq.eventTime(intevent_serial) != disabled_time
? serialCntFrom(intreq.eventTime(intevent_serial) - state.cpu.cycleCounter, ioamhram[0x102] & isCgb() * 2)
: 8;
cart.setVrambank(ioamhram[0x14F] & isCgb());
@ -93,10 +93,10 @@ void Memory::loadState(const SaveState &state) {
const unsigned oamEventPos = oamDmaPos < 0xA0 ? 0xA0 : 0x100;
intreq.setEventTime<OAM>(lastOamDmaUpdate + (oamEventPos - oamDmaPos) * 4);
intreq.setEventTime<intevent_oam>(lastOamDmaUpdate + (oamEventPos - oamDmaPos) * 4);
}
intreq.setEventTime<BLIT>((ioamhram[0x140] & 0x80) ? display.nextMode1IrqTime() : state.cpu.cycleCounter);
intreq.setEventTime<intevent_blit>((ioamhram[0x140] & 0x80) ? display.nextMode1IrqTime() : state.cpu.cycleCounter);
blanklcd = false;
if (!isCgb())
@ -104,32 +104,32 @@ void Memory::loadState(const SaveState &state) {
}
void Memory::setEndtime(const unsigned long cycleCounter, const unsigned long inc) {
if (intreq.eventTime(BLIT) <= cycleCounter)
intreq.setEventTime<BLIT>(intreq.eventTime(BLIT) + (70224 << isDoubleSpeed()));
if (intreq.eventTime(intevent_blit) <= cycleCounter)
intreq.setEventTime<intevent_blit>(intreq.eventTime(intevent_blit) + (70224 << isDoubleSpeed()));
intreq.setEventTime<END>(cycleCounter + (inc << isDoubleSpeed()));
intreq.setEventTime<intevent_end>(cycleCounter + (inc << isDoubleSpeed()));
}
void Memory::updateSerial(const unsigned long cc) {
if (!LINKCABLE) {
if (intreq.eventTime(SERIAL) != disabled_time) {
if (intreq.eventTime(SERIAL) <= cc) {
if (intreq.eventTime(intevent_serial) != disabled_time) {
if (intreq.eventTime(intevent_serial) <= cc) {
ioamhram[0x101] = (((ioamhram[0x101] + 1) << serialCnt) - 1) & 0xFF;
ioamhram[0x102] &= 0x7F;
intreq.setEventTime<SERIAL>(disabled_time);
intreq.setEventTime<intevent_serial>(disabled_time);
intreq.flagIrq(8);
} else {
const int targetCnt = serialCntFrom(intreq.eventTime(SERIAL) - cc, ioamhram[0x102] & isCgb() * 2);
const int targetCnt = serialCntFrom(intreq.eventTime(intevent_serial) - cc, ioamhram[0x102] & isCgb() * 2);
ioamhram[0x101] = (((ioamhram[0x101] + 1) << (serialCnt - targetCnt)) - 1) & 0xFF;
serialCnt = targetCnt;
}
}
}
else {
if (intreq.eventTime(SERIAL) != disabled_time) {
if (intreq.eventTime(SERIAL) <= cc) {
if (intreq.eventTime(intevent_serial) != disabled_time) {
if (intreq.eventTime(intevent_serial) <= cc) {
linkClockTrigger = true;
intreq.setEventTime<SERIAL>(disabled_time);
intreq.setEventTime<intevent_serial>(disabled_time);
if (linkCallback)
linkCallback();
}
@ -138,7 +138,7 @@ void Memory::updateSerial(const unsigned long cc) {
}
void Memory::updateTimaIrq(const unsigned long cc) {
while (intreq.eventTime(TIMA) <= cc)
while (intreq.eventTime(intevent_tima) <= cc)
tima.doIrqEvent(TimaInterruptRequester(intreq));
}
@ -153,31 +153,31 @@ unsigned long Memory::event(unsigned long cycleCounter) {
updateOamDma(cycleCounter);
switch (intreq.minEventId()) {
case UNHALT:
case intevent_unhalt:
nontrivial_ff_write(0xFF04, 0, cycleCounter);
PC = (PC + 1) & 0xFFFF;
cycleCounter += 4;
intreq.unhalt();
intreq.setEventTime<UNHALT>(disabled_time);
intreq.setEventTime<intevent_unhalt>(disabled_time);
break;
case END:
intreq.setEventTime<END>(disabled_time - 1);
case intevent_end:
intreq.setEventTime<intevent_end>(disabled_time - 1);
while (cycleCounter >= intreq.minEventTime() && intreq.eventTime(END) != disabled_time)
while (cycleCounter >= intreq.minEventTime() && intreq.eventTime(intevent_end) != disabled_time)
cycleCounter = event(cycleCounter);
intreq.setEventTime<END>(disabled_time);
intreq.setEventTime<intevent_end>(disabled_time);
break;
case BLIT:
case intevent_blit:
{
const bool lcden = ioamhram[0x140] >> 7 & 1;
unsigned long blitTime = intreq.eventTime(BLIT);
unsigned long blitTime = intreq.eventTime(intevent_blit);
if (lcden | blanklcd) {
display.updateScreen(blanklcd, cycleCounter);
intreq.setEventTime<BLIT>(disabled_time);
intreq.setEventTime<END>(disabled_time);
intreq.setEventTime<intevent_blit>(disabled_time);
intreq.setEventTime<intevent_end>(disabled_time);
while (cycleCounter >= intreq.minEventTime())
cycleCounter = event(cycleCounter);
@ -185,17 +185,17 @@ unsigned long Memory::event(unsigned long cycleCounter) {
blitTime += 70224 << isDoubleSpeed();
blanklcd = lcden ^ 1;
intreq.setEventTime<BLIT>(blitTime);
intreq.setEventTime<intevent_blit>(blitTime);
}
break;
case SERIAL:
case intevent_serial:
updateSerial(cycleCounter);
break;
case OAM:
intreq.setEventTime<OAM>(lastOamDmaUpdate == disabled_time ?
static_cast<unsigned long>(disabled_time) : intreq.eventTime(OAM) + 0xA0 * 4);
case intevent_oam:
intreq.setEventTime<intevent_oam>(lastOamDmaUpdate == disabled_time ?
static_cast<unsigned long>(disabled_time) : intreq.eventTime(intevent_oam) + 0xA0 * 4);
break;
case DMA:
case intevent_dma:
{
const bool doubleSpeed = isDoubleSpeed();
unsigned dmaSrc = dmaSource;
@ -261,15 +261,15 @@ unsigned long Memory::event(unsigned long cycleCounter) {
}
break;
case TIMA:
case intevent_tima:
tima.doIrqEvent(TimaInterruptRequester(intreq));
break;
case VIDEO:
case intevent_video:
display.update(cycleCounter);
break;
case INTERRUPTS:
case intevent_interrupts:
if (stopped) {
intreq.setEventTime<INTERRUPTS>(disabled_time);
intreq.setEventTime<intevent_interrupts>(disabled_time);
break;
}
if (halted()) {
@ -277,7 +277,7 @@ unsigned long Memory::event(unsigned long cycleCounter) {
cycleCounter += 4;
intreq.unhalt();
intreq.setEventTime<UNHALT>(disabled_time);
intreq.setEventTime<intevent_unhalt>(disabled_time);
}
if (ime()) {
@ -326,17 +326,17 @@ unsigned long Memory::stop(unsigned long cycleCounter) {
display.speedChange(cycleCounter);
ioamhram[0x14D] ^= 0x81;
intreq.setEventTime<BLIT>((ioamhram[0x140] & 0x80) ? display.nextMode1IrqTime() : cycleCounter + (70224 << isDoubleSpeed()));
intreq.setEventTime<intevent_blit>((ioamhram[0x140] & 0x80) ? display.nextMode1IrqTime() : cycleCounter + (70224 << isDoubleSpeed()));
if (intreq.eventTime(END) > cycleCounter) {
intreq.setEventTime<END>(cycleCounter + (isDoubleSpeed() ?
(intreq.eventTime(END) - cycleCounter) << 1 : (intreq.eventTime(END) - cycleCounter) >> 1));
if (intreq.eventTime(intevent_end) > cycleCounter) {
intreq.setEventTime<intevent_end>(cycleCounter + (isDoubleSpeed() ?
(intreq.eventTime(intevent_end) - cycleCounter) << 1 : (intreq.eventTime(intevent_end) - cycleCounter) >> 1));
}
// when switching speed, it seems that the CPU spontaneously restarts soon?
// otherwise, the cpu should be allowed to stay halted as long as needed
// so only execute this line when switching speed
intreq.halt();
intreq.setEventTime<UNHALT>(cycleCounter + 0x20000);
intreq.setEventTime<intevent_unhalt>(cycleCounter + 0x20000);
}
else {
stopped = true;
@ -351,7 +351,7 @@ static void decCycles(unsigned long &counter, const unsigned long dec) {
counter -= dec;
}
void Memory::decEventCycles(const MemEventId eventId, const unsigned long dec) {
void Memory::decEventCycles(const IntEventId eventId, const unsigned long dec) {
if (intreq.eventTime(eventId) != disabled_time)
intreq.setEventTime(eventId, intreq.eventTime(eventId) - dec);
}
@ -374,11 +374,11 @@ unsigned long Memory::resetCounters(unsigned long cycleCounter) {
decCycles(divLastUpdate, dec);
decCycles(lastOamDmaUpdate, dec);
decEventCycles(SERIAL, dec);
decEventCycles(OAM, dec);
decEventCycles(BLIT, dec);
decEventCycles(END, dec);
decEventCycles(UNHALT, dec);
decEventCycles(intevent_serial, dec);
decEventCycles(intevent_oam, dec);
decEventCycles(intevent_blit, dec);
decEventCycles(intevent_end, dec);
decEventCycles(intevent_unhalt, dec);
cycleCounter -= dec;
@ -644,7 +644,7 @@ void Memory::nontrivial_ff_write(const unsigned P, unsigned data, const unsigned
updateSerial(cycleCounter);
serialCnt = 8;
intreq.setEventTime<SERIAL>((data & 0x81) == 0x81
intreq.setEventTime<intevent_serial>((data & 0x81) == 0x81
? (data & isCgb() * 2 ? (cycleCounter & ~0x7ul) + 0x10 * 8 : (cycleCounter & ~0xFFul) + 0x200 * 8)
: static_cast<unsigned long>(disabled_time));
@ -837,10 +837,10 @@ void Memory::nontrivial_ff_write(const unsigned P, unsigned data, const unsigned
ioamhram[0x141] &= 0xF8;
if (data & 0x80) {
intreq.setEventTime<BLIT>(display.nextMode1IrqTime() + (blanklcd ? 0 : 70224 << isDoubleSpeed()));
intreq.setEventTime<intevent_blit>(display.nextMode1IrqTime() + (blanklcd ? 0 : 70224 << isDoubleSpeed()));
} else {
ioamhram[0x141] |= lyc;
intreq.setEventTime<BLIT>(cycleCounter + (456 * 4 << isDoubleSpeed()));
intreq.setEventTime<intevent_blit>(cycleCounter + (456 * 4 << isDoubleSpeed()));
if (hdmaEnabled)
flagHdmaReq(intreq);
@ -870,7 +870,7 @@ void Memory::nontrivial_ff_write(const unsigned P, unsigned data, const unsigned
endOamDma(cycleCounter);
lastOamDmaUpdate = cycleCounter;
intreq.setEventTime<OAM>(cycleCounter + 8);
intreq.setEventTime<intevent_oam>(cycleCounter + 8);
ioamhram[0x146] = data;
oamDmaInitSetup();
return;

6
libgambatte/src/memory.h
View File

@ -72,7 +72,7 @@ class Memory {
bool LINKCABLE;
bool linkClockTrigger;
void decEventCycles(MemEventId eventId, unsigned long dec);
void decEventCycles(IntEventId eventId, unsigned long dec);
void oamDmaInitSetup();
void updateOamDma(unsigned long cycleCounter);
@ -124,10 +124,10 @@ public:
void setLayers(unsigned mask) { display.setLayers(mask); }
bool isActive() const { return intreq.eventTime(END) != disabled_time; }
bool isActive() const { return intreq.eventTime(intevent_end) != disabled_time; }
long cyclesSinceBlit(const unsigned long cc) const {
return cc < intreq.eventTime(BLIT) ? -1 : static_cast<long>((cc - intreq.eventTime(BLIT)) >> isDoubleSpeed());
return cc < intreq.eventTime(intevent_blit) ? -1 : static_cast<long>((cc - intreq.eventTime(intevent_blit)) >> isDoubleSpeed());
}
void halt(unsigned long cycleCounter) { halttime = cycleCounter; intreq.halt(); }

4
libgambatte/src/tima.h
View File

@ -29,8 +29,8 @@ class TimaInterruptRequester {
public:
explicit TimaInterruptRequester(InterruptRequester &intreq) : intreq(intreq) {}
void flagIrq() const { intreq.flagIrq(4); }
unsigned long nextIrqEventTime() const { return intreq.eventTime(TIMA); }
void setNextIrqEventTime(const unsigned long time) const { intreq.setEventTime<TIMA>(time); }
unsigned long nextIrqEventTime() const { return intreq.eventTime(intevent_tima); }
void setNextIrqEventTime(const unsigned long time) const { intreq.setEventTime<intevent_tima>(time); }
};
class Tima {

60
libgambatte/src/video.h
View File

@ -1,43 +1,47 @@
/***************************************************************************
* Copyright (C) 2007 by Sindre Aamås *
* aamas@stud.ntnu.no *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License version 2 as *
* published by the Free Software Foundation. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License version 2 for more details. *
* *
* You should have received a copy of the GNU General Public License *
* version 2 along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
***************************************************************************/
//
// Copyright (C) 2007 by sinamas <sinamas at users.sourceforge.net>
//
// This program is free software; you can redistribute it and/or modify
// it under the terms of the GNU General Public License version 2 as
// published by the Free Software Foundation.
//
// This program is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License version 2 for more details.
//
// You should have received a copy of the GNU General Public License
// version 2 along with this program; if not, write to the
// Free Software Foundation, Inc.,
// 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
//
#ifndef VIDEO_H
#define VIDEO_H
#include "video/ppu.h"
#include "interruptrequester.h"
#include "minkeeper.h"
#include "video/lyc_irq.h"
#include "video/m0_irq.h"
#include "video/next_m0_time.h"
#include "interruptrequester.h"
#include "minkeeper.h"
#include <memory>
#include "video/ppu.h"
#include "newstate.h"
namespace gambatte {
class VideoInterruptRequester {
InterruptRequester &intreq;
public:
explicit VideoInterruptRequester(InterruptRequester &intreq) : intreq(intreq) {}
void flagHdmaReq() const { gambatte::flagHdmaReq(intreq); }
void flagIrq(const unsigned bit) const { intreq.flagIrq(bit); }
void setNextEventTime(const unsigned long time) const { intreq.setEventTime<VIDEO>(time); }
explicit VideoInterruptRequester(InterruptRequester &intreq)
: intreq_(intreq)
{
}
void flagHdmaReq() const { gambatte::flagHdmaReq(intreq_); }
void flagIrq(unsigned bit) const { intreq_.flagIrq(bit); }
void setNextEventTime(unsigned long time) const { intreq_.setEventTime<intevent_video>(time); }
private:
InterruptRequester &intreq_;
};
class LCD {

BIN
output/dll/libgambatte.dll
View File

Binary file not shown.