diff --git a/BizHawk.Emulation.Cores/CPUs/Z80A/Registers.cs b/BizHawk.Emulation.Cores/CPUs/Z80A/Registers.cs
index 7f392fbe0c..7d4271373b 100644
--- a/BizHawk.Emulation.Cores/CPUs/Z80A/Registers.cs
+++ b/BizHawk.Emulation.Cores/CPUs/Z80A/Registers.cs
@@ -58,7 +58,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
 		public const ushort WIO4 = 108;
 
 
-		public bool FlagI;
+		public bool FlagI;/*, FlagI1, FlagI2, FlagI3, FlagI4, FlagI5, FlagI6;*/
 
 		public bool FlagW; // wait flag, when set to true reads / writes will be delayed
 
diff --git a/BizHawk.Emulation.Cores/CPUs/Z80A/Tables_Direct.cs b/BizHawk.Emulation.Cores/CPUs/Z80A/Tables_Direct.cs
index f305eafbab..f91fb31afc 100644
--- a/BizHawk.Emulation.Cores/CPUs/Z80A/Tables_Direct.cs
+++ b/BizHawk.Emulation.Cores/CPUs/Z80A/Tables_Direct.cs
@@ -537,11 +537,11 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
 						{TR, W, A,
 						WAIT,
 						RD_INC, Z, PCl, PCh,
-						IDLE,
-						WAIT,
+						IDLE,						
+						WAIT,					
 						WAIT,
 						OUT, Z, W, A,
-						INC16, Z, ALU,					
+						INC16, Z, ALU,
 						WAIT,
 						OP_F,
 						OP};
@@ -552,9 +552,9 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
 		private void OUT_REG_(ushort dest, ushort src)
 		{
 			cur_instr = new ushort[]
-						{IDLE,
+						{TR16, Z, W, C, B,					
+						IDLE,					
 						IDLE,
-						TR16, Z, W, C, B,
 						OUT, Z, W, src,
 						INC16, Z, W,					
 						WAIT,
diff --git a/BizHawk.Emulation.Cores/CPUs/Z80A/Tables_Indirect.cs b/BizHawk.Emulation.Cores/CPUs/Z80A/Tables_Indirect.cs
index 2a1779aee5..bab93cbe1f 100644
--- a/BizHawk.Emulation.Cores/CPUs/Z80A/Tables_Indirect.cs
+++ b/BizHawk.Emulation.Cores/CPUs/Z80A/Tables_Indirect.cs
@@ -17,17 +17,17 @@
 						OP_F,						
 						OP };
 
-			BUSRQ = new ushort[] { src_h, 0, 0, src_h, 0, 0, 0, PCh, 0, 0, 0 };
+			BUSRQ = new ushort[] { src_h, 0, 0, src_h, src_h, 0, 0, PCh, 0, 0, 0 };
 		}
 
 		private void BIT_OP_IND(ushort operation, ushort bit, ushort src_l, ushort src_h)
 		{
 			cur_instr = new ushort[]
 						{IDLE,
-						IDLE,
 						WAIT,	
 						RD, ALU, src_l, src_h,
 						operation, bit, ALU,
+						IDLE,
 						WAIT,
 						WR, src_l, src_h, ALU,
 						IDLE,
@@ -35,7 +35,7 @@
 						OP_F,
 						OP };
 
-			BUSRQ = new ushort[] { 0, src_h, 0, 0, src_h, 0, 0, PCh, 0, 0, 0 };
+			BUSRQ = new ushort[] { src_h, 0, 0, src_h, src_h, 0, 0, PCh, 0, 0, 0 };
 		}
 
 		// Note that this operation uses I_BIT, same as indexed BIT.
@@ -46,15 +46,15 @@
 		{
 			cur_instr = new ushort[]
 						{IDLE,
-						IDLE,
 						WAIT,
 						RD, ALU, src_l, src_h,
+						IDLE,
 						I_BIT, bit, ALU,
 						WAIT,
 						OP_F,
 						OP };
 
-			BUSRQ = new ushort[] { 0, src_h, 0, 0, PCh, 0, 0, 0 };
+			BUSRQ = new ushort[] { src_h, 0, 0, src_h, PCh, 0, 0, 0 };
 		}
 
 		private void REG_OP_IND_INC(ushort operation, ushort dest, ushort src_l, ushort src_h)
@@ -267,10 +267,10 @@
 		{
 			cur_instr = new ushort[]
 						{IDLE,
-						IDLE,
 						WAIT,					
 						RD, ALU, src_l, src_h,
 						INC8, ALU,
+						IDLE,
 						WAIT,
 						WR,  src_l, src_h, ALU,
 						IDLE,
@@ -278,17 +278,17 @@
 						OP_F,
 						OP };
 
-			BUSRQ = new ushort[] { 0, src_h, 0, 0, src_h, 0, 0, PCh, 0, 0, 0 };
+			BUSRQ = new ushort[] { src_h, 0, 0, src_h, src_h, 0, 0, PCh, 0, 0, 0 };
 		}
 
 		private void DEC_8_IND(ushort src_l, ushort src_h)
 		{
 			cur_instr = new ushort[]
 						{IDLE,
-						IDLE,
 						WAIT,	
 						RD, ALU, src_l, src_h,
 						DEC8, ALU,
+						IDLE,
 						WAIT,
 						WR, src_l, src_h, ALU,
 						IDLE,
@@ -296,7 +296,7 @@
 						OP_F,
 						OP };
 
-			BUSRQ = new ushort[] { 0, src_h, 0, 0, src_h, 0, 0, PCh, 0, 0, 0 };
+			BUSRQ = new ushort[] { src_h, 0, 0, src_h, src_h, 0, 0, PCh, 0, 0, 0 };
 		}
 
 		// NOTE: WZ implied for the wollowing 3 functions
@@ -304,10 +304,10 @@
 		{
 			cur_instr = new ushort[]
 						{IDLE,
-						IDLE,
 						WAIT,
 						RD, ALU, Z, W,
 						operation, ALU,
+						IDLE,
 						WAIT,
 						WR, Z, W, ALU,
 						TR, dest, ALU,
@@ -315,7 +315,7 @@
 						OP_F,
 						OP };
 
-			BUSRQ = new ushort[] { 0, W, 0, 0, W, 0, 0, PCh, 0, 0, 0 };
+			BUSRQ = new ushort[] { W, 0, 0, W, W, 0, 0, PCh, 0, 0, 0 };
 		}
 
 		private void I_BIT_OP(ushort operation, ushort bit, ushort dest)
diff --git a/BizHawk.Emulation.Cores/CPUs/Z80A/Z80A.cs b/BizHawk.Emulation.Cores/CPUs/Z80A/Z80A.cs
index 8407f0d937..33c60fc97f 100644
--- a/BizHawk.Emulation.Cores/CPUs/Z80A/Z80A.cs
+++ b/BizHawk.Emulation.Cores/CPUs/Z80A/Z80A.cs
@@ -159,6 +159,13 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
 		// Execute instructions
 		public void ExecuteOne()
 		{
+			/*FlagI6 = FlagI;
+			FlagI5 = FlagI4;
+			FlagI4 = FlagI3;
+			FlagI3 = FlagI2;
+			FlagI2 = FlagI1;
+			FlagI1 = FlagI;
+			*/
 			bus_pntr++;
 			switch (cur_instr[instr_pntr++])
 			{
@@ -663,11 +670,14 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
 									DEC16, PCl, PCh,
 									DEC16, PCl, PCh,
 									IDLE,
-									IDLE,
+									DEC16, B, ALU,
 									WAIT,
 									OP_F,
 									OP};
 
+						Regs[B] = (ushort)((Regs[B] + 1) & 0xFF);
+
+
 						BUSRQ = new ushort[] { B, B, B, B, B, PCh, 0, 0, 0 };
 					}
 					else