From 6a5b77c3389b4e9867056c2fb5dedb70768aafad Mon Sep 17 00:00:00 2001 From: Asnivor Date: Mon, 20 Aug 2018 14:18:20 +0100 Subject: [PATCH] ZXHawk: ICodeDataLogger implementation --- .../BizHawk.Emulation.Cores.csproj | 1 + .../Machine/SpectrumBase.Memory.cs | 7 + .../Machine/ZXSpectrum128K/ZX128.Memory.cs | 69 +++++++ .../ZX128Plus2a.Memory.cs | 144 ++++++++++++++ .../ZXSpectrum128KPlus3/ZX128Plus3.Memory.cs | 144 ++++++++++++++ .../Machine/ZXSpectrum16K/ZX16.cs | 22 +++ .../Machine/ZXSpectrum48K/ZX48.Memory.cs | 24 +++ .../ZXSpectrum.ICodeDataLog.cs | 180 ++++++++++++++++++ .../ZXSpectrum.IMemoryDomains.cs | 4 +- 9 files changed, 593 insertions(+), 2 deletions(-) create mode 100644 BizHawk.Emulation.Cores/Computers/SinclairSpectrum/ZXSpectrum.ICodeDataLog.cs diff --git a/BizHawk.Emulation.Cores/BizHawk.Emulation.Cores.csproj b/BizHawk.Emulation.Cores/BizHawk.Emulation.Cores.csproj index faf0089eb2..b18b0865c8 100644 --- a/BizHawk.Emulation.Cores/BizHawk.Emulation.Cores.csproj +++ b/BizHawk.Emulation.Cores/BizHawk.Emulation.Cores.csproj @@ -324,6 +324,7 @@ + diff --git a/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/SpectrumBase.Memory.cs b/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/SpectrumBase.Memory.cs index bdb8416c3a..383e7ea8aa 100644 --- a/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/SpectrumBase.Memory.cs +++ b/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/SpectrumBase.Memory.cs @@ -129,6 +129,13 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum /// public abstract byte ReadMemory(ushort addr); + /// + /// Returns the ROM/RAM enum that relates to this particular memory read operation + /// + /// + /// + public abstract ZXSpectrum.CDLResult ReadCDL(ushort addr); + /// /// Writes a byte of data to a specified memory address /// (with memory contention if appropriate) diff --git a/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum128K/ZX128.Memory.cs b/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum128K/ZX128.Memory.cs index 374ccb13eb..5824f782f9 100644 --- a/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum128K/ZX128.Memory.cs +++ b/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum128K/ZX128.Memory.cs @@ -189,6 +189,75 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum return data; } + /// + /// Returns the ROM/RAM enum that relates to this particular memory read operation + /// + /// + /// + public override ZXSpectrum.CDLResult ReadCDL(ushort addr) + { + var result = new ZXSpectrum.CDLResult(); + + int divisor = addr / 0x4000; + result.Address = addr % 0x4000; + + switch (divisor) + { + // ROM 0x000 + case 0: + if (ROMPaged == 0) + result.Type = ZXSpectrum.CDLType.ROM0; + else + result.Type = ZXSpectrum.CDLType.ROM1; + break; + + // RAM 0x4000 (RAM5 - Bank5) + case 1: + result.Type = ZXSpectrum.CDLType.RAM5; + break; + + // RAM 0x8000 (RAM2 - Bank2) + case 2: + result.Type = ZXSpectrum.CDLType.RAM2; + break; + + // RAM 0xc000 (any ram bank 0 - 7 may be paged in - default bank0) + case 3: + switch (RAMPaged) + { + case 0: + result.Type = ZXSpectrum.CDLType.RAM0; + break; + case 1: + result.Type = ZXSpectrum.CDLType.RAM1; + break; + case 2: + result.Type = ZXSpectrum.CDLType.RAM2; + break; + case 3: + result.Type = ZXSpectrum.CDLType.RAM3; + break; + case 4: + result.Type = ZXSpectrum.CDLType.RAM4; + break; + case 5: + result.Type = ZXSpectrum.CDLType.RAM5; + break; + case 6: + result.Type = ZXSpectrum.CDLType.RAM6; + break; + case 7: + result.Type = ZXSpectrum.CDLType.RAM7; + break; + } + break; + default: + break; + } + + return result; + } + /// /// Writes a byte of data to a specified memory address /// (with memory contention if appropriate) diff --git a/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum128KPlus2a/ZX128Plus2a.Memory.cs b/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum128KPlus2a/ZX128Plus2a.Memory.cs index e8c384efd9..52d002ddf1 100644 --- a/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum128KPlus2a/ZX128Plus2a.Memory.cs +++ b/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum128KPlus2a/ZX128Plus2a.Memory.cs @@ -370,6 +370,150 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum return data; } + /// + /// Returns the ROM/RAM enum that relates to this particular memory read operation + /// + /// + /// + public override ZXSpectrum.CDLResult ReadCDL(ushort addr) + { + var result = new ZXSpectrum.CDLResult(); + + int divisor = addr / 0x4000; + result.Address = addr % 0x4000; + + // special paging + if (SpecialPagingMode) + { + switch (divisor) + { + case 0: + switch (PagingConfiguration) + { + case 0: + result.Type = ZXSpectrum.CDLType.RAM0; + break; + case 1: + case 2: + case 3: + result.Type = ZXSpectrum.CDLType.RAM4; + break; + } + break; + case 1: + switch (PagingConfiguration) + { + case 0: + result.Type = ZXSpectrum.CDLType.RAM1; + break; + case 1: + case 2: + result.Type = ZXSpectrum.CDLType.RAM5; + break; + case 3: + result.Type = ZXSpectrum.CDLType.RAM7; + break; + } + break; + case 2: + switch (PagingConfiguration) + { + case 0: + result.Type = ZXSpectrum.CDLType.RAM0; + break; + case 1: + case 2: + case 3: + result.Type = ZXSpectrum.CDLType.RAM6; + break; + } + break; + case 3: + switch (PagingConfiguration) + { + case 0: + case 2: + case 3: + result.Type = ZXSpectrum.CDLType.RAM3; + break; + case 1: + result.Type = ZXSpectrum.CDLType.RAM7; + break; + } + break; + } + } + else + { + switch (divisor) + { + // ROM 0x000 + case 0: + switch (_ROMpaged) + { + case 0: + result.Type = ZXSpectrum.CDLType.ROM0; + break; + case 1: + result.Type = ZXSpectrum.CDLType.ROM1; + break; + case 2: + result.Type = ZXSpectrum.CDLType.ROM2; + break; + case 3: + result.Type = ZXSpectrum.CDLType.ROM3; + break; + } + break; + + // RAM 0x4000 (RAM5 - Bank5 always) + case 1: + result.Type = ZXSpectrum.CDLType.RAM5; + break; + + // RAM 0x8000 (RAM2 - Bank2) + case 2: + result.Type = ZXSpectrum.CDLType.RAM2; + break; + + // RAM 0xc000 (any ram bank 0 - 7 may be paged in - default bank0) + case 3: + switch (RAMPaged) + { + case 0: + result.Type = ZXSpectrum.CDLType.RAM0; + break; + case 1: + result.Type = ZXSpectrum.CDLType.RAM1; + break; + case 2: + result.Type = ZXSpectrum.CDLType.RAM2; + break; + case 3: + result.Type = ZXSpectrum.CDLType.RAM3; + break; + case 4: + result.Type = ZXSpectrum.CDLType.RAM4; + break; + case 5: + result.Type = ZXSpectrum.CDLType.RAM5; + break; + case 6: + result.Type = ZXSpectrum.CDLType.RAM6; + break; + case 7: + result.Type = ZXSpectrum.CDLType.RAM7; + break; + } + break; + default: + break; + } + } + + return result; + } + /// /// Writes a byte of data to a specified memory address /// (with memory contention if appropriate) diff --git a/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum128KPlus3/ZX128Plus3.Memory.cs b/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum128KPlus3/ZX128Plus3.Memory.cs index 54295e06d8..cdb5af1444 100644 --- a/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum128KPlus3/ZX128Plus3.Memory.cs +++ b/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum128KPlus3/ZX128Plus3.Memory.cs @@ -370,6 +370,150 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum return data; } + /// + /// Returns the ROM/RAM enum that relates to this particular memory read operation + /// + /// + /// + public override ZXSpectrum.CDLResult ReadCDL(ushort addr) + { + var result = new ZXSpectrum.CDLResult(); + + int divisor = addr / 0x4000; + result.Address = addr % 0x4000; + + // special paging + if (SpecialPagingMode) + { + switch (divisor) + { + case 0: + switch (PagingConfiguration) + { + case 0: + result.Type = ZXSpectrum.CDLType.RAM0; + break; + case 1: + case 2: + case 3: + result.Type = ZXSpectrum.CDLType.RAM4; + break; + } + break; + case 1: + switch (PagingConfiguration) + { + case 0: + result.Type = ZXSpectrum.CDLType.RAM1; + break; + case 1: + case 2: + result.Type = ZXSpectrum.CDLType.RAM5; + break; + case 3: + result.Type = ZXSpectrum.CDLType.RAM7; + break; + } + break; + case 2: + switch (PagingConfiguration) + { + case 0: + result.Type = ZXSpectrum.CDLType.RAM0; + break; + case 1: + case 2: + case 3: + result.Type = ZXSpectrum.CDLType.RAM6; + break; + } + break; + case 3: + switch (PagingConfiguration) + { + case 0: + case 2: + case 3: + result.Type = ZXSpectrum.CDLType.RAM3; + break; + case 1: + result.Type = ZXSpectrum.CDLType.RAM7; + break; + } + break; + } + } + else + { + switch (divisor) + { + // ROM 0x000 + case 0: + switch (_ROMpaged) + { + case 0: + result.Type = ZXSpectrum.CDLType.ROM0; + break; + case 1: + result.Type = ZXSpectrum.CDLType.ROM1; + break; + case 2: + result.Type = ZXSpectrum.CDLType.ROM2; + break; + case 3: + result.Type = ZXSpectrum.CDLType.ROM3; + break; + } + break; + + // RAM 0x4000 (RAM5 - Bank5 always) + case 1: + result.Type = ZXSpectrum.CDLType.RAM5; + break; + + // RAM 0x8000 (RAM2 - Bank2) + case 2: + result.Type = ZXSpectrum.CDLType.RAM2; + break; + + // RAM 0xc000 (any ram bank 0 - 7 may be paged in - default bank0) + case 3: + switch (RAMPaged) + { + case 0: + result.Type = ZXSpectrum.CDLType.RAM0; + break; + case 1: + result.Type = ZXSpectrum.CDLType.RAM1; + break; + case 2: + result.Type = ZXSpectrum.CDLType.RAM2; + break; + case 3: + result.Type = ZXSpectrum.CDLType.RAM3; + break; + case 4: + result.Type = ZXSpectrum.CDLType.RAM4; + break; + case 5: + result.Type = ZXSpectrum.CDLType.RAM5; + break; + case 6: + result.Type = ZXSpectrum.CDLType.RAM6; + break; + case 7: + result.Type = ZXSpectrum.CDLType.RAM7; + break; + } + break; + default: + break; + } + } + + return result; + } + /// /// Writes a byte of data to a specified memory address /// (with memory contention if appropriate) diff --git a/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum16K/ZX16.cs b/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum16K/ZX16.cs index f59a7652a1..33b26800d1 100644 --- a/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum16K/ZX16.cs +++ b/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum16K/ZX16.cs @@ -102,6 +102,28 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum return data; } + /// + /// Returns the ROM/RAM enum that relates to this particular memory read operation + /// + /// + /// + public override ZXSpectrum.CDLResult ReadCDL(ushort addr) + { + var res = new ZXSpectrum.CDLResult(); + + int divisor = addr / 0x4000; + res.Address = addr % 0x4000; + + // paging logic goes here + switch (divisor) + { + case 0: res.Type = ZXSpectrum.CDLType.ROM0; break; + case 1: res.Type = ZXSpectrum.CDLType.RAM0; break; + } + + return res; + } + /// /// Writes a byte of data to a specified memory address /// (with memory contention if appropriate) diff --git a/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum48K/ZX48.Memory.cs b/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum48K/ZX48.Memory.cs index e222e7114a..f14b35a003 100644 --- a/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum48K/ZX48.Memory.cs +++ b/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/Machine/ZXSpectrum48K/ZX48.Memory.cs @@ -104,6 +104,30 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum return data; } + /// + /// Returns the ROM/RAM enum that relates to this particular memory read operation + /// + /// + /// + public override ZXSpectrum.CDLResult ReadCDL(ushort addr) + { + var res = new ZXSpectrum.CDLResult(); + + int divisor = addr / 0x4000; + res.Address = addr % 0x4000; + + // paging logic goes here + switch (divisor) + { + case 0: res.Type = ZXSpectrum.CDLType.ROM0; break; + case 1: res.Type = ZXSpectrum.CDLType.RAM0; break; + case 2: res.Type = ZXSpectrum.CDLType.RAM1; break; + case 3: res.Type = ZXSpectrum.CDLType.RAM2; break; + } + + return res; + } + /// /// Writes a byte of data to a specified memory address /// (with memory contention if appropriate) diff --git a/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/ZXSpectrum.ICodeDataLog.cs b/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/ZXSpectrum.ICodeDataLog.cs new file mode 100644 index 0000000000..b504490d78 --- /dev/null +++ b/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/ZXSpectrum.ICodeDataLog.cs @@ -0,0 +1,180 @@ +using System; +using System.Collections.Generic; +using System.Linq; +using BizHawk.Emulation.Common; +using System.IO; + +namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum +{ + /// + /// ZXHawk: Core Class + /// * ICodeDataLog * + /// + public partial class ZXSpectrum : ICodeDataLogger + { + private ICodeDataLog _cdl; + + public void SetCDL(ICodeDataLog cdl) + { + _cdl = cdl; + if (cdl == null || !cdl.Active) + { + _cpu.ReadMemory = _machine.ReadMemory; + } + else + { + _cpu.ReadMemory = ReadMemory_CDL; + } + } + + public void NewCDL(ICodeDataLog cdl) + { + cdl["System Bus"] = new byte[memoryDomains["System Bus"].Size]; + + if (memoryDomains.Has("ROM - 128K Editor & Menu")) { cdl["ROM - 128K Editor & Menu"] = new byte[memoryDomains["ROM - 128K Editor & Menu"].Size]; } + if (memoryDomains.Has("ROM - 128K Syntax Checker")) { cdl["ROM - 128K Syntax Checker"] = new byte[memoryDomains["ROM - 128K Syntax Checker"].Size]; } + if (memoryDomains.Has("ROM - +3DOS")) { cdl["ROM - +3DOS"] = new byte[memoryDomains["ROM - +3DOS"].Size]; } + if (memoryDomains.Has("ROM - 48K BASIC")) { cdl["ROM - 48K BASIC"] = new byte[memoryDomains["ROM - 48K BASIC"].Size]; } + + // different RAM bank ordering for < 128k models + if (_machineType == MachineType.ZXSpectrum16 || _machineType == MachineType.ZXSpectrum48) + { + if (memoryDomains.Has("RAM - BANK 0 (Screen)")) { cdl["RAM - BANK 0 (Screen)"] = new byte[memoryDomains["RAM - BANK 0 (Screen)"].Size]; } + if (memoryDomains.Has("RAM - BANK 1")) { cdl["RAM - BANK 1"] = new byte[memoryDomains["RAM - BANK 1"].Size]; } + if (memoryDomains.Has("RAM - BANK 2")) { cdl["RAM - BANK 2"] = new byte[memoryDomains["RAM - BANK 2"].Size]; } + } + else + { + if (memoryDomains.Has("RAM - BANK 5 (Screen)")) { cdl["RAM - BANK 5 (Screen)"] = new byte[memoryDomains["RAM - BANK 5 (Screen)"].Size]; } + if (memoryDomains.Has("RAM - BANK 2")) { cdl["RAM - BANK 2"] = new byte[memoryDomains["RAM - BANK 2"].Size]; } + if (memoryDomains.Has("RAM - BANK 0")) { cdl["RAM - BANK 0"] = new byte[memoryDomains["RAM - BANK 0"].Size]; } + if (memoryDomains.Has("RAM - BANK 1")) { cdl["RAM - BANK 1"] = new byte[memoryDomains["RAM - BANK 1"].Size]; } + if (memoryDomains.Has("RAM - BANK 3")) { cdl["RAM - BANK 3"] = new byte[memoryDomains["RAM - BANK 3"].Size]; } + if (memoryDomains.Has("RAM - BANK 4")) { cdl["RAM - BANK 4"] = new byte[memoryDomains["RAM - BANK 4"].Size]; } + if (memoryDomains.Has("RAM - BANK 6")) { cdl["RAM - BANK 6"] = new byte[memoryDomains["RAM - BANK 6"].Size]; } + if (memoryDomains.Has("RAM - BANK 7 (Shadow Screen)")) { cdl["RAM - BANK 7 (Shadow Screen)"] = new byte[memoryDomains["RAM - BANK 7 (Shadow Screen)"].Size]; } + } + + cdl.SubType = "ZXSpectrum"; + cdl.SubVer = 0; + } + + [FeatureNotImplemented] + public void DisassembleCDL(Stream s, ICodeDataLog cdl) + { + + } + + public enum CDLType + { + None, + ROM0, ROM1, ROM2, ROM3, + RAM0, RAM1, RAM2, RAM3, + RAM4, RAM5, RAM6, RAM7 + } + + public struct CDLResult + { + public CDLType Type; + public int Address; + } + + private byte ReadMemory_CDL(ushort addr) + { + var mapping = _machine.ReadCDL(addr); + var res = mapping.Type; + var address = mapping.Address; + + byte data = _machine.ReadMemory(addr); + + switch (res) + { + case CDLType.None: + default: + break; + + case CDLType.ROM0: + switch (_machineType) + { + case MachineType.ZXSpectrum16: + case MachineType.ZXSpectrum48: + _cdl["ROM - 48K BASIC"][address] = data; + break; + default: + _cdl["ROM - 128K Editor & Menu"][address] = data; + break; + } + break; + + case CDLType.ROM1: + switch(_machineType) + { + case MachineType.ZXSpectrum128: + case MachineType.ZXSpectrum128Plus2: + _cdl["ROM - 48K BASIC"][address] = data; + break; + case MachineType.ZXSpectrum128Plus2a: + case MachineType.ZXSpectrum128Plus3: + _cdl["ROM - 128K Syntax Checker"][address] = data; + break; + } + break; + + case CDLType.ROM2: + _cdl["ROM - +3DOS"][address] = data; + break; + + case CDLType.ROM3: + _cdl["ROM - 48K BASIC"][address] = data; + break; + + case CDLType.RAM0: + switch (_machineType) + { + case MachineType.ZXSpectrum16: + case MachineType.ZXSpectrum48: + _cdl["RAM - BANK 0 (Screen)"][address] = data; + break; + default: + _cdl["RAM - BANK 0"][address] = data; + break; + } + break; + + case CDLType.RAM1: + _cdl["RAM - BANK 1"][address] = data; + break; + + case CDLType.RAM2: + _cdl["RAM - BANK 2"][address] = data; + break; + + case CDLType.RAM3: + _cdl["RAM - BANK 3"][address] = data; + break; + + case CDLType.RAM4: + _cdl["RAM - BANK 4"][address] = data; + break; + + case CDLType.RAM5: + _cdl["RAM - BANK 5 (Screen)"][address] = data; + break; + + case CDLType.RAM6: + _cdl["RAM - BANK 6"][address] = data; + break; + + case CDLType.RAM7: + _cdl["RAM - BANK 7 (Shadow Screen)"][address] = data; + break; + } + + // update the system bus as well + // because why not + _cdl["System Bus"][addr] = data; + + return data; + } + } +} diff --git a/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/ZXSpectrum.IMemoryDomains.cs b/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/ZXSpectrum.IMemoryDomains.cs index 861edff397..16b439ed71 100644 --- a/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/ZXSpectrum.IMemoryDomains.cs +++ b/BizHawk.Emulation.Cores/Computers/SinclairSpectrum/ZXSpectrum.IMemoryDomains.cs @@ -49,11 +49,11 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum private void SyncAllByteArrayDomains() { - switch (SyncSettings.MachineType) + switch (_machineType) { case MachineType.ZXSpectrum16: SyncByteArrayDomain("ROM - 48K BASIC", _machine.ROM0); - SyncByteArrayDomain("RAM - BANK 0", _machine.RAM0); + SyncByteArrayDomain("RAM - BANK 0 (Screen)", _machine.RAM0); break; case MachineType.ZXSpectrum48: SyncByteArrayDomain("ROM - 48K BASIC", _machine.ROM0);