From 5d401b20d34402829aba9c46cf1102e34d5bab38 Mon Sep 17 00:00:00 2001 From: alyosha-tas Date: Wed, 13 Jun 2018 12:54:43 -0400 Subject: [PATCH] z80: clean up --- BizHawk.Emulation.Cores/CPUs/Z80A/Execute.cs | 3 --- BizHawk.Emulation.Cores/CPUs/Z80A/Interrupts.cs | 2 -- BizHawk.Emulation.Cores/CPUs/Z80A/Registers.cs | 2 +- BizHawk.Emulation.Cores/CPUs/Z80A/Z80A.cs | 11 +---------- 4 files changed, 2 insertions(+), 16 deletions(-) diff --git a/BizHawk.Emulation.Cores/CPUs/Z80A/Execute.cs b/BizHawk.Emulation.Cores/CPUs/Z80A/Execute.cs index 9b308b76e3..318ef27300 100644 --- a/BizHawk.Emulation.Cores/CPUs/Z80A/Execute.cs +++ b/BizHawk.Emulation.Cores/CPUs/Z80A/Execute.cs @@ -20,15 +20,12 @@ namespace BizHawk.Emulation.Cores.Components.Z80A public int instr_pntr = 0; public int bus_pntr = 0; public int mem_pntr = 0; - public ushort instr_swap; public ushort[] cur_instr; public ushort[] BUSRQ; public ushort[] MEMRQ; public byte opcode; public bool NO_prefix, CB_prefix, IX_prefix, EXTD_prefix, IY_prefix, IXCB_prefix, IYCB_prefix; - public bool IXCB_prefetch, IYCB_prefetch; // value is fetched before opcode public bool halted; - public ushort PF; public void FetchInstruction() { diff --git a/BizHawk.Emulation.Cores/CPUs/Z80A/Interrupts.cs b/BizHawk.Emulation.Cores/CPUs/Z80A/Interrupts.cs index 1781a5eebe..6bc915c296 100644 --- a/BizHawk.Emulation.Cores/CPUs/Z80A/Interrupts.cs +++ b/BizHawk.Emulation.Cores/CPUs/Z80A/Interrupts.cs @@ -119,8 +119,6 @@ namespace BizHawk.Emulation.Cores.Components.Z80A MEMRQ = new ushort[] { I, 0, 0, SPh, 0, 0, SPh, 0, 0, W, 0, 0, W, 0, 0, PCh, 0, 0, 0 }; } - private static ushort[] INT_vectors = new ushort[] {0x40, 0x48, 0x50, 0x58, 0x60}; - private void ResetInterrupts() { IFF1 = false; diff --git a/BizHawk.Emulation.Cores/CPUs/Z80A/Registers.cs b/BizHawk.Emulation.Cores/CPUs/Z80A/Registers.cs index ceb6017a7e..b081996cde 100644 --- a/BizHawk.Emulation.Cores/CPUs/Z80A/Registers.cs +++ b/BizHawk.Emulation.Cores/CPUs/Z80A/Registers.cs @@ -58,7 +58,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A public const ushort WIO4 = 108; - public bool FlagI, FlagI1, FlagI2, FlagI3, FlagI4, FlagI5, FlagI6; + public bool FlagI, FlagI1, FlagI2, FlagI3, FlagI4, FlagI5; public bool FlagW; // wait flag, when set to true reads / writes will be delayed diff --git a/BizHawk.Emulation.Cores/CPUs/Z80A/Z80A.cs b/BizHawk.Emulation.Cores/CPUs/Z80A/Z80A.cs index a96e76beb8..cc4d21ce60 100644 --- a/BizHawk.Emulation.Cores/CPUs/Z80A/Z80A.cs +++ b/BizHawk.Emulation.Cores/CPUs/Z80A/Z80A.cs @@ -160,7 +160,6 @@ namespace BizHawk.Emulation.Cores.Components.Z80A // Execute instructions public void ExecuteOne() { - //FlagI6 = FlagI5; FlagI5 = FlagI4; FlagI4 = FlagI3; FlagI3 = FlagI2; @@ -676,14 +675,11 @@ namespace BizHawk.Emulation.Cores.Components.Z80A DEC16, PCl, PCh, DEC16, PCl, PCh, IDLE, - IDLE,//DEC16, B, ALU, + IDLE, WAIT, OP_F, OP}; - //Regs[B] = (ushort)((Regs[B] + 1) & 0xFF); - - BUSRQ = new ushort[] { B, B, B, B, B, PCh, 0, 0, 0 }; MEMRQ = new ushort[] { 0, 0, 0, 0, 0, PCh, 0, 0, 0 }; } @@ -777,7 +773,6 @@ namespace BizHawk.Emulation.Cores.Components.Z80A ser.Sync("cur_instr", ref cur_instr, false); ser.Sync("BUSRQ", ref BUSRQ, false); ser.Sync("MEMRQ", ref MEMRQ, false); - ser.Sync("instr_swap", ref instr_swap); ser.Sync("opcode", ref opcode); ser.Sync("FlagI", ref FlagI); ser.Sync("FlagI1", ref FlagI1); @@ -785,7 +780,6 @@ namespace BizHawk.Emulation.Cores.Components.Z80A ser.Sync("FlagI3", ref FlagI3); ser.Sync("FlagI4", ref FlagI4); ser.Sync("FlagI5", ref FlagI5); - ser.Sync("FlagI6", ref FlagI6); ser.Sync("FlagW", ref FlagW); ser.Sync("NO Preifx", ref NO_prefix); @@ -795,9 +789,6 @@ namespace BizHawk.Emulation.Cores.Components.Z80A ser.Sync("IXCB_prefix", ref IXCB_prefix); ser.Sync("IYCB_prefix", ref IYCB_prefix); ser.Sync("EXTD_prefix", ref EXTD_prefix); - ser.Sync("IXCB_prefetch", ref IXCB_prefetch); - ser.Sync("IYCB_prefetch", ref IYCB_prefetch); - ser.Sync("PF", ref PF); ser.EndSection(); }