From 53dd5008754a37dac13a9d89fa4a0845300ac41d Mon Sep 17 00:00:00 2001 From: alyosha-tas Date: Sun, 7 Jul 2019 09:08:26 -0400 Subject: [PATCH] MC6800: More cleanup --- .../CPUs/MC6800/Disassembler.cs | 179 +--------- .../CPUs/MC6800/Indexed_Modes.cs | 308 ++---------------- .../CPUs/MC6800/Interrupts.cs | 21 -- BizHawk.Emulation.Cores/CPUs/MC6800/MC6800.cs | 72 +--- .../CPUs/MC6800/OP_Tables.cs | 3 - .../CPUs/MC6800/Operations.cs | 88 ----- .../CPUs/MC6800/Registers.cs | 19 +- 7 files changed, 40 insertions(+), 650 deletions(-) diff --git a/BizHawk.Emulation.Cores/CPUs/MC6800/Disassembler.cs b/BizHawk.Emulation.Cores/CPUs/MC6800/Disassembler.cs index a276eb209e..5bb59e461d 100644 --- a/BizHawk.Emulation.Cores/CPUs/MC6800/Disassembler.cs +++ b/BizHawk.Emulation.Cores/CPUs/MC6800/Disassembler.cs @@ -301,183 +301,8 @@ namespace BizHawk.Emulation.Common.Components.MC6800 byte d = reader(addr++); bytes.Add(d); - string temp_reg = ""; - - switch ((d >> 5) & 3) - { - case 0: temp_reg = "X"; break; - case 1: temp_reg = "Y"; break; - case 2: temp_reg = "US"; break; - case 3: temp_reg = "SP"; break; - } - - if ((d & 0x80) == 0) - { - short tempdis = (short)(d & 0x1F); - if (tempdis >= 16) - tempdis -= 32; - - result = result.Replace("ix16", temp_reg + " + ea"); - result = result.Replace("ea", string.Format("{0:N}h", tempdis)); - } - else - { - if ((d & 0x10) == 0x10) - { - switch (d & 0xF) - { - case 0x0: - result = result.Replace("ix16", "???"); - break; - case 0x1: - result = result.Replace("ix16","(" + temp_reg + ")++"); - break; - case 0x2: - result = result.Replace("ix16", "???"); - break; - case 0x3: - result = result.Replace("ix16", "--(" + temp_reg + ")"); - break; - case 0x4: - result = result.Replace("ix16", "(" + temp_reg + ")"); - break; - case 0x5: - result = result.Replace("ix16", "(" + temp_reg + " + B)"); - break; - case 0x6: - result = result.Replace("ix16", "(" + temp_reg + " + A)"); - break; - case 0x7: - result = result.Replace("ix16", "???"); - break; - case 0x8: - byte e = reader(addr++); - bytes.Add(e); - result = result.Replace("ix16", "(" + temp_reg + " + ea)"); - result = result.Replace("ea", string.Format("{0:X2}h", e)); - break; - case 0x9: - byte f = reader(addr++); - bytes.Add(f); - byte g = reader(addr++); - bytes.Add(g); - result = result.Replace("ix16", "(" + temp_reg + " + ea)"); - result = result.Replace("ea", string.Format("{0:X2}{1:X2}h", f, g)); - break; - case 0xA: - result = result.Replace("ix16", "???"); - break; - case 0xB: - result = result.Replace("ix16", "(" + temp_reg + " + D)"); - break; - case 0xC: - temp_reg = "PC"; - byte h = reader(addr++); - bytes.Add(h); - result = result.Replace("ix16", "(" + temp_reg + " + ea)"); - result = result.Replace("ea", string.Format("{0:X2}h", h)); - break; - case 0xD: - temp_reg = "PC"; - byte i = reader(addr++); - bytes.Add(i); - byte j = reader(addr++); - bytes.Add(j); - result = result.Replace("ix16", "(" + temp_reg + " + ea)"); - result = result.Replace("ea", string.Format("{0:X2}{1:X2}h", i, j)); - break; - case 0xE: - result = result.Replace("ix16", "???"); - break; - case 0xF: - if (((d >> 5) & 3) == 0) - { - byte k = reader(addr++); - bytes.Add(k); - byte l = reader(addr++); - bytes.Add(l); - result = result.Replace("ix16", "(" + string.Format("{0:X2}{1:X2}h", k, l) + ")"); - } - else - { - result = result.Replace("ix16", "???"); - } - break; - } - } - else - { - switch (d & 0xF) - { - case 0x0: - result = result.Replace("ix16", temp_reg + "+"); - break; - case 0x1: - result = result.Replace("ix16", temp_reg + "++"); - break; - case 0x2: - result = result.Replace("ix16", "-" + temp_reg); - break; - case 0x3: - result = result.Replace("ix16", "--" + temp_reg); - break; - case 0x4: - result = result.Replace("ix16", temp_reg); - break; - case 0x5: - result = result.Replace("ix16", temp_reg + " + B"); - break; - case 0x6: - result = result.Replace("ix16", temp_reg + " + A"); - break; - case 0x7: - result = result.Replace("ix16", "???"); - break; - case 0x8: - byte e = reader(addr++); - bytes.Add(e); - result = result.Replace("ix16", temp_reg + " + ea"); - result = result.Replace("ea", string.Format("{0:X2}h", e)); - break; - case 0x9: - byte f = reader(addr++); - bytes.Add(f); - byte g = reader(addr++); - bytes.Add(g); - result = result.Replace("ix16", temp_reg + " + ea"); - result = result.Replace("ea", string.Format("{0:X2}{1:X2}h", f, g)); - break; - case 0xA: - result = result.Replace("ix16", "???"); - break; - case 0xB: - result = result.Replace("ix16", temp_reg + " + D"); - break; - case 0xC: - temp_reg = "PC"; - byte h = reader(addr++); - bytes.Add(h); - result = result.Replace("ix16", temp_reg + " + ea"); - result = result.Replace("ea", string.Format("{0:X2}h", h)); - break; - case 0xD: - temp_reg = "PC"; - byte i = reader(addr++); - bytes.Add(i); - byte j = reader(addr++); - bytes.Add(j); - result = result.Replace("ix16", temp_reg + " + ea"); - result = result.Replace("ea", string.Format("{0:X2}{1:X2}h", i, j)); - break; - case 0xE: - result = result.Replace("ix16", "???"); - break; - case 0xF: - result = result.Replace("ix16", "???"); - break; - } - } - } + result = result.Replace("ix16", "X + " + "ea"); + result = result.Replace("ea", string.Format("{0:N}h", d)); } else if (result.Contains("r8")) { diff --git a/BizHawk.Emulation.Cores/CPUs/MC6800/Indexed_Modes.cs b/BizHawk.Emulation.Cores/CPUs/MC6800/Indexed_Modes.cs index b356506e5c..bdda0a93d5 100644 --- a/BizHawk.Emulation.Cores/CPUs/MC6800/Indexed_Modes.cs +++ b/BizHawk.Emulation.Cores/CPUs/MC6800/Indexed_Modes.cs @@ -4,49 +4,38 @@ namespace BizHawk.Emulation.Common.Components.MC6800 { public partial class MC6800 { - public const ushort LEAX = 0; - public const ushort LEAY = 1; - public const ushort LEAS = 2; - public const ushort LEAU = 3; - public const ushort I_NEG = 4; - public const ushort I_COM = 5; - public const ushort I_LSR = 6; - public const ushort I_ROR = 7; - public const ushort I_ASR = 8; - public const ushort I_ASL = 9; - public const ushort I_ROL = 10; - public const ushort I_DEC = 11; - public const ushort I_INC = 12; - public const ushort I_TST = 13; - public const ushort I_JMP = 14; - public const ushort I_CLR = 15; - public const ushort I_SUB = 16; - public const ushort I_CMP = 17; - public const ushort I_SBC = 18; - public const ushort I_AND = 19; - public const ushort I_BIT = 20; - public const ushort I_LD = 21; - public const ushort I_ST = 22; - public const ushort I_XOR = 23; - public const ushort I_ADC = 24; - public const ushort I_OR = 25; - public const ushort I_ADD = 26; - public const ushort I_SUBD = 27; - public const ushort I_ADDD = 28; - public const ushort I_CMP16 = 29; - public const ushort I_JSR = 30; - public const ushort I_LD16 = 31; - public const ushort I_ST16 = 32; - public const ushort I_LD16D = 33; - public const ushort I_ST16D = 34; - public const ushort I_CMP16D = 35; + public const ushort I_NEG = 0; + public const ushort I_COM = 1; + public const ushort I_LSR = 2; + public const ushort I_ROR = 3; + public const ushort I_ASR = 4; + public const ushort I_ASL = 5; + public const ushort I_ROL = 6; + public const ushort I_DEC = 7; + public const ushort I_INC = 8; + public const ushort I_TST = 9; + public const ushort I_JMP = 10; + public const ushort I_CLR = 11; + public const ushort I_SUB = 12; + public const ushort I_CMP = 13; + public const ushort I_SBC = 14; + public const ushort I_AND = 15; + public const ushort I_BIT = 16; + public const ushort I_LD = 17; + public const ushort I_ST = 18; + public const ushort I_XOR = 19; + public const ushort I_ADC = 20; + public const ushort I_OR = 21; + public const ushort I_ADD = 22; + public const ushort I_CMP16 = 23; + public const ushort I_JSR = 24; + public const ushort I_LD16 = 25; + public const ushort I_ST16 = 26; public ushort indexed_op; public ushort indexed_reg; public ushort indexed_op_reg; - public ushort temp; - private void INDEX_OP(ushort oper) { indexed_op = oper; @@ -84,14 +73,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800 IRQS = 5; } - private void INDEX_OP_LEA(ushort dest) - { - PopulateCURINSTR(LEA, dest, IDX_EA, - IDLE); - - IRQS = 2; - } - private void INDEX_OP_LD() { PopulateCURINSTR(IDLE, @@ -177,227 +158,9 @@ namespace BizHawk.Emulation.Common.Components.MC6800 // ALU holds the post byte public void Index_decode() { - switch ((Regs[ALU] >> 5) & 3) - { - case 0: indexed_reg = X; break; - case 1: indexed_reg = SP; break; - } + Regs[IDX_EA] = (ushort)(Regs[X] + Regs[ALU]); - if ((Regs[ALU] & 0x80) == 0) - { - temp = (ushort)(Regs[ALU] & 0x1F); - if ((Regs[ALU] & 0x10) == 0x10) - { - temp |= 0xFFE0; - } - - Regs[IDX_EA] = (ushort)(Regs[indexed_reg] + temp); - - PopulateCURINSTR(IDX_OP_BLD); - } - else - { - if ((Regs[ALU] & 0x10) == 0x10) - { - switch (Regs[ALU] & 0xF) - { - case 0x0: - // Illegal - break; - case 0x1: - Regs[ADDR] = Regs[indexed_reg]; - PopulateCURINSTR(INC16, indexed_reg, - INC16, indexed_reg, - RD_INC, ALU, ADDR, - RD_INC, ALU2, ADDR, - SET_ADDR, IDX_EA, ALU, ALU2, - IDX_OP_BLD); - break; - case 0x2: - // Illegal - break; - case 0x3: - Regs[ADDR] = (ushort)(Regs[indexed_reg] - 2); - PopulateCURINSTR(DEC16, indexed_reg, - DEC16, indexed_reg, - RD_INC, ALU, ADDR, - RD_INC, ALU2, ADDR, - SET_ADDR, IDX_EA, ALU, ALU2, - IDX_OP_BLD); - break; - case 0x4: - Regs[ADDR] = Regs[indexed_reg]; - PopulateCURINSTR(RD_INC, ALU, ADDR, - RD_INC_OP, ALU2, ADDR, SET_ADDR, IDX_EA, ALU, ALU2, - IDX_OP_BLD); - break; - case 0x5: - Regs[ADDR] = (ushort)(Regs[indexed_reg] + (((Regs[B] & 0x80) == 0x80) ? (Regs[B] | 0xFF00) : Regs[B])); - PopulateCURINSTR(RD_INC, ALU, ADDR, - RD_INC, ALU2, ADDR, - SET_ADDR, IDX_EA, ALU, ALU2, - IDX_OP_BLD); - break; - case 0x6: - Regs[ADDR] = (ushort)(Regs[indexed_reg] + (((Regs[A] & 0x80) == 0x80) ? (Regs[A] | 0xFF00) : Regs[A])); - PopulateCURINSTR(RD_INC, ALU, ADDR, - RD_INC, ALU2, ADDR, - SET_ADDR, IDX_EA, ALU, ALU2, - IDX_OP_BLD); - break; - case 0x7: - // Illegal - break; - case 0x8: - Regs[ADDR] = Regs[indexed_reg]; - PopulateCURINSTR(RD_INC_OP, ALU2, PC, ADD8BR, ADDR, ALU2, - RD_INC, ALU, ADDR, - RD_INC_OP, ALU2, ADDR, SET_ADDR, IDX_EA, ALU, ALU2, - IDX_OP_BLD); - break; - case 0x9: - Regs[ADDR] = Regs[indexed_reg]; - PopulateCURINSTR(RD_INC, ALU, PC, - RD_INC, ALU2, PC, - SET_ADDR, IDX_EA, ALU, ALU2, - ADD16BR, ADDR, IDX_EA, - RD_INC, ALU, ADDR, - RD_INC_OP, ALU2, ADDR, SET_ADDR, IDX_EA, ALU, ALU2, - IDX_OP_BLD); - break; - case 0xA: - // Illegal - break; - case 0xB: - Regs[ADDR] = Regs[indexed_reg]; - PopulateCURINSTR(IDLE, - IDLE, - SET_ADDR, IDX_EA, A, B, - ADD16BR, ADDR, IDX_EA, - RD_INC, ALU, ADDR, - RD_INC_OP, ALU2, ADDR, SET_ADDR, IDX_EA, ALU, ALU2, - IDX_OP_BLD); - break; - case 0xC: - indexed_reg = PC; - Regs[ADDR] = Regs[indexed_reg]; - PopulateCURINSTR(RD_INC_OP, ALU2, PC, ADD8BR, ADDR, ALU2, - RD_INC, ALU, ADDR, - RD_INC_OP, ALU2, ADDR, SET_ADDR, IDX_EA, ALU, ALU2, - IDX_OP_BLD); - break; - case 0xD: - indexed_reg = PC; - Regs[ADDR] = Regs[indexed_reg]; - PopulateCURINSTR(IDLE, - RD_INC, ALU, PC, - RD_INC, ALU2, PC, - SET_ADDR, IDX_EA, ALU, ALU2, - ADD16BR, ADDR, IDX_EA, - RD_INC, ALU, ADDR, - RD_INC_OP, ALU2, ADDR, SET_ADDR, IDX_EA, ALU, ALU2, - IDX_OP_BLD); - break; - case 0xE: - // Illegal - break; - case 0xF: - if (((Regs[ALU] >> 5) & 3) == 0) - { - PopulateCURINSTR(RD_INC, ALU, PC, - RD_INC_OP, ALU2, PC, SET_ADDR, ADDR, ALU, ALU2, - RD_INC, ALU, ADDR, - RD_INC_OP, ALU2, ADDR, SET_ADDR, IDX_EA, ALU, ALU2, - IDX_OP_BLD); - } - else - { - // illegal - } - break; - } - } - else - { - switch (Regs[ALU] & 0xF) - { - case 0x0: - Regs[IDX_EA] = Regs[indexed_reg]; - PopulateCURINSTR(INC16, indexed_reg, - IDX_OP_BLD); - break; - case 0x1: - Regs[IDX_EA] = Regs[indexed_reg]; - PopulateCURINSTR(INC16, indexed_reg, - INC16, indexed_reg, - IDX_OP_BLD); - break; - case 0x2: - Regs[IDX_EA] = (ushort)(Regs[indexed_reg] - 1); - PopulateCURINSTR(DEC16, indexed_reg, - IDX_OP_BLD); - break; - case 0x3: - Regs[IDX_EA] = (ushort)(Regs[indexed_reg] - 2); - PopulateCURINSTR(DEC16, indexed_reg, - DEC16, indexed_reg, - IDX_OP_BLD); - break; - case 0x4: - Regs[IDX_EA] = Regs[indexed_reg]; - Index_Op_Builder(); - return; // need to return here or else we run into the code below invalidating irq_pntr - break; - case 0x5: - Regs[IDX_EA] = (ushort)(Regs[indexed_reg] + (((Regs[B] & 0x80) == 0x80) ? (Regs[B] | 0xFF00) : Regs[B])); - PopulateCURINSTR(IDX_OP_BLD); - break; - case 0x6: - Regs[IDX_EA] = (ushort)(Regs[indexed_reg] + (((Regs[A] & 0x80) == 0x80) ? (Regs[A] | 0xFF00) : Regs[A])); - PopulateCURINSTR(IDX_OP_BLD); - break; - case 0x7: - // Illegal - break; - case 0x8: - PopulateCURINSTR(RD_INC_OP, ALU2, PC, EA_8); - break; - case 0x9: - PopulateCURINSTR(RD_INC, ALU, PC, - RD_INC, ALU2, PC, - SET_ADDR, ADDR, ALU, ALU2, - EA_16); - break; - case 0xA: - // Illegal - break; - case 0xB: - PopulateCURINSTR(IDLE, - IDLE, - SET_ADDR, ADDR, A, B, - EA_16); - break; - case 0xC: - indexed_reg = PC; - PopulateCURINSTR(RD_INC_OP, ALU2, PC, EA_8); - break; - case 0xD: - indexed_reg = PC; - PopulateCURINSTR(IDLE, - RD_INC, ALU, PC, - RD_INC, ALU2, PC, - SET_ADDR, ADDR, ALU, ALU2, - EA_16); - break; - case 0xE: - // Illegal - break; - case 0xF: - // Illegal - break; - } - } - } + PopulateCURINSTR(IDX_OP_BLD); instr_pntr = 0; irq_pntr = 100; @@ -407,8 +170,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800 { switch(indexed_op) { - case LEAX: INDEX_OP_LEA(X); break; // LEAX - case LEAS: INDEX_OP_LEA(SP); break; // LEAS case I_NEG: INDEX_OP_EX6(NEG); break; // NEG case I_COM: INDEX_OP_EX6(COM); break; // COM case I_LSR: INDEX_OP_EX6(LSR); break; // LSR @@ -432,15 +193,10 @@ namespace BizHawk.Emulation.Common.Components.MC6800 case I_ADC: INDEX_OP_EX4(ADC8); break; // ADC A,B case I_OR: INDEX_OP_EX4(OR8); break; // OR A,B case I_ADD: INDEX_OP_EX4(ADD8); break; // ADD A,B - case I_SUBD: INDEX_OP_EX6D(SUB16); break; // SUB D - case I_ADDD: INDEX_OP_EX6D(ADD16); break; // ADD D - case I_CMP16: INDEX_CMP_EX6(CMP16); break; // CMP X, Y, SP, US + case I_CMP16: INDEX_CMP_EX6(CMP16); break; // CMP X, SP case I_JSR: INDEX_OP_JSR(); break; // JSR - case I_LD16: INDEX_OP_LD(); break; // LD X, Y, SP, US - case I_ST16: INDEX_OP_ST(); break; // ST X, Y, SP, US - case I_LD16D: INDEX_OP_LDD(); break; // LD D - case I_ST16D: INDEX_OP_STD(); break; // ST D - case I_CMP16D: INDEX_OP_EX6D(CMP16D); break; // CMP D + case I_LD16: INDEX_OP_LD(); break; // LD X, SP + case I_ST16: INDEX_OP_ST(); break; // ST X, SP } instr_pntr = 0; diff --git a/BizHawk.Emulation.Cores/CPUs/MC6800/Interrupts.cs b/BizHawk.Emulation.Cores/CPUs/MC6800/Interrupts.cs index ee76dfff88..d3ca892346 100644 --- a/BizHawk.Emulation.Cores/CPUs/MC6800/Interrupts.cs +++ b/BizHawk.Emulation.Cores/CPUs/MC6800/Interrupts.cs @@ -14,7 +14,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800 WR_DEC_HI, SP, PC, WR_DEC_LO, SP, X, WR_DEC_HI, SP, X, - WR_DEC_LO, SP, DP, WR_DEC_LO, SP, B, WR_DEC_LO, SP, A, WR, SP, CC, @@ -26,23 +25,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800 IRQS = 19; } - private void FIRQ_() - { - Regs[ADDR] = 0xFFF6; - PopulateCURINSTR(IDLE, - CLR_E, - DEC16, SP, - WR_DEC_LO, SP, PC, - WR_DEC_HI, SP, PC, - WR, SP, CC, - SET_F_I, - RD_INC, ALU, ADDR, - RD_INC, ALU2, ADDR, - SET_ADDR, PC, ALU, ALU2); - - IRQS = 10; - } - private void NMI_() { Regs[ADDR] = 0xFFFC; @@ -53,7 +35,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800 WR_DEC_HI, SP, PC, WR_DEC_LO, SP, X, WR_DEC_HI, SP, X, - WR_DEC_LO, SP, DP, WR_DEC_LO, SP, B, WR_DEC_LO, SP, A, WR, SP, CC, @@ -66,12 +47,10 @@ namespace BizHawk.Emulation.Common.Components.MC6800 } public bool NMIPending; - public bool FIRQPending; public bool IRQPending; public bool IN_SYNC; public Action IRQCallback = delegate () { }; - public Action FIRQCallback = delegate () { }; public Action NMICallback = delegate () { }; private void ResetInterrupts() diff --git a/BizHawk.Emulation.Cores/CPUs/MC6800/MC6800.cs b/BizHawk.Emulation.Cores/CPUs/MC6800/MC6800.cs index c97c96096c..14a5b9eeae 100644 --- a/BizHawk.Emulation.Cores/CPUs/MC6800/MC6800.cs +++ b/BizHawk.Emulation.Cores/CPUs/MC6800/MC6800.cs @@ -13,7 +13,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800 public const ushort RD = 2; public const ushort WR = 3; public const ushort TR = 4; - public const ushort ADD16BR = 5; public const ushort ADD8 = 6; public const ushort SUB8 = 7; public const ushort ADC8 = 8; @@ -58,13 +57,9 @@ namespace BizHawk.Emulation.Common.Components.MC6800 public const ushort SET_E = 57; public const ushort ANDCC = 58; public const ushort CMP8 = 59; - public const ushort SUB16 = 60; - public const ushort ADD16 = 61; public const ushort CMP16 = 62; - public const ushort CMP16D = 63; public const ushort LD_8 = 64; public const ushort LD_16 = 65; - public const ushort LEA = 66; public const ushort CLR_E = 67; public const ushort TAP = 68; public const ushort TPA = 69; @@ -247,9 +242,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800 case LD_16: LD_16_Func(cur_instr[instr_pntr++], cur_instr[instr_pntr++], cur_instr[instr_pntr++]); break; - case LEA: - LEA_Func(cur_instr[instr_pntr++], cur_instr[instr_pntr++]); - break; case ANDCC: Regs[CC] &= Regs[instr_pntr++]; break; @@ -287,9 +279,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800 case LD_16: LD_16_Func(cur_instr[instr_pntr++], cur_instr[instr_pntr++], cur_instr[instr_pntr++]); break; - case LEA: - LEA_Func(cur_instr[instr_pntr++], cur_instr[instr_pntr++]); - break; case IDX_OP_BLD: Index_Op_Builder(); break; @@ -317,7 +306,7 @@ namespace BizHawk.Emulation.Common.Components.MC6800 CLR_Func(cur_instr[instr_pntr++]); break; case SET_F_I: - FlagI = true; FlagF = true; + FlagI = true; break; case SET_I: FlagI = true; @@ -331,9 +320,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800 case ANDCC: Regs[CC] &= Regs[instr_pntr++]; break; - case ADD16BR: - ADD16BR_Func(cur_instr[instr_pntr++], cur_instr[instr_pntr++]); - break; case ADD8BR: ADD8BR_Func(cur_instr[instr_pntr++], cur_instr[instr_pntr++]); break; @@ -361,18 +347,9 @@ namespace BizHawk.Emulation.Common.Components.MC6800 case DEC16: DEC16_Func(cur_instr[instr_pntr++]); break; - case SUB16: - SUB16_Func(cur_instr[instr_pntr++]); - break; - case ADD16: - ADD16_Func(cur_instr[instr_pntr++]); - break; case CMP16: CMP16_Func(cur_instr[instr_pntr++], cur_instr[instr_pntr++]); break; - case CMP16D: - CMP16D_Func(cur_instr[instr_pntr++]); - break; case DEC8: DEC8_Func(cur_instr[instr_pntr++]); break; @@ -501,19 +478,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800 if (TraceCallback != null) { TraceCallback(new TraceInfo { Disassembly = "====CWAI NMI====", RegisterInfo = "" }); } } - else if (FIRQPending && !FlagF) - { - FIRQPending = false; - - Regs[ADDR] = 0xFFF6; - PopulateCURINSTR(RD_INC, ALU, ADDR, - RD_INC, ALU2, ADDR, - SET_ADDR, PC, ALU, ALU2); - irq_pntr = -1; - IRQS = 3; - - if (TraceCallback != null) { TraceCallback(new TraceInfo { Disassembly = "====CWAI FIRQ====", RegisterInfo = "" }); } - } else if (IRQPending && !FlagI) { IRQPending = false; @@ -557,32 +521,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800 NMICallback(); instr_pntr = irq_pntr = 0; } - // fast IRQ has next priority - else if (FIRQPending) - { - if (!FlagF) - { - FIRQPending = false; - - if (TraceCallback != null) { TraceCallback(new TraceInfo { Disassembly = "====FIRQ====", RegisterInfo = "" }); } - - IN_SYNC = false; - FIRQ_(); - FIRQCallback(); - instr_pntr = irq_pntr = 0; - } - else if (IN_SYNC) - { - FIRQPending = false; - - if (TraceCallback != null) { TraceCallback(new TraceInfo { Disassembly = "====SYNC====", RegisterInfo = "" }); } - - IN_SYNC = false; - IRQS = 1; - instr_pntr = irq_pntr = 0; - PopulateCURINSTR(IDLE); - } - } // then regular IRQ else if (IRQPending && !FlagI) { @@ -627,7 +565,7 @@ namespace BizHawk.Emulation.Common.Components.MC6800 public string TraceHeader { - get { return "MC6809: PC, machine code, mnemonic, operands, registers (A, B, X, Y, US, SP, DP, CC), Cy, flags (EFHINZVC)"; } + get { return "MC6809: PC, machine code, mnemonic, operands, registers (A, B, X, SP, CC), Cy, flags (EHINZVC)"; } } public TraceInfo State(bool disassemble = true) @@ -638,16 +576,14 @@ namespace BizHawk.Emulation.Common.Components.MC6800 { Disassembly = $"{(disassemble ? Disassemble(Regs[PC], ReadMemory, out notused) : "---")} ".PadRight(50), RegisterInfo = string.Format( - "A:{0:X2} B:{1:X2} X:{2:X4} SP:{3:X4} DP:{4:X2} CC:{5:X2} Cy:{6} {7}{8}{9}{10}{11}{12}{13}{14}", + "A:{0:X2} B:{1:X2} X:{2:X4} SP:{3:X4} CC:{4:X2} Cy:{5} {6}{7}{8}{9}{10}{11}{12}", Regs[A], Regs[B], Regs[X], Regs[SP], - Regs[DP], Regs[CC], TotalExecutedCycles, FlagE ? "E" : "e", - FlagF ? "F" : "f", FlagH ? "H" : "h", FlagI ? "I" : "i", FlagN ? "N" : "n", @@ -697,13 +633,11 @@ namespace BizHawk.Emulation.Common.Components.MC6800 ser.Sync(nameof(IN_SYNC), ref IN_SYNC); ser.Sync(nameof(NMIPending), ref NMIPending); - ser.Sync(nameof(FIRQPending), ref FIRQPending); ser.Sync(nameof(IRQPending), ref IRQPending); ser.Sync(nameof(indexed_op), ref indexed_op); ser.Sync(nameof(indexed_reg), ref indexed_reg); ser.Sync(nameof(indexed_op_reg), ref indexed_op_reg); - ser.Sync(nameof(temp), ref temp); ser.Sync(nameof(instr_pntr), ref instr_pntr); ser.Sync(nameof(cur_instr), ref cur_instr, false); diff --git a/BizHawk.Emulation.Cores/CPUs/MC6800/OP_Tables.cs b/BizHawk.Emulation.Cores/CPUs/MC6800/OP_Tables.cs index 14d448a495..33748a820f 100644 --- a/BizHawk.Emulation.Cores/CPUs/MC6800/OP_Tables.cs +++ b/BizHawk.Emulation.Cores/CPUs/MC6800/OP_Tables.cs @@ -257,7 +257,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800 RD_INC_OP, CC, SP, JPE, RD_INC, A, SP, RD_INC, B, SP, - RD_INC, DP, SP, RD_INC, ALU, SP, RD_INC_OP, ALU2, SP, SET_ADDR, X, ALU, ALU2, RD_INC, ALU, SP, @@ -293,7 +292,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800 WR_DEC_HI, SP, PC, WR_DEC_LO, SP, X, WR_DEC_HI, SP, X, - WR_DEC_LO, SP, DP, WR_DEC_LO, SP, B, WR_DEC_LO, SP, A, WR, SP, CC, @@ -314,7 +312,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800 WR_DEC_HI, SP, PC, WR_DEC_LO, SP, X, WR_DEC_HI, SP, X, - WR_DEC_LO, SP, DP, WR_DEC_LO, SP, B, WR_DEC_LO, SP, A, WR, SP, CC, diff --git a/BizHawk.Emulation.Cores/CPUs/MC6800/Operations.cs b/BizHawk.Emulation.Cores/CPUs/MC6800/Operations.cs index 4d71523b8f..8deab1a975 100644 --- a/BizHawk.Emulation.Cores/CPUs/MC6800/Operations.cs +++ b/BizHawk.Emulation.Cores/CPUs/MC6800/Operations.cs @@ -103,17 +103,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800 FlagN = Regs[dest] > 0x7FFF; } - // for LEAX/Y, zero flag can be effected, but not for U/S - public void LEA_Func(ushort dest, ushort src) - { - Regs[dest] = Regs[src]; - - if (dest == X) - { - FlagZ = Regs[dest] == 0; - } - } - public void TST_Func(ushort src) { FlagZ = Regs[src] == 0; @@ -131,13 +120,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800 FlagN = false; } - // source is considered a 16 bit signed value, used for long relative branch - // no flags used - public void ADD16BR_Func(ushort dest, ushort src) - { - Regs[dest] = (ushort)(Regs[dest] + (short)Regs[src]); - } - public void ADD8BR_Func(ushort dest, ushort src) { if (Regs[src] > 127) { Regs[src] |= 0xFF00; } @@ -261,21 +243,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800 FlagN = (Regs[src] & 0xFF) > 127; } - public void SEX_Func(ushort src) - { - if (Regs[B] > 127) - { - Regs[A] = 0xFF; - } - else - { - Regs[A] = 0; - } - - FlagZ = D == 0; - FlagN = Regs[A] > 127; - } - public void AND8_Func(ushort dest, ushort src) { Regs[dest] = (ushort)(Regs[dest] & Regs[src]); @@ -428,61 +395,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800 FlagH = false; } - // D register implied - public void SUB16_Func(ushort src) - { - int Reg16_d = D; - int Reg16_s = Regs[src]; - - Reg16_d -= Reg16_s; - - FlagC = Reg16_d.Bit(16); - FlagZ = (Reg16_d & 0xFFFF) == 0; - - ushort ans = (ushort)(Reg16_d & 0xFFFF); - - FlagN = ans > 0x7FFF; - FlagV = (D.Bit(15) != Regs[src].Bit(15)) && (D.Bit(15) != ans.Bit(15)); - - D = ans; - } - - // D register implied - public void ADD16_Func(ushort src) - { - int Reg16_d = D; - int Reg16_s = Regs[src]; - - Reg16_d += Reg16_s; - - FlagC = Reg16_d.Bit(16); - FlagZ = (Reg16_d & 0xFFFF) == 0; - - ushort ans = (ushort)(Reg16_d & 0xFFFF); - - FlagN = ans > 0x7FFF; - FlagV = (D.Bit(15) == Regs[src].Bit(15)) && (D.Bit(15) != ans.Bit(15)); - - D = ans; - } - - // D register implied - public void CMP16D_Func(ushort src) - { - int Reg16_d = D; - int Reg16_s = Regs[src]; - - Reg16_d -= Reg16_s; - - FlagC = Reg16_d.Bit(16); - FlagZ = (Reg16_d & 0xFFFF) == 0; - - ushort ans = (ushort)(Reg16_d & 0xFFFF); - - FlagN = ans > 0x7FFF; - FlagV = (D.Bit(15) != Regs[src].Bit(15)) && (D.Bit(15) != ans.Bit(15)); - } - public void CMP16_Func(ushort dest, ushort src) { int Reg16_d = Regs[dest]; diff --git a/BizHawk.Emulation.Cores/CPUs/MC6800/Registers.cs b/BizHawk.Emulation.Cores/CPUs/MC6800/Registers.cs index 9fd091d230..b79c814661 100644 --- a/BizHawk.Emulation.Cores/CPUs/MC6800/Registers.cs +++ b/BizHawk.Emulation.Cores/CPUs/MC6800/Registers.cs @@ -5,7 +5,7 @@ namespace BizHawk.Emulation.Common.Components.MC6800 public partial class MC6800 { // registers - public ushort[] Regs = new ushort[14]; + public ushort[] Regs = new ushort[11]; public const ushort PC = 0; public const ushort SP = 1; @@ -15,16 +15,9 @@ namespace BizHawk.Emulation.Common.Components.MC6800 public const ushort ADDR = 5; // internal public const ushort ALU = 6; // internal public const ushort ALU2 = 7; // internal - public const ushort DP = 8; + public const ushort DP = 8; // always zero public const ushort CC = 9; - public const ushort Dr = 10; - public const ushort IDX_EA = 11; - - public ushort D - { - get { return (ushort)(Regs[B] | (Regs[A] << 8)); } - set { Regs[B] = (ushort)(value & 0xFF); Regs[A] = (ushort)((value >> 8) & 0xFF); } - } + public const ushort IDX_EA = 10; public bool FlagC { @@ -62,12 +55,6 @@ namespace BizHawk.Emulation.Common.Components.MC6800 set { Regs[CC] = (byte)((Regs[CC] & ~0x20) | (value ? 0x20 : 0x00)); } } - public bool FlagF - { - get { return (Regs[CC] & 0x40) != 0; } - set { Regs[CC] = (byte)((Regs[CC] & ~0x40) | (value ? 0x40 : 0x00)); } - } - public bool FlagE { get { return (Regs[CC] & 0x80) != 0; }