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Z80 

Corrections and Bug Fixes
This commit is contained in:
alyosha-tas 2017-10-14 14:07:17 -04:00 committed by GitHub
parent eca4299b87
commit 4f63cadb4a
5 changed files with 28 additions and 7 deletions
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12
BizHawk.Emulation.Cores/CPUs/Z80A/Execute.cs
View File

@ -874,7 +874,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
case 0xDA: JP_COND(FlagC); break; // JP C
case 0xDB: IN_(); break; // IN A
case 0xDC: CALL_COND(FlagC); break; // CALL C
case 0xDD: JAM_(); break; // Jam (invalid)
case 0xDD: PREFIX_(IXpre); break; // IX Prefix
case 0xDE: REG_OP_IND_INC(SBC8, A, PCl, PCh); break; // SBC A, n
case 0xDF: RST_(0x18); break; // RST 0x18
case 0xE0: RET_COND(!FlagP); break; // RET Po
@ -890,7 +890,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
case 0xEA: JP_COND(FlagP); break; // JP Pe
case 0xEB: EXCH_16_(E, D, L, H); break; // ex DE, HL
case 0xEC: CALL_COND(FlagP); break; // CALL Pe
case 0xED: JAM_(); break; // Jam (invalid)
case 0xED: PREFIX_(EXTDpre); break; // EXTD Prefix
case 0xEE: REG_OP_IND_INC(XOR8, A, PCl, PCh); break; // XOR A, n
case 0xEF: RST_(0x28); break; // RST 0x28
case 0xF0: RET_COND(!FlagS); break; // RET p
@ -906,7 +906,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
case 0xFA: JP_COND(FlagS); break; // JP M
case 0xFB: EI_(); break; // EI
case 0xFC: CALL_COND(FlagS); break; // CALL M
case 0xFD: JAM_(); break; // Jam (invalid)
case 0xFD: PREFIX_(IYpre); break; // IY Prefix
case 0xFE: REG_OP_IND_INC(CP8, A, PCl, PCh); break; // CP A, n
case 0xFF: RST_(0x38); break; // RST $38
}
@ -1139,7 +1139,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
case 0xDA: JP_COND(FlagC); break; // JP C
case 0xDB: IN_(); break; // IN A
case 0xDC: CALL_COND(FlagC); break; // CALL C
case 0xDD: JAM_(); break; // Jam (invalid)
case 0xDD: PREFIX_(IXpre); break; // IX Prefix
case 0xDE: REG_OP_IND_INC(SBC8, A, PCl, PCh); break; // SBC A, n
case 0xDF: RST_(0x18); break; // RST 0x18
case 0xE0: RET_COND(!FlagP); break; // RET Po
@ -1155,7 +1155,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
case 0xEA: JP_COND(FlagP); break; // JP Pe
case 0xEB: EXCH_16_(E, D, L, H); break; // ex DE, HL
case 0xEC: CALL_COND(FlagP); break; // CALL Pe
case 0xED: JAM_(); break; // Jam (invalid)
case 0xED: PREFIX_(EXTDpre); break; // EXTD Prefix
case 0xEE: REG_OP_IND_INC(XOR8, A, PCl, PCh); break; // XOR A, n
case 0xEF: RST_(0x28); break; // RST 0x28
case 0xF0: RET_COND(!FlagS); break; // RET p
@ -1171,7 +1171,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
case 0xFA: JP_COND(FlagS); break; // JP M
case 0xFB: EI_(); break; // EI
case 0xFC: CALL_COND(FlagS); break; // CALL M
case 0xFD: JAM_(); break; // Jam (invalid)
case 0xFD: PREFIX_(IYpre); break; // IY Prefix
case 0xFE: REG_OP_IND_INC(CP8, A, PCl, PCh); break; // CP A, n
case 0xFF: RST_(0x38); break; // RST $38
}

1
BizHawk.Emulation.Cores/CPUs/Z80A/NewDisassembler.cs
View File

@ -34,6 +34,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
char sign = neg ? '-' : '+';
int val = neg ? 256 - B : B;
format = format.Replace("d", string.Format("{0}{1:X2}h", sign, val));
addr++;
}
return format;

15
BizHawk.Emulation.Cores/CPUs/Z80A/Operations.cs
View File

@ -723,5 +723,20 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
Flag5 = (temp & 0x02) != 0;
Flag3 = (temp & 0x08) != 0;
}
// set flags for LD A, I/R
public void SET_FL_IR_Func(ushort dest)
{
if (dest == A)
{
FlagN = false;
FlagH = false;
FlagZ = Regs[A] == 0;
FlagS = Regs[A] > 127;
FlagP = iff2;
Flag5 = (Regs[A] & 0x02) != 0;
Flag3 = (Regs[A] & 0x08) != 0;
}
}
}
}

2
BizHawk.Emulation.Cores/CPUs/Z80A/Tables_Direct.cs
View File

@ -103,7 +103,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
{operation, dest, src,
IDLE,
IDLE,
IDLE,
SET_FL_IR, dest,
OP };
}

5
BizHawk.Emulation.Cores/CPUs/Z80A/Z80A.cs
View File

@ -74,6 +74,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
public const ushort SET_FL_CP = 59;
public const ushort I_BIT = 60;
public const ushort HL_BIT = 61;
public const ushort SET_FL_IR = 62;
public Z80A()
@ -582,6 +583,7 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
case EI_RETI:
// NOTE: This is needed for systems using multiple interrupt sources, it triggers the next interrupt
// Not currently implemented here
iff1 = iff2;
break;
case EI_RETN:
iff1 = iff2;
@ -610,6 +612,9 @@ namespace BizHawk.Emulation.Cores.Components.Z80A
case SET_FL_CP:
SET_FL_CP_Func();
break;
case SET_FL_IR:
SET_FL_IR_Func(cur_instr[instr_pntr++]);
break;
}
totalExecutedCycles++;
}