Atari 2600 - some formatting and clean up of mapper classes

This commit is contained in:
adelikat 2014-04-03 19:58:47 +00:00
parent 12cdedf299
commit 4c13ff6731
16 changed files with 454 additions and 365 deletions

View File

@ -22,24 +22,24 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
*/
internal class m3E : MapperBase
{
int lowbank_2k;
int rambank_1k;
bool hasRam;
ByteBuffer ram = new ByteBuffer(262144); //Up to 256k
private int _lowbank_2K;
private int _rambank_1K;
private bool _hasRam;
private ByteBuffer _ram = new ByteBuffer(262144); // Up to 256k
public override void SyncState(Serializer ser)
{
base.SyncState(ser);
ser.Sync("lowbank_2k", ref lowbank_2k);
ser.Sync("rambank_1k", ref rambank_1k);
ser.Sync("cart_ram", ref ram);
ser.Sync("hasRam", ref hasRam);
ser.Sync("lowbank_2k", ref _lowbank_2K);
ser.Sync("rambank_1k", ref _rambank_1K);
ser.Sync("cart_ram", ref _ram);
ser.Sync("hasRam", ref _hasRam);
}
public override void Dispose()
{
base.Dispose();
ram.Dispose();
_ram.Dispose();
}
public override byte ReadMemory(ushort addr)
@ -48,30 +48,27 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
{
return base.ReadMemory(addr);
}
else if (addr < 0x17FF) //Low 2k Bank
if (addr < 0x17FF) // Low 2k Bank
{
if (hasRam)
if (_hasRam)
{
if (addr < 0x13FF)
{
return ram[(addr & 0x03FF) + (rambank_1k << 10)];
}
else
{
return ram[(addr & 0x03FF) + (rambank_1k << 10)] = 0xFF; //Reading from the write port triggers an unwanted write
return _ram[(addr & 0x03FF) + (_rambank_1K << 10)];
}
return _ram[(addr & 0x03FF) + (_rambank_1K << 10)] = 0xFF; // Reading from the write port triggers an unwanted write
}
else
{
int a = addr & 0x07FF; //2K
int bank = lowbank_2k << 11;
return core.rom[bank + a];
}
return core.rom[(_lowbank_2K << 11) + (addr & 0x07FF)];
}
else if (addr < 0x2000) //High bank fixed to last 2k of ROM
if (addr < 0x2000) // High bank fixed to last 2k of ROM
{
return core.rom[(core.rom.Length - 2048) + (addr & 0x07FF)];
}
return base.ReadMemory(addr);
}
@ -81,30 +78,27 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
{
return base.ReadMemory(addr);
}
else if (addr < 0x17FF) //Low 2k Bank
if (addr < 0x17FF) // Low 2k Bank
{
if (hasRam)
if (_hasRam)
{
if (addr < 0x13FF)
{
return ram[(addr & 0x03FF) + (rambank_1k << 10)];
}
else
{
return ram[(addr & 0x03FF) + (rambank_1k << 10)]; //Reading from the write port triggers an unwanted write
return _ram[(addr & 0x03FF) + (_rambank_1K << 10)];
}
return _ram[(addr & 0x03FF) + (_rambank_1K << 10)]; // Reading from the write port triggers an unwanted write
}
else
{
int a = addr & 0x07FF; //2K
int bank = lowbank_2k << 11;
return core.rom[bank + a];
}
return core.rom[(_lowbank_2K << 11) + (addr & 0x07FF)];
}
else if (addr < 0x2000) //High bank fixed to last 2k of ROM
if (addr < 0x2000) // High bank fixed to last 2k of ROM
{
return core.rom[(core.rom.Length - 2048) + (addr & 0x07FF)];
}
return base.ReadMemory(addr);
}
@ -114,19 +108,19 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
{
if (addr == 0x003E)
{
hasRam = true;
rambank_1k = value;
_hasRam = true;
_rambank_1K = value;
}
else if (addr == 0x003F)
{
hasRam = false;
_hasRam = false;
if ((value << 11) < core.rom.Length)
{
lowbank_2k = value;
_lowbank_2K = value;
}
else
{
lowbank_2k = value & (core.rom.Length >> 11);
_lowbank_2K = value & (core.rom.Length >> 11);
}
}
@ -134,11 +128,11 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
}
else if (addr < 0x1400)
{
//Writing to the read port, for shame!
// Writing to the read port, for shame!
}
else if (addr < 0x1800) //Write port
else if (addr < 0x1800) // Write port
{
ram[(rambank_1k << 10) + (addr & 0x3FF)] = value;
_ram[(_rambank_1K << 10) + (addr & 0x3FF)] = value;
}
}
}

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@ -23,12 +23,12 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
internal class m3F : MapperBase
{
int lowbank_2k;
private int _lowbank_2K;
public override void SyncState(Serializer ser)
{
base.SyncState(ser);
ser.Sync("lowbank_2k", ref lowbank_2k);
ser.Sync("lowbank_2k", ref _lowbank_2K);
}
public override byte ReadMemory(ushort addr)
@ -37,16 +37,17 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
{
return base.ReadMemory(addr);
}
else if (addr < 0x17FF) //Low 2k Bank
if (addr < 0x17FF) // Low 2k Bank
{
int a = addr & 0x07FF; //2K
int bank = lowbank_2k << 11;
return core.rom[bank + a];
return core.rom[(_lowbank_2K << 11) + (addr & 0x07FF)];
}
else if (addr < 0x2000) //High bank fixed to last 2k of ROM
if (addr < 0x2000) // High bank fixed to last 2k of ROM
{
return core.rom[(core.rom.Length - 2048) + (addr & 0x07FF)];
}
return base.ReadMemory(addr);
}
@ -61,13 +62,14 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
{
if ((value << 11) < core.rom.Length)
{
lowbank_2k = value;
_lowbank_2K = value;
}
else
{
lowbank_2k = value & (core.rom.Length >> 11);
_lowbank_2K = value & (core.rom.Length >> 11);
}
}
base.WriteMemory(addr, value);
}
}

View File

@ -29,23 +29,18 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
internal class m4A50 : MapperBase
{
private int myLastData = 0xFF;
private int myLastAddress = 0xFFFF;
private readonly ByteBuffer _myRam = new ByteBuffer(32768);
private bool myIsRomHigh = true;
private bool myIsRomLow = true;
private bool myIsRomMiddle = true;
private int _myLastData = 0xFF;
private int _myLastAddress = 0xFFFF;
private int mySliceHigh = 0;
private int mySliceLow = 0;
private int mySliceMiddle = 0;
private bool _myIsRomHigh = true;
private bool _myIsRomLow = true;
private bool _myIsRomMiddle = true;
private ByteBuffer myRAM = new ByteBuffer(32768);
public override byte PeekMemory(ushort addr)
{
return base.PeekMemory(addr); //TODO
}
private int _mySliceHigh;
private int _mySliceLow;
private int _mySliceMiddle;
public override byte ReadMemory(ushort addr)
{
@ -53,178 +48,179 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
if (addr < 0x1000)
{
val = base.ReadMemory(addr);
checkBankSwitch(addr, val);
CheckBankSwitch(addr, val);
}
else
{
if ((addr & 0x1800) == 0x1000) // 2K region from 0x1000 - 0x17ff
{
val = myIsRomLow ? core.rom[(addr & 0x7ff) + mySliceLow]
: myRAM[(addr & 0x7ff) + mySliceLow];
val = _myIsRomLow ? core.rom[(addr & 0x7ff) + _mySliceLow]
: _myRam[(addr & 0x7ff) + _mySliceLow];
}
else if (((addr & 0x1fff) >= 0x1800) && // 1.5K region from 0x1800 - 0x1dff
((addr & 0x1fff) <= 0x1dff))
{
val = myIsRomMiddle ? core.rom[(addr & 0x7ff) + mySliceMiddle]
: myRAM[(addr & 0x7ff) + mySliceMiddle];
val = _myIsRomMiddle ? core.rom[(addr & 0x7ff) + _mySliceMiddle]
: _myRam[(addr & 0x7ff) + _mySliceMiddle];
}
else if ((addr & 0x1f00) == 0x1e00) // 256B region from 0x1e00 - 0x1eff
{
val = myIsRomHigh ? core.rom[(addr & 0xff) + mySliceHigh]
: myRAM[(addr & 0xff) + mySliceHigh];
val = _myIsRomHigh ? core.rom[(addr & 0xff) + _mySliceHigh]
: _myRam[(addr & 0xff) + _mySliceHigh];
}
else if ((addr & 0x1f00) == 0x1f00) // 256B region from 0x1f00 - 0x1fff
{
val = core.rom[(addr & 0xff) + (core.rom.Length - 256)];
if (((myLastData & 0xe0) == 0x60) &&
((myLastAddress >= 0x1000) || (myLastAddress < 0x200)))
mySliceHigh = (mySliceHigh & 0xf0ff) | ((addr & 0x8) << 8) |
((addr & 0x70) << 4);
if (((_myLastData & 0xe0) == 0x60) && ((_myLastAddress >= 0x1000) ||
(_myLastAddress < 0x200)))
{
_mySliceHigh = (_mySliceHigh & 0xf0ff) | ((addr & 0x8) << 8) |
((addr & 0x70) << 4);
}
}
}
myLastData = val;
myLastAddress = addr & 0x1fff;
_myLastData = val;
_myLastAddress = addr & 0x1fff;
return val;
}
public override void WriteMemory(ushort addr, byte value)
{
if (addr < 0x1000) // Hotspots below 0x1000
if (addr < 0x1000) // Hotspots below 0x1000
{
base.WriteMemory(addr, value);
checkBankSwitch(addr, value);
CheckBankSwitch(addr, value);
}
else
{
if (addr < 0x1800) // 2K region at 0x1000 - 0x17ff
if (addr < 0x1800) // 2K region at 0x1000 - 0x17ff
{
if (!myIsRomLow)
if (!_myIsRomLow)
{
myRAM[(addr & 0x7ff) + mySliceLow] = value;
_myRam[(addr & 0x7ff) + _mySliceLow] = value;
}
}
else if (((addr & 0x1fff) >= 0x1800) && // 1.5K region at 0x1800 - 0x1dff
else if (((addr & 0x1fff) >= 0x1800) && // 1.5K region at 0x1800 - 0x1dff
((addr & 0x1fff) <= 0x1dff))
{
if (!myIsRomMiddle)
if (!_myIsRomMiddle)
{
myRAM[(addr & 0x7ff) + mySliceMiddle] = value;
_myRam[(addr & 0x7ff) + _mySliceMiddle] = value;
}
}
else if ((addr & 0x1f00) == 0x1e00) // 256B region at 0x1e00 - 0x1eff
else if ((addr & 0x1f00) == 0x1e00) // 256B region at 0x1e00 - 0x1eff
{
if (!myIsRomHigh)
if (!_myIsRomHigh)
{
myRAM[(addr & 0xff) + mySliceHigh] = value;
_myRam[(addr & 0xff) + _mySliceHigh] = value;
}
}
else if ((addr & 0x1f00) == 0x1f00) // 256B region at 0x1f00 - 0x1fff
else if ((addr & 0x1f00) == 0x1f00) // 256B region at 0x1f00 - 0x1fff
{
if (((myLastData & 0xe0) == 0x60) &&
((myLastAddress >= 0x1000) || (myLastAddress < 0x200)))
if (((_myLastData & 0xe0) == 0x60) &&
((_myLastAddress >= 0x1000) || (_myLastAddress < 0x200)))
{
mySliceHigh = (mySliceHigh & 0xf0ff) | ((addr & 0x8) << 8) |
_mySliceHigh = (_mySliceHigh & 0xf0ff) | ((addr & 0x8) << 8) |
((addr & 0x70) << 4);
}
}
}
myLastData = value;
myLastAddress = addr & 0x1fff;
_myLastData = value;
_myLastAddress = addr & 0x1fff;
}
void checkBankSwitch(ushort address, byte value)
private void CheckBankSwitch(ushort address, byte value)
{
if (((myLastData & 0xe0) == 0x60) && // Switch lower/middle/upper bank
((myLastAddress >= 0x1000) || (myLastAddress < 0x200)))
if (((_myLastData & 0xe0) == 0x60) && // Switch lower/middle/upper bank
((_myLastAddress >= 0x1000) || (_myLastAddress < 0x200)))
{
if ((address & 0x0f00) == 0x0c00) // Enable 256B of ROM at 0x1e00 - 0x1eff
if ((address & 0x0f00) == 0x0c00) // Enable 256B of ROM at 0x1e00 - 0x1eff
{
myIsRomHigh = true;
mySliceHigh = (address & 0xff) << 8;
_myIsRomHigh = true;
_mySliceHigh = (address & 0xff) << 8;
}
else if ((address & 0x0f00) == 0x0d00) // Enable 256B of RAM at 0x1e00 - 0x1eff
else if ((address & 0x0f00) == 0x0d00) // Enable 256B of RAM at 0x1e00 - 0x1eff
{
myIsRomHigh = false;
mySliceHigh = (address & 0x7f) << 8;
_myIsRomHigh = false;
_mySliceHigh = (address & 0x7f) << 8;
}
else if ((address & 0x0f40) == 0x0e00) // Enable 2K of ROM at 0x1000 - 0x17ff
else if ((address & 0x0f40) == 0x0e00) // Enable 2K of ROM at 0x1000 - 0x17ff
{
myIsRomLow = true;
mySliceLow = (address & 0x1f) << 11;
_myIsRomLow = true;
_mySliceLow = (address & 0x1f) << 11;
}
else if ((address & 0x0f40) == 0x0e40) // Enable 2K of RAM at 0x1000 - 0x17ff
else if ((address & 0x0f40) == 0x0e40) // Enable 2K of RAM at 0x1000 - 0x17ff
{
myIsRomLow = false;
mySliceLow = (address & 0xf) << 11;
_myIsRomLow = false;
_mySliceLow = (address & 0xf) << 11;
}
else if ((address & 0x0f40) == 0x0f00) // Enable 1.5K of ROM at 0x1800 - 0x1dff
else if ((address & 0x0f40) == 0x0f00) // Enable 1.5K of ROM at 0x1800 - 0x1dff
{
myIsRomMiddle = true;
mySliceMiddle = (address & 0x1f) << 11;
_myIsRomMiddle = true;
_mySliceMiddle = (address & 0x1f) << 11;
}
else if ((address & 0x0f50) == 0x0f40) // Enable 1.5K of RAM at 0x1800 - 0x1dff
{
myIsRomMiddle = false;
mySliceMiddle = (address & 0xf) << 11;
_myIsRomMiddle = false;
_mySliceMiddle = (address & 0xf) << 11;
}
else if ((address & 0x0f00) == 0x0400) // Toggle bit A11 of lower block address
else if ((address & 0x0f00) == 0x0400) // Toggle bit A11 of lower block address
{
mySliceLow = mySliceLow ^ 0x800;
_mySliceLow = _mySliceLow ^ 0x800;
}
else if ((address & 0x0f00) == 0x0500) // Toggle bit A12 of lower block address
else if ((address & 0x0f00) == 0x0500) // Toggle bit A12 of lower block address
{
mySliceLow = mySliceLow ^ 0x1000;
_mySliceLow = _mySliceLow ^ 0x1000;
}
else if ((address & 0x0f00) == 0x0800) // Toggle bit A11 of middle block address
else if ((address & 0x0f00) == 0x0800) // Toggle bit A11 of middle block address
{
mySliceMiddle = mySliceMiddle ^ 0x800;
_mySliceMiddle = _mySliceMiddle ^ 0x800;
}
else if ((address & 0x0f00) == 0x0900) // Toggle bit A12 of middle block address
else if ((address & 0x0f00) == 0x0900) // Toggle bit A12 of middle block address
{
mySliceMiddle = mySliceMiddle ^ 0x1000;
_mySliceMiddle = _mySliceMiddle ^ 0x1000;
}
// Zero-page hotspots for upper page
// 0xf4, 0xf6, 0xfc, 0xfe for ROM
// 0xf5, 0xf7, 0xfd, 0xff for RAM
// 0x74 - 0x7f (0x80 bytes lower)
if ((address & 0xf75) == 0x74) // Enable 256B of ROM at 0x1e00 - 0x1eff
// 0xf4, 0xf6, 0xfc, 0xfe for ROM
// 0xf5, 0xf7, 0xfd, 0xff for RAM
// 0x74 - 0x7f (0x80 bytes lower)
if ((address & 0xf75) == 0x74) // Enable 256B of ROM at 0x1e00 - 0x1eff
{
myIsRomHigh = true;
mySliceHigh = value << 8;
_myIsRomHigh = true;
_mySliceHigh = value << 8;
}
else if ((address & 0xf75) == 0x75) // Enable 256B of RAM at 0x1e00 - 0x1eff
else if ((address & 0xf75) == 0x75) // Enable 256B of RAM at 0x1e00 - 0x1eff
{
myIsRomHigh = false;
mySliceHigh = (value & 0x7f) << 8;
_myIsRomHigh = false;
_mySliceHigh = (value & 0x7f) << 8;
}
// Zero-page hotspots for lower and middle blocks
// 0xf8, 0xf9, 0xfa, 0xfb
// 0x78, 0x79, 0x7a, 0x7b (0x80 bytes lower)
// 0xf8, 0xf9, 0xfa, 0xfb
// 0x78, 0x79, 0x7a, 0x7b (0x80 bytes lower)
else if ((address & 0xf7c) == 0x78)
{
if ((value & 0xf0) == 0) // Enable 2K of ROM at 0x1000 - 0x17ff
if ((value & 0xf0) == 0) // Enable 2K of ROM at 0x1000 - 0x17ff
{
myIsRomLow = true;
mySliceLow = (value & 0xf) << 11;
_myIsRomLow = true;
_mySliceLow = (value & 0xf) << 11;
}
else if ((value & 0xf0) == 0x40) // Enable 2K of RAM at 0x1000 - 0x17ff
else if ((value & 0xf0) == 0x40) // Enable 2K of RAM at 0x1000 - 0x17ff
{
myIsRomLow = false;
mySliceLow = (value & 0xf) << 11;
_myIsRomLow = false;
_mySliceLow = (value & 0xf) << 11;
}
else if ((value & 0xf0) == 0x90) // Enable 1.5K of ROM at 0x1800 - 0x1dff
else if ((value & 0xf0) == 0x90) // Enable 1.5K of ROM at 0x1800 - 0x1dff
{
myIsRomMiddle = true;
mySliceMiddle = ((value & 0xf) | 0x10) << 11;
_myIsRomMiddle = true;
_mySliceMiddle = ((value & 0xf) | 0x10) << 11;
}
else if ((value & 0xf0) == 0xc0) // Enable 1.5K of RAM at 0x1800 - 0x1dff
else if ((value & 0xf0) == 0xc0) // Enable 1.5K of RAM at 0x1800 - 0x1dff
{
myIsRomMiddle = false;
mySliceMiddle = (value & 0xf) << 11;
_myIsRomMiddle = false;
_mySliceMiddle = (value & 0xf) << 11;
}
}
}

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@ -4,7 +4,11 @@
{
public override byte ReadMemory(ushort addr)
{
if (addr < 0x1000) return base.ReadMemory(addr);
if (addr < 0x1000)
{
return base.ReadMemory(addr);
}
return core.rom[addr & 0xFFF];
}

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@ -18,17 +18,26 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
internal class mCV: MapperBase
{
ByteBuffer aux_ram = new ByteBuffer(1024);
private ByteBuffer _auxRam = new ByteBuffer(1024);
public override byte ReadMemory(ushort addr)
{
if (addr < 0x1000)
{
return base.ReadMemory(addr);
else if (addr < 0x1400)
return aux_ram[(addr & 0x3FF)];
else if (addr >= 0x1800 && addr < 0x2000)
}
if (addr < 0x1400)
{
return _auxRam[(addr & 0x3FF)];
}
if (addr >= 0x1800 && addr < 0x2000)
{
return core.rom[(addr & 0x7FF)];
else return base.ReadMemory(addr);
}
return base.ReadMemory(addr);
}
public override byte PeekMemory(ushort addr)
@ -39,15 +48,19 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
public override void WriteMemory(ushort addr, byte value)
{
if (addr < 0x1000)
{
base.WriteMemory(addr, value);
}
else if (addr >= 0x1400 && addr < 0x1800)
aux_ram[(addr & 0x3FF)] = value;
{
_auxRam[(addr & 0x3FF)] = value;
}
}
public override void SyncState(Serializer ser)
{
base.SyncState(ser);
ser.Sync("aux_ram", ref aux_ram);
ser.Sync("aux_ram", ref _auxRam);
}
}
}

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@ -224,19 +224,19 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
*/
internal class mDPC : MapperBase
{
private ulong totalCycles = 0;
private ulong elapsedCycles = 0;
private ulong totalCycles;
private ulong elapsedCycles;
private double FractionalClocks;
private int bank_4k = 0;
private int bank_4k;
private IntBuffer Counters = new IntBuffer(8);
private ByteBuffer Flags = new ByteBuffer(8);
private IntBuffer Tops = new IntBuffer(8);
private IntBuffer Bottoms = new IntBuffer(8);
private ByteBuffer DisplayBank_2k = new ByteBuffer(2048);
private byte RandomNumber = 0;
private byte RandomNumber;
private bool[] MusicMode = new bool[3]; //TOOD: savestates
private bool[] MusicMode = new bool[3]; // TODO: savestates
public override byte PeekMemory(ushort addr)
{
@ -279,31 +279,34 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
{
result = RandomNumber;
}
else //it's a music read
else // it's a music read
{
byte[] MusicAmplitudes = {
0x00, 0x04, 0x05, 0x09, 0x06, 0x0a, 0x0b, 0x0f
};
//// Update the music data fetchers (counter & flag)
// Update the music data fetchers (counter & flag)
UpdateMusicModeDataFetchers();
byte i = 0;
if(MusicMode[0] && Flags[5] > 0)
if (MusicMode[0] && Flags[5] > 0)
{
i |= 0x01;
}
if(MusicMode[1] && Flags[6] > 0)
if (MusicMode[1] && Flags[6] > 0)
{
i |= 0x02;
}
if(MusicMode[2] && Flags[7] > 0)
if (MusicMode[2] && Flags[7] > 0)
{
i |= 0x04;
}
result = MusicAmplitudes[i];
}
break;
case 0x01:
result = DisplayBank_2k[2047 - Counters[index]];
@ -324,11 +327,9 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
return result;
}
else
{
Address(addr);
return core.rom[(bank_4k << 12) + addr];
}
Address(addr);
return core.rom[(bank_4k << 12) + addr];
}
public override void WriteMemory(ushort addr, byte value)
@ -374,12 +375,13 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
// Execute special code for music mode data fetchers
if (index >= 5)
{
MusicMode[index - 5] = (value & 0x10) > 0 ? true : false;
MusicMode[index - 5] = (value & 0x10) > 0;
// NOTE: We are not handling the clock source input for
// the music mode data fetchers. We're going to assume
// they always use the OSC input.
}
break;
case 0x06: // Random Number Generator Reset
RandomNumber = 1;
@ -390,6 +392,7 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
{
Address(addr);
}
return;
}
@ -415,7 +418,7 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
public override void SyncState(Serializer ser)
{
//TODO
// TODO
base.SyncState(ser);
ser.Sync("bank_4k", ref bank_4k);
ser.Sync("DisplayBank_2k", ref DisplayBank_2k);
@ -424,7 +427,6 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
ser.Sync("RandomNumber", ref RandomNumber);
}
private void UpdateMusicModeDataFetchers()
{
// Calculate the number of cycles since the last update
@ -485,7 +487,8 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
{
// Table for computing the input bit of the random number generator's
// shift register (it's the NOT of the EOR of four bits)
byte[] f = {
byte[] f =
{
1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
};

View File

@ -25,9 +25,9 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
internal class mE0 : MapperBase
{
int toggle1;
int toggle2;
int toggle3;
private int _toggle1;
private int _toggle2;
private int _toggle3;
private byte ReadMem(ushort addr, bool peek)
{
@ -36,12 +36,27 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
Address(addr);
}
if (addr < 0x1000) return base.ReadMemory(addr);
else if (addr < 0x1400) return core.rom[(toggle1 << 10) + (addr & 0x3FF)];
else if (addr < 0x1800) return core.rom[(toggle2 << 10) + (addr & 0x3FF)];
else if (addr < 0x1C00) return core.rom[(toggle3 << 10) + (addr & 0x3FF)];
else
return core.rom[7 * 1024 + (addr & 0x3FF)]; //7 because final bank is always set to last
if (addr < 0x1000)
{
return base.ReadMemory(addr);
}
if (addr < 0x1400)
{
return core.rom[(_toggle1 << 10) + (addr & 0x3FF)];
}
if (addr < 0x1800)
{
return core.rom[(_toggle2 << 10) + (addr & 0x3FF)];
}
if (addr < 0x1C00)
{
return core.rom[(_toggle3 << 10) + (addr & 0x3FF)];
}
return core.rom[(7 * 1024) + (addr & 0x3FF)]; // 7 because final bank is always set to last
}
public override byte ReadMemory(ushort addr)
@ -57,94 +72,97 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
public override void WriteMemory(ushort addr, byte value)
{
Address(addr);
if (addr < 0x1000) base.WriteMemory(addr, value);
if (addr < 0x1000)
{
base.WriteMemory(addr, value);
}
}
public override void SyncState(Serializer ser)
{
base.SyncState(ser);
ser.Sync("toggle1", ref toggle1);
ser.Sync("toggle2", ref toggle2);
ser.Sync("toggle3", ref toggle3);
ser.Sync("toggle1", ref _toggle1);
ser.Sync("toggle2", ref _toggle2);
ser.Sync("toggle3", ref _toggle3);
}
void Address(ushort addr)
private void Address(ushort addr)
{
switch (addr)
{
case 0x1FE0:
toggle1 = 0;
_toggle1 = 0;
break;
case 0x1FE1:
toggle1 = 1;
_toggle1 = 1;
break;
case 0x1FE2:
toggle1 = 2;
_toggle1 = 2;
break;
case 0x1FE3:
toggle1 = 3;
_toggle1 = 3;
break;
case 0x1FE4:
toggle1 = 4;
_toggle1 = 4;
break;
case 0x1FE5:
toggle1 = 5;
_toggle1 = 5;
break;
case 0x1FE6:
toggle1 = 6;
_toggle1 = 6;
break;
case 0x1FE7:
toggle1 = 7;
_toggle1 = 7;
break;
case 0x1FE8:
toggle2 = 0;
_toggle2 = 0;
break;
case 0x1FE9:
toggle2 = 1;
_toggle2 = 1;
break;
case 0x1FEA:
toggle2 = 2;
_toggle2 = 2;
break;
case 0x1FEB:
toggle2 = 3;
_toggle2 = 3;
break;
case 0x1FEC:
toggle2 = 4;
_toggle2 = 4;
break;
case 0x1FED:
toggle2 = 5;
_toggle2 = 5;
break;
case 0x1FEE:
toggle2 = 6;
_toggle2 = 6;
break;
case 0x1FEF:
toggle2 = 7;
_toggle2 = 7;
break;
case 0x1FF0:
toggle3 = 0;
_toggle3 = 0;
break;
case 0x1FF1:
toggle3 = 1;
_toggle3 = 1;
break;
case 0x1FF2:
toggle3 = 2;
_toggle3 = 2;
break;
case 0x1FF3:
toggle3 = 3;
_toggle3 = 3;
break;
case 0x1FF4:
toggle3 = 4;
_toggle3 = 4;
break;
case 0x1FF5:
toggle3 = 5;
_toggle3 = 5;
break;
case 0x1FF6:
toggle3 = 6;
_toggle3 = 6;
break;
case 0x1FF7:
toggle3 = 7;
_toggle3 = 7;
break;
}
}

View File

@ -29,11 +29,11 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
internal class mE7 : MapperBase
{
private int rombank_1k;
private int rambank1_toggle;
private ByteBuffer rambank0 = new ByteBuffer(1024);
private ByteBuffer rambank1 = new ByteBuffer(1024);
private bool EnableRam0;
private int _rombank_1K;
private int _rambank1Toggle;
private ByteBuffer _rambank0 = new ByteBuffer(1024);
private ByteBuffer _rambank1 = new ByteBuffer(1024);
private bool _enableRam0;
private byte ReadMem(ushort addr, bool peek)
{
@ -49,41 +49,38 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
if (addr < 0x1800)
{
if (EnableRam0)
if (_enableRam0)
{
if (addr < 0x1400) //Reading from the write port
if (addr < 0x1400) // Reading from the write port
{
return rambank0[addr & 0x3FF] = 0xFF; //Reading from 1k write port triggers an unwanted write
}
else
{
return rambank0[addr & 0x3FF];
return _rambank0[addr & 0x3FF] = 0xFF; // Reading from 1k write port triggers an unwanted write
}
return _rambank0[addr & 0x3FF];
}
else
{
return core.rom[(rombank_1k * 0x800) + (addr & 0x7FF)];
}
return core.rom[(_rombank_1K * 0x800) + (addr & 0x7FF)];
}
else if (addr < 0x1900) //Ram 1 Read port
if (addr < 0x1900) // Ram 1 Read port
{
return rambank1[(rambank1_toggle * 0x100) + (addr & 0xFF)];
return _rambank1[(_rambank1Toggle * 0x100) + (addr & 0xFF)];
}
else if (addr < 0x1A00) //Ram 1 Write port
if (addr < 0x1A00) // Ram 1 Write port
{
return rambank1[(rambank1_toggle * 0x100) + (addr & 0xFF)] = 0xFF; //Reading from the 256b write port @1800 riggers an unwanted write
return _rambank1[(_rambank1Toggle * 0x100) + (addr & 0xFF)] = 0xFF; // Reading from the 256b write port @1800 riggers an unwanted write
}
else if (addr < 0x2000)
if (addr < 0x2000)
{
addr -= 0x1800;
addr &= 0x7FF;
int offset = core.rom.Length - 0x0800;
return core.rom[offset + addr]; //Fixed to last 1.5K
}
else
{
return base.ReadMemory(addr);
return core.rom[offset + addr]; // Fixed to last 1.5K
}
return base.ReadMemory(addr);
}
public override byte ReadMemory(ushort addr)
@ -105,63 +102,63 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
}
else if (addr < 0x1400)
{
rambank0[addr & 0x3FF] = value;
_rambank0[addr & 0x3FF] = value;
}
else if (addr >= 0x1800 && addr < 0x2000)
{
rambank1[(addr & 0xFF) + (rambank1_toggle * 0x100)] = value;
_rambank1[(addr & 0xFF) + (_rambank1Toggle * 0x100)] = value;
}
}
public override void SyncState(Serializer ser)
{
base.SyncState(ser);
ser.Sync("toggle", ref rombank_1k);
ser.Sync("rambank0", ref rambank0);
ser.Sync("rambank1", ref rambank1);
ser.Sync("EnableRam0", ref EnableRam0);
ser.Sync("rambank1_toggle", ref rambank1_toggle);
ser.Sync("toggle", ref _rombank_1K);
ser.Sync("rambank0", ref _rambank0);
ser.Sync("rambank1", ref _rambank1);
ser.Sync("EnableRam0", ref _enableRam0);
ser.Sync("rambank1_toggle", ref _rambank1Toggle);
}
void Address(ushort addr)
private void Address(ushort addr)
{
switch (addr)
{
case 0x1FE0:
rombank_1k = 0;
_rombank_1K = 0;
break;
case 0x1FE1:
rombank_1k = 1;
_rombank_1K = 1;
break;
case 0x1FE2:
rombank_1k = 2;
_rombank_1K = 2;
break;
case 0x1FE3:
rombank_1k = 3;
_rombank_1K = 3;
break;
case 0x1FE4:
rombank_1k = 4;
_rombank_1K = 4;
break;
case 0x1FE5:
rombank_1k = 5;
_rombank_1K = 5;
break;
case 0x1FE6:
rombank_1k = 6;
_rombank_1K = 6;
break;
case 0x1FE7:
EnableRam0 = true;
_enableRam0 = true;
break;
case 0x1FE8:
rambank1_toggle = 0;
_rambank1Toggle = 0;
break;
case 0x1FE9:
rambank1_toggle = 1;
_rambank1Toggle = 1;
break;
case 0x1FEA:
rambank1_toggle = 2;
_rambank1Toggle = 2;
break;
case 0x1FEB:
rambank1_toggle = 3;
_rambank1Toggle = 3;
break;
}
}

View File

@ -14,7 +14,7 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
internal class mEF : MapperBase
{
private int toggle;
private int _toggle;
private byte ReadMem(ushort addr, bool peek)
{
@ -23,8 +23,12 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
Address(addr);
}
if (addr < 0x1000) return base.ReadMemory(addr);
return core.rom[(toggle << 12) + (addr & 0xFFF)];
if (addr < 0x1000)
{
return base.ReadMemory(addr);
}
return core.rom[(_toggle << 12) + (addr & 0xFFF)];
}
public override byte ReadMemory(ushort addr)
@ -40,33 +44,36 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
public override void WriteMemory(ushort addr, byte value)
{
Address(addr);
if (addr < 0x1000) base.WriteMemory(addr, value);
if (addr < 0x1000)
{
base.WriteMemory(addr, value);
}
}
public override void SyncState(Serializer ser)
{
base.SyncState(ser);
ser.Sync("toggle", ref toggle);
ser.Sync("toggle", ref _toggle);
}
void Address(ushort addr)
private void Address(ushort addr)
{
if (addr == 0x1FE0) toggle = 0;
if (addr == 0x1FE1) toggle = 1;
if (addr == 0x1FE2) toggle = 2;
if (addr == 0x1FE3) toggle = 3;
if (addr == 0x1FE4) toggle = 4;
if (addr == 0x1FE5) toggle = 5;
if (addr == 0x1FE6) toggle = 6;
if (addr == 0x1FE7) toggle = 7;
if (addr == 0x1FE8) toggle = 8;
if (addr == 0x1FE9) toggle = 9;
if (addr == 0x1FEA) toggle = 10;
if (addr == 0x1FEB) toggle = 11;
if (addr == 0x1FEC) toggle = 12;
if (addr == 0x1FED) toggle = 13;
if (addr == 0x1FEE) toggle = 14;
if (addr == 0x1FEF) toggle = 15;
if (addr == 0x1FE0) _toggle = 0;
if (addr == 0x1FE1) _toggle = 1;
if (addr == 0x1FE2) _toggle = 2;
if (addr == 0x1FE3) _toggle = 3;
if (addr == 0x1FE4) _toggle = 4;
if (addr == 0x1FE5) _toggle = 5;
if (addr == 0x1FE6) _toggle = 6;
if (addr == 0x1FE7) _toggle = 7;
if (addr == 0x1FE8) _toggle = 8;
if (addr == 0x1FE9) _toggle = 9;
if (addr == 0x1FEA) _toggle = 10;
if (addr == 0x1FEB) _toggle = 11;
if (addr == 0x1FEC) _toggle = 12;
if (addr == 0x1FED) _toggle = 13;
if (addr == 0x1FEE) _toggle = 14;
if (addr == 0x1FEF) _toggle = 15;
}
}
}

View File

@ -20,18 +20,24 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
internal class mF0 : MapperBase
{
int bank;
private int _bank;
private byte ReadMem(ushort addr, bool peek)
{
if (!peek)
{
if (addr == 0x1FF0)
{
Increment();
}
}
if (addr < 0x1000) return base.ReadMemory(addr);
else return core.rom[(bank << 12) + (addr & 0xFFF)];
if (addr < 0x1000)
{
return base.ReadMemory(addr);
}
return core.rom[(_bank << 12) + (addr & 0xFFF)];
}
public override byte ReadMemory(ushort addr)
@ -46,21 +52,26 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
public override void WriteMemory(ushort addr, byte value)
{
if (addr < 0x1000) base.WriteMemory(addr, value);
if (addr < 0x1000)
{
base.WriteMemory(addr, value);
}
else if (addr == 0x1ff0)
{
Increment();
}
}
public override void SyncState(Serializer ser)
{
base.SyncState(ser);
ser.Sync("bank", ref bank);
ser.Sync("bank", ref _bank);
}
void Increment()
private void Increment()
{
bank++;
bank &= 0x0F;
_bank++;
_bank &= 0x0F;
}
}
}

View File

@ -12,7 +12,7 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
internal class mF4 :MapperBase
{
int toggle;
private int _toggle;
private byte ReadMem(ushort addr, bool peek)
{
@ -21,8 +21,12 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
Address(addr);
}
if (addr < 0x1000) return base.ReadMemory(addr);
return core.rom[(toggle << 12) + (addr & 0xFFF)];
if (addr < 0x1000)
{
return base.ReadMemory(addr);
}
return core.rom[(_toggle << 12) + (addr & 0xFFF)];
}
public override byte ReadMemory(ushort addr)
@ -38,26 +42,29 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
public override void WriteMemory(ushort addr, byte value)
{
Address(addr);
if (addr < 0x1000) base.WriteMemory(addr, value);
if (addr < 0x1000)
{
base.WriteMemory(addr, value);
}
}
public override void SyncState(Serializer ser)
{
base.SyncState(ser);
ser.Sync("toggle", ref toggle);
ser.Sync("toggle", ref _toggle);
}
void Address(ushort addr)
private void Address(ushort addr)
{
if (addr == 0x1FF4) toggle = 0;
if (addr == 0x1FF5) toggle = 1;
if (addr == 0x1FF6) toggle = 2;
if (addr == 0x1FF7) toggle = 3;
if (addr == 0x1FF8) toggle = 4;
if (addr == 0x1FF9) toggle = 5;
if (addr == 0x1FF9) toggle = 5;
if (addr == 0x1FFA) toggle = 6;
if (addr == 0x1FFB) toggle = 7;
if (addr == 0x1FF4) _toggle = 0;
if (addr == 0x1FF5) _toggle = 1;
if (addr == 0x1FF6) _toggle = 2;
if (addr == 0x1FF7) _toggle = 3;
if (addr == 0x1FF8) _toggle = 4;
if (addr == 0x1FF9) _toggle = 5;
if (addr == 0x1FF9) _toggle = 5;
if (addr == 0x1FFA) _toggle = 6;
if (addr == 0x1FFB) _toggle = 7;
}
}
}

View File

@ -13,7 +13,7 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
internal class mF6 : MapperBase
{
int toggle;
private int _toggle;
private byte ReadMem(ushort addr, bool peek)
{
@ -22,8 +22,12 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
Address(addr);
}
if (addr < 0x1000) return base.ReadMemory(addr);
return core.rom[(toggle << 12) + (addr & 0xFFF)];
if (addr < 0x1000)
{
return base.ReadMemory(addr);
}
return core.rom[(_toggle << 12) + (addr & 0xFFF)];
}
public override byte ReadMemory(ushort addr)
@ -39,21 +43,24 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
public override void WriteMemory(ushort addr, byte value)
{
Address(addr);
if (addr < 0x1000) base.WriteMemory(addr, value);
if (addr < 0x1000)
{
base.WriteMemory(addr, value);
}
}
public override void SyncState(Serializer ser)
{
base.SyncState(ser);
ser.Sync("toggle", ref toggle);
ser.Sync("toggle", ref _toggle);
}
void Address(ushort addr)
private void Address(ushort addr)
{
if (addr == 0x1FF6) toggle = 0;
if (addr == 0x1FF7) toggle = 1;
if (addr == 0x1FF8) toggle = 2;
if (addr == 0x1FF9) toggle = 3;
if (addr == 0x1FF6) _toggle = 0;
if (addr == 0x1FF7) _toggle = 1;
if (addr == 0x1FF8) _toggle = 2;
if (addr == 0x1FF9) _toggle = 3;
}
}
}

View File

@ -21,7 +21,7 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
internal class mF8 : MapperBase
{
int bank_4k;
private int _bank_4K;
private byte ReadMem(ushort addr, bool peek)
{
@ -30,8 +30,12 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
Address(addr);
}
if (addr < 0x1000) return base.ReadMemory(addr);
return core.rom[(bank_4k << 12) + (addr & 0xFFF)];
if (addr < 0x1000)
{
return base.ReadMemory(addr);
}
return core.rom[(_bank_4K << 12) + (addr & 0xFFF)];
}
public override byte ReadMemory(ushort addr)
@ -47,20 +51,28 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
public override void WriteMemory(ushort addr, byte value)
{
Address(addr);
if (addr < 0x1000) base.WriteMemory(addr, value);
if (addr < 0x1000)
{
base.WriteMemory(addr, value);
}
}
public override void SyncState(Serializer ser)
{
base.SyncState(ser);
ser.Sync("bank_4k", ref bank_4k);
ser.Sync("bank_4k", ref _bank_4K);
}
void Address(ushort addr)
private void Address(ushort addr)
{
if (addr == 0x1FF8) bank_4k = 0;
else if (addr == 0x1FF9) bank_4k = 1;
if (addr == 0x1FF8)
{
_bank_4K = 0;
}
else if (addr == 0x1FF9)
{
_bank_4K = 1;
}
}
}
}

View File

@ -6,7 +6,7 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
FA (RAM Plus)
-----
CBS Thought they'd throw a few tricks of their own at the 2600 with this. It's got
CBS Thought they'd throw a few tricks of their own at the 2600 with It's got
12K of ROM and 256 bytes of RAM.
This works similar to F8, except there's only 3 4K ROM banks. The banks are selected by
@ -16,8 +16,8 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
internal class mFA : MapperBase
{
int toggle;
ByteBuffer aux_ram = new ByteBuffer(256);
private int _toggle;
private ByteBuffer _auxRam = new ByteBuffer(256);
private byte ReadMem(ushort addr, bool peek)
{
@ -30,18 +30,18 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
{
return base.ReadMemory(addr);
}
else if (addr < 0x1100)
if (addr < 0x1100)
{
return 0xFF;
}
else if (addr < 0x1200)
if (addr < 0x1200)
{
return aux_ram[addr & 0xFF];
}
else
{
return core.rom[(toggle << 12) + (addr & 0xFFF)];
return _auxRam[addr & 0xFF];
}
return core.rom[(_toggle << 12) + (addr & 0xFFF)];
}
public override byte ReadMemory(ushort addr)
@ -57,24 +57,28 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
public override void WriteMemory(ushort addr, byte value)
{
Address(addr);
if (addr < 0x1000)
if (addr < 0x1000)
{
base.WriteMemory(addr, value);
else if (addr < 0x1100)
aux_ram[addr & 0xFF] = value;
}
else if (addr < 0x1100)
{
_auxRam[addr & 0xFF] = value;
}
}
public override void SyncState(Serializer ser)
{
base.SyncState(ser);
ser.Sync("toggle", ref toggle);
ser.Sync("ram", ref aux_ram);
ser.Sync("toggle", ref _toggle);
ser.Sync("ram", ref _auxRam);
}
void Address(ushort addr)
private void Address(ushort addr)
{
if (addr == 0x1FF8) toggle = 0;
if (addr == 0x1FF9) toggle = 1;
if (addr == 0x1FFA) toggle = 2;
if (addr == 0x1FF8) _toggle = 0;
if (addr == 0x1FF9) _toggle = 1;
if (addr == 0x1FFA) _toggle = 2;
}
}
}

View File

@ -14,7 +14,7 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
internal class mUA : MapperBase
{
int toggle;
private int _toggle;
private byte ReadMem(ushort addr, bool peek)
{
@ -23,8 +23,12 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
Address(addr);
}
if (addr < 0x1000) return base.ReadMemory(addr);
return core.rom[(toggle << 12) + (addr & 0xFFF)];
if (addr < 0x1000)
{
return base.ReadMemory(addr);
}
return core.rom[(_toggle << 12) + (addr & 0xFFF)];
}
public override byte ReadMemory(ushort addr)
@ -40,19 +44,28 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
public override void WriteMemory(ushort addr, byte value)
{
Address(addr);
if (addr < 0x1000) base.WriteMemory(addr, value);
if (addr < 0x1000)
{
base.WriteMemory(addr, value);
}
}
public override void SyncState(Serializer ser)
{
base.SyncState(ser);
ser.Sync("toggle", ref toggle);
ser.Sync("toggle", ref _toggle);
}
void Address(ushort addr)
private void Address(ushort addr)
{
if (addr == 0x0220) toggle = 0;
else if (addr == 0x0240) toggle = 1;
if (addr == 0x0220)
{
_toggle = 0;
}
else if (addr == 0x0240)
{
_toggle = 1;
}
}
}
}

View File

@ -35,7 +35,7 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
internal class mX07 : MapperBase
{
int rombank_2k;
private int _rombank_2K;
private byte ReadMem(ushort addr, bool peek)
{
@ -48,10 +48,8 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
{
return base.ReadMemory(addr);
}
else
{
return core.rom[(rombank_2k << 12) + (addr & 0xFFF)];
}
return core.rom[(_rombank_2K << 12) + (addr & 0xFFF)];
}
public override byte ReadMemory(ushort addr)
@ -67,33 +65,36 @@ namespace BizHawk.Emulation.Cores.Atari.Atari2600
public override void WriteMemory(ushort addr, byte value)
{
Address(addr);
if (addr < 0x1000) base.WriteMemory(addr, value);
if (addr < 0x1000)
{
base.WriteMemory(addr, value);
}
}
public override void SyncState(Serializer ser)
{
base.SyncState(ser);
ser.Sync("rombank_2k", ref rombank_2k);
ser.Sync("rombank_2k", ref _rombank_2K);
}
void Address(ushort addr)
private void Address(ushort addr)
{
if ((addr & 0x180F) == 0x080D)
{
bank((addr & 0xF0) >> 4);
Bank((addr & 0xF0) >> 4);
}
else if ((addr & 0x1880) == 0)
{
if ((rombank_2k & 0xE) == 0xE)
if ((_rombank_2K & 0xE) == 0xE)
{
bank(((addr & 0x40) >> 6) | (rombank_2k & 0xE));
Bank(((addr & 0x40) >> 6) | (_rombank_2K & 0xE));
}
}
}
private void bank(int bank)
private void Bank(int bank)
{
rombank_2k = (bank & 0x0F);
_rombank_2K = bank & 0x0F;
}
}
}