From 3f7293587b52b839c02f427317a7ded947502ff8 Mon Sep 17 00:00:00 2001
From: adelikat <adelikat@tasvideos.org>
Date: Sat, 3 Sep 2016 12:53:46 -0400
Subject: [PATCH] NESHawk - Implement board UNIF_BMC-64in1NoRepeat

---
 .../BizHawk.Emulation.Cores.csproj            |  1 +
 .../NES/Boards/UNIF/UNIF_BMC-64in1-NR.cs      | 89 +++++++++++++++++++
 2 files changed, 90 insertions(+)
 create mode 100644 BizHawk.Emulation.Cores/Consoles/Nintendo/NES/Boards/UNIF/UNIF_BMC-64in1-NR.cs

diff --git a/BizHawk.Emulation.Cores/BizHawk.Emulation.Cores.csproj b/BizHawk.Emulation.Cores/BizHawk.Emulation.Cores.csproj
index 4106b3d0c1..e10b38108f 100644
--- a/BizHawk.Emulation.Cores/BizHawk.Emulation.Cores.csproj
+++ b/BizHawk.Emulation.Cores/BizHawk.Emulation.Cores.csproj
@@ -723,6 +723,7 @@
     <Compile Include="Consoles\Nintendo\NES\Boards\TENGEN_800008.cs" />
     <Compile Include="Consoles\Nintendo\NES\Boards\UNIF\UNIF-DREAMTECH01.cs" />
     <Compile Include="Consoles\Nintendo\NES\Boards\UNIF\UNIF_BMC-190in1.cs" />
+    <Compile Include="Consoles\Nintendo\NES\Boards\UNIF\UNIF_BMC-64in1-NR.cs" />
     <Compile Include="Consoles\Nintendo\NES\Boards\UNIF\UNIF_BMC-8157.cs" />
     <Compile Include="Consoles\Nintendo\NES\Boards\UNIF\UNIF_BMC-A65AS.cs" />
     <Compile Include="Consoles\Nintendo\NES\Boards\UNIF\UNIF_BMC-BS-5.cs" />
diff --git a/BizHawk.Emulation.Cores/Consoles/Nintendo/NES/Boards/UNIF/UNIF_BMC-64in1-NR.cs b/BizHawk.Emulation.Cores/Consoles/Nintendo/NES/Boards/UNIF/UNIF_BMC-64in1-NR.cs
new file mode 100644
index 0000000000..75a165f3e4
--- /dev/null
+++ b/BizHawk.Emulation.Cores/Consoles/Nintendo/NES/Boards/UNIF/UNIF_BMC-64in1-NR.cs
@@ -0,0 +1,89 @@
+using BizHawk.Common;
+
+namespace BizHawk.Emulation.Cores.Nintendo.NES
+{
+	// Adapted from FCEUX src
+	public class UNIF_BMC_64in1_NR : NES.NESBoardBase
+	{
+		private ByteBuffer regs = new ByteBuffer(4);
+
+		public override bool Configure(NES.EDetectionOrigin origin)
+		{
+			switch (Cart.board_type)
+			{
+				case "UNIF_BMC-64in1NoRepeat":
+					break;
+				default:
+					return false;
+			}
+
+			regs[0] = 0x80;
+			regs[1] = 0x43;
+			regs[2] = 0;
+			regs[3] = 0;
+
+			return true;
+		}
+
+		public override void WriteEXP(int addr, byte value)
+		{
+			if (addr >= 0x1000 && addr <= 0x1003)
+			{
+				regs[addr & 3] = value;
+				SetMirrorType((regs[0] & 0x20) > 0 ? EMirrorType.Horizontal : EMirrorType.Vertical);
+			}
+
+			base.WriteEXP(addr, value);
+		}
+
+		public override void WritePRG(int addr, byte value)
+		{
+			regs[3] = value;
+		}
+
+		public override byte ReadPRG(int addr)
+		{
+			if ((regs[0] & 0x80) > 0)
+			{
+				if ((regs[1] & 0x80) > 0)
+				{
+					return ROM[((regs[1] & 0x1F) * 0x8000) + (addr & 0x7FFF)];
+				}
+				else
+				{
+					int bank = ((regs[1] & 0x1f) << 1) | ((regs[1] >> 6) & 1);
+					return ROM[(bank * 0x4000) + (addr & 0x3FFF)];
+				}
+			}
+			else
+			{
+				if (addr < 0x4000)
+				{
+					return ROM[(addr & 0x3FFF)];
+				}
+				else
+				{
+					int bank = ((regs[1] & 0x1f) << 1) | ((regs[1] >> 6) & 1);
+					return ROM[(bank * 0x4000) + (addr & 0x3FFF)];
+				}
+			}
+		}
+
+		public override byte ReadPPU(int addr)
+		{
+			if (addr < 0x2000)
+			{
+				int bank = (regs[2] << 2) | ((regs[0] >> 1) & 3);
+				return VROM[(bank * 0x2000) + (addr & 0x1FFF)];
+			}
+
+			return base.ReadPPU(addr);
+		}
+
+		public override void SyncState(Serializer ser)
+		{
+			base.SyncState(ser);
+			ser.Sync("regs", ref regs);
+		}
+	}
+}