Fix PCE Populous by supporting its custom SaveRAM.
+ Unsubstantial TurboCD progress.
This commit is contained in:
beirich
parent
4b892cdfea
commit
3f27ac0b2a
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@ -112,6 +112,8 @@
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<Compile Include="Consoles\Nintendo\NES\PPU.cs" />
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<Compile Include="Consoles\Nintendo\NES\PPU.regs.cs" />
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<Compile Include="Consoles\Nintendo\NES\PPU.run.cs" />
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<Compile Include="Consoles\PC Engine\MemoryMap.Populous.cs" />
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<Compile Include="Consoles\PC Engine\ScsiCD.cs" />
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<Compile Include="Consoles\PC Engine\TurboCD.cs" />
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<Compile Include="Consoles\Sega\SMS\MemoryMap.CodeMasters.cs" />
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<Compile Include="Consoles\Sega\SMS\MemoryMap.Sega.cs" />
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@ -44,14 +44,37 @@ namespace BizHawk.Emulation.CPUs.H6280
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PendingCycles -= 8;
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}
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if (IRQ2Assert && FlagI == false && LagIFlag == false && (IRQControlByte & IRQ2Selector) == 0)
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{
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Console.WriteLine("ENTERING IRQ2 INTERRUPT");
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WriteMemory((ushort)(S-- + 0x2100), (byte)(PC >> 8));
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WriteMemory((ushort)(S-- + 0x2100), (byte)PC);
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WriteMemory((ushort)(S-- + 0x2100), (byte)(P & (~0x10)));
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FlagD = false;
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FlagI = true;
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PC = ReadWord(IRQ2Vector);
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PendingCycles -= 8;
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}
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IRQControlByte = IRQNextControlByte;
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LagIFlag = FlagI;
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//Console.WriteLine(State());
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byte opcode = ReadMemory(PC++);
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switch (opcode)
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{
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case 0x00: // BRK
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throw new Exception("break");
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Console.WriteLine("EXEC BRK"); // TODO CpuCoreGenerator needs updated, but I dont even know if this works yet
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PC++;
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WriteMemory((ushort)(S-- + 0x2100), (byte)(PC >> 8));
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WriteMemory((ushort)(S-- + 0x2100), (byte)PC);
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WriteMemory((ushort)(S-- + 0x2100), (byte)(P & (~0x10)));
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FlagT = false;
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FlagB = true;
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FlagD = false;
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FlagI = true;
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PC = ReadWord(IRQ2Vector);
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PendingCycles -= 8;
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break;
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case 0x01: // ORA (addr,X)
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value8 = ReadMemory(ReadWordPageWrap((ushort)((byte)(ReadMemory(PC++)+X)+0x2000)));
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@ -43,6 +43,7 @@ namespace BizHawk.Emulation.CPUs.H6280
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public bool LagIFlag;
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public bool IRQ1Assert;
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public bool IRQ2Assert;
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public bool TimerAssert;
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public byte IRQControlByte, IRQNextControlByte;
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@ -191,9 +192,6 @@ namespace BizHawk.Emulation.CPUs.H6280
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public void WriteIrqControl(byte value)
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{
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// There is a single-instruction delay before writes to the IRQ Control Byte take effect.
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// After Burner requires this to function, as it ACKs the timer interrupt AFTER un-masking
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// the interrupt.
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value &= 7;
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IRQNextControlByte = value;
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}
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@ -206,7 +204,7 @@ namespace BizHawk.Emulation.CPUs.H6280
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public byte ReadIrqStatus()
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{
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byte status = 0;
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//if (IRQ2Assert) status |= 1;
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if (IRQ2Assert) status |= 1;
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if (IRQ1Assert) status |= 2;
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if (TimerAssert) status |= 4;
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return status;
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@ -232,6 +230,8 @@ namespace BizHawk.Emulation.CPUs.H6280
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{
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if (TimerTickCounter + 5 > 1024)
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{
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// There exists a slight delay between when the timer counter is decremented and when
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// the interrupt fires; games can detect it, so we hack it this way.
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return (byte) ((TimerValue - 1) & 0x7F);
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}
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return TimerValue;
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@ -4,6 +4,7 @@ using System.Globalization;
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using System.IO;
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using BizHawk.Emulation.CPUs.H6280;
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using BizHawk.Emulation.Sound;
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using BizHawk.Disc;
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namespace BizHawk.Emulation.Consoles.TurboGrafx
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{
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@ -40,6 +41,9 @@ namespace BizHawk.Emulation.Consoles.TurboGrafx
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// Memory system
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public byte[] Ram;
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// Disc
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//private Disc.Disc disc = Disc.Disc.FromCuePath("d:/lib/roms/Turbo CD/Cosmic Fantasy II/Cosmic Fantasy II [U][CD][WTG990301][Telenet Japan][1992][PCE][thx-1138-darkwater].cue");
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// PC Engine timings:
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// 21,477,270 Machine clocks / sec
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// 7,159,090 Cpu cycles / sec
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@ -109,6 +113,13 @@ namespace BizHawk.Emulation.Consoles.TurboGrafx
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BRAM[4] = 0x00; BRAM[5] = 0x88; BRAM[6] = 0x10; BRAM[7] = 0x80;
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}
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if (game.GetOptions().Contains("PopulousSRAM"))
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{
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PopulousRAM = new byte[0x8000];
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Cpu.ReadMemory21 = ReadMemoryPopulous;
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Cpu.WriteMemory21 = WriteMemoryPopulous;
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}
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Cpu.ResetPC();
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SetupMemoryDomains();
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}
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@ -171,6 +182,11 @@ namespace BizHawk.Emulation.Consoles.TurboGrafx
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writer.WriteLine("[PCEngine]");
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writer.Write("RAM ");
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Ram.SaveAsHex(writer);
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if (PopulousRAM != null)
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{
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writer.Write("PopulousRAM ");
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PopulousRAM.SaveAsHex(writer);
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}
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writer.WriteLine("Frame " + Frame);
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writer.WriteLine("Lag " + _lagcount);
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if (Cpu.ReadMemory21 == ReadMemorySF2)
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@ -215,6 +231,8 @@ namespace BizHawk.Emulation.Consoles.TurboGrafx
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IOBuffer = byte.Parse(args[1], NumberStyles.HexNumber);
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else if (args[0] == "RAM")
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Ram.ReadFromHex(args[1]);
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else if (args[0] == "PopulousRAM" && PopulousRAM != null)
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PopulousRAM.ReadFromHex(args[1]);
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else if (args[0] == "[HuC6280]")
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Cpu.LoadStateText(reader);
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else if (args[0] == "[PSG]")
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@ -237,8 +255,10 @@ namespace BizHawk.Emulation.Consoles.TurboGrafx
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if (SuperGrafx == false)
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{
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writer.Write(Ram);
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if (PopulousRAM != null)
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writer.Write(PopulousRAM);
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writer.Write(Frame);
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// writer.Write(_lagcount); //TODO: why does this fail?
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writer.Write(_lagcount);
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writer.Write(SF2MapperLatch);
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writer.Write(IOBuffer);
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Cpu.SaveStateBinary(writer);
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@ -248,7 +268,7 @@ namespace BizHawk.Emulation.Consoles.TurboGrafx
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} else {
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writer.Write(Ram);
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writer.Write(Frame);
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// writer.Write(_lagcount);
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writer.Write(_lagcount);
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writer.Write(IOBuffer);
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Cpu.SaveStateBinary(writer);
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VCE.SaveStateBinary(writer);
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@ -264,8 +284,10 @@ namespace BizHawk.Emulation.Consoles.TurboGrafx
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if (SuperGrafx == false)
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{
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Ram = reader.ReadBytes(0x2000);
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if (PopulousRAM != null)
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PopulousRAM = reader.ReadBytes(0x8000);
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Frame = reader.ReadInt32();
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// _lagcount = reader.ReadInt32();
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_lagcount = reader.ReadInt32();
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SF2MapperLatch = reader.ReadByte();
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IOBuffer = reader.ReadByte();
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Cpu.LoadStateBinary(reader);
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@ -275,7 +297,7 @@ namespace BizHawk.Emulation.Consoles.TurboGrafx
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} else {
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Ram = reader.ReadBytes(0x8000);
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Frame = reader.ReadInt32();
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// _lagcount = reader.ReadInt32();
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_lagcount = reader.ReadInt32();
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IOBuffer = reader.ReadByte();
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Cpu.LoadStateBinary(reader);
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VCE.LoadStateBinary(reader);
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@ -288,8 +310,9 @@ namespace BizHawk.Emulation.Consoles.TurboGrafx
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public byte[] SaveStateBinary()
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{
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int buflen = SuperGrafx ? 166552 : 75854;
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int buflen = SuperGrafx ? 166556 : 75858;
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if (BramEnabled) buflen += 2048;
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if (PopulousRAM != null) buflen += 0x8000;
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var buf = new byte[buflen];
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var stream = new MemoryStream(buf);
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@ -0,0 +1,192 @@
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using System;
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namespace BizHawk.Emulation
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{
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public sealed class ScsiCD
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{
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private bool bsy, sel, cd, io, msg, req, ack, atn, rst;
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private bool lagBSY, lagSEL, lagCD, lagIO, lagMSG, lagREQ, lagACK, lagATN, lagRST;
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public bool BSY {
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get { return bsy; }
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set {
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if (value != lagBSY) signalsChanged = true;
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lagBSY = bsy;
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bsy = value;
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}
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}
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public bool SEL
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{
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get { return sel; }
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set
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{
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if (value != lagSEL) signalsChanged = true;
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lagSEL = sel;
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sel = value;
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}
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}
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public bool CD // false=data, true=control
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{
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get { return cd; }
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set
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{
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if (value != lagCD) signalsChanged = true;
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lagCD = cd;
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cd = value;
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}
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}
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public bool IO
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{
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get { return io; }
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set
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{
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if (value != lagIO) signalsChanged = true;
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lagIO = io;
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io = value;
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}
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}
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public bool MSG
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{
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get { return msg; }
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set
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{
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if (value != lagMSG) signalsChanged = true;
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lagMSG = msg;
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msg = value;
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}
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}
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public bool REQ
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{
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get { return req; }
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set
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{
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if (value != lagREQ) signalsChanged = true;
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lagREQ = req;
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req = value;
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}
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}
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public bool ACK
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{
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get { return ack; }
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set
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{
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if (value != lagACK) signalsChanged = true;
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lagACK = ack;
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ack = value;
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}
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}
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public bool ATN
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{
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get { return atn; }
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set
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{
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if (value != lagATN) signalsChanged = true;
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lagATN = atn;
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atn = value;
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}
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}
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public bool RST
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{
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get { return rst; }
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set
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{
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if (value != lagRST) signalsChanged = true;
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lagRST = rst;
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rst = value;
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}
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}
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public byte DB { get; set; } // data bits
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private bool signalsChanged;
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private bool driveSelected;
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public void Think()
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{
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if (BSY == false && SEL == false)
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{
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Console.WriteLine("BUS FREE!");
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// zap the rest of the signals
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CD = false;
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IO = false;
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MSG = false;
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REQ = false;
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ACK = false;
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ATN = false;
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DB = 0;
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}
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if (SEL && lagSEL == false)
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{
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driveSelected = true;
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CD = true;
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BSY = true;
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MSG = false;
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IO = false;
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REQ = true;
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}
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if (RST && lagRST == false)
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{
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// reset buffers and CDDA and stuff.
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CD = false;
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IO = false;
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MSG = false;
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REQ = false;
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ACK = false;
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ATN = false;
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DB = 0;
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}
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}
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/* SCSI BUS SIGNALS
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BSY (BUSY). An "OR-tied" signal that indicates that the bus is being used.
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SEL (SELECT). A signal used by an initiator to select a target or by a target
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to reselect an initiator.
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C/D (CONTROL/DATA). A signal driven by a target that indicates whether
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CONTROL or DATA information is on the DATA BUS. True indicates CONTROL.
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I/O (INPUT/OUTPUT). A signal driven by a target that controls the direction
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of data movement on the DATA BUS with respect to an initiator. True indicates
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input to the initiator. This signal is also used to distinguish between
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SELECTION and RESELECTION phases.
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MSG (MESSAGE). A signal driven by a target during the MESSAGE phase.
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REQ (REQUEST). A signal driven by a target to indicate a request for a
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REQ/ACK data transfer handshake.
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ACK (ACKNOWLEDGE). A signal driven by an initiator to indicate an
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acknowledgment for a REQ/ACK data transfer handshake.
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ATN (ATTENTION). A signal driven by an initiator to indicate the ATTENTION
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condition.
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RST (RESET). An "OR-tied" signal that indicates the RESET condition.
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Plus 8 data bits (DB7-0) and parity (P).
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==============================================================================
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Signals
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----------------------------------------------------------
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C/D, I/O,
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Bus Phase BSY SEL MSG, REQ ACK/ATN DB(7-0,P)
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------------------------------------------------------------------------------
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BUS FREE None None None None None
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ARBITRATION All Winner None None SCSI ID
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SELECTION I&T Initiator None Initiator Initiator
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RESELECTION I&T Target Target Initiator Target
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COMMAND Target None Target Initiator Initiator
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DATA IN Target None Target Initiator Target
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DATA OUT Target None Target Initiator Initiator
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STATUS Target None Target Initiator Target
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MESSAGE IN Target None Target Initiator Target
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MESSAGE OUT Target None Target Initiator Initiator
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==============================================================================
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*/
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}
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}
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@ -5,17 +5,49 @@ namespace BizHawk.Emulation.Consoles.TurboGrafx
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public partial class PCEngine
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{
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private byte[] CdIoPorts = new byte[16];
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private ScsiCD scsi = new ScsiCD();
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private void WriteCD(int addr, byte value)
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{
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Console.WriteLine("Write to reg[{0:X4}] {1:X2}", addr&0x1FFF, value);
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switch (addr & 0x1FFF)
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{
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case 0x1802: // ADPCM / CD Control
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case 0x1800: // SCSI Drive Control Line
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CdIoPorts[0] = value;
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// Console.WriteLine("Write to CDC Status [0] {0:X2}", value);
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scsi.SEL = true;
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scsi.Think();
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scsi.SEL = false;
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scsi.Think();
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// this probably does some things
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// possibly clear irq line or trigger or who knows
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break;
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case 0x1801: // CDC Command
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CdIoPorts[1] = value;
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scsi.DB = value;
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scsi.Think();
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// Console.WriteLine("Write to CDC Command [1] {0:X2}", value);
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break;
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case 0x1802: // ACK and Interrupt Control
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CdIoPorts[2] = value;
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scsi.ACK = ((value & 0x80) != 0);
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scsi.Think();
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RefreshIRQ2();
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break;
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case 0x1804: // CD Reset Command
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CdIoPorts[4] = value;
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scsi.RST = ((value & 0x02) != 0);
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scsi.Think();
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if (scsi.RST)
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{
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CdIoPorts[3] &= 0x8F; // Clear interrupt control bits
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RefreshIRQ2();
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}
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break;
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case 0x1807: // BRAM Unlock
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@ -28,23 +60,23 @@ namespace BizHawk.Emulation.Consoles.TurboGrafx
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case 0x180B: // ADPCM DMA Control
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CdIoPorts[0x0B] = value;
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Console.WriteLine("Write to ADPCM DMA Control [B]");
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// Console.WriteLine("Write to ADPCM DMA Control [B]");
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// TODO... there is DMA to be done
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break;
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case 0x180D: // ADPCM Address Control
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CdIoPorts[0x0D] = value;
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Console.WriteLine("Write to ADPCM Address Control [D]");
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// Console.WriteLine("Write to ADPCM Address Control [D]");
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break;
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case 0x180E: // ADPCM Playback Rate
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CdIoPorts[0x0E] = value;
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Console.WriteLine("Write to ADPCM Address Control [E]");
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// Console.WriteLine("Write to ADPCM Address Control [E]");
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break;
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case 0x180F: // Audio Fade Timer
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CdIoPorts[0x0F] = value;
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Console.WriteLine("Write to CD Audio fade timer [F]");
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// Console.WriteLine("Write to CD Audio fade timer [F]");
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// TODO: hook this up to audio system);
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break;
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@ -56,29 +88,58 @@ namespace BizHawk.Emulation.Consoles.TurboGrafx
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public byte ReadCD(int addr)
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{
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byte returnValue = 0;
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switch (addr & 0x1FFF)
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{
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case 0x1800: // SCSI Drive Control Line
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scsi.Think();
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if (scsi.IO) returnValue |= 0x08;
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if (scsi.CD) returnValue |= 0x10;
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if (scsi.MSG) returnValue |= 0x20;
|
||||
if (scsi.REQ) returnValue |= 0x40;
|
||||
if (scsi.BSY) returnValue |= 0x80;
|
||||
//if (returnValue != 0) returnValue = 0x40;
|
||||
Console.WriteLine("Read SCSI Drive Control Line [0]: {0:X2} btw, pc={1:X4} ", returnValue,this.Cpu.PC);
|
||||
return returnValue;
|
||||
|
||||
case 0x1802: // ADPCM / CD Control
|
||||
Console.WriteLine("Read 1802 {0:X2}", CdIoPorts[2]);
|
||||
return CdIoPorts[2];
|
||||
|
||||
case 0x1803: // BRAM Lock
|
||||
if (BramEnabled)
|
||||
{
|
||||
Console.WriteLine("LOCKED BRAM!");
|
||||
Console.WriteLine("LOCKED BRAM! (read 1803)");
|
||||
BramLocked = true;
|
||||
}
|
||||
return CdIoPorts[3];
|
||||
|
||||
case 0x1804: // CD Reset
|
||||
Console.WriteLine("Read 1804 {0:X2}", CdIoPorts[4]);
|
||||
return CdIoPorts[4];
|
||||
|
||||
case 0x180F: // Audio Fade Timer
|
||||
Console.WriteLine("Read 180F {0:X2}", CdIoPorts[0xF]);
|
||||
return CdIoPorts[0x0F];
|
||||
|
||||
// These are some retarded version check
|
||||
case 0x18C1: return 0xAA;
|
||||
case 0x18C2: return 0x55;
|
||||
case 0x18C3: return 0x00;
|
||||
case 0x18C5: return 0xAA;
|
||||
case 0x18C6: return 0x55;
|
||||
case 0x18C7: return 0x03;
|
||||
|
||||
default:
|
||||
Console.WriteLine("unknown read to {0:X4}", addr);
|
||||
return 0xFF;
|
||||
}
|
||||
}
|
||||
|
||||
private void RefreshIRQ2()
|
||||
{
|
||||
int mask = CdIoPorts[2] & CdIoPorts[3] & 0x7C;
|
||||
Cpu.IRQ2Assert = (mask != 0);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2174,7 +2174,7 @@ BB4429B6 Paranoia PCE
|
|||
E6458212 Parasol Stars PCE
|
||||
647718F9 Parodius PCE
|
||||
740491C2 PC Denjin - Punkic Cyborgs PCE
|
||||
4938B8BB Populous PCE BRAM
|
||||
4938B8BB Populous PCE BRAM;PopulousSRAM
|
||||
25E0F6E9 Power Drift PCE
|
||||
BE8B6E3B Power Gate PCE
|
||||
04A85769 Power League PCE
|
||||
|
|
|
|||
Loading…
Reference in New Issue