-Simplified the CPU / STIC connection.
-Made FrameAdvance handle the pending cycle loop. During each iteration, it runs one instruction and ticks the STIC accordingly.
This commit is contained in:
parent
9100232547
commit
26b1d06b7a
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@ -8,7 +8,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
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private const ushort RESET = 0x1000;
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private const ushort RESET = 0x1000;
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private const ushort INTERRUPT = 0x1004;
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private const ushort INTERRUPT = 0x1004;
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private bool FlagS, FlagC, FlagZ, FlagO, FlagI, FlagD, MSync, Interruptible;
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private bool FlagS, FlagC, FlagZ, FlagO, FlagI, FlagD, IntRM, BusRq, BusAk, MSync, Interruptible;
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private ushort[] Register = new ushort[8];
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private ushort[] Register = new ushort[8];
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private ushort RegisterSP { get { return Register[6]; } set { Register[6] = value; } }
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private ushort RegisterSP { get { return Register[6]; } set { Register[6] = value; } }
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private ushort RegisterPC { get { return Register[7]; } set { Register[7] = value; } }
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private ushort RegisterPC { get { return Register[7]; } set { Register[7] = value; } }
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@ -18,14 +18,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
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public Func<ushort, ushort> ReadMemory;
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public Func<ushort, ushort> ReadMemory;
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public Func<ushort, ushort, bool> WriteMemory;
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public Func<ushort, ushort, bool> WriteMemory;
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public Func<bool> GetIntRM;
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public Func<bool> GetBusRq;
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public Func<bool> GetBusAk;
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public Action<bool> SetBusAk;
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private bool IntRM { get { return GetIntRM(); } }
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private bool BusRq { get { return GetBusRq(); } }
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private bool BusAk { get { return GetBusAk(); } set { SetBusAk(value); } }
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private static bool logging = true;
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private static bool logging = true;
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private static StreamWriter log;
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private static StreamWriter log;
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@ -46,6 +38,31 @@ namespace BizHawk.Emulation.CPUs.CP1610
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RegisterPC = RESET;
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RegisterPC = RESET;
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}
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}
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public bool GetBusAk()
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{
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return BusAk;
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}
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public void SetIntRM(bool value)
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{
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IntRM = value;
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}
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public int GetPendingCycles()
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{
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return PendingCycles;
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}
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public void SetBusRq(bool value)
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{
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BusRq = value;
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}
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public void AddPendingCycles(int cycles)
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{
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PendingCycles += cycles;
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}
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public void LogData()
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public void LogData()
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{
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{
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if (!logging)
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if (!logging)
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@ -49,23 +49,12 @@ namespace BizHawk.Emulation.CPUs.CP1610
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if (mem == 0x6)
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if (mem == 0x6)
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RegisterSP--;
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RegisterSP--;
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if (!FlagD)
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if (!FlagD)
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{
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value = ReadMemory(Register[mem]);
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value = ReadMemory(Register[mem]);
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if (mem != 0x6)
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{
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PendingCycles -= 8; TotalExecutedCycles += 8;
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}
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else
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{
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PendingCycles -= 11; TotalExecutedCycles += 11;
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}
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}
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else
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else
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{
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{
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// Double Byte Data.
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// Double Byte Data.
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value = (ushort)(ReadMemory(Register[mem]++) & 0xFF);
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value = (ushort)(ReadMemory(Register[mem]++) & 0xFF);
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value |= (ushort)(ReadMemory(Register[mem]) << 8);
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value |= (ushort)(ReadMemory(Register[mem]) << 8);
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PendingCycles -= 10; TotalExecutedCycles += 10;
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}
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}
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// Auto-increment the memory register if it does so on write.
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// Auto-increment the memory register if it does so on write.
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if (mem >= 0x4 && mem != 0x6)
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if (mem >= 0x4 && mem != 0x6)
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@ -73,23 +62,23 @@ namespace BizHawk.Emulation.CPUs.CP1610
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return value;
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return value;
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}
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}
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public void Indirect_Get_Cycles(byte mem)
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public int Indirect_Get_Cycles(byte mem)
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{
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{
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if (!FlagD)
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if (!FlagD)
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{
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{
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if (mem != 0x6)
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if (mem != 0x6)
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{
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{
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PendingCycles -= 8; TotalExecutedCycles += 8;
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return 8;
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}
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}
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else
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else
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{
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{
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PendingCycles -= 11; TotalExecutedCycles += 11;
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return 11;
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}
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}
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}
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}
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else
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else
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{
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{
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// Double Byte Data.
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// Double Byte Data.
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PendingCycles -= 10; TotalExecutedCycles += 10;
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return 10;
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}
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}
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}
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}
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@ -101,10 +90,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
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Register[mem]++;
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Register[mem]++;
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}
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}
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public void Execute(int cycles)
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public void Execute()
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{
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PendingCycles += cycles;
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while (PendingCycles > 0)
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{
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{
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if (logging)
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if (logging)
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{
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{
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@ -121,7 +107,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
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}
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}
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byte dest, src, mem;
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byte dest, src, mem;
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ushort dest_value, src_value, mem_read, addr, addr_read, offset;
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ushort dest_value, src_value, mem_read, addr, addr_read, offset;
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int decle2, decle3, result = 0, ones, carry, status_word, lower, sign, cond, ext;
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int cycles = 0, decle2, decle3, result = 0, ones, carry, status_word, lower, sign, cond, ext;
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bool branch = false;
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bool branch = false;
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bool prev_FlagD = FlagD;
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bool prev_FlagD = FlagD;
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int opcode = ReadMemory(RegisterPC++) & 0x3FF;
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int opcode = ReadMemory(RegisterPC++) & 0x3FF;
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@ -131,17 +117,17 @@ namespace BizHawk.Emulation.CPUs.CP1610
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throw new ArgumentException(UNEXPECTED_HLT);
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throw new ArgumentException(UNEXPECTED_HLT);
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case 0x001: // SDBD
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case 0x001: // SDBD
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FlagD = true;
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FlagD = true;
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PendingCycles -= 4; TotalExecutedCycles += 4;
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cycles = 4;
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Interruptible = false;
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Interruptible = false;
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break;
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break;
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case 0x002: // EIS
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case 0x002: // EIS
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FlagI = true;
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FlagI = true;
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PendingCycles -= 4; TotalExecutedCycles += 4;
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cycles = 4;
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Interruptible = false;
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Interruptible = false;
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break;
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break;
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case 0x003: // DIS
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case 0x003: // DIS
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FlagI = false;
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FlagI = false;
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PendingCycles -= 4; TotalExecutedCycles += 4;
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cycles = 4;
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Interruptible = false;
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Interruptible = false;
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break;
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break;
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case 0x004: // J, JE, JD, JSR, JSRE, JSRD
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case 0x004: // J, JE, JD, JSR, JSRE, JSRD
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@ -169,19 +155,19 @@ namespace BizHawk.Emulation.CPUs.CP1610
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throw new ArgumentException();
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throw new ArgumentException();
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}
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}
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RegisterPC = (ushort)addr;
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RegisterPC = (ushort)addr;
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PendingCycles -= 12; TotalExecutedCycles += 12;
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cycles = 12;
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Interruptible = true;
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Interruptible = true;
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break;
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break;
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case 0x005: // TCI
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case 0x005: // TCI
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throw new ArgumentException(UNEXPECTED_TCI);
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throw new ArgumentException(UNEXPECTED_TCI);
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case 0x006: // CLRC
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case 0x006: // CLRC
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FlagC = false;
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FlagC = false;
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PendingCycles -= 4; TotalExecutedCycles += 4;
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cycles = 4;
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Interruptible = false;
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Interruptible = false;
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break;
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break;
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case 0x007: // SETC
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case 0x007: // SETC
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FlagC = true;
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FlagC = true;
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PendingCycles -= 4; TotalExecutedCycles += 4;
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cycles = 4;
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Interruptible = false;
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Interruptible = false;
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break;
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break;
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// INCR
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// INCR
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@ -199,7 +185,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
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Calc_FlagS(result);
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Calc_FlagS(result);
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Calc_FlagZ(result);
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Calc_FlagZ(result);
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Register[dest] = (ushort)result;
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Register[dest] = (ushort)result;
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PendingCycles -= 6; TotalExecutedCycles += 6;
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cycles = 6;
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Interruptible = true;
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Interruptible = true;
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break;
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break;
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// DECR
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// DECR
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@ -216,7 +202,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
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Calc_FlagS(result);
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Calc_FlagS(result);
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Calc_FlagZ(result);
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Calc_FlagZ(result);
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Register[dest] = (ushort)result;
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Register[dest] = (ushort)result;
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PendingCycles -= 6; TotalExecutedCycles += 6;
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cycles = 6;
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Interruptible = true;
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Interruptible = true;
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break;
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break;
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// COMR
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// COMR
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@ -234,7 +220,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
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Calc_FlagS(result);
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Calc_FlagS(result);
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Calc_FlagZ(result);
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Calc_FlagZ(result);
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Register[dest] = (ushort)result;
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Register[dest] = (ushort)result;
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PendingCycles -= 6; TotalExecutedCycles += 6;
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cycles = 6;
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Interruptible = true;
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Interruptible = true;
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break;
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break;
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// NEGR
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// NEGR
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@ -257,7 +243,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
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Calc_FlagZ(result);
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Calc_FlagZ(result);
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result &= 0xFFFF;
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result &= 0xFFFF;
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Register[dest] = (ushort)result;
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Register[dest] = (ushort)result;
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PendingCycles -= 6; TotalExecutedCycles += 6;
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cycles = 6;
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Interruptible = true;
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Interruptible = true;
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break;
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break;
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// ADCR
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// ADCR
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@ -280,7 +266,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
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Calc_FlagZ(result);
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Calc_FlagZ(result);
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result &= 0xFFFF;
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result &= 0xFFFF;
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Register[dest] = (ushort)result;
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Register[dest] = (ushort)result;
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PendingCycles -= 6; TotalExecutedCycles += 6;
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cycles = 6;
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Interruptible = true;
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Interruptible = true;
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break;
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break;
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// GSWD
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// GSWD
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@ -293,13 +279,13 @@ namespace BizHawk.Emulation.CPUs.CP1610
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status_word = ((FlagS ? 1 : 0) << 3) | ((FlagZ ? 1 : 0) << 2) | ((FlagO ? 1 : 0) << 1) |
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status_word = ((FlagS ? 1 : 0) << 3) | ((FlagZ ? 1 : 0) << 2) | ((FlagO ? 1 : 0) << 1) |
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(FlagC ? 1 : 0);
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(FlagC ? 1 : 0);
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Register[dest] = (ushort)((status_word << 12) | (status_word << 4));
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Register[dest] = (ushort)((status_word << 12) | (status_word << 4));
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PendingCycles -= 6; TotalExecutedCycles += 6;
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cycles = 6;
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Interruptible = true;
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Interruptible = true;
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break;
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break;
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// NOP
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// NOP
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case 0x034:
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case 0x034:
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case 0x035:
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case 0x035:
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PendingCycles -= 6; TotalExecutedCycles += 6;
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cycles = 6;
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Interruptible = true;
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Interruptible = true;
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break;
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break;
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// SIN
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// SIN
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@ -322,7 +308,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
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FlagO = ((src_value & 0x40) != 0) ? true : false;
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FlagO = ((src_value & 0x40) != 0) ? true : false;
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FlagZ = ((src_value & 0x20) != 0) ? true : false;
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FlagZ = ((src_value & 0x20) != 0) ? true : false;
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FlagS = ((src_value & 0x10) != 0) ? true : false;
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FlagS = ((src_value & 0x10) != 0) ? true : false;
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PendingCycles -= 6; TotalExecutedCycles += 6;
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cycles = 6;
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Interruptible = true;
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Interruptible = true;
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break;
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break;
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// SWAP
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// SWAP
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@ -341,13 +327,13 @@ namespace BizHawk.Emulation.CPUs.CP1610
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{
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{
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// Single swap.
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// Single swap.
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result = (lower << 8) | ((dest_value >> 8) & 0xFF);
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result = (lower << 8) | ((dest_value >> 8) & 0xFF);
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PendingCycles -= 6; TotalExecutedCycles += 6;
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cycles = 6;
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}
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}
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else
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else
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{
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{
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// Double swap.
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// Double swap.
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result = (lower << 8) | lower;
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result = (lower << 8) | lower;
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PendingCycles -= 8; TotalExecutedCycles += 8;
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cycles = 8;
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}
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}
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Calc_FlagS_7(result);
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Calc_FlagS_7(result);
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Calc_FlagZ(result);
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Calc_FlagZ(result);
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dest = (byte)(opcode & 0x3);
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dest = (byte)(opcode & 0x3);
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result = Register[dest] << 1;
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result = Register[dest] << 1;
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if (((opcode >> 3) & 0x1) == 0)
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if (((opcode >> 3) & 0x1) == 0)
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{
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// Single shift.
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// Single shift.
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PendingCycles -= 6; TotalExecutedCycles += 6;
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cycles = 6;
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}
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else
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else
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{
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{
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// Double shift.
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// Double shift.
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result <<= 1;
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result <<= 1;
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PendingCycles -= 8; TotalExecutedCycles += 8;
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cycles = 8;
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}
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}
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Calc_FlagS(result);
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Calc_FlagS(result);
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Calc_FlagZ(result);
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Calc_FlagZ(result);
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@ -397,17 +381,15 @@ namespace BizHawk.Emulation.CPUs.CP1610
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result = (dest_value << 1) | (FlagC ? 1 : 0);
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result = (dest_value << 1) | (FlagC ? 1 : 0);
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FlagC = ((dest_value & 0x8000) != 0);
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FlagC = ((dest_value & 0x8000) != 0);
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if (((opcode >> 3) & 0x1) == 0)
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if (((opcode >> 3) & 0x1) == 0)
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{
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// Single rotate.
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// Single rotate.
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PendingCycles -= 6; TotalExecutedCycles += 6;
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cycles = 6;
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}
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else
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else
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{
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{
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// Double rotate.
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// Double rotate.
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result <<= 1;
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result <<= 1;
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result |= (FlagO ? 1 : 0);
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result |= (FlagO ? 1 : 0);
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FlagO = ((dest_value & 0x4000) != 0);
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FlagO = ((dest_value & 0x4000) != 0);
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PendingCycles -= 8; TotalExecutedCycles += 8;
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cycles = 8;
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}
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}
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Calc_FlagS(result);
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Calc_FlagS(result);
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Calc_FlagZ(result);
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Calc_FlagZ(result);
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@ -429,16 +411,14 @@ namespace BizHawk.Emulation.CPUs.CP1610
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result = dest_value << 1;
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result = dest_value << 1;
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FlagC = ((dest_value & 0x8000) != 0);
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FlagC = ((dest_value & 0x8000) != 0);
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if (((opcode >> 3) & 0x1) == 0)
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if (((opcode >> 3) & 0x1) == 0)
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{
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// Single shift.
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// Single shift.
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PendingCycles -= 6; TotalExecutedCycles += 6;
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cycles = 6;
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}
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else
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else
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{
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{
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// Double shift.
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// Double shift.
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result <<= 1;
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result <<= 1;
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FlagO = ((dest_value & 0x4000) != 0);
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FlagO = ((dest_value & 0x4000) != 0);
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PendingCycles -= 8; TotalExecutedCycles += 8;
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cycles = 8;
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}
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}
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Calc_FlagS(result);
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Calc_FlagS(result);
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Calc_FlagZ(result);
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Calc_FlagZ(result);
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@ -458,15 +438,13 @@ namespace BizHawk.Emulation.CPUs.CP1610
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dest = (byte)(opcode & 0x3);
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dest = (byte)(opcode & 0x3);
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result = Register[dest] >> 1;
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result = Register[dest] >> 1;
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if (((opcode >> 3) & 0x1) == 0)
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if (((opcode >> 3) & 0x1) == 0)
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{
|
|
||||||
// Single shift.
|
// Single shift.
|
||||||
PendingCycles -= 6; TotalExecutedCycles += 6;
|
cycles = 6;
|
||||||
}
|
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
// Double shift.
|
// Double shift.
|
||||||
result >>= 1;
|
result >>= 1;
|
||||||
PendingCycles -= 8; TotalExecutedCycles += 8;
|
cycles = 8;
|
||||||
}
|
}
|
||||||
Calc_FlagS_7(result);
|
Calc_FlagS_7(result);
|
||||||
Calc_FlagZ(result);
|
Calc_FlagZ(result);
|
||||||
|
@ -488,16 +466,14 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
sign = dest_value & 0x8000;
|
sign = dest_value & 0x8000;
|
||||||
result = (dest_value >> 1) | sign;
|
result = (dest_value >> 1) | sign;
|
||||||
if (((opcode >> 3) & 0x1) == 0)
|
if (((opcode >> 3) & 0x1) == 0)
|
||||||
{
|
|
||||||
// Single shift.
|
// Single shift.
|
||||||
PendingCycles -= 6; TotalExecutedCycles += 6;
|
cycles = 6;
|
||||||
}
|
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
// Double shift.
|
// Double shift.
|
||||||
result >>= 1;
|
result >>= 1;
|
||||||
result |= sign;
|
result |= sign;
|
||||||
PendingCycles -= 8; TotalExecutedCycles += 8;
|
cycles = 8;
|
||||||
}
|
}
|
||||||
Calc_FlagS_7(result);
|
Calc_FlagS_7(result);
|
||||||
Calc_FlagZ(result);
|
Calc_FlagZ(result);
|
||||||
|
@ -519,17 +495,15 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
result = (dest_value >> 1) | ((FlagC ? 1 : 0) << 15);
|
result = (dest_value >> 1) | ((FlagC ? 1 : 0) << 15);
|
||||||
FlagC = ((dest_value & 0x1) != 0);
|
FlagC = ((dest_value & 0x1) != 0);
|
||||||
if (((opcode >> 3) & 0x1) == 0)
|
if (((opcode >> 3) & 0x1) == 0)
|
||||||
{
|
|
||||||
// Single rotate.
|
// Single rotate.
|
||||||
PendingCycles -= 6; TotalExecutedCycles += 6;
|
cycles = 6;
|
||||||
}
|
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
// Double rotate.
|
// Double rotate.
|
||||||
result >>= 1;
|
result >>= 1;
|
||||||
result |= (FlagO ? 1 : 0) << 15;
|
result |= (FlagO ? 1 : 0) << 15;
|
||||||
FlagO = ((dest_value & 0x2) != 0);
|
FlagO = ((dest_value & 0x2) != 0);
|
||||||
PendingCycles -= 8; TotalExecutedCycles += 8;
|
cycles = 8;
|
||||||
}
|
}
|
||||||
Calc_FlagS_7(result);
|
Calc_FlagS_7(result);
|
||||||
Calc_FlagZ(result);
|
Calc_FlagZ(result);
|
||||||
|
@ -552,17 +526,15 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
result = (dest_value >> 1) | sign;
|
result = (dest_value >> 1) | sign;
|
||||||
FlagC = ((dest_value & 0x1) != 0);
|
FlagC = ((dest_value & 0x1) != 0);
|
||||||
if (((opcode >> 3) & 0x1) == 0)
|
if (((opcode >> 3) & 0x1) == 0)
|
||||||
{
|
|
||||||
// Single shift.
|
// Single shift.
|
||||||
PendingCycles -= 6; TotalExecutedCycles += 6;
|
cycles = 6;
|
||||||
}
|
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
// Double shift.
|
// Double shift.
|
||||||
result >>= 1;
|
result >>= 1;
|
||||||
result |= sign;
|
result |= sign;
|
||||||
FlagO = ((dest_value & 0x2) != 0);
|
FlagO = ((dest_value & 0x2) != 0);
|
||||||
PendingCycles -= 8; TotalExecutedCycles += 8;
|
cycles = 8;
|
||||||
}
|
}
|
||||||
Calc_FlagS_7(result);
|
Calc_FlagS_7(result);
|
||||||
Calc_FlagZ(result);
|
Calc_FlagZ(result);
|
||||||
|
@ -641,13 +613,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
Calc_FlagZ(result);
|
Calc_FlagZ(result);
|
||||||
Register[dest] = (ushort)result;
|
Register[dest] = (ushort)result;
|
||||||
if (dest == 0x6 || dest == 0x7)
|
if (dest == 0x6 || dest == 0x7)
|
||||||
{
|
cycles = 7;
|
||||||
PendingCycles -= 7; TotalExecutedCycles += 7;
|
|
||||||
}
|
|
||||||
else
|
else
|
||||||
{
|
cycles = 6;
|
||||||
PendingCycles -= 6; TotalExecutedCycles += 6;
|
|
||||||
}
|
|
||||||
Interruptible = true;
|
Interruptible = true;
|
||||||
break;
|
break;
|
||||||
// ADDR
|
// ADDR
|
||||||
|
@ -727,7 +695,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
Calc_FlagZ(result);
|
Calc_FlagZ(result);
|
||||||
result &= 0xFFFF;
|
result &= 0xFFFF;
|
||||||
Register[dest] = (ushort)result;
|
Register[dest] = (ushort)result;
|
||||||
PendingCycles -= 6; TotalExecutedCycles += 6;
|
cycles = 6;
|
||||||
Interruptible = true;
|
Interruptible = true;
|
||||||
break;
|
break;
|
||||||
// SUBR
|
// SUBR
|
||||||
|
@ -807,7 +775,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
Calc_FlagZ(result);
|
Calc_FlagZ(result);
|
||||||
result &= 0xFFFF;
|
result &= 0xFFFF;
|
||||||
Register[dest] = (ushort)result;
|
Register[dest] = (ushort)result;
|
||||||
PendingCycles -= 6; TotalExecutedCycles += 6;
|
cycles = 6;
|
||||||
Interruptible = true;
|
Interruptible = true;
|
||||||
break;
|
break;
|
||||||
// CMPR
|
// CMPR
|
||||||
|
@ -885,7 +853,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
Calc_FlagO_Add(dest_value, -src_value);
|
Calc_FlagO_Add(dest_value, -src_value);
|
||||||
Calc_FlagS(result);
|
Calc_FlagS(result);
|
||||||
Calc_FlagZ(result);
|
Calc_FlagZ(result);
|
||||||
PendingCycles -= 6; TotalExecutedCycles += 6;
|
cycles = 6;
|
||||||
Interruptible = true;
|
Interruptible = true;
|
||||||
break;
|
break;
|
||||||
// ANDR
|
// ANDR
|
||||||
|
@ -960,7 +928,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
Calc_FlagS(result);
|
Calc_FlagS(result);
|
||||||
Calc_FlagZ(result);
|
Calc_FlagZ(result);
|
||||||
Register[dest] = (ushort)result;
|
Register[dest] = (ushort)result;
|
||||||
PendingCycles -= 6; TotalExecutedCycles += 6;
|
cycles = 6;
|
||||||
Interruptible = true;
|
Interruptible = true;
|
||||||
break;
|
break;
|
||||||
// XORR
|
// XORR
|
||||||
|
@ -1034,7 +1002,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
Calc_FlagS(result);
|
Calc_FlagS(result);
|
||||||
Calc_FlagZ(result);
|
Calc_FlagZ(result);
|
||||||
Register[dest] = (ushort)result;
|
Register[dest] = (ushort)result;
|
||||||
PendingCycles -= 6; TotalExecutedCycles += 6;
|
cycles = 6;
|
||||||
Interruptible = true;
|
Interruptible = true;
|
||||||
break;
|
break;
|
||||||
// Branch Forward, no External Condition
|
// Branch Forward, no External Condition
|
||||||
|
@ -1187,12 +1155,10 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
if (((opcode >> 5) & 0x1) != 0)
|
if (((opcode >> 5) & 0x1) != 0)
|
||||||
offset = (ushort)(-offset - 1);
|
offset = (ushort)(-offset - 1);
|
||||||
RegisterPC += offset;
|
RegisterPC += offset;
|
||||||
PendingCycles -= 9; TotalExecutedCycles += 9;
|
cycles = 9;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
cycles = 7;
|
||||||
PendingCycles -= 7; TotalExecutedCycles += 7;
|
|
||||||
}
|
|
||||||
Interruptible = true;
|
Interruptible = true;
|
||||||
break;
|
break;
|
||||||
// MVO
|
// MVO
|
||||||
|
@ -1207,7 +1173,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
src = (byte)(opcode & 0x7);
|
src = (byte)(opcode & 0x7);
|
||||||
addr = ReadMemory(RegisterPC++);
|
addr = ReadMemory(RegisterPC++);
|
||||||
WriteMemory(addr, Register[src]);
|
WriteMemory(addr, Register[src]);
|
||||||
PendingCycles -= 11; TotalExecutedCycles += 11;
|
cycles = 11;
|
||||||
Interruptible = false;
|
Interruptible = false;
|
||||||
break;
|
break;
|
||||||
// MVO@
|
// MVO@
|
||||||
|
@ -1270,7 +1236,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
mem = (byte)((opcode >> 3) & 0x7);
|
mem = (byte)((opcode >> 3) & 0x7);
|
||||||
src = (byte)(opcode & 0x7);
|
src = (byte)(opcode & 0x7);
|
||||||
Indirect_Set(mem, src);
|
Indirect_Set(mem, src);
|
||||||
PendingCycles -= 9; TotalExecutedCycles += 9;
|
cycles = 9;
|
||||||
Interruptible = false;
|
Interruptible = false;
|
||||||
break;
|
break;
|
||||||
// MVI
|
// MVI
|
||||||
|
@ -1286,7 +1252,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
dest = (byte)(opcode & 0x7);
|
dest = (byte)(opcode & 0x7);
|
||||||
addr = ReadMemory(RegisterPC++);
|
addr = ReadMemory(RegisterPC++);
|
||||||
Register[dest] = ReadMemory(addr);
|
Register[dest] = ReadMemory(addr);
|
||||||
PendingCycles -= 10; TotalExecutedCycles += 10;
|
cycles = 10;
|
||||||
Interruptible = true;
|
Interruptible = true;
|
||||||
break;
|
break;
|
||||||
// MVI@
|
// MVI@
|
||||||
|
@ -1349,7 +1315,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
mem = (byte)((opcode >> 3) & 0x7);
|
mem = (byte)((opcode >> 3) & 0x7);
|
||||||
dest = (byte)(opcode & 0x7);
|
dest = (byte)(opcode & 0x7);
|
||||||
Register[dest] = Indirect_Get(mem);
|
Register[dest] = Indirect_Get(mem);
|
||||||
Indirect_Get_Cycles(mem);
|
cycles = Indirect_Get_Cycles(mem);
|
||||||
Interruptible = true;
|
Interruptible = true;
|
||||||
break;
|
break;
|
||||||
// ADD
|
// ADD
|
||||||
|
@ -1373,7 +1339,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
Calc_FlagZ(result);
|
Calc_FlagZ(result);
|
||||||
result &= 0xFFFF;
|
result &= 0xFFFF;
|
||||||
Register[dest] = (ushort)result;
|
Register[dest] = (ushort)result;
|
||||||
PendingCycles -= 10; TotalExecutedCycles += 10;
|
cycles = 10;
|
||||||
Interruptible = true;
|
Interruptible = true;
|
||||||
break;
|
break;
|
||||||
// ADD@
|
// ADD@
|
||||||
|
@ -1436,7 +1402,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
mem = (byte)((opcode >> 3) & 0x7);
|
mem = (byte)((opcode >> 3) & 0x7);
|
||||||
dest = (byte)(opcode & 0x7);
|
dest = (byte)(opcode & 0x7);
|
||||||
mem_read = Indirect_Get(mem);
|
mem_read = Indirect_Get(mem);
|
||||||
Indirect_Get_Cycles(mem);
|
cycles = Indirect_Get_Cycles(mem);
|
||||||
dest_value = Register[dest];
|
dest_value = Register[dest];
|
||||||
result = dest_value + mem_read;
|
result = dest_value + mem_read;
|
||||||
Calc_FlagC(result);
|
Calc_FlagC(result);
|
||||||
|
@ -1468,7 +1434,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
Calc_FlagZ(result);
|
Calc_FlagZ(result);
|
||||||
result &= 0xFFFF;
|
result &= 0xFFFF;
|
||||||
Register[dest] = (ushort)result;
|
Register[dest] = (ushort)result;
|
||||||
PendingCycles -= 10; TotalExecutedCycles += 10;
|
cycles = 10;
|
||||||
Interruptible = true;
|
Interruptible = true;
|
||||||
break;
|
break;
|
||||||
// SUB@
|
// SUB@
|
||||||
|
@ -1532,7 +1498,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
mem = (byte)((opcode >> 3) & 0x7);
|
mem = (byte)((opcode >> 3) & 0x7);
|
||||||
dest = (byte)(opcode & 0x7);
|
dest = (byte)(opcode & 0x7);
|
||||||
mem_read = Indirect_Get(mem);
|
mem_read = Indirect_Get(mem);
|
||||||
Indirect_Get_Cycles(mem);
|
cycles = Indirect_Get_Cycles(mem);
|
||||||
dest_value = Register[dest];
|
dest_value = Register[dest];
|
||||||
result = dest_value - mem_read;
|
result = dest_value - mem_read;
|
||||||
Calc_FlagC(result);
|
Calc_FlagC(result);
|
||||||
|
@ -1561,7 +1527,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
Calc_FlagO_Add(dest_value, -addr_read);
|
Calc_FlagO_Add(dest_value, -addr_read);
|
||||||
Calc_FlagS(result);
|
Calc_FlagS(result);
|
||||||
Calc_FlagZ(result);
|
Calc_FlagZ(result);
|
||||||
PendingCycles -= 10; TotalExecutedCycles += 10;
|
cycles = 10;
|
||||||
Interruptible = true;
|
Interruptible = true;
|
||||||
break;
|
break;
|
||||||
// CMP@
|
// CMP@
|
||||||
|
@ -1625,7 +1591,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
mem = (byte)((opcode >> 3) & 0x7);
|
mem = (byte)((opcode >> 3) & 0x7);
|
||||||
dest = (byte)(opcode & 0x7);
|
dest = (byte)(opcode & 0x7);
|
||||||
mem_read = Indirect_Get(mem);
|
mem_read = Indirect_Get(mem);
|
||||||
Indirect_Get_Cycles(mem);
|
cycles = Indirect_Get_Cycles(mem);
|
||||||
dest_value = Register[dest];
|
dest_value = Register[dest];
|
||||||
result = dest_value - mem_read;
|
result = dest_value - mem_read;
|
||||||
Calc_FlagC(result);
|
Calc_FlagC(result);
|
||||||
|
@ -1652,7 +1618,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
Calc_FlagS(result);
|
Calc_FlagS(result);
|
||||||
Calc_FlagZ(result);
|
Calc_FlagZ(result);
|
||||||
Register[dest] = (ushort)result;
|
Register[dest] = (ushort)result;
|
||||||
PendingCycles -= 10; TotalExecutedCycles += 10;
|
cycles = 10;
|
||||||
Interruptible = true;
|
Interruptible = true;
|
||||||
break;
|
break;
|
||||||
// AND@
|
// AND@
|
||||||
|
@ -1715,7 +1681,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
mem = (byte)((opcode >> 3) & 0x7);
|
mem = (byte)((opcode >> 3) & 0x7);
|
||||||
dest = (byte)(opcode & 0x7);
|
dest = (byte)(opcode & 0x7);
|
||||||
mem_read = Indirect_Get(mem);
|
mem_read = Indirect_Get(mem);
|
||||||
Indirect_Get_Cycles(mem);
|
cycles = Indirect_Get_Cycles(mem);
|
||||||
result = Register[dest] & mem_read;
|
result = Register[dest] & mem_read;
|
||||||
Calc_FlagS(result);
|
Calc_FlagS(result);
|
||||||
Calc_FlagZ(result);
|
Calc_FlagZ(result);
|
||||||
|
@ -1740,7 +1706,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
Calc_FlagS(result);
|
Calc_FlagS(result);
|
||||||
Calc_FlagZ(result);
|
Calc_FlagZ(result);
|
||||||
Register[dest] = (ushort)result;
|
Register[dest] = (ushort)result;
|
||||||
PendingCycles -= 10; TotalExecutedCycles += 10;
|
cycles = 10;
|
||||||
Interruptible = true;
|
Interruptible = true;
|
||||||
break;
|
break;
|
||||||
// XOR@
|
// XOR@
|
||||||
|
@ -1804,7 +1770,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
mem = (byte)((opcode >> 3) & 0x7);
|
mem = (byte)((opcode >> 3) & 0x7);
|
||||||
dest = (byte)(opcode & 0x7);
|
dest = (byte)(opcode & 0x7);
|
||||||
mem_read = Indirect_Get(mem);
|
mem_read = Indirect_Get(mem);
|
||||||
Indirect_Get_Cycles(mem);
|
cycles = Indirect_Get_Cycles(mem);
|
||||||
result = Register[dest] ^ mem_read;
|
result = Register[dest] ^ mem_read;
|
||||||
Calc_FlagS(result);
|
Calc_FlagS(result);
|
||||||
Calc_FlagZ(result);
|
Calc_FlagZ(result);
|
||||||
|
@ -1814,8 +1780,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
||||||
}
|
}
|
||||||
if (FlagD == prev_FlagD)
|
if (FlagD == prev_FlagD)
|
||||||
FlagD = false;
|
FlagD = false;
|
||||||
LogData();
|
PendingCycles -= cycles; TotalExecutedCycles += cycles;
|
||||||
}
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -15,36 +15,11 @@ namespace BizHawk.Emulation.Consoles.Intellivision
|
||||||
STIC Stic;
|
STIC Stic;
|
||||||
PSG Psg;
|
PSG Psg;
|
||||||
|
|
||||||
private bool Sr1ToIntRM, Sr2ToBusRq, BusAkToSst;
|
public void Connect()
|
||||||
|
|
||||||
private bool GetSr1ToIntRM()
|
|
||||||
{
|
{
|
||||||
return Sr1ToIntRM;
|
Cpu.SetIntRM(Stic.GetSr1());
|
||||||
}
|
Cpu.SetBusRq(Stic.GetSr2());
|
||||||
|
Stic.SetSst(Cpu.GetBusAk());
|
||||||
private bool GetSr2ToBusRq()
|
|
||||||
{
|
|
||||||
return Sr2ToBusRq;
|
|
||||||
}
|
|
||||||
|
|
||||||
private bool GetBusAkToSst()
|
|
||||||
{
|
|
||||||
return BusAkToSst;
|
|
||||||
}
|
|
||||||
|
|
||||||
private void SetSr1ToIntRM(bool value)
|
|
||||||
{
|
|
||||||
Sr1ToIntRM = value;
|
|
||||||
}
|
|
||||||
|
|
||||||
private void SetSr2ToBusRq(bool value)
|
|
||||||
{
|
|
||||||
Sr2ToBusRq = value;
|
|
||||||
}
|
|
||||||
|
|
||||||
private void SetBusAkToSst(bool value)
|
|
||||||
{
|
|
||||||
BusAkToSst = value;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
public void LoadExecutiveRom()
|
public void LoadExecutiveRom()
|
||||||
|
@ -87,22 +62,15 @@ namespace BizHawk.Emulation.Consoles.Intellivision
|
||||||
Cpu = new CP1610();
|
Cpu = new CP1610();
|
||||||
Cpu.ReadMemory = ReadMemory;
|
Cpu.ReadMemory = ReadMemory;
|
||||||
Cpu.WriteMemory = WriteMemory;
|
Cpu.WriteMemory = WriteMemory;
|
||||||
Cpu.GetIntRM = GetSr1ToIntRM;
|
|
||||||
Cpu.GetBusRq = GetSr2ToBusRq;
|
|
||||||
Cpu.GetBusAk = GetBusAkToSst;
|
|
||||||
Cpu.SetBusAk = SetBusAkToSst;
|
|
||||||
Cpu.Reset();
|
Cpu.Reset();
|
||||||
|
|
||||||
Stic = new STIC();
|
Stic = new STIC();
|
||||||
Stic.GetSr1 = GetSr1ToIntRM;
|
|
||||||
Stic.GetSr2 = GetSr2ToBusRq;
|
|
||||||
Stic.GetSst = GetBusAkToSst;
|
|
||||||
Stic.SetSr1 = SetSr1ToIntRM;
|
|
||||||
Stic.SetSr2 = SetSr2ToBusRq;
|
|
||||||
Stic.Reset();
|
Stic.Reset();
|
||||||
|
|
||||||
Psg = new PSG();
|
Psg = new PSG();
|
||||||
|
|
||||||
|
Connect();
|
||||||
|
|
||||||
CoreOutputComm = new CoreOutputComm();
|
CoreOutputComm = new CoreOutputComm();
|
||||||
|
|
||||||
Cpu.LogData();
|
Cpu.LogData();
|
||||||
|
@ -110,7 +78,14 @@ namespace BizHawk.Emulation.Consoles.Intellivision
|
||||||
|
|
||||||
public void FrameAdvance(bool render)
|
public void FrameAdvance(bool render)
|
||||||
{
|
{
|
||||||
Cpu.Execute(999);
|
Cpu.AddPendingCycles(999);
|
||||||
|
while (Cpu.GetPendingCycles() > 0)
|
||||||
|
{
|
||||||
|
Cpu.Execute();
|
||||||
|
Stic.Execute();
|
||||||
|
Connect();
|
||||||
|
Cpu.LogData();
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
|
@ -7,25 +7,30 @@ namespace BizHawk.Emulation.Consoles.Intellivision
|
||||||
{
|
{
|
||||||
public sealed class STIC
|
public sealed class STIC
|
||||||
{
|
{
|
||||||
private bool Fgbg = false;
|
private bool Sr1, Sr2, Sst, Fgbg = false;
|
||||||
private ushort[] Register = new ushort[64];
|
private ushort[] Register = new ushort[64];
|
||||||
|
|
||||||
public Func<bool> GetSr1;
|
|
||||||
public Func<bool> GetSr2;
|
|
||||||
public Func<bool> GetSst;
|
|
||||||
public Action<bool> SetSr1;
|
|
||||||
public Action<bool> SetSr2;
|
|
||||||
|
|
||||||
private bool Sr1 { set { SetSr1(value); } }
|
|
||||||
private bool Sr2 { set { SetSr2(value); } }
|
|
||||||
private bool Sst { get { return GetSst(); } }
|
|
||||||
|
|
||||||
public void Reset()
|
public void Reset()
|
||||||
{
|
{
|
||||||
Sr1 = true;
|
Sr1 = true;
|
||||||
Sr2 = true;
|
Sr2 = true;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
public bool GetSr1()
|
||||||
|
{
|
||||||
|
return Sr1;
|
||||||
|
}
|
||||||
|
|
||||||
|
public bool GetSr2()
|
||||||
|
{
|
||||||
|
return Sr2;
|
||||||
|
}
|
||||||
|
|
||||||
|
public void SetSst(bool value)
|
||||||
|
{
|
||||||
|
Sst = value;
|
||||||
|
}
|
||||||
|
|
||||||
public ushort? ReadSTIC(ushort addr)
|
public ushort? ReadSTIC(ushort addr)
|
||||||
{
|
{
|
||||||
switch (addr & 0xF000)
|
switch (addr & 0xF000)
|
||||||
|
@ -120,5 +125,10 @@ namespace BizHawk.Emulation.Consoles.Intellivision
|
||||||
}
|
}
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
public void Execute()
|
||||||
|
{
|
||||||
|
Sr1 = false;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue