ZXHawk: more prep for contended 128k/+2/+2a/+3
This commit is contained in:
parent
83bbb83c64
commit
25fe4a7a87
|
@ -237,10 +237,66 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
|
||||||
switch (machineType)
|
switch (machineType)
|
||||||
{
|
{
|
||||||
case MachineType.ZXSpectrum16:
|
case MachineType.ZXSpectrum16:
|
||||||
case MachineType.ZXSpectrum48:
|
case MachineType.ZXSpectrum48:
|
||||||
|
|
||||||
|
if ((lastPortAddr & 0xc000) == 0x4000)
|
||||||
|
highByte407f = true;
|
||||||
|
|
||||||
|
if (highByte407f)
|
||||||
|
{
|
||||||
|
// high byte 40-7f
|
||||||
|
if (lowBitSet)
|
||||||
|
{
|
||||||
|
// high byte 40-7f
|
||||||
|
// low bit set
|
||||||
|
// C:1, C:1, C:1, C:1
|
||||||
|
switch (T)
|
||||||
|
{
|
||||||
|
case 1:
|
||||||
|
case 2:
|
||||||
|
case 3:
|
||||||
|
case 4:
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
// high byte 40-7f
|
||||||
|
// low bit reset
|
||||||
|
// C:1, C:3
|
||||||
|
switch (T)
|
||||||
|
{
|
||||||
|
case 1:
|
||||||
|
case 2:
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
// high byte not 40-7f
|
||||||
|
if (lowBitSet)
|
||||||
|
{
|
||||||
|
// high byte not 40-7f
|
||||||
|
// low bit set
|
||||||
|
// N:4
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
// high byte not 40-7f
|
||||||
|
// low bit reset
|
||||||
|
// N:1, C:3
|
||||||
|
switch (T)
|
||||||
|
{
|
||||||
|
case 2:
|
||||||
|
return true;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
case MachineType.ZXSpectrum128:
|
case MachineType.ZXSpectrum128:
|
||||||
case MachineType.ZXSpectrum128Plus2:
|
case MachineType.ZXSpectrum128Plus2:
|
||||||
|
|
||||||
if ((lastPortAddr & 0xc000) == 0x4000)
|
if ((lastPortAddr & 0xc000) == 0x4000)
|
||||||
highByte407f = true;
|
highByte407f = true;
|
||||||
|
|
||||||
|
@ -299,6 +355,8 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
|
||||||
|
|
||||||
case MachineType.ZXSpectrum128Plus2a:
|
case MachineType.ZXSpectrum128Plus2a:
|
||||||
case MachineType.ZXSpectrum128Plus3:
|
case MachineType.ZXSpectrum128Plus3:
|
||||||
|
// No contention occurs as the ULA only applies contention when the Z80 MREQ line is active
|
||||||
|
// (which is not during an IO operation)
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -88,6 +88,16 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
|
||||||
/// </summary>
|
/// </summary>
|
||||||
public int InterruptLength;
|
public int InterruptLength;
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Arbitrary offset into the contention array (for memory ops)
|
||||||
|
/// </summary>
|
||||||
|
public int MemoryContentionOffset;
|
||||||
|
|
||||||
|
/// <summary>
|
||||||
|
/// Arbitrary offset into the contention array (for port ops)
|
||||||
|
/// </summary>
|
||||||
|
public int PortContentionOffset;
|
||||||
|
|
||||||
/// <summary>
|
/// <summary>
|
||||||
/// The time in T-States for one scanline to complete
|
/// The time in T-States for one scanline to complete
|
||||||
/// </summary>
|
/// </summary>
|
||||||
|
@ -776,8 +786,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
|
||||||
/// <returns></returns>
|
/// <returns></returns>
|
||||||
public int GetContentionValue(int tstate)
|
public int GetContentionValue(int tstate)
|
||||||
{
|
{
|
||||||
int off = 5;
|
tstate += MemoryContentionOffset;
|
||||||
tstate += off;
|
|
||||||
if (tstate >= FrameCycleLength)
|
if (tstate >= FrameCycleLength)
|
||||||
tstate -= FrameCycleLength;
|
tstate -= FrameCycleLength;
|
||||||
|
|
||||||
|
@ -793,8 +802,7 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
|
||||||
/// <returns></returns>
|
/// <returns></returns>
|
||||||
public int GetPortContentionValue(int tstate)
|
public int GetPortContentionValue(int tstate)
|
||||||
{
|
{
|
||||||
int off = 5;
|
tstate += PortContentionOffset;
|
||||||
tstate += off;
|
|
||||||
if (tstate >= FrameCycleLength)
|
if (tstate >= FrameCycleLength)
|
||||||
tstate -= FrameCycleLength;
|
tstate -= FrameCycleLength;
|
||||||
|
|
||||||
|
|
|
@ -20,6 +20,9 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
|
||||||
InterruptLength = 36;
|
InterruptLength = 36;
|
||||||
ScanlineTime = 228;
|
ScanlineTime = 228;
|
||||||
|
|
||||||
|
MemoryContentionOffset = 5;
|
||||||
|
PortContentionOffset = 5;
|
||||||
|
|
||||||
BorderLeftTime = 24;
|
BorderLeftTime = 24;
|
||||||
BorderRightTime = 24;
|
BorderRightTime = 24;
|
||||||
|
|
||||||
|
|
|
@ -20,6 +20,9 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
|
||||||
InterruptLength = 32;
|
InterruptLength = 32;
|
||||||
ScanlineTime = 228;
|
ScanlineTime = 228;
|
||||||
|
|
||||||
|
MemoryContentionOffset = 7;
|
||||||
|
PortContentionOffset = 7;
|
||||||
|
|
||||||
BorderLeftTime = 24;
|
BorderLeftTime = 24;
|
||||||
BorderRightTime = 24;
|
BorderRightTime = 24;
|
||||||
|
|
||||||
|
|
|
@ -20,6 +20,9 @@ namespace BizHawk.Emulation.Cores.Computers.SinclairSpectrum
|
||||||
InterruptLength = 32;
|
InterruptLength = 32;
|
||||||
ScanlineTime = 224;
|
ScanlineTime = 224;
|
||||||
|
|
||||||
|
MemoryContentionOffset = 5;
|
||||||
|
PortContentionOffset = 5;
|
||||||
|
|
||||||
BorderLeftTime = 24;
|
BorderLeftTime = 24;
|
||||||
BorderRightTime = 24;
|
BorderRightTime = 24;
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue