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BizHawk
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This commit is contained in:
alyosha-tas 2017-10-13 11:07:02 -04:00 committed by GitHub
parent fc0a251040
commit 258688ebdd
3 changed files with 25 additions and 22 deletions
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2
BizHawk.Emulation.Cores/CPUs/Z80A/Execute.cs
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@ -593,7 +593,7 @@ namespace BizHawk.Emulation.Common.Components.Z80A
case 0x5C: INT_OP(NEG, A); break; // NEG
case 0x5D: RETN_(); break; // RETI
case 0x5E: INT_MODE_(2); break; // IM $0
case 0x5F: REG_OP_IR(TR, A, R); break; // LD R, A
case 0x5F: REG_OP_IR(TR, A, R); break; // LD A, R
case 0x60: IN_REG_(H, C); break; // IN H, (C)
case 0x61: OUT_REG_(C, H); break; // OUT (C), H
case 0x62: REG_OP_16_(SBC16, L, H, L, H); break; // SBC HL, HL

28
BizHawk.Emulation.Cores/CPUs/Z80A/Operations.cs
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@ -12,17 +12,27 @@ namespace BizHawk.Emulation.Common.Components.Z80A
public void I_Read_Func(ushort dest, ushort src_l, ushort src_h, ushort inc)
{
Regs[dest] = ReadMemory((ushort)((Regs[src_l] | (Regs[src_h]) << 8) + inc));
Regs[dest] = ReadMemory((ushort)((Regs[src_l] | (Regs[src_h] << 8)) + inc));
}
public void Write_Func(ushort dest_l, ushort dest_h, ushort src)
{
WriteMemory((ushort)(Regs[dest_l] | (Regs[dest_h]) << 8), (byte)Regs[src]);
WriteMemory((ushort)(Regs[dest_l] | (Regs[dest_h] << 8)), (byte)Regs[src]);
}
public void I_Write_Func(ushort dest_l, ushort dest_h, ushort inc, ushort src)
{
WriteMemory((ushort)((Regs[dest_l] | (Regs[dest_h] + inc)) << 8), (byte)Regs[src]);
WriteMemory((ushort)((Regs[dest_l] | (Regs[dest_h] << 8)) + inc), (byte)Regs[src]);
}
public void OUT_Func(ushort dest, ushort src)
{
WriteHardware(Regs[dest], (byte)(Regs[src]));
}
public void IN_Func(ushort dest, ushort src)
{
Regs[dest] = ReadHardware(Regs[src]);
}
public void TR_Func(ushort dest, ushort src)
@ -260,7 +270,7 @@ namespace BizHawk.Emulation.Common.Components.Z80A
public void XOR8_Func(ushort dest, ushort src)
{
Regs[dest] = (ushort)(Regs[dest] ^ Regs[src]);
Regs[dest] = (ushort)((Regs[dest] ^ Regs[src]));
FlagZ = Regs[dest] == 0;
FlagC = false;
@ -582,16 +592,6 @@ namespace BizHawk.Emulation.Common.Components.Z80A
Regs[src_h] = temp;
}
public void OUT_Func(ushort dest, ushort src)
{
WriteHardware(Regs[dest], (byte)(Regs[src]));
}
public void IN_Func(ushort dest, ushort src)
{
Regs[dest] = ReadHardware(Regs[src]);
}
public void SBC_16_Func(ushort dest_l, ushort dest_h, ushort src_l, ushort src_h)
{
int Reg16_d = Regs[dest_l] | (Regs[dest_h] << 8);

17
BizHawk.Emulation.Cores/CPUs/Z80A/Z80A.cs
View File

@ -138,6 +138,7 @@ namespace BizHawk.Emulation.Common.Components.Z80A
// Execute instructions
public void ExecuteOne()
{
if (Regs[A] > 255) { Console.WriteLine(RegPC); }
switch (cur_instr[instr_pntr++])
{
case IDLE:
@ -172,7 +173,6 @@ namespace BizHawk.Emulation.Common.Components.Z80A
iff1 = false;
NMI_();
NMICallback();
}
else if (iff1 && FlagI && NO_prefix)
{
@ -213,6 +213,7 @@ namespace BizHawk.Emulation.Common.Components.Z80A
}
instr_pntr = 0;
Regs[R]++;
Regs[R] &= 0xFF;
break;
case OP_R:
// determine if we repeat based on what operation we are doing
@ -243,7 +244,6 @@ namespace BizHawk.Emulation.Common.Components.Z80A
// if we don't repeat, continue on as a normal opcode fetch
if (repeat && temp3 > 0)
{
instr_pntr = 0;
cur_instr = new ushort[]
{IDLE,
DEC16, PCl, PCh,
@ -278,7 +278,7 @@ namespace BizHawk.Emulation.Common.Components.Z80A
{
// Interrupts can occur at this point, so process them accordingly
// Read the opcode of the next instruction
if (EI_pending > 0)
if (EI_pending > 0 && NO_prefix)
{
EI_pending--;
if (EI_pending == 0)
@ -343,10 +343,11 @@ namespace BizHawk.Emulation.Common.Components.Z80A
if (OnExecFetch != null) OnExecFetch(RegPC);
if (TraceCallback != null) TraceCallback(State());
FetchInstruction(ReadMemory(RegPC++));
instr_pntr = 0;
Regs[R]++;
Regs[R] &= 0xFF;
}
}
instr_pntr = 0;
break;
case HALT:
@ -378,7 +379,7 @@ namespace BizHawk.Emulation.Common.Components.Z80A
iff1 = false;
NMI_();
NMICallback();
halted = false;
}
else if (iff1 && FlagI && NO_prefix)
{
@ -410,11 +411,13 @@ namespace BizHawk.Emulation.Common.Components.Z80A
break;
}
IRQCallback();
halted = false;
}
else
{
instr_pntr = 0;
Regs[R]++;
Regs[R] &= 0xFF;
cur_instr = new ushort[]
{IDLE,
IDLE,
@ -538,7 +541,6 @@ namespace BizHawk.Emulation.Common.Components.Z80A
break;
case DI:
IFF1 = IFF2 = false;
EI_pending = 0;
break;
case EXCH:
EXCH_16_Func(F_s, A_s, F, A);
@ -561,6 +563,7 @@ namespace BizHawk.Emulation.Common.Components.Z80A
if (prefix_src == IXCBpre) { IXCB_prefix = true; IXCB_prefetch = true; }
if (prefix_src == IYCBpre) { IYCB_prefix = true; IYCB_prefetch = true; }
Regs[R]++;
Regs[R] &= 0xFF;
break;
case ASGN:
ASGN_Func(cur_instr[instr_pntr++], cur_instr[instr_pntr++]);
@ -577,7 +580,7 @@ namespace BizHawk.Emulation.Common.Components.Z80A
// Not currently implemented here
break;
case EI_RETN:
EI_pending = 1;
iff1 = iff2;
break;
case OUT:
OUT_Func(cur_instr[instr_pntr++], cur_instr[instr_pntr++]);