O2Hawk: Mostly fix 4 in a row

Assets/gamedb/gamedb_Odyssey2.txt

@@ -56,7 +56,7 @@ SHA1:BCD2DEEEED9283FF585D644993494961F0ACC46D	D	Mr Roboto	O2			US
 1E7035584D19AAA53EB3795D92FA6215		Computer Intro (1980)(Philips)(US)	O2			US
 908E01082D7E30B7CE79DF2DD85ACFED		Computer Programmer (1980)(Philips)(EU)	O2			EU
 84AE1A8159716266F7AAE16AD7DFD062		Keyboard Creations (1980)(Philips)(US)	O2			US
-F93D43B0E30539BA6FAB14CE6A57AAE3		Musician (1981)(Philips)(EU)	O2			EU
+F93D43B0E30539BA6FAB14CE6A57AAE3		Musician (1981)(Philips)(EU)	O2		XROM	EU
 F2EDA19FFC8E52C5C2D13C7106A06303		Newscaster (1980)(Philips)(EU)	O2			EU
 49ABEE5DDD1B475FE4CBB997F7EE83EF		Type & Tell (1978)(Philips)(US)	O2			US
 ;;;;;;;;;;--------------------------------------------------;;;;;;;;;;
@@ -158,8 +158,8 @@ A465615508DFB5EA1C5B0E18C97711A5		Verkehrsspiele Traffic Games 2 (1982)(CSV - Ph
 ;;;;;;;;;;--------------------------------------------------;;;;;;;;;;
 ;;; Believed Good
 ;;;;;;;;;;--------------------------------------------------;;;;;;;;;;
-66E27CF1A0CDC9AD19AE20B537C4D3D8		4 en 1 Ligne (1982)(Philips)(FR)	O2			FR
+66E27CF1A0CDC9AD19AE20B537C4D3D8		4 en 1 Ligne (1982)(Philips)(FR)	O2		XROM	FR
-61923D4FA32F8A6C3531A77031BD1494		4 in 1 Row (1982)(Philips)(EU)	O2			EU
+61923D4FA32F8A6C3531A77031BD1494		4 in 1 Row (1982)(Philips)(EU)	O2		XROM	EU
 4D6CFB7DA66C8D9327B3CCDCE9852509		Alien Invaders - Plus (1980)(Philips)(EU-US)	O2			EU-US
 55D7B6575645BFB5890A39491F823FEA		Alpine Skiing (1980)(Philips)(EU-US)	O2			EU-US
 2D0D4CD8E699FCF97CAC366B867420F6		Amok (1998)(Dondzilla, John)	O2	

src/BizHawk.Emulation.Cores/CPUs/Intel8048/I8048.cs

@@ -327,7 +327,7 @@ namespace BizHawk.Emulation.Cores.Components.I8048
 					Regs[reg_d_ad] = (ushort)((Regs[reg_d_ad] + 1) & 0xFF);
 					break;
 				case RES_TF:
-					TF = false;
+					if (test_pass) { TF = false; }				
 					break;
 				case SET_ADDR_M3:
 					Regs[ALU] &= 0xFF;
@@ -423,7 +423,7 @@ namespace BizHawk.Emulation.Cores.Components.I8048
 				case TEST_COND:
 					reg_d_ad = cur_instr[instr_pntr++];
 
-					bool test_pass = true;
+					test_pass = true;
 					if ((reg_d_ad == 0) && !TF) { test_pass = false; }
 					if ((reg_d_ad == 1) && T0) { test_pass = false; }
 					if ((reg_d_ad == 2) && !T0) { test_pass = false; }
@@ -488,7 +488,7 @@ namespace BizHawk.Emulation.Cores.Components.I8048
 						if (TimIntEn)
 						{
 							TIRQPending = true;
-							//Console.WriteLine("Timer: " + TotalExecutedCycles);
+							// Console.WriteLine("Timer: " + LY + " " + TotalExecutedCycles);
 						}
 					}
 					Regs[TIM] = (ushort)((Regs[TIM] + 1) & 0xFF);
@@ -506,7 +506,7 @@ namespace BizHawk.Emulation.Cores.Components.I8048
 						if (TimIntEn)
 						{
 							TIRQPending = true;
-							//Console.WriteLine("Counter: " + TotalExecutedCycles);
+							// Console.WriteLine("Counter: " + LY + " " + TotalExecutedCycles);
 						}
 					}
 					Regs[TIM] = (ushort)((Regs[TIM] + 1) & 0xFF);
@@ -584,6 +584,7 @@ namespace BizHawk.Emulation.Cores.Components.I8048
 			ser.Sync(nameof(IRQPending), ref IRQPending);
 			ser.Sync(nameof(TIRQPending), ref TIRQPending);
 			ser.Sync(nameof(INT_MSTR), ref INT_MSTR);
+			ser.Sync(nameof(test_pass), ref test_pass);
 
 			ser.Sync(nameof(instr_pntr), ref instr_pntr);
 			ser.Sync(nameof(cur_instr), ref cur_instr, false);

src/BizHawk.Emulation.Cores/CPUs/Intel8048/Interrupts.cs

@@ -34,6 +34,7 @@ namespace BizHawk.Emulation.Cores.Components.I8048
 		public bool IntEn;
 		public bool TimIntEn;
 		public bool INT_MSTR;
+		public bool test_pass;
 
 		public Action IRQCallback = () => {};
 

src/BizHawk.Emulation.Cores/Consoles/Magnavox/Odyssey2/Mappers/Mapper_XROM.cs

@@ -0,0 +1,37 @@
+using BizHawk.Common;
+using BizHawk.Emulation.Cores.Components.I8048;
+
+namespace BizHawk.Emulation.Cores.Consoles.O2Hawk
+{
+	// XROM mapper, 3KB ROM and 1KB data accessible through port 0
+	public class MapperXROM : MapperBase
+	{
+		public int ROM_mask;
+		
+		public override void Initialize()
+		{
+			// XROM has data instructions from 0x400-0xFFF
+			ROM_mask = 0xFFF;
+		}
+
+		public override byte ReadMemory(ushort addr)
+		{
+			return Core._rom[(addr + 0x400) & ROM_mask];
+		}
+
+		public override void MapCDL(ushort addr, I8048.eCDLogMemFlags flags)
+		{
+			SetCDLROM(flags, addr);
+		}
+
+		public override void WriteMemory(ushort addr, byte value)
+		{
+			// no mapping hardware available
+		}
+
+		public override void SyncState(Serializer ser)
+		{
+			ser.Sync(nameof(ROM_mask), ref ROM_mask);
+		}
+	}
+}

src/BizHawk.Emulation.Cores/Consoles/Magnavox/Odyssey2/MemoryMap.cs

@@ -76,33 +76,38 @@ namespace BizHawk.Emulation.Cores.Consoles.O2Hawk
 					return 0;
 				}
 
-				if (ppu_en)
+				if (ppu_en && !copy_en)
 				{
 					return ppu.ReadReg(addr_latch);
 				}
 
-				if (vpp_en)
+				if (vpp_en && is_G7400)
 				{
 					return ppu.ReadRegVPP(addr_latch);
 				}
 
+				if (cart_b1 && is_XROM)
+				{
+					return _rom[((kb_byte & 3) << 8) + addr_latch];
+				}
+
 				// if neither RAM or PPU is enabled, then a RD pulse from instruction IN A,BUS will latch controller
 				// onto the bus, but only if they are enabled correctly using port 2
 				if (kybrd_en)
 				{
 					_islag = false;
-					if ((kb_byte & 7) == 1)
+					if ((kb_byte & 1) == 1)
 					{
 						return controller_state_1;
 					}
-					if ((kb_byte & 7) == 0)
+					if ((kb_byte & 1) == 0)
 					{
 						return controller_state_2;
 					}
 				}
 
-				Console.WriteLine(cpu.TotalExecutedCycles);
 				// not sure what happens if this case is reached, probably whatever the last value on the bus is
+				// Console.WriteLine("Bad read: " + addr_latch + " " + cpu.TotalExecutedCycles);
 				return 0;
 			}
 
@@ -175,6 +180,9 @@ namespace BizHawk.Emulation.Cores.Consoles.O2Hawk
 				rom_bank = (ushort)(cart_b0 ? 1 : 0);
 				rom_bank |= (ushort)(cart_b1 ? 2 : 0);
 				//rom_bank = (ushort)(rom_bank << 12);
+				
+				// XROM uses cart_b1 for read enable, not bank switch
+				if (is_XROM) { rom_bank = 0; }
 
 				ppu.bg_brightness = !ppu.lum_en ? 8 : 0;
 				ppu.grid_brightness = (!ppu.lum_en | ppu.VDC_color.Bit(6)) ? 8 : 0;

src/BizHawk.Emulation.Cores/Consoles/Magnavox/Odyssey2/O2Hawk.cs

@@ -43,6 +43,8 @@ namespace BizHawk.Emulation.Cores.Consoles.O2Hawk
 		public bool is_pal;
 		public bool is_G7400;
 
+		public bool is_XROM;
+
 		[CoreConstructor("O2")]
 		public O2Hawk(CoreComm comm, GameInfo game, byte[] rom, O2Settings settings, O2SyncSettings syncSettings)
 		{
@@ -82,6 +84,8 @@ namespace BizHawk.Emulation.Cores.Consoles.O2Hawk
 			Console.WriteLine("MD5: " + rom.HashMD5(0, rom.Length));
 			Console.WriteLine("SHA1: " + rom.HashSHA1(0, rom.Length));
 			_rom = rom;
+
+			if (game["XROM"]) { is_XROM = true; }
 			Setup_Mapper();
 
 			_frameHz = 60;
@@ -167,10 +171,20 @@ namespace BizHawk.Emulation.Cores.Consoles.O2Hawk
 
 		private void Setup_Mapper()
 		{
-			mapper = new MapperDefault
+			if (is_XROM)
 			{
-				Core = this
+				mapper = new MapperXROM
-			};
+				{
+					Core = this
+				};
+			}
+			else
+			{
+				mapper = new MapperDefault
+				{
+					Core = this
+				};
+			}
 
 			mapper.Initialize();
 

src/BizHawk.Emulation.Cores/Consoles/Magnavox/Odyssey2/PPU.cs

@@ -219,6 +219,7 @@ namespace BizHawk.Emulation.Cores.Consoles.O2Hawk
 			else if (addr < 0xA0)
 			{
 				Sprite_Shapes[addr - 0x80] = value;
+				//Console.WriteLine("spr: " + addr + " " + value + " " + Core.cpu.TotalExecutedCycles);
 			}
 			else if (addr == 0xA0)
 			{