commodore64- fixed VIC interrupts not being cleared

This commit is contained in:
saxxonpike 2012-11-06 15:32:14 +00:00
parent 47a556b326
commit 13b6498ca9
1 changed files with 12 additions and 9 deletions

View File

@ -797,11 +797,7 @@ namespace BizHawk.Emulation.Computers.Commodore64
rasterOffsetX++; rasterOffsetX++;
} }
// check for anything that would've triggered an interrupt and raise the flag if so UpdateInterrupts();
if ((regs.IRST & regs.ERST) || (regs.IMMC & regs.EMMC) || (regs.IMBC & regs.EMBC) || (regs.ILP & regs.ELP))
{
regs.IRQ = true;
}
signal.VicIRQ = regs.IRQ; signal.VicIRQ = regs.IRQ;
@ -920,6 +916,12 @@ namespace BizHawk.Emulation.Computers.Commodore64
borderRight = regs.CSEL ? 0x157 : 0x14E; borderRight = regs.CSEL ? 0x157 : 0x14E;
} }
public void UpdateInterrupts()
{
// check for anything that would've triggered an interrupt and raise the flag if so
regs.IRQ = ((regs.IRST & regs.ERST) || (regs.IMMC & regs.EMMC) || (regs.IMBC & regs.EMBC) || (regs.ILP & regs.ELP));
}
public void Write(ushort addr, byte val) public void Write(ushort addr, byte val)
{ {
addr &= 0x3F; addr &= 0x3F;
@ -946,14 +948,15 @@ namespace BizHawk.Emulation.Computers.Commodore64
break; break;
case 0x19: case 0x19:
// only allow clearing of these flags // only allow clearing of these flags
if ((val & 0x01) == 0x00) if ((val & 0x01) != 0x00)
regs.IRST = false; regs.IRST = false;
if ((val & 0x02) == 0x00) if ((val & 0x02) != 0x00)
regs.IMBC = false; regs.IMBC = false;
if ((val & 0x04) == 0x00) if ((val & 0x04) != 0x00)
regs.IMMC = false; regs.IMMC = false;
if ((val & 0x08) == 0x00) if ((val & 0x08) != 0x00)
regs.ILP = false; regs.ILP = false;
UpdateInterrupts();
break; break;
case 0x1E: case 0x1E:
case 0x1F: case 0x1F: