-My jumping seems to work, so I enabled it in Execute.
-Finished the disassembler except for branching. -Merged the XXXI instructions with XXX@ for R7 as the address register as they are redundant.
This commit is contained in:
brandman211
parent
7cb69f4826
commit
10274734f9
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@ -12,7 +12,7 @@ namespace BizHawk.Emulation.CPUs.CP1610
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public string Disassemble(ushort pc, out int bytesToAdvance)
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{
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bytesToAdvance = 1;
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byte register;
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byte register1, register2;
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int second, third, op1, op2;
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string result = "";
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int opcode = ReadMemory(pc) & 0x3FF;
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@ -31,13 +31,13 @@ namespace BizHawk.Emulation.CPUs.CP1610
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second = ReadMemory((ushort)(pc + 1));
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third = ReadMemory((ushort)(pc + 2));
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// rr indicates the register into which to store the return address
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register = (byte)(((second >> 8) & 0x3) + 4);
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register1 = (byte)(((second >> 8) & 0x3) + 4);
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// ff indicates how to affect the Interrupt (I) flag in the CP1610
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op1 = second & 0x3;
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// aaaaaaaaaaaaaaaa indicates the address to where the CP1610 should Jump
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op2 = ((second << 8) & 0xFC00) | (third & 0x3FF);
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result = "J";
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if (register != 0x7)
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if (register1 != 0x7)
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result += "SR";
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switch (op1)
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{
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@ -51,8 +51,8 @@ namespace BizHawk.Emulation.CPUs.CP1610
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// Unknown opcode.
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return UNKNOWN;
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}
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if (register != 0x3)
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result += " R" + register + ",";
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if (register1 != 0x3)
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result += " R" + register1 + ",";
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result += string.Format(" ${0:X4}", op2);
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bytesToAdvance = 3;
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return result;
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@ -70,8 +70,8 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x00D:
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case 0x00E:
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case 0x00F:
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register = (byte)(opcode & 0x7);
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return "INCR R" + register;
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register1 = (byte)(opcode & 0x7);
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return "INCR R" + register1;
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case 0x010:
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case 0x011:
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case 0x012:
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@ -80,8 +80,8 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x015:
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case 0x016:
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case 0x017:
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register = (byte)(opcode & 0x7);
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return "DECR R" + register;
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register1 = (byte)(opcode & 0x7);
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return "DECR R" + register1;
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case 0x018:
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case 0x019:
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case 0x01A:
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@ -90,8 +90,8 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x01D:
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case 0x01E:
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case 0x01F:
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register = (byte)(opcode & 0x7);
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return "COMR R" + register;
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register1 = (byte)(opcode & 0x7);
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return "COMR R" + register1;
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case 0x020:
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case 0x021:
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case 0x022:
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@ -100,8 +100,8 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x025:
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case 0x026:
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case 0x027:
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register = (byte)(opcode & 0x7);
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return "NEGR R" + register;
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register1 = (byte)(opcode & 0x7);
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return "NEGR R" + register1;
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case 0x028:
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case 0x029:
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case 0x02A:
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@ -110,14 +110,14 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x02D:
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case 0x02E:
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case 0x02F:
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register = (byte)(opcode & 0x7);
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return "ADCR R" + register;
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register1 = (byte)(opcode & 0x7);
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return "ADCR R" + register1;
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case 0x030:
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case 0x031:
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case 0x032:
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case 0x033:
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register = (byte)(opcode & 0x3);
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return "GSWD R" + register;
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register1 = (byte)(opcode & 0x3);
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return "GSWD R" + register1;
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case 0x034:
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case 0x035:
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return "NOP";
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@ -132,8 +132,8 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x03D:
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case 0x03E:
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case 0x03F:
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register = (byte)(opcode & 0x7);
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return "RSWD R" + register;
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register1 = (byte)(opcode & 0x7);
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return "RSWD R" + register1;
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case 0x040:
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case 0x041:
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case 0x042:
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@ -142,9 +142,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x045:
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case 0x046:
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case 0x047:
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register = (byte)(opcode & 0x3);
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register1 = (byte)(opcode & 0x3);
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op1 = opcode & 0x4;
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return "SWAP R" + register + ", " + (op1 + 1);
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return "SWAP R" + register1 + ", " + (op1 + 1);
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case 0x048:
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case 0x049:
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case 0x04A:
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@ -153,9 +153,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x04D:
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case 0x04E:
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case 0x04F:
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register = (byte)(opcode & 0x3);
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register1 = (byte)(opcode & 0x3);
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op1 = opcode & 0x4;
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return "SLL R" + register + ", " + (op1 + 1);
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return "SLL R" + register1 + ", " + (op1 + 1);
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case 0x050:
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case 0x051:
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case 0x052:
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@ -164,9 +164,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x055:
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case 0x056:
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case 0x057:
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register = (byte)(opcode & 0x3);
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register1 = (byte)(opcode & 0x3);
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op1 = opcode & 0x4;
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return "RLC R" + register + ", " + (op1 + 1);
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return "RLC R" + register1 + ", " + (op1 + 1);
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case 0x058:
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case 0x059:
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case 0x05A:
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@ -175,9 +175,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x05D:
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case 0x05E:
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case 0x05F:
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register = (byte)(opcode & 0x3);
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register1 = (byte)(opcode & 0x3);
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op1 = opcode & 0x4;
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return "SLLC R" + register + ", " + (op1 + 1);
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return "SLLC R" + register1 + ", " + (op1 + 1);
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case 0x060:
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case 0x061:
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case 0x062:
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@ -186,9 +186,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x065:
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case 0x066:
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case 0x067:
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register = (byte)(opcode & 0x3);
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register1 = (byte)(opcode & 0x3);
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op1 = opcode & 0x4;
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return "SLR R" + register + ", " + (op1 + 1);
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return "SLR R" + register1 + ", " + (op1 + 1);
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case 0x068:
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case 0x069:
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case 0x06A:
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@ -197,9 +197,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x06D:
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case 0x06E:
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case 0x06F:
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register = (byte)(opcode & 0x3);
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register1 = (byte)(opcode & 0x3);
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op1 = opcode & 0x4;
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return "SAR R" + register + ", " + (op1 + 1);
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return "SAR R" + register1 + ", " + (op1 + 1);
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case 0x070:
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case 0x071:
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case 0x072:
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@ -208,9 +208,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x075:
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case 0x076:
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case 0x077:
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register = (byte)(opcode & 0x3);
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register1 = (byte)(opcode & 0x3);
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op1 = opcode & 0x4;
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return "RRC R" + register + ", " + (op1 + 1);
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return "RRC R" + register1 + ", " + (op1 + 1);
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case 0x078:
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case 0x079:
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case 0x07A:
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@ -219,10 +219,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x07D:
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case 0x07E:
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case 0x07F:
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register = (byte)(opcode & 0x3);
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register1 = (byte)(opcode & 0x3);
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op1 = opcode & 0x4;
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return "SARC R" + register + ", " + (op1 + 1);
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// MOVR
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return "SARC R" + register1 + ", " + (op1 + 1);
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case 0x080:
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case 0x081:
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case 0x082:
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@ -287,8 +286,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x0BD:
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case 0x0BE:
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case 0x0BF:
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throw new NotImplementedException();
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// ADDR
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register1 = (byte)((opcode >> 3) & 0x7);
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register2 = (byte)(opcode & 0x7);
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return "MOVR R" + register1 + ", R" + register2;
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case 0x0C0:
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case 0x0C1:
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case 0x0C2:
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@ -353,8 +353,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x0FD:
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case 0x0FE:
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case 0x0FF:
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throw new NotImplementedException();
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// SUBR
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register1 = (byte)((opcode >> 3) & 0x7);
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register2 = (byte)(opcode & 0x7);
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return "ADDR R" + register1 + ", R" + register2;
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case 0x100:
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case 0x101:
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case 0x102:
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@ -419,8 +420,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x13D:
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case 0x13E:
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case 0x13F:
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throw new NotImplementedException();
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// CMPR
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register1 = (byte)((opcode >> 3) & 0x7);
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register2 = (byte)(opcode & 0x7);
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return "SUBR R" + register1 + ", R" + register2;
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case 0x140:
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case 0x141:
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case 0x142:
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@ -485,8 +487,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x17D:
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case 0x17E:
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case 0x17F:
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throw new NotImplementedException();
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// ANDR
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register1 = (byte)((opcode >> 3) & 0x7);
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register2 = (byte)(opcode & 0x7);
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return "CMPR R" + register1 + ", R" + register2;
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case 0x180:
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case 0x181:
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case 0x182:
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@ -551,8 +554,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x1BD:
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case 0x1BE:
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case 0x1BF:
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throw new NotImplementedException();
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// XORR
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register1 = (byte)((opcode >> 3) & 0x7);
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register2 = (byte)(opcode & 0x7);
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return "ANDR R" + register1 + ", R" + register2;
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case 0x1C0:
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case 0x1C1:
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case 0x1C2:
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@ -617,7 +621,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x1FD:
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case 0x1FE:
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case 0x1FF:
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throw new NotImplementedException();
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register1 = (byte)((opcode >> 3) & 0x7);
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register2 = (byte)(opcode & 0x7);
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return "XORR R" + register1 + ", R" + register2;
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// Branch Forward, no External Condition
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case 0x200: // B
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case 0x201: // BC
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@ -687,7 +693,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x23E:
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case 0x23F:
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throw new NotImplementedException();
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// MVO
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case 0x240:
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case 0x241:
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case 0x242:
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@ -696,8 +701,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x245:
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case 0x246:
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case 0x247:
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throw new NotImplementedException();
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// MVO@
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register1 = (byte)(opcode & 0x7);
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second = ReadMemory((ushort)(pc + 1));
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return "MVO R" + register1 + ", " + string.Format("${0:X4}", second);
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case 0x248:
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case 0x249:
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case 0x24A:
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@ -738,8 +744,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x26D:
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case 0x26E:
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case 0x26F:
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throw new NotImplementedException();
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// MVOI
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case 0x270:
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case 0x271:
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case 0x272:
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@ -756,8 +760,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x27D:
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case 0x27E:
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case 0x27F:
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throw new NotImplementedException();
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// MVI
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register1 = (byte)((opcode >> 3) & 0x7);
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register2 = (byte)(opcode & 0x7);
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return "MVO@ R" + register1 + ", R" + register2;
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case 0x280:
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case 0x281:
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case 0x282:
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@ -766,8 +771,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x285:
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case 0x286:
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case 0x287:
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throw new NotImplementedException();
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// MVI@
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register1 = (byte)(opcode & 0x7);
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second = ReadMemory((ushort)(pc + 1));
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return "MVI R" + register1 + ", " + string.Format("${0:X4}", second);
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case 0x288:
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case 0x289:
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case 0x28A:
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@ -808,8 +814,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x2AD:
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case 0x2AE:
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case 0x2AF:
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throw new NotImplementedException();
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// MVII
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case 0x2B0:
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case 0x2B1:
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case 0x2B2:
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@ -826,8 +830,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x2BD:
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case 0x2BE:
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case 0x2BF:
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throw new NotImplementedException();
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// ADD
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register1 = (byte)((opcode >> 3) & 0x7);
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register2 = (byte)(opcode & 0x7);
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return "MVI@ R" + register1 + ", R" + register2;
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case 0x2C0:
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case 0x2C1:
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case 0x2C2:
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@ -836,8 +841,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x2C5:
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case 0x2C6:
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case 0x2C7:
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throw new NotImplementedException();
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// ADD@
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register1 = (byte)(opcode & 0x7);
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second = ReadMemory((ushort)(pc + 1));
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return "ADD R" + register1 + ", " + string.Format("${0:X4}", second);
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case 0x2C8:
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case 0x2C9:
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case 0x2CA:
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|
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@ -878,8 +884,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x2ED:
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case 0x2EE:
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case 0x2EF:
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throw new NotImplementedException();
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// ADDI
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case 0x2F0:
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case 0x2F1:
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case 0x2F2:
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|
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@ -896,8 +900,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
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case 0x2FD:
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case 0x2FE:
|
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case 0x2FF:
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throw new NotImplementedException();
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// SUB
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register1 = (byte)((opcode >> 3) & 0x7);
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register2 = (byte)(opcode & 0x7);
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return "ADD@ R" + register1 + ", R" + register2;
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case 0x300:
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case 0x301:
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case 0x302:
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|
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@ -906,8 +911,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x305:
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case 0x306:
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case 0x307:
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throw new NotImplementedException();
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// SUB@
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register1 = (byte)(opcode & 0x7);
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second = ReadMemory((ushort)(pc + 1));
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return "SUB R" + register1 + ", " + string.Format("${0:X4}", second);
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case 0x308:
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case 0x309:
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case 0x30A:
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@ -948,8 +954,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
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case 0x32D:
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case 0x32E:
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case 0x32F:
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throw new NotImplementedException();
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// SUBI
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case 0x330:
|
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case 0x331:
|
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case 0x332:
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@ -966,10 +970,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
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case 0x33D:
|
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case 0x33E:
|
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case 0x33F:
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throw new NotImplementedException();
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default:
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throw new NotImplementedException();
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// CMP
|
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register1 = (byte)((opcode >> 3) & 0x7);
|
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register2 = (byte)(opcode & 0x7);
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return "SUB@ R" + register1 + ", R" + register2;
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case 0x340:
|
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case 0x341:
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case 0x342:
|
||||
|
|
@ -978,8 +981,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
case 0x345:
|
||||
case 0x346:
|
||||
case 0x347:
|
||||
throw new NotImplementedException();
|
||||
// CMP@
|
||||
register1 = (byte)(opcode & 0x7);
|
||||
second = ReadMemory((ushort)(pc + 1));
|
||||
return "CMP R" + register1 + ", " + string.Format("${0:X4}", second);
|
||||
case 0x348:
|
||||
case 0x349:
|
||||
case 0x34A:
|
||||
|
|
@ -1020,8 +1024,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
case 0x36D:
|
||||
case 0x36E:
|
||||
case 0x36F:
|
||||
throw new NotImplementedException();
|
||||
// CMPI
|
||||
case 0x370:
|
||||
case 0x371:
|
||||
case 0x372:
|
||||
|
|
@ -1038,8 +1040,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
case 0x37D:
|
||||
case 0x37E:
|
||||
case 0x37F:
|
||||
throw new NotImplementedException();
|
||||
// AND
|
||||
register1 = (byte)((opcode >> 3) & 0x7);
|
||||
register2 = (byte)(opcode & 0x7);
|
||||
return "CMP@ R" + register1 + ", R" + register2;
|
||||
case 0x380:
|
||||
case 0x381:
|
||||
case 0x382:
|
||||
|
|
@ -1048,8 +1051,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
case 0x385:
|
||||
case 0x386:
|
||||
case 0x387:
|
||||
throw new NotImplementedException();
|
||||
// AND@
|
||||
register1 = (byte)(opcode & 0x7);
|
||||
second = ReadMemory((ushort)(pc + 1));
|
||||
return "AND R" + register1 + ", " + string.Format("${0:X4}", second);
|
||||
case 0x388:
|
||||
case 0x389:
|
||||
case 0x38A:
|
||||
|
|
@ -1090,8 +1094,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
case 0x3AD:
|
||||
case 0x3AE:
|
||||
case 0x3AF:
|
||||
throw new NotImplementedException();
|
||||
// ANDI
|
||||
case 0x3B0:
|
||||
case 0x3B1:
|
||||
case 0x3B2:
|
||||
|
|
@ -1108,8 +1110,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
case 0x3BD:
|
||||
case 0x3BE:
|
||||
case 0x3BF:
|
||||
throw new NotImplementedException();
|
||||
// XOR
|
||||
register1 = (byte)((opcode >> 3) & 0x7);
|
||||
register2 = (byte)(opcode & 0x7);
|
||||
return "AND@ R" + register1 + ", R" + register2;
|
||||
case 0x3C0:
|
||||
case 0x3C1:
|
||||
case 0x3C2:
|
||||
|
|
@ -1118,8 +1121,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
case 0x3C5:
|
||||
case 0x3C6:
|
||||
case 0x3C7:
|
||||
throw new NotImplementedException();
|
||||
// XOR@
|
||||
register1 = (byte)(opcode & 0x7);
|
||||
second = ReadMemory((ushort)(pc + 1));
|
||||
return "XOR R" + register1 + ", " + string.Format("${0:X4}", second);
|
||||
case 0x3C8:
|
||||
case 0x3C9:
|
||||
case 0x3CA:
|
||||
|
|
@ -1160,8 +1164,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
case 0x3ED:
|
||||
case 0x3EE:
|
||||
case 0x3EF:
|
||||
throw new NotImplementedException();
|
||||
// XORI
|
||||
case 0x3F0:
|
||||
case 0x3F1:
|
||||
case 0x3F2:
|
||||
|
|
@ -1178,7 +1180,9 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
case 0x3FD:
|
||||
case 0x3FE:
|
||||
case 0x3FF:
|
||||
throw new NotImplementedException();
|
||||
register1 = (byte)((opcode >> 3) & 0x7);
|
||||
register2 = (byte)(opcode & 0x7);
|
||||
return "XOR@ R" + register1 + ", R" + register2;
|
||||
}
|
||||
return UNKNOWN;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -62,7 +62,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
PendingCycles -= 4; TotalExecutedCycles += 4;
|
||||
break;
|
||||
case 0x004: // J, JE, JD, JSR, JSRE, JSRD
|
||||
throw new NotImplementedException();
|
||||
// 0000:0000:0000:0100 0000:00rr:aaaa:aaff 0000:00aa:aaaa:aaaa
|
||||
second = ReadMemory(RegisterPC++);
|
||||
third = ReadMemory(RegisterPC++);
|
||||
|
|
@ -993,8 +992,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
case 0x26D:
|
||||
case 0x26E:
|
||||
case 0x26F:
|
||||
throw new NotImplementedException();
|
||||
// MVOI
|
||||
case 0x270:
|
||||
case 0x271:
|
||||
case 0x272:
|
||||
|
|
@ -1063,8 +1060,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
case 0x2AD:
|
||||
case 0x2AE:
|
||||
case 0x2AF:
|
||||
throw new NotImplementedException();
|
||||
// MVII
|
||||
case 0x2B0:
|
||||
case 0x2B1:
|
||||
case 0x2B2:
|
||||
|
|
@ -1133,8 +1128,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
case 0x2ED:
|
||||
case 0x2EE:
|
||||
case 0x2EF:
|
||||
throw new NotImplementedException();
|
||||
// ADDI
|
||||
case 0x2F0:
|
||||
case 0x2F1:
|
||||
case 0x2F2:
|
||||
|
|
@ -1203,8 +1196,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
case 0x32D:
|
||||
case 0x32E:
|
||||
case 0x32F:
|
||||
throw new NotImplementedException();
|
||||
// SUBI
|
||||
case 0x330:
|
||||
case 0x331:
|
||||
case 0x332:
|
||||
|
|
@ -1222,8 +1213,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
case 0x33E:
|
||||
case 0x33F:
|
||||
throw new NotImplementedException();
|
||||
default:
|
||||
throw new NotImplementedException();
|
||||
// CMP
|
||||
case 0x340:
|
||||
case 0x341:
|
||||
|
|
@ -1275,8 +1264,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
case 0x36D:
|
||||
case 0x36E:
|
||||
case 0x36F:
|
||||
throw new NotImplementedException();
|
||||
// CMPI
|
||||
case 0x370:
|
||||
case 0x371:
|
||||
case 0x372:
|
||||
|
|
@ -1345,8 +1332,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
case 0x3AD:
|
||||
case 0x3AE:
|
||||
case 0x3AF:
|
||||
throw new NotImplementedException();
|
||||
// ANDI
|
||||
case 0x3B0:
|
||||
case 0x3B1:
|
||||
case 0x3B2:
|
||||
|
|
@ -1415,8 +1400,6 @@ namespace BizHawk.Emulation.CPUs.CP1610
|
|||
case 0x3ED:
|
||||
case 0x3EE:
|
||||
case 0x3EF:
|
||||
throw new NotImplementedException();
|
||||
// XORI
|
||||
case 0x3F0:
|
||||
case 0x3F1:
|
||||
case 0x3F2:
|
||||
|
|
|
|||
Loading…
Reference in New Issue