From 0a0763966ca008fbf240bdaebde2cc7922961823 Mon Sep 17 00:00:00 2001 From: brandman211 Date: Sat, 21 Jul 2012 05:25:52 +0000 Subject: [PATCH] -Refactored of the executor / disassembler / Intellicart to use more descriptive variable names and types to clear up a lot of confusion. -Added implementation for NOP (6 cycles of nothing). -Made SWAP actually store the result (Still disabled). -Added breaks to the swap / shift / rotate cases (Yikes). Instruction disassembly: JSRD R5, $1026 MVI@ R7, R6 JSR R5, $1A83 MVO@ R5, R6 MVO@ R0, R6 MVO@ R1, R6 MVI@ R7, R4 MVI@ R7, R0 JSR R5, $1738 MVO@ R5, R6 XORR R5, R5 <- Needs implementation. --- BizHawk.Emulation/CPUs/CP1610/Disassembler.cs | 244 ++++++++--------- BizHawk.Emulation/CPUs/CP1610/Execute.cs | 258 +++++++++--------- .../Consoles/Intellivision/Intellicart.cs | 25 +- 3 files changed, 264 insertions(+), 263 deletions(-) diff --git a/BizHawk.Emulation/CPUs/CP1610/Disassembler.cs b/BizHawk.Emulation/CPUs/CP1610/Disassembler.cs index 2d0a5c9239..c1a56d8620 100644 --- a/BizHawk.Emulation/CPUs/CP1610/Disassembler.cs +++ b/BizHawk.Emulation/CPUs/CP1610/Disassembler.cs @@ -9,11 +9,13 @@ namespace BizHawk.Emulation.CPUs.CP1610 { public const string UNKNOWN = "???"; - public string Disassemble(ushort pc, out int bytesToAdvance) + public string Disassemble(ushort pc, out int addrToAdvance) { - bytesToAdvance = 1; - byte register1, register2; - int second, third, op1, op2; + addrToAdvance = 1; + byte dest, src, mem; + int decle2, decle3; + int cond; + ushort addr, offset; string result = ""; int opcode = ReadMemory(pc) & 0x3FF; switch (opcode) @@ -28,18 +30,17 @@ namespace BizHawk.Emulation.CPUs.CP1610 return "DIS"; case 0x004: // 0000:0000:0000:0100 0000:00rr:aaaa:aaff 0000:00aa:aaaa:aaaa - second = ReadMemory((ushort)(pc + 1)); - third = ReadMemory((ushort)(pc + 2)); + decle2 = ReadMemory((ushort)(pc + 1)); + decle3 = ReadMemory((ushort)(pc + 2)); // rr indicates the register into which to store the return address - register1 = (byte)(((second >> 8) & 0x3) + 4); - // ff indicates how to affect the Interrupt (I) flag in the CP1610 - op1 = second & 0x3; + dest = (byte)(((decle2 >> 8) & 0x3) + 4); // aaaaaaaaaaaaaaaa indicates the address to where the CP1610 should Jump - op2 = ((second << 8) & 0xFC00) | (third & 0x3FF); + addr = (ushort)(((decle2 << 8) & 0xFC00) | (decle3 & 0x3FF)); result = "J"; - if (register1 != 0x7) + if (dest != 0x7) result += "SR"; - switch (op1) + // ff indicates how to affect the Interrupt (I) flag in the CP1610 + switch (decle2 & 0x3) { case 0x1: result += "E"; @@ -51,10 +52,10 @@ namespace BizHawk.Emulation.CPUs.CP1610 // Unknown opcode. return UNKNOWN; } - if (register1 != 0x3) - result += " R" + register1 + ","; - result += string.Format(" ${0:X4}", op2); - bytesToAdvance = 3; + if (dest != 0x3) + result += " R" + dest + ","; + result += string.Format(" ${0:X4}", addr); + addrToAdvance = 3; return result; case 0x005: return "TCI"; @@ -70,8 +71,8 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x00D: case 0x00E: case 0x00F: - register1 = (byte)(opcode & 0x7); - return "INCR R" + register1; + dest = (byte)(opcode & 0x7); + return "INCR R" + dest; case 0x010: case 0x011: case 0x012: @@ -80,8 +81,8 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x015: case 0x016: case 0x017: - register1 = (byte)(opcode & 0x7); - return "DECR R" + register1; + dest = (byte)(opcode & 0x7); + return "DECR R" + dest; case 0x018: case 0x019: case 0x01A: @@ -90,8 +91,8 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x01D: case 0x01E: case 0x01F: - register1 = (byte)(opcode & 0x7); - return "COMR R" + register1; + dest = (byte)(opcode & 0x7); + return "COMR R" + dest; case 0x020: case 0x021: case 0x022: @@ -100,8 +101,8 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x025: case 0x026: case 0x027: - register1 = (byte)(opcode & 0x7); - return "NEGR R" + register1; + dest = (byte)(opcode & 0x7); + return "NEGR R" + dest; case 0x028: case 0x029: case 0x02A: @@ -110,14 +111,14 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x02D: case 0x02E: case 0x02F: - register1 = (byte)(opcode & 0x7); - return "ADCR R" + register1; + dest = (byte)(opcode & 0x7); + return "ADCR R" + dest; case 0x030: case 0x031: case 0x032: case 0x033: - register1 = (byte)(opcode & 0x3); - return "GSWD R" + register1; + dest = (byte)(opcode & 0x3); + return "GSWD R" + dest; case 0x034: case 0x035: result = "NOP"; @@ -138,8 +139,8 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x03D: case 0x03E: case 0x03F: - register1 = (byte)(opcode & 0x7); - return "RSWD R" + register1; + src = (byte)(opcode & 0x7); + return "RSWD R" + src; case 0x040: case 0x041: case 0x042: @@ -148,8 +149,8 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x045: case 0x046: case 0x047: - register1 = (byte)(opcode & 0x3); - result = "SWAP R" + register1; + dest = (byte)(opcode & 0x3); + result = "SWAP R" + dest; if (((opcode >> 3) & 0x1) != 0) result += ", 1"; return result; @@ -161,8 +162,8 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x04D: case 0x04E: case 0x04F: - register1 = (byte)(opcode & 0x3); - result = "SLL R" + register1; + dest = (byte)(opcode & 0x3); + result = "SLL R" + dest; if (((opcode >> 3) & 0x1) != 0) result += ", 1"; return result; @@ -174,8 +175,8 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x055: case 0x056: case 0x057: - register1 = (byte)(opcode & 0x3); - result = "RLC R" + register1; + dest = (byte)(opcode & 0x3); + result = "RLC R" + dest; if (((opcode >> 3) & 0x1) != 0) result += ", 1"; return result; @@ -187,8 +188,8 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x05D: case 0x05E: case 0x05F: - register1 = (byte)(opcode & 0x3); - result = "SLLC R" + register1; + dest = (byte)(opcode & 0x3); + result = "SLLC R" + dest; if (((opcode >> 3) & 0x1) != 0) result += ", 1"; return result; @@ -200,8 +201,8 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x065: case 0x066: case 0x067: - register1 = (byte)(opcode & 0x3); - result = "SLR R" + register1; + dest = (byte)(opcode & 0x3); + result = "SLR R" + dest; if (((opcode >> 3) & 0x1) != 0) result += ", 1"; return result; @@ -213,8 +214,8 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x06D: case 0x06E: case 0x06F: - register1 = (byte)(opcode & 0x3); - result = "SAR R" + register1; + dest = (byte)(opcode & 0x3); + result = "SAR R" + dest; if (((opcode >> 3) & 0x1) != 0) result += ", 1"; return result; @@ -226,8 +227,8 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x075: case 0x076: case 0x077: - register1 = (byte)(opcode & 0x3); - result = "RRC R" + register1; + dest = (byte)(opcode & 0x3); + result = "RRC R" + dest; if (((opcode >> 3) & 0x1) != 0) result += ", 1"; return result; @@ -239,8 +240,8 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x07D: case 0x07E: case 0x07F: - register1 = (byte)(opcode & 0x3); - result = "SARC R" + register1; + dest = (byte)(opcode & 0x3); + result = "SARC R" + dest; if (((opcode >> 3) & 0x1) != 0) result += ", 1"; return result; @@ -308,9 +309,9 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x0BD: case 0x0BE: case 0x0BF: - register1 = (byte)((opcode >> 3) & 0x7); - register2 = (byte)(opcode & 0x7); - return "MOVR R" + register1 + ", R" + register2; + src = (byte)((opcode >> 3) & 0x7); + dest = (byte)(opcode & 0x7); + return "MOVR R" + src + ", R" + dest; case 0x0C0: case 0x0C1: case 0x0C2: @@ -375,9 +376,9 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x0FD: case 0x0FE: case 0x0FF: - register1 = (byte)((opcode >> 3) & 0x7); - register2 = (byte)(opcode & 0x7); - return "ADDR R" + register1 + ", R" + register2; + src = (byte)((opcode >> 3) & 0x7); + dest = (byte)(opcode & 0x7); + return "ADDR R" + src + ", R" + dest; case 0x100: case 0x101: case 0x102: @@ -442,9 +443,9 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x13D: case 0x13E: case 0x13F: - register1 = (byte)((opcode >> 3) & 0x7); - register2 = (byte)(opcode & 0x7); - return "SUBR R" + register1 + ", R" + register2; + src = (byte)((opcode >> 3) & 0x7); + dest = (byte)(opcode & 0x7); + return "SUBR R" + src + ", R" + dest; case 0x140: case 0x141: case 0x142: @@ -509,9 +510,9 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x17D: case 0x17E: case 0x17F: - register1 = (byte)((opcode >> 3) & 0x7); - register2 = (byte)(opcode & 0x7); - return "CMPR R" + register1 + ", R" + register2; + src = (byte)((opcode >> 3) & 0x7); + dest = (byte)(opcode & 0x7); + return "CMPR R" + src + ", R" + dest; case 0x180: case 0x181: case 0x182: @@ -576,9 +577,9 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x1BD: case 0x1BE: case 0x1BF: - register1 = (byte)((opcode >> 3) & 0x7); - register2 = (byte)(opcode & 0x7); - return "ANDR R" + register1 + ", R" + register2; + src = (byte)((opcode >> 3) & 0x7); + dest = (byte)(opcode & 0x7); + return "ANDR R" + src + ", R" + dest; case 0x1C0: case 0x1C1: case 0x1C2: @@ -643,9 +644,9 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x1FD: case 0x1FE: case 0x1FF: - register1 = (byte)((opcode >> 3) & 0x7); - register2 = (byte)(opcode & 0x7); - return "XORR R" + register1 + ", R" + register2; + src = (byte)((opcode >> 3) & 0x7); + dest = (byte)(opcode & 0x7); + return "XORR R" + src + ", R" + dest; // Branch Forward, no External Condition case 0x200: // B case 0x201: // BC @@ -714,13 +715,13 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x23D: case 0x23E: case 0x23F: - second = ReadMemory((ushort)(pc + 1)); - op1 = opcode & 0x15; + offset = ReadMemory((ushort)(pc + 1)); + cond = opcode & 0x15; if ((opcode & 0x16) != 0) result = "BEXT"; else { - switch (op1) + switch (cond) { case 0x0: result = "B"; @@ -772,14 +773,13 @@ namespace BizHawk.Emulation.CPUs.CP1610 break; } } - op2 = (opcode >> 5) & 0x1; - if (op1 != 0x8) + if (cond != 0x8) { - result += string.Format(" ${0:X4}", second); - if (op1 != 0x0) - result += ", " + op2; + result += string.Format(" ${0:X4}", offset); + if (cond != 0x0) + result += ", " + ((opcode >> 5) & 0x1); } - bytesToAdvance = 2; + addrToAdvance = 2; return result; case 0x240: case 0x241: @@ -789,10 +789,10 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x245: case 0x246: case 0x247: - register1 = (byte)(opcode & 0x7); - second = ReadMemory((ushort)(pc + 1)); - bytesToAdvance = 2; - return "MVO R" + register1 + ", " + string.Format("${0:X4}", second); + src = (byte)(opcode & 0x7); + addr = ReadMemory((ushort)(pc + 1)); + addrToAdvance = 2; + return "MVO R" + src + ", " + string.Format("${0:X4}", addr); case 0x248: case 0x249: case 0x24A: @@ -849,9 +849,9 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x27D: case 0x27E: case 0x27F: - register1 = (byte)((opcode >> 3) & 0x7); - register2 = (byte)(opcode & 0x7); - return "MVO@ R" + register2 + ", R" + register1; + mem = (byte)((opcode >> 3) & 0x7); + src = (byte)(opcode & 0x7); + return "MVO@ R" + src + ", R" + mem; case 0x280: case 0x281: case 0x282: @@ -860,10 +860,10 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x285: case 0x286: case 0x287: - register1 = (byte)(opcode & 0x7); - second = ReadMemory((ushort)(pc + 1)); - bytesToAdvance = 2; - return "MVI R" + register1 + ", " + string.Format("${0:X4}", second); + dest = (byte)(opcode & 0x7); + addr = ReadMemory((ushort)(pc + 1)); + addrToAdvance = 2; + return "MVI R" + dest + ", " + string.Format("${0:X4}", addr); case 0x288: case 0x289: case 0x28A: @@ -920,9 +920,9 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x2BD: case 0x2BE: case 0x2BF: - register1 = (byte)((opcode >> 3) & 0x7); - register2 = (byte)(opcode & 0x7); - return "MVI@ R" + register1 + ", R" + register2; + mem = (byte)((opcode >> 3) & 0x7); + dest = (byte)(opcode & 0x7); + return "MVI@ R" + mem + ", R" + dest; case 0x2C0: case 0x2C1: case 0x2C2: @@ -931,10 +931,10 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x2C5: case 0x2C6: case 0x2C7: - register1 = (byte)(opcode & 0x7); - second = ReadMemory((ushort)(pc + 1)); - bytesToAdvance = 2; - return "ADD R" + register1 + ", " + string.Format("${0:X4}", second); + dest = (byte)(opcode & 0x7); + addr = ReadMemory((ushort)(pc + 1)); + addrToAdvance = 2; + return "ADD R" + dest + ", " + string.Format("${0:X4}", addr); case 0x2C8: case 0x2C9: case 0x2CA: @@ -991,9 +991,9 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x2FD: case 0x2FE: case 0x2FF: - register1 = (byte)((opcode >> 3) & 0x7); - register2 = (byte)(opcode & 0x7); - return "ADD@ R" + register1 + ", R" + register2; + mem = (byte)((opcode >> 3) & 0x7); + dest = (byte)(opcode & 0x7); + return "ADD@ R" + mem + ", R" + dest; case 0x300: case 0x301: case 0x302: @@ -1002,10 +1002,10 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x305: case 0x306: case 0x307: - register1 = (byte)(opcode & 0x7); - second = ReadMemory((ushort)(pc + 1)); - bytesToAdvance = 2; - return "SUB R" + register1 + ", " + string.Format("${0:X4}", second); + mem = (byte)(opcode & 0x7); + addr = ReadMemory((ushort)(pc + 1)); + addrToAdvance = 2; + return "SUB R" + mem + ", " + string.Format("${0:X4}", addr); case 0x308: case 0x309: case 0x30A: @@ -1062,9 +1062,9 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x33D: case 0x33E: case 0x33F: - register1 = (byte)((opcode >> 3) & 0x7); - register2 = (byte)(opcode & 0x7); - return "SUB@ R" + register1 + ", R" + register2; + mem = (byte)((opcode >> 3) & 0x7); + dest = (byte)(opcode & 0x7); + return "SUB@ R" + mem + ", R" + dest; case 0x340: case 0x341: case 0x342: @@ -1073,10 +1073,10 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x345: case 0x346: case 0x347: - register1 = (byte)(opcode & 0x7); - second = ReadMemory((ushort)(pc + 1)); - bytesToAdvance = 2; - return "CMP R" + register1 + ", " + string.Format("${0:X4}", second); + mem = (byte)(opcode & 0x7); + addr = ReadMemory((ushort)(pc + 1)); + addrToAdvance = 2; + return "CMP R" + mem + ", " + string.Format("${0:X4}", addr); case 0x348: case 0x349: case 0x34A: @@ -1133,9 +1133,9 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x37D: case 0x37E: case 0x37F: - register1 = (byte)((opcode >> 3) & 0x7); - register2 = (byte)(opcode & 0x7); - return "CMP@ R" + register1 + ", R" + register2; + mem = (byte)((opcode >> 3) & 0x7); + dest = (byte)(opcode & 0x7); + return "CMP@ R" + mem + ", R" + dest; case 0x380: case 0x381: case 0x382: @@ -1144,10 +1144,10 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x385: case 0x386: case 0x387: - register1 = (byte)(opcode & 0x7); - second = ReadMemory((ushort)(pc + 1)); - bytesToAdvance = 2; - return "AND R" + register1 + ", " + string.Format("${0:X4}", second); + mem = (byte)(opcode & 0x7); + addr = ReadMemory((ushort)(pc + 1)); + addrToAdvance = 2; + return "AND R" + mem + ", " + string.Format("${0:X4}", addr); case 0x388: case 0x389: case 0x38A: @@ -1204,9 +1204,9 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x3BD: case 0x3BE: case 0x3BF: - register1 = (byte)((opcode >> 3) & 0x7); - register2 = (byte)(opcode & 0x7); - return "AND@ R" + register1 + ", R" + register2; + mem = (byte)((opcode >> 3) & 0x7); + dest = (byte)(opcode & 0x7); + return "AND@ R" + mem + ", R" + dest; case 0x3C0: case 0x3C1: case 0x3C2: @@ -1215,10 +1215,10 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x3C5: case 0x3C6: case 0x3C7: - register1 = (byte)(opcode & 0x7); - second = ReadMemory((ushort)(pc + 1)); - bytesToAdvance = 2; - return "XOR R" + register1 + ", " + string.Format("${0:X4}", second); + mem = (byte)(opcode & 0x7); + addr = ReadMemory((ushort)(pc + 1)); + addrToAdvance = 2; + return "XOR R" + mem + ", " + string.Format("${0:X4}", addr); case 0x3C8: case 0x3C9: case 0x3CA: @@ -1275,9 +1275,9 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x3FD: case 0x3FE: case 0x3FF: - register1 = (byte)((opcode >> 3) & 0x7); - register2 = (byte)(opcode & 0x7); - return "XOR@ R" + register1 + ", R" + register2; + mem = (byte)((opcode >> 3) & 0x7); + dest = (byte)(opcode & 0x7); + return "XOR@ R" + mem + ", R" + dest; } return UNKNOWN; } diff --git a/BizHawk.Emulation/CPUs/CP1610/Execute.cs b/BizHawk.Emulation/CPUs/CP1610/Execute.cs index c5e5634067..df428bc45b 100644 --- a/BizHawk.Emulation/CPUs/CP1610/Execute.cs +++ b/BizHawk.Emulation/CPUs/CP1610/Execute.cs @@ -35,8 +35,10 @@ namespace BizHawk.Emulation.CPUs.CP1610 public void Execute(int cycles) { - byte register1, register2; - int second, third, op1, op2, temp, result = 0; + byte dest, src, mem; + int decle2, decle3, result = 0; + int ones, carry, status_word, lower, sign; + ushort dest_value, src_value, mem_read, addr; PendingCycles += cycles; while (PendingCycles > 0) { @@ -63,18 +65,17 @@ namespace BizHawk.Emulation.CPUs.CP1610 break; case 0x004: // J, JE, JD, JSR, JSRE, JSRD // 0000:0000:0000:0100 0000:00rr:aaaa:aaff 0000:00aa:aaaa:aaaa - second = ReadMemory(RegisterPC++); - third = ReadMemory(RegisterPC++); + decle2 = ReadMemory(RegisterPC++); + decle3 = ReadMemory(RegisterPC++); // rr indicates the register into which to store the return address - register1 = (byte)(((second >> 8) & 0x3) + 4); - // ff indicates how to affect the Interrupt (I) flag in the CP1610 - op1 = second & 0x3; + dest = (byte)(((decle2 >> 8) & 0x3) + 4); // aaaaaaaaaaaaaaaa indicates the address to where the CP1610 should Jump - op2 = ((second << 8) & 0xFC00) | (third & 0x3FF); - if (register1 != 0x7) + addr = (ushort)(((decle2 << 8) & 0xFC00) | (decle3 & 0x3FF)); + if (dest != 0x7) // Store the return address. - Register[register1] = (ushort)((RegisterPC + 1) & 0xFFFF); - switch (op1) + Register[dest] = (ushort)((RegisterPC + 1) & 0xFFFF); + // ff indicates how to affect the Interrupt (I) flag in the CP1610 + switch (decle2 & 0x3) { case 0x1: FlagI = true; @@ -86,7 +87,7 @@ namespace BizHawk.Emulation.CPUs.CP1610 // Unknown opcode. throw new ArgumentException(); } - RegisterPC = (ushort)op2; + RegisterPC = (ushort)addr; PendingCycles -= 12; TotalExecutedCycles += 12; break; case 0x005: // TCI @@ -114,11 +115,11 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x00E: case 0x00F: throw new NotImplementedException(); - register1 = (byte)(opcode & 0x7); - result = (Register[register1] + 1) & 0xFFFF; + dest = (byte)(opcode & 0x7); + result = (Register[dest] + 1) & 0xFFFF; Calc_FlagS(result); Calc_FlagZ(result); - Register[register1] = (ushort)result; + Register[dest] = (ushort)result; PendingCycles -= 6; TotalExecutedCycles += 6; break; // DECR @@ -131,11 +132,11 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x016: case 0x017: throw new NotImplementedException(); - register1 = (byte)(opcode & 0x7); - result = (Register[register1] - 1) & 0xFFFF; + dest = (byte)(opcode & 0x7); + result = (Register[dest] - 1) & 0xFFFF; Calc_FlagS(result); Calc_FlagZ(result); - Register[register1] = (ushort)result; + Register[dest] = (ushort)result; PendingCycles -= 6; TotalExecutedCycles += 6; break; // COMR @@ -148,11 +149,11 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x01E: case 0x01F: throw new NotImplementedException(); - register1 = (byte)(opcode & 0x7); - result = Register[register1] ^ 0xFFFF; + dest = (byte)(opcode & 0x7); + result = (Register[dest] ^ 0xFFFF); Calc_FlagS(result); Calc_FlagZ(result); - Register[register1] = (ushort)result; + Register[dest] = (ushort)result; PendingCycles -= 6; TotalExecutedCycles += 6; break; // NEGR @@ -165,16 +166,16 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x026: case 0x027: throw new NotImplementedException(); - register1 = (byte)(opcode & 0x7); - op1 = Register[register1]; - temp = (op1 ^ 0xFFFF); - result = temp + 1; + dest = (byte)(opcode & 0x7); + dest_value = Register[dest]; + ones = (dest_value ^ 0xFFFF); + result = ones + 1; Calc_FlagC(result); - Calc_FlagO_Add(temp, 1); + Calc_FlagO_Add(ones, 1); Calc_FlagS(result); Calc_FlagZ(result); result &= 0xFFFF; - Register[register1] = (ushort)result; + Register[dest] = (ushort)result; PendingCycles -= 6; TotalExecutedCycles += 6; break; // ADCR @@ -187,16 +188,16 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x02E: case 0x02F: throw new NotImplementedException(); - register1 = (byte)(opcode & 0x7); - op1 = Register[register1]; - op2 = FlagC ? 1 : 0; - result = op1 + op2; + dest = (byte)(opcode & 0x7); + dest_value = Register[dest]; + carry = FlagC ? 1 : 0; + result = dest_value + carry; Calc_FlagC(result); - Calc_FlagO_Add(op1, op2); + Calc_FlagO_Add(dest_value, carry); Calc_FlagS(result); Calc_FlagZ(result); result &= 0xFFFF; - Register[register1] = (ushort)result; + Register[dest] = (ushort)result; PendingCycles -= 6; TotalExecutedCycles += 6; break; // GSWD @@ -205,15 +206,16 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x032: case 0x033: throw new NotImplementedException(); - register1 = (byte)(opcode & 0x3); - temp = ((FlagS ? 1 : 0) << 3) | ((FlagZ ? 1 : 0) << 2) | ((FlagO ? 1 : 0) << 1) | (FlagC ? 1 : 0); - Register[register1] = (ushort)((temp << 12) | (temp << 4)); + dest = (byte)(opcode & 0x3); + status_word = ((FlagS ? 1 : 0) << 3) | ((FlagZ ? 1 : 0) << 2) | ((FlagO ? 1 : 0) << 1) | + (FlagC ? 1 : 0); + Register[dest] = (ushort)((status_word << 12) | (status_word << 4)); PendingCycles -= 6; TotalExecutedCycles += 6; break; // NOP case 0x034: case 0x035: - throw new NotImplementedException(); + PendingCycles -= 6; TotalExecutedCycles += 6; break; // SIN case 0x036: @@ -232,12 +234,12 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x03E: case 0x03F: throw new NotImplementedException(); - register1 = (byte)(opcode & 0x7); - op1 = Register[register1]; - FlagC = ((op1 & 0x80) != 0) ? true : false; - FlagO = ((op1 & 0x40) != 0) ? true : false; - FlagZ = ((op1 & 0x20) != 0) ? true : false; - FlagS = ((op1 & 0x10) != 0) ? true : false; + src = (byte)(opcode & 0x7); + src_value = Register[src]; + FlagC = ((src_value & 0x80) != 0) ? true : false; + FlagO = ((src_value & 0x40) != 0) ? true : false; + FlagZ = ((src_value & 0x20) != 0) ? true : false; + FlagS = ((src_value & 0x10) != 0) ? true : false; PendingCycles -= 6; TotalExecutedCycles += 6; break; // SWAP @@ -250,24 +252,25 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x046: case 0x047: throw new NotImplementedException(); - register1 = (byte)(opcode & 0x3); - op1 = (opcode >> 3) & 0x1; - op2 = Register[register1]; - temp = op2 & 0xFF; - if (op1 == 0) + dest = (byte)(opcode & 0x3); + dest_value = Register[dest]; + lower = dest_value & 0xFF; + if (((opcode >> 3) & 0x1) == 0) { // Single swap. - result = (temp << 8) | ((op2 >> 8) & 0xFF); + result = (lower << 8) | ((dest_value >> 8) & 0xFF); PendingCycles -= 6; TotalExecutedCycles += 6; } else { // Double swap. - result = (temp << 8) | temp; + result = (lower << 8) | lower; PendingCycles -= 8; TotalExecutedCycles += 8; } Calc_FlagS_7(result); Calc_FlagZ(result); + Register[dest] = (ushort)result; + break; // SLL case 0x048: case 0x049: @@ -278,10 +281,9 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x04E: case 0x04F: throw new NotImplementedException(); - register1 = (byte)(opcode & 0x3); - op1 = (opcode >> 3) & 0x1; - result = Register[register1] << 1; - if (op1 == 0) + dest = (byte)(opcode & 0x3); + result = Register[dest] << 1; + if (((opcode >> 3) & 0x1) == 0) { // Single shift. PendingCycles -= 6; TotalExecutedCycles += 6; @@ -294,7 +296,8 @@ namespace BizHawk.Emulation.CPUs.CP1610 } Calc_FlagS(result); Calc_FlagZ(result); - Register[register1] = (ushort)result; + Register[dest] = (ushort)result; + break; // RLC case 0x050: case 0x051: @@ -305,12 +308,11 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x056: case 0x057: throw new NotImplementedException(); - register1 = (byte)(opcode & 0x3); - op1 = (opcode >> 3) & 0x1; - op2 = Register[register1]; - result = (op2 << 1) | (FlagC ? 1 : 0); - FlagC = ((op2 & 0x8000) != 0); - if (op1 == 0) + dest = (byte)(opcode & 0x3); + dest_value = Register[dest]; + result = (dest_value << 1) | (FlagC ? 1 : 0); + FlagC = ((dest_value & 0x8000) != 0); + if (((opcode >> 3) & 0x1) == 0) { // Single rotate. PendingCycles -= 6; TotalExecutedCycles += 6; @@ -320,12 +322,13 @@ namespace BizHawk.Emulation.CPUs.CP1610 // Double rotate. result <<= 1; result |= (FlagO ? 1 : 0); - FlagO = ((op2 & 0x4000) != 0); + FlagO = ((dest_value & 0x4000) != 0); PendingCycles -= 8; TotalExecutedCycles += 8; } Calc_FlagS(result); Calc_FlagZ(result); - Register[register1] = (ushort)result; + Register[dest] = (ushort)result; + break; // SLLC case 0x058: case 0x059: @@ -336,12 +339,11 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x05E: case 0x05F: throw new NotImplementedException(); - register1 = (byte)(opcode & 0x3); - op1 = (opcode >> 3) & 0x1; - op2 = Register[register1]; - result = op2 << 1; - FlagC = ((op2 & 0x8000) != 0); - if (op1 == 0) + dest = (byte)(opcode & 0x3); + dest_value = Register[dest]; + result = dest_value << 1; + FlagC = ((dest_value & 0x8000) != 0); + if (((opcode >> 3) & 0x1) == 0) { // Single shift. PendingCycles -= 6; TotalExecutedCycles += 6; @@ -350,12 +352,13 @@ namespace BizHawk.Emulation.CPUs.CP1610 { // Double shift. result <<= 1; - FlagO = ((op2 & 0x4000) != 0); + FlagO = ((dest_value & 0x4000) != 0); PendingCycles -= 8; TotalExecutedCycles += 8; } Calc_FlagS(result); Calc_FlagZ(result); - Register[register1] = (ushort)result; + Register[dest] = (ushort)result; + break; // SLR case 0x060: case 0x061: @@ -366,10 +369,9 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x066: case 0x067: throw new NotImplementedException(); - register1 = (byte)(opcode & 0x3); - op1 = (opcode >> 3) & 0x1; - result = Register[register1] >> 1; - if (op1 == 0) + dest = (byte)(opcode & 0x3); + result = Register[dest] >> 1; + if (((opcode >> 3) & 0x1) == 0) { // Single shift. PendingCycles -= 6; TotalExecutedCycles += 6; @@ -382,7 +384,8 @@ namespace BizHawk.Emulation.CPUs.CP1610 } Calc_FlagS_7(result); Calc_FlagZ(result); - Register[register1] = (ushort)result; + Register[dest] = (ushort)result; + break; // SAR case 0x068: case 0x069: @@ -393,12 +396,11 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x06E: case 0x06F: throw new NotImplementedException(); - register1 = (byte)(opcode & 0x3); - op1 = (opcode >> 3) & 0x1; - op2 = Register[register1]; - temp = op2 & 0x8000; - result = (op2 >> 1) | temp; - if (op1 == 0) + dest = (byte)(opcode & 0x3); + dest_value = Register[dest]; + sign = dest_value & 0x8000; + result = (dest_value >> 1) | sign; + if (((opcode >> 3) & 0x1) == 0) { // Single shift. PendingCycles -= 6; TotalExecutedCycles += 6; @@ -407,12 +409,13 @@ namespace BizHawk.Emulation.CPUs.CP1610 { // Double shift. result >>= 1; - result |= temp; + result |= sign; PendingCycles -= 8; TotalExecutedCycles += 8; } Calc_FlagS_7(result); Calc_FlagZ(result); - Register[register1] = (ushort)result; + Register[dest] = (ushort)result; + break; // RRC case 0x070: case 0x071: @@ -423,12 +426,11 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x076: case 0x077: throw new NotImplementedException(); - register1 = (byte)(opcode & 0x3); - op1 = (opcode >> 3) & 0x1; - op2 = Register[register1]; - result = (op2 >> 1) | ((FlagC ? 1 : 0) << 15); - FlagC = ((op2 & 0x1) != 0); - if (op1 == 0) + dest = (byte)(opcode & 0x3); + dest_value = Register[dest]; + result = (dest_value >> 1) | ((FlagC ? 1 : 0) << 15); + FlagC = ((dest_value & 0x1) != 0); + if (((opcode >> 3) & 0x1) == 0) { // Single rotate. PendingCycles -= 6; TotalExecutedCycles += 6; @@ -438,12 +440,13 @@ namespace BizHawk.Emulation.CPUs.CP1610 // Double rotate. result >>= 1; result |= (FlagO ? 1 : 0) << 15; - FlagO = ((op2 & 0x2) != 0); + FlagO = ((dest_value & 0x2) != 0); PendingCycles -= 8; TotalExecutedCycles += 8; } Calc_FlagS_7(result); Calc_FlagZ(result); - Register[register1] = (ushort)result; + Register[dest] = (ushort)result; + break; // SARC case 0x078: case 0x079: @@ -454,13 +457,12 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x07E: case 0x07F: throw new NotImplementedException(); - register1 = (byte)(opcode & 0x3); - op1 = (opcode >> 3) & 0x1; - op2 = Register[register1]; - temp = op2 & 0x8000; - result = (op2 >> 1) | temp; - FlagC = ((op2 & 0x1) != 0); - if (op1 == 0) + dest = (byte)(opcode & 0x3); + dest_value = Register[dest]; + sign = dest_value & 0x8000; + result = (dest_value >> 1) | sign; + FlagC = ((dest_value & 0x1) != 0); + if (((opcode >> 3) & 0x1) == 0) { // Single shift. PendingCycles -= 6; TotalExecutedCycles += 6; @@ -469,13 +471,14 @@ namespace BizHawk.Emulation.CPUs.CP1610 { // Double shift. result >>= 1; - result |= temp; - FlagO = ((op2 & 0x2) != 0); + result |= sign; + FlagO = ((dest_value & 0x2) != 0); PendingCycles -= 8; TotalExecutedCycles += 8; } Calc_FlagS_7(result); Calc_FlagZ(result); - Register[register1] = (ushort)result; + Register[dest] = (ushort)result; + break; // MOVR case 0x080: case 0x081: @@ -1008,14 +1011,14 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x27D: case 0x27E: case 0x27F: - register1 = (byte)((opcode >> 3) & 0x7); - register2 = (byte)(opcode & 0x7); - WriteMemory(Register[register1], Register[register2]); + mem = (byte)((opcode >> 3) & 0x7); + src = (byte)(opcode & 0x7); + WriteMemory(Register[mem], Register[src]); // Stack mode. - if (register1 == 0x6) + if (mem == 0x6) RegisterSP--; // Immediate mode. - if (register1 == 0x7) + if (mem == 0x7) RegisterPC++; PendingCycles -= 9; TotalExecutedCycles += 9; break; @@ -1086,12 +1089,12 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x2BD: case 0x2BE: case 0x2BF: - register1 = (byte)((opcode >> 3) & 0x7); - register2 = (byte)(opcode & 0x7); + mem = (byte)((opcode >> 3) & 0x7); + dest = (byte)(opcode & 0x7); if (!FlagD) { - Register[register2] = ReadMemory(Register[register1]); - if (register1 != 0x6) + Register[dest] = ReadMemory(Register[mem]); + if (mem != 0x6) { PendingCycles -= 8; TotalExecutedCycles += 8; } @@ -1103,15 +1106,15 @@ namespace BizHawk.Emulation.CPUs.CP1610 else { // Double Byte Data. - Register[register2] = (ushort)(ReadMemory(Register[register1]++) << 8); - Register[register2] |= (ushort)(ReadMemory(Register[register1]) & 0xFF); + Register[dest] = (ushort)(ReadMemory(Register[mem]++) << 8); + Register[dest] |= (ushort)(ReadMemory(Register[mem]) & 0xFF); PendingCycles -= 10; TotalExecutedCycles += 10; } // Stack mode. - if (register1 == 0x6) + if (mem == 0x6) RegisterSP++; // Immediate mode. - if (register1 == 0x7) + if (mem == 0x7) RegisterPC++; break; // ADD @@ -1181,12 +1184,12 @@ namespace BizHawk.Emulation.CPUs.CP1610 case 0x2FD: case 0x2FE: case 0x2FF: - register1 = (byte)((opcode >> 3) & 0x7); - register2 = (byte)(opcode & 0x7); + mem = (byte)((opcode >> 3) & 0x7); + dest = (byte)(opcode & 0x7); if (!FlagD) { - op1 = ReadMemory(Register[register1]); - if (register1 != 0x6) + mem_read = ReadMemory(Register[mem]); + if (mem != 0x6) { PendingCycles -= 8; TotalExecutedCycles += 8; } @@ -1198,25 +1201,24 @@ namespace BizHawk.Emulation.CPUs.CP1610 else { // Double Byte Data. - op1 = (ushort)(ReadMemory(Register[register1]++) << 8); - op1 |= (ushort)(ReadMemory(Register[register1]) & 0xFF); + mem_read = (ushort)(ReadMemory(Register[mem]++) << 8); + mem_read |= (ushort)(ReadMemory(Register[mem]) & 0xFF); PendingCycles -= 10; TotalExecutedCycles += 10; } // Stack mode. - if (register1 == 0x6) + if (mem == 0x6) RegisterSP++; // Immediate mode. - if (register1 == 0x7) + if (mem == 0x7) RegisterPC++; - break; - op2 = Register[register2]; - result = op1 + op2; + dest_value = Register[dest]; + result = mem_read + dest_value; Calc_FlagC(result); - Calc_FlagO_Add(op1, op2); + Calc_FlagO_Add(mem_read, dest_value); Calc_FlagS(result); Calc_FlagZ(result); result &= 0xFFFF; - Register[register2] = (ushort)result; + Register[dest] = (ushort)result; break; // SUB case 0x300: diff --git a/BizHawk.Emulation/Consoles/Intellivision/Intellicart.cs b/BizHawk.Emulation/Consoles/Intellivision/Intellicart.cs index 19c4b8e35e..50d6e109fd 100644 --- a/BizHawk.Emulation/Consoles/Intellivision/Intellicart.cs +++ b/BizHawk.Emulation/Consoles/Intellivision/Intellicart.cs @@ -9,7 +9,7 @@ namespace BizHawk.Emulation.Consoles.Intellivision { private ushort[] Intellicart = new ushort[65536]; private bool[][] MemoryAttributes = new bool[32][]; - private int[][] FineAddresses = new int[32][]; + private ushort[][] FineAddresses = new ushort[32][]; private ushort[] CRC16_table = { @@ -58,8 +58,7 @@ namespace BizHawk.Emulation.Consoles.Intellivision // Check to see if the header is valid. if (Rom[offset++] != 0xA8 || Rom[offset++] != (0xFF ^ Rom[offset++])) throw new ArgumentException(); - ushort crc; - int expected; + ushort crc, expected; // Parse for data segments. for (int segment = 0; segment < Rom[1]; segment++) { @@ -68,22 +67,22 @@ namespace BizHawk.Emulation.Consoles.Intellivision byte upper_end = Rom[offset++]; crc = UpdateCRC16(crc, upper_start); crc = UpdateCRC16(crc, upper_end); - int start = upper_start << 8; - int end = (upper_end << 8) | 0xFF; + ushort start = (ushort)(upper_start << 8); + ushort end = (ushort)((upper_end << 8) | 0xFF); // This range is invalid if it starts at a higher range than it ends. if (end < start) throw new ArgumentException(); for (int addr = start; addr <= end; addr++) { - int data; + ushort data; byte high = Rom[offset++]; byte low = Rom[offset++]; crc = UpdateCRC16(crc, high); crc = UpdateCRC16(crc, low); - data = (high << 8) | low; - Intellicart[addr] = (ushort)data; + data = (ushort)((high << 8) | low); + Intellicart[addr] = data; } - expected = (Rom[offset++] << 8) | Rom[offset++]; + expected = (ushort)((Rom[offset++] << 8) | Rom[offset++]); // Check if there is an invalid CRC. if (expected != crc) throw new ArgumentException(); @@ -116,19 +115,19 @@ namespace BizHawk.Emulation.Consoles.Intellivision else index = offset + 32 + (range >> 1); int range_start = range * 2048; - int start = (((Rom[index] >> 4) & 0x07) << 8) + range_start; - int end = (((Rom[index]) & 0x07) << 8) + 0xFF + range_start; + ushort start = (ushort)((((Rom[index] >> 4) & 0x07) << 8) + range_start); + ushort end = (ushort)((((Rom[index]) & 0x07) << 8) + 0xFF + range_start); // This range is invalid if it starts at a higher range than it ends. if (end < start) throw new ArgumentException(); - FineAddresses[range] = new int[2]; + FineAddresses[range] = new ushort[2]; FineAddresses[range][0] = start; FineAddresses[range][1] = end; } crc = 0xFFFF; for (int index = 0; index < 48; index++) crc = UpdateCRC16(crc, Rom[offset++]); - expected = (Rom[offset++] << 8) | (Rom[offset++] & 0xFF); + expected = (ushort)((Rom[offset++] << 8) | (Rom[offset++] & 0xFF)); // Check if there is an invalid CRC for the memory attributes / fine addresses. if (expected != crc) throw new ArgumentException();