diff --git a/BizHawk.Emulation.Cores/Consoles/Sega/gpgx/GPGX.IMemoryDomains.cs b/BizHawk.Emulation.Cores/Consoles/Sega/gpgx/GPGX.IMemoryDomains.cs index edf6b22964..22becf4cce 100644 --- a/BizHawk.Emulation.Cores/Consoles/Sega/gpgx/GPGX.IMemoryDomains.cs +++ b/BizHawk.Emulation.Cores/Consoles/Sega/gpgx/GPGX.IMemoryDomains.cs @@ -26,13 +26,13 @@ namespace BizHawk.Emulation.Cores.Consoles.Sega.gpgx // vram pokes need to go through hook which invalidates cached tiles byte* p = (byte*)area; mm.Add(new MemoryDomain(name, size, MemoryDomain.Endian.Unknown, - delegate (long addr) + delegate(long addr) { if (addr < 0 || addr >= 65536) throw new ArgumentOutOfRangeException(); return p[addr ^ 1]; }, - delegate (long addr, byte val) + delegate(long addr, byte val) { if (addr < 0 || addr >= 65536) throw new ArgumentOutOfRangeException(); @@ -44,7 +44,8 @@ namespace BizHawk.Emulation.Cores.Consoles.Sega.gpgx else { var byteSize = name.Contains("Z80") ? 1 : 2; - mm.Add(MemoryDomain.FromIntPtrSwap16(name, size, MemoryDomain.Endian.Big, area, name != "MD CART" , byteSize)); + mm.Add(MemoryDomain.FromIntPtrSwap16(name, size, + MemoryDomain.Endian.Big, area, name != "MD CART" && name != "CD BOOT ROM", byteSize)); } } var m68Bus = new MemoryDomain("M68K BUS", 0x1000000, MemoryDomain.Endian.Big, diff --git a/waterbox/gpgx/cinterface/cinterface.c b/waterbox/gpgx/cinterface/cinterface.c index c931efc2c6..119817ac20 100644 --- a/waterbox/gpgx/cinterface/cinterface.c +++ b/waterbox/gpgx/cinterface/cinterface.c @@ -14,6 +14,7 @@ #include "md_ntsc.h" #include "sms_ntsc.h" #include "eeprom_i2c.h" +#include "vdp_render.h" char GG_ROM[256] = "GG_ROM"; // game genie rom char AR_ROM[256] = "AR_ROM"; // actin replay rom @@ -510,6 +511,14 @@ GPGX_EX int gpgx_init(const char *feromextension, ECL_ENTRY int (*feload_archive tempsram = alloc_invisible(24 * 1024); ext.md_cart.rom = alloc_sealed(32 * 1024 * 1024); + scd.bootrom = malloc(0x20000); // FIXME: this should be sealed, but that crashes. huh? + SZHVC_add = alloc_sealed(131072); + SZHVC_sub = alloc_sealed(131072); + ym2612_lfo_pm_table = alloc_sealed(131072); + vdp_bp_lut = alloc_sealed(262144); + vdp_lut = alloc_sealed(6 * sizeof(*vdp_lut)); + for (int i = 0; i < 6; i++) + vdp_lut[i] = alloc_sealed(65536); /* sound options */ config.psg_preamp = 150; diff --git a/waterbox/gpgx/core/cd_hw/scd.h b/waterbox/gpgx/core/cd_hw/scd.h index dd269b142d..1c89e0752b 100644 --- a/waterbox/gpgx/core/cd_hw/scd.h +++ b/waterbox/gpgx/core/cd_hw/scd.h @@ -51,16 +51,16 @@ /* Master Clock (53.203424 MHz) but not enough to really care about since clocks */ /* are not running in sync anyway. */ #define SCD_CLOCK 50000000 -#define SCYCLES_PER_LINE 3184 +#define SCYCLES_PER_LINE 3184 /* Timer & Stopwatch clocks divider */ #define TIMERS_SCYCLES_RATIO (384 * 4) /* CD hardware */ -typedef struct +typedef struct { cd_cart_t cartridge; /* ROM/RAM Cartridge */ - uint8 bootrom[0x20000]; /* 128K internal BOOT ROM */ + uint8 *bootrom; /* 128K internal BOOT ROM */ uint8 prg_ram[0x80000]; /* 512K PRG-RAM */ uint8 word_ram[2][0x20000]; /* 2 x 128K Word RAM (1M mode) */ uint8 word_ram_2M[0x40000]; /* 256K Word RAM (2M mode) */ diff --git a/waterbox/gpgx/core/loadrom.c b/waterbox/gpgx/core/loadrom.c index b3076960e1..d5f3920746 100644 --- a/waterbox/gpgx/core/loadrom.c +++ b/waterbox/gpgx/core/loadrom.c @@ -404,13 +404,13 @@ int load_bios(void) switch (region_code) { case REGION_USA: - size = load_archive(CD_BIOS_US, scd.bootrom, sizeof(scd.bootrom), 0); + size = load_archive(CD_BIOS_US, scd.bootrom, 0x20000, 0); break; case REGION_EUROPE: - size = load_archive(CD_BIOS_EU, scd.bootrom, sizeof(scd.bootrom), 0); + size = load_archive(CD_BIOS_EU, scd.bootrom, 0x20000, 0); break; default: - size = load_archive(CD_BIOS_JP, scd.bootrom, sizeof(scd.bootrom), 0); + size = load_archive(CD_BIOS_JP, scd.bootrom, 0x20000, 0); break; } @@ -702,7 +702,7 @@ int load_rom(const char *filename) scd.cartridge.boot = 0x00; /* copy ROM to BOOTROM area */ - memcpy(scd.bootrom, cart.rom, sizeof(scd.bootrom)); + memcpy(scd.bootrom, cart.rom, 0x20000); /* mark CD BIOS as being loaded */ system_bios = system_bios | 0x10; diff --git a/waterbox/gpgx/core/sound/ym2612.c b/waterbox/gpgx/core/sound/ym2612.c index de0bf0a58e..55d4ba23be 100644 --- a/waterbox/gpgx/core/sound/ym2612.c +++ b/waterbox/gpgx/core/sound/ym2612.c @@ -7,7 +7,7 @@ ** Copyright (C) 2001, 2002, 2003 Jarek Burczynski (bujar at mame dot net) ** Copyright (C) 1998 Tatsuyuki Satoh , MultiArcadeMachineEmulator development ** -** Version 1.4 (final beta) +** Version 1.4 (final beta) ** ** Additional code & fixes by Eke-Eke for Genesis Plus GX ** @@ -37,7 +37,7 @@ ** - adjusted lowest EG rates increment values ** - fixed Attack Rate not being updated in some specific cases (Batman & Robin intro) ** - fixed EG behavior when Attack Rate is maximal -** - fixed EG behavior when SL=0 (Mega Turrican tracks 03,09...) or/and Key ON occurs at minimal attenuation +** - fixed EG behavior when SL=0 (Mega Turrican tracks 03,09...) or/and Key ON occurs at minimal attenuation ** - implemented EG output immediate changes on register writes ** - fixed YM2612 initial values (after the reset): fixes missing intro in B.O.B ** - implemented Detune overflow (Ariel, Comix Zone, Shaq Fu, Spiderman & many other games using GEMS sound engine) @@ -463,7 +463,8 @@ static const UINT8 lfo_pm_output[7*8][8]={ }; /* all 128 LFO PM waveforms */ -static INT32 lfo_pm_table[128*8*32]; /* 128 combinations of 7 bits meaningful (of F-NUMBER), 8 LFO depths, 32 LFO output levels per one depth */ +INT32 *ym2612_lfo_pm_table; /* 128 combinations of 7 bits meaningful (of F-NUMBER), 8 LFO depths, 32 LFO output levels per one depth */ +#define lfo_pm_table ym2612_lfo_pm_table /* register number to channel number , slot offset */ #define OPN_CHAN(N) (N&3) @@ -613,7 +614,7 @@ YM2612 ym2612; INT32 m2,c1,c2; /* Phase Modulation input for operators 2,3,4 */ INT32 mem; /* one sample delay memory */ INT32 out_fm[8]; /* outputs of working channels */ -UINT32 bitmask; /* working channels output bitmasking (DAC quantization) */ +UINT32 bitmask; /* working channels output bitmasking (DAC quantization) */ INLINE void FM_KEYON(FM_CH *CH , int s ) @@ -833,9 +834,9 @@ INLINE void set_timers(int v ) ym2612.OPN.ST.TAC = ym2612.OPN.ST.TAL; if ((v&2) && !(ym2612.OPN.ST.mode&2)) ym2612.OPN.ST.TBC = ym2612.OPN.ST.TBL; - + /* reset Timers flags */ - ym2612.OPN.ST.status &= (~v >> 4); + ym2612.OPN.ST.status &= (~v >> 4); ym2612.OPN.ST.mode = v; } @@ -1000,7 +1001,7 @@ INLINE void set_sr(FM_SLOT *SLOT,int v) INLINE void set_sl_rr(FM_SLOT *SLOT,int v) { SLOT->sl = sl_table[ v>>4 ]; - + /* check EG state changes */ if ((SLOT->state == EG_DEC) && (SLOT->volume >= (INT32)(SLOT->sl))) SLOT->state = EG_SUS; @@ -1271,7 +1272,7 @@ INLINE void update_ssg_eg_channels(FM_CH *CH) INLINE void update_phase_lfo_slot(FM_SLOT *SLOT, INT32 pms, UINT32 block_fnum) { INT32 lfo_fn_table_index_offset = lfo_pm_table[(((block_fnum & 0x7f0) >> 4) << 8) + pms + ym2612.OPN.LFO_PM]; - + if (lfo_fn_table_index_offset) /* LFO phase modulation active */ { UINT8 blk; @@ -1301,20 +1302,20 @@ INLINE void update_phase_lfo_slot(FM_SLOT *SLOT, INT32 pms, UINT32 block_fnum) INLINE void update_phase_lfo_channel(FM_CH *CH) { UINT32 block_fnum = CH->block_fnum; - + INT32 lfo_fn_table_index_offset = lfo_pm_table[(((block_fnum & 0x7f0) >> 4) << 8) + CH->pms + ym2612.OPN.LFO_PM]; if (lfo_fn_table_index_offset) /* LFO phase modulation active */ { UINT8 blk; unsigned int kc, fc, finc; - + /* there are 2048 FNUMs that can be generated using FNUM/BLK registers but LFO works with one more bit of a precision so we really need 4096 elements */ block_fnum = block_fnum*2 + lfo_fn_table_index_offset; blk = (block_fnum&0x7000) >> 12; block_fnum = block_fnum & 0xfff; - + /* keyscale code */ kc = (blk<<2) | opn_fktable[block_fnum >> 8]; @@ -1714,7 +1715,7 @@ INLINE void OPNWriteReg(int r, int v) ym2612.OPN.SL3.block_fnum[c] = (blk<<11) | fn; ym2612.CH[2].SLOT[SLOT1].Incr=-1; } - break; + break; case 3: /* 0xac-0xae : 3CH FNUM2,BLK */ if(r < 0x100) ym2612.OPN.SL3.fn_h = v&0x3f; @@ -1729,7 +1730,7 @@ INLINE void OPNWriteReg(int r, int v) CH->ALGO = v&7; CH->FB = (v>>3)&7; setup_connection( CH, c ); - break; + break; } case 1: /* 0xb4-0xb6 : L , R , AMS , PMS */ /* b0-2 PMS */ @@ -1846,7 +1847,7 @@ static void init_tables(void) UINT32 offset_fnum_bit; UINT32 bit_tmp; - for (step=0; step<8; step++) + for (step=0; step<8; step++) { value = 0; for (bit_tmp=0; bit_tmp<7; bit_tmp++) /* 7 bits */ @@ -1908,7 +1909,7 @@ void YM2612ResetChip(void) ym2612.dacen = 0; ym2612.dacout = 0; - + set_timers(0x30); ym2612.OPN.ST.TB = 0; ym2612.OPN.ST.TBL = 256 << 4; @@ -1996,7 +1997,7 @@ void YM2612Update(int *buffer, int length) refresh_fc_eg_chan(&ym2612.CH[2]); } else - { + { /* 3SLOT MODE (operator order is 0,1,3,2) */ if(ym2612.CH[2].SLOT[SLOT1].Incr==-1) { diff --git a/waterbox/gpgx/core/sound/ym2612.h b/waterbox/gpgx/core/sound/ym2612.h index 805c102453..5538ed66a4 100644 --- a/waterbox/gpgx/core/sound/ym2612.h +++ b/waterbox/gpgx/core/sound/ym2612.h @@ -7,7 +7,7 @@ ** Copyright (C) 2001, 2002, 2003 Jarek Burczynski (bujar at mame dot net) ** Copyright (C) 1998 Tatsuyuki Satoh , MultiArcadeMachineEmulator development ** -** Version 1.4 (final beta) +** Version 1.4 (final beta) ** ** Additional code & fixes by Eke-Eke for Genesis Plus GX ** @@ -25,4 +25,6 @@ extern unsigned int YM2612Read(void); extern int YM2612LoadContext(unsigned char *state); extern int YM2612SaveContext(unsigned char *state); +extern INT32 *ym2612_lfo_pm_table; + #endif /* _YM2612_ */ diff --git a/waterbox/gpgx/core/vdp_render.c b/waterbox/gpgx/core/vdp_render.c index 2c2fbdfbb9..895d294501 100644 --- a/waterbox/gpgx/core/vdp_render.c +++ b/waterbox/gpgx/core/vdp_render.c @@ -151,7 +151,7 @@ INLINE void WRITE_LONG(void *address, uint32 data) atex = atex_table[(ATTR >> 29) & 7]; \ src = (uint32 *)&bg_pattern_cache[((ATTR & 0x03FF0000) >> 9 | (ATTR & 0x18000000) >> 10 | (LINE)) ^ ((ATTR & 0x10000000) >> 22)]; -/* +/* One column = 2 tiles Two pattern attributes are written in VRAM as two consecutives 16-bit words: @@ -272,7 +272,7 @@ INLINE void WRITE_LONG(void *address, uint32 data) /* This might be faster or slower than original method, depending on */ /* architecture (x86, PowerPC), cache size, memory access speed, etc... */ -#ifdef LSB_FIRST +#ifdef LSB_FIRST #define DRAW_BG_TILE(SRC_A, SRC_B) \ *lb++ = table[((SRC_B << 8) & 0xff00) | (SRC_A & 0xff)]; \ *lb++ = table[(SRC_B & 0xff00) | ((SRC_A >> 8) & 0xff)]; \ @@ -287,7 +287,7 @@ INLINE void WRITE_LONG(void *address, uint32 data) #endif #ifdef ALIGN_LONG -#ifdef LSB_FIRST +#ifdef LSB_FIRST #define DRAW_BG_COLUMN(ATTR, LINE, SRC_A, SRC_B) \ GET_LSB_TILE(ATTR, LINE) \ SRC_A = READ_LONG((uint32 *)lb); \ @@ -333,7 +333,7 @@ INLINE void WRITE_LONG(void *address, uint32 data) DRAW_BG_TILE(SRC_A, SRC_B) \ SRC_A = READ_LONG((uint32 *)lb); \ SRC_B = (src[1] | atex); \ - DRAW_BG_TILE(SRC_A, SRC_B) + DRAW_BG_TILE(SRC_A, SRC_B) #define DRAW_BG_COLUMN_IM2(ATTR, LINE, SRC_A, SRC_B) \ GET_MSB_TILE_IM2(ATTR, LINE) \ SRC_A = READ_LONG((uint32 *)lb); \ @@ -351,7 +351,7 @@ INLINE void WRITE_LONG(void *address, uint32 data) DRAW_BG_TILE(SRC_A, SRC_B) #endif #else /* NOT ALIGNED */ -#ifdef LSB_FIRST +#ifdef LSB_FIRST #define DRAW_BG_COLUMN(ATTR, LINE, SRC_A, SRC_B) \ GET_LSB_TILE(ATTR, LINE) \ SRC_A = *(uint32 *)(lb); \ @@ -565,11 +565,15 @@ uint8 bg_pattern_cache[0x80000]; /* Sprite pattern name offset look-up table (Mode 5) */ static uint8 name_lut[0x400]; +uint32 *vdp_bp_lut; + /* Bitplane to packed pixel look-up table (Mode 4) */ -static uint32 bp_lut[0x10000]; +#define bp_lut vdp_bp_lut + +uint8 **vdp_lut; /* Layer priority pixel look-up tables */ -static uint8 lut[LUT_MAX][LUT_SIZE]; +#define lut vdp_lut /* Output pixel data look-up tables*/ PIXEL_OUT_T pixel[0x100]; @@ -583,7 +587,7 @@ static uint8 linebuf[2][0x200]; static uint8 spr_ovr; /* Sprite parsing lists */ -typedef struct +typedef struct { uint16 ypos; uint16 xpos; @@ -630,7 +634,7 @@ static void make_name_lut(void) if ((vrow > height) || vcol > width) { /* Invalid settings (unused) */ - name_lut[i] = -1; + name_lut[i] = -1; } else { @@ -701,8 +705,8 @@ static uint32 make_lut_bg(uint32 bx, uint32 ax) int bf = (bx & 0x7F); int bp = (bx & 0x40); int b = (bx & 0x0F); - - int af = (ax & 0x7F); + + int af = (ax & 0x7F); int ap = (ax & 0x40); int a = (ax & 0x0F); @@ -722,8 +726,8 @@ static uint32 make_lut_bg_ste(uint32 bx, uint32 ax) int bf = (bx & 0x7F); int bp = (bx & 0x40); int b = (bx & 0x0F); - - int af = (ax & 0x7F); + + int af = (ax & 0x7F); int ap = (ax & 0x40); int a = (ax & 0x0F); @@ -771,7 +775,7 @@ static uint32 make_lut_bgobj(uint32 bx, uint32 sx) int bs = (bx & 0x80); int bp = (bx & 0x40); int b = (bx & 0x0F); - + int sf = (sx & 0x3F); int sp = (sx & 0x40); int s = (sx & 0x0F); @@ -907,7 +911,7 @@ static uint32 make_lut_bgobj_ste(uint32 bx, uint32 sx) } } else - { + { c = (bf | bi); } } @@ -924,7 +928,7 @@ static uint32 make_lut_bgobj_ste(uint32 bx, uint32 sx) static uint32 make_lut_bgobj_m4(uint32 bx, uint32 sx) { int c; - + int bf = (bx & 0x3F); int bs = (bx & 0x80); int bp = (bx & 0x20); @@ -981,7 +985,7 @@ static void palette_init(void) /* GG mode : xxxx (0-15) */ /* */ /* with x = original CRAM value (2, 3 or 4-bit) */ - /* (*) 2-bit CRAM value is expanded to 4-bit */ + /* (*) 2-bit CRAM value is expanded to 4-bit */ /************************************************/ /* Initialize Mode 5 pixel color look-up tables */ @@ -1142,7 +1146,7 @@ void color_update_m5(int index, unsigned int data) { /* Mode 5 (Normal) */ data = pixel_lut[1][data]; - + /* Input pixel: xxiiiiii */ pixel[0x00 | index] = data; pixel[0x40 | index] = data; @@ -1324,7 +1328,7 @@ void render_bg_m3(int line) do { color = pg[*nt++ << 3]; - + *lb++ = 0x10 | ((color >> 4) & 0x0F); *lb++ = 0x10 | ((color >> 4) & 0x0F); *lb++ = 0x10 | ((color >> 4) & 0x0F); @@ -1362,7 +1366,7 @@ void render_bg_m3x(int line) do { color = pg[*nt++ << 3]; - + *lb++ = 0x10 | ((color >> 4) & 0x0F); *lb++ = 0x10 | ((color >> 4) & 0x0F); *lb++ = 0x10 | ((color >> 4) & 0x0F); @@ -1410,10 +1414,10 @@ void render_bg_m4(int line) int column; uint16 *nt; uint32 attr, atex, *src; - + /* 32 x 8 pixels */ int width = 32; - + /* Horizontal scrolling */ int index = ((reg[0] & 0x40) && (line < 0x10)) ? 0x100 : reg[0x08]; int shift = index & 7; @@ -1438,7 +1442,7 @@ void render_bg_m4(int line) { /* Vertical scroll mask */ v_line = v_line % 256; - + /* Pattern name Table */ nt = (uint16 *)&vram[(0x3700 & nt_mask) + ((v_line >> 3) << 6)]; } @@ -1547,15 +1551,15 @@ void render_bg_m5(int line) if (cinterface_render_bgb) { nt = (uint32 *)&vram[ntbb + (((v_line >> 3) << pf_shift) & 0x1FC0)]; - + /* Pattern row index */ v_line = (v_line & 7) << 3; - + if(shift) { /* Plane B line buffer */ dst = (uint32 *)&linebuf[0][0x10 + shift]; - + atbuf = nt[(index - 1) & pf_col_mask]; DRAW_COLUMN(atbuf, v_line) } @@ -1564,7 +1568,7 @@ void render_bg_m5(int line) /* Plane B line buffer */ dst = (uint32 *)&linebuf[0][0x20]; } - + for(column = 0; column < end; column++, index++) { atbuf = nt[index & pf_col_mask]; @@ -1720,16 +1724,16 @@ void render_bg_m5_vs(int line) { /* Plane B vertical scroll */ v_line = (line + yscroll) & pf_row_mask; - + /* Plane B name table */ nt = (uint32 *)&vram[ntbb + (((v_line >> 3) << pf_shift) & 0x1FC0)]; - + /* Pattern row index */ v_line = (v_line & 7) << 3; - + /* Plane B line buffer */ dst = (uint32 *)&linebuf[0][0x10 + shift]; - + atbuf = nt[(index - 1) & pf_col_mask]; DRAW_COLUMN(atbuf, v_line) } @@ -1747,13 +1751,13 @@ void render_bg_m5_vs(int line) #else v_line = (line + vs[column]) & pf_row_mask; #endif - + /* Plane B name table */ nt = (uint32 *)&vram[ntbb + (((v_line >> 3) << pf_shift) & 0x1FC0)]; - + /* Pattern row index */ v_line = (v_line & 7) << 3; - + atbuf = nt[index & pf_col_mask]; DRAW_COLUMN(atbuf, v_line) } @@ -1790,7 +1794,7 @@ void render_bg_m5_vs(int line) #else shift = (xscroll >> 16) & 0x0F; index = pf_col_mask + start + 1 - ((xscroll >> 20) & pf_col_mask); -#endif +#endif if(shift) { @@ -1912,15 +1916,15 @@ void render_bg_m5_im2(int line) if (cinterface_render_bgb) { nt = (uint32 *)&vram[ntbb + (((v_line >> 3) << pf_shift) & 0x1FC0)]; - + /* Pattern row index */ v_line = (((v_line & 7) << 1) | odd) << 3; - + if(shift) { /* Plane B line buffer */ dst = (uint32 *)&linebuf[0][0x10 + shift]; - + atbuf = nt[(index - 1) & pf_col_mask]; DRAW_COLUMN_IM2(atbuf, v_line) } @@ -1929,7 +1933,7 @@ void render_bg_m5_im2(int line) /* Plane B line buffer */ dst = (uint32 *)&linebuf[0][0x20]; } - + for(column = 0; column < end; column++, index++) { atbuf = nt[index & pf_col_mask]; @@ -2086,16 +2090,16 @@ void render_bg_m5_im2_vs(int line) { /* Plane B vertical scroll */ v_line = (line + yscroll) & pf_row_mask; - + /* Plane B name table */ nt = (uint32 *)&vram[ntbb + (((v_line >> 3) << pf_shift) & 0x1FC0)]; - + /* Pattern row index */ v_line = (((v_line & 7) << 1) | odd) << 3; - + /* Plane B line buffer */ dst = (uint32 *)&linebuf[0][0x10 + shift]; - + atbuf = nt[(index - 1) & pf_col_mask]; DRAW_COLUMN_IM2(atbuf, v_line) } @@ -2104,7 +2108,7 @@ void render_bg_m5_im2_vs(int line) /* Plane B line buffer */ dst = (uint32 *)&linebuf[0][0x20]; } - + for(column = 0; column < end; column++, index++) { /* Plane B vertical scroll */ @@ -2113,13 +2117,13 @@ void render_bg_m5_im2_vs(int line) #else v_line = (line + (vs[column] >> 1)) & pf_row_mask; #endif - + /* Plane B name table */ nt = (uint32 *)&vram[ntbb + (((v_line >> 3) << pf_shift) & 0x1FC0)]; - + /* Pattern row index */ v_line = (((v_line & 7) << 1) | odd) << 3; - + atbuf = nt[index & pf_col_mask]; DRAW_COLUMN_IM2(atbuf, v_line) } @@ -2377,7 +2381,7 @@ void render_bg_m5(int line) /* Plane B name table */ nt = (uint32 *)&vram[ntbb + (((v_line >> 3) << pf_shift) & 0x1FC0)]; - + /* Pattern row index */ v_line = (v_line & 7) << 3; @@ -2392,7 +2396,7 @@ void render_bg_m5(int line) atbuf = nt[(index-1) & pf_col_mask]; DRAW_BG_COLUMN(atbuf, v_line, xscroll, yscroll) } - + for(column = 0; column < width; column++, index++) { atbuf = nt[index & pf_col_mask]; @@ -2617,7 +2621,7 @@ void render_bg_m5_im2(int line) /* Window vertical range (cell 0-31) */ int a = (reg[18] & 0x1F) << 3; - + /* Window position (0=top, 1=bottom) */ int w = (reg[18] >> 7) & 1; @@ -2776,7 +2780,7 @@ void render_bg_m5_im2_vs(int line) /* Window vertical range (cell 0-31) */ uint32 a = (reg[18] & 0x1F) << 3; - + /* Window position (0=top, 1=bottom) */ uint32 w = (reg[18] >> 7) & 1; @@ -3099,7 +3103,7 @@ void render_obj_m4(int line) /* Default sprite width */ int width = 8; - + /* Sprite Generator address mask (LSB is masked for 8x16 sprites) */ uint16 sg_mask = (~0x1C0 ^ (reg[6] << 6)) & (~((reg[1] & 0x02) >> 1)); @@ -3161,7 +3165,7 @@ void render_obj_m4(int line) { /* Draw sprite pattern (zoomed sprites are rendered at half speed) */ DRAW_SPRITE_TILE_ACCURATE_2X(end,0,lut[5]) - + /* 315-5124 VDP specific */ if (system_hw < SYSTEM_SMS2) { @@ -3759,7 +3763,7 @@ void parse_satb_m4(int line) /* Y position */ int ypos; - + /* Sprite list for next line */ object_info_t *object_info = obj_info[(line + 1) & 1]; @@ -3899,11 +3903,11 @@ void parse_satb_m5(int line) break; } - /* Update sprite list (only name, attribute & xpos are parsed from VRAM) */ + /* Update sprite list (only name, attribute & xpos are parsed from VRAM) */ object_info->attr = p[link + 2]; object_info->xpos = p[link + 3] & 0x1ff; object_info->ypos = ypos; - object_info->size = size & 0x0f; + object_info->size = size & 0x0f; /* Increment Sprite count */ ++count; @@ -3913,7 +3917,7 @@ void parse_satb_m5(int line) } } - /* Read link data from internal SAT cache */ + /* Read link data from internal SAT cache */ link = (q[link + 1] & 0x7F) << 2; /* Stop parsing if link data points to first entry (#0) or after the last entry (#64 in H32 mode, #80 in H40 mode) */ diff --git a/waterbox/gpgx/core/vdp_render.h b/waterbox/gpgx/core/vdp_render.h index fd338ea021..b42bc7d1f6 100644 --- a/waterbox/gpgx/core/vdp_render.h +++ b/waterbox/gpgx/core/vdp_render.h @@ -84,5 +84,8 @@ extern void (*render_obj)(int line); extern void (*parse_satb)(int line); extern void (*update_bg_pattern_cache)(int index); +extern uint32 *vdp_bp_lut; +extern uint8 **vdp_lut; + #endif /* _RENDER_H_ */ diff --git a/waterbox/gpgx/core/z80/z80.c b/waterbox/gpgx/core/z80/z80.c index b2c733cc4e..9a33538e95 100644 --- a/waterbox/gpgx/core/z80/z80.c +++ b/waterbox/gpgx/core/z80/z80.c @@ -221,8 +221,8 @@ static UINT8 SZP[256]; /* zero, sign and parity flags */ static UINT8 SZHV_inc[256]; /* zero, sign, half carry and overflow flags INC r8 */ static UINT8 SZHV_dec[256]; /* zero, sign, half carry and overflow flags DEC r8 */ -static UINT8 SZHVC_add[2*256*256]; /* flags for ADD opcode */ -static UINT8 SZHVC_sub[2*256*256]; /* flags for SUB opcode */ +UINT8 *SZHVC_add; /* flags for ADD opcode */ +UINT8 *SZHVC_sub; /* flags for SUB opcode */ static const UINT16 cc_op[0x100] = { 4*15,10*15, 7*15, 6*15, 4*15, 4*15, 7*15, 4*15, 4*15,11*15, 7*15, 6*15, 4*15, 4*15, 7*15, 4*15, @@ -599,7 +599,7 @@ void CDLogZ80(uint addr, uint flags) //special memory maps are hard to support here. return; } - + //punt to 68k mapper CDLog68k(addr, flags); return; @@ -3444,7 +3444,7 @@ void z80_reset(void) } /**************************************************************************** - * Run until given cycle count + * Run until given cycle count ****************************************************************************/ void z80_run(unsigned int cycles) { @@ -3461,7 +3461,7 @@ void z80_run(unsigned int cycles) R++; EXEC_INLINE(op,ROP()); } -} +} /**************************************************************************** * Get all registers in given buffer diff --git a/waterbox/gpgx/core/z80/z80.h b/waterbox/gpgx/core/z80/z80.h index 1aecad1176..0769e9a510 100644 --- a/waterbox/gpgx/core/z80/z80.h +++ b/waterbox/gpgx/core/z80/z80.h @@ -67,5 +67,8 @@ extern void z80_set_context (void *src); extern void z80_set_irq_line(unsigned int state); extern void z80_set_nmi_line(unsigned int state); +extern UINT8 *SZHVC_add; +extern UINT8 *SZHVC_sub; + #endif