311 lines
7.9 KiB
C#
311 lines
7.9 KiB
C#
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using System;
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using System.Diagnostics;
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namespace BizHawk.Emulation.Consoles.Nintendo.Boards
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{
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//AKA MMC1
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//http://wiki.nesdev.com/w/index.php/SxROM
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//consult nestopia as well.
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//the initial conditions for MMC1 games are known to be different. this may have to do with which MMC1 rev it is.
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//but how do we know which revision a game is? i don't know which revision is on which board
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//check UNIF for more information.. it may specify board and MMC1 rev independently because boards may have any MMC1 rev
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//in that case, we need to capture MMC1 rev in the game database (maybe add a new `chip` parameter)
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//this board is a little more convoluted than it might otherwise be because i switched to a more chip-centered way of modeling it partway through
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//perhaps i will make other boards work that way, and perhaps not
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class MMC1
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{
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public MMC1()
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{
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//collect data about whether this is required here:
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//megaman 2 requires it
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StandardReset();
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}
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public enum Rev
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{
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A, B1, B2, B3
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}
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//shift register
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int shift_count, shift_val;
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//register 0:
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public int chr_mode;
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public int prg_mode;
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public int prg_slot; //complicated
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public NES.EMirrorType mirror;
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static NES.EMirrorType[] _mirrorTypes = new NES.EMirrorType[] { NES.EMirrorType.OneScreenA, NES.EMirrorType.OneScreenB, NES.EMirrorType.Vertical, NES.EMirrorType.Horizontal };
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//register 1,2:
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int chr_0, chr_1;
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//register 3:
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int wram_disable;
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int prg;
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void StandardReset()
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{
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prg_mode = 1;
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prg_slot = 1;
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}
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public void Write(int addr, byte value)
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{
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int data = value & 1;
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int reset = (value >> 7) & 1;
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if (reset == 1)
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{
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shift_count = 0;
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shift_val = 0;
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StandardReset();
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}
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else
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{
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shift_val >>= 1;
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shift_val |= (data<<4);
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shift_count++;
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if (shift_count == 5)
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{
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WriteRegister(addr >> 13, shift_val);
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shift_count = 0;
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shift_val = 0;
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}
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}
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}
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void WriteRegister(int addr, int value)
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{
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switch (addr)
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{
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case 0: //8000-9FFF
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mirror = _mirrorTypes[value & 3];
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prg_slot = ((value >> 2) & 1);
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prg_mode = ((value >> 3) & 1);
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chr_mode = ((value >> 4) & 1);
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break;
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case 1: //A000-BFFF
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chr_0 = value & 0x1F;
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break;
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case 2: //C000-DFFF
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chr_1 = value & 0x1F;
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break;
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case 3: //E000-FFFF
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prg = value & 0xF;
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wram_disable = (value >> 4) & 1;
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break;
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}
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//Console.WriteLine("mapping.. chr_mode={0}, chr={1},{2}", chr_mode, chr_0, chr_1);
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//Console.WriteLine("mapping.. prg_mode={0}, prg_slot{1}, prg={2}", prg_mode, prg_slot, prg);
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}
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public int Get_PRGBank(int addr)
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{
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int PRG_A14 = (addr >> 14) & 1;
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if (prg_mode == 0)
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if (PRG_A14 == 0)
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return prg;
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else
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{
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Debug.Assert(false, "not tested yet, and had to guess");
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return (prg + 1) & 0xF;
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}
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else if (prg_slot == 0)
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if (PRG_A14 == 0)
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return 0;
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else return prg;
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else
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if (PRG_A14 == 0)
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return prg;
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else return 0xF;
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}
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public int Get_CHRBank_4K(int addr)
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{
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int CHR_A12 = (addr >> 12) & 1;
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if (chr_mode == 0)
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return chr_0;
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else if (CHR_A12 == 0)
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return chr_0;
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else return chr_1;
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}
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}
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public class SxROM : NES.NESBoardBase
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{
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string type;
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MMC1 mmc1;
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int prg_mask, chr_mask;
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byte[] cram, pram;
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int cram_mask, pram_mask;
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public SxROM(string type)
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{
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this.type = type;
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mmc1 = new MMC1();
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}
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public override void Initialize(NES.RomInfo romInfo, NES nes)
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{
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base.Initialize(romInfo, nes);
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Debug.Assert(RomInfo.PRG_Size == 8 || RomInfo.PRG_Size == 16);
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prg_mask = RomInfo.PRG_Size - 1;
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Debug.Assert(RomInfo.CRAM_Size == -1, "don't specify in gamedb, it is redundant");
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Debug.Assert(RomInfo.PRAM_Size == -1, "don't specify in gamedb, it is redundant");
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//analyze board type
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switch (type)
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{
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case "SGROM":
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Debug.Assert(RomInfo.CHR_Size == -1, "don't specify in gamedb, it is redundant");
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romInfo.CHR_Size = 0; RomInfo.CRAM_Size = 8; romInfo.PRAM_Size = 0;
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break;
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case "SNROM":
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Debug.Assert(RomInfo.CHR_Size == -1, "don't specify in gamedb, it is redundant");
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romInfo.CHR_Size = 0; RomInfo.CRAM_Size = 8; RomInfo.PRAM_Size = 8;
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break;
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case "SL2ROM":
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RomInfo.CRAM_Size = 0;
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RomInfo.PRAM_Size = 0;
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break;
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default: throw new InvalidOperationException();
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}
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Debug.Assert(RomInfo.CRAM_Size == 0 || RomInfo.CRAM_Size == 8);
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if (RomInfo.CRAM_Size != 0)
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{
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cram = new byte[RomInfo.CRAM_Size * 1024];
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cram_mask = cram.Length - 1;
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}
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Debug.Assert(RomInfo.PRAM_Size == 0 || RomInfo.PRAM_Size == 8);
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if (RomInfo.PRAM_Size != 0)
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{
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pram = new byte[RomInfo.CRAM_Size * 1024];
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pram_mask = pram.Length - 1;
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}
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if (RomInfo.CHR_Size != 0)
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{
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Debug.Assert(RomInfo.CHR_Size == 16);
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chr_mask = (RomInfo.CHR_Size*2) - 1;
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}
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}
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public override void WritePRG(int addr, byte value)
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{
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mmc1.Write(addr, value);
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SetMirrorType(mmc1.mirror); //often redundant, but gets the job done
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}
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public override byte ReadPRG(int addr)
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{
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int bank = mmc1.Get_PRGBank(addr) & prg_mask;
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addr = (bank << 14) | (addr & 0x3FFF);
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return RomInfo.ROM[addr];
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}
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int Gen_CHR_Address(int addr)
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{
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int bank = mmc1.Get_CHRBank_4K(addr);
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addr = ((bank & chr_mask) << 12) | (addr & 0x0FFF);
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return addr;
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}
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public override byte ReadPPU(int addr)
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{
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if (addr < 0x2000)
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{
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if (RomInfo.CRAM_Size != 0)
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return cram[addr & cram_mask];
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else return RomInfo.VROM[Gen_CHR_Address(addr)];
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}
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else return base.ReadPPU(addr);
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}
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public override void WritePPU(int addr, byte value)
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{
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if (addr < 0x2000)
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{
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if (RomInfo.CRAM_Size != 0)
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cram[addr & cram_mask] = value;
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}
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else base.WritePPU(addr, value);
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}
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public override byte ReadPRAM(int addr)
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{
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if (RomInfo.PRAM_Size != 0)
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return pram[addr & pram_mask];
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else return 0xFF;
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}
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public override void WritePRAM(int addr, byte value)
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{
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if (RomInfo.PRAM_Size != 0)
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pram[addr & pram_mask] = value;
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}
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public override byte[] SaveRam
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{
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get
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{
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if (!RomInfo.Battery) return null;
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return pram;
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//some boards have a pram that is backed-up or not backed-up. need to handle that somehow
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//(nestopia splits it into NVWRAM and WRAM but i didnt like that at first.. but it may player better with this architecture)
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}
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}
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}
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}
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//http://wiki.nesdev.com/w/index.php/Cartridge_connector
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//http://benheck.com/Downloads/NES_Famicom_Pinouts.pdf
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//http://kevtris.org/mappers/mmc1/index.html
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//one day, i will redo mappers at the pin level and it will look something like this:
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//public void Strobe(int PRG_A, int PRG_D, int PRG_READ, int CHR_A)
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//{
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// if (PRG_READ == 1)
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// {
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// int PRG_A14 = (PRG_A >> 14) & 1;
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// int tmp_prg_A17_A14;
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// if (prg_mode == 0)
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// if (PRG_A14 == 0)
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// tmp_prg_A17_A14 = prg;
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// else
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// tmp_prg_A17_A14 = ((prg + 1) & 0xF);
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// else if (prg_slot == 0)
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// if (PRG_A14 == 0) tmp_prg_A17_A14 = 0;
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// else tmp_prg_A17_A14 = prg;
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// else if (PRG_A14 == 0)
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// tmp_prg_A17_A14 = prg;
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// else tmp_prg_A17_A14 = 0xF;
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// out_PRG_A = PRG_A;
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// out_PRG_A &= ~0x4000;
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// out_PRG_A |= (tmp_prg_A17_A14 << 14);
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// }
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//}
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//public int Read_CHR_A(int addr)
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//{
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// int CHR_A10 = (addr >> 10) & 1;
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// int CHR_A11 = (addr >> 10) & 1;
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// int out_CIRAM_A10;
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// switch (mirror)
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// {
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// case 0: out_CIRAM_A10 = 0; break;
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// case 1: out_CIRAM_A10 = 1; break;
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// case 2: out_CIRAM_A10 = CHR_A10; break;
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// case 3: out_CIRAM_A10 = CHR_A11; break;
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// }
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// addr
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//}
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