2013-11-04 00:45:23 +00:00
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using BizHawk.Common;
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2013-11-13 23:36:21 +00:00
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namespace BizHawk.Emulation.Cores.PCEngine
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2011-01-11 02:55:51 +00:00
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{
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2013-11-04 00:45:23 +00:00
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public partial class PCEngine
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{
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// Street Fighter 2 was a 20-megabit HuCard. The PCE has a maximum 8-megabit addressable ROM space.
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// Therefore SF2 had a special mapper to make this work.
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2017-04-25 17:57:42 +00:00
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private byte SF2MapperLatch;
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2013-11-04 00:45:23 +00:00
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2014-02-10 02:47:23 +00:00
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// when true, every mapper register write is propogated to the vtable that the CDL uses
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2017-04-25 17:57:42 +00:00
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private bool SF2UpdateCDLMappings = false;
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2014-02-10 02:47:23 +00:00
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2017-04-25 17:57:42 +00:00
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private byte ReadMemorySF2(int addr)
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2013-11-04 00:45:23 +00:00
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{
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if (addr < 0x7FFFF) // read ROM
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return RomData[addr];
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2011-01-11 02:55:51 +00:00
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2013-11-04 00:45:23 +00:00
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if (addr < 0xFFFFF) // read ROM
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return RomData[(addr & 0x7FFFF) + ((SF2MapperLatch + 1) * 0x80000)];
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2011-01-11 02:55:51 +00:00
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2013-11-04 00:45:23 +00:00
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if (addr >= 0x1F0000 && addr < 0x1F8000) // read RAM
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return Ram[addr & 0x1FFF];
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2011-02-26 23:02:34 +00:00
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2013-11-04 00:45:23 +00:00
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if (addr >= 0x1FE000) // hardware page.
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{
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if (addr < 0x1FE400) return VDC1.ReadVDC(addr);
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if (addr < 0x1FE800) { Cpu.PendingCycles--; return VCE.ReadVCE(addr); }
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if (addr < 0x1FEC00) return IOBuffer;
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if (addr < 0x1FF000) { IOBuffer = (byte)(Cpu.ReadTimerValue() | (IOBuffer & 0x80)); return IOBuffer; }
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if (addr >= 0x1FF000 &&
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addr < 0x1FF400) { IOBuffer = ReadInput(); return IOBuffer; }
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if ((addr & ~1) == 0x1FF400) return IOBuffer;
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if (addr == 0x1FF402) { IOBuffer = Cpu.IRQControlByte; return IOBuffer; }
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if (addr == 0x1FF403) { IOBuffer = (byte)(Cpu.ReadIrqStatus() | (IOBuffer & 0xF8)); return IOBuffer; }
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}
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2011-01-11 02:55:51 +00:00
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2013-11-04 00:45:23 +00:00
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Log.Error("MEM", "UNHANDLED READ: {0:X6}", addr);
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return 0xFF;
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}
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2011-02-26 23:02:34 +00:00
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2017-04-25 17:57:42 +00:00
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private void WriteMemorySF2(int addr, byte value)
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2013-11-04 00:45:23 +00:00
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{
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if ((addr & 0x1FFC) == 0x1FF0)
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{
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// Set SF2 pager.
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SF2MapperLatch = (byte)(addr & 0x03);
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2014-02-10 02:47:23 +00:00
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if (SF2UpdateCDLMappings)
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{
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CDLMappingApplyRange(Cpu.Mappings, "ROM", 0x40, 0x80000, (SF2MapperLatch + 1) * 0x80000);
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}
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2013-11-04 00:45:23 +00:00
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return;
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}
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2011-01-11 02:55:51 +00:00
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2013-11-04 00:45:23 +00:00
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if (addr >= 0x1F0000 && addr < 0x1F8000) // write RAM.
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Ram[addr & 0x1FFF] = value;
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2011-01-11 02:55:51 +00:00
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2013-11-04 00:45:23 +00:00
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else if (addr >= 0x1FE000) // hardware page.
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{
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if (addr < 0x1FE400) VDC1.WriteVDC(addr, value);
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else if (addr < 0x1FE800) { Cpu.PendingCycles--; VCE.WriteVCE(addr, value); }
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else if (addr < 0x1FEC00) { IOBuffer = value; PSG.WritePSG((byte)addr, value, Cpu.TotalExecutedCycles); }
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else if (addr == 0x1FEC00) { IOBuffer = value; Cpu.WriteTimer(value); }
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else if (addr == 0x1FEC01) { IOBuffer = value; Cpu.WriteTimerEnable(value); }
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else if (addr >= 0x1FF000 &&
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addr < 0x1FF400) { IOBuffer = value; WriteInput(value); }
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else if (addr == 0x1FF402) { IOBuffer = value; Cpu.WriteIrqControl(value); }
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else if (addr == 0x1FF403) { IOBuffer = value; Cpu.WriteIrqStatus(); }
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else Log.Error("MEM", "unhandled hardware write [{0:X6}] : {1:X2}", addr, value);
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}
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else
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Log.Error("MEM", "UNHANDLED WRITE: {0:X6}:{1:X2}", addr, value);
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}
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}
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2014-02-09 23:13:11 +00:00
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}
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